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jz4740: pm.c buildfix and cleanup
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@ -29,18 +29,12 @@
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extern void jz4740_intc_suspend(void);
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extern void jz4740_intc_suspend(void);
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extern void jz4740_intc_resume(void);
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extern void jz4740_intc_resume(void);
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extern void jz_gpiolib_suspend(void);
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extern void jz_gpiolib_resume(void);
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static int jz_pm_enter(suspend_state_t state)
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static int jz_pm_enter(suspend_state_t state)
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{
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{
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unsigned long delta;
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unsigned long nfcsr = REG_EMC_NFCSR;
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unsigned long nfcsr = REG_EMC_NFCSR;
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uint32_t scr = REG_CPM_SCR;
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uint32_t scr = REG_CPM_SCR;
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/* Preserve current time */
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delta = xtime.tv_sec - REG_RTC_RSR;
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/* Disable nand flash */
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/* Disable nand flash */
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REG_EMC_NFCSR = ~0xff;
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REG_EMC_NFCSR = ~0xff;
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@ -50,7 +44,6 @@ static int jz_pm_enter(suspend_state_t state)
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REG_CPM_SCR &= ~( 1<<6 | 1<<7);
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REG_CPM_SCR &= ~( 1<<6 | 1<<7);
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REG_CPM_SCR |= 0<<6 | 1<<7;
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REG_CPM_SCR |= 0<<6 | 1<<7;
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jz_gpiolib_suspend();
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jz4740_intc_suspend();
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jz4740_intc_suspend();
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/* Enter SLEEP mode */
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/* Enter SLEEP mode */
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@ -68,14 +61,10 @@ static int jz_pm_enter(suspend_state_t state)
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REG_EMC_NFCSR = nfcsr;
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REG_EMC_NFCSR = nfcsr;
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jz4740_intc_resume();
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jz4740_intc_resume();
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jz_gpiolib_resume();
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/* Restore sleep control register */
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/* Restore sleep control register */
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REG_CPM_SCR = scr;
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REG_CPM_SCR = scr;
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/* Restore current time */
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xtime.tv_sec = REG_RTC_RSR + delta;
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return 0;
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return 0;
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}
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}
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