mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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surprise :p
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@11894 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
juhosg
240
target/linux/ar71xx/files/drivers/spi/ar71xx_spi.c
Normal file
240
target/linux/ar71xx/files/drivers/spi/ar71xx_spi.c
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@@ -0,0 +1,240 @@
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/*
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* Atheros AR71xx SPI Controller driver
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*
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* Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/spinlock.h>
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#include <linux/workqueue.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/spi_bitbang.h>
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#include <linux/bitops.h>
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#include <asm/mach-ar71xx/ar71xx.h>
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#include <asm/mach-ar71xx/platform.h>
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#define DRV_DESC "Atheros AR71xx SPI Controller driver"
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#define DRV_VERSION "0.2.2"
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#define DRV_NAME "ar71xx-spi"
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#undef PER_BIT_READ
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struct ar71xx_spi {
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struct spi_bitbang bitbang;
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u32 ioc_base;
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u32 reg_ctrl;
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void __iomem *base;
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struct platform_device *pdev;
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u32 (*get_ioc_base)(u8 chip_select, int cs_high,
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int is_on);
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};
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static inline u32 ar71xx_spi_rr(struct ar71xx_spi *sp, unsigned reg)
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{
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return __raw_readl(sp->base + reg);
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}
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static inline void ar71xx_spi_wr(struct ar71xx_spi *sp, unsigned reg, u32 val)
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{
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__raw_writel(val, sp->base + reg);
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}
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static inline struct ar71xx_spi *spidev_to_sp(struct spi_device *spi)
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{
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return spi_master_get_devdata(spi->master);
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}
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static u32 ar71xx_spi_get_ioc_base(u8 chip_select, int cs_high, int is_on)
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{
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u32 ret;
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if (is_on == AR71XX_SPI_CS_INACTIVE)
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ret = SPI_IOC_CS_ALL;
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else
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ret = SPI_IOC_CS_ALL & ~SPI_IOC_CS(chip_select);
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return ret;
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}
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static void ar71xx_spi_chipselect(struct spi_device *spi, int value)
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{
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struct ar71xx_spi *sp = spidev_to_sp(spi);
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void __iomem *base = sp->base;
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u32 ioc_base;
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switch (value) {
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case BITBANG_CS_INACTIVE:
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ioc_base = sp->get_ioc_base(spi->chip_select,
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(spi->mode & SPI_CS_HIGH) != 0,
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AR71XX_SPI_CS_INACTIVE);
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__raw_writel(ioc_base, base + SPI_REG_IOC);
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__raw_writel(sp->reg_ctrl, base + SPI_REG_CTRL);
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__raw_writel(0, base + SPI_REG_FS);
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break;
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case BITBANG_CS_ACTIVE:
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ioc_base = sp->get_ioc_base(spi->chip_select,
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(spi->mode & SPI_CS_HIGH) != 0,
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AR71XX_SPI_CS_ACTIVE);
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__raw_writel(SPI_FS_GPIO, base + SPI_REG_FS);
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/* TODO: setup speed */
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__raw_writel(0x43, base + SPI_REG_CTRL);
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__raw_writel(ioc_base, base + SPI_REG_IOC);
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sp->ioc_base = ioc_base;
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break;
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}
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}
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static u32 ar71xx_spi_txrx_mode0(struct spi_device *spi, unsigned nsecs,
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u32 word, u8 bits)
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{
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struct ar71xx_spi *sp = spidev_to_sp(spi);
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void __iomem *base = sp->base;
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u32 ioc = sp->ioc_base;
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u32 ret;
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/* clock starts at inactive polarity */
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for (word <<= (32 - bits); likely(bits); bits--) {
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u32 out;
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if (word & (1 << 31))
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out = ioc | SPI_IOC_DO;
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else
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out = ioc & ~SPI_IOC_DO;
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/* setup MSB (to slave) on trailing edge */
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__raw_writel(out, base + SPI_REG_IOC);
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__raw_writel(out | SPI_IOC_CLK, base + SPI_REG_IOC);
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word <<= 1;
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#ifdef PER_BIT_READ
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/* sample MSB (from slave) on leading edge */
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ret = __raw_readl(base + SPI_REG_RDS);
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__raw_writel(out, base + SPI_REG_IOC);
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#endif
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}
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#ifndef PER_BIT_READ
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ret = __raw_readl(base + SPI_REG_RDS);
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#endif
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return ret;
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}
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static int ar71xx_spi_probe(struct platform_device *pdev)
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{
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struct spi_master *master;
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struct ar71xx_spi *sp;
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struct ar71xx_spi_platform_data *pdata;
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struct resource *r;
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int ret;
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master = spi_alloc_master(&pdev->dev, sizeof(*sp));
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if (master == NULL) {
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dev_err(&pdev->dev, "failed to allocate spi master\n");
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return -ENOMEM;
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}
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sp = spi_master_get_devdata(master);
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platform_set_drvdata(pdev, sp);
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pdata = pdev->dev.platform_data;
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sp->bitbang.master = spi_master_get(master);
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sp->bitbang.chipselect = ar71xx_spi_chipselect;
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sp->bitbang.txrx_word[SPI_MODE_0] = ar71xx_spi_txrx_mode0;
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sp->get_ioc_base = ar71xx_spi_get_ioc_base;
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if (pdata) {
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sp->bitbang.master->bus_num = pdata->bus_num;
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sp->bitbang.master->num_chipselect = pdata->num_chipselect;
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if (pdata->get_ioc_base)
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sp->get_ioc_base = pdata->get_ioc_base;
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} else {
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sp->bitbang.master->bus_num = 0;
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sp->bitbang.master->num_chipselect = 3;
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}
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (r == NULL) {
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ret = -ENOENT;
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goto err1;
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}
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sp->base = ioremap_nocache(r->start, r->end - r->start + 1);
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if (!sp->base) {
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ret = -ENXIO;
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goto err1;
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}
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sp->reg_ctrl = ar71xx_spi_rr(sp, SPI_REG_IOC);
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ret = spi_bitbang_start(&sp->bitbang);
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if (!ret)
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return 0;
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iounmap(sp->base);
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err1:
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platform_set_drvdata(pdev, NULL);
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spi_master_put(sp->bitbang.master);
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return ret;
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}
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static int ar71xx_spi_remove(struct platform_device *pdev)
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{
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struct ar71xx_spi *sp = platform_get_drvdata(pdev);
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spi_bitbang_stop(&sp->bitbang);
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iounmap(sp->base);
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platform_set_drvdata(pdev, NULL);
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spi_master_put(sp->bitbang.master);
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return 0;
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}
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static struct platform_driver ar71xx_spi_drv = {
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.probe = ar71xx_spi_probe,
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.remove = ar71xx_spi_remove,
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.driver = {
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.name = DRV_NAME,
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.owner = THIS_MODULE,
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},
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};
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static int __init ar71xx_spi_init(void)
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{
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printk(KERN_INFO DRV_DESC " version " DRV_VERSION "\n");
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return platform_driver_register(&ar71xx_spi_drv);
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}
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module_init(ar71xx_spi_init);
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static void __exit ar71xx_spi_exit(void)
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{
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platform_driver_unregister(&ar71xx_spi_drv);
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}
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module_exit(ar71xx_spi_exit);
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MODULE_ALIAS("platform:" DRV_NAME);
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MODULE_DESCRIPTION(DRV_DESC);
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MODULE_VERSION(DRV_VERSION);
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MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
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MODULE_AUTHOR("Imre Kaloz <kaloz@openwrt.org>");
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MODULE_LICENSE("GPL v2");
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