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generic: ar8316: allow to configure port 6 via platform data on AR8327

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34847 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
juhosg 2012-12-22 12:12:37 +00:00
parent e1ab1fcace
commit 565673cb04
2 changed files with 19 additions and 17 deletions

View File

@ -1074,19 +1074,13 @@ ar8327_init_globals(struct ar8216_priv *priv)
} }
static void static void
ar8327_init_cpuport(struct ar8216_priv *priv) ar8327_config_port(struct ar8216_priv *priv, unsigned int port,
struct ar8327_port_cfg *cfg)
{ {
struct ar8327_platform_data *pdata;
struct ar8327_port_cfg *cfg;
u32 t; u32 t;
pdata = priv->phy->dev.platform_data; if (!cfg || !cfg->force_link) {
if (!pdata) priv->write(priv, AR8327_REG_PORT_STATUS(port),
return;
cfg = &pdata->port0_cfg;
if (!cfg->force_link) {
priv->write(priv, AR8327_REG_PORT_STATUS(AR8216_PORT_CPU),
AR8216_PORT_STATUS_LINK_AUTO); AR8216_PORT_STATUS_LINK_AUTO);
return; return;
} }
@ -1095,6 +1089,7 @@ ar8327_init_cpuport(struct ar8216_priv *priv)
t |= cfg->duplex ? AR8216_PORT_STATUS_DUPLEX : 0; t |= cfg->duplex ? AR8216_PORT_STATUS_DUPLEX : 0;
t |= cfg->rxpause ? AR8216_PORT_STATUS_RXFLOW : 0; t |= cfg->rxpause ? AR8216_PORT_STATUS_RXFLOW : 0;
t |= cfg->txpause ? AR8216_PORT_STATUS_TXFLOW : 0; t |= cfg->txpause ? AR8216_PORT_STATUS_TXFLOW : 0;
switch (cfg->speed) { switch (cfg->speed) {
case AR8327_PORT_SPEED_10: case AR8327_PORT_SPEED_10:
t |= AR8216_PORT_SPEED_10M; t |= AR8216_PORT_SPEED_10M;
@ -1107,21 +1102,27 @@ ar8327_init_cpuport(struct ar8216_priv *priv)
break; break;
} }
priv->write(priv, AR8327_REG_PORT_STATUS(AR8216_PORT_CPU), t); priv->write(priv, AR8327_REG_PORT_STATUS(port), t);
} }
static void static void
ar8327_init_port(struct ar8216_priv *priv, int port) ar8327_init_port(struct ar8216_priv *priv, int port)
{ {
struct ar8327_platform_data *pdata;
struct ar8327_port_cfg *cfg;
u32 t; u32 t;
if (port == AR8216_PORT_CPU) { pdata = priv->phy->dev.platform_data;
ar8327_init_cpuport(priv);
} else {
t = AR8216_PORT_STATUS_LINK_AUTO;
priv->write(priv, AR8327_REG_PORT_STATUS(port), t);
}
if (pdata && port == AR8216_PORT_CPU)
cfg = &pdata->port0_cfg;
else if (pdata && port == 6)
cfg = &pdata->port6_cfg;
else
cfg = NULL;
ar8327_config_port(priv, port, cfg);
priv->write(priv, AR8327_REG_PORT_HEADER(port), 0); priv->write(priv, AR8327_REG_PORT_HEADER(port), 0);
priv->write(priv, AR8327_REG_PORT_VLAN0(port), 0); priv->write(priv, AR8327_REG_PORT_VLAN0(port), 0);

View File

@ -75,6 +75,7 @@ struct ar8327_platform_data {
struct ar8327_pad_cfg *pad5_cfg; struct ar8327_pad_cfg *pad5_cfg;
struct ar8327_pad_cfg *pad6_cfg; struct ar8327_pad_cfg *pad6_cfg;
struct ar8327_port_cfg port0_cfg; struct ar8327_port_cfg port0_cfg;
struct ar8327_port_cfg port6_cfg;
struct ar8327_led_cfg *led_cfg; struct ar8327_led_cfg *led_cfg;
}; };