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uplevel arch-patches to .28
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parent
91cc144708
commit
5b2fbd7f57
@ -29454,8 +29454,8 @@
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cpu_wait = r4k_wait;
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cpu_wait = r4k_wait;
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break;
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break;
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@@ -802,6 +803,22 @@
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@@ -860,6 +860,23 @@
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}
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}
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}
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}
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+static inline void cpu_probe_ingenic(struct cpuinfo_mips *c)
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+static inline void cpu_probe_ingenic(struct cpuinfo_mips *c)
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@ -29467,6 +29467,7 @@
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+ c->cputype = CPU_JZRISC;
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+ c->cputype = CPU_JZRISC;
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+ c->isa_level = MIPS_CPU_ISA_M32R1;
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+ c->isa_level = MIPS_CPU_ISA_M32R1;
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+ c->tlbsize = 32;
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+ c->tlbsize = 32;
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+ __cpu_name[cpu] = "Ingenic JZRISC";
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+ break;
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+ break;
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+ default:
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+ default:
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+ panic("Unknown Ingenic Processor ID!");
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+ panic("Unknown Ingenic Processor ID!");
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@ -29474,27 +29475,19 @@
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+ }
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+ }
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+}
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+}
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+
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+
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const char *__cpu_name[NR_CPUS];
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static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu)
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{
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/*
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decode_configs(c);
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@@ -880,6 +897,7 @@
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@@ -909,6 +926,9 @@
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case CPU_BCM4710: name = "Broadcom BCM4710"; break;
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case PRID_COMP_NXP:
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case CPU_PR4450: name = "Philips PR4450"; break;
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cpu_probe_nxp(c, cpu);
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case CPU_LOONGSON2: name = "ICT Loongson-2"; break;
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break;
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+ case CPU_JZRISC: name = "Ingenic JZRISC"; break;
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+ case PRID_COMP_INGENIC:
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default:
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BUG();
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}
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@@ -919,6 +937,9 @@
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case PRID_COMP_PHILIPS:
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cpu_probe_philips(c);
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break;
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+ case PRID_COMP_INGENIC:
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+ cpu_probe_ingenic(c);
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+ cpu_probe_ingenic(c);
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+ break;
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+ break;
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default:
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}
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c->cputype = CPU_UNKNOWN;
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}
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BUG_ON(!__cpu_name[cpu]);
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--- linux-2.6.24.7.old/arch/mips/mm/c-r4k.c 2008-05-07 01:22:34.000000000 +0200
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--- linux-2.6.24.7.old/arch/mips/mm/c-r4k.c 2008-05-07 01:22:34.000000000 +0200
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+++ linux-2.6.24.7/arch/mips/mm/c-r4k.c 2009-04-12 18:13:57.000000000 +0200
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+++ linux-2.6.24.7/arch/mips/mm/c-r4k.c 2009-04-12 18:13:57.000000000 +0200
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@@ -874,6 +874,36 @@
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@@ -874,6 +874,36 @@
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