From b8b3ecec7be7765466952d475f91887ece4542e5 Mon Sep 17 00:00:00 2001 From: Xiangfu Liu Date: Fri, 30 Apr 2010 11:31:53 +0800 Subject: [PATCH] [uboot-xburst] fix some compile warning Signed-off-by: Xiangfu Liu --- .../files/board/nanonote/nanonote.c | 2 +- .../files/cpu/mips/nanonote_gpm940b0.h | 19 ------------------- .../files/include/configs/nanonote.h | 2 ++ .../files/nand_spl/nand_boot_jz4740.c | 4 ++-- 4 files changed, 5 insertions(+), 22 deletions(-) diff --git a/package/uboot-xburst/files/board/nanonote/nanonote.c b/package/uboot-xburst/files/board/nanonote/nanonote.c index a6d93716e..f312a33b5 100644 --- a/package/uboot-xburst/files/board/nanonote/nanonote.c +++ b/package/uboot-xburst/files/board/nanonote/nanonote.c @@ -24,7 +24,7 @@ static void gpio_init(void) /* * Initialize SDRAM pins */ - __gpio_as_sdram_32bit(); + __gpio_as_sdram_16bit_4720(); /* * Initialize LCD pins diff --git a/package/uboot-xburst/files/cpu/mips/nanonote_gpm940b0.h b/package/uboot-xburst/files/cpu/mips/nanonote_gpm940b0.h index 932cee851..130427210 100644 --- a/package/uboot-xburst/files/cpu/mips/nanonote_gpm940b0.h +++ b/package/uboot-xburst/files/cpu/mips/nanonote_gpm940b0.h @@ -159,25 +159,6 @@ do { \ __spi_write_reg1(0x05, 0x5e); \ } while (0) -#define __lcd_display_pin_init() \ -do { \ - __lcd_special_pin_init();\ - __gpio_as_pwm();\ - __lcd_set_backlight_level(8);\ -} while (0) - -#define __lcd_display_on() \ -do { \ - __lcd_set_backlight_level(8); \ - __lcd_special_on();\ -} while (0) - -#define __lcd_display_off() \ -do { \ - __lcd_set_backlight_level(0); \ - __lcd_special_off();\ -} while (0) - #define __lcd_set_backlight_level(n)\ do { \ __gpio_as_output(LCD_RET); \ diff --git a/package/uboot-xburst/files/include/configs/nanonote.h b/package/uboot-xburst/files/include/configs/nanonote.h index 7f38570c0..2c05f67cd 100644 --- a/package/uboot-xburst/files/include/configs/nanonote.h +++ b/package/uboot-xburst/files/include/configs/nanonote.h @@ -96,6 +96,8 @@ /* * NAND FLASH configuration */ +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + /* NAND Boot config code */ #define JZ4740_NANDBOOT_CFG JZ4740_NANDBOOT_B8R3 diff --git a/package/uboot-xburst/files/nand_spl/nand_boot_jz4740.c b/package/uboot-xburst/files/nand_spl/nand_boot_jz4740.c index 7ce82de15..47f240c96 100644 --- a/package/uboot-xburst/files/nand_spl/nand_boot_jz4740.c +++ b/package/uboot-xburst/files/nand_spl/nand_boot_jz4740.c @@ -167,7 +167,7 @@ static int nand_read_oob(int page_addr, uchar *buf, int size) /* Send page address */ __nand_addr(page_addr & 0xff); __nand_addr((page_addr >> 8) & 0xff); - #ifdef NAND_ROW_CYCLE == 3 + #if defined NAND_ROW_CYCLE && NAND_ROW_CYCLE == 3 __nand_addr((page_addr >> 16) & 0xff); #endif @@ -210,7 +210,7 @@ static int nand_read_page(int page_addr, uchar *dst, uchar *oobbuf) /* Send page address */ __nand_addr(page_addr & 0xff); __nand_addr((page_addr >> 8) & 0xff); - #if NAND_ROW_CYCLE == 3 + #if defined NAND_ROW_CYCLE && NAND_ROW_CYCLE == 3 __nand_addr((page_addr >> 16) & 0xff); #endif