qi-hardware/openwrt-xburst
1
0
Fork 0
mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2024-12-24 20:09:55 +02:00
Code

ar71xx: merge DIR-600 A1 and DIR-615 E4 support

Browse Source 
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@29976 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
juhosg 2012-01-31 18:37:29 +00:00
parent 8be0cce7cc
commit 61fe64fa9d
9 changed files with 25 additions and 390 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
target/linux/ar71xx/config-2.6.39
View File

@ -25,7 +25,6 @@ CONFIG_AR71XX_MACH_AW_NR580=y
CONFIG_AR71XX_MACH_DB120=y
CONFIG_AR71XX_MACH_DIR_600_A1=y
CONFIG_AR71XX_MACH_DIR_615_C1=y
CONFIG_AR71XX_MACH_DIR_615_E4=y
CONFIG_AR71XX_MACH_DIR_825_B1=y
CONFIG_AR71XX_MACH_EAP7660D=y
CONFIG_AR71XX_MACH_HORNET_UB=y

1
target/linux/ar71xx/config-3.2
View File

@ -34,7 +34,6 @@ CONFIG_ATH79_MACH_AW_NR580=y
CONFIG_ATH79_MACH_DB120=y
CONFIG_ATH79_MACH_DIR_600_A1=y
CONFIG_ATH79_MACH_DIR_615_C1=y
CONFIG_ATH79_MACH_DIR_615_E4=y
CONFIG_ATH79_MACH_DIR_825_B1=y
CONFIG_ATH79_MACH_EAP7660D=y
CONFIG_ATH79_MACH_HORNET_UB=y

11
target/linux/ar71xx/files-2.6.39/arch/mips/ar71xx/Kconfig
View File

@ -87,7 +87,7 @@ config AR71XX_MACH_DB120
select AR71XX_DEV_USB
config AR71XX_MACH_DIR_600_A1
bool "D-Link DIR-600 rev. A1 support"
bool "D-Link DIR-600 A1/DIR-615 E4 support"
select SOC_AR724X
select AR71XX_DEV_AP91_PCI if PCI
select AR71XX_DEV_M25P80
@ -104,15 +104,6 @@ config AR71XX_MACH_DIR_615_C1
select AR71XX_DEV_LEDS_GPIO
select AR71XX_NVRAM
config AR71XX_MACH_DIR_615_E4
bool "D-Link DIR-615 rev. E4 support"
select SOC_AR724X
select AR71XX_DEV_AP91_PCI if PCI
select AR71XX_DEV_M25P80
select AR71XX_DEV_GPIO_BUTTONS
select AR71XX_DEV_LEDS_GPIO
select AR71XX_NVRAM
config AR71XX_MACH_DIR_825_B1
bool "D-Link DIR-825 rev. B1 board support"
select SOC_AR71XX

1
target/linux/ar71xx/files-2.6.39/arch/mips/ar71xx/Makefile
View File

@ -40,7 +40,6 @@ obj-$(CONFIG_AR71XX_MACH_AW_NR580) += mach-aw-nr580.o
obj-$(CONFIG_AR71XX_MACH_DB120) += mach-db120.o
obj-$(CONFIG_AR71XX_MACH_DIR_600_A1) += mach-dir-600-a1.o
obj-$(CONFIG_AR71XX_MACH_DIR_615_C1) += mach-dir-615-c1.o
obj-$(CONFIG_AR71XX_MACH_DIR_615_E4) += mach-dir-615-e4.o
obj-$(CONFIG_AR71XX_MACH_DIR_825_B1) += mach-dir-825-b1.o
obj-$(CONFIG_AR71XX_MACH_EAP7660D) += mach-eap7660d.o
obj-$(CONFIG_AR71XX_MACH_JA76PF) += mach-ja76pf.o

12
target/linux/ar71xx/files-2.6.39/arch/mips/ar71xx/mach-dir-600-a1.c
View File

@ -1,7 +1,8 @@
/*
* D-Link DIR-600 rev. A1 board support
*
* Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2012 Vadim Girlin <vadimgirlin@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
@ -184,3 +185,12 @@ static void __init dir_600_a1_setup(void)
MIPS_MACHINE(AR71XX_MACH_DIR_600_A1, "DIR-600-A1", "D-Link DIR-600 rev. A1",
dir_600_a1_setup);
static void __init dir_615_e4_setup(void)
{
dir_600_a1_setup();
ap91_pci_setup_wmac_led_pin(1);
}
MIPS_MACHINE(AR71XX_MACH_DIR_615_E4, "DIR-615-E4", "D-Link DIR-615 rev. E4",
dir_615_e4_setup);

183
target/linux/ar71xx/files-2.6.39/arch/mips/ar71xx/mach-dir-615-e4.c
View File

@ -1,183 +0,0 @@
/*
* D-Link DIR-615 rev. E4 board support
*
* Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2012 Vadim Girlin <vadimgirlin@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <asm/mach-ar71xx/ar71xx.h>
#include "machtype.h"
#include "devices.h"
#include "dev-m25p80.h"
#include "dev-ap91-pci.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "nvram.h"
#define DIR_615_E4_GPIO_LED_WPS 0
#define DIR_615_E4_GPIO_LED_POWER_AMBER 1
#define DIR_615_E4_GPIO_LED_POWER_GREEN 6
#define DIR_615_E4_GPIO_LED_WAN_AMBER 7
#define DIR_615_E4_GPIO_LED_WAN_GREEN 17
#define DIR_615_E4_GPIO_LED_LAN1_GREEN 13
#define DIR_615_E4_GPIO_LED_LAN2_GREEN 14
#define DIR_615_E4_GPIO_LED_LAN3_GREEN 15
#define DIR_615_E4_GPIO_LED_LAN4_GREEN 16
#define DIR_615_E4_GPIO_BTN_RESET 8
#define DIR_615_E4_GPIO_BTN_WPS 12
#define DIR_615_E4_KEYS_POLL_INTERVAL 20
#define DIR_615_E4_KEYS_DEBOUNCE_INTERVAL (3 * DIR_615_E4_KEYS_POLL_INTERVAL)
#define DIR_615_E4_NVRAM_ADDR 0x1f030000
#define DIR_615_E4_NVRAM_SIZE 0x10000
#ifdef CONFIG_MTD_PARTITIONS
static struct mtd_partition dir_615_e4_partitions[] = {
{
.name = "u-boot",
.offset = 0,
.size = 0x030000,
.mask_flags = MTD_WRITEABLE,
}, {
.name = "nvram",
.offset = 0x030000,
.size = 0x010000,
}, {
.name = "kernel",
.offset = 0x040000,
.size = 0x0e0000,
}, {
.name = "rootfs",
.offset = 0x120000,
.size = 0x2c0000,
}, {
.name = "mac",
.offset = 0x3e0000,
.size = 0x010000,
.mask_flags = MTD_WRITEABLE,
}, {
.name = "art",
.offset = 0x3f0000,
.size = 0x010000,
.mask_flags = MTD_WRITEABLE,
}, {
.name = "firmware",
.offset = 0x040000,
.size = 0x3a0000,
}
};
#endif /* CONFIG_MTD_PARTITIONS */
static struct flash_platform_data dir_615_e4_flash_data = {
#ifdef CONFIG_MTD_PARTITIONS
.parts = dir_615_e4_partitions,
.nr_parts = ARRAY_SIZE(dir_615_e4_partitions),
#endif
};
static struct gpio_led dir_615_e4_leds_gpio[] __initdata = {
{
.name = "d-link:green:power",
.gpio = DIR_615_E4_GPIO_LED_POWER_GREEN,
}, {
.name = "d-link:amber:power",
.gpio = DIR_615_E4_GPIO_LED_POWER_AMBER,
}, {
.name = "d-link:green:wan",
.gpio = DIR_615_E4_GPIO_LED_WAN_GREEN,
.active_low = 1,
}, {
.name = "d-link:amber:wan",
.gpio = DIR_615_E4_GPIO_LED_WAN_AMBER,
}, {
.name = "d-link:green:lan1",
.gpio = DIR_615_E4_GPIO_LED_LAN1_GREEN,
.active_low = 1,
}, {
.name = "d-link:green:lan2",
.gpio = DIR_615_E4_GPIO_LED_LAN2_GREEN,
.active_low = 1,
}, {
.name = "d-link:green:lan3",
.gpio = DIR_615_E4_GPIO_LED_LAN3_GREEN,
.active_low = 1,
}, {
.name = "d-link:green:lan4",
.gpio = DIR_615_E4_GPIO_LED_LAN4_GREEN,
.active_low = 1,
}, {
.name = "d-link:blue:wps",
.gpio = DIR_615_E4_GPIO_LED_WPS,
.active_low = 1,
}
};
static struct gpio_keys_button dir_615_e4_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = DIR_615_E4_KEYS_DEBOUNCE_INTERVAL,
.gpio = DIR_615_E4_GPIO_BTN_RESET,
.active_low = 1,
}, {
.desc = "wps",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = DIR_615_E4_KEYS_DEBOUNCE_INTERVAL,
.gpio = DIR_615_E4_GPIO_BTN_WPS,
.active_low = 1,
}
};
static void __init dir_615_e4_setup(void)
{
const char *nvram = (char *) KSEG1ADDR(DIR_615_E4_NVRAM_ADDR);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
u8 mac_buff[6];
u8 *mac = NULL;
if (nvram_parse_mac_addr(nvram, DIR_615_E4_NVRAM_SIZE,
"lan_mac=", mac_buff) == 0) {
ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac_buff, 0);
ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac_buff, 1);
mac = mac_buff;
}
ar71xx_add_device_m25p80(&dir_615_e4_flash_data);
ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(dir_615_e4_leds_gpio),
dir_615_e4_leds_gpio);
ar71xx_register_gpio_keys_polled(-1, DIR_615_E4_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dir_615_e4_gpio_keys),
dir_615_e4_gpio_keys);
ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0);
ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 1);
ar71xx_add_device_mdio(0, 0x0);
/* LAN ports */
ar71xx_add_device_eth(1);
/* WAN port */
ar71xx_add_device_eth(0);
ap91_pci_setup_wmac_led_pin(1);
ap91_pci_init(ee, mac);
}
MIPS_MACHINE(AR71XX_MACH_DIR_615_E4, "DIR-615-E4", "D-Link DIR-615 rev. E4",
dir_615_e4_setup);

10
target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-dir-600-a1.c
View File

@ -2,6 +2,7 @@
* D-Link DIR-600 rev. A1 board support
*
* Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2012 Vadim Girlin <vadimgirlin@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
@ -182,3 +183,12 @@ static void __init dir_600_a1_setup(void)
MIPS_MACHINE(ATH79_MACH_DIR_600_A1, "DIR-600-A1", "D-Link DIR-600 rev. A1",
dir_600_a1_setup);
static void __init dir_615_e4_setup(void)
{
dir_600_a1_setup();
ap9x_pci_setup_wmac_led_pin(0, 1);
}
MIPS_MACHINE(ATH79_MACH_DIR_615_E4, "DIR-615-E4", "D-Link DIR-615 rev. E4",
dir_615_e4_setup);

179
target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-dir-615-e4.c
View File

@ -1,179 +0,0 @@
/*
* D-Link DIR-615 rev. E4 board support
*
* Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2012 Vadim Girlin <vadimgirlin@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <asm/mach-ath79/ath79.h>
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "machtypes.h"
#include "nvram.h"
#define DIR_615_E4_GPIO_LED_WPS 0
#define DIR_615_E4_GPIO_LED_POWER_AMBER 1
#define DIR_615_E4_GPIO_LED_POWER_GREEN 6
#define DIR_615_E4_GPIO_LED_WAN_AMBER 7
#define DIR_615_E4_GPIO_LED_WAN_GREEN 17
#define DIR_615_E4_GPIO_LED_LAN1_GREEN 13
#define DIR_615_E4_GPIO_LED_LAN2_GREEN 14
#define DIR_615_E4_GPIO_LED_LAN3_GREEN 15
#define DIR_615_E4_GPIO_LED_LAN4_GREEN 16
#define DIR_615_E4_GPIO_BTN_RESET 8
#define DIR_615_E4_GPIO_BTN_WPS 12
#define DIR_615_E4_KEYS_POLL_INTERVAL 20
#define DIR_615_E4_KEYS_DEBOUNCE_INTERVAL (3 * DIR_615_E4_KEYS_POLL_INTERVAL)
#define DIR_615_E4_NVRAM_ADDR 0x1f030000
#define DIR_615_E4_NVRAM_SIZE 0x10000
static struct mtd_partition dir_615_e4_partitions[] = {
{
.name = "u-boot",
.offset = 0,
.size = 0x030000,
.mask_flags = MTD_WRITEABLE,
}, {
.name = "nvram",
.offset = 0x030000,
.size = 0x010000,
}, {
.name = "kernel",
.offset = 0x040000,
.size = 0x0e0000,
}, {
.name = "rootfs",
.offset = 0x120000,
.size = 0x2c0000,
}, {
.name = "mac",
.offset = 0x3e0000,
.size = 0x010000,
.mask_flags = MTD_WRITEABLE,
}, {
.name = "art",
.offset = 0x3f0000,
.size = 0x010000,
.mask_flags = MTD_WRITEABLE,
}, {
.name = "firmware",
.offset = 0x040000,
.size = 0x3a0000,
}
};
static struct flash_platform_data dir_615_e4_flash_data = {
.parts = dir_615_e4_partitions,
.nr_parts = ARRAY_SIZE(dir_615_e4_partitions),
};
static struct gpio_led dir_615_e4_leds_gpio[] __initdata = {
{
.name = "d-link:green:power",
.gpio = DIR_615_E4_GPIO_LED_POWER_GREEN,
}, {
.name = "d-link:amber:power",
.gpio = DIR_615_E4_GPIO_LED_POWER_AMBER,
}, {
.name = "d-link:green:wan",
.gpio = DIR_615_E4_GPIO_LED_WAN_GREEN,
.active_low = 1,
}, {
.name = "d-link:amber:wan",
.gpio = DIR_615_E4_GPIO_LED_WAN_AMBER,
}, {
.name = "d-link:green:lan1",
.gpio = DIR_615_E4_GPIO_LED_LAN1_GREEN,
.active_low = 1,
}, {
.name = "d-link:green:lan2",
.gpio = DIR_615_E4_GPIO_LED_LAN2_GREEN,
.active_low = 1,
}, {
.name = "d-link:green:lan3",
.gpio = DIR_615_E4_GPIO_LED_LAN3_GREEN,
.active_low = 1,
}, {
.name = "d-link:green:lan4",
.gpio = DIR_615_E4_GPIO_LED_LAN4_GREEN,
.active_low = 1,
}, {
.name = "d-link:blue:wps",
.gpio = DIR_615_E4_GPIO_LED_WPS,
.active_low = 1,
}
};
static struct gpio_keys_button dir_615_e4_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = DIR_615_E4_KEYS_DEBOUNCE_INTERVAL,
.gpio = DIR_615_E4_GPIO_BTN_RESET,
.active_low = 1,
}, {
.desc = "wps",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = DIR_615_E4_KEYS_DEBOUNCE_INTERVAL,
.gpio = DIR_615_E4_GPIO_BTN_WPS,
.active_low = 1,
}
};
static void __init dir_615_e4_setup(void)
{
const char *nvram = (char *) KSEG1ADDR(DIR_615_E4_NVRAM_ADDR);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
u8 mac_buff[6];
u8 *mac = NULL;
if (ath79_nvram_parse_mac_addr(nvram, DIR_615_E4_NVRAM_SIZE,
"lan_mac=", mac_buff) == 0) {
ath79_init_mac(ath79_eth0_data.mac_addr, mac_buff, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, mac_buff, 1);
mac = mac_buff;
}
ath79_register_m25p80(&dir_615_e4_flash_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_615_e4_leds_gpio),
dir_615_e4_leds_gpio);
ath79_register_gpio_keys_polled(-1, DIR_615_E4_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dir_615_e4_gpio_keys),
dir_615_e4_gpio_keys);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1);
ath79_register_mdio(0, 0x0);
/* LAN ports */
ath79_register_eth(1);
/* WAN port */
ath79_register_eth(0);
ap9x_pci_setup_wmac_led_pin(0, 1);
ap91_pci_init(ee, mac);
}
MIPS_MACHINE(ATH79_MACH_DIR_615_E4, "DIR-615-E4", "D-Link DIR-615 rev. E4",
dir_615_e4_setup);

17
target/linux/ar71xx/patches-3.2/610-MIPS-ath79-openwrt-machines.patch
View File

@ -188,7 +188,7 @@
config ATH79_MACH_PB44
bool "Atheros PB44 reference board"
select SOC_AR71XX
@@ -54,6 +137,379 @@ config ATH79_MACH_PB44
@@ -54,6 +137,369 @@ config ATH79_MACH_PB44
Say 'Y' here if you want your kernel to support the
Atheros PB44 reference board.
@ -278,7 +278,7 @@
+ select MYLOADER
+
+config ATH79_MACH_DIR_600_A1
+ bool "D-Link DIR-600 rev. A1 support"
+ bool "D-Link DIR-600 A1/DIR-615 E4 support"
+ select SOC_AR724X
+ select ATH79_DEV_AP9X_PCI if PCI
+ select ATH79_DEV_ETH
@ -297,16 +297,6 @@
+ select ATH79_DEV_WMAC
+ select ATH79_NVRAM
+
+config ATH79_MACH_DIR_615_E4
+ bool "D-Link DIR-615 rev. E4 support"
+ select SOC_AR724X
+ select ATH79_DEV_AP9X_PCI if PCI
+ select ATH79_DEV_ETH
+ select ATH79_DEV_GPIO_BUTTONS
+ select ATH79_DEV_LEDS_GPIO
+ select ATH79_DEV_M25P80
+ select ATH79_NVRAM
+
+config ATH79_MACH_DIR_825_B1
+ bool "D-Link DIR-825 rev. B1 board support"
+ select SOC_AR71XX
@ -630,7 +620,7 @@
endif
--- a/arch/mips/ath79/Makefile
+++ b/arch/mips/ath79/Makefile
@@ -36,8 +36,57 @@ obj-$(CONFIG_ATH79_PCI_ATH9K_FIXUP) += p
@@ -36,8 +36,56 @@ obj-$(CONFIG_ATH79_PCI_ATH9K_FIXUP) += p
#
# Machines
#
@ -646,7 +636,6 @@
obj-$(CONFIG_ATH79_MACH_DB120) += mach-db120.o
+obj-$(CONFIG_ATH79_MACH_DIR_600_A1) += mach-dir-600-a1.o
+obj-$(CONFIG_ATH79_MACH_DIR_615_C1) += mach-dir-615-c1.o
+obj-$(CONFIG_ATH79_MACH_DIR_615_E4) += mach-dir-615-e4.o
+obj-$(CONFIG_ATH79_MACH_DIR_825_B1) += mach-dir-825-b1.o
+obj-$(CONFIG_ATH79_MACH_EAP7660D) += mach-eap7660d.o
+obj-$(CONFIG_ATH79_MACH_JA76PF) += mach-ja76pf.o