mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-24 19:49:54 +02:00
ar71xx: merge DIR-600 A1 and DIR-615 E4 support
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@29976 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
parent
8be0cce7cc
commit
61fe64fa9d
@ -25,7 +25,6 @@ CONFIG_AR71XX_MACH_AW_NR580=y
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CONFIG_AR71XX_MACH_DB120=y
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CONFIG_AR71XX_MACH_DIR_600_A1=y
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CONFIG_AR71XX_MACH_DIR_615_C1=y
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CONFIG_AR71XX_MACH_DIR_615_E4=y
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CONFIG_AR71XX_MACH_DIR_825_B1=y
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CONFIG_AR71XX_MACH_EAP7660D=y
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CONFIG_AR71XX_MACH_HORNET_UB=y
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@ -34,7 +34,6 @@ CONFIG_ATH79_MACH_AW_NR580=y
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CONFIG_ATH79_MACH_DB120=y
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CONFIG_ATH79_MACH_DIR_600_A1=y
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CONFIG_ATH79_MACH_DIR_615_C1=y
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CONFIG_ATH79_MACH_DIR_615_E4=y
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CONFIG_ATH79_MACH_DIR_825_B1=y
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CONFIG_ATH79_MACH_EAP7660D=y
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CONFIG_ATH79_MACH_HORNET_UB=y
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@ -87,7 +87,7 @@ config AR71XX_MACH_DB120
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select AR71XX_DEV_USB
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config AR71XX_MACH_DIR_600_A1
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bool "D-Link DIR-600 rev. A1 support"
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bool "D-Link DIR-600 A1/DIR-615 E4 support"
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select SOC_AR724X
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select AR71XX_DEV_AP91_PCI if PCI
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select AR71XX_DEV_M25P80
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@ -104,15 +104,6 @@ config AR71XX_MACH_DIR_615_C1
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select AR71XX_DEV_LEDS_GPIO
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select AR71XX_NVRAM
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config AR71XX_MACH_DIR_615_E4
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bool "D-Link DIR-615 rev. E4 support"
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select SOC_AR724X
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select AR71XX_DEV_AP91_PCI if PCI
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select AR71XX_DEV_M25P80
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select AR71XX_DEV_GPIO_BUTTONS
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select AR71XX_DEV_LEDS_GPIO
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select AR71XX_NVRAM
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config AR71XX_MACH_DIR_825_B1
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bool "D-Link DIR-825 rev. B1 board support"
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select SOC_AR71XX
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@ -40,7 +40,6 @@ obj-$(CONFIG_AR71XX_MACH_AW_NR580) += mach-aw-nr580.o
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obj-$(CONFIG_AR71XX_MACH_DB120) += mach-db120.o
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obj-$(CONFIG_AR71XX_MACH_DIR_600_A1) += mach-dir-600-a1.o
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obj-$(CONFIG_AR71XX_MACH_DIR_615_C1) += mach-dir-615-c1.o
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obj-$(CONFIG_AR71XX_MACH_DIR_615_E4) += mach-dir-615-e4.o
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obj-$(CONFIG_AR71XX_MACH_DIR_825_B1) += mach-dir-825-b1.o
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obj-$(CONFIG_AR71XX_MACH_EAP7660D) += mach-eap7660d.o
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obj-$(CONFIG_AR71XX_MACH_JA76PF) += mach-ja76pf.o
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@ -1,7 +1,8 @@
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/*
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* D-Link DIR-600 rev. A1 board support
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*
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* Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2012 Vadim Girlin <vadimgirlin@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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@ -184,3 +185,12 @@ static void __init dir_600_a1_setup(void)
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MIPS_MACHINE(AR71XX_MACH_DIR_600_A1, "DIR-600-A1", "D-Link DIR-600 rev. A1",
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dir_600_a1_setup);
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static void __init dir_615_e4_setup(void)
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{
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dir_600_a1_setup();
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ap91_pci_setup_wmac_led_pin(1);
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}
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MIPS_MACHINE(AR71XX_MACH_DIR_615_E4, "DIR-615-E4", "D-Link DIR-615 rev. E4",
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dir_615_e4_setup);
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@ -1,183 +0,0 @@
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/*
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* D-Link DIR-615 rev. E4 board support
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*
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* Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2012 Vadim Girlin <vadimgirlin@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <asm/mach-ar71xx/ar71xx.h>
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#include "machtype.h"
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#include "devices.h"
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#include "dev-m25p80.h"
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#include "dev-ap91-pci.h"
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#include "dev-gpio-buttons.h"
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#include "dev-leds-gpio.h"
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#include "nvram.h"
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#define DIR_615_E4_GPIO_LED_WPS 0
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#define DIR_615_E4_GPIO_LED_POWER_AMBER 1
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#define DIR_615_E4_GPIO_LED_POWER_GREEN 6
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#define DIR_615_E4_GPIO_LED_WAN_AMBER 7
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#define DIR_615_E4_GPIO_LED_WAN_GREEN 17
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#define DIR_615_E4_GPIO_LED_LAN1_GREEN 13
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#define DIR_615_E4_GPIO_LED_LAN2_GREEN 14
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#define DIR_615_E4_GPIO_LED_LAN3_GREEN 15
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#define DIR_615_E4_GPIO_LED_LAN4_GREEN 16
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#define DIR_615_E4_GPIO_BTN_RESET 8
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#define DIR_615_E4_GPIO_BTN_WPS 12
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#define DIR_615_E4_KEYS_POLL_INTERVAL 20
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#define DIR_615_E4_KEYS_DEBOUNCE_INTERVAL (3 * DIR_615_E4_KEYS_POLL_INTERVAL)
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#define DIR_615_E4_NVRAM_ADDR 0x1f030000
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#define DIR_615_E4_NVRAM_SIZE 0x10000
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#ifdef CONFIG_MTD_PARTITIONS
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static struct mtd_partition dir_615_e4_partitions[] = {
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{
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.name = "u-boot",
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.offset = 0,
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.size = 0x030000,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "nvram",
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.offset = 0x030000,
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.size = 0x010000,
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}, {
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.name = "kernel",
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.offset = 0x040000,
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.size = 0x0e0000,
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}, {
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.name = "rootfs",
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.offset = 0x120000,
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.size = 0x2c0000,
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}, {
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.name = "mac",
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.offset = 0x3e0000,
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.size = 0x010000,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "art",
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.offset = 0x3f0000,
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.size = 0x010000,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "firmware",
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.offset = 0x040000,
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.size = 0x3a0000,
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}
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};
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#endif /* CONFIG_MTD_PARTITIONS */
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static struct flash_platform_data dir_615_e4_flash_data = {
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#ifdef CONFIG_MTD_PARTITIONS
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.parts = dir_615_e4_partitions,
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.nr_parts = ARRAY_SIZE(dir_615_e4_partitions),
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#endif
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};
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static struct gpio_led dir_615_e4_leds_gpio[] __initdata = {
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{
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.name = "d-link:green:power",
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.gpio = DIR_615_E4_GPIO_LED_POWER_GREEN,
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}, {
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.name = "d-link:amber:power",
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.gpio = DIR_615_E4_GPIO_LED_POWER_AMBER,
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}, {
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.name = "d-link:green:wan",
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.gpio = DIR_615_E4_GPIO_LED_WAN_GREEN,
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.active_low = 1,
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}, {
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.name = "d-link:amber:wan",
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.gpio = DIR_615_E4_GPIO_LED_WAN_AMBER,
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}, {
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.name = "d-link:green:lan1",
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.gpio = DIR_615_E4_GPIO_LED_LAN1_GREEN,
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.active_low = 1,
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}, {
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.name = "d-link:green:lan2",
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.gpio = DIR_615_E4_GPIO_LED_LAN2_GREEN,
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.active_low = 1,
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}, {
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.name = "d-link:green:lan3",
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.gpio = DIR_615_E4_GPIO_LED_LAN3_GREEN,
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.active_low = 1,
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}, {
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.name = "d-link:green:lan4",
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.gpio = DIR_615_E4_GPIO_LED_LAN4_GREEN,
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.active_low = 1,
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}, {
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.name = "d-link:blue:wps",
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.gpio = DIR_615_E4_GPIO_LED_WPS,
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.active_low = 1,
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}
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};
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static struct gpio_keys_button dir_615_e4_gpio_keys[] __initdata = {
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{
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.desc = "reset",
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.type = EV_KEY,
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.code = KEY_RESTART,
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.debounce_interval = DIR_615_E4_KEYS_DEBOUNCE_INTERVAL,
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.gpio = DIR_615_E4_GPIO_BTN_RESET,
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.active_low = 1,
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}, {
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.desc = "wps",
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.type = EV_KEY,
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.code = KEY_WPS_BUTTON,
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.debounce_interval = DIR_615_E4_KEYS_DEBOUNCE_INTERVAL,
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.gpio = DIR_615_E4_GPIO_BTN_WPS,
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.active_low = 1,
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}
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};
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static void __init dir_615_e4_setup(void)
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{
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const char *nvram = (char *) KSEG1ADDR(DIR_615_E4_NVRAM_ADDR);
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u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
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u8 mac_buff[6];
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u8 *mac = NULL;
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if (nvram_parse_mac_addr(nvram, DIR_615_E4_NVRAM_SIZE,
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"lan_mac=", mac_buff) == 0) {
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ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac_buff, 0);
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ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac_buff, 1);
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mac = mac_buff;
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}
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ar71xx_add_device_m25p80(&dir_615_e4_flash_data);
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ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(dir_615_e4_leds_gpio),
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dir_615_e4_leds_gpio);
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ar71xx_register_gpio_keys_polled(-1, DIR_615_E4_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(dir_615_e4_gpio_keys),
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dir_615_e4_gpio_keys);
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ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0);
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ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 1);
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ar71xx_add_device_mdio(0, 0x0);
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/* LAN ports */
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ar71xx_add_device_eth(1);
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/* WAN port */
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ar71xx_add_device_eth(0);
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ap91_pci_setup_wmac_led_pin(1);
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ap91_pci_init(ee, mac);
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}
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MIPS_MACHINE(AR71XX_MACH_DIR_615_E4, "DIR-615-E4", "D-Link DIR-615 rev. E4",
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dir_615_e4_setup);
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@ -2,6 +2,7 @@
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* D-Link DIR-600 rev. A1 board support
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*
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* Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2012 Vadim Girlin <vadimgirlin@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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@ -182,3 +183,12 @@ static void __init dir_600_a1_setup(void)
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MIPS_MACHINE(ATH79_MACH_DIR_600_A1, "DIR-600-A1", "D-Link DIR-600 rev. A1",
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dir_600_a1_setup);
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static void __init dir_615_e4_setup(void)
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{
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dir_600_a1_setup();
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ap9x_pci_setup_wmac_led_pin(0, 1);
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}
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MIPS_MACHINE(ATH79_MACH_DIR_615_E4, "DIR-615-E4", "D-Link DIR-615 rev. E4",
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dir_615_e4_setup);
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@ -1,179 +0,0 @@
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/*
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* D-Link DIR-615 rev. E4 board support
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*
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* Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2012 Vadim Girlin <vadimgirlin@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <asm/mach-ath79/ath79.h>
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#include "dev-ap9x-pci.h"
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#include "dev-eth.h"
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#include "dev-gpio-buttons.h"
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#include "dev-leds-gpio.h"
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#include "dev-m25p80.h"
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#include "machtypes.h"
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#include "nvram.h"
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#define DIR_615_E4_GPIO_LED_WPS 0
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#define DIR_615_E4_GPIO_LED_POWER_AMBER 1
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#define DIR_615_E4_GPIO_LED_POWER_GREEN 6
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#define DIR_615_E4_GPIO_LED_WAN_AMBER 7
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#define DIR_615_E4_GPIO_LED_WAN_GREEN 17
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#define DIR_615_E4_GPIO_LED_LAN1_GREEN 13
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#define DIR_615_E4_GPIO_LED_LAN2_GREEN 14
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#define DIR_615_E4_GPIO_LED_LAN3_GREEN 15
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#define DIR_615_E4_GPIO_LED_LAN4_GREEN 16
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#define DIR_615_E4_GPIO_BTN_RESET 8
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#define DIR_615_E4_GPIO_BTN_WPS 12
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#define DIR_615_E4_KEYS_POLL_INTERVAL 20
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#define DIR_615_E4_KEYS_DEBOUNCE_INTERVAL (3 * DIR_615_E4_KEYS_POLL_INTERVAL)
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#define DIR_615_E4_NVRAM_ADDR 0x1f030000
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#define DIR_615_E4_NVRAM_SIZE 0x10000
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static struct mtd_partition dir_615_e4_partitions[] = {
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{
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.name = "u-boot",
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.offset = 0,
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.size = 0x030000,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "nvram",
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.offset = 0x030000,
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.size = 0x010000,
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}, {
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.name = "kernel",
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.offset = 0x040000,
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.size = 0x0e0000,
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}, {
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.name = "rootfs",
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.offset = 0x120000,
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.size = 0x2c0000,
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}, {
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.name = "mac",
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.offset = 0x3e0000,
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.size = 0x010000,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "art",
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.offset = 0x3f0000,
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.size = 0x010000,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "firmware",
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.offset = 0x040000,
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.size = 0x3a0000,
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}
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};
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static struct flash_platform_data dir_615_e4_flash_data = {
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.parts = dir_615_e4_partitions,
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.nr_parts = ARRAY_SIZE(dir_615_e4_partitions),
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};
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static struct gpio_led dir_615_e4_leds_gpio[] __initdata = {
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{
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.name = "d-link:green:power",
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.gpio = DIR_615_E4_GPIO_LED_POWER_GREEN,
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}, {
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.name = "d-link:amber:power",
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.gpio = DIR_615_E4_GPIO_LED_POWER_AMBER,
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}, {
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.name = "d-link:green:wan",
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.gpio = DIR_615_E4_GPIO_LED_WAN_GREEN,
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.active_low = 1,
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}, {
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.name = "d-link:amber:wan",
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.gpio = DIR_615_E4_GPIO_LED_WAN_AMBER,
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}, {
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.name = "d-link:green:lan1",
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.gpio = DIR_615_E4_GPIO_LED_LAN1_GREEN,
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.active_low = 1,
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}, {
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.name = "d-link:green:lan2",
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.gpio = DIR_615_E4_GPIO_LED_LAN2_GREEN,
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.active_low = 1,
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}, {
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.name = "d-link:green:lan3",
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.gpio = DIR_615_E4_GPIO_LED_LAN3_GREEN,
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.active_low = 1,
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}, {
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.name = "d-link:green:lan4",
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.gpio = DIR_615_E4_GPIO_LED_LAN4_GREEN,
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.active_low = 1,
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}, {
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.name = "d-link:blue:wps",
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.gpio = DIR_615_E4_GPIO_LED_WPS,
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.active_low = 1,
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}
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};
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static struct gpio_keys_button dir_615_e4_gpio_keys[] __initdata = {
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{
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.desc = "reset",
|
||||
.type = EV_KEY,
|
||||
.code = KEY_RESTART,
|
||||
.debounce_interval = DIR_615_E4_KEYS_DEBOUNCE_INTERVAL,
|
||||
.gpio = DIR_615_E4_GPIO_BTN_RESET,
|
||||
.active_low = 1,
|
||||
}, {
|
||||
.desc = "wps",
|
||||
.type = EV_KEY,
|
||||
.code = KEY_WPS_BUTTON,
|
||||
.debounce_interval = DIR_615_E4_KEYS_DEBOUNCE_INTERVAL,
|
||||
.gpio = DIR_615_E4_GPIO_BTN_WPS,
|
||||
.active_low = 1,
|
||||
}
|
||||
};
|
||||
|
||||
static void __init dir_615_e4_setup(void)
|
||||
{
|
||||
const char *nvram = (char *) KSEG1ADDR(DIR_615_E4_NVRAM_ADDR);
|
||||
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
|
||||
u8 mac_buff[6];
|
||||
u8 *mac = NULL;
|
||||
|
||||
if (ath79_nvram_parse_mac_addr(nvram, DIR_615_E4_NVRAM_SIZE,
|
||||
"lan_mac=", mac_buff) == 0) {
|
||||
ath79_init_mac(ath79_eth0_data.mac_addr, mac_buff, 0);
|
||||
ath79_init_mac(ath79_eth1_data.mac_addr, mac_buff, 1);
|
||||
mac = mac_buff;
|
||||
}
|
||||
|
||||
ath79_register_m25p80(&dir_615_e4_flash_data);
|
||||
|
||||
ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_615_e4_leds_gpio),
|
||||
dir_615_e4_leds_gpio);
|
||||
|
||||
ath79_register_gpio_keys_polled(-1, DIR_615_E4_KEYS_POLL_INTERVAL,
|
||||
ARRAY_SIZE(dir_615_e4_gpio_keys),
|
||||
dir_615_e4_gpio_keys);
|
||||
|
||||
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
|
||||
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1);
|
||||
|
||||
ath79_register_mdio(0, 0x0);
|
||||
|
||||
/* LAN ports */
|
||||
ath79_register_eth(1);
|
||||
|
||||
/* WAN port */
|
||||
ath79_register_eth(0);
|
||||
|
||||
ap9x_pci_setup_wmac_led_pin(0, 1);
|
||||
ap91_pci_init(ee, mac);
|
||||
}
|
||||
|
||||
MIPS_MACHINE(ATH79_MACH_DIR_615_E4, "DIR-615-E4", "D-Link DIR-615 rev. E4",
|
||||
dir_615_e4_setup);
|
@ -188,7 +188,7 @@
|
||||
config ATH79_MACH_PB44
|
||||
bool "Atheros PB44 reference board"
|
||||
select SOC_AR71XX
|
||||
@@ -54,6 +137,379 @@ config ATH79_MACH_PB44
|
||||
@@ -54,6 +137,369 @@ config ATH79_MACH_PB44
|
||||
Say 'Y' here if you want your kernel to support the
|
||||
Atheros PB44 reference board.
|
||||
|
||||
@ -278,7 +278,7 @@
|
||||
+ select MYLOADER
|
||||
+
|
||||
+config ATH79_MACH_DIR_600_A1
|
||||
+ bool "D-Link DIR-600 rev. A1 support"
|
||||
+ bool "D-Link DIR-600 A1/DIR-615 E4 support"
|
||||
+ select SOC_AR724X
|
||||
+ select ATH79_DEV_AP9X_PCI if PCI
|
||||
+ select ATH79_DEV_ETH
|
||||
@ -297,16 +297,6 @@
|
||||
+ select ATH79_DEV_WMAC
|
||||
+ select ATH79_NVRAM
|
||||
+
|
||||
+config ATH79_MACH_DIR_615_E4
|
||||
+ bool "D-Link DIR-615 rev. E4 support"
|
||||
+ select SOC_AR724X
|
||||
+ select ATH79_DEV_AP9X_PCI if PCI
|
||||
+ select ATH79_DEV_ETH
|
||||
+ select ATH79_DEV_GPIO_BUTTONS
|
||||
+ select ATH79_DEV_LEDS_GPIO
|
||||
+ select ATH79_DEV_M25P80
|
||||
+ select ATH79_NVRAM
|
||||
+
|
||||
+config ATH79_MACH_DIR_825_B1
|
||||
+ bool "D-Link DIR-825 rev. B1 board support"
|
||||
+ select SOC_AR71XX
|
||||
@ -630,7 +620,7 @@
|
||||
endif
|
||||
--- a/arch/mips/ath79/Makefile
|
||||
+++ b/arch/mips/ath79/Makefile
|
||||
@@ -36,8 +36,57 @@ obj-$(CONFIG_ATH79_PCI_ATH9K_FIXUP) += p
|
||||
@@ -36,8 +36,56 @@ obj-$(CONFIG_ATH79_PCI_ATH9K_FIXUP) += p
|
||||
#
|
||||
# Machines
|
||||
#
|
||||
@ -646,7 +636,6 @@
|
||||
obj-$(CONFIG_ATH79_MACH_DB120) += mach-db120.o
|
||||
+obj-$(CONFIG_ATH79_MACH_DIR_600_A1) += mach-dir-600-a1.o
|
||||
+obj-$(CONFIG_ATH79_MACH_DIR_615_C1) += mach-dir-615-c1.o
|
||||
+obj-$(CONFIG_ATH79_MACH_DIR_615_E4) += mach-dir-615-e4.o
|
||||
+obj-$(CONFIG_ATH79_MACH_DIR_825_B1) += mach-dir-825-b1.o
|
||||
+obj-$(CONFIG_ATH79_MACH_EAP7660D) += mach-eap7660d.o
|
||||
+obj-$(CONFIG_ATH79_MACH_JA76PF) += mach-ja76pf.o
|
||||
|
Loading…
Reference in New Issue
Block a user