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Code Activity

AR7: Cleanups (closes: #2323)

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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@8756 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
matteo
2007-09-11 21:19:57 +00:00
parent 02c9cd2369
commit 6485c8ba0a
20 changed files with 439 additions and 475 deletions
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145
target/linux/ar7/files/arch/mips/ar7/clock.c
View File

@@ -1,18 +1,16 @@
/*
* $Id$
*
* Copyright (C) 2007 OpenWrt.org
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
@@ -96,7 +94,7 @@ int ar7_cpu_clock = 150000000;
EXPORT_SYMBOL(ar7_cpu_clock);
int ar7_bus_clock = 125000000;
EXPORT_SYMBOL(ar7_bus_clock);
int ar7_dsp_clock = 0;
int ar7_dsp_clock;
EXPORT_SYMBOL(ar7_dsp_clock);
static int gcd(int a, int b)
@@ -212,7 +210,7 @@ static int tnetd7300_get_clock(u32 shift, struct tnetd7300_clock *clock,
return (base_clock >> (mul / 16 + 1)) / divisor;
if ((pll & (PLL_NDIV | PLL_DIV)) == (PLL_NDIV | PLL_DIV)) {
product = (mul & 1) ?
product = (mul & 1) ?
(base_clock * mul) >> 1 :
(base_clock * (mul - 1)) >> 2;
return product / divisor;
@@ -261,21 +259,24 @@ static void tnetd7300_set_clock(u32 shift, struct tnetd7300_clock *clock,
static void __init tnetd7300_init_clocks(void)
{
u32 *bootcr = (u32 *)ioremap_nocache(AR7_REGS_DCL, 4);
struct tnetd7300_clocks *clocks = (struct tnetd7300_clocks *)ioremap_nocache(AR7_REGS_POWER + 0x20, sizeof(struct tnetd7300_clocks));
struct tnetd7300_clocks *clocks =
(struct tnetd7300_clocks *)
ioremap_nocache(AR7_REGS_POWER + 0x20,
sizeof(struct tnetd7300_clocks));
ar7_bus_clock = tnetd7300_get_clock(BUS_PLL_SOURCE_SHIFT,
ar7_bus_clock = tnetd7300_get_clock(BUS_PLL_SOURCE_SHIFT,
&clocks->bus, bootcr, AR7_AFE_CLOCK);
if (*bootcr & BOOT_PLL_ASYNC_MODE) {
ar7_cpu_clock = tnetd7300_get_clock(CPU_PLL_SOURCE_SHIFT,
ar7_cpu_clock = tnetd7300_get_clock(CPU_PLL_SOURCE_SHIFT,
&clocks->cpu, bootcr, AR7_AFE_CLOCK);
} else {
ar7_cpu_clock = ar7_bus_clock;
}
#if 0
/*
tnetd7300_set_clock(USB_PLL_SOURCE_SHIFT, &clocks->usb,
bootcr, 48000000);
#endif
*/
if (ar7_dsp_clock == 250000000)
tnetd7300_set_clock(DSP_PLL_SOURCE_SHIFT, &clocks->dsp,
bootcr, ar7_dsp_clock);
@@ -287,7 +288,7 @@ static void __init tnetd7300_init_clocks(void)
static int tnetd7200_get_clock(int base, struct tnetd7200_clock *clock,
u32 *bootcr, u32 bus_clock)
{
int divisor = ((clock->prediv & 0x1f) + 1) *
int divisor = ((clock->prediv & 0x1f) + 1) *
((clock->postdiv & 0x1f) + 1);
if (*bootcr & BOOT_PLL_BYPASS)
@@ -300,30 +301,32 @@ static int tnetd7200_get_clock(int base, struct tnetd7200_clock *clock,
static void tnetd7200_set_clock(int base, struct tnetd7200_clock *clock,
int prediv, int postdiv, int postdiv2, int mul, u32 frequency)
{
printk("Clocks: base = %d, frequency = %u, prediv = %d, postdiv = %d, postdiv2 = %d, mul = %d\n",
printk(KERN_INFO
"Clocks: base = %d, frequency = %u, prediv = %d, "
"postdiv = %d, postdiv2 = %d, mul = %d\n",
base, frequency, prediv, postdiv, postdiv2, mul);
clock->ctrl = 0;
clock->prediv = DIVISOR_ENABLE_MASK | ((prediv - 1) & 0x1F);
clock->mul = ((mul - 1) & 0xF);
for(mul = 0; mul < 2000; mul++) /* nop */;
for (mul = 0; mul < 2000; mul++) /* nop */;
while(clock->status & 0x1) /* nop */;
while (clock->status & 0x1) /* nop */;
clock->postdiv = DIVISOR_ENABLE_MASK | ((postdiv - 1) & 0x1F);
clock->cmden |= 1;
clock->cmd |= 1;
while(clock->status & 0x1) /* nop */;
while (clock->status & 0x1) /* nop */;
clock->postdiv2 = DIVISOR_ENABLE_MASK | ((postdiv2 - 1) & 0x1F);
clock->cmden |= 1;
clock->cmd |= 1;
while(clock->status & 0x1) /* nop */;
while (clock->status & 0x1) /* nop */;
clock->ctrl |= 1;
}
@@ -331,7 +334,7 @@ static void tnetd7200_set_clock(int base, struct tnetd7200_clock *clock,
static int tnetd7200_get_clock_base(int clock_id, u32 *bootcr)
{
if (*bootcr & BOOT_PLL_ASYNC_MODE) {
// Async
/* Async */
switch (clock_id) {
case TNETD7200_CLOCK_ID_DSP:
return AR7_REF_CLOCK;
@@ -339,9 +342,9 @@ static int tnetd7200_get_clock_base(int clock_id, u32 *bootcr)
return AR7_AFE_CLOCK;
}
} else {
// Sync
/* Sync */
if (*bootcr & BOOT_PLL_2TO1_MODE) {
// 2:1
/* 2:1 */
switch (clock_id) {
case TNETD7200_CLOCK_ID_DSP:
return AR7_REF_CLOCK;
@@ -349,7 +352,7 @@ static int tnetd7200_get_clock_base(int clock_id, u32 *bootcr)
return AR7_AFE_CLOCK;
}
} else {
// 1:1
/* 1:1 */
return AR7_REF_CLOCK;
}
}
@@ -359,7 +362,10 @@ static int tnetd7200_get_clock_base(int clock_id, u32 *bootcr)
static void __init tnetd7200_init_clocks(void)
{
u32 *bootcr = (u32 *)ioremap_nocache(AR7_REGS_DCL, 4);
struct tnetd7200_clocks *clocks = (struct tnetd7200_clocks *)ioremap_nocache(AR7_REGS_POWER + 0x80, sizeof(struct tnetd7200_clocks));
struct tnetd7200_clocks *clocks =
(struct tnetd7200_clocks *)
ioremap_nocache(AR7_REGS_POWER + 0x80,
sizeof(struct tnetd7200_clocks));
int cpu_base, cpu_mul, cpu_prediv, cpu_postdiv;
int dsp_base, dsp_mul, dsp_prediv, dsp_postdiv;
int usb_base, usb_mul, usb_prediv, usb_postdiv;
@@ -371,79 +377,94 @@ static void __init tnetd7200_init_clocks(void)
Clocks: Async mode
Clocks: Setting DSP clock
Clocks: prediv: 1, postdiv: 1, mul: 5
Clocks: base = 25000000, frequency = 125000000, prediv = 1, postdiv = 2, postdiv2 = 1, mul = 10
Clocks: base = 25000000, frequency = 125000000, prediv = 1,
postdiv = 2, postdiv2 = 1, mul = 10
Clocks: Setting CPU clock
Adjusted requested frequency 211000000 to 211968000
Clocks: prediv: 1, postdiv: 1, mul: 6
Clocks: base = 35328000, frequency = 211968000, prediv = 1, postdiv = 1, postdiv2 = -1, mul = 6
Clocks: base = 35328000, frequency = 211968000, prediv = 1,
postdiv = 1, postdiv2 = -1, mul = 6
Clocks: Setting USB clock
Adjusted requested frequency 48000000 to 48076920
Clocks: prediv: 13, postdiv: 1, mul: 5
Clocks: base = 125000000, frequency = 48000000, prediv = 13, postdiv = 1, postdiv2 = -1, mul = 5
Clocks: base = 125000000, frequency = 48000000, prediv = 13,
postdiv = 1, postdiv2 = -1, mul = 5
DSL didn't work if you didn't set the postdiv 2:1 postdiv2 combination, driver hung on startup.
Haven't tested this on a synchronous board, neither do i know what to do with ar7_dsp_clock
DSL didn't work if you didn't set the postdiv 2:1 postdiv2 combination,
driver hung on startup.
Haven't tested this on a synchronous board,
neither do i know what to do with ar7_dsp_clock
*/
cpu_base = tnetd7200_get_clock_base(TNETD7200_CLOCK_ID_CPU, bootcr);
dsp_base = tnetd7200_get_clock_base(TNETD7200_CLOCK_ID_DSP, bootcr);
if (*bootcr & BOOT_PLL_ASYNC_MODE) {
printk("Clocks: Async mode\n");
printk(KERN_INFO "Clocks: Async mode\n");
printk("Clocks: Setting DSP clock\n");
calculate(dsp_base, TNETD7200_DEF_DSP_CLK, &dsp_prediv, &dsp_postdiv, &dsp_mul);
ar7_bus_clock = ((dsp_base / dsp_prediv) * dsp_mul) / dsp_postdiv;
tnetd7200_set_clock(dsp_base, &clocks->dsp,
dsp_prediv, dsp_postdiv * 2, dsp_postdiv, dsp_mul * 2,
printk(KERN_INFO "Clocks: Setting DSP clock\n");
calculate(dsp_base, TNETD7200_DEF_DSP_CLK,
&dsp_prediv, &dsp_postdiv, &dsp_mul);
ar7_bus_clock =
((dsp_base / dsp_prediv) * dsp_mul) / dsp_postdiv;
tnetd7200_set_clock(dsp_base, &clocks->dsp,
dsp_prediv, dsp_postdiv * 2, dsp_postdiv, dsp_mul * 2,
ar7_bus_clock);
printk("Clocks: Setting CPU clock\n");
calculate(cpu_base, TNETD7200_DEF_CPU_CLK, &cpu_prediv, &cpu_postdiv, &cpu_mul);
ar7_cpu_clock = ((cpu_base / cpu_prediv) * cpu_mul) / cpu_postdiv;
tnetd7200_set_clock(cpu_base, &clocks->cpu,
cpu_prediv, cpu_postdiv, -1, cpu_mul,
printk(KERN_INFO "Clocks: Setting CPU clock\n");
calculate(cpu_base, TNETD7200_DEF_CPU_CLK, &cpu_prediv,
&cpu_postdiv, &cpu_mul);
ar7_cpu_clock =
((cpu_base / cpu_prediv) * cpu_mul) / cpu_postdiv;
tnetd7200_set_clock(cpu_base, &clocks->cpu,
cpu_prediv, cpu_postdiv, -1, cpu_mul,
ar7_cpu_clock);
} else {
if (*bootcr & BOOT_PLL_2TO1_MODE) {
printk("Clocks: Sync 2:1 mode\n");
printk(KERN_INFO "Clocks: Sync 2:1 mode\n");
printk("Clocks: Setting CPU clock\n");
calculate(cpu_base, TNETD7200_DEF_CPU_CLK, &cpu_prediv, &cpu_postdiv, &cpu_mul);
ar7_cpu_clock = ((cpu_base / cpu_prediv) * cpu_mul) / cpu_postdiv;
tnetd7200_set_clock(cpu_base, &clocks->cpu,
cpu_prediv, cpu_postdiv, -1, cpu_mul,
printk(KERN_INFO "Clocks: Setting CPU clock\n");
calculate(cpu_base, TNETD7200_DEF_CPU_CLK, &cpu_prediv,
&cpu_postdiv, &cpu_mul);
ar7_cpu_clock = ((cpu_base / cpu_prediv) * cpu_mul)
/ cpu_postdiv;
tnetd7200_set_clock(cpu_base, &clocks->cpu,
cpu_prediv, cpu_postdiv, -1, cpu_mul,
ar7_cpu_clock);
printk("Clocks: Setting DSP clock\n");
calculate(dsp_base, TNETD7200_DEF_DSP_CLK, &dsp_prediv, &dsp_postdiv, &dsp_mul);
printk(KERN_INFO "Clocks: Setting DSP clock\n");
calculate(dsp_base, TNETD7200_DEF_DSP_CLK, &dsp_prediv,
&dsp_postdiv, &dsp_mul);
ar7_bus_clock = ar7_cpu_clock / 2;
tnetd7200_set_clock(dsp_base, &clocks->dsp,
dsp_prediv, dsp_postdiv * 2, dsp_postdiv, dsp_mul * 2,
ar7_bus_clock);
tnetd7200_set_clock(dsp_base, &clocks->dsp,
dsp_prediv, dsp_postdiv * 2, dsp_postdiv,
dsp_mul * 2, ar7_bus_clock);
} else {
printk("Clocks: Sync 1:1 mode\n");
printk(KERN_INFO "Clocks: Sync 1:1 mode\n");
printk("Clocks: Setting DSP clock\n");
calculate(dsp_base, TNETD7200_DEF_CPU_CLK, &dsp_prediv, &dsp_postdiv, &dsp_mul);
ar7_bus_clock = ((dsp_base / dsp_prediv) * dsp_mul) / dsp_postdiv;
tnetd7200_set_clock(dsp_base, &clocks->dsp,
dsp_prediv, dsp_postdiv * 2, dsp_postdiv, dsp_mul * 2,
ar7_bus_clock);
printk(KERN_INFO "Clocks: Setting DSP clock\n");
calculate(dsp_base, TNETD7200_DEF_CPU_CLK, &dsp_prediv,
&dsp_postdiv, &dsp_mul);
ar7_bus_clock = ((dsp_base / dsp_prediv) * dsp_mul)
/ dsp_postdiv;
tnetd7200_set_clock(dsp_base, &clocks->dsp,
dsp_prediv, dsp_postdiv * 2, dsp_postdiv,
dsp_mul * 2, ar7_bus_clock);
ar7_cpu_clock = ar7_bus_clock;
}
}
printk("Clocks: Setting USB clock\n");
printk(KERN_INFO "Clocks: Setting USB clock\n");
usb_base = ar7_bus_clock;
calculate(usb_base, TNETD7200_DEF_USB_CLK, &usb_prediv, &usb_postdiv, &usb_mul);
tnetd7200_set_clock(usb_base, &clocks->usb,
usb_prediv, usb_postdiv, -1, usb_mul,
calculate(usb_base, TNETD7200_DEF_USB_CLK, &usb_prediv,
&usb_postdiv, &usb_mul);
tnetd7200_set_clock(usb_base, &clocks->usb,
usb_prediv, usb_postdiv, -1, usb_mul,
TNETD7200_DEF_USB_CLK);
#warning FIXME: ????! Hrmm
#warning FIXME
ar7_dsp_clock = ar7_cpu_clock;
iounmap(clocks);

2
target/linux/ar7/files/arch/mips/ar7/gpio.c
View File

@@ -1,6 +1,4 @@
/*
* $Id$
*
* Copyright (C) 2007 OpenWrt.org
*
* This program is free software; you can redistribute it and/or modify

35
target/linux/ar7/files/arch/mips/ar7/irq.c
View File

@@ -1,6 +1,4 @@
/*
* $Id$
*
* Copyright (C) 2006, 2007 OpenWrt.org
*
* This program is free software; you can redistribute it and/or modify
@@ -25,23 +23,23 @@
#include <asm/mipsregs.h>
#include <asm/ar7/ar7.h>
#define EXCEPT_OFFSET 0x80
#define PACE_OFFSET 0xA0
#define CHNLS_OFFSET 0x200
#define EXCEPT_OFFSET 0x80
#define PACE_OFFSET 0xA0
#define CHNLS_OFFSET 0x200
#define REG_OFFSET(irq, reg) ((irq) / 32 * 0x4 + reg * 0x10)
#define SEC_REG_OFFSET(reg) (EXCEPT_OFFSET + reg * 0x8)
#define SEC_SR_OFFSET (SEC_REG_OFFSET(0)) /* 0x80 */
#define CR_OFFSET(irq) (REG_OFFSET(irq, 1)) /* 0x10 */
#define SEC_CR_OFFSET (SEC_REG_OFFSET(1)) /* 0x88 */
#define ESR_OFFSET(irq) (REG_OFFSET(irq, 2)) /* 0x20 */
#define SEC_ESR_OFFSET (SEC_REG_OFFSET(2)) /* 0x90 */
#define ECR_OFFSET(irq) (REG_OFFSET(irq, 3)) /* 0x30 */
#define SEC_ECR_OFFSET (SEC_REG_OFFSET(3)) /* 0x98 */
#define PIR_OFFSET (0x40)
#define MSR_OFFSET (0x44)
#define PM_OFFSET(irq) (REG_OFFSET(irq, 5)) /* 0x50 */
#define TM_OFFSET(irq) (REG_OFFSET(irq, 6)) /* 0x60 */
#define REG_OFFSET(irq, reg) ((irq) / 32 * 0x4 + reg * 0x10)
#define SEC_REG_OFFSET(reg) (EXCEPT_OFFSET + reg * 0x8)
#define SEC_SR_OFFSET (SEC_REG_OFFSET(0)) /* 0x80 */
#define CR_OFFSET(irq) (REG_OFFSET(irq, 1)) /* 0x10 */
#define SEC_CR_OFFSET (SEC_REG_OFFSET(1)) /* 0x88 */
#define ESR_OFFSET(irq) (REG_OFFSET(irq, 2)) /* 0x20 */
#define SEC_ESR_OFFSET (SEC_REG_OFFSET(2)) /* 0x90 */
#define ECR_OFFSET(irq) (REG_OFFSET(irq, 3)) /* 0x30 */
#define SEC_ECR_OFFSET (SEC_REG_OFFSET(3)) /* 0x98 */
#define PIR_OFFSET (0x40)
#define MSR_OFFSET (0x44)
#define PM_OFFSET(irq) (REG_OFFSET(irq, 5)) /* 0x50 */
#define TM_OFFSET(irq) (REG_OFFSET(irq, 6)) /* 0x60 */
#define REG(addr) ((u32 *)(KSEG1ADDR(AR7_REGS_IRQ) + addr))
@@ -73,6 +71,7 @@ static struct irq_chip ar7_sec_irq_type = {
static struct irqaction ar7_cascade_action = {
.handler = no_action,
.name = "AR7 cascade interrupt"
};

10
target/linux/ar7/files/arch/mips/ar7/memory.c
View File

@@ -1,24 +1,22 @@
/*
* $Id$
*
* Copyright (C) 2007 OpenWrt.org
*
*
* Based on arch/mips/mm/init.c
* Copyright (C) 1994 - 2000 Ralf Baechle
* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
* Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
* Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA

30
target/linux/ar7/files/arch/mips/ar7/platform.c
View File

@@ -1,18 +1,16 @@
/*
* $Id$
*
* Copyright (C) 2006, 2007 OpenWrt.org
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
@@ -28,8 +26,9 @@
#include <linux/serial.h>
#include <linux/serial_8250.h>
#include <linux/ioport.h>
#include <linux/io.h>
#include <asm/addrspace.h>
#include <asm/io.h>
#include <asm/ar7/ar7.h>
#include <asm/ar7/gpio.h>
#include <asm/ar7/prom.h>
@@ -91,7 +90,7 @@ static struct resource physmap_flash_resource = {
.flags = IORESOURCE_MEM,
.start = 0x10000000,
.end = 0x107fffff,
};
};
static struct resource cpmac_low_res[] = {
{
@@ -253,8 +252,7 @@ static struct platform_device vlynq_high = {
*/
#if !defined(CONFIG_SERIAL_8250)
static struct plat_serial8250_port uart0_data =
{
static struct plat_serial8250_port uart0_data = {
.mapbase = AR7_REGS_UART0,
.irq = AR7_IRQ_UART0,
.regshift = 2,
@@ -262,8 +260,7 @@ static struct plat_serial8250_port uart0_data =
.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
};
static struct plat_serial8250_port uart1_data =
{
static struct plat_serial8250_port uart1_data = {
.mapbase = UR8_REGS_UART1,
.irq = AR7_IRQ_UART1,
.regshift = 2,
@@ -346,7 +343,7 @@ static int __init ar7_register_devices(void)
return res;
// Only TNETD73xx have a second serial port
/* Only TNETD73xx have a second serial port */
if (ar7_has_second_uart()) {
uart_port[1].type = PORT_AR7;
uart_port[1].line = 1;
@@ -361,21 +358,20 @@ static int __init ar7_register_devices(void)
return res;
}
#else // !CONFIG_SERIAL_8250
#else /* !CONFIG_SERIAL_8250 */
uart_data[0].uartclk = ar7_bus_freq() / 2;
uart_data[1].uartclk = uart_data[0].uartclk;
// Only TNETD73xx have a second serial port
if (ar7_has_second_uart()) {
/* Only TNETD73xx have a second serial port */
if (ar7_has_second_uart())
uart.dev.platform_data = uart_data;
}
res = platform_device_register(&uart);
if (res)
return res;
#endif // CONFIG_SERIAL_8250
#endif /* CONFIG_SERIAL_8250 */
res = platform_device_register(&physmap_flash);
if (res)

52
target/linux/ar7/files/arch/mips/ar7/prom.c
View File

@@ -1,8 +1,6 @@
/*
* $Id$
*
* Copyright (C) 2006, 2007 OpenWrt.org
*
*
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
*
@@ -27,9 +25,8 @@
#include <linux/spinlock.h>
#include <linux/module.h>
#include <linux/string.h>
#include <asm/io.h>
#include <linux/io.h>
#include <asm/bootinfo.h>
#include <asm/mips-boards/prom.h>
#include <asm/gdb-stub.h>
#include <asm/ar7/ar7.h>
@@ -44,7 +41,7 @@ struct env_var {
static struct env_var adam2_env[MAX_ENTRY] = { { 0, }, };
char * prom_getenv(char *name)
char *prom_getenv(char *name)
{
int i;
for (i = 0; (i < MAX_ENTRY) && adam2_env[i].name; i++)
@@ -53,6 +50,7 @@ char * prom_getenv(char *name)
return NULL;
}
EXPORT_SYMBOL(prom_getenv);
char * __init prom_getcmdline(void)
{
@@ -67,8 +65,8 @@ static void __init ar7_init_cmdline(int argc, char *argv[])
actr = 1; /* Always ignore argv[0] */
cp = &(arcs_cmdline[0]);
while(actr < argc) {
strcpy(cp, argv[actr]);
while (actr < argc) {
strcpy(cp, argv[actr]);
cp += strlen(argv[actr]);
*cp++ = ' ';
actr++;
@@ -119,23 +117,23 @@ static struct psp_var_map_entry psp_var_map[] = {
Well-known variable (num is looked up in table above for matching variable name)
Example: cpufrequency=211968000
+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
| 01 |CTRL|CHECKSUM | 01 | _2 | _1 | _1 | _9 | _6 | _8 | _0 | _0 | _0 | \0 | FF |
+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+---
| 01 |CTRL|CHECKSUM | 01 | _2 | _1 | _1 | _9 | _6 | _8 | _0 | _0 | _0 | \0 | FF
+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+---
Name=Value pair in a single chunk
Example: NAME=VALUE
+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
| 00 |CTRL|CHECKSUM | 01 | _N | _A | _M | _E | _0 | _V | _A | _L | _U | _E | \0 |
+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+---
| 00 |CTRL|CHECKSUM | 01 | _N | _A | _M | _E | _0 | _V | _A | _L | _U | _E | \0
+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+---
Name=Value pair in 2 chunks (len is the number of chunks)
Example: bootloaderVersion=1.3.7.15
+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
| 00 |CTRL|CHECKSUM | 02 | _b | _o | _o | _t | _l | _o | _a | _d | _e | _r | _V |
+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
| _e | _r | _s | _i | _o | _n | \0 | _1 | _. | _3 | _. | _7 | _. | _1 | _5 | \0 |
+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+---
| 00 |CTRL|CHECKSUM | 02 | _b | _o | _o | _t | _l | _o | _a | _d | _e | _r | _V
+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+---
| _e | _r | _s | _i | _o | _n | \0 | _1 | _. | _3 | _. | _7 | _. | _1 | _5 | \0
+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+---
Data is padded with 0xFF
@@ -152,7 +150,7 @@ static char * __init lookup_psp_var_map(u8 num)
for (i = 0; i < sizeof(psp_var_map); i++)
if (psp_var_map[i].num == num)
return psp_var_map[i].value;
return NULL;
}
@@ -204,7 +202,7 @@ static void __init ar7_init_env(struct env_var *env)
struct psbl_rec *psbl = (struct psbl_rec *)(KSEG1ADDR(0x14000300));
void *psp_env = (void *)KSEG1ADDR(psbl->env_base);
if(strcmp(psp_env, psp_env_version) == 0) {
if (strcmp(psp_env, psp_env_version) == 0) {
parse_psp_env(psp_env);
} else {
for (i = 0; i < MAX_ENTRY; i++, env++)
@@ -289,20 +287,20 @@ int prom_putchar(char c)
return 1;
}
// from adm5120/prom.c
/* from adm5120/prom.c */
void prom_printf(char *fmt, ...)
{
va_list args;
int l;
char *p, *buf_end;
char buf[1024];
va_start(args, fmt);
l = vsprintf(buf, fmt, args); /* hopefully i < sizeof(buf) */
va_end(args);
buf_end = buf + l;
for (p = buf; p < buf_end; p++) {
/* Crude cr/nl handling is better than none */
if (*p == '\n')
@@ -319,8 +317,6 @@ int putDebugChar(char c)
char getDebugChar(void)
{
return prom_getchar();
return prom_getchar();
}
#endif
EXPORT_SYMBOL(prom_getenv);

5
target/linux/ar7/files/arch/mips/ar7/setup.c
View File

@@ -1,6 +1,4 @@
/*
* $Id$
*
* Copyright (C) 2006, 2007 OpenWrt.org
*
* Carsten Langgaard, carstenl@mips.com
@@ -102,7 +100,8 @@ void __init plat_mem_setup(void)
iomem_resource.start = 0;
iomem_resource.end = ~0;
printk("%s, ID: 0x%04x, Revision: 0x%02x\n", get_system_type(),
printk(KERN_INFO "%s, ID: 0x%04x, Revision: 0x%02x\n",
get_system_type(),
ar7_chip_id(), ar7_chip_rev());
}

27
target/linux/ar7/files/arch/mips/ar7/time.c
View File

@@ -1,8 +1,6 @@
/*
* $Id$
*
* Copyright (C) 2006, 2007 OpenWrt.org
*
*
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
*
@@ -22,30 +20,7 @@
* Setting up the clock on the MIPS boards.
*/
#include <linux/types.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
#include <linux/sched.h>
#include <linux/spinlock.h>
#include <linux/interrupt.h>
#include <linux/time.h>
#include <linux/timex.h>
#include <linux/mc146818rtc.h>
#include <asm/mipsregs.h>
#include <asm/ptrace.h>
#include <asm/hardirq.h>
#include <asm/irq.h>
#include <asm/div64.h>
#include <asm/cpu.h>
#include <asm/time.h>
#include <asm/mc146818-time.h>
#include <asm/msc01_ic.h>
#include <asm/mips-boards/generic.h>
#include <asm/mips-boards/prom.h>
#include <asm/mips-boards/maltaint.h>
#include <asm/mc146818-time.h>
#include <asm/ar7/ar7.h>
void __init ar7_time_init(void)

8
target/linux/ar7/files/arch/mips/ar7/vlynq-pci.c
View File

@@ -1,18 +1,16 @@
/*
* $Id$
*
* Copyright (C) 2006, 2007 OpenWrt.org
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA

49
target/linux/ar7/files/arch/mips/ar7/vlynq.c
View File

@@ -1,18 +1,16 @@
/*
* $Id$
*
* Copyright (C) 2006, 2007 OpenWrt.org
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
@@ -30,8 +28,9 @@
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/device.h>
#include <linux/io.h>
#include <asm/addrspace.h>
#include <asm/io.h>
#include <asm/ar7/ar7.h>
#include <asm/ar7/vlynq.h>
@@ -81,10 +80,13 @@ struct vlynq_regs {
static void vlynq_dump_regs(struct vlynq_device *dev)
{
int i;
printk("VLYNQ local=%p remote=%p\n", dev->local, dev->remote);
printk(KERN_DEBUG "VLYNQ local=%p remote=%p\n",
dev->local, dev->remote);
for (i = 0; i < 32; i++) {
printk("VLYNQ: local %d: %08x\n", i + 1, ((u32 *)dev->local)[i]);
printk("VLYNQ: remote %d: %08x\n", i + 1, ((u32 *)dev->remote)[i]);
printk(KERN_DEBUG "VLYNQ: local %d: %08x\n",
i + 1, ((u32 *)dev->local)[i]);
printk(KERN_DEBUG "VLYNQ: remote %d: %08x\n",
i + 1, ((u32 *)dev->remote)[i]);
}
}
@@ -92,10 +94,10 @@ static void vlynq_dump_mem(u32 *base, int count)
{
int i;
for (i = 0; i < (count + 3) / 4; i++) {
if (i % 4 == 0) printk("\nMEM[0x%04x]:", i * 4);
printk(" 0x%08x", *(base + i));
if (i % 4 == 0) printk(KERN_DEBUG "\nMEM[0x%04x]:", i * 4);
printk(KERN_DEBUG " 0x%08x", *(base + i));
}
printk("\n");
printk(KERN_DEBUG "\n");
}
#endif
@@ -212,8 +214,9 @@ static int vlynq_setup_irq(struct vlynq_device *dev)
int i;
if (dev->local_irq == dev->remote_irq) {
printk("%s: local vlynq irq should be different from remote\n",
dev->dev.bus_id);
printk(KERN_WARNING
"%s: local vlynq irq should be different from remote\n",
dev->dev.bus_id);
return -EINVAL;
}
@@ -239,7 +242,7 @@ static int vlynq_setup_irq(struct vlynq_device *dev)
}
if (request_irq(dev->irq, vlynq_irq, SA_SHIRQ, "vlynq", dev)) {
printk("%s: request_irq failed\n", dev->dev.bus_id);
printk(KERN_ERR "%s: request_irq failed\n", dev->dev.bus_id);
return -EAGAIN;
}
@@ -363,7 +366,7 @@ void vlynq_set_remote_mapping(struct vlynq_device *dev, u32 tx_offset,
int vlynq_virq_to_irq(struct vlynq_device *dev, int virq)
{
if ((virq < 0) || (virq >= PER_DEVICE_IRQS))
if ((virq < 0) || (virq >= PER_DEVICE_IRQS))
return -EINVAL;
if ((virq == dev->local_irq) || (virq == dev->remote_irq))
@@ -374,7 +377,7 @@ int vlynq_virq_to_irq(struct vlynq_device *dev, int virq)
int vlynq_irq_to_virq(struct vlynq_device *dev, int irq)
{
if ((irq < dev->irq_start) || (irq >= dev->irq_start + PER_DEVICE_IRQS))
if ((irq < dev->irq_start) || (irq >= dev->irq_start + PER_DEVICE_IRQS))
return -EINVAL;
return irq - dev->irq_start;
@@ -382,7 +385,7 @@ int vlynq_irq_to_virq(struct vlynq_device *dev, int irq)
int vlynq_set_local_irq(struct vlynq_device *dev, int virq)
{
if ((virq < 0) || (virq >= PER_DEVICE_IRQS))
if ((virq < 0) || (virq >= PER_DEVICE_IRQS))
return -EINVAL;
if (virq == dev->remote_irq)
@@ -395,7 +398,7 @@ int vlynq_set_local_irq(struct vlynq_device *dev, int virq)
int vlynq_set_remote_irq(struct vlynq_device *dev, int virq)
{
if ((virq < 0) || (virq >= PER_DEVICE_IRQS))
if ((virq < 0) || (virq >= PER_DEVICE_IRQS))
return -EINVAL;
if (virq == dev->local_irq)
@@ -450,14 +453,16 @@ static int vlynq_probe(struct platform_device *pdev)
len = regs_res->end - regs_res->start;
if (!request_mem_region(regs_res->start, len, dev->dev.bus_id)) {
printk("%s: Can't request vlynq registers\n", dev->dev.bus_id);
printk(KERN_ERR "%s: Can't request vlynq registers\n",
dev->dev.bus_id);
result = -ENXIO;
goto fail_request;
}
dev->local = ioremap_nocache(regs_res->start, len);
if (!dev->local) {
printk("%s: Can't remap vlynq registers\n", dev->dev.bus_id);
printk(KERN_ERR "%s: Can't remap vlynq registers\n",
dev->dev.bus_id);
result = -ENXIO;
goto fail_remap;
}
@@ -474,7 +479,7 @@ static int vlynq_probe(struct platform_device *pdev)
goto fail_register;
platform_set_drvdata(pdev, dev);
printk("%s: regs 0x%p, irq %d, mem 0x%p\n",
printk(KERN_INFO "%s: regs 0x%p, irq %d, mem 0x%p\n",
dev->dev.bus_id, (void *)dev->regs_start, dev->irq,
(void *)dev->mem_start);