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ramips: define GPIO chips separately for each SoCs

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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@26326 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
juhosg
2011-03-27 19:19:59 +00:00
parent 5045f0c4da
commit 6513a4df99
7 changed files with 152 additions and 84 deletions
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6
target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x/ralink_soc.h
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@@ -15,10 +15,4 @@
#define RALINK_SOC_MEM_SIZE_MIN (2 * 1024 * 1024)
#define RALINK_SOC_MEM_SIZE_MAX (128 * 1024 * 1024)
#define RALINK_SOC_GPIO_BASE 0x300600
#define RALINK_SOC_GPIO0_COUNT 24
#define RALINK_SOC_GPIO1_COUNT 16
#define RALINK_SOC_GPIO2_COUNT 32
#endif /* __RT288X_RALINK_SOC_H */

1
target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_regs.h
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@@ -37,6 +37,7 @@
#define RT2880_INTC_SIZE 0x100
#define RT2880_MEMC_SIZE 0x100
#define RT2880_UART0_SIZE 0x100
#define RT2880_PIO_SIZE 0x100
#define RT2880_UART1_SIZE 0x100
#define RT2880_FLASH1_SIZE (16 * 1024 * 1024)
#define RT2880_FLASH0_SIZE (4 * 1024 * 1024)

6
target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x/ralink_soc.h
View File

@@ -15,10 +15,4 @@
#define RALINK_SOC_MEM_SIZE_MIN (2 * 1024 * 1024)
#define RALINK_SOC_MEM_SIZE_MAX (64 * 1024 * 1024)
#define RALINK_SOC_GPIO_BASE 0x10000600
#define RALINK_SOC_GPIO0_COUNT 24
#define RALINK_SOC_GPIO1_COUNT 16
#define RALINK_SOC_GPIO2_COUNT 12
#endif /* __RT288X_RALINK_SOC_H */

2
target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h
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@@ -20,6 +20,7 @@
#define RT305X_MEMC_BASE 0x10000300
#define RT305X_PCM_BASE 0x10000400
#define RT305X_UART0_BASE 0x10000500
#define RT305X_PIO_BASE 0x10000600
#define RT305X_GDMA_BASE 0x10000700
#define RT305X_NANDC_BASE 0x10000800
#define RT305X_I2C_BASE 0x10000900
@@ -39,6 +40,7 @@
#define RT305X_INTC_SIZE 0x100
#define RT305X_MEMC_SIZE 0x100
#define RT305X_UART0_SIZE 0x100
#define RT305X_PIO_SIZE 0x100
#define RT305X_UART1_SIZE 0x100
#define RT305X_FLASH1_SIZE (16 * 1024 * 1024)
#define RT305X_FLASH0_SIZE (8 * 1024 * 1024)