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brcm43xx: update SSB driver

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* files/ now contains the wireless-dev tree version
 * patches/210-ssb_merge is nbd's subsequent changes

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@7691 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
noz
2007-06-21 20:10:50 +00:00
parent ebd093f2fa
commit 6546ee2d5f
19 changed files with 1841 additions and 335 deletions
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90
target/linux/brcm47xx-2.6/files/include/linux/ssb/ssb.h
View File

@@ -6,6 +6,9 @@
#include <linux/list.h>
#include <linux/types.h>
#include <linux/spinlock.h>
#ifdef CONFIG_SSB_PCIHOST
# include <linux/pci.h>
#endif
#include <linux/ssb/ssb_regs.h>
@@ -98,6 +101,17 @@ struct ssb_sprom {
};
struct ssb_device;
/* Lowlevel read/write operations on the device MMIO.
* Internal, don't use that outside of ssb. */
struct ssb_bus_ops {
u16 (*read16)(struct ssb_device *dev, u16 offset);
u32 (*read32)(struct ssb_device *dev, u16 offset);
void (*write16)(struct ssb_device *dev, u16 offset, u16 value);
void (*write32)(struct ssb_device *dev, u16 offset, u32 value);
};
/* Core-ID values. */
#define SSB_DEV_CHIPCOMMON 0x800
#define SSB_DEV_ILINE20 0x801
@@ -149,18 +163,37 @@ struct ssb_device_id {
#define SSB_ANY_ID 0xFFFF
#define SSB_ANY_REV 0xFF
/* Some kernel subsystems poke with dev->drvdata, so we must use the
* following ugly workaround to get from struct device to struct ssb_device */
struct __ssb_dev_wrapper {
struct device dev;
struct ssb_device *sdev;
};
struct ssb_device {
struct device dev;
/* Having a copy of the ops pointer in each dev struct
* is an optimization. */
const struct ssb_bus_ops *ops;
struct device *dev;
struct ssb_bus *bus;
struct ssb_device_id id;
u8 core_index;
unsigned int irq;
/* Internal-only stuff follows. */
void *drvdata; /* Per-device data */
void *devtypedata; /* Per-devicetype (eg 802.11) data */
};
#define dev_to_ssb_dev(_dev) container_of(_dev, struct ssb_device, dev)
/* Go from struct device to struct ssb_device. */
static inline
struct ssb_device * dev_to_ssb_dev(struct device *dev)
{
struct __ssb_dev_wrapper *wrap = container_of(dev, struct __ssb_dev_wrapper, dev);
return wrap->sdev;
}
/* Device specific user data */
static inline
@@ -182,13 +215,6 @@ void * ssb_get_devtypedata(struct ssb_device *dev)
return dev->devtypedata;
}
struct ssb_bus_ops {
u16 (*read16)(struct ssb_device *dev, u16 offset);
u32 (*read32)(struct ssb_device *dev, u16 offset);
void (*write16)(struct ssb_device *dev, u16 offset, u16 value);
void (*write32)(struct ssb_device *dev, u16 offset, u32 value);
};
struct ssb_driver {
const char *name;
@@ -218,7 +244,6 @@ enum ssb_bustype {
SSB_BUSTYPE_SSB, /* This SSB bus is the system bus */
SSB_BUSTYPE_PCI, /* SSB is connected to PCI bus */
SSB_BUSTYPE_PCMCIA, /* SSB is connected to PCMCIA bus */
//TODO SSB_BUSTYPE_JTAG,
};
/* board_vendor */
@@ -238,12 +263,6 @@ enum ssb_bustype {
#define SSB_CHIPPACK_BCM4712M 2 /* Medium 225pin 4712 */
#define SSB_CHIPPACK_BCM4712L 0 /* Large 340pin 4712 */
static inline u16 ssb_read16(struct ssb_device *dev, u16 offset);
static inline u32 ssb_read32(struct ssb_device *dev, u16 offset);
static inline void ssb_write16(struct ssb_device *dev, u16 offset, u16 value);
static inline void ssb_write32(struct ssb_device *dev, u16 offset, u32 value);
static inline u32 ssb_write32_masked(struct ssb_device *dev, u16 offset, u32 mask, u32 value);
#include <linux/ssb/ssb_driver_chipcommon.h>
#include <linux/ssb/ssb_driver_mips.h>
#include <linux/ssb/ssb_driver_extif.h>
@@ -269,6 +288,10 @@ struct ssb_bus {
/* Pointer to the PCMCIA device (only if bustype == SSB_BUSTYPE_PCMCIA). */
struct pcmcia_device *host_pcmcia;
#ifdef CONFIG_SSB_PCIHOST
struct mutex pci_sprom_mutex;
#endif
/* ID information about the PCB. */
u16 board_vendor;
u16 board_type;
@@ -328,32 +351,22 @@ void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags);
void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags);
/* Device MMIO register read/write functions. */
static inline u16 ssb_read16(struct ssb_device *dev, u16 offset)
{
return dev->bus->ops->read16(dev, offset);
return dev->ops->read16(dev, offset);
}
static inline u32 ssb_read32(struct ssb_device *dev, u16 offset)
{
return dev->bus->ops->read32(dev, offset);
return dev->ops->read32(dev, offset);
}
static inline void ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
{
dev->bus->ops->write16(dev, offset, value);
dev->ops->write16(dev, offset, value);
}
static inline void ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
{
dev->bus->ops->write32(dev, offset, value);
}
static inline u32 ssb_write32_masked(struct ssb_device *dev,
u16 offset,
u32 mask,
u32 value)
{
value &= mask;
value |= ssb_read32(dev, offset) & ~mask;
ssb_write32(dev, offset, value);
return value;
dev->ops->write32(dev, offset, value);
}
@@ -366,6 +379,21 @@ extern u32 ssb_dma_translation(struct ssb_device *dev);
extern int ssb_dma_set_mask(struct ssb_device *ssb_dev, u64 mask);
#ifdef CONFIG_SSB_PCIHOST
/* PCI-host wrapper driver */
extern int ssb_pcihost_register(struct pci_driver *driver);
static inline void ssb_pcihost_unregister(struct pci_driver *driver)
{
pci_unregister_driver(driver);
}
#endif /* CONFIG_SSB_PCIHOST */
/* Bus-Power handling functions. */
extern int ssb_bus_may_powerdown(struct ssb_bus *bus);
extern int ssb_bus_powerup(struct ssb_bus *bus, int dynamic_pctl);
/* Various helper functions */
extern u32 ssb_admatch_base(u32 adm);
extern u32 ssb_admatch_size(u32 adm);

47
target/linux/brcm47xx-2.6/files/include/linux/ssb/ssb_driver_chipcommon.h
View File

@@ -124,8 +124,8 @@
#define SSB_CHIPCO_GPIOOUT 0x0064
#define SSB_CHIPCO_GPIOOUTEN 0x0068
#define SSB_CHIPCO_GPIOCTL 0x006C
#define SSB_CHIPCO_GPIOINTPOL 0x0070
#define SSB_CHIPCO_GPIOINTMASK 0x0074
#define SSB_CHIPCO_GPIOPOL 0x0070
#define SSB_CHIPCO_GPIOIRQ 0x0074
#define SSB_CHIPCO_WATCHDOG 0x0080
#define SSB_CHIPCO_GPIOTIMER 0x0088 /* LED powersave (corerev >= 16) */
#define SSB_CHIPCO_GPIOTIMER_ONTIME_SHIFT 16
@@ -364,8 +364,6 @@ extern void ssb_chipcommon_init(struct ssb_chipcommon *cc);
extern void ssb_chipco_suspend(struct ssb_chipcommon *cc, pm_message_t state);
extern void ssb_chipco_resume(struct ssb_chipcommon *cc);
extern void ssb_chipco_get_clockcpu(struct ssb_chipcommon *cc, u32 chip_id,
u32 *rate, u32 *plltype, u32 *n, u32 *m);
extern void ssb_chipco_get_clockcontrol(struct ssb_chipcommon *cc,
u32 *plltype, u32 *n, u32 *m);
extern void ssb_chipco_timing_init(struct ssb_chipcommon *cc,
@@ -380,47 +378,6 @@ enum ssb_clkmode {
extern void ssb_chipco_set_clockmode(struct ssb_chipcommon *cc,
enum ssb_clkmode mode);
/* GPIO functions */
static inline u32 ssb_chipco_gpio_in(struct ssb_chipcommon *cc,
u32 mask)
{
return ssb_read32(cc->dev, SSB_CHIPCO_GPIOIN) & mask;
}
static inline u32 ssb_chipco_gpio_out(struct ssb_chipcommon *cc,
u32 mask, u32 value)
{
return ssb_write32_masked(cc->dev, SSB_CHIPCO_GPIOOUT, mask, value);
}
static inline u32 ssb_chipco_gpio_outen(struct ssb_chipcommon *cc,
u32 mask, u32 value)
{
return ssb_write32_masked(cc->dev, SSB_CHIPCO_GPIOOUTEN, mask, value);
}
static inline u32 ssb_chipco_gpio_control(struct ssb_chipcommon *cc,
u32 mask, u32 value)
{
return ssb_write32_masked(cc->dev, SSB_CHIPCO_GPIOCTL, mask, value);
}
static inline u32 ssb_chipco_gpio_intmask(struct ssb_chipcommon *cc,
u32 mask, u32 value)
{
return ssb_write32_masked(cc->dev, SSB_CHIPCO_GPIOINTMASK, mask, value);
}
static inline u32 ssb_chipco_gpio_polarity(struct ssb_chipcommon *cc,
u32 mask, u32 value)
{
return ssb_write32_masked(cc->dev, SSB_CHIPCO_GPIOINTPOL, mask, value);
}
/* TODO: GPIO reservation */
extern int ssb_chipco_watchdog(struct ssb_chipcommon *cc, uint ticks);
#ifdef CONFIG_SSB_SERIAL
extern int ssb_chipco_serial_init(struct ssb_chipcommon *cc,
struct ssb_serial_port *ports);

32
target/linux/brcm47xx-2.6/files/include/linux/ssb/ssb_driver_extif.h
View File

@@ -159,37 +159,5 @@ struct ssb_extif {
#define SSB_EXTIF_WATCHDOG_CLK 48000000 /* Hz */
/* GPIO functions */
static inline u32 ssb_extif_gpio_in(struct ssb_extif *extif,
u32 mask)
{
return ssb_read32(extif->dev, SSB_EXTIF_GPIO_IN) & mask;
}
static inline u32 ssb_extif_gpio_out(struct ssb_extif *extif,
u32 mask, u32 value)
{
return ssb_write32_masked(extif->dev, SSB_EXTIF_GPIO_OUT(0), mask, value);
}
static inline u32 ssb_extif_gpio_outen(struct ssb_extif *extif,
u32 mask, u32 value)
{
return ssb_write32_masked(extif->dev, SSB_EXTIF_GPIO_OUTEN(0), mask, value);
}
static inline u32 ssb_extif_gpio_polarity(struct ssb_extif *extif,
u32 mask, u32 value)
{
return ssb_write32_masked(extif->dev, SSB_EXTIF_GPIO_INTPOL, mask, value);
}
static inline u32 ssb_extif_gpio_intmask(struct ssb_extif *extif,
u32 mask, u32 value)
{
return ssb_write32_masked(extif->dev, SSB_EXTIF_GPIO_INTMASK, mask, value);
}
#endif /* __KERNEL__ */
#endif /* LINUX_SSB_EXTIFCORE_H_ */

9
target/linux/brcm47xx-2.6/files/include/linux/ssb/ssb_driver_mips.h
View File

@@ -3,7 +3,7 @@
#ifdef __KERNEL__
#ifdef CONFIG_BCM947XX
#ifdef CONFIG_SSB_DRIVER_MIPS
struct ssb_device;
@@ -22,17 +22,16 @@ struct ssb_mipscore {
int nr_serial_ports;
struct ssb_serial_port serial_ports[4];
int flash_buswidth;
u32 flash_window;
u32 flash_window_size;
};
extern void ssb_mipscore_init(struct ssb_mipscore *mcore);
extern u32 ssb_cpu_clock(struct ssb_mipscore *mcore);
extern unsigned int ssb_mips_irq(struct ssb_device *dev);
#else /* CONFIG_BCM947XX */
#else /* CONFIG_SSB_DRIVER_MIPS */
struct ssb_mipscore {
};
@@ -42,7 +41,7 @@ void ssb_mipscore_init(struct ssb_mipscore *mcore)
{
}
#endif /* CONFIG_BCM947XX */
#endif /* CONFIG_SSB_DRIVER_MIPS */
#endif /* __KERNEL__ */
#endif /* LINUX_SSB_MIPSCORE_H_ */

3
target/linux/brcm47xx-2.6/files/include/linux/ssb/ssb_regs.h
View File

@@ -96,7 +96,8 @@
#define SSB_INTVEC_ENET1 0x00000040 /* Enable interrupts for enet 1 */
#define SSB_TMSLOW 0x0F98 /* SB Target State Low */
#define SSB_TMSLOW_RESET 0x00000001 /* Reset */
#define SSB_TMSLOW_REJECT 0x00000002 /* Reject */
#define SSB_TMSLOW_REJECT_22 0x00000002 /* Reject (Backplane rev 2.2) */
#define SSB_TMSLOW_REJECT_23 0x00000004 /* Reject (Backplane rev 2.3) */
#define SSB_TMSLOW_CLOCK 0x00010000 /* Clock Enable */
#define SSB_TMSLOW_FGC 0x00020000 /* Force Gated Clocks On */
#define SSB_TMSLOW_PE 0x40000000 /* Power Management Enable */