diff --git a/target/linux/xburst/image/u-boot/Makefile b/target/linux/xburst/image/u-boot/Makefile index a59dd31ae..d4740393b 100644 --- a/target/linux/xburst/image/u-boot/Makefile +++ b/target/linux/xburst/image/u-boot/Makefile @@ -9,14 +9,15 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk PKG_NAME:=u-boot -PKG_VERSION:=2009.06 +PKG_VERSION:=20090707 +PKG_REV:=59869ca72df8bc4e4ffa9dd17cb6673bbe010272 PKG_RELEASE:=1 PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/$(PKG_NAME)-$(PKG_VERSION) PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2 -PKG_SOURCE_URL:=ftp://ftp.denx.de/pub/u-boot -PKG_MD5SUM:= -PKG_CAT:=bzcat +PKG_SOURCE_URL:=git://git.denx.de/u-boot.git +PKG_SOURCE_SUBDIR:=$(PKG_NAME)-$(PKG_VERSION) +PKG_SOURCE_VERSION:=$(PKG_REV) include $(INCLUDE_DIR)/package.mk diff --git a/target/linux/xburst/image/u-boot/patches/0001-add-qi_lb60-support.patch b/target/linux/xburst/image/u-boot/patches/0001-add-qi_lb60-support.patch index 10afcc48c..933d6f297 100644 --- a/target/linux/xburst/image/u-boot/patches/0001-add-qi_lb60-support.patch +++ b/target/linux/xburst/image/u-boot/patches/0001-add-qi_lb60-support.patch @@ -1,95 +1,8 @@ -diff --git a/MAINTAINERS b/MAINTAINERS -index 3d50668..1f6008f 100644 ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -28,6 +28,7 @@ Pantelis Antoniou - Reinhard Arlt - - cpci5200 MPC5200 -+ mecp5123 MPC5121 - mecp5200 MPC5200 - pf5200 MPC5200 - -@@ -75,6 +76,8 @@ Wolfgang Denk - IceCube_5100 MGT5100 - IceCube_5200 MPC5200 - -+ ARIA MPC5121e -+ - AMX860 MPC860 - ETX094 MPC850 - FPS850L MPC850 -@@ -610,6 +613,10 @@ Stelian Pop - at91sam9263ek ARM926EJS (AT91SAM9263 SoC) - at91sam9rlek ARM926EJS (AT91SAM9RL SoC) - -+Tom Rix -+ -+ omap3_zoom2 ARM CORTEX-A8 (OMAP3xx SoC) -+ - Stefan Roese - - ixdpg425 xscale -diff --git a/MAKEALL b/MAKEALL -index 57dd425..344a8ec 100755 ---- a/MAKEALL -+++ b/MAKEALL -@@ -77,7 +77,9 @@ LIST_5xxx=" \ - ######################################################################### - - LIST_512x=" \ -- ads5121 \ -+ aria \ -+ mecp5123 \ -+ mpc5121ads \ - " - - ######################################################################### -@@ -380,6 +382,8 @@ LIST_85xx=" \ - MPC8569MDS \ - MPC8572DS \ - MPC8572DS_36BIT \ -+ P2020DS \ -+ P2020DS_36BIT \ - PM854 \ - PM856 \ - sbc8540 \ -@@ -528,6 +532,7 @@ LIST_ARM9=" \ - davinci_schmoogie \ - davinci_sffsdr \ - davinci_sonata \ -+ davinci_dm355evm \ - " - - ######################################################################### -@@ -562,6 +567,7 @@ LIST_ARM_CORTEX_A8=" \ - omap3_evm \ - omap3_pandora \ - omap3_zoom1 \ -+ omap3_zoom2 \ - " - - ######################################################################### diff --git a/Makefile b/Makefile -index a23fbf6..3ded14f 100644 +index 2a06440..91c5b30 100644 --- a/Makefile +++ b/Makefile -@@ -137,6 +137,14 @@ ifeq ($(ARCH),powerpc) - ARCH = ppc - endif - -+# The "tools" are needed early, so put this first -+# Don't include stuff already done in $(LIBS) -+SUBDIRS = tools \ -+ examples \ -+ api_examples -+ -+.PHONY : $(SUBDIRS) -+ - ifeq ($(obj)include/config.mk,$(wildcard $(obj)include/config.mk)) - - # load ARCH, BOARD, and CPU configuration -@@ -157,7 +165,7 @@ ifeq ($(ARCH),i386) +@@ -165,7 +165,7 @@ ifeq ($(ARCH),i386) CROSS_COMPILE = i386-linux- endif ifeq ($(ARCH),mips) @@ -98,138 +11,7 @@ index a23fbf6..3ded14f 100644 endif ifeq ($(ARCH),nios) CROSS_COMPILE = nios-elf- -@@ -282,14 +290,6 @@ LIBBOARD := $(addprefix $(obj),$(LIBBOARD)) - # Add GCC lib - PLATFORM_LIBS += -L $(shell dirname `$(CC) $(CFLAGS) -print-libgcc-file-name`) -lgcc - --# The "tools" are needed early, so put this first --# Don't include stuff already done in $(LIBS) --SUBDIRS = tools \ -- examples \ -- api_examples -- --.PHONY : $(SUBDIRS) -- - ifeq ($(CONFIG_NAND_U_BOOT),y) - NAND_SPL = nand_spl - U_BOOT_NAND = $(obj)u-boot-nand.bin -@@ -344,12 +344,19 @@ $(obj)u-boot.sha1: $(obj)u-boot.bin - $(obj)u-boot.dis: $(obj)u-boot - $(OBJDUMP) -d $< > $@ - --$(obj)u-boot: depend $(SUBDIRS) $(OBJS) $(LIBBOARD) $(LIBS) $(LDSCRIPT) -+GEN_UBOOT = \ - UNDEF_SYM=`$(OBJDUMP) -x $(LIBBOARD) $(LIBS) | \ - sed -n -e 's/.*\($(SYM_PREFIX)__u_boot_cmd_.*\)/-u\1/p'|sort|uniq`;\ - cd $(LNDIR) && $(LD) $(LDFLAGS) $$UNDEF_SYM $(__OBJS) \ - --start-group $(__LIBS) --end-group $(PLATFORM_LIBS) \ - -Map u-boot.map -o u-boot -+$(obj)u-boot: depend $(SUBDIRS) $(OBJS) $(LIBBOARD) $(LIBS) $(LDSCRIPT) -+ $(GEN_UBOOT) -+ifeq ($(CONFIG_KALLSYMS),y) -+ smap=`$(call SYSTEM_MAP,u-boot) | awk '$$2 ~ /[tTwW]/ {printf $$1 $$3 "\\0"}'` ; \ -+ $(CC) $(CFLAGS) -DSYSTEM_MAP="\"$${smap}\"" -c common/system_map.c -o $(obj)common/system_map.o -+ $(GEN_UBOOT) $(obj)common/system_map.o -+endif - - $(OBJS): depend - $(MAKE) -C cpu/$(CPU) $(if $(REMOTE_BUILD),$@,$(notdir $@)) -@@ -448,10 +455,12 @@ cscope: - > cscope.files - cscope -b -q -k - --$(obj)System.map: $(obj)u-boot -- @$(NM) $< | \ -+SYSTEM_MAP = \ -+ $(NM) $1 | \ - grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \ -- sort > $(obj)System.map -+ LC_ALL=C sort -+$(obj)System.map: $(obj)u-boot -+ @$(call SYSTEM_MAP,$<) > $(obj)System.map - - # - # Auto-generate the autoconf.mk file (which is included by all makefiles) -@@ -812,15 +821,20 @@ v38b_config: unconfig - ## MPC512x Systems - ######################################################################### - --ads5121_config \ --ads5121_rev2_config \ -+aria_config: unconfig -+ @$(MKCONFIG) -a aria ppc mpc512x aria davedenx -+ -+mecp5123_config: unconfig -+ @$(MKCONFIG) -a mecp5123 ppc mpc512x mecp5123 esd -+ -+mpc5121ads_config \ -+mpc5121ads_rev2_config \ - : unconfig - @mkdir -p $(obj)include - @if [ "$(findstring rev2,$@)" ] ; then \ - echo "#define CONFIG_ADS5121_REV2 1" > $(obj)include/config.h; \ - fi -- @$(MKCONFIG) -a ads5121 ppc mpc512x ads5121 -- -+ @$(MKCONFIG) -a mpc5121ads ppc mpc512x mpc5121ads freescale - - ######################################################################### - ## MPC8xx Systems -@@ -1533,6 +1547,17 @@ rainier_nand_config: unconfig - @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/sequoia/config.tmp - @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk - -+sequoia_ramboot_config \ -+rainier_ramboot_config: unconfig -+ @mkdir -p $(obj)include $(obj)board/amcc/sequoia -+ @echo "#define CONFIG_SYS_RAMBOOT" > $(obj)include/config.h -+ @echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \ -+ tr '[:lower:]' '[:upper:]')" >> $(obj)include/config.h -+ @$(MKCONFIG) -n $@ -a sequoia ppc ppc4xx sequoia amcc -+ @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/sequoia/config.tmp -+ @echo "LDSCRIPT = board/amcc/sequoia/u-boot-ram.lds" >> \ -+ $(obj)board/amcc/sequoia/config.tmp -+ - taihu_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx taihu amcc - -@@ -2456,6 +2481,15 @@ MPC8572DS_config: unconfig - fi - @$(MKCONFIG) -a MPC8572DS ppc mpc85xx mpc8572ds freescale - -+P2020DS_36BIT_config \ -+P2020DS_config: unconfig -+ @mkdir -p $(obj)include -+ @if [ "$(findstring _36BIT_,$@)" ] ; then \ -+ echo "#define CONFIG_PHYS_64BIT" >>$(obj)include/config.h ; \ -+ $(XECHO) "... enabling 36-bit physical addressing." ; \ -+ fi -+ @$(MKCONFIG) -a P2020DS ppc mpc85xx p2020ds freescale -+ - PM854_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc85xx pm854 - -@@ -2790,6 +2824,9 @@ davinci_sffsdr_config : unconfig - davinci_sonata_config : unconfig - @$(MKCONFIG) $(@:_config=) arm arm926ejs sonata davinci davinci - -+davinci_dm355evm_config : unconfig -+ @$(MKCONFIG) $(@:_config=) arm arm926ejs dm355evm davinci davinci -+ - lpd7a400_config \ - lpd7a404_config: unconfig - @$(MKCONFIG) $(@:_config=) arm lh7a40x lpd7a40x -@@ -2983,6 +3020,9 @@ omap3_pandora_config : unconfig - omap3_zoom1_config : unconfig - @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 zoom1 omap3 omap3 - -+omap3_zoom2_config : unconfig -+ @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 zoom2 omap3 omap3 -+ - ######################################################################### - ## XScale Systems - ######################################################################### -@@ -3237,6 +3277,16 @@ qemu_mips_config : unconfig +@@ -3310,6 +3310,16 @@ qemu_mips_config : unconfig @$(MKCONFIG) -a qemu-mips mips mips qemu-mips ######################################################################### @@ -246,19803 +28,6 @@ index a23fbf6..3ded14f 100644 ## MIPS64 5Kc ######################################################################### -diff --git a/README b/README -index 142dbcc..561c100 100644 ---- a/README -+++ b/README -@@ -1315,11 +1315,6 @@ The following options need to be configured: - clock chips. See common/cmd_i2c.c for a description of the - command line interface. - -- CONFIG_I2C_CMD_TREE is a recommended option that places -- all I2C commands under a single 'i2c' root command. The -- older 'imm', 'imd', 'iprobe' etc. commands are considered -- deprecated and may disappear in the future. -- - CONFIG_HARD_I2C selects a hardware I2C controller. - - CONFIG_SOFT_I2C configures u-boot to use a software (aka -@@ -1435,9 +1430,9 @@ The following options need to be configured: - CONFIG_SYS_I2C_NOPROBES - - This option specifies a list of I2C devices that will be skipped -- when the 'i2c probe' command is issued (or 'iprobe' using the legacy -- command). If CONFIG_I2C_MULTI_BUS is set, specify a list of bus-device -- pairs. Otherwise, specify a 1D array of device addresses -+ when the 'i2c probe' command is issued. If CONFIG_I2C_MULTI_BUS -+ is set, specify a list of bus-device pairs. Otherwise, specify -+ a 1D array of device addresses - - e.g. - #undef CONFIG_I2C_MULTI_BUS -@@ -1851,6 +1846,17 @@ The following options need to be configured: - These options enable and control the auto-update feature; - for a more detailed description refer to doc/README.update. - -+- MTD Support (mtdparts command, UBI support) -+ CONFIG_MTD_DEVICE -+ -+ Adds the MTD device infrastructure from the Linux kernel. -+ Needed for mtdparts command support. -+ -+ CONFIG_MTD_PARTITIONS -+ -+ Adds the MTD partitioning infrastructure from the Linux -+ kernel. Needed for UBI support. -+ - Legacy uImage format: - - Arg Where When -@@ -2871,14 +2877,7 @@ mw - memory write (fill) - cp - memory copy - cmp - memory compare - crc32 - checksum calculation --imd - i2c memory display --imm - i2c memory modify (auto-incrementing) --inm - i2c memory modify (constant address) --imw - i2c memory write (fill) --icrc32 - i2c checksum calculation --iprobe - probe to discover valid I2C chip addresses --iloop - infinite loop on address range --isdram - print SDRAM configuration information -+i2c - I2C sub-system - sspi - SPI utility commands - base - print or set address offset - printenv- print environment variables -diff --git a/api/api_platform-ppc.c b/api/api_platform-ppc.c -index bfcc417..a3d981f 100644 ---- a/api/api_platform-ppc.c -+++ b/api/api_platform-ppc.c -@@ -53,7 +53,7 @@ int platform_sys_info(struct sys_info *si) - #define bi_bar bi_immr_base - #elif defined(CONFIG_MPC5xxx) - #define bi_bar bi_mbar_base --#elif defined(CONFIG_MPC83XX) -+#elif defined(CONFIG_MPC83xx) - #define bi_bar bi_immrbar - #elif defined(CONFIG_MPC8220) - #define bi_bar bi_mbar_base -diff --git a/arm_config.mk b/arm_config.mk -index 73d9625..c4cf99d 100644 ---- a/arm_config.mk -+++ b/arm_config.mk -@@ -22,3 +22,5 @@ - # - - PLATFORM_CPPFLAGS += -DCONFIG_ARM -D__ARM__ -+ -+LDSCRIPT := $(SRCTREE)/cpu/$(CPU)/u-boot.lds -diff --git a/board/BuS/EB+MCF-EV123/EB+MCF-EV123.c b/board/BuS/EB+MCF-EV123/EB+MCF-EV123.c -index 02a095e..73dfb3d 100644 ---- a/board/BuS/EB+MCF-EV123/EB+MCF-EV123.c -+++ b/board/BuS/EB+MCF-EV123/EB+MCF-EV123.c -@@ -156,7 +156,7 @@ int do_vcimage (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - vcimage, 2, 0, do_vcimage, - "loads an image to Display", -- "vcimage addr\n" -+ "vcimage addr" - ); - - /* EOF EB+MCF-EV123c */ -diff --git a/board/Marvell/common/i2c.c b/board/Marvell/common/i2c.c -index d426044..8d87b2d 100644 ---- a/board/Marvell/common/i2c.c -+++ b/board/Marvell/common/i2c.c -@@ -26,6 +26,7 @@ - #include - #include - #include -+#include - #include "../include/mv_gen_reg.h" - #include "../include/core.h" - -@@ -42,7 +43,7 @@ - - /* Assuming that there is only one master on the bus (us) */ - --static void i2c_init (int speed, int slaveaddr) -+void i2c_init (int speed, int slaveaddr) - { - unsigned int n, m, freq, margin, power; - unsigned int actualN = 0, actualM = 0; -@@ -367,7 +368,7 @@ i2c_set_dev_offset (uchar dev_addr, unsigned int offset, int ten_bit, - return 0; /* sucessful completion */ - } - --uchar -+int - i2c_read (uchar dev_addr, unsigned int offset, int alen, uchar * data, - int len) - { -@@ -376,7 +377,8 @@ i2c_read (uchar dev_addr, unsigned int offset, int alen, uchar * data, - - DP (puts ("i2c_read\n")); - -- i2c_init (i2cFreq, 0); /* set the i2c frequency */ -+ /* set the i2c frequency */ -+ i2c_init (i2cFreq, CONFIG_SYS_I2C_SLAVE); - - status = i2c_start (); - -@@ -396,7 +398,8 @@ i2c_read (uchar dev_addr, unsigned int offset, int alen, uchar * data, - return status; - } - -- i2c_init (i2cFreq, 0); /* set the i2c frequency again */ -+ /* set the i2c frequency again */ -+ i2c_init (i2cFreq, CONFIG_SYS_I2C_SLAVE); - - status = i2c_start (); - if (status) { -@@ -442,7 +445,7 @@ void i2c_stop (void) - /* */ - /* returns 0 = succesful */ - /* anything but zero is failure */ --uchar -+int - i2c_write (uchar dev_addr, unsigned int offset, int alen, uchar * data, - int len) - { -@@ -451,7 +454,8 @@ i2c_write (uchar dev_addr, unsigned int offset, int alen, uchar * data, - - DP (puts ("i2c_write\n")); - -- i2c_init (i2cFreq, 0); /* set the i2c frequency */ -+ /* set the i2c frequency */ -+ i2c_init (i2cFreq, CONFIG_SYS_I2C_SLAVE); - - status = i2c_start (); /* send a start bit */ - -@@ -504,7 +508,8 @@ int i2c_probe (uchar chip) - - DP (puts ("i2c_probe\n")); - -- i2c_init (i2cFreq, 0); /* set the i2c frequency */ -+ /* set the i2c frequency */ -+ i2c_init (i2cFreq, CONFIG_SYS_I2C_SLAVE); - - status = i2c_start (); /* send a start bit */ - -diff --git a/board/actux1/config.mk b/board/actux1/config.mk -index 9a634cd..119140d 100644 ---- a/board/actux1/config.mk -+++ b/board/actux1/config.mk -@@ -2,3 +2,5 @@ TEXT_BASE = 0x00e00000 - - # include NPE ethernet driver - BOARDLIBS = cpu/ixp/npe/libnpe.a -+ -+LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot.lds -diff --git a/board/actux2/config.mk b/board/actux2/config.mk -index 9a634cd..119140d 100644 ---- a/board/actux2/config.mk -+++ b/board/actux2/config.mk -@@ -2,3 +2,5 @@ TEXT_BASE = 0x00e00000 - - # include NPE ethernet driver - BOARDLIBS = cpu/ixp/npe/libnpe.a -+ -+LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot.lds -diff --git a/board/actux3/config.mk b/board/actux3/config.mk -index 9a634cd..119140d 100644 ---- a/board/actux3/config.mk -+++ b/board/actux3/config.mk -@@ -2,3 +2,5 @@ TEXT_BASE = 0x00e00000 - - # include NPE ethernet driver - BOARDLIBS = cpu/ixp/npe/libnpe.a -+ -+LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot.lds -diff --git a/board/actux4/u-boot.lds b/board/actux4/u-boot.lds -deleted file mode 100644 -index 10a5da9..0000000 ---- a/board/actux4/u-boot.lds -+++ /dev/null -@@ -1,66 +0,0 @@ --/* -- * (C) Copyright 2000 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT ("elf32-bigarm", "elf32-bigarm", "elf32-bigarm") --OUTPUT_ARCH (arm) --ENTRY (_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN (4); -- .text : { -- cpu/ixp/start.o(.text) -- *(.text) -- } -- -- . = ALIGN (4); -- .rodata : { -- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) -- } -- -- . = ALIGN (4); -- .data : { -- *(.data) -- } -- -- . = ALIGN (4); -- .got : { -- *(.got) -- } -- -- . =.; -- __u_boot_cmd_start =.; -- .u_boot_cmd : { -- *(.u_boot_cmd) -- } -- __u_boot_cmd_end =.; -- -- . = ALIGN (4); -- __bss_start =.; -- .bss (NOLOAD): { -- *(.bss) -- . = ALIGN(4); -- } -- _end =.; --} -diff --git a/board/ads5121/Makefile b/board/ads5121/Makefile -deleted file mode 100644 -index 52d0d3c..0000000 ---- a/board/ads5121/Makefile -+++ /dev/null -@@ -1,57 +0,0 @@ --# --# (C) Copyright 2007 --# Wolfgang Denk, DENX Software Engineering, wd@denx.de. --# --# See file CREDITS for list of people who contributed to this --# project. --# --# This program is free software; you can redistribute it and/or --# modify it under the terms of the GNU General Public License as --# published by the Free Software Foundation; either version 2 of --# the License, or (at your option) any later version. --# --# This program is distributed in the hope that it will be useful, --# but WITHOUT ANY WARRANTY; without even the implied warranty of --# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --# GNU General Public License for more details. --# --# You should have received a copy of the GNU General Public License --# along with this program; if not, write to the Free Software --# Foundation, Inc., 59 Temple Place, Suite 330, Boston, --# MA 02111-1307 USA --# -- --include $(TOPDIR)/config.mk -- --$(shell mkdir -p $(OBJTREE)/board/freescale/common) -- --LIB = $(obj)lib$(BOARD).a -- --COBJS-y := $(BOARD).o --COBJS-${CONFIG_FSL_DIU_FB} += ads5121_diu.o --COBJS-${CONFIG_FSL_DIU_FB} += ../freescale/common/fsl_diu_fb.o --COBJS-${CONFIG_FSL_DIU_FB} += ../freescale/common/fsl_logo_bmp.o --COBJS-$(CONFIG_PCI) += pci.o -- --COBJS := $(COBJS-y) --SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) --OBJS := $(addprefix $(obj),$(COBJS)) --SOBJS := $(addprefix $(obj),$(SOBJS)) -- --$(LIB): $(obj).depend $(OBJS) -- $(AR) $(ARFLAGS) $@ $(OBJS) -- --clean: -- rm -f $(SOBJS) $(OBJS) -- --distclean: clean -- rm -f $(LIB) core *.bak $(obj).depend -- --######################################################################### -- --# defines $(obj).depend target --include $(SRCTREE)/rules.mk -- --sinclude $(obj).depend -- --######################################################################### -diff --git a/board/ads5121/README b/board/ads5121/README -deleted file mode 100644 -index defcd6b..0000000 ---- a/board/ads5121/README -+++ /dev/null -@@ -1,7 +0,0 @@ --To configure for the current (Rev 3.x) ADS5121 -- make ads5121_config --This will automatically include PCI, the Real Time CLock, add backup flash --ability and set the correct frequency and memory configuration. -- --To configure for the older Rev 2 ADS5121 type (this will not have PCI) -- make ads5121_rev2_config -diff --git a/board/ads5121/ads5121.c b/board/ads5121/ads5121.c -deleted file mode 100644 -index 6c40e94..0000000 ---- a/board/ads5121/ads5121.c -+++ /dev/null -@@ -1,432 +0,0 @@ --/* -- * (C) Copyright 2007 DENX Software Engineering -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- * -- */ -- --#include --#include --#include --#include --#include --#include --#ifdef CONFIG_MISC_INIT_R --#include --#endif -- --DECLARE_GLOBAL_DATA_PTR; -- --/* Clocks in use */ --#define SCCR1_CLOCKS_EN (CLOCK_SCCR1_CFG_EN | \ -- CLOCK_SCCR1_LPC_EN | \ -- CLOCK_SCCR1_PSC_EN(CONFIG_PSC_CONSOLE) | \ -- CLOCK_SCCR1_PSCFIFO_EN | \ -- CLOCK_SCCR1_DDR_EN | \ -- CLOCK_SCCR1_FEC_EN | \ -- CLOCK_SCCR1_PATA_EN | \ -- CLOCK_SCCR1_PCI_EN | \ -- CLOCK_SCCR1_TPR_EN) -- --#define SCCR2_CLOCKS_EN (CLOCK_SCCR2_MEM_EN | \ -- CLOCK_SCCR2_SPDIF_EN | \ -- CLOCK_SCCR2_DIU_EN | \ -- CLOCK_SCCR2_I2C_EN) -- --#define CSAW_START(start) ((start) & 0xFFFF0000) --#define CSAW_STOP(start, size) (((start) + (size) - 1) >> 16) -- --long int fixed_sdram(void); -- --int board_early_init_f (void) --{ -- volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; -- u32 lpcaw; -- -- /* -- * Initialize Local Window for the CPLD registers access (CS2 selects -- * the CPLD chip) -- */ -- im->sysconf.lpcs2aw = CSAW_START(CONFIG_SYS_CPLD_BASE) | -- CSAW_STOP(CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_SIZE); -- im->lpc.cs_cfg[2] = CONFIG_SYS_CS2_CFG; -- -- /* -- * According to MPC5121e RM, configuring local access windows should -- * be followed by a dummy read of the config register that was -- * modified last and an isync -- */ -- lpcaw = im->sysconf.lpcs2aw; -- __asm__ __volatile__ ("isync"); -- -- /* -- * Disable Boot NOR FLASH write protect - CPLD Reg 8 NOR FLASH Control -- * -- * Without this the flash identification routine fails, as it needs to issue -- * write commands in order to establish the device ID. -- */ -- --#ifdef CONFIG_ADS5121_REV2 -- *((volatile u8 *)(CONFIG_SYS_CPLD_BASE + 0x08)) = 0xC1; --#else -- if (*((u8 *)(CONFIG_SYS_CPLD_BASE + 0x08)) & 0x04) { -- *((volatile u8 *)(CONFIG_SYS_CPLD_BASE + 0x08)) = 0xC1; -- } else { -- /* running from Backup flash */ -- *((volatile u8 *)(CONFIG_SYS_CPLD_BASE + 0x08)) = 0x32; -- } --#endif -- /* -- * Configure Flash Speed -- */ -- *((volatile u32 *)(CONFIG_SYS_IMMR + LPC_OFFSET + CS0_CONFIG)) = CONFIG_SYS_CS0_CFG; -- if (SVR_MJREV (im->sysconf.spridr) >= 2) { -- *((volatile u32 *)(CONFIG_SYS_IMMR + LPC_OFFSET + CS_ALE_TIMING_CONFIG)) = CONFIG_SYS_CS_ALETIMING; -- } -- /* -- * Enable clocks -- */ -- im->clk.sccr[0] = SCCR1_CLOCKS_EN; -- im->clk.sccr[1] = SCCR2_CLOCKS_EN; --#if defined(CONFIG_IIM) || defined(CONFIG_CMD_FUSE) -- im->clk.sccr[1] |= CLOCK_SCCR2_IIM_EN; --#endif -- -- return 0; --} -- --phys_size_t initdram (int board_type) --{ -- u32 msize = 0; -- -- msize = fixed_sdram (); -- -- return msize; --} -- --/* -- * fixed sdram init -- the board doesn't use memory modules that have serial presence -- * detect or similar mechanism for discovery of the DRAM settings -- */ --long int fixed_sdram (void) --{ -- volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; -- u32 msize = CONFIG_SYS_DDR_SIZE * 1024 * 1024; -- u32 msize_log2 = __ilog2 (msize); -- u32 i; -- -- /* Initialize IO Control */ -- im->io_ctrl.regs[IOCTL_MEM/4] = IOCTRL_MUX_DDR; -- -- /* Initialize DDR Local Window */ -- im->sysconf.ddrlaw.bar = CONFIG_SYS_DDR_BASE & 0xFFFFF000; -- im->sysconf.ddrlaw.ar = msize_log2 - 1; -- -- /* -- * According to MPC5121e RM, configuring local access windows should -- * be followed by a dummy read of the config register that was -- * modified last and an isync -- */ -- i = im->sysconf.ddrlaw.ar; -- __asm__ __volatile__ ("isync"); -- -- /* Enable DDR */ -- im->mddrc.ddr_sys_config = CONFIG_SYS_MDDRC_SYS_CFG_EN; -- -- /* Initialize DDR Priority Manager */ -- im->mddrc.prioman_config1 = CONFIG_SYS_MDDRCGRP_PM_CFG1; -- im->mddrc.prioman_config2 = CONFIG_SYS_MDDRCGRP_PM_CFG2; -- im->mddrc.hiprio_config = CONFIG_SYS_MDDRCGRP_HIPRIO_CFG; -- im->mddrc.lut_table0_main_upper = CONFIG_SYS_MDDRCGRP_LUT0_MU; -- im->mddrc.lut_table0_main_lower = CONFIG_SYS_MDDRCGRP_LUT0_ML; -- im->mddrc.lut_table1_main_upper = CONFIG_SYS_MDDRCGRP_LUT1_MU; -- im->mddrc.lut_table1_main_lower = CONFIG_SYS_MDDRCGRP_LUT1_ML; -- im->mddrc.lut_table2_main_upper = CONFIG_SYS_MDDRCGRP_LUT2_MU; -- im->mddrc.lut_table2_main_lower = CONFIG_SYS_MDDRCGRP_LUT2_ML; -- im->mddrc.lut_table3_main_upper = CONFIG_SYS_MDDRCGRP_LUT3_MU; -- im->mddrc.lut_table3_main_lower = CONFIG_SYS_MDDRCGRP_LUT3_ML; -- im->mddrc.lut_table4_main_upper = CONFIG_SYS_MDDRCGRP_LUT4_MU; -- im->mddrc.lut_table4_main_lower = CONFIG_SYS_MDDRCGRP_LUT4_ML; -- im->mddrc.lut_table0_alternate_upper = CONFIG_SYS_MDDRCGRP_LUT0_AU; -- im->mddrc.lut_table0_alternate_lower = CONFIG_SYS_MDDRCGRP_LUT0_AL; -- im->mddrc.lut_table1_alternate_upper = CONFIG_SYS_MDDRCGRP_LUT1_AU; -- im->mddrc.lut_table1_alternate_lower = CONFIG_SYS_MDDRCGRP_LUT1_AL; -- im->mddrc.lut_table2_alternate_upper = CONFIG_SYS_MDDRCGRP_LUT2_AU; -- im->mddrc.lut_table2_alternate_lower = CONFIG_SYS_MDDRCGRP_LUT2_AL; -- im->mddrc.lut_table3_alternate_upper = CONFIG_SYS_MDDRCGRP_LUT3_AU; -- im->mddrc.lut_table3_alternate_lower = CONFIG_SYS_MDDRCGRP_LUT3_AL; -- im->mddrc.lut_table4_alternate_upper = CONFIG_SYS_MDDRCGRP_LUT4_AU; -- im->mddrc.lut_table4_alternate_lower = CONFIG_SYS_MDDRCGRP_LUT4_AL; -- -- /* Initialize MDDRC */ -- im->mddrc.ddr_sys_config = CONFIG_SYS_MDDRC_SYS_CFG; -- im->mddrc.ddr_time_config0 = CONFIG_SYS_MDDRC_TIME_CFG0; -- im->mddrc.ddr_time_config1 = CONFIG_SYS_MDDRC_TIME_CFG1; -- im->mddrc.ddr_time_config2 = CONFIG_SYS_MDDRC_TIME_CFG2; -- -- /* Initialize DDR */ -- for (i = 0; i < 10; i++) -- im->mddrc.ddr_command = CONFIG_SYS_MICRON_NOP; -- -- im->mddrc.ddr_command = CONFIG_SYS_MICRON_PCHG_ALL; -- im->mddrc.ddr_command = CONFIG_SYS_MICRON_NOP; -- im->mddrc.ddr_command = CONFIG_SYS_MICRON_RFSH; -- im->mddrc.ddr_command = CONFIG_SYS_MICRON_NOP; -- im->mddrc.ddr_command = CONFIG_SYS_MICRON_RFSH; -- im->mddrc.ddr_command = CONFIG_SYS_MICRON_NOP; -- im->mddrc.ddr_command = CONFIG_SYS_MICRON_INIT_DEV_OP; -- im->mddrc.ddr_command = CONFIG_SYS_MICRON_NOP; -- im->mddrc.ddr_command = CONFIG_SYS_MICRON_EM2; -- im->mddrc.ddr_command = CONFIG_SYS_MICRON_NOP; -- im->mddrc.ddr_command = CONFIG_SYS_MICRON_PCHG_ALL; -- im->mddrc.ddr_command = CONFIG_SYS_MICRON_EM2; -- im->mddrc.ddr_command = CONFIG_SYS_MICRON_EM3; -- im->mddrc.ddr_command = CONFIG_SYS_MICRON_EN_DLL; -- im->mddrc.ddr_command = CONFIG_SYS_MICRON_INIT_DEV_OP; -- im->mddrc.ddr_command = CONFIG_SYS_MICRON_PCHG_ALL; -- im->mddrc.ddr_command = CONFIG_SYS_MICRON_RFSH; -- im->mddrc.ddr_command = CONFIG_SYS_MICRON_INIT_DEV_OP; -- im->mddrc.ddr_command = CONFIG_SYS_MICRON_OCD_DEFAULT; -- im->mddrc.ddr_command = CONFIG_SYS_MICRON_PCHG_ALL; -- im->mddrc.ddr_command = CONFIG_SYS_MICRON_NOP; -- -- /* Start MDDRC */ -- im->mddrc.ddr_time_config0 = CONFIG_SYS_MDDRC_TIME_CFG0_RUN; -- im->mddrc.ddr_sys_config = CONFIG_SYS_MDDRC_SYS_CFG_RUN; -- -- return msize; --} -- --int misc_init_r(void) --{ -- u8 tmp_val; -- extern int ads5121_diu_init(void); -- -- /* Using this for DIU init before the driver in linux takes over -- * Enable the TFP410 Encoder (I2C address 0x38) -- */ -- -- i2c_set_bus_num(2); -- tmp_val = 0xBF; -- i2c_write(0x38, 0x08, 1, &tmp_val, sizeof(tmp_val)); -- /* Verify if enabled */ -- tmp_val = 0; -- i2c_read(0x38, 0x08, 1, &tmp_val, sizeof(tmp_val)); -- debug("DVI Encoder Read: 0x%02lx\n", tmp_val); -- -- tmp_val = 0x10; -- i2c_write(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val)); -- /* Verify if enabled */ -- tmp_val = 0; -- i2c_read(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val)); -- debug("DVI Encoder Read: 0x%02lx\n", tmp_val); -- --#ifdef CONFIG_FSL_DIU_FB --#if !(defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE)) -- ads5121_diu_init(); --#endif --#endif -- -- return 0; --} --static iopin_t ioregs_init[] = { -- /* FUNC1=FEC_RX_DV Sets Next 3 to FEC pads */ -- { -- IOCTL_SPDIF_TXCLK, 3, 0, -- IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -- IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) -- }, -- /* Set highest Slew on 9 PATA pins */ -- { -- IOCTL_PATA_CE1, 9, 1, -- IO_PIN_FMUX(0) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -- IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) -- }, -- /* FUNC1=FEC_COL Sets Next 15 to FEC pads */ -- { -- IOCTL_PSC0_0, 15, 0, -- IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -- IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) -- }, -- /* FUNC1=SPDIF_TXCLK */ -- { -- IOCTL_LPC_CS1, 1, 0, -- IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -- IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3) -- }, -- /* FUNC2=SPDIF_TX and sets Next pin to SPDIF_RX */ -- { -- IOCTL_I2C1_SCL, 2, 0, -- IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -- IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3) -- }, -- /* FUNC2=DIU CLK */ -- { -- IOCTL_PSC6_0, 1, 0, -- IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -- IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3) -- }, -- /* FUNC2=DIU_HSYNC */ -- { -- IOCTL_PSC6_1, 1, 0, -- IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -- IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) -- }, -- /* FUNC2=DIUVSYNC Sets Next 26 to DIU Pads */ -- { -- IOCTL_PSC6_4, 26, 0, -- IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -- IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) -- } --}; -- --static iopin_t rev2_silicon_pci_ioregs_init[] = { -- /* FUNC0=PCI Sets next 54 to PCI pads */ -- { -- IOCTL_PCI_AD31, 54, 0, -- IO_PIN_FMUX(0) | IO_PIN_HOLD(0) | IO_PIN_DS(0) -- } --}; -- --int checkboard (void) --{ -- ushort brd_rev = *(vu_short *) (CONFIG_SYS_CPLD_BASE + 0x00); -- uchar cpld_rev = *(vu_char *) (CONFIG_SYS_CPLD_BASE + 0x02); -- volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; -- -- printf ("Board: ADS5121 rev. 0x%04x (CPLD rev. 0x%02x)\n", -- brd_rev, cpld_rev); -- /* initialize function mux & slew rate IO inter alia on IO Pins */ -- -- iopin_initialize(ioregs_init, sizeof(ioregs_init) / sizeof(ioregs_init[0])); -- if (SVR_MJREV (im->sysconf.spridr) >= 2) { -- iopin_initialize(rev2_silicon_pci_ioregs_init, 1); -- } -- -- return 0; --} -- --#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) --void ft_board_setup(void *blob, bd_t *bd) --{ -- ft_cpu_setup(blob, bd); -- fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); --} --#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ -- --#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET) -- --void init_ide_reset (void) --{ -- volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; -- debug ("init_ide_reset\n"); -- -- /* -- * Clear the reset bit to reset the interface -- * cf. RefMan MPC5121EE: 28.4.1 Resetting the ATA Bus -- */ -- immr->pata.pata_ata_control = 0; -- udelay(100); -- /* Assert the reset bit to enable the interface */ -- immr->pata.pata_ata_control = FSL_ATA_CTRL_ATA_RST_B; -- udelay(100); -- --} -- --void ide_set_reset (int idereset) --{ -- volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; -- debug ("ide_set_reset(%d)\n", idereset); -- -- if (idereset) { -- immr->pata.pata_ata_control = 0; -- udelay(100); -- } else { -- immr->pata.pata_ata_control = FSL_ATA_CTRL_ATA_RST_B; -- udelay(100); -- } --} -- --#define CALC_TIMING(t) (t + period - 1) / period -- --int ide_preinit (void) --{ -- volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; -- long t; -- const struct { -- short t0; -- short t1; -- short t2_8; -- short t2_16; -- short t2i; -- short t4; -- short t9; -- short tA; -- } pio_specs = { -- .t0 = 600, -- .t1 = 70, -- .t2_8 = 290, -- .t2_16 = 165, -- .t2i = 0, -- .t4 = 30, -- .t9 = 20, -- .tA = 50, -- }; -- union { -- u32 config; -- struct { -- u8 field1; -- u8 field2; -- u8 field3; -- u8 field4; -- }bytes; -- }cfg; -- -- debug ("IDE preinit using PATA peripheral at IMMR-ADDR %08x\n", -- (u32)&immr->pata); -- -- /* Set the reset bit to 1 to enable the interface */ -- immr->pata.pata_ata_control = FSL_ATA_CTRL_ATA_RST_B; -- -- /* Init timings : we use PIO mode 0 timings */ -- t = 1000000000 / gd->ips_clk; /* period in ns */ -- cfg.bytes.field1 = 3; -- cfg.bytes.field2 = 3; -- cfg.bytes.field3 = (pio_specs.t1 + t) / t; -- cfg.bytes.field4 = (pio_specs.t2_8 + t) / t; -- -- immr->pata.pata_time1 = cfg.config; -- -- cfg.bytes.field1 = (pio_specs.t2_8 + t) / t; -- cfg.bytes.field2 = (pio_specs.tA + t) / t + 2; -- cfg.bytes.field3 = 1; -- cfg.bytes.field4 = (pio_specs.t4 + t) / t; -- -- immr->pata.pata_time2 = cfg.config; -- -- cfg.config = immr->pata.pata_time3; -- cfg.bytes.field1 = (pio_specs.t9 + t) / t; -- -- immr->pata.pata_time3 = cfg.config; -- debug ("PATA preinit complete.\n"); -- -- return 0; --} -- --#endif /* defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET) */ -diff --git a/board/ads5121/ads5121_diu.c b/board/ads5121/ads5121_diu.c -deleted file mode 100644 -index 41a1353..0000000 ---- a/board/ads5121/ads5121_diu.c -+++ /dev/null -@@ -1,193 +0,0 @@ --/* -- * Copyright 2008 Freescale Semiconductor, Inc. -- * York Sun -- * -- * FSL DIU Framebuffer driver -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --#include --#include -- --#ifdef CONFIG_FSL_DIU_FB -- --#include "../freescale/common/pixis.h" --#include "../freescale/common/fsl_diu_fb.h" -- --#if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) --#include --#include --#endif -- --#ifdef CONFIG_FSL_DIU_LOGO_BMP --extern unsigned int FSL_Logo_BMP[]; --#else --#define FSL_Logo_BMP NULL --#endif -- --static int xres, yres; -- --void diu_set_pixel_clock(unsigned int pixclock) --{ -- volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; -- volatile clk512x_t *clk = &immap->clk; -- volatile unsigned int *clkdvdr = &clk->scfr[0]; -- unsigned long speed_ccb, temp, pixval; -- -- speed_ccb = get_bus_freq(0) * 4; -- temp = 1000000000/pixclock; -- temp *= 1000; -- pixval = speed_ccb / temp; -- debug("DIU pixval = %lu\n", pixval); -- -- /* Modify PXCLK in GUTS CLKDVDR */ -- debug("DIU: Current value of CLKDVDR = 0x%08x\n", *clkdvdr); -- temp = *clkdvdr & 0xFFFFFF00; -- *clkdvdr = temp | (pixval & 0xFF); -- debug("DIU: Modified value of CLKDVDR = 0x%08x\n", *clkdvdr); --} -- --char *valid_bmp(char *addr) --{ -- unsigned long h_addr; -- -- h_addr = simple_strtoul(addr, NULL, 16); -- if (h_addr < CONFIG_SYS_FLASH_BASE || -- h_addr >= (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - 1)) { -- printf("bmp addr %lx is not a valid flash address\n", h_addr); -- return 0; -- } else if ((*(char *)(h_addr) != 'B') || (*(char *)(h_addr+1) != 'M')) { -- printf("bmp addr is not a bmp\n"); -- return 0; -- } else -- return (char *)h_addr; --} -- --int ads5121_diu_init(void) --{ -- unsigned int pixel_format; -- char *bmp = NULL; -- char *bmp_env; -- -- xres = 1024; -- yres = 768; -- pixel_format = 0x88883316; -- -- debug("ads5121_diu_init\n"); -- bmp_env = getenv("diu_bmp_addr"); -- if (bmp_env) { -- bmp = valid_bmp(bmp_env); -- } -- if (!bmp) -- bmp = FSL_Logo_BMP; -- return fsl_diu_init(xres, pixel_format, 0, (unsigned char *)bmp); --} -- --int ads5121diu_init_show_bmp(cmd_tbl_t *cmdtp, -- int flag, int argc, char *argv[]) --{ -- unsigned int addr; -- -- if (argc < 2) { -- cmd_usage(cmdtp); -- return 1; -- } -- -- if (!strncmp(argv[1], "init", 4)) { --#if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) -- fsl_diu_clear_screen(); -- drv_video_init(); --#else -- return ads5121_diu_init(); --#endif -- } else { -- addr = simple_strtoul(argv[1], NULL, 16); -- fsl_diu_clear_screen(); -- fsl_diu_display_bmp((unsigned char *)addr, 0, 0, 0); -- } -- -- return 0; --} -- --U_BOOT_CMD( -- diufb, CONFIG_SYS_MAXARGS, 1, ads5121diu_init_show_bmp, -- "Init or Display BMP file", -- "init\n - initialize DIU\n" -- "addr\n - display bmp at address 'addr'\n" -- ); -- -- --#if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) -- --/* -- * The Graphic Device -- */ --GraphicDevice ctfb; --void *video_hw_init(void) --{ -- GraphicDevice *pGD = (GraphicDevice *) &ctfb; -- struct fb_info *info; -- -- if (ads5121_diu_init() < 0) -- return; -- -- /* fill in Graphic device struct */ -- sprintf(pGD->modeIdent, "%dx%dx%d %ldkHz %ldHz", -- xres, yres, 32, 64, 60); -- -- pGD->frameAdrs = (unsigned int)fsl_fb_open(&info); -- pGD->winSizeX = xres; -- pGD->winSizeY = yres - info->logo_height; -- pGD->plnSizeX = pGD->winSizeX; -- pGD->plnSizeY = pGD->winSizeY; -- -- pGD->gdfBytesPP = 4; -- pGD->gdfIndex = GDF_32BIT_X888RGB; -- -- pGD->isaBase = 0; -- pGD->pciBase = 0; -- pGD->memSize = info->screen_size - info->logo_size; -- -- /* Cursor Start Address */ -- pGD->dprBase = 0; -- pGD->vprBase = 0; -- pGD->cprBase = 0; -- -- return (void *)pGD; --} -- --/** -- * Set the LUT -- * -- * @index: color number -- * @r: red -- * @b: blue -- * @g: green -- */ --void video_set_lut -- (unsigned int index, unsigned char r, unsigned char g, unsigned char b) --{ -- return; --} -- --#endif /* defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) */ -- --#endif /* CONFIG_FSL_DIU_FB */ -diff --git a/board/ads5121/config.mk b/board/ads5121/config.mk -deleted file mode 100644 -index 14998f4..0000000 ---- a/board/ads5121/config.mk -+++ /dev/null -@@ -1,23 +0,0 @@ --# --# (C) Copyright 2007 DENX Software Engineering --# --# See file CREDITS for list of people who contributed to this --# project. --# --# This program is free software; you can redistribute it and/or --# modify it under the terms of the GNU General Public License as --# published by the Free Software Foundation; either version 2 of --# the License, or (at your option) any later version. --# --# This program is distributed in the hope that it will be useful, --# but WITHOUT ANY WARRANTY; without even the implied warranty of --# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --# GNU General Public License for more details. --# --# You should have received a copy of the GNU General Public License --# along with this program; if not, write to the Free Software --# Foundation, Inc., 59 Temple Place, Suite 330, Boston, --# MA 02111-1307 USA --# -- --TEXT_BASE = 0xFFF00000 -diff --git a/board/ads5121/pci.c b/board/ads5121/pci.c -deleted file mode 100644 -index 806c428..0000000 ---- a/board/ads5121/pci.c -+++ /dev/null -@@ -1,213 +0,0 @@ --/* -- * Copyright (C) Freescale Semiconductor, Inc. 2006, 2007. All rights reserved. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include -- --#include --#include --#include --#if defined(CONFIG_OF_LIBFDT) --#include --#include --#endif -- --DECLARE_GLOBAL_DATA_PTR; -- --/* System RAM mapped to PCI space */ --#define CONFIG_PCI_SYS_MEM_BUS CONFIG_SYS_SDRAM_BASE --#define CONFIG_PCI_SYS_MEM_PHYS CONFIG_SYS_SDRAM_BASE -- --static struct pci_controller pci_hose; -- -- --/************************************************************************** -- * pci_init_board() -- * -- */ --void --pci_init_board(void) --{ -- volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; -- volatile law512x_t *pci_law; -- volatile pot512x_t *pci_pot; -- volatile pcictrl512x_t *pci_ctrl; -- volatile pciconf512x_t *pci_conf; -- u16 reg16; -- u32 reg32; -- u32 dev; -- struct pci_controller *hose; -- -- /* Set PCI divider for 33MHz */ -- reg32 = immr->clk.scfr[0]; -- reg32 &= ~(SCFR1_PCI_DIV_MASK); -- reg32 |= SCFR1_PCI_DIV << SCFR1_PCI_DIV_SHIFT; -- immr->clk.scfr[0] = reg32; -- -- pci_law = immr->sysconf.pcilaw; -- pci_pot = immr->ios.pot; -- pci_ctrl = &immr->pci_ctrl; -- pci_conf = &immr->pci_conf; -- -- hose = &pci_hose; -- -- /* -- * Release PCI RST Output signal -- */ -- pci_ctrl->gcr = 0; -- udelay(2000); -- pci_ctrl->gcr = 1; -- -- /* We need to wait at least a 1sec based on PCI specs */ -- { -- int i; -- -- for (i = 0; i < 1000; i++) -- udelay(1000); -- } -- -- /* -- * Configure PCI Local Access Windows -- */ -- pci_law[0].bar = CONFIG_SYS_PCI_MEM_PHYS & LAWBAR_BAR; -- pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_512M; -- -- pci_law[1].bar = CONFIG_SYS_PCI_IO_PHYS & LAWBAR_BAR; -- pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_16M; -- -- /* -- * Configure PCI Outbound Translation Windows -- */ -- -- /* PCI mem space - prefetch */ -- pci_pot[0].potar = (CONFIG_SYS_PCI_MEM_BASE >> 12) & POTAR_TA_MASK; -- pci_pot[0].pobar = (CONFIG_SYS_PCI_MEM_PHYS >> 12) & POBAR_BA_MASK; -- pci_pot[0].pocmr = POCMR_EN | POCMR_PRE | POCMR_CM_256M; -- -- /* PCI IO space */ -- pci_pot[1].potar = (CONFIG_SYS_PCI_IO_BASE >> 12) & POTAR_TA_MASK; -- pci_pot[1].pobar = (CONFIG_SYS_PCI_IO_PHYS >> 12) & POBAR_BA_MASK; -- pci_pot[1].pocmr = POCMR_EN | POCMR_IO | POCMR_CM_16M; -- -- /* PCI mmio - non-prefetch mem space */ -- pci_pot[2].potar = (CONFIG_SYS_PCI_MMIO_BASE >> 12) & POTAR_TA_MASK; -- pci_pot[2].pobar = (CONFIG_SYS_PCI_MMIO_PHYS >> 12) & POBAR_BA_MASK; -- pci_pot[2].pocmr = POCMR_EN | POCMR_CM_256M; -- -- /* -- * Configure PCI Inbound Translation Windows -- */ -- -- /* we need RAM mapped to PCI space for the devices to -- * access main memory */ -- pci_ctrl[0].pitar1 = 0x0; -- pci_ctrl[0].pibar1 = 0x0; -- pci_ctrl[0].piebar1 = 0x0; -- pci_ctrl[0].piwar1 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP | -- PIWAR_WTT_SNOOP | (__ilog2(gd->ram_size) - 1); -- -- hose->first_busno = 0; -- hose->last_busno = 0xff; -- -- /* PCI memory prefetch space */ -- pci_set_region(hose->regions + 0, -- CONFIG_SYS_PCI_MEM_BASE, -- CONFIG_SYS_PCI_MEM_PHYS, -- CONFIG_SYS_PCI_MEM_SIZE, -- PCI_REGION_MEM|PCI_REGION_PREFETCH); -- -- /* PCI memory space */ -- pci_set_region(hose->regions + 1, -- CONFIG_SYS_PCI_MMIO_BASE, -- CONFIG_SYS_PCI_MMIO_PHYS, -- CONFIG_SYS_PCI_MMIO_SIZE, -- PCI_REGION_MEM); -- -- /* PCI IO space */ -- pci_set_region(hose->regions + 2, -- CONFIG_SYS_PCI_IO_BASE, -- CONFIG_SYS_PCI_IO_PHYS, -- CONFIG_SYS_PCI_IO_SIZE, -- PCI_REGION_IO); -- -- /* System memory space */ -- pci_set_region(hose->regions + 3, -- CONFIG_PCI_SYS_MEM_BUS, -- CONFIG_PCI_SYS_MEM_PHYS, -- gd->ram_size, -- PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); -- -- hose->region_count = 4; -- -- pci_setup_indirect(hose, -- (CONFIG_SYS_IMMR + 0x8300), -- (CONFIG_SYS_IMMR + 0x8304)); -- -- pci_register_hose(hose); -- -- /* -- * Write to Command register -- */ -- reg16 = 0xff; -- dev = PCI_BDF(hose->first_busno, 0, 0); -- pci_hose_read_config_word(hose, dev, PCI_COMMAND, ®16); -- reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; -- pci_hose_write_config_word(hose, dev, PCI_COMMAND, reg16); -- -- /* -- * Clear non-reserved bits in status register. -- */ -- pci_hose_write_config_word(hose, dev, PCI_STATUS, 0xffff); -- pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80); -- pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, 0x08); -- --#ifdef CONFIG_PCI_SCAN_SHOW -- printf("PCI: Bus Dev VenId DevId Class Int\n"); --#endif -- /* -- * Hose scan. -- */ -- hose->last_busno = pci_hose_scan(hose); --} -- --#if defined(CONFIG_OF_LIBFDT) --void ft_pci_setup(void *blob, bd_t *bd) --{ -- int nodeoffset; -- int tmp[2]; -- const char *path; -- -- nodeoffset = fdt_path_offset(blob, "/aliases"); -- if (nodeoffset >= 0) { -- path = fdt_getprop(blob, nodeoffset, "pci", NULL); -- if (path) { -- tmp[0] = cpu_to_be32(pci_hose.first_busno); -- tmp[1] = cpu_to_be32(pci_hose.last_busno); -- do_fixup_by_path(blob, path, "bus-range", -- &tmp, sizeof(tmp), 1); -- -- tmp[0] = cpu_to_be32(gd->pci_clk); -- do_fixup_by_path(blob, path, "clock-frequency", -- &tmp, sizeof(tmp[0]), 1); -- } -- } --} --#endif /* CONFIG_OF_LIBFDT */ -diff --git a/board/ads5121/u-boot.lds b/board/ads5121/u-boot.lds -deleted file mode 100644 -index dae3269..0000000 ---- a/board/ads5121/u-boot.lds -+++ /dev/null -@@ -1,121 +0,0 @@ --/* -- * (C) Copyright 2007 DENX Software Engineering. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_ARCH(powerpc) --SECTIONS --{ -- /* Read-only sections, merged into text segment: */ -- . = + SIZEOF_HEADERS; -- .interp : { *(.interp) } -- .hash : { *(.hash) } -- .dynsym : { *(.dynsym) } -- .dynstr : { *(.dynstr) } -- .rel.text : { *(.rel.text) } -- .rela.text : { *(.rela.text) } -- .rel.data : { *(.rel.data) } -- .rela.data : { *(.rela.data) } -- .rel.rodata : { *(.rel.rodata) } -- .rela.rodata : { *(.rela.rodata) } -- .rel.got : { *(.rel.got) } -- .rela.got : { *(.rela.got) } -- .rel.ctors : { *(.rel.ctors) } -- .rela.ctors : { *(.rela.ctors) } -- .rel.dtors : { *(.rel.dtors) } -- .rela.dtors : { *(.rela.dtors) } -- .rel.bss : { *(.rel.bss) } -- .rela.bss : { *(.rela.bss) } -- .rel.plt : { *(.rel.plt) } -- .rela.plt : { *(.rela.plt) } -- .init : { *(.init) } -- .plt : { *(.plt) } -- .text : -- { -- cpu/mpc512x/start.o (.text) -- *(.text) -- *(.fixup) -- *(.got1) -- . = ALIGN(16); -- *(.eh_frame) -- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) -- } -- .fini : { *(.fini) } =0 -- .ctors : { *(.ctors) } -- .dtors : { *(.dtors) } -- -- /* Read-write section, merged into data segment: */ -- . = (. + 0x0FFF) & 0xFFFFF000; -- _erotext = .; -- PROVIDE (erotext = .); -- .reloc : -- { -- *(.got) -- _GOT2_TABLE_ = .; -- *(.got2) -- _FIXUP_TABLE_ = .; -- *(.fixup) -- } -- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2; -- __fixup_entries = (. - _FIXUP_TABLE_) >> 2; -- -- .data : -- { -- *(.data) -- *(.data1) -- *(.sdata) -- *(.sdata2) -- *(.dynamic) -- CONSTRUCTORS -- } -- _edata = .; -- PROVIDE (edata = .); -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- -- . = .; -- __start___ex_table = .; -- __ex_table : { *(__ex_table) } -- __stop___ex_table = .; -- -- . = ALIGN(4096); -- __init_begin = .; -- .text.init : { *(.text.init) } -- .data.init : { *(.data.init) } -- . = ALIGN(4096); -- __init_end = .; -- -- __bss_start = .; -- .bss (NOLOAD) : -- { -- *(.sbss) *(.scommon) -- *(.dynbss) -- *(.bss) -- *(COMMON) -- . = ALIGN(4); -- } -- _end = . ; -- PROVIDE (end = .); --} --ENTRY(_start) -diff --git a/board/amcc/acadia/cmd_acadia.c b/board/amcc/acadia/cmd_acadia.c -index d47cf1a..c427f9e 100644 ---- a/board/amcc/acadia/cmd_acadia.c -+++ b/board/amcc/acadia/cmd_acadia.c -@@ -97,5 +97,5 @@ static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - bootstrap, 3, 0, do_bootstrap, - "program the I2C bootstrap EEPROM", -- " - program the I2C bootstrap EEPROM\n" -- ); -+ " - program the I2C bootstrap EEPROM" -+); -diff --git a/board/amcc/canyonlands/bootstrap.c b/board/amcc/canyonlands/bootstrap.c -index 30046fe..6dc2cca 100644 ---- a/board/amcc/canyonlands/bootstrap.c -+++ b/board/amcc/canyonlands/bootstrap.c -@@ -191,5 +191,5 @@ static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - bootstrap, 2, 0, do_bootstrap, - "program the I2C bootstrap EEPROM", -- " - strap to boot from NAND or NOR flash\n" -- ); -+ " - strap to boot from NAND or NOR flash" -+); -diff --git a/board/amcc/katmai/cmd_katmai.c b/board/amcc/katmai/cmd_katmai.c -index 2c2849b..335d30c 100644 ---- a/board/amcc/katmai/cmd_katmai.c -+++ b/board/amcc/katmai/cmd_katmai.c -@@ -214,5 +214,5 @@ static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - bootstrap, 3, 1, do_bootstrap, - "program the serial device strap", -- "wrclk [prom0|prom1] - program the serial device strap\n" -- ); -+ "wrclk [prom0|prom1] - program the serial device strap" -+); -diff --git a/board/amcc/kilauea/cmd_pll.c b/board/amcc/kilauea/cmd_pll.c -index 6b38493..9bae67e 100644 ---- a/board/amcc/kilauea/cmd_pll.c -+++ b/board/amcc/kilauea/cmd_pll.c -@@ -291,7 +291,7 @@ U_BOOT_CMD( - RCONF: Read current eeprom configuration. \n\ - -----------------------------------------------\n\ - WTEST: Test EEPROM write with predefined values\n\ -- -----------------------------------------------\n" -- ); -+ -----------------------------------------------" -+); - - #endif /* CONFIG_CMD_EEPROM */ -diff --git a/board/amcc/luan/luan.c b/board/amcc/luan/luan.c -index d2a3b9e..7d02d90 100644 ---- a/board/amcc/luan/luan.c -+++ b/board/amcc/luan/luan.c -@@ -331,5 +331,5 @@ U_BOOT_CMD( - l2cache, 2, 1, do_l2cache, - "enable or disable L2 cache", - "[on, off]\n" -- " - enable or disable L2 cache\n" -- ); -+ " - enable or disable L2 cache" -+); -diff --git a/board/amcc/makalu/cmd_pll.c b/board/amcc/makalu/cmd_pll.c -index 6b38493..9bae67e 100644 ---- a/board/amcc/makalu/cmd_pll.c -+++ b/board/amcc/makalu/cmd_pll.c -@@ -291,7 +291,7 @@ U_BOOT_CMD( - RCONF: Read current eeprom configuration. \n\ - -----------------------------------------------\n\ - WTEST: Test EEPROM write with predefined values\n\ -- -----------------------------------------------\n" -- ); -+ -----------------------------------------------" -+); - - #endif /* CONFIG_CMD_EEPROM */ -diff --git a/board/amcc/sequoia/cmd_sequoia.c b/board/amcc/sequoia/cmd_sequoia.c -index 6dfd8ba..01dd97c 100644 ---- a/board/amcc/sequoia/cmd_sequoia.c -+++ b/board/amcc/sequoia/cmd_sequoia.c -@@ -227,5 +227,5 @@ static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - bootstrap, 2, 0, do_bootstrap, - "program the I2C bootstrap EEPROM", -- " - strap to boot from NAND or NOR flash\n" -- ); -+ " - strap to boot from NAND or NOR flash" -+); -diff --git a/board/amcc/sequoia/init.S b/board/amcc/sequoia/init.S -index 4452d26..3c0e400 100644 ---- a/board/amcc/sequoia/init.S -+++ b/board/amcc/sequoia/init.S -@@ -43,12 +43,19 @@ tlbtab: - /* vxWorks needs this as first entry for the Machine Check interrupt */ - tlbentry( 0x40000000, SZ_256M, 0, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) - -+ /* -+ * The RAM-boot version skips the SDRAM TLB (identified by EPN=0). This -+ * entry is already configured for SDRAM via the JTAG debugger and mustn't -+ * be re-initialized by this RAM-booting U-Boot version. -+ */ -+#ifndef CONFIG_SYS_RAMBOOT - /* TLB-entry for DDR SDRAM (Up to 2GB) */ - #ifdef CONFIG_4xx_DCACHE - tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G) - #else - tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) - #endif -+#endif /* CONFIG_SYS_RAMBOOT */ - - /* TLB-entry for EBC */ - tlbentry( CONFIG_SYS_BCSR_BASE, SZ_256M, CONFIG_SYS_BCSR_BASE, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) -diff --git a/board/amcc/sequoia/sdram.c b/board/amcc/sequoia/sdram.c -index 6df4c6d..bde471c 100644 ---- a/board/amcc/sequoia/sdram.c -+++ b/board/amcc/sequoia/sdram.c -@@ -54,7 +54,8 @@ extern void denali_core_search_data_eye(void); - ************************************************************************/ - phys_size_t initdram (int board_type) - { --#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL) -+#if !(defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_SYS_RAMBOOT)) || \ -+ defined(CONFIG_NAND_SPL) - ulong speed = get_bus_freq(0); - - mtsdram(DDR0_02, 0x00000000); -diff --git a/board/amcc/sequoia/sequoia.c b/board/amcc/sequoia/sequoia.c -index e824b8f..246ad94 100644 ---- a/board/amcc/sequoia/sequoia.c -+++ b/board/amcc/sequoia/sequoia.c -@@ -33,7 +33,9 @@ - - DECLARE_GLOBAL_DATA_PTR; - -+#if !defined(CONFIG_SYS_NO_FLASH) - extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ -+#endif - - extern void __ft_board_setup(void *blob, bd_t *bd); - ulong flash_get_size(ulong base, int banknum); -@@ -122,16 +124,19 @@ int board_early_init_f(void) - - int misc_init_r(void) - { -+#if !defined(CONFIG_SYS_NO_FLASH) - uint pbcr; - int size_val = 0; -- u32 reg; -+#endif - #ifdef CONFIG_440EPX - unsigned long usb2d0cr = 0; - unsigned long usb2phy0cr, usb2h0cr = 0; - unsigned long sdr0_pfc1; - char *act = getenv("usbact"); - #endif -+ u32 reg; - -+#if !defined(CONFIG_SYS_NO_FLASH) - /* Re-do flash sizing to get full correct info */ - - /* adjust flash start and offset */ -@@ -171,6 +176,7 @@ int misc_init_r(void) - CONFIG_ENV_ADDR_REDUND + 2*CONFIG_ENV_SECT_SIZE - 1, - &flash_info[0]); - #endif -+#endif /* CONFIG_SYS_NO_FLASH */ - - /* - * USB suff... -@@ -515,7 +521,7 @@ int post_hotkeys_pressed(void) - } - #endif /* CONFIG_POST */ - --#if defined(CONFIG_NAND_U_BOOT) -+#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_SYS_RAMBOOT) - /* - * On NAND-booting sequoia, we need to patch the chips select numbers - * in the dtb (CS0 - NAND, CS3 - NOR) -diff --git a/board/amcc/sequoia/u-boot-ram.lds b/board/amcc/sequoia/u-boot-ram.lds -new file mode 100644 -index 0000000..9393b65 ---- /dev/null -+++ b/board/amcc/sequoia/u-boot-ram.lds -@@ -0,0 +1,126 @@ -+/* -+ * (C) Copyright 2009 -+ * Stefan Roese, DENX Software Engineering, sr@denx.de. -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+OUTPUT_ARCH(powerpc) -+SECTIONS -+{ -+ /* Read-only sections, merged into text segment: */ -+ . = + SIZEOF_HEADERS; -+ .interp : { *(.interp) } -+ .hash : { *(.hash) } -+ .dynsym : { *(.dynsym) } -+ .dynstr : { *(.dynstr) } -+ .rel.text : { *(.rel.text) } -+ .rela.text : { *(.rela.text) } -+ .rel.data : { *(.rel.data) } -+ .rela.data : { *(.rela.data) } -+ .rel.rodata : { *(.rel.rodata) } -+ .rela.rodata : { *(.rela.rodata) } -+ .rel.got : { *(.rel.got) } -+ .rela.got : { *(.rela.got) } -+ .rel.ctors : { *(.rel.ctors) } -+ .rela.ctors : { *(.rela.ctors) } -+ .rel.dtors : { *(.rel.dtors) } -+ .rela.dtors : { *(.rela.dtors) } -+ .rel.bss : { *(.rel.bss) } -+ .rela.bss : { *(.rela.bss) } -+ .rel.plt : { *(.rel.plt) } -+ .rela.plt : { *(.rela.plt) } -+ .init : { *(.init) } -+ .plt : { *(.plt) } -+ .text : -+ { -+ cpu/ppc4xx/start.o (.text) -+ -+ *(.text) -+ *(.fixup) -+ *(.got1) -+ } -+ _etext = .; -+ PROVIDE (etext = .); -+ .rodata : -+ { -+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) -+ } -+ .fini : { *(.fini) } =0 -+ .ctors : { *(.ctors) } -+ .dtors : { *(.dtors) } -+ -+ /* Read-write section, merged into data segment: */ -+ . = (. + 0x00FF) & 0xFFFFFF00; -+ _erotext = .; -+ PROVIDE (erotext = .); -+ .reloc : -+ { -+ *(.got) -+ _GOT2_TABLE_ = .; -+ *(.got2) -+ _FIXUP_TABLE_ = .; -+ *(.fixup) -+ } -+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; -+ __fixup_entries = (. - _FIXUP_TABLE_)>>2; -+ -+ .data : -+ { -+ *(.data) -+ *(.data1) -+ *(.sdata) -+ *(.sdata2) -+ *(.dynamic) -+ CONSTRUCTORS -+ } -+ _edata = .; -+ PROVIDE (edata = .); -+ -+ . = .; -+ __u_boot_cmd_start = .; -+ .u_boot_cmd : { *(.u_boot_cmd) } -+ __u_boot_cmd_end = .; -+ -+ -+ . = .; -+ __start___ex_table = .; -+ __ex_table : { *(__ex_table) } -+ __stop___ex_table = .; -+ -+ . = ALIGN(256); -+ __init_begin = .; -+ .text.init : { *(.text.init) } -+ .data.init : { *(.data.init) } -+ . = ALIGN(256); -+ __init_end = .; -+ -+ __bss_start = .; -+ .bss (NOLOAD) : -+ { -+ *(.sbss) *(.scommon) -+ *(.dynbss) -+ *(.bss) -+ *(COMMON) -+ . = ALIGN(4); -+ } -+ -+ _end = . ; -+ PROVIDE (end = .); -+} -diff --git a/board/amcc/taihu/lcd.c b/board/amcc/taihu/lcd.c -index 6b68f33..c3dc983 100644 ---- a/board/amcc/taihu/lcd.c -+++ b/board/amcc/taihu/lcd.c -@@ -233,25 +233,25 @@ static int do_lcd_cur (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - lcd_cls, 1, 1, do_lcd_clear, - "lcd clear display", -- NULL -- ); -+ "" -+); - - U_BOOT_CMD( - lcd_puts, 2, 1, do_lcd_puts, - "display string on lcd", -- " - to be displayed\n" -- ); -+ " - to be displayed" -+); - - U_BOOT_CMD( - lcd_putc, 2, 1, do_lcd_putc, - "display char on lcd", -- " - to be displayed\n" -- ); -+ " - to be displayed" -+); - - U_BOOT_CMD( - lcd_cur, 3, 1, do_lcd_cur, - "shift cursor on lcd", - " - shift cursor on lcd times, direction is \n" - " - 0..31\n" -- " - 0=backward 1=forward\n" -- ); -+ " - 0=backward 1=forward" -+); -diff --git a/board/amcc/taihu/taihu.c b/board/amcc/taihu/taihu.c -index 669429b..d8806ac 100644 ---- a/board/amcc/taihu/taihu.c -+++ b/board/amcc/taihu/taihu.c -@@ -94,8 +94,8 @@ static int do_sw_stat(cmd_tbl_t* cmd_tp, int flags, int argc, char *argv[]) - U_BOOT_CMD ( - sw2_stat, 1, 1, do_sw_stat, - "show status of switch 2", -- NULL -- ); -+ "" -+); - - static int do_led_ctl(cmd_tbl_t* cmd_tp, int flags, int argc, char *argv[]) - { -@@ -134,8 +134,8 @@ U_BOOT_CMD ( - led_ctl, 3, 1, do_led_ctl, - "make led 1 or 2 on or off", - " - make led on/off,\n" -- "\tled_no is 1 or 2\t" -- ); -+ "\tled_no is 1 or 2" -+); - - #define SPI_CS_GPIO0 0 - #define SPI_SCLK_GPIO14 14 -diff --git a/board/amcc/taihu/update.c b/board/amcc/taihu/update.c -index 8e96905..f9c31b3 100644 ---- a/board/amcc/taihu/update.c -+++ b/board/amcc/taihu/update.c -@@ -128,5 +128,5 @@ static int update_boot_eeprom(cmd_tbl_t* cmdtp, int flag, int argc, char *argv[] - U_BOOT_CMD ( - update_boot_eeprom, 1, 1, update_boot_eeprom, - "update boot eeprom content", -- NULL -- ); -+ "" -+); -diff --git a/board/amcc/taishan/lcd.c b/board/amcc/taishan/lcd.c -index e4d0705..d432cc3 100644 ---- a/board/amcc/taishan/lcd.c -+++ b/board/amcc/taishan/lcd.c -@@ -254,18 +254,18 @@ static int do_lcd_cur(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - return 0; - } - --U_BOOT_CMD(lcd_test, 1, 1, do_lcd_test, "lcd test display", NULL); --U_BOOT_CMD(lcd_cls, 1, 1, do_lcd_clear, "lcd clear display", NULL); -+U_BOOT_CMD(lcd_test, 1, 1, do_lcd_test, "lcd test display", ""); -+U_BOOT_CMD(lcd_cls, 1, 1, do_lcd_clear, "lcd clear display", ""); - U_BOOT_CMD(lcd_puts, 2, 1, do_lcd_puts, - "display string on lcd", -- " - to be displayed\n"); -+ " - to be displayed"); - U_BOOT_CMD(lcd_putc, 2, 1, do_lcd_putc, - "display char on lcd", -- " - to be displayed\n"); -+ " - to be displayed"); - U_BOOT_CMD(lcd_cur, 3, 1, do_lcd_cur, - "shift cursor on lcd", - " - shift cursor on lcd times, direction is \n" -- " - 0~31\n" " - 0,backward; 1, forward\n"); -+ " - 0~31\n" " - 0,backward; 1, forward"); - - #if 0 /* test-only */ - void set_phy_loopback_mode(void) -@@ -373,8 +373,8 @@ static int do_led_test_on(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - } - - U_BOOT_CMD(ledon, 1, 1, do_led_test_on, -- "led test light on", NULL); -+ "led test light on", ""); - - U_BOOT_CMD(ledoff, 1, 1, do_led_test_off, -- "led test light off", NULL); -+ "led test light off", ""); - #endif -diff --git a/board/amcc/taishan/showinfo.c b/board/amcc/taishan/showinfo.c -index b471c95..2a78a22 100644 ---- a/board/amcc/taishan/showinfo.c -+++ b/board/amcc/taishan/showinfo.c -@@ -168,7 +168,7 @@ int do_show_xbridge_info(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - } - - U_BOOT_CMD(xbriinfo, 1, 1, do_show_xbridge_info, -- "Show PCIX bridge info", NULL); -+ "Show PCIX bridge info", ""); - - #define TAISHAN_PCI_DEV_ID0 0x800 - #define TAISHAN_PCI_DEV_ID1 0x1000 -@@ -222,7 +222,7 @@ int do_show_pcix_device_info(cmd_tbl_t * cmdtp, int flag, int argc, - } - - U_BOOT_CMD(xdevinfo, 1, 1, do_show_pcix_device_info, -- "Show PCIX Device info", NULL); -+ "Show PCIX Device info", ""); - - extern void show_reset_reg(void); - -@@ -233,4 +233,4 @@ int do_show_reset_reg_info(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - } - - U_BOOT_CMD(resetinfo, 1, 1, do_show_reset_reg_info, -- "Show Reset REG info", NULL); -+ "Show Reset REG info", ""); -diff --git a/board/amcc/taishan/update.c b/board/amcc/taishan/update.c -index 63f8744..aab3a65 100644 ---- a/board/amcc/taishan/update.c -+++ b/board/amcc/taishan/update.c -@@ -74,5 +74,5 @@ int do_update_boot_eeprom(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - } - - U_BOOT_CMD(update_boot_eeprom, 1, 1, do_update_boot_eeprom, -- "update bootstrap eeprom content", NULL); -+ "update bootstrap eeprom content", ""); - #endif -diff --git a/board/amcc/yucca/cmd_yucca.c b/board/amcc/yucca/cmd_yucca.c -index d2ca257..ed6daa3 100644 ---- a/board/amcc/yucca/cmd_yucca.c -+++ b/board/amcc/yucca/cmd_yucca.c -@@ -282,5 +282,5 @@ static int setBootStrapClock(cmd_tbl_t *cmdtp, int incrflag, int flag, - U_BOOT_CMD( - evb440spe, 3, 1, do_evb440spe, - "program the serial device strap", -- "wrclk [prom0|prom1] - program the serial device strap\n" -+ "wrclk [prom0|prom1] - program the serial device strap" - ); -diff --git a/board/amirix/ap1000/ap1000.c b/board/amirix/ap1000/ap1000.c -index fcf2698..cadfe0b 100644 ---- a/board/amirix/ap1000/ap1000.c -+++ b/board/amirix/ap1000/ap1000.c -@@ -670,14 +670,14 @@ U_BOOT_CMD (temp, 6, 0, do_temp_sensor, - " - Set config options.\n" - "\n" - "All values can be decimal or hex (hex preceded with 0x).\n" -- "Only whole numbers are supported for external limits.\n"); -+ "Only whole numbers are supported for external limits."); - - #if 0 - U_BOOT_CMD (loadace, 2, 0, do_loadace, - "load fpga configuration from System ACE compact flash", - "N\n" - " - Load configuration N (0-7) from System ACE compact flash\n" -- "loadace\n" " - loads default configuration\n"); -+ "loadace\n" " - loads default configuration"); - #endif - - U_BOOT_CMD (swconfig, 2, 0, do_swconfigbyte, -@@ -685,19 +685,19 @@ U_BOOT_CMD (swconfig, 2, 0, do_swconfigbyte, - "N [ADDRESS]\n" - " - set software configuration byte to N, optionally use ADDRESS as\n" - " location of buffer for flash copy\n" -- "swconfig\n" " - display software configuration byte\n"); -+ "swconfig\n" " - display software configuration byte"); - - U_BOOT_CMD (pause, 2, 0, do_pause, - "sleep processor until any key is pressed with poll time of N seconds", - "N\n" - " - sleep processor until any key is pressed with poll time of N seconds\n" - "pause\n" -- " - sleep processor until any key is pressed with poll time of 1 second\n"); -+ " - sleep processor until any key is pressed with poll time of 1 second"); - - U_BOOT_CMD (swrecon, 1, 0, do_swreconfig, - "trigger a board reconfigure to the software selected configuration", - "\n" -- " - trigger a board reconfigure to the software selected configuration\n"); -+ " - trigger a board reconfigure to the software selected configuration"); - - int board_eth_init(bd_t *bis) - { -diff --git a/board/amirix/ap1000/powerspan.c b/board/amirix/ap1000/powerspan.c -index f727061..28e2bbc 100644 ---- a/board/amirix/ap1000/powerspan.c -+++ b/board/amirix/ap1000/powerspan.c -@@ -487,7 +487,7 @@ U_BOOT_CMD (eeprom, 4, 0, do_eeprom, - " - store contents of eeprom at address ADD\n" - "eeprom p ADD\n" - " - put data stored at address ADD into the eeprom\n" -- "eeprom d\n" " - return eeprom to default contents\n"); -+ "eeprom d\n" " - return eeprom to default contents"); - - unsigned int PowerSpanRead (unsigned int theOffset) - { -diff --git a/board/apollon/u-boot.lds b/board/apollon/u-boot.lds -deleted file mode 100644 -index 50ad16b..0000000 ---- a/board/apollon/u-boot.lds -+++ /dev/null -@@ -1,63 +0,0 @@ --/* -- * -- * Copyright (C) 2005-2007 Samsung Electronics -- * Kyungin Park -- * -- * January 2004 - Changed to support H4 device -- * Copyright (c) 2004 Texas Instruments -- * -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm1136/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/armadillo/u-boot.lds b/board/armadillo/u-boot.lds -deleted file mode 100644 -index cb5a3ba..0000000 ---- a/board/armadillo/u-boot.lds -+++ /dev/null -@@ -1,55 +0,0 @@ --/* -- * (C) Copyright 2000 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm720t/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/armltd/integratorap/config.mk b/board/armltd/integratorap/config.mk -index e4c5c3b..25b79b3 100644 ---- a/board/armltd/integratorap/config.mk -+++ b/board/armltd/integratorap/config.mk -@@ -3,9 +3,3 @@ - # - - TEXT_BASE = 0x01000000 -- --ifneq ($(OBJTREE),$(SRCTREE)) --# We are building u-boot in a separate directory, use generated --# .lds script from OBJTREE directory. --LDSCRIPT := $(OBJTREE)/board/$(BOARDDIR)/u-boot.lds --endif -diff --git a/board/armltd/integratorap/integratorap.c b/board/armltd/integratorap/integratorap.c -index 9631967..5ececd6 100644 ---- a/board/armltd/integratorap/integratorap.c -+++ b/board/armltd/integratorap/integratorap.c -@@ -540,7 +540,7 @@ static ulong div_timer = 1; /* Divisor to convert timer reading - * - the Integrator/AP timer issues an interrupt - * each time it reaches zero - */ --int interrupt_init (void) -+int timer_init (void) - { - /* Load timer with initial value */ - *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 0) = TIMER_LOAD_VAL; -diff --git a/board/armltd/integratorap/split_by_variant.sh b/board/armltd/integratorap/split_by_variant.sh -index 2c9fe2e..2f86b52 100755 ---- a/board/armltd/integratorap/split_by_variant.sh -+++ b/board/armltd/integratorap/split_by_variant.sh -@@ -120,10 +120,6 @@ mkdir -p ${obj}include - mkdir -p ${obj}board/armltd/integratorap - mv tmp.fil ${obj}include/config.h - # --------------------------------------------------------- --# Ensure correct core object loaded first in U-Boot image --# --------------------------------------------------------- --sed -r 's/CPU_FILE/cpu\/'$cpu'\/start.o/; s/#.*//' ${src}board/armltd/integratorap/u-boot.lds.template > ${obj}board/armltd/integratorap/u-boot.lds --# --------------------------------------------------------- - # Complete the configuration - # --------------------------------------------------------- - $MKCONFIG -a integratorap arm $cpu integratorap armltd; -diff --git a/board/armltd/integratorap/u-boot.lds.template b/board/armltd/integratorap/u-boot.lds.template -deleted file mode 100644 -index e51c670..0000000 ---- a/board/armltd/integratorap/u-boot.lds.template -+++ /dev/null -@@ -1,53 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ --# Template used during configuration to emsure the core module processor code, --# from CPU_FILE, is placed at the start of the image */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- . = ALIGN(4); -- .text : -- { -- CPU_FILE (.text) -- *(.text) -- } -- .rodata : { *(.rodata) } -- . = ALIGN(4); -- .data : { *(.data) } -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss : { *(.bss) } -- _end = .; --} -diff --git a/board/armltd/integratorcp/config.mk b/board/armltd/integratorcp/config.mk -index e4c5c3b..25b79b3 100644 ---- a/board/armltd/integratorcp/config.mk -+++ b/board/armltd/integratorcp/config.mk -@@ -3,9 +3,3 @@ - # - - TEXT_BASE = 0x01000000 -- --ifneq ($(OBJTREE),$(SRCTREE)) --# We are building u-boot in a separate directory, use generated --# .lds script from OBJTREE directory. --LDSCRIPT := $(OBJTREE)/board/$(BOARDDIR)/u-boot.lds --endif -diff --git a/board/armltd/integratorcp/integratorcp.c b/board/armltd/integratorcp/integratorcp.c -index 72629ce..0d3afd8 100644 ---- a/board/armltd/integratorcp/integratorcp.c -+++ b/board/armltd/integratorcp/integratorcp.c -@@ -163,7 +163,7 @@ static ulong timestamp; /* U-Boot ticks since startup */ - - /* starts up a counter - * - the Integrator/CP timer can be set up to issue an interrupt */ --int interrupt_init (void) -+int timer_init (void) - { - /* Load timer with initial value */ - *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 0) = TIMER_LOAD_VAL; -diff --git a/board/armltd/integratorcp/split_by_variant.sh b/board/armltd/integratorcp/split_by_variant.sh -index 34422fd..13effef 100755 ---- a/board/armltd/integratorcp/split_by_variant.sh -+++ b/board/armltd/integratorcp/split_by_variant.sh -@@ -103,10 +103,6 @@ mkdir -p ${obj}include - mkdir -p ${obj}board/armltd/integratorcp - mv tmp.fil ${obj}include/config.h - # --------------------------------------------------------- --# Ensure correct core object loaded first in U-Boot image --# --------------------------------------------------------- --sed -r 's/CPU_FILE/cpu\/'$cpu'\/start.o/; s/#.*//' ${src}board/armltd/integratorcp/u-boot.lds.template > ${obj}board/armltd/integratorcp/u-boot.lds --# --------------------------------------------------------- - # Complete the configuration - # --------------------------------------------------------- - $MKCONFIG -a integratorcp arm $cpu integratorcp armltd; -diff --git a/board/armltd/integratorcp/u-boot.lds.template b/board/armltd/integratorcp/u-boot.lds.template -deleted file mode 100644 -index e51c670..0000000 ---- a/board/armltd/integratorcp/u-boot.lds.template -+++ /dev/null -@@ -1,53 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ --# Template used during configuration to emsure the core module processor code, --# from CPU_FILE, is placed at the start of the image */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- . = ALIGN(4); -- .text : -- { -- CPU_FILE (.text) -- *(.text) -- } -- .rodata : { *(.rodata) } -- . = ALIGN(4); -- .data : { *(.data) } -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss : { *(.bss) } -- _end = .; --} -diff --git a/board/armltd/versatile/u-boot.lds b/board/armltd/versatile/u-boot.lds -deleted file mode 100644 -index 0477124..0000000 ---- a/board/armltd/versatile/u-boot.lds -+++ /dev/null -@@ -1,51 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- . = ALIGN(4); -- .text : -- { -- cpu/arm926ejs/start.o (.text) -- *(.text) -- } -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- . = ALIGN(4); -- .data : { *(.data) } -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/assabet/u-boot.lds b/board/assabet/u-boot.lds -deleted file mode 100644 -index bd97436..0000000 ---- a/board/assabet/u-boot.lds -+++ /dev/null -@@ -1,58 +0,0 @@ --/* -- * (C) Copyright 2000-2004 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * 2004 (c) MontaVista Software, Inc. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/sa1100/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/atmel/at91cap9adk/at91cap9adk.c b/board/atmel/at91cap9adk/at91cap9adk.c -index f52edaa..9f73df6 100644 ---- a/board/atmel/at91cap9adk/at91cap9adk.c -+++ b/board/atmel/at91cap9adk/at91cap9adk.c -@@ -61,7 +61,6 @@ static void at91cap9_slowclock_hw_init(void) - if (at91_sys_read(AT91_PMC_VER) == ARCH_ID_AT91CAP9_REVC) { - unsigned i, tmp = at91_sys_read(AT91_SCKCR); - if ((tmp & AT91CAP9_SCKCR_OSCSEL) == AT91CAP9_SCKCR_OSCSEL_RC) { -- extern void timer_init(void); - timer_init(); - tmp |= AT91CAP9_SCKCR_OSC32EN; - at91_sys_write(AT91_SCKCR, tmp); -diff --git a/board/atmel/at91rm9200dk/u-boot.lds b/board/atmel/at91rm9200dk/u-boot.lds -deleted file mode 100644 -index b8cacf1..0000000 ---- a/board/atmel/at91rm9200dk/u-boot.lds -+++ /dev/null -@@ -1,57 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/ --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm920t/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/atmel/at91rm9200ek/u-boot.lds b/board/atmel/at91rm9200ek/u-boot.lds -deleted file mode 100644 -index c35896b..0000000 ---- a/board/atmel/at91rm9200ek/u-boot.lds -+++ /dev/null -@@ -1,56 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm920t/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(.rodata) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss : { *(.bss) } -- _end = .; --} -diff --git a/board/barco/barco.c b/board/barco/barco.c -index a19e1ed..d7a0078 100644 ---- a/board/barco/barco.c -+++ b/board/barco/barco.c -@@ -307,19 +307,19 @@ int barcobcd_boot_image (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD ( - try_working, 1, 1, barcobcd_boot_image, - "check flash value and boot the appropriate image", -- "\n" -+ "" - ); - - U_BOOT_CMD ( - boot_working, 1, 1, barcobcd_boot_image, - "check flash value and boot the appropriate image", -- "\n" -+ "" - ); - - U_BOOT_CMD ( - boot_default, 1, 1, barcobcd_boot_image, - "check flash value and boot the appropriate image", -- "\n" -+ "" - ); - /* - * We are not using serial communication, so just provide empty functions -diff --git a/board/bc3450/cmd_bc3450.c b/board/bc3450/cmd_bc3450.c -index aa46e58..271ffb1 100644 ---- a/board/bc3450/cmd_bc3450.c -+++ b/board/bc3450/cmd_bc3450.c -@@ -198,7 +198,7 @@ U_BOOT_CMD (dip, 1, 1, cmd_dip, - "\n" - " - prints the state of the dip switch and/or\n" - " external configuration inputs as hex value.\n" -- " - \"Config 1\" is the LSB\n"); -+ " - \"Config 1\" is the LSB"); - - - /* -@@ -229,7 +229,7 @@ static int cmd_buz (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - - U_BOOT_CMD (buz, 2, 1, cmd_buz, - "turns buzzer on/off", -- "\n" "buz \n" " - turns the buzzer on or off\n"); -+ "\n" "buz \n" " - turns the buzzer on or off"); - #endif /* CONFIG_BC3450_BUZZER */ - - -@@ -326,14 +326,14 @@ U_BOOT_CMD (fp, 3, 1, cmd_fp, - "\n" - "fp bl \n" - " - turns the CCFL backlight of the display on/off\n" -- "fp \n" " - turns the whole display on/off\n" -+ "fp \n" " - turns the whole display on/off" - #ifdef CONFIG_BC3450_CRT -+ "\n" - "fp crt \n" -- " - enables/disables the crt output (debug only)\n" -+ " - enables/disables the crt output (debug only)" - #endif /* CONFIG_BC3450_CRT */ - ); - -- - /* - * temp - DS1620 thermometer - */ -@@ -524,7 +524,7 @@ static int cmd_temp (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - - U_BOOT_CMD (temp, 3, 1, cmd_temp, - "print current temperature", -- "\n" "temp\n" " - print current temperature\n"); -+ "\n" "temp\n" " - print current temperature"); - - #ifdef CONFIG_BC3450_CAN - /* -@@ -818,10 +818,11 @@ int cmd_test (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - - U_BOOT_CMD (test, 2, 1, cmd_test, "unit test routines", "\n" - #ifdef CONFIG_BC3450_CAN -- "test can\n" -- " - connect CAN1 (X8) with CAN2 (X9) for this test\n" -+ "test can\n" -+ " - connect CAN1 (X8) with CAN2 (X9) for this test\n" - #endif /* CONFIG_BC3450_CAN */ -- "test unit-off\n" -- " - turns off the BC3450 unit\n" -- " WARNING: Unsaved environment variables will be lost!\n"); -+ "test unit-off\n" -+ " - turns off the BC3450 unit\n" -+ " WARNING: Unsaved environment variables will be lost!" -+); - #endif -diff --git a/board/bf537-stamp/cmd_bf537led.c b/board/bf537-stamp/cmd_bf537led.c -index e77bb0c..e65c4f8 100644 ---- a/board/bf537-stamp/cmd_bf537led.c -+++ b/board/bf537-stamp/cmd_bf537led.c -@@ -33,7 +33,7 @@ - "led \n" \ - " - Index (0-5) of LED to change, or \"all\"\n" \ - " - Must be one of:\n" \ -- " on off toggle\n" -+ " on off toggle" - - /* Number of LEDs supported by the board */ - #define NUMBER_LEDS 6 -@@ -191,7 +191,7 @@ void set_led_state(int index, int state) - /* Display usage information */ - void show_cmd_usage() - { -- printf("Usage:\n%s", USAGE_LONG); -+ printf("Usage:\n%s\n", USAGE_LONG); - } - - /* Register information for u-boot to find this command */ -diff --git a/board/cerf250/u-boot.lds b/board/cerf250/u-boot.lds -deleted file mode 100644 -index a077bc5..0000000 ---- a/board/cerf250/u-boot.lds -+++ /dev/null -@@ -1,56 +0,0 @@ --/* -- * (C) Copyright 2000 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/pxa/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/cm4008/u-boot.lds b/board/cm4008/u-boot.lds -deleted file mode 100644 -index e96c45f..0000000 ---- a/board/cm4008/u-boot.lds -+++ /dev/null -@@ -1,56 +0,0 @@ --/* -- * (C) Copyright 2000 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm920t/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/cm41xx/u-boot.lds b/board/cm41xx/u-boot.lds -deleted file mode 100644 -index e96c45f..0000000 ---- a/board/cm41xx/u-boot.lds -+++ /dev/null -@@ -1,56 +0,0 @@ --/* -- * (C) Copyright 2000 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm920t/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/cm5200/cmd_cm5200.c b/board/cm5200/cmd_cm5200.c -index 52f031c..cd98ae2 100644 ---- a/board/cm5200/cmd_cm5200.c -+++ b/board/cm5200/cmd_cm5200.c -@@ -29,7 +29,7 @@ - - #ifdef CONFIG_CMD_BSP - --int do_i2c(char *argv[]) -+static int do_i2c_test(char *argv[]) - { - unsigned char temp, temp1; - -@@ -57,7 +57,7 @@ int do_i2c(char *argv[]) - return 0; - } - --int do_usbtest(char *argv[]) -+static int do_usb_test(char *argv[]) - { - int i; - static int usb_stor_curr_dev = -1; /* current device */ -@@ -90,7 +90,7 @@ int do_usbtest(char *argv[]) - return 0; - } - --int do_led(char *argv[]) -+static int do_led_test(char *argv[]) - { - int i = 0; - struct mpc5xxx_gpt_0_7 *gpt = (struct mpc5xxx_gpt_0_7 *)MPC5XXX_GPT; -@@ -134,7 +134,7 @@ int do_led(char *argv[]) - return 0; - } - --int do_rs232(char *argv[]) -+static int do_rs232_test(char *argv[]) - { - int error_status = 0; - struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO; -@@ -397,22 +397,22 @@ int do_rs232(char *argv[]) - return error_status; - } - --int cmd_fkt(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -+static int cmd_fkt(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - { - int rcode = -1; - - switch (argc) { - case 2: - if (strncmp(argv[1], "i2c", 3) == 0) -- rcode = do_i2c(argv); -+ rcode = do_i2c_test(argv); - else if (strncmp(argv[1], "led", 3) == 0) -- rcode = do_led(argv); -+ rcode = do_led_test(argv); - else if (strncmp(argv[1], "usb", 3) == 0) -- rcode = do_usbtest(argv); -+ rcode = do_usb_test(argv); - break; - case 3: - if (strncmp(argv[1], "rs232", 3) == 0) -- rcode = do_rs232(argv); -+ rcode = do_rs232_test(argv); - break; - } - -@@ -443,6 +443,6 @@ U_BOOT_CMD( - "fkt rs232 number\n" - " - Test RS232 (loopback plug(s) for RS232 required)\n" - "fkt usb\n" -- " - Test USB communication\n" -+ " - Test USB communication" - ); - #endif /* CONFIG_CMD_BSP */ -diff --git a/board/cmc_pu2/u-boot.lds b/board/cmc_pu2/u-boot.lds -deleted file mode 100644 -index b8cacf1..0000000 ---- a/board/cmc_pu2/u-boot.lds -+++ /dev/null -@@ -1,57 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/ --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm920t/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/cradle/u-boot.lds b/board/cradle/u-boot.lds -deleted file mode 100644 -index a077bc5..0000000 ---- a/board/cradle/u-boot.lds -+++ /dev/null -@@ -1,56 +0,0 @@ --/* -- * (C) Copyright 2000 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/pxa/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/csb226/u-boot.lds b/board/csb226/u-boot.lds -deleted file mode 100644 -index a077bc5..0000000 ---- a/board/csb226/u-boot.lds -+++ /dev/null -@@ -1,56 +0,0 @@ --/* -- * (C) Copyright 2000 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/pxa/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/csb637/u-boot.lds b/board/csb637/u-boot.lds -deleted file mode 100644 -index 12aca2e..0000000 ---- a/board/csb637/u-boot.lds -+++ /dev/null -@@ -1,56 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/ --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm920t/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/dave/B2/u-boot.lds b/board/dave/B2/u-boot.lds -deleted file mode 100644 -index 1690b6e..0000000 ---- a/board/dave/B2/u-boot.lds -+++ /dev/null -@@ -1,58 +0,0 @@ --/* -- * (C) Copyright 2000-2004 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/s3c44b0/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- armboot_end_data = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/davedenx/aria/Makefile b/board/davedenx/aria/Makefile -new file mode 100644 -index 0000000..2e3d73a ---- /dev/null -+++ b/board/davedenx/aria/Makefile -@@ -0,0 +1,50 @@ -+# -+# (C) Copyright 2009 Wolfgang Denk -+# -+# See file CREDITS for list of people who contributed to this -+# project. -+# -+# This program is free software; you can redistribute it and/or -+# modify it under the terms of the GNU General Public License as -+# published by the Free Software Foundation; either version 2 of -+# the License, or (at your option) any later version. -+# -+# This program is distributed in the hope that it will be useful, -+# but WITHOUT ANY WARRANTY; without even the implied warranty of -+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+# GNU General Public License for more details. -+# -+# You should have received a copy of the GNU General Public License -+# along with this program; if not, write to the Free Software -+# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+# MA 02111-1307 USA -+# -+ -+include $(TOPDIR)/config.mk -+ -+LIB = $(obj)lib$(BOARD).a -+ -+COBJS-y := $(BOARD).o -+ -+COBJS := $(COBJS-y) -+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -+OBJS := $(addprefix $(obj),$(COBJS)) -+SOBJS := $(addprefix $(obj),$(SOBJS)) -+ -+$(LIB): $(obj).depend $(OBJS) -+ $(AR) $(ARFLAGS) $@ $(OBJS) -+ -+clean: -+ rm -f $(SOBJS) $(OBJS) -+ -+distclean: clean -+ rm -f $(LIB) core *.bak $(obj).depend -+ -+######################################################################### -+ -+# defines $(obj).depend target -+include $(SRCTREE)/rules.mk -+ -+sinclude $(obj).depend -+ -+######################################################################### -diff --git a/board/davedenx/aria/aria.c b/board/davedenx/aria/aria.c -new file mode 100644 -index 0000000..f44c352 ---- /dev/null -+++ b/board/davedenx/aria/aria.c -@@ -0,0 +1,316 @@ -+/* -+ * (C) Copyright 2009 Wolfgang Denk -+ * (C) Copyright 2009 Dave Srl www.dave.eu -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#ifdef CONFIG_MISC_INIT_R -+#include -+#endif -+ -+DECLARE_GLOBAL_DATA_PTR; -+ -+extern int mpc5121_diu_init(void); -+extern void ide_set_reset(int idereset); -+ -+/* Clocks in use */ -+#define SCCR1_CLOCKS_EN (CLOCK_SCCR1_CFG_EN | \ -+ CLOCK_SCCR1_LPC_EN | \ -+ CLOCK_SCCR1_PSC_EN(CONFIG_PSC_CONSOLE) | \ -+ CLOCK_SCCR1_PSCFIFO_EN | \ -+ CLOCK_SCCR1_DDR_EN | \ -+ CLOCK_SCCR1_FEC_EN | \ -+ CLOCK_SCCR1_PATA_EN | \ -+ CLOCK_SCCR1_PCI_EN | \ -+ CLOCK_SCCR1_TPR_EN) -+ -+#define SCCR2_CLOCKS_EN (CLOCK_SCCR2_MEM_EN | \ -+ CLOCK_SCCR2_SPDIF_EN | \ -+ CLOCK_SCCR2_DIU_EN | \ -+ CLOCK_SCCR2_I2C_EN) -+ -+#define CSAW_START(start) ((start) & 0xFFFF0000) -+#define CSAW_STOP(start, size) (((start) + (size) - 1) >> 16) -+ -+long int fixed_sdram(void); -+ -+int board_early_init_f(void) -+{ -+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; -+ u32 spridr; -+ -+ /* -+ * Initialize Local Window for the On Board FPGA access -+ */ -+ out_be32(&im->sysconf.lpcs2aw, -+ CSAW_START(CONFIG_SYS_ARIA_FPGA_BASE) | -+ CSAW_STOP(CONFIG_SYS_ARIA_FPGA_BASE, CONFIG_SYS_ARIA_FPGA_SIZE) -+ ); -+ out_be32(&im->lpc.cs_cfg[2], CONFIG_SYS_CS2_CFG); -+ -+ /* -+ * According to MPC5121e RM, configuring local access windows should -+ * be followed by a dummy read of the config register that was -+ * modified last and an isync -+ */ -+ in_be32(&im->sysconf.lpcs2aw); -+ __asm__ __volatile__ ("isync"); -+ -+ /* -+ * Initialize Local Window for the On Board SRAM access -+ */ -+ out_be32(&im->sysconf.lpcs6aw, -+ CSAW_START(CONFIG_SYS_ARIA_SRAM_BASE) | -+ CSAW_STOP(CONFIG_SYS_ARIA_SRAM_BASE, CONFIG_SYS_ARIA_SRAM_SIZE) -+ ); -+ out_be32(&im->lpc.cs_cfg[6], CONFIG_SYS_CS6_CFG); -+ -+ /* -+ * According to MPC5121e RM, configuring local access windows should -+ * be followed by a dummy read of the config register that was -+ * modified last and an isync -+ */ -+ in_be32(&im->sysconf.lpcs6aw); -+ __asm__ __volatile__ ("isync"); -+ -+ /* -+ * Configure Flash Speed -+ */ -+ out_be32(&im->lpc.cs_cfg[0], CONFIG_SYS_CS0_CFG); -+ -+ spridr = in_be32(&im->sysconf.spridr); -+ -+ if (SVR_MJREV(spridr) >= 2) -+ out_be32(&im->lpc.altr, CONFIG_SYS_CS_ALETIMING); -+ -+ /* -+ * Enable clocks -+ */ -+ out_be32(&im->clk.sccr[0], SCCR1_CLOCKS_EN); -+ out_be32(&im->clk.sccr[1], SCCR2_CLOCKS_EN); -+#if defined(CONFIG_IIM) || defined(CONFIG_CMD_FUSE) -+ setbits_be32(&im->clk.sccr[1], CLOCK_SCCR2_IIM_EN); -+#endif -+ -+ return 0; -+} -+ -+phys_size_t initdram (int board_type) -+{ -+ return fixed_sdram(); -+} -+ -+/* -+ * fixed sdram init: -+ * The board doesn't use memory modules that have serial presence -+ * detect or similar mechanism for discovery of the DRAM settings -+ */ -+long int fixed_sdram (void) -+{ -+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; -+ u32 msize = CONFIG_SYS_DDR_SIZE * 1024 * 1024; -+ u32 msize_log2 = __ilog2(msize); -+ u32 i; -+ -+ /* Initialize IO Control */ -+ out_be32(&im->io_ctrl.io_control_mem, IOCTRL_MUX_DDR); -+ -+ /* Initialize DDR Local Window */ -+ out_be32(&im->sysconf.ddrlaw.bar, CONFIG_SYS_DDR_BASE & 0xFFFFF000); -+ out_be32(&im->sysconf.ddrlaw.ar, msize_log2 - 1); -+ -+ /* -+ * According to MPC5121e RM, configuring local access windows should -+ * be followed by a dummy read of the config register that was -+ * modified last and an isync -+ */ -+ in_be32(&im->sysconf.ddrlaw.ar); -+ __asm__ __volatile__ ("isync"); -+ -+ /* Enable DDR */ -+ out_be32(&im->mddrc.ddr_sys_config, CONFIG_SYS_MDDRC_SYS_CFG_EN); -+ -+ /* Initialize DDR Priority Manager */ -+ out_be32(&im->mddrc.prioman_config1, CONFIG_SYS_MDDRCGRP_PM_CFG1); -+ out_be32(&im->mddrc.prioman_config2, CONFIG_SYS_MDDRCGRP_PM_CFG2); -+ out_be32(&im->mddrc.hiprio_config, CONFIG_SYS_MDDRCGRP_HIPRIO_CFG); -+ out_be32(&im->mddrc.lut_table0_main_upper, CONFIG_SYS_MDDRCGRP_LUT0_MU); -+ out_be32(&im->mddrc.lut_table0_main_lower, CONFIG_SYS_MDDRCGRP_LUT0_ML); -+ out_be32(&im->mddrc.lut_table1_main_upper, CONFIG_SYS_MDDRCGRP_LUT1_MU); -+ out_be32(&im->mddrc.lut_table1_main_lower, CONFIG_SYS_MDDRCGRP_LUT1_ML); -+ out_be32(&im->mddrc.lut_table2_main_upper, CONFIG_SYS_MDDRCGRP_LUT2_MU); -+ out_be32(&im->mddrc.lut_table2_main_lower, CONFIG_SYS_MDDRCGRP_LUT2_ML); -+ out_be32(&im->mddrc.lut_table3_main_upper, CONFIG_SYS_MDDRCGRP_LUT3_MU); -+ out_be32(&im->mddrc.lut_table3_main_lower, CONFIG_SYS_MDDRCGRP_LUT3_ML); -+ out_be32(&im->mddrc.lut_table4_main_upper, CONFIG_SYS_MDDRCGRP_LUT4_MU); -+ out_be32(&im->mddrc.lut_table4_main_lower, CONFIG_SYS_MDDRCGRP_LUT4_ML); -+ out_be32(&im->mddrc.lut_table0_alternate_upper, CONFIG_SYS_MDDRCGRP_LUT0_AU); -+ out_be32(&im->mddrc.lut_table0_alternate_lower, CONFIG_SYS_MDDRCGRP_LUT0_AL); -+ out_be32(&im->mddrc.lut_table1_alternate_upper, CONFIG_SYS_MDDRCGRP_LUT1_AU); -+ out_be32(&im->mddrc.lut_table1_alternate_lower, CONFIG_SYS_MDDRCGRP_LUT1_AL); -+ out_be32(&im->mddrc.lut_table2_alternate_upper, CONFIG_SYS_MDDRCGRP_LUT2_AU); -+ out_be32(&im->mddrc.lut_table2_alternate_lower, CONFIG_SYS_MDDRCGRP_LUT2_AL); -+ out_be32(&im->mddrc.lut_table3_alternate_upper, CONFIG_SYS_MDDRCGRP_LUT3_AU); -+ out_be32(&im->mddrc.lut_table3_alternate_lower, CONFIG_SYS_MDDRCGRP_LUT3_AL); -+ out_be32(&im->mddrc.lut_table4_alternate_upper, CONFIG_SYS_MDDRCGRP_LUT4_AU); -+ out_be32(&im->mddrc.lut_table4_alternate_lower, CONFIG_SYS_MDDRCGRP_LUT4_AL); -+ -+ /* Initialize MDDRC */ -+ out_be32(&im->mddrc.ddr_sys_config, CONFIG_SYS_MDDRC_SYS_CFG); -+ out_be32(&im->mddrc.ddr_time_config0, CONFIG_SYS_MDDRC_TIME_CFG0); -+ out_be32(&im->mddrc.ddr_time_config1, CONFIG_SYS_MDDRC_TIME_CFG1); -+ out_be32(&im->mddrc.ddr_time_config2, CONFIG_SYS_MDDRC_TIME_CFG2); -+ -+ /* Initialize DDR */ -+ for (i = 0; i < 10; i++) -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP); -+ -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_PCHG_ALL); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_RFSH); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_RFSH); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_INIT_DEV_OP); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_EM2); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_PCHG_ALL); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_EM2); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_EM3); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_EN_DLL); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_INIT_DEV_OP); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_PCHG_ALL); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_RFSH); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_INIT_DEV_OP); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_OCD_DEFAULT); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_PCHG_ALL); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP); -+ -+ /* Start MDDRC */ -+ out_be32(&im->mddrc.ddr_time_config0, CONFIG_SYS_MDDRC_TIME_CFG0_RUN); -+ out_be32(&im->mddrc.ddr_sys_config, CONFIG_SYS_MDDRC_SYS_CFG_RUN); -+ -+ return msize; -+} -+ -+int misc_init_r(void) -+{ -+ u32 tmp; -+ -+ /* we use I2C-2 for on-board eeprom */ -+ i2c_set_bus_num(2); -+ -+ tmp = in_be32((u32*)CONFIG_SYS_ARIA_FPGA_BASE); -+ printf("FPGA: %u-%u.%u.%u\n", -+ (tmp & 0xFF000000) >> 24, -+ (tmp & 0x00FF0000) >> 16, -+ (tmp & 0x0000FF00) >> 8, -+ tmp & 0x000000FF -+ ); -+ -+#ifdef CONFIG_FSL_DIU_FB -+# if !(defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE)) -+ mpc5121_diu_init(); -+# endif -+#endif -+ return 0; -+} -+ -+static iopin_t ioregs_init[] = { -+ /* -+ * FEC -+ */ -+ -+ /* FEC on PSCx_x*/ -+ { -+ offsetof(struct ioctrl512x, io_control_psc0_0), 5, 0, -+ IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) -+ }, -+ { -+ offsetof(struct ioctrl512x, io_control_psc1_0), 10, 0, -+ IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) -+ }, -+ { -+ offsetof(struct ioctrl512x, io_control_spdif_txclk), 3, 0, -+ IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) -+ }, -+ -+ /* -+ * DIU -+ */ -+ /* FUNC2=DIU CLK */ -+ { -+ offsetof(struct ioctrl512x, io_control_psc6_0), 1, 0, -+ IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -+ IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3) -+ }, -+ /* FUNC2=DIU_HSYNC */ -+ { -+ offsetof(struct ioctrl512x, io_control_psc6_1), 1, 0, -+ IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) -+ }, -+ /* FUNC2=DIUVSYNC Sets Next 26 to DIU Pads */ -+ { -+ offsetof(struct ioctrl512x, io_control_psc6_4), 26, 0, -+ IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) -+ }, -+ /* -+ * On board SRAM -+ */ -+ /* FUNC2=/LPC CS6 */ -+ { -+ offsetof(struct ioctrl512x, io_control_j1850_rx), 1, 0, -+ IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -+ IO_PIN_PUE(1) | IO_PIN_ST(1) | IO_PIN_DS(3) -+ }, -+}; -+ -+ -+int checkboard (void) -+{ -+ puts("Board: ARIA\n"); -+ -+ /* initialize function mux & slew rate IO inter alia on IO Pins */ -+ -+ iopin_initialize(ioregs_init, ARRAY_SIZE(ioregs_init)); -+ -+ return 0; -+} -+ -+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) -+void ft_board_setup(void *blob, bd_t *bd) -+{ -+ ft_cpu_setup(blob, bd); -+ fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); -+} -+#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ -diff --git a/board/davedenx/aria/config.mk b/board/davedenx/aria/config.mk -new file mode 100644 -index 0000000..838a018 ---- /dev/null -+++ b/board/davedenx/aria/config.mk -@@ -0,0 +1,23 @@ -+# -+# (C) Copyright 2009 Wolfgang Denk -+# -+# See file CREDITS for list of people who contributed to this -+# project. -+# -+# This program is free software; you can redistribute it and/or -+# modify it under the terms of the GNU General Public License as -+# published by the Free Software Foundation; either version 2 of -+# the License, or (at your option) any later version. -+# -+# This program is distributed in the hope that it will be useful, -+# but WITHOUT ANY WARRANTY; without even the implied warranty of -+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+# GNU General Public License for more details. -+# -+# You should have received a copy of the GNU General Public License -+# along with this program; if not, write to the Free Software -+# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+# MA 02111-1307 USA -+# -+ -+TEXT_BASE = 0xFFF00000 -diff --git a/board/davedenx/qong/u-boot.lds b/board/davedenx/qong/u-boot.lds -deleted file mode 100644 -index a21efbd..0000000 ---- a/board/davedenx/qong/u-boot.lds -+++ /dev/null -@@ -1,58 +0,0 @@ --/* -- * (C) Copyright 2009 -- * Ilya Yanok, Emcraft Systems Ltd, -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm1136/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(.rodata) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss : { *(.bss) } -- _end = .; --} -diff --git a/board/davinci/common/Makefile b/board/davinci/common/Makefile -index 127bb6e..8d9ea00 100644 ---- a/board/davinci/common/Makefile -+++ b/board/davinci/common/Makefile -@@ -29,7 +29,7 @@ endif - - LIB = $(obj)lib$(VENDOR).a - --COBJS := psc.o misc.o -+COBJS := misc.o - - SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) - OBJS := $(addprefix $(obj),$(COBJS)) -diff --git a/board/davinci/common/misc.c b/board/davinci/common/misc.c -index be709bf..ffdc20b 100644 ---- a/board/davinci/common/misc.c -+++ b/board/davinci/common/misc.c -@@ -25,8 +25,10 @@ - - #include - #include -+#include - #include - -+ - DECLARE_GLOBAL_DATA_PTR; - - int dram_init(void) -@@ -37,17 +39,7 @@ int dram_init(void) - return(0); - } - --static int dv_get_pllm_output(uint32_t pllm) --{ -- return (pllm + 1) * (CONFIG_SYS_HZ_CLOCK / 1000000); --} -- --void dv_display_clk_infos(void) --{ -- printf("ARM Clock: %dMHz\n", dv_get_pllm_output(REG(PLL1_PLLM)) / 2); -- printf("DDR Clock: %dMHz\n", dv_get_pllm_output(REG(PLL2_PLLM)) / -- ((REG(PLL2_DIV2) & 0x1f) + 1) / 2); --} -+#ifdef CONFIG_DRIVER_TI_EMAC - - /* Read ethernet MAC address from EEPROM for DVEVM compatible boards. - * Returns 1 if found, 0 otherwise. -@@ -60,8 +52,8 @@ int dvevm_read_mac_address(uint8_t *buf) - (uint8_t *) &buf[0], 6)) - goto i2cerr; - -- /* Check that MAC address is not null. */ -- if (memcmp(buf, "\0\0\0\0\0\0", 6) == 0) -+ /* Check that MAC address is valid. */ -+ if (!is_valid_ether_addr(buf)) - goto err; - - return 1; /* Found */ -@@ -75,11 +67,11 @@ err: - } - - /* If there is a MAC address in the environment, and if it is not identical to -- * the MAC address in the ROM, then a warning is printed and the MAC address -+ * the MAC address in the EEPROM, then a warning is printed and the MAC address - * from the environment is used. - * - * If there is no MAC address in the environment, then it will be initialized -- * (silently) from the value in the ROM. -+ * (silently) from the value in the EEPROM. - */ - void dv_configure_mac_address(uint8_t *rom_enetaddr) - { -@@ -96,31 +88,24 @@ void dv_configure_mac_address(uint8_t *rom_enetaddr) - tmp = (*end) ? end+1 : end; - } - -- /* Check if ROM and U-Boot environment MAC addresses match. */ -+ /* Check if EEPROM and U-Boot environment MAC addresses match. */ - if (memcmp(env_enetaddr, "\0\0\0\0\0\0", 6) != 0 && - memcmp(env_enetaddr, rom_enetaddr, 6) != 0) { - printf("Warning: MAC addresses don't match:\n"); -- printf(" ROM MAC address: %02X:%02X:%02X:%02X:%02X:%02X\n", -- rom_enetaddr[0], rom_enetaddr[1], -- rom_enetaddr[2], rom_enetaddr[3], -- rom_enetaddr[4], rom_enetaddr[5]); -- printf(" \"ethaddr\" value: %02X:%02X:%02X:%02X:%02X:%02X\n", -- env_enetaddr[0], env_enetaddr[1], -- env_enetaddr[2], env_enetaddr[3], -- env_enetaddr[4], env_enetaddr[5]) ; -+ printf(" EEPROM MAC address: %pM\n", rom_enetaddr); -+ printf(" \"ethaddr\" value: %pM\n", env_enetaddr) ; - debug("### Using MAC address from environment\n"); - } - if (!tmp) { - char ethaddr[20]; - - /* There is no MAC address in the environment, so we initialize -- * it from the value in the ROM. */ -- sprintf(ethaddr, "%02X:%02X:%02X:%02X:%02X:%02X", -- rom_enetaddr[0], rom_enetaddr[1], -- rom_enetaddr[2], rom_enetaddr[3], -- rom_enetaddr[4], rom_enetaddr[5]) ; -- debug("### Setting environment from ROM MAC address = \"%s\"\n", -+ * it from the value in the EEPROM. */ -+ sprintf(ethaddr, "%pM", rom_enetaddr) ; -+ debug("### Setting environment from EEPROM MAC address = \"%s\"\n", - ethaddr); - setenv("ethaddr", ethaddr); - } - } -+ -+#endif /* DAVINCI_EMAC */ -diff --git a/board/davinci/common/misc.h b/board/davinci/common/misc.h -index 4a57dbb..316159a 100644 ---- a/board/davinci/common/misc.h -+++ b/board/davinci/common/misc.h -@@ -22,10 +22,8 @@ - #ifndef __MISC_H - #define __MISC_H - --extern void timer_init(void); - extern int eth_hw_init(void); - --void dv_display_clk_infos(void); - int dvevm_read_mac_address(uint8_t *buf); - void dv_configure_mac_address(uint8_t *rom_enetaddr); - -diff --git a/board/davinci/common/psc.c b/board/davinci/common/psc.c -deleted file mode 100644 -index 28e2a4b..0000000 ---- a/board/davinci/common/psc.c -+++ /dev/null -@@ -1,182 +0,0 @@ --/* -- * Power and Sleep Controller (PSC) functions. -- * -- * Copyright (C) 2007 Sergey Kubushyn -- * Copyright (C) 2008 Lyrtech -- * Copyright (C) 2004 Texas Instruments. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License as published by -- * the Free Software Foundation; either version 2 of the License, or -- * (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -- */ -- --#include --#include -- --#define PINMUX0_EMACEN (1 << 31) --#define PINMUX0_AECS5 (1 << 11) --#define PINMUX0_AECS4 (1 << 10) -- --#define PINMUX1_I2C (1 << 7) --#define PINMUX1_UART1 (1 << 1) --#define PINMUX1_UART0 (1 << 0) -- --/* -- * The DM6446 includes two separate power domains: "Always On" and "DSP". The -- * "Always On" power domain is always on when the chip is on. The "Always On" -- * domain is powered by the VDD pins of the DM6446. The majority of the -- * DM6446's modules lie within the "Always On" power domain. A separate -- * domain called the "DSP" domain houses the C64x+ and VICP. The "DSP" domain -- * is not always on. The "DSP" power domain is powered by the CVDDDSP pins of -- * the DM6446. -- */ -- --/* Works on Always On power domain only (no PD argument) */ --void lpsc_on(unsigned int id) --{ -- dv_reg_p mdstat, mdctl; -- -- if (id >= DAVINCI_LPSC_GEM) -- return; /* Don't work on DSP Power Domain */ -- -- mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4)); -- mdctl = REG_P(PSC_MDCTL_BASE + (id * 4)); -- -- while (REG(PSC_PTSTAT) & 0x01); -- -- if ((*mdstat & 0x1f) == 0x03) -- return; /* Already on and enabled */ -- -- *mdctl |= 0x03; -- -- /* Special treatment for some modules as for sprue14 p.7.4.2 */ -- switch (id) { -- case DAVINCI_LPSC_VPSSSLV: -- case DAVINCI_LPSC_EMAC: -- case DAVINCI_LPSC_EMAC_WRAPPER: -- case DAVINCI_LPSC_MDIO: -- case DAVINCI_LPSC_USB: -- case DAVINCI_LPSC_ATA: -- case DAVINCI_LPSC_VLYNQ: -- case DAVINCI_LPSC_UHPI: -- case DAVINCI_LPSC_DDR_EMIF: -- case DAVINCI_LPSC_AEMIF: -- case DAVINCI_LPSC_MMC_SD: -- case DAVINCI_LPSC_MEMSTICK: -- case DAVINCI_LPSC_McBSP: -- case DAVINCI_LPSC_GPIO: -- *mdctl |= 0x200; -- break; -- } -- -- REG(PSC_PTCMD) = 0x01; -- -- while (REG(PSC_PTSTAT) & 0x03); -- while ((*mdstat & 0x1f) != 0x03); /* Probably an overkill... */ --} -- --/* If DSPLINK is used, we don't want U-Boot to power on the DSP. */ --#if !defined(CONFIG_SYS_USE_DSPLINK) --void dsp_on(void) --{ -- int i; -- -- if (REG(PSC_PDSTAT1) & 0x1f) -- return; /* Already on */ -- -- REG(PSC_GBLCTL) |= 0x01; -- REG(PSC_PDCTL1) |= 0x01; -- REG(PSC_PDCTL1) &= ~0x100; -- REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03; -- REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff; -- REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03; -- REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff; -- REG(PSC_PTCMD) = 0x02; -- -- for (i = 0; i < 100; i++) { -- if (REG(PSC_EPCPR) & 0x02) -- break; -- } -- -- REG(PSC_CHP_SHRTSW) = 0x01; -- REG(PSC_PDCTL1) |= 0x100; -- REG(PSC_EPCCR) = 0x02; -- -- for (i = 0; i < 100; i++) { -- if (!(REG(PSC_PTSTAT) & 0x02)) -- break; -- } -- -- REG(PSC_GBLCTL) &= ~0x1f; --} --#endif /* CONFIG_SYS_USE_DSPLINK */ -- --void davinci_enable_uart0(void) --{ -- lpsc_on(DAVINCI_LPSC_UART0); -- -- /* Bringup UART0 out of reset */ -- REG(UART0_PWREMU_MGMT) = 0x0000e003; -- -- /* Enable UART0 MUX lines */ -- REG(PINMUX1) |= PINMUX1_UART0; --} -- --#ifdef CONFIG_DRIVER_TI_EMAC --void davinci_enable_emac(void) --{ -- lpsc_on(DAVINCI_LPSC_EMAC); -- lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER); -- lpsc_on(DAVINCI_LPSC_MDIO); -- -- /* Enable GIO3.3V cells used for EMAC */ -- REG(VDD3P3V_PWDN) = 0; -- -- /* Enable EMAC. */ -- REG(PINMUX0) |= PINMUX0_EMACEN; --} --#endif -- --void davinci_enable_i2c(void) --{ -- lpsc_on(DAVINCI_LPSC_I2C); -- -- /* Enable I2C pin Mux */ -- REG(PINMUX1) |= PINMUX1_I2C; --} -- --void davinci_errata_workarounds(void) --{ -- /* -- * Workaround for TMS320DM6446 errata 1.3.22: -- * PSC: PTSTAT Register Does Not Clear After Warm/Maximum Reset -- * Revision(s) Affected: 1.3 and earlier -- */ -- REG(PSC_SILVER_BULLET) = 0; -- -- /* -- * Set the PR_OLD_COUNT bits in the Bus Burst Priority Register (PBBPR) -- * as suggested in TMS320DM6446 errata 2.1.2: -- * -- * On DM6446 Silicon Revision 2.1 and earlier, under certain conditions -- * low priority modules can occupy the bus and prevent high priority -- * modules like the VPSS from getting the required DDR2 throughput. -- * A hex value of 0x20 should provide a good ARM (cache enabled) -- * performance and still allow good utilization by the VPSS or other -- * modules. -- */ -- REG(VBPR) = 0x20; --} -diff --git a/board/davinci/common/psc.h b/board/davinci/common/psc.h -deleted file mode 100644 -index b2dd7b5..0000000 ---- a/board/davinci/common/psc.h -+++ /dev/null -@@ -1,32 +0,0 @@ --/* -- * Copyright (C) 2008 Lyrtech -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License as published by -- * the Free Software Foundation; either version 2 of the License, or -- * (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -- */ -- --#ifndef __PSC_H --#define __PSC_H -- --void lpsc_on(unsigned int id); --void dsp_on(void); --void davinci_enable_uart0(void); --void davinci_enable_emac(void); --void davinci_enable_i2c(void); --void davinci_errata_workarounds(void); -- --#endif /* __PSC_H */ -diff --git a/board/davinci/dm355evm/Makefile b/board/davinci/dm355evm/Makefile -new file mode 100644 -index 0000000..26b0705 ---- /dev/null -+++ b/board/davinci/dm355evm/Makefile -@@ -0,0 +1,52 @@ -+# -+# (C) Copyright 2000, 2001, 2002 -+# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -+# -+# Copyright (C) 2007 Sergey Kubushyn -+# -+# See file CREDITS for list of people who contributed to this -+# project. -+# -+# This program is free software; you can redistribute it and/or -+# modify it under the terms of the GNU General Public License as -+# published by the Free Software Foundation; either version 2 of -+# the License, or (at your option) any later version. -+# -+# This program is distributed in the hope that it will be useful, -+# but WITHOUT ANY WARRANTY; without even the implied warranty of -+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+# GNU General Public License for more details. -+# -+# You should have received a copy of the GNU General Public License -+# along with this program; if not, write to the Free Software -+# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+# MA 02111-1307 USA -+# -+ -+include $(TOPDIR)/config.mk -+ -+LIB = $(obj)lib$(BOARD).a -+ -+COBJS := $(BOARD).o -+SOBJS := -+ -+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -+OBJS := $(addprefix $(obj),$(COBJS)) -+SOBJS := $(addprefix $(obj),$(SOBJS)) -+ -+$(LIB): $(obj).depend $(OBJS) $(SOBJS) -+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) -+ -+clean: -+ rm -f $(SOBJS) $(OBJS) -+ -+distclean: clean -+ rm -f $(LIB) core *.bak $(obj).depend -+ -+######################################################################### -+# This is for $(obj).depend target -+include $(SRCTREE)/rules.mk -+ -+sinclude $(obj).depend -+ -+######################################################################### -diff --git a/board/davinci/dm355evm/config.mk b/board/davinci/dm355evm/config.mk -new file mode 100644 -index 0000000..c4e6e07 ---- /dev/null -+++ b/board/davinci/dm355evm/config.mk -@@ -0,0 +1,11 @@ -+# -+# Spectrum Digital DM355 EVM board -+# dm355evm board has 1 bank of 128 MB DDR RAM -+# Physical Address: 8000'0000 to 8800'0000 -+# -+# Linux Kernel is expected to be at 8000'8000, entry 8000'8000 -+# (mem base + reserved) -+# -+ -+#Provide at least 16MB spacing between us and the Linux Kernel image -+TEXT_BASE = 0x81080000 -diff --git a/board/davinci/dm355evm/dm355evm.c b/board/davinci/dm355evm/dm355evm.c -new file mode 100644 -index 0000000..398f527 ---- /dev/null -+++ b/board/davinci/dm355evm/dm355evm.c -@@ -0,0 +1,108 @@ -+/* -+ * Copyright (C) 2009 David Brownell -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include "../common/misc.h" -+ -+ -+DECLARE_GLOBAL_DATA_PTR; -+ -+/* -+ * With the DM355 EVM, u-boot is *always* a third stage loader, -+ * unless a JTAG debugger handles the first two stages: -+ * -+ * - 1st stage is ROM Boot Loader (RBL), which searches for a -+ * second stage loader in one of three places based on SW7: -+ * NAND (with MMC/SD fallback), MMC/SD, or UART. -+ * -+ * - 2nd stage is User Boot Loader (UBL), using at most 30KB -+ * of on-chip SRAM, responsible for lowlevel init, and for -+ * loading the third stage loader into DRAM. -+ * -+ * - 3rd stage, that's us! -+ */ -+ -+int board_init(void) -+{ -+ gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DM355_EVM; -+ gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; -+ -+ /* We expect the UBL to have handled "lowlevel init", which -+ * involves setting up at least: -+ * - clocks -+ * + PLL1 (for ARM and peripherals) and PLL2 (for DDR) -+ * + clock divisors for those PLLs -+ * + LPSC_DDR module enabled -+ * + LPSC_TIMER0 module (still) enabled -+ * - EMIF -+ * + DDR init and timings -+ * + AEMIF timings (for NAND and DM9000) -+ * - pinmux -+ * -+ * Some of that is repeated here, mostly as a precaution. -+ */ -+ -+ /* AEMIF: Some "address" lines are available as GPIOs. A3..A13 -+ * could be too if we used A12 as a GPIO during NAND chipselect -+ * (and Linux did too), letting us control the LED on A7/GPIO61. -+ */ -+ REG(PINMUX2) = 0x0c08; -+ -+ /* UART0 may still be in SyncReset if we didn't boot from UART */ -+ davinci_enable_uart0(); -+ -+ /* EDMA may be in SyncReset too; turn it on, Linux won't (yet) */ -+ lpsc_on(DAVINCI_LPSC_TPCC); -+ lpsc_on(DAVINCI_LPSC_TPTC0); -+ lpsc_on(DAVINCI_LPSC_TPTC1); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_NAND_DAVINCI -+ -+static void nand_dm355evm_select_chip(struct mtd_info *mtd, int chip) -+{ -+ struct nand_chip *this = mtd->priv; -+ u32 wbase = (u32) this->IO_ADDR_W; -+ u32 rbase = (u32) this->IO_ADDR_R; -+ -+ if (chip == 1) { -+ __set_bit(14, &wbase); -+ __set_bit(14, &rbase); -+ } else { -+ __clear_bit(14, &wbase); -+ __clear_bit(14, &rbase); -+ } -+ this->IO_ADDR_W = (void *)wbase; -+ this->IO_ADDR_R = (void *)rbase; -+} -+ -+int board_nand_init(struct nand_chip *nand) -+{ -+ davinci_nand_init(nand); -+ nand->select_chip = nand_dm355evm_select_chip; -+ return 0; -+} -+ -+#endif -diff --git a/board/davinci/dvevm/dvevm.c b/board/davinci/dvevm/dvevm.c -index 22308de..8f38633 100644 ---- a/board/davinci/dvevm/dvevm.c -+++ b/board/davinci/dvevm/dvevm.c -@@ -27,7 +27,6 @@ - #include - #include - #include --#include "../common/psc.h" - #include "../common/misc.h" - - DECLARE_GLOBAL_DATA_PTR; -@@ -70,8 +69,6 @@ int misc_init_r(void) - uint8_t video_mode; - uint8_t eeprom_enetaddr[6]; - -- dv_display_clk_infos(); -- - /* Read Ethernet MAC address from EEPROM if available. */ - if (dvevm_read_mac_address(eeprom_enetaddr)) - dv_configure_mac_address(eeprom_enetaddr); -diff --git a/board/davinci/dvevm/u-boot.lds b/board/davinci/dvevm/u-boot.lds -deleted file mode 100644 -index e50b8d4..0000000 ---- a/board/davinci/dvevm/u-boot.lds -+++ /dev/null -@@ -1,52 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- . = ALIGN(4); -- .text : -- { -- cpu/arm926ejs/start.o (.text) -- *(.text) -- } -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- . = ALIGN(4); -- .data : { *(.data) } -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/davinci/schmoogie/schmoogie.c b/board/davinci/schmoogie/schmoogie.c -index 433769a..6e0f591 100644 ---- a/board/davinci/schmoogie/schmoogie.c -+++ b/board/davinci/schmoogie/schmoogie.c -@@ -27,7 +27,6 @@ - #include - #include - #include --#include "../common/psc.h" - #include "../common/misc.h" - - DECLARE_GLOBAL_DATA_PTR; -@@ -105,8 +104,6 @@ int misc_init_r(void) - 0xb6, 0xe8, 0x0a, 0x54, 0xd7, 0x89, 0x6b, 0x35 - }; - -- dv_display_clk_infos(); -- - /* Set serial number from UID chip */ - if (i2c_read(CONFIG_SYS_UID_ADDR, 0, 1, buf, 8)) { - printf("\nUID @ 0x%02x read FAILED!!!\n", CONFIG_SYS_UID_ADDR); -diff --git a/board/davinci/schmoogie/u-boot.lds b/board/davinci/schmoogie/u-boot.lds -deleted file mode 100644 -index e50b8d4..0000000 ---- a/board/davinci/schmoogie/u-boot.lds -+++ /dev/null -@@ -1,52 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- . = ALIGN(4); -- .text : -- { -- cpu/arm926ejs/start.o (.text) -- *(.text) -- } -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- . = ALIGN(4); -- .data : { *(.data) } -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/davinci/sffsdr/sffsdr.c b/board/davinci/sffsdr/sffsdr.c -index e76f86d..7f4ee36 100644 ---- a/board/davinci/sffsdr/sffsdr.c -+++ b/board/davinci/sffsdr/sffsdr.c -@@ -30,7 +30,6 @@ - #include - #include - #include --#include "../common/psc.h" - #include "../common/misc.h" - - #define DAVINCI_A3CR (0x01E00014) /* EMIF-A CS3 config register. */ -@@ -132,8 +131,6 @@ int misc_init_r(void) - /* EMIF-A CS3 configuration for FPGA. */ - REG(DAVINCI_A3CR) = DAVINCI_A3CR_VAL; - -- dv_display_clk_infos(); -- - /* Configure I2C switch (PCA9543) to enable channel 0. */ - i2cbuf = CONFIG_SYS_I2C_PCA9543_ENABLE_CH0; - if (i2c_write(CONFIG_SYS_I2C_PCA9543_ADDR, 0, -diff --git a/board/davinci/sffsdr/u-boot.lds b/board/davinci/sffsdr/u-boot.lds -deleted file mode 100644 -index e50b8d4..0000000 ---- a/board/davinci/sffsdr/u-boot.lds -+++ /dev/null -@@ -1,52 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- . = ALIGN(4); -- .text : -- { -- cpu/arm926ejs/start.o (.text) -- *(.text) -- } -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- . = ALIGN(4); -- .data : { *(.data) } -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/davinci/sonata/sonata.c b/board/davinci/sonata/sonata.c -index d56b443..a0bea05 100644 ---- a/board/davinci/sonata/sonata.c -+++ b/board/davinci/sonata/sonata.c -@@ -26,7 +26,6 @@ - - #include - #include --#include "../common/psc.h" - #include "../common/misc.h" - - DECLARE_GLOBAL_DATA_PTR; -@@ -67,8 +66,6 @@ int misc_init_r(void) - { - uint8_t eeprom_enetaddr[6]; - -- dv_display_clk_infos(); -- - /* Read Ethernet MAC address from EEPROM if available. */ - if (dvevm_read_mac_address(eeprom_enetaddr)) - dv_configure_mac_address(eeprom_enetaddr); -diff --git a/board/davinci/sonata/u-boot.lds b/board/davinci/sonata/u-boot.lds -deleted file mode 100644 -index e50b8d4..0000000 ---- a/board/davinci/sonata/u-boot.lds -+++ /dev/null -@@ -1,52 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- . = ALIGN(4); -- .text : -- { -- cpu/arm926ejs/start.o (.text) -- *(.text) -- } -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- . = ALIGN(4); -- .data : { *(.data) } -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/delta/delta.c b/board/delta/delta.c -index 73e6c3e..84ff47e 100644 ---- a/board/delta/delta.c -+++ b/board/delta/delta.c -@@ -260,7 +260,7 @@ int do_kbd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - kbd, 1, 1, do_kbd, - "read keyboard status", -- NULL -+ "" - ); - - #endif /* DELTA_CHECK_KEYBD */ -diff --git a/board/delta/u-boot.lds b/board/delta/u-boot.lds -deleted file mode 100644 -index a077bc5..0000000 ---- a/board/delta/u-boot.lds -+++ /dev/null -@@ -1,56 +0,0 @@ --/* -- * (C) Copyright 2000 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/pxa/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/dnp1110/u-boot.lds b/board/dnp1110/u-boot.lds -deleted file mode 100644 -index 13b7bb7..0000000 ---- a/board/dnp1110/u-boot.lds -+++ /dev/null -@@ -1,56 +0,0 @@ --/* -- * (C) Copyright 2000 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/sa1100/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/ep7312/u-boot.lds b/board/ep7312/u-boot.lds -deleted file mode 100644 -index 8c9f624..0000000 ---- a/board/ep7312/u-boot.lds -+++ /dev/null -@@ -1,56 +0,0 @@ --/* -- * (C) Copyright 2000 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm720t/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/esd/ar405/ar405.c b/board/esd/ar405/ar405.c -index 14520e1..9d1b6d2 100644 ---- a/board/esd/ar405/ar405.c -+++ b/board/esd/ar405/ar405.c -@@ -247,9 +247,8 @@ int do_digtest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - digtest, 3, 1, do_digtest, - "Test digital in-/output", -- NULL -- ); -- -+ "" -+); - - #define ERROR_DELTA 256 - -@@ -341,8 +340,8 @@ int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - anatest, 2, 1, do_anatest, - "Test analog in-/output", -- NULL -- ); -+ "" -+); - - - int counter = 0; -@@ -408,6 +407,6 @@ int do_inctest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - inctest, 3, 1, do_inctest, - "Test incremental encoder inputs", -- NULL -- ); -+ "" -+); - #endif -diff --git a/board/esd/cms700/cms700.c b/board/esd/cms700/cms700.c -index 9a522b2..01b1223 100644 ---- a/board/esd/cms700/cms700.c -+++ b/board/esd/cms700/cms700.c -@@ -31,14 +31,6 @@ DECLARE_GLOBAL_DATA_PTR; - - extern void lxt971_no_sleep(void); - --/* fpga configuration data - not compressed, generated by bin2c */ --const unsigned char fpgadata[] = --{ --#include "fpgadata.c" --}; --int filesize = sizeof(fpgadata); -- -- - int board_early_init_f (void) - { - /* -@@ -197,8 +189,9 @@ int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - } - - U_BOOT_CMD(eepwren, 2, 0, do_eep_wren, -- "Enable / disable / query EEPROM write access", -- NULL); -+ "Enable / disable / query EEPROM write access", -+ "" -+); - #endif /* #if defined(CONFIG_SYS_EEPROM_WREN) */ - - /* ------------------------------------------------------------------------- */ -diff --git a/board/esd/cms700/config.mk b/board/esd/cms700/config.mk -index 5c3c01c..8e48bcd 100644 ---- a/board/esd/cms700/config.mk -+++ b/board/esd/cms700/config.mk -@@ -20,9 +20,4 @@ - # Foundation, Inc., 59 Temple Place, Suite 330, Boston, - # MA 02111-1307 USA - # -- --# --# esd CMS405 boards --# -- --TEXT_BASE = 0xFFFC0000 -+TEXT_BASE = 0xFFFC8000 -diff --git a/board/esd/cms700/fpgadata.c b/board/esd/cms700/fpgadata.c -deleted file mode 100644 -index 08be5e7..0000000 ---- a/board/esd/cms700/fpgadata.c -+++ /dev/null -@@ -1,1812 +0,0 @@ -- 0x07,0x20,0x12,0x00,0x12,0x01,0x04,0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x02,0x08, -- 0xfe,0x08,0x00,0x00,0x00,0x20,0x01,0x0f,0xff,0xff,0xff,0x09,0x00,0x00,0x00,0x00, -- 0xf9,0x60,0x40,0x93,0x02,0x08,0xff,0x02,0x08,0xff,0x02,0x08,0xe8,0x08,0x00,0x00, -- 0x00,0x06,0x01,0x00,0x09,0x05,0x00,0x02,0x08,0xed,0x04,0x00,0x03,0x0d,0x40,0x08, -- 0x00,0x00,0x00,0x12,0x01,0x00,0x00,0x00,0x09,0x03,0xff,0xff,0x00,0x00,0x00,0x01, -- 0x00,0x00,0x03,0x09,0x03,0xff,0xfd,0x03,0xff,0xfd,0x04,0x00,0x00,0x00,0x00,0x02, -- 0x08,0xea,0x08,0x00,0x00,0x00,0x32,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x00,0x04,0x00,0x00,0x00,0x01,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x08,0x00,0x00,0x00,0x01,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x0c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x01,0x09,0x00,0x00,0x10,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x01,0x09,0x00,0x00,0x20,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00, -- 0x01,0x09,0x00,0x00,0x24,0x00,0x1c,0x00,0x81,0x00,0x00,0x00,0x00,0x00,0x00,0x01, -- 0x09,0x00,0x00,0x28,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09, -- 0x00,0x00,0x2c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00, -- 0x00,0x30,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00, -- 0x40,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x44, -- 0x00,0x14,0x00,0x61,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x48,0x00, -- 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x4c,0x00,0x00, -- 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x00,0x50,0x00,0x00,0x00,0x03,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x00, -- 0x80,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x09,0x00,0x00,0x84,0x00,0x00,0x00, -- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -- 0x09,0x00,0x00,0x88,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09, -- 0x00,0x00,0x8c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00, -- 0x00,0x90,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00, -- 0xa0,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xa4, -- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xa8,0x00, -- 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xac,0x00,0x00, -- 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xb0,0x00,0x00,0x00, -- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xc0,0x00,0x00,0x00,0x01, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xc4,0x00,0x00,0x00,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xc8,0x00,0x00,0x00,0x01,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xcc,0x00,0x00,0x00,0x01,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x09,0x00,0x00,0xd0,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x01,0x00,0x00,0x00,0x00,0x01, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04, -- 0x00,0x00,0x00,0x00,0x09,0x00,0x01,0x04,0x00,0x00,0x01,0x01,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x01,0x08,0x10, -- 0x00,0x01,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x0c,0x00,0x00, -- 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x10,0x00,0x00,0x00, -- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x20,0x00,0x00,0x00,0x01, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x24,0x00,0x00,0x00,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x28,0x10,0x00,0x00,0x01,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x2c,0x00,0x00,0x00,0x01,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x30,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x01,0x09,0x00,0x01,0x40,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x01,0x09,0x00,0x01,0x44,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00, -- 0x01,0x09,0x00,0x01,0x48,0x0c,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01, -- 0x09,0x00,0x01,0x4c,0x20,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x04, -- 0x00,0x00,0x4e,0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x01,0x50, -- 0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x03,0x09,0x00,0x01,0x80,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x01,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x09, -- 0x00,0x01,0x84,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x01,0x88,0x00,0x00,0x00,0x01,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x8c,0x00,0x00,0x00,0x01,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x90,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x01,0x09,0x00,0x01,0xa0,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x01,0x09,0x00,0x01,0xa4,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00, -- 0x01,0x09,0x00,0x01,0xa8,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01, -- 0x09,0x00,0x01,0xac,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09, -- 0x00,0x01,0xb0,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00, -- 0x01,0xc0,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01, -- 0xc4,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0xc8, -- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0xcc,0x00, -- 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x01,0xd0,0x00,0x00,0x00,0x03,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x09,0x00, -- 0x02,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x09,0x00,0x02,0x04,0x00,0x00, -- 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x09,0x00,0x02,0x08,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01, -- 0x09,0x00,0x02,0x0c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09, -- 0x00,0x02,0x10,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00, -- 0x02,0x20,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x02, -- 0x24,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x02,0x28, -- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x02,0x2c,0x00, -- 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x02,0x30,0x00,0x00, -- 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x02,0x40,0x00,0x00,0x00, -- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x02,0x44,0x00,0x00,0x00,0x01, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x02,0x48,0x00,0x00,0x00,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x02,0x4c,0x00,0x00,0x00,0x01,0x00,0x00, -- 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0x00,0x34,0xc4,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00, -- 0x34,0xc8,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x34, -- 0xcc,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x4e, -- 0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x34,0xd0,0x00,0x00,0x00, -- 0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x03, -- 0x09,0x00,0x35,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x09,0x00,0x35,0x04, -- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x09,0x00,0x35,0x08,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x01,0x09,0x00,0x35,0x0c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00, -- 0x01,0x09,0x00,0x35,0x10,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01, -- 0x09,0x00,0x35,0x20,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09, -- 0x00,0x35,0x24,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00, -- 0x35,0x28,0x00,0x00,0x08,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35, -- 0x2c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x30, -- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x40,0x00, -- 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x44,0x00,0x00, -- 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x48,0x00,0x00,0x00, -- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x4c,0x00,0x00,0x00,0x01, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x09,0x00,0x35,0x50,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x35,0x80,0x00, -- 0x00,0x40,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x09,0x00,0x35,0x84,0x00,0x00,0x00,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00, -- 0x35,0x88,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35, -- 0x8c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x90, -- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xa0,0x00, -- 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xa4,0x00,0x1c, -- 0x00,0x81,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xa8,0x00,0x00,0x00, -- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xac,0x00,0x00,0x00,0x01, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xb0,0x00,0x00,0x00,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xc0,0x00,0x00,0x00,0x01,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xc4,0x00,0x14,0x00,0x61,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xc8,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x01,0x09,0x00,0x35,0xcc,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09, -- 0x00,0x35,0xd0,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x35,0xd0,0x00,0x00,0x00,0x01,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x04,0x00,0x00, -- 0x00,0x64,0x02,0x08,0xf0,0x04,0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x02,0x08,0xff, -- 0x08,0x00,0x00,0x00,0x01,0x01,0x00,0x09,0x00,0x00,0x00, -diff --git a/board/esd/common/auto_update.c b/board/esd/common/auto_update.c -index 8593125..33aeb46 100644 ---- a/board/esd/common/auto_update.c -+++ b/board/esd/common/auto_update.c -@@ -551,6 +551,6 @@ int auto_update(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - autoupd, 1, 1, auto_update, - "Automatically update images", -- NULL -+ "" - ); - #endif /* CONFIG_AUTO_UPDATE */ -diff --git a/board/esd/common/cmd_loadpci.c b/board/esd/common/cmd_loadpci.c -index c779f79..47e946f 100644 ---- a/board/esd/common/cmd_loadpci.c -+++ b/board/esd/common/cmd_loadpci.c -@@ -124,7 +124,7 @@ int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - loadpci, 1, 1, do_loadpci, - "Wait for pci bootcmd and boot it", -- NULL -- ); -+ "" -+); - - #endif -diff --git a/board/esd/common/lcd.c b/board/esd/common/lcd.c -index 066df74..5c50b4c 100644 ---- a/board/esd/common/lcd.c -+++ b/board/esd/common/lcd.c -@@ -373,5 +373,5 @@ int do_esdbmp(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - esdbmp, 2, 1, do_esdbmp, - "display BMP image", -- " - display image\n" -+ " - display image" - ); -diff --git a/board/esd/common/xilinx_jtag/micro.c b/board/esd/common/xilinx_jtag/micro.c -index 9b2cf90..414e821 100644 ---- a/board/esd/common/xilinx_jtag/micro.c -+++ b/board/esd/common/xilinx_jtag/micro.c -@@ -66,10 +66,7 @@ - #include "lenval.h" - #include "ports.h" - -- --extern const unsigned char fpgadata[]; --extern int filesize; -- -+const unsigned char *xsvfdata; - - /*============================================================================ - * XSVF #define -@@ -1838,12 +1835,23 @@ int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - unsigned long duration; - unsigned long long startClock, endClock; - -+ if (argc == 2) -+ xsvfdata = (unsigned char *)simple_strtoul(argv[1], NULL, 16); -+ else { -+#ifdef CONFIG_SYS_XSVF_DEFAULT_ADDR -+ xsvfdata = (unsigned char *)CONFIG_SYS_XSVF_DEFAULT_ADDR; -+#else -+ printf("Usage:\ncpld %s\n", cmdtp->help); -+ return -1; -+#endif -+ } -+ - iErrorCode = XSVF_ERRORCODE( XSVF_ERROR_NONE ); - pzXsvfFileName = 0; - xsvf_iDebugLevel = 0; - - printf("XSVF Player v%s, Xilinx, Inc.\n", XSVF_VERSION); -- printf("XSVF Filesize = %d bytes\n", filesize); -+ printf("Reading XSVF data @ %p\n", xsvfdata); - - /* Initialize the I/O. SetPort initializes I/O on first call */ - setPort( TMS, 1 ); -@@ -1858,7 +1866,7 @@ int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - return( iErrorCode ); - } - U_BOOT_CMD( -- cpld, 1, 1, do_cpld, -- "Program onboard CPLD", -- NULL -- ); -+ cpld, 2, 1, do_cpld, -+ "program onboard CPLD", -+ "" -+); -diff --git a/board/esd/common/xilinx_jtag/ports.c b/board/esd/common/xilinx_jtag/ports.c -index ac0d7ac..f039d04 100644 ---- a/board/esd/common/xilinx_jtag/ports.c -+++ b/board/esd/common/xilinx_jtag/ports.c -@@ -42,9 +42,7 @@ static int oldstate = 0; - static int newstate = 0; - static int readptr = 0; - --extern long filesize; --extern const unsigned char fpgadata[]; -- -+extern const unsigned char *xsvfdata; - - /* if in debugging mode, then just set the variables */ - void setPort(short p,short val) -@@ -86,10 +84,10 @@ void pulseClock(void) - void readByte(unsigned char *data) - { - /* pretend reading using a file */ -- *data = fpgadata[readptr++]; -- newstate = (100 * filepos++) / filesize; -+ *data = xsvfdata[readptr++]; -+ newstate = filepos++ >> 10; - if (newstate != oldstate) { -- printf("%4d\r\r\r\r", newstate); -+ printf("%4d kB\r\r\r\r", newstate); - oldstate = newstate; - } - } -diff --git a/board/esd/cpci2dp/cpci2dp.c b/board/esd/cpci2dp/cpci2dp.c -index aba240f..cd57ed4 100644 ---- a/board/esd/cpci2dp/cpci2dp.c -+++ b/board/esd/cpci2dp/cpci2dp.c -@@ -183,6 +183,6 @@ int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - eepwren, 2, 0, do_eep_wren, - "Enable / disable / query EEPROM write access", -- NULL -- ); -+ "" -+); - #endif /* #if defined(CONFIG_SYS_EEPROM_WREN) */ -diff --git a/board/esd/cpci405/cpci405.c b/board/esd/cpci405/cpci405.c -index ccbe245..a677c62 100644 ---- a/board/esd/cpci405/cpci405.c -+++ b/board/esd/cpci405/cpci405.c -@@ -690,8 +690,8 @@ int do_onewire(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - onewire, 1, 1, do_onewire, - "Read 1-write ID", -- NULL -- ); -+ "" -+); - - #define CONFIG_SYS_I2C_EEPROM_ADDR_2 0x51 /* EEPROM CAT24WC32 */ - #define CONFIG_ENV_SIZE_2 0x800 /* 2048 bytes may be used for env vars */ -@@ -751,8 +751,8 @@ int do_get_bpip(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - getbpip, 1, 1, do_get_bpip, - "Update IP-Address with Backplane IP-Address", -- NULL -- ); -+ "" -+); - - /* - * Set and print backplane ip... -@@ -787,7 +787,7 @@ int do_set_bpip(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - setbpip, 2, 1, do_set_bpip, - "Write Backplane IP-Address", -- NULL -- ); -+ "" -+); - - #endif /* CONFIG_CPCI405AB */ -diff --git a/board/esd/cpci5200/cpci5200.c b/board/esd/cpci5200/cpci5200.c -index b6b50fb..36fcf7f 100644 ---- a/board/esd/cpci5200/cpci5200.c -+++ b/board/esd/cpci5200/cpci5200.c -@@ -295,4 +295,6 @@ int do_writepci(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - - U_BOOT_CMD(writepci, 3, 1, do_writepci, - "Write some data to pcibus", -- " \n" " - Write some data to pcibus.\n"); -+ " \n" -+ "" -+); -diff --git a/board/esd/cpci750/cpci750.c b/board/esd/cpci750/cpci750.c -index 4826633..2ae4cbd 100644 ---- a/board/esd/cpci750/cpci750.c -+++ b/board/esd/cpci750/cpci750.c -@@ -122,6 +122,9 @@ static char show_config_tab[][15] = {{"PCI0DLL_2 "}, /* 31 */ - - extern flash_info_t flash_info[]; - -+extern int do_bootm (cmd_tbl_t *, int, int, char *[]); -+extern int do_bootvx (cmd_tbl_t *, int, int, char *[]); -+ - /* ------------------------------------------------------------------------- */ - - /* this is the current GT register space location */ -@@ -137,6 +140,15 @@ void board_prebootm_init (void); - unsigned int INTERNAL_REG_BASE_ADDR = CONFIG_SYS_GT_REGS; - int display_mem_map (void); - -+/* -+ * Skip video initialization on slave variant. -+ * This function will overwrite the weak default in cfb_console.c -+ */ -+int board_video_skip(void) -+{ -+ return CPCI750_SLAVE_TEST; -+} -+ - /* ------------------------------------------------------------------------- */ - - /* -@@ -184,6 +196,7 @@ original ppcboot 1.1.6 source end */ - static void gt_pci_config (void) - { - unsigned int stat; -+ unsigned int data; - unsigned int val = 0x00fff864; /* DINK32: BusNum 23:16, DevNum 15:11, FuncNum 10:8, RegNum 7:2 */ - - /* In PCIX mode devices provide their own bus and device numbers. We query the Discovery II's -@@ -251,10 +264,15 @@ static void gt_pci_config (void) - - /*ronen update the pci internal registers base address.*/ - #ifdef MAP_PCI -- for (stat = 0; stat <= PCI_HOST1; stat++) -+ for (stat = 0; stat <= PCI_HOST1; stat++) { -+ data = pciReadConfigReg(stat, -+ PCI_INTERNAL_REGISTERS_MEMORY_MAPPED_BASE_ADDRESS, -+ SELF); -+ data = (data & 0x0f) | CONFIG_SYS_GT_REGS; - pciWriteConfigReg (stat, - PCI_INTERNAL_REGISTERS_MEMORY_MAPPED_BASE_ADDRESS, -- SELF, CONFIG_SYS_GT_REGS); -+ SELF, data); -+ } - #endif - - } -@@ -448,13 +466,16 @@ int misc_init_r () - - void after_reloc (ulong dest_addr, gd_t * gd) - { -+ memoryMapDeviceSpace (BOOT_DEVICE, CONFIG_SYS_BOOT_SPACE, -+ CONFIG_SYS_BOOT_SIZE); - -- memoryMapDeviceSpace (BOOT_DEVICE, CONFIG_SYS_BOOT_SPACE, CONFIG_SYS_BOOT_SIZE); -+ display_mem_map (); -+ GT_REG_WRITE (PCI_0BASE_ADDRESS_REGISTERS_ENABLE, 0xfffffdfe); -+ GT_REG_WRITE (PCI_1BASE_ADDRESS_REGISTERS_ENABLE, 0xfffffdfe); - -- display_mem_map (); -- /* now, jump to the main ppcboot board init code */ -- board_init_r (gd, dest_addr); -- /* NOTREACHED */ -+ /* now, jump to the main ppcboot board init code */ -+ board_init_r (gd, dest_addr); -+ /* NOTREACHED */ - } - - /* ------------------------------------------------------------------------- */ -@@ -538,6 +559,79 @@ int display_mem_map (void) - return (0); - } - -+/* -+ * Command loadpci: wait for signal from host and boot image. -+ */ -+int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -+{ -+ volatile unsigned int *ptr; -+ int count = 0; -+ int count2 = 0; -+ int status; -+ char addr[16]; -+ char str[] = "\\|/-"; -+ char *local_args[2]; -+ -+ /* -+ * Mark sync address -+ */ -+ ptr = 0; -+ ptr[0] = 0xffffffff; -+ ptr[1] = 0xffffffff; -+ puts("\nWaiting for image from pci host -"); -+ -+ /* -+ * Wait for host to write the start address -+ */ -+ while (*ptr == 0xffffffff) { -+ count++; -+ if (!(count % 100)) { -+ count2++; -+ putc(0x08); /* backspace */ -+ putc(str[count2 % 4]); -+ } -+ -+ /* Abort if ctrl-c was pressed */ -+ if (ctrlc()) { -+ puts("\nAbort\n"); -+ return 0; -+ } -+ -+ udelay(1000); -+ } -+ -+ sprintf(addr, "%08x", *ptr); -+ printf("\nBooting Image at addr 0x%s ...\n", addr); -+ setenv("loadaddr", addr); -+ -+ switch (ptr[1] == 0) { -+ case 0: -+ /* -+ * Boot image via bootm -+ */ -+ local_args[0] = argv[0]; -+ local_args[1] = NULL; -+ status = do_bootm (cmdtp, 0, 1, local_args); -+ break; -+ case 1: -+ /* -+ * Boot image via bootvx -+ */ -+ local_args[0] = argv[0]; -+ local_args[1] = NULL; -+ status = do_bootvx (cmdtp, 0, 1, local_args); -+ break; -+ } -+ -+ return 0; -+} -+ -+U_BOOT_CMD( -+ loadpci, 1, 1, do_loadpci, -+ "loadpci - Wait for pci-image and boot it\n", -+ NULL -+ ); -+ - /* DRAM check routines copied from gw8260 */ - - #if defined (CONFIG_SYS_DRAM_TEST) -@@ -994,5 +1088,5 @@ int do_show_config(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - show_config, 1, 1, do_show_config, - "Show Marvell strapping register", -- "Show Marvell strapping register (ResetSampleLow ResetSampleHigh)\n" -- ); -+ "Show Marvell strapping register (ResetSampleLow ResetSampleHigh)" -+); -diff --git a/board/esd/cpci750/i2c.c b/board/esd/cpci750/i2c.c -index d95567f..b752903 100644 ---- a/board/esd/cpci750/i2c.c -+++ b/board/esd/cpci750/i2c.c -@@ -27,6 +27,7 @@ - #include - #include - #include -+#include - #include "../../Marvell/include/mv_gen_reg.h" - #include "../../Marvell/include/core.h" - -@@ -41,7 +42,7 @@ - - /* Assuming that there is only one master on the bus (us) */ - --static void i2c_init (int speed, int slaveaddr) -+void i2c_init (int speed, int slaveaddr) - { - unsigned int n, m, freq, margin, power; - unsigned int actualN = 0, actualM = 0; -@@ -375,7 +376,7 @@ i2c_set_dev_offset (uchar dev_addr, unsigned int offset, int ten_bit, - return 0; /* sucessful completion */ - } - --uchar -+int - i2c_read (uchar dev_addr, unsigned int offset, int alen, uchar * data, - int len) - { -@@ -384,7 +385,8 @@ i2c_read (uchar dev_addr, unsigned int offset, int alen, uchar * data, - - DP (puts ("i2c_read\n")); - -- i2c_init (i2cFreq, 0); /* set the i2c frequency */ -+ /* set the i2c frequency */ -+ i2c_init (i2cFreq, CONFIG_SYS_I2C_SLAVE); - - status = i2c_set_dev_offset (dev_addr, offset, 0, alen); /* send the slave address + offset */ - if (status) { -@@ -423,7 +425,7 @@ void i2c_stop (void) - } - - --uchar -+int - i2c_write (uchar dev_addr, unsigned int offset, int alen, uchar * data, - int len) - { -@@ -432,7 +434,8 @@ i2c_write (uchar dev_addr, unsigned int offset, int alen, uchar * data, - - DP (puts ("i2c_write\n")); - -- i2c_init (i2cFreq, 0); /* set the i2c frequency */ -+ /* set the i2c frequency */ -+ i2c_init (i2cFreq, CONFIG_SYS_I2C_SLAVE); - - status = i2c_set_dev_offset (dev_addr, offset, 0, alen); /* send the slave address + offset */ - if (status) { -@@ -468,7 +471,8 @@ int i2c_probe (uchar chip) - - DP (puts ("i2c_probe\n")); - -- i2c_init (i2cFreq, 0); /* set the i2c frequency */ -+ /* set the i2c frequency */ -+ i2c_init (i2cFreq, CONFIG_SYS_I2C_SLAVE); - - status = i2c_set_dev_offset (chip, 0, 0, 0); /* send the slave address + no offset */ - if (status) { -diff --git a/board/esd/cpci750/ide.c b/board/esd/cpci750/ide.c -index 9bdc523..638219f 100644 ---- a/board/esd/cpci750/ide.c -+++ b/board/esd/cpci750/ide.c -@@ -39,6 +39,8 @@ int ide_preinit (void) - int l; - - status = 1; -+ if (CPCI750_SLAVE_TEST != 0) -+ return status; - for (l = 0; l < CONFIG_SYS_IDE_MAXBUS; l++) { - ide_bus_offset[l] = -ATA_STATUS; - } -@@ -57,7 +59,7 @@ int ide_preinit (void) - ide_bus_offset[1] &= 0xfffffffe; - ide_bus_offset[1] += CONFIG_SYS_PCI0_IO_SPACE; - } -- return (status); -+ return status; - } - - void ide_set_reset (int flag) { -diff --git a/board/esd/cpci750/pci.c b/board/esd/cpci750/pci.c -index bfc7e55..a2c1c50 100644 ---- a/board/esd/cpci750/pci.c -+++ b/board/esd/cpci750/pci.c -@@ -768,11 +768,12 @@ static int gt_read_config_dword (struct pci_controller *hose, - int bus = PCI_BUS (dev); - - if ((bus == local_buses[0]) || (bus == local_buses[1])) { -- *value = pciReadConfigReg ((PCI_HOST) hose->cfg_addr, offset, -+ *value = pciReadConfigReg ((PCI_HOST) hose->cfg_addr, -+ offset | (PCI_FUNC(dev) << 8), - PCI_DEV (dev)); - } else { -- *value = pciOverBridgeReadConfigReg ((PCI_HOST) hose-> -- cfg_addr, offset, -+ *value = pciOverBridgeReadConfigReg ((PCI_HOST) hose->cfg_addr, -+ offset | (PCI_FUNC(dev) << 8), - PCI_DEV (dev), bus); - } - -@@ -785,11 +786,13 @@ static int gt_write_config_dword (struct pci_controller *hose, - int bus = PCI_BUS (dev); - - if ((bus == local_buses[0]) || (bus == local_buses[1])) { -- pciWriteConfigReg ((PCI_HOST) hose->cfg_addr, offset, -+ pciWriteConfigReg ((PCI_HOST) hose->cfg_addr, -+ offset | (PCI_FUNC(dev) << 8), - PCI_DEV (dev), value); - } else { - pciOverBridgeWriteConfigReg ((PCI_HOST) hose->cfg_addr, -- offset, PCI_DEV (dev), bus, -+ offset | (PCI_FUNC(dev) << 8), -+ PCI_DEV (dev), bus, - value); - } - return 0; -@@ -803,6 +806,9 @@ static void gt_setup_ide (struct pci_controller *hose, - u32 bar_response, bar_value; - int bar; - -+ if (CPCI750_SLAVE_TEST != 0) -+ return; -+ - for (bar = 0; bar < 6; bar++) { - /*ronen different function for 3rd bank. */ - unsigned int offset = -@@ -829,6 +835,9 @@ static void gt_setup_cpcidvi (struct pci_controller *hose, - { - u32 bar_value, pci_response; - -+ if (CPCI750_SLAVE_TEST != 0) -+ return; -+ - pci_hose_read_config_dword (hose, dev, PCI_COMMAND, &pci_response); - pci_hose_write_config_dword (hose, dev, PCI_BASE_ADDRESS_0, 0xffffffff); - pci_hose_read_config_dword (hose, dev, PCI_BASE_ADDRESS_0, &pci_response); -@@ -907,6 +916,7 @@ struct pci_controller pci1_hose = { - void pci_init_board (void) - { - unsigned int command; -+ unsigned int slave; - #ifdef CONFIG_PCI_PNP - unsigned int bar; - #endif -@@ -918,6 +928,8 @@ void pci_init_board (void) - gt_cpcidvi_rom.base = 0; - #endif - -+ slave = CPCI750_SLAVE_TEST; -+ - pci0_hose.config_table = gt_config_table; - pci1_hose.config_table = gt_config_table; - -@@ -953,27 +965,40 @@ void pci_init_board (void) - pci0_hose.cfg_addr = (unsigned int *) PCI_HOST0; - - pci_register_hose (&pci0_hose); -- pciArbiterEnable (PCI_HOST0); -- pciParkingDisable (PCI_HOST0, 1, 1, 1, 1, 1, 1, 1); -- command = pciReadConfigReg (PCI_HOST0, PCI_COMMAND, SELF); -- command |= PCI_COMMAND_MASTER; -- pciWriteConfigReg (PCI_HOST0, PCI_COMMAND, SELF, command); -- command = pciReadConfigReg (PCI_HOST0, PCI_COMMAND, SELF); -- command |= PCI_COMMAND_MEMORY; -- pciWriteConfigReg (PCI_HOST0, PCI_COMMAND, SELF, command); -+ if (slave == 0) { -+ pciArbiterEnable (PCI_HOST0); -+ pciParkingDisable (PCI_HOST0, 1, 1, 1, 1, 1, 1, 1); -+ command = pciReadConfigReg (PCI_HOST0, PCI_COMMAND, SELF); -+ command |= PCI_COMMAND_MASTER; -+ pciWriteConfigReg (PCI_HOST0, PCI_COMMAND, SELF, command); -+ command = pciReadConfigReg (PCI_HOST0, PCI_COMMAND, SELF); -+ command |= PCI_COMMAND_MEMORY; -+ pciWriteConfigReg (PCI_HOST0, PCI_COMMAND, SELF, command); - - #ifdef CONFIG_PCI_PNP -- pciauto_config_init(&pci0_hose); -- pciauto_region_allocate(pci0_hose.pci_io, 0x400, &bar); -+ pciauto_config_init(&pci0_hose); -+ pciauto_region_allocate(pci0_hose.pci_io, 0x400, &bar); - #endif - #ifdef CONFIG_PCI_SCAN_SHOW -- printf("PCI: Bus Dev VenId DevId Class Int\n"); -+ printf("PCI: Bus Dev VenId DevId Class Int\n"); - #endif -- pci0_hose.last_busno = pci_hose_scan_bus (&pci0_hose, pci0_hose.first_busno); -+ pci0_hose.last_busno = pci_hose_scan_bus (&pci0_hose, -+ pci0_hose.first_busno); - - #ifdef DEBUG -- gt_pci_bus_mode_display (PCI_HOST1); -+ gt_pci_bus_mode_display (PCI_HOST1); - #endif -+ } else { -+ pciArbiterDisable (PCI_HOST0); -+ pciParkingDisable (PCI_HOST0, 1, 1, 1, 1, 1, 1, 1); -+ command = pciReadConfigReg (PCI_HOST0, PCI_COMMAND, SELF); -+ command |= PCI_COMMAND_MASTER; -+ pciWriteConfigReg (PCI_HOST0, PCI_COMMAND, SELF, command); -+ command = pciReadConfigReg (PCI_HOST0, PCI_COMMAND, SELF); -+ command |= PCI_COMMAND_MEMORY; -+ pciWriteConfigReg (PCI_HOST0, PCI_COMMAND, SELF, command); -+ pci0_hose.last_busno = pci0_hose.first_busno; -+ } - pci1_hose.first_busno = pci0_hose.last_busno + 1; - pci1_hose.last_busno = 0xff; - pci1_hose.current_busno = pci1_hose.first_busno; -diff --git a/board/esd/dasa_sim/cmd_dasa_sim.c b/board/esd/dasa_sim/cmd_dasa_sim.c -index 0310c47..675e507 100644 ---- a/board/esd/dasa_sim/cmd_dasa_sim.c -+++ b/board/esd/dasa_sim/cmd_dasa_sim.c -@@ -230,7 +230,7 @@ U_BOOT_CMD( - pci9054, 3, 1, do_pci9054, - "PLX PCI9054 EEPROM access", - "pci9054 info - print EEPROM values\n" -- "pci9054 update - updates EEPROM with default values\n" -+ "pci9054 update - updates EEPROM with default values" - ); - - /* ------------------------------------------------------------------------- */ -diff --git a/board/esd/dp405/config.mk b/board/esd/dp405/config.mk -index 3041b77..9b1a8be 100644 ---- a/board/esd/dp405/config.mk -+++ b/board/esd/dp405/config.mk -@@ -21,9 +21,4 @@ - # MA 02111-1307 USA - # - --# --# esd VOH405 boards --# -- --TEXT_BASE = 0xFFFC0000 --#TEXT_BASE = 0x00FC0000 -+TEXT_BASE = 0xFFFD0000 -diff --git a/board/esd/dp405/dp405.c b/board/esd/dp405/dp405.c -index c32c7c7..8f4b78d 100644 ---- a/board/esd/dp405/dp405.c -+++ b/board/esd/dp405/dp405.c -@@ -29,14 +29,6 @@ - - DECLARE_GLOBAL_DATA_PTR; - --/* fpga configuration data - not compressed, generated by bin2c */ --const unsigned char fpgadata[] = --{ --#include "fpgadata.c" --}; --int filesize = sizeof(fpgadata); -- -- - int board_early_init_f (void) - { - /* -@@ -97,20 +89,40 @@ int checkboard (void) - int i = getenv_r ("serial#", str, sizeof(str)); - unsigned char trans[16] = {0x0,0x8,0x4,0xc,0x2,0xa,0x6,0xe, - 0x1,0x9,0x5,0xd,0x3,0xb,0x7,0xf}; -- unsigned char id1, id2; -+ unsigned char id1, id2, rev; - - puts ("Board: "); - -- if (i == -1) { -+ if (i == -1) - puts ("### No HW ID - assuming DP405"); -- } else { -+ else - puts(str); -- } - - id1 = trans[(~(in_be32((void *)GPIO0_IR) >> 5)) & 0x0000000f]; - id2 = trans[(~(in_be32((void *)GPIO0_IR) >> 9)) & 0x0000000f]; -- printf(" (ID=0x%1X%1X, PLD=0x%02X)\n", -- id2, id1, in_8((void *)0xf0001000)); -+ -+ rev = in_8((void *)0xf0001000); -+ if (rev & 0x10) /* old DP405 compatibility */ -+ rev = in_8((void *)0xf0000800); -+ -+ switch (rev & 0xc0) { -+ case 0x00: -+ puts(" (HW=DP405"); -+ break; -+ case 0x80: -+ puts(" (HW=DP405/CO"); -+ break; -+ case 0xc0: -+ puts(" (HW=DN405"); -+ break; -+ } -+ printf(", ID=0x%1X%1X, PLD=0x%02X", id2, id1, rev & 0x0f); -+ -+ if ((rev & 0xc0) == 0xc0) { -+ printf(", C5V=%s", -+ in_be32((void *)GPIO0_IR) & 0x40000000 ? "off" : "on"); -+ } -+ puts(")\n"); - - return 0; - } -diff --git a/board/esd/dp405/fpgadata.c b/board/esd/dp405/fpgadata.c -deleted file mode 100644 -index eae8457..0000000 ---- a/board/esd/dp405/fpgadata.c -+++ /dev/null -@@ -1,1812 +0,0 @@ -- 0x07,0x20,0x12,0x00,0x12,0x01,0x04,0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x02,0x08, -- 0xfe,0x08,0x00,0x00,0x00,0x20,0x01,0x0f,0xff,0xff,0xff,0x09,0x00,0x00,0x00,0x00, -- 0xf9,0x60,0x40,0x93,0x02,0x08,0xff,0x02,0x08,0xff,0x02,0x08,0xe8,0x08,0x00,0x00, -- 0x00,0x06,0x01,0x00,0x09,0x05,0x00,0x02,0x08,0xed,0x04,0x00,0x03,0x0d,0x40,0x08, -- 0x00,0x00,0x00,0x12,0x01,0x00,0x00,0x00,0x09,0x03,0xff,0xff,0x00,0x00,0x00,0x01, -- 0x00,0x00,0x03,0x09,0x03,0xff,0xfd,0x03,0xff,0xfd,0x04,0x00,0x00,0x00,0x00,0x02, -- 0x08,0xea,0x08,0x00,0x00,0x00,0x32,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x00,0x04,0x00,0x00,0x00,0x01,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x08,0x00,0x00,0x00,0x01,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x0c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x01,0x09,0x00,0x00,0x10,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x01,0x09,0x00,0x00,0x20,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00, -- 0x01,0x09,0x00,0x00,0x24,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01, -- 0x09,0x00,0x00,0x28,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09, -- 0x00,0x00,0x2c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00, -- 0x00,0x30,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00, -- 0x40,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x44, -- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x48,0x00, -- 0x40,0x00,0x21,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x4c,0x00,0x80, -- 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x00,0x50,0x00,0x00,0x00,0x03,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x00, -- 0x80,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x09,0x00,0x00,0x84,0x00,0x00,0x00, -- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -- 0x09,0x00,0x00,0x88,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09, -- 0x00,0x00,0x8c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00, -- 0x00,0x90,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00, -- 0xa0,0x00,0x00,0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xa4, -- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xa8,0x00, -- 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xac,0x00,0x00, -- 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xb0,0x00,0x00,0x00, -- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xc0,0x00,0x00,0x00,0x01, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xc4,0x00,0x00,0x00,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xc8,0x00,0x00,0x00,0x01,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xcc,0x00,0x00,0x00,0x01,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x09,0x00,0x00,0xd0,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x01,0x00,0x00,0x00,0x00,0x01, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04, -- 0x00,0x00,0x00,0x00,0x09,0x00,0x01,0x04,0x00,0x00,0x01,0x01,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x01,0x08,0x00, -- 0x00,0x01,0x21,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x0c,0x00,0x00, -- 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x10,0x00,0x00,0x00, -- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x20,0x00,0x00,0x00,0x01, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x24,0x00,0x00,0x00,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x28,0x00,0x00,0x00,0x01,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x2c,0x00,0x00,0x00,0x01,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x30,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x01,0x09,0x00,0x01,0x40,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x01,0x09,0x00,0x01,0x44,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00, -- 0x01,0x09,0x00,0x01,0x48,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01, -- 0x09,0x00,0x01,0x4c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x04, -- 0x00,0x00,0x4e,0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x01,0x50, -- 0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x03,0x09,0x00,0x01,0x80,0x00,0x00,0x10,0x01,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x01,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x09, -- 0x00,0x01,0x84,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x01,0x88,0x00,0x00,0x00,0x01,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x8c,0x00,0x00,0x00,0x01,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x90,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x01,0x09,0x00,0x01,0xa0,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x01,0x09,0x00,0x01,0xa4,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00, -- 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0x00,0x33,0x80,0x00,0x00,0x20,0x11,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x09,0x00,0x33,0x84,0x00, -- 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x09,0x00,0x33,0x88,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00, -- 0x01,0x09,0x00,0x33,0x8c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01, -- 0x09,0x00,0x33,0x90,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09, -- 0x00,0x33,0xa0,0x00,0x00,0x00,0x21,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00, -- 0x33,0xa4,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x33, -- 0xa8,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x33,0xac, -- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x33,0xb0,0x00, -- 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x33,0xc0,0x00,0x00, -- 0x00,0x11,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x33,0xc4,0x00,0x00,0x00, -- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x33,0xc8,0x00,0x00,0x00,0x01, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x33,0xcc,0x00,0x00,0x00,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x09,0x00,0x33,0xd0,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x34,0x00,0x00,0x00, -- 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x00,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x04,0x00,0x00,0x00,0x00,0x09,0x00,0x34,0x04,0x00,0x00,0x00,0x01,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x34, -- 0x08,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x34,0x0c, -- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x34,0x10,0x00, -- 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x34,0x20,0x00,0x00, -- 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x34,0x24,0x00,0x00,0x00, -- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x34,0x28,0x00,0x00,0x00,0x01, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x34,0x2c,0x00,0x00,0x00,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x34,0x30,0x00,0x00,0x00,0x01,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x34,0x40,0x00,0x00,0x00,0x01,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x01,0x09,0x00,0x34,0x44,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x01,0x09,0x00,0x34,0x48,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x01,0x09,0x00,0x34,0x4c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00, -- 0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00, -- 0x34,0x50,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x34,0x80,0x00,0x00,0x00,0x01,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x01,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00, -- 0x00,0x09,0x00,0x34,0x84,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x34,0x88,0x00,0x00,0x00,0x01, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x34,0x8c,0x00,0x00,0x00,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x34,0x90,0x00,0x00,0x00,0x01,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x34,0xa0,0x00,0x00,0x00,0x01,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x01,0x09,0x00,0x34,0xa4,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x01,0x09,0x00,0x34,0xa8,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x01,0x09,0x00,0x34,0xac,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00, -- 0x01,0x09,0x00,0x34,0xb0,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01, -- 0x09,0x00,0x34,0xc0,0x00,0x80,0x08,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09, -- 0x00,0x34,0xc4,0x00,0x80,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00, -- 0x34,0xc8,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x34, -- 0xcc,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x4e, -- 0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x34,0xd0,0x00,0x00,0x00, -- 0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x03, -- 0x09,0x00,0x35,0x00,0x00,0x80,0x00,0x29,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x09,0x00,0x35,0x04, -- 0x00,0x00,0x04,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x09,0x00,0x35,0x08,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x01,0x09,0x00,0x35,0x0c,0x00,0x00,0xf4,0xc1,0x00,0x00,0x00,0x00,0x00,0x00, -- 0x01,0x09,0x00,0x35,0x10,0x00,0x00,0xc4,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01, -- 0x09,0x00,0x35,0x20,0x00,0x1c,0x40,0x99,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09, -- 0x00,0x35,0x24,0x00,0x00,0x80,0x05,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00, -- 0x35,0x28,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35, -- 0x2c,0x00,0x00,0xa0,0x41,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x30, -- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x40,0x00, -- 0x00,0x00,0x65,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x44,0x00,0x00, -- 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x48,0x00,0x00,0x00, -- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x4c,0x00,0x00,0x60,0x81, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x09,0x00,0x35,0x50,0x00,0x00,0x40,0x03,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x35,0x80,0x20, -- 0x00,0xcc,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x09,0x00,0x35,0x84,0x20,0x00,0xc8,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00, -- 0x35,0x88,0x20,0x00,0x08,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35, -- 0x8c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x90, -- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xa0,0xc0, -- 0x80,0x14,0x05,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xa4,0xc0,0x80, -- 0x54,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xa8,0xc0,0x00,0x94, -- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xac,0x00,0x00,0x40,0x01, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xb0,0x00,0x00,0x40,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xc0,0x08,0x00,0xc4,0x09,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xc4,0x08,0x00,0xc4,0x01,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xc8,0x08,0x00,0x00,0x01,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x01,0x09,0x00,0x35,0xcc,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09, -- 0x00,0x35,0xd0,0x00,0x00,0x80,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x35,0xd0,0x00,0x00,0x80,0x01,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x04,0x00,0x00, -- 0x00,0x64,0x02,0x08,0xf0,0x04,0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x02,0x08,0xff, -- 0x08,0x00,0x00,0x00,0x01,0x01,0x00,0x09,0x00,0x00,0x00, -diff --git a/board/esd/du440/du440.c b/board/esd/du440/du440.c -index 45dfa6f..0ec519b 100644 ---- a/board/esd/du440/du440.c -+++ b/board/esd/du440/du440.c -@@ -607,8 +607,8 @@ int do_dcf77(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - dcf77, 1, 1, do_dcf77, - "Check DCF77 receiver", -- NULL -- ); -+ "" -+); - - /* - * initialize USB hub via I2C1 -@@ -657,8 +657,8 @@ int do_hubinit(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - hubinit, 1, 1, do_hubinit, - "Initialize USB hub", -- NULL -- ); -+ "" -+); - #endif /* CONFIG_I2C_MULTI_BUS */ - - #define CONFIG_SYS_BOOT_EEPROM_PAGE_WRITE_BITS 3 -@@ -790,8 +790,8 @@ int do_setup_boot_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - sbe, 2, 0, do_setup_boot_eeprom, - "setup boot eeprom", -- NULL -- ); -+ "" -+); - - #if defined(CONFIG_SYS_EEPROM_WREN) - /* -@@ -863,8 +863,9 @@ int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - } - - U_BOOT_CMD(eepwren, 2, 0, do_eep_wren, -- "Enable / disable / query EEPROM write access", -- NULL); -+ "Enable / disable / query EEPROM write access", -+ "" -+); - #endif /* #if defined(CONFIG_SYS_EEPROM_WREN) */ - - static int got_pldirq; -@@ -916,8 +917,8 @@ int do_waitpwrirq(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - wpi, 1, 1, do_waitpwrirq, - "Wait for power change interrupt", -- NULL -- ); -+ "" -+); - - /* - * initialize DVI panellink transmitter -@@ -961,8 +962,8 @@ int do_dviinit(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - dviinit, 1, 1, do_dviinit, - "Initialize DVI Panellink transmitter", -- NULL -- ); -+ "" -+); - - /* - * TODO: 'time' command might be useful for others as well. -@@ -1001,8 +1002,8 @@ int do_time(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - time, CONFIG_SYS_MAXARGS, 1, do_time, - "run command and output execution time", -- NULL -- ); -+ "" -+); - - extern void video_hw_rectfill ( - unsigned int bpp, /* bytes per pixel */ -@@ -1051,5 +1052,5 @@ int do_gfxdemo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - gfxdemo, CONFIG_SYS_MAXARGS, 1, do_gfxdemo, - "demo", -- NULL -- ); -+ "" -+); -diff --git a/board/esd/hh405/hh405.c b/board/esd/hh405/hh405.c -index eab952c..5ae4c75 100644 ---- a/board/esd/hh405/hh405.c -+++ b/board/esd/hh405/hh405.c -@@ -769,8 +769,9 @@ int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - } - - U_BOOT_CMD(eepwren, 2, 0, do_eep_wren, -- "Enable / disable / query EEPROM write access", -- NULL); -+ "Enable / disable / query EEPROM write access", -+ "" -+); - #endif /* #if defined(CONFIG_SYS_EEPROM_WREN) */ - - -diff --git a/board/esd/mecp5123/Makefile b/board/esd/mecp5123/Makefile -new file mode 100644 -index 0000000..2e3d73a ---- /dev/null -+++ b/board/esd/mecp5123/Makefile -@@ -0,0 +1,50 @@ -+# -+# (C) Copyright 2009 Wolfgang Denk -+# -+# See file CREDITS for list of people who contributed to this -+# project. -+# -+# This program is free software; you can redistribute it and/or -+# modify it under the terms of the GNU General Public License as -+# published by the Free Software Foundation; either version 2 of -+# the License, or (at your option) any later version. -+# -+# This program is distributed in the hope that it will be useful, -+# but WITHOUT ANY WARRANTY; without even the implied warranty of -+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+# GNU General Public License for more details. -+# -+# You should have received a copy of the GNU General Public License -+# along with this program; if not, write to the Free Software -+# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+# MA 02111-1307 USA -+# -+ -+include $(TOPDIR)/config.mk -+ -+LIB = $(obj)lib$(BOARD).a -+ -+COBJS-y := $(BOARD).o -+ -+COBJS := $(COBJS-y) -+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -+OBJS := $(addprefix $(obj),$(COBJS)) -+SOBJS := $(addprefix $(obj),$(SOBJS)) -+ -+$(LIB): $(obj).depend $(OBJS) -+ $(AR) $(ARFLAGS) $@ $(OBJS) -+ -+clean: -+ rm -f $(SOBJS) $(OBJS) -+ -+distclean: clean -+ rm -f $(LIB) core *.bak $(obj).depend -+ -+######################################################################### -+ -+# defines $(obj).depend target -+include $(SRCTREE)/rules.mk -+ -+sinclude $(obj).depend -+ -+######################################################################### -diff --git a/board/esd/mecp5123/config.mk b/board/esd/mecp5123/config.mk -new file mode 100644 -index 0000000..838a018 ---- /dev/null -+++ b/board/esd/mecp5123/config.mk -@@ -0,0 +1,23 @@ -+# -+# (C) Copyright 2009 Wolfgang Denk -+# -+# See file CREDITS for list of people who contributed to this -+# project. -+# -+# This program is free software; you can redistribute it and/or -+# modify it under the terms of the GNU General Public License as -+# published by the Free Software Foundation; either version 2 of -+# the License, or (at your option) any later version. -+# -+# This program is distributed in the hope that it will be useful, -+# but WITHOUT ANY WARRANTY; without even the implied warranty of -+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+# GNU General Public License for more details. -+# -+# You should have received a copy of the GNU General Public License -+# along with this program; if not, write to the Free Software -+# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+# MA 02111-1307 USA -+# -+ -+TEXT_BASE = 0xFFF00000 -diff --git a/board/esd/mecp5123/mecp5123.c b/board/esd/mecp5123/mecp5123.c -new file mode 100644 -index 0000000..909b458 ---- /dev/null -+++ b/board/esd/mecp5123/mecp5123.c -@@ -0,0 +1,381 @@ -+/* -+ * (C) Copyright 2009 Wolfgang Denk -+ * (C) Copyright 2009 Dave Srl www.dave.eu -+ * (C) Copyright 2009 Stefan Roese -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+DECLARE_GLOBAL_DATA_PTR; -+ -+/* Clocks in use */ -+#define SCCR1_CLOCKS_EN (CLOCK_SCCR1_CFG_EN | \ -+ CLOCK_SCCR1_LPC_EN | \ -+ CLOCK_SCCR1_PSC_EN(CONFIG_PSC_CONSOLE) | \ -+ CLOCK_SCCR1_PSCFIFO_EN | \ -+ CLOCK_SCCR1_DDR_EN | \ -+ CLOCK_SCCR1_FEC_EN | \ -+ CLOCK_SCCR1_NFC_EN | \ -+ CLOCK_SCCR1_PCI_EN | \ -+ CLOCK_SCCR1_TPR_EN) -+ -+#define SCCR2_CLOCKS_EN (CLOCK_SCCR2_MEM_EN | \ -+ CLOCK_SCCR2_I2C_EN) -+ -+#define CSAW_START(start) ((start) & 0xFFFF0000) -+#define CSAW_STOP(start, size) (((start) + (size) - 1) >> 16) -+ -+int eeprom_write_enable(unsigned dev_addr, int state) -+{ -+ volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; -+ -+ if (dev_addr != CONFIG_SYS_I2C_EEPROM_ADDR) -+ return -1; -+ -+ if (state == 0) -+ setbits_be32(&im->gpio.gpdat, 0x00100000); -+ else -+ clrbits_be32(&im->gpio.gpdat, 0x00100000); -+ -+return 0; -+} -+ -+/* -+ * According to MPC5121e RM, configuring local access windows should -+ * be followed by a dummy read of the config register that was -+ * modified last and an isync. -+ */ -+static inline void sync_law(volatile void *addr) -+{ -+ in_be32(addr); -+ __asm__ __volatile__ ("isync"); -+} -+ -+int board_early_init_f(void) -+{ -+ volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; -+ u32 spridr; -+ -+ /* -+ * Initialize Local Window for NOR FLASH access -+ */ -+ out_be32(&im->sysconf.lpcs0aw, -+ CSAW_START(CONFIG_SYS_FLASH_BASE) | -+ CSAW_STOP(CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_SIZE)); -+ sync_law(&im->sysconf.lpcs0aw); -+ -+ /* -+ * Initialize Local Window for boot access -+ */ -+ out_be32(&im->sysconf.lpbaw, -+ CSAW_START(0xffb00000) | CSAW_STOP(0xffb00000, 0x00010000)); -+ sync_law(&im->sysconf.lpbaw); -+ -+ /* -+ * Initialize Local Window for VPC3 access -+ */ -+ out_be32(&im->sysconf.lpcs1aw, -+ CSAW_START(CONFIG_SYS_VPC3_BASE) | -+ CSAW_STOP(CONFIG_SYS_VPC3_BASE, CONFIG_SYS_VPC3_SIZE)); -+ sync_law(&im->sysconf.lpcs1aw); -+ -+ /* -+ * Configure Flash Speed -+ */ -+ out_be32(&im->lpc.cs_cfg[0], CONFIG_SYS_CS0_CFG); -+ -+ /* -+ * Configure VPC3 Speed -+ */ -+ out_be32(&im->lpc.cs_cfg[1], CONFIG_SYS_CS1_CFG); -+ -+ spridr = in_be32(&im->sysconf.spridr); -+ if (SVR_MJREV(spridr) >= 2) -+ out_be32(&im->lpc.altr, CONFIG_SYS_CS_ALETIMING); -+ -+ /* -+ * Enable clocks -+ */ -+ out_be32(&im->clk.sccr[0], SCCR1_CLOCKS_EN); -+ out_be32(&im->clk.sccr[1], SCCR2_CLOCKS_EN); -+#if defined(CONFIG_IIM) || defined(CONFIG_CMD_FUSE) -+ setbits_be32(&im->clk.sccr[1], CLOCK_SCCR2_IIM_EN); -+#endif -+ -+ /* -+ * Configure MSCAN clocks -+ */ -+ out_be32(&im->clk.m1ccr, 0x00300000); -+ out_be32(&im->clk.m2ccr, 0x00300000); -+ out_be32(&im->clk.m3ccr, 0x00300000); -+ out_be32(&im->clk.m4ccr, 0x00300000); -+ out_be32(&im->clk.m1ccr, 0x00310000); -+ out_be32(&im->clk.m2ccr, 0x00310000); -+ out_be32(&im->clk.m3ccr, 0x00310000); -+ out_be32(&im->clk.m4ccr, 0x00310000); -+ -+ /* -+ * Configure GPIO's -+ */ -+ clrbits_be32(&im->gpio.gpodr, 0x000000e0); -+ clrbits_be32(&im->gpio.gpdir, 0x00ef0000); -+ setbits_be32(&im->gpio.gpdir, 0x001000e0); -+ setbits_be32(&im->gpio.gpdat, 0x00100000); -+ -+ return 0; -+} -+ -+/* -+ * fixed sdram init: -+ * The board doesn't use memory modules that have serial presence -+ * detect or similar mechanism for discovery of the DRAM settings -+ */ -+long int fixed_sdram(void) -+{ -+ volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; -+ u32 msize = CONFIG_SYS_DDR_SIZE * 1024 * 1024; -+ u32 msize_log2 = __ilog2(msize); -+ u32 i; -+ -+ /* Initialize IO Control */ -+ out_be32(&im->io_ctrl.io_control_mem, IOCTRL_MUX_DDR); -+ -+ /* Initialize DDR Local Window */ -+ out_be32(&im->sysconf.ddrlaw.bar, CONFIG_SYS_DDR_BASE & 0xFFFFF000); -+ out_be32(&im->sysconf.ddrlaw.ar, msize_log2 - 1); -+ sync_law(&im->sysconf.ddrlaw.ar); -+ -+ /* Enable DDR */ -+ out_be32(&im->mddrc.ddr_sys_config, CONFIG_SYS_MDDRC_SYS_CFG_EN); -+ -+ /* Initialize DDR Priority Manager */ -+ out_be32(&im->mddrc.prioman_config1, CONFIG_SYS_MDDRCGRP_PM_CFG1); -+ out_be32(&im->mddrc.prioman_config2, CONFIG_SYS_MDDRCGRP_PM_CFG2); -+ out_be32(&im->mddrc.hiprio_config, CONFIG_SYS_MDDRCGRP_HIPRIO_CFG); -+ out_be32(&im->mddrc.lut_table0_main_upper, CONFIG_SYS_MDDRCGRP_LUT0_MU); -+ out_be32(&im->mddrc.lut_table0_main_lower, CONFIG_SYS_MDDRCGRP_LUT0_ML); -+ out_be32(&im->mddrc.lut_table1_main_upper, CONFIG_SYS_MDDRCGRP_LUT1_MU); -+ out_be32(&im->mddrc.lut_table1_main_lower, CONFIG_SYS_MDDRCGRP_LUT1_ML); -+ out_be32(&im->mddrc.lut_table2_main_upper, CONFIG_SYS_MDDRCGRP_LUT2_MU); -+ out_be32(&im->mddrc.lut_table2_main_lower, CONFIG_SYS_MDDRCGRP_LUT2_ML); -+ out_be32(&im->mddrc.lut_table3_main_upper, CONFIG_SYS_MDDRCGRP_LUT3_MU); -+ out_be32(&im->mddrc.lut_table3_main_lower, CONFIG_SYS_MDDRCGRP_LUT3_ML); -+ out_be32(&im->mddrc.lut_table4_main_upper, CONFIG_SYS_MDDRCGRP_LUT4_MU); -+ out_be32(&im->mddrc.lut_table4_main_lower, CONFIG_SYS_MDDRCGRP_LUT4_ML); -+ out_be32(&im->mddrc.lut_table0_alternate_upper, CONFIG_SYS_MDDRCGRP_LUT0_AU); -+ out_be32(&im->mddrc.lut_table0_alternate_lower, CONFIG_SYS_MDDRCGRP_LUT0_AL); -+ out_be32(&im->mddrc.lut_table1_alternate_upper, CONFIG_SYS_MDDRCGRP_LUT1_AU); -+ out_be32(&im->mddrc.lut_table1_alternate_lower, CONFIG_SYS_MDDRCGRP_LUT1_AL); -+ out_be32(&im->mddrc.lut_table2_alternate_upper, CONFIG_SYS_MDDRCGRP_LUT2_AU); -+ out_be32(&im->mddrc.lut_table2_alternate_lower, CONFIG_SYS_MDDRCGRP_LUT2_AL); -+ out_be32(&im->mddrc.lut_table3_alternate_upper, CONFIG_SYS_MDDRCGRP_LUT3_AU); -+ out_be32(&im->mddrc.lut_table3_alternate_lower, CONFIG_SYS_MDDRCGRP_LUT3_AL); -+ out_be32(&im->mddrc.lut_table4_alternate_upper, CONFIG_SYS_MDDRCGRP_LUT4_AU); -+ out_be32(&im->mddrc.lut_table4_alternate_lower, CONFIG_SYS_MDDRCGRP_LUT4_AL); -+ -+ /* Initialize MDDRC */ -+ out_be32(&im->mddrc.ddr_sys_config, CONFIG_SYS_MDDRC_SYS_CFG); -+ out_be32(&im->mddrc.ddr_time_config0, CONFIG_SYS_MDDRC_TIME_CFG0); -+ out_be32(&im->mddrc.ddr_time_config1, CONFIG_SYS_MDDRC_TIME_CFG1); -+ out_be32(&im->mddrc.ddr_time_config2, CONFIG_SYS_MDDRC_TIME_CFG2); -+ -+ /* Initialize DDR */ -+ for (i = 0; i < 10; i++) -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP); -+ -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_PCHG_ALL); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_RFSH); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_RFSH); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_INIT_DEV_OP); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_EM2); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_PCHG_ALL); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_EM2); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_EM3); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_EN_DLL); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_INIT_DEV_OP); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_PCHG_ALL); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_RFSH); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_INIT_DEV_OP); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_OCD_DEFAULT); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_PCHG_ALL); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP); -+ -+ /* Start MDDRC */ -+ out_be32(&im->mddrc.ddr_time_config0, CONFIG_SYS_MDDRC_TIME_CFG0_RUN); -+ out_be32(&im->mddrc.ddr_sys_config, CONFIG_SYS_MDDRC_SYS_CFG_RUN); -+ -+ return msize; -+} -+ -+phys_size_t initdram(int board_type) -+{ -+ return get_ram_size(0, fixed_sdram()); -+} -+ -+int misc_init_r(void) -+{ -+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; -+ u32 val; -+ -+ /* -+ * Optimize access to profibus chip (VPC3) on the local bus -+ */ -+ -+ /* -+ * Select 1:1 for LPC_DIV -+ */ -+ val = in_be32(&im->clk.scfr[0]) & ~SCFR1_LPC_DIV_MASK; -+ out_be32(&im->clk.scfr[0], val | (0x1 << SCFR1_LPC_DIV_SHIFT)); -+ -+ /* -+ * Configure LPC Chips Select Deadcycle Control Register -+ * CS0 - device can drive data 2 clock cycle(s) after CS deassertion -+ * CS1 - device can drive data 1 clock cycle(s) after CS deassertion -+ */ -+ clrbits_be32(&im->lpc.cs_dccr, 0x000000ff); -+ setbits_be32(&im->lpc.cs_dccr, (0x00 << 4) | (0x01 << 0)); -+ -+ /* -+ * Configure LPC Chips Select Holdcycle Control Register -+ * CS0 - data is valid 2 clock cycle(s) after CS deassertion -+ * CS1 - data is valid 1 clock cycle(s) after CS deassertion -+ */ -+ clrbits_be32(&im->lpc.cs_hccr, 0x000000ff); -+ setbits_be32(&im->lpc.cs_hccr, (0x00 << 4) | (0x01 << 0)); -+ -+ return 0; -+} -+ -+static iopin_t ioregs_init[] = { -+ /* FUNC1=FEC_RX_DV Sets Next 3 to FEC pads */ -+ { -+ offsetof(struct ioctrl512x, io_control_spdif_txclk), 3, 0, -+ IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) -+ }, -+ /* FUNC1=FEC_COL Sets Next 15 to FEC pads */ -+ { -+ offsetof(struct ioctrl512x, io_control_psc0_0), 15, 0, -+ IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) -+ }, -+ /* FUNC1=SELECT LPC_CS1 */ -+ { -+ offsetof(struct ioctrl512x, io_control_lpc_cs1), 1, 0, -+ IO_PIN_FMUX(0) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) -+ }, -+ /* FUNC3=SELECT PSC5_2 */ -+ { -+ offsetof(struct ioctrl512x, io_control_psc5_2), 1, 0, -+ IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) -+ }, -+ /* FUNC3=SELECT PSC5_3 */ -+ { -+ offsetof(struct ioctrl512x, io_control_psc5_3), 1, 0, -+ IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) -+ }, -+ /* FUNC3=SELECT PSC7_3 */ -+ { -+ offsetof(struct ioctrl512x, io_control_psc7_3), 1, 0, -+ IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) -+ }, -+ /* FUNC3=SELECT PSC9_0 */ -+ { -+ offsetof(struct ioctrl512x, io_control_psc9_0), 3, 0, -+ IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) -+ }, -+ /* FUNC3=SELECT PSC10_0 */ -+ { -+ offsetof(struct ioctrl512x, io_control_psc10_0), 3, 0, -+ IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) -+ }, -+ /* FUNC3=SELECT PSC10_3 */ -+ { -+ offsetof(struct ioctrl512x, io_control_psc10_3), 1, 0, -+ IO_PIN_FMUX(0) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) -+ }, -+ /* FUNC3=SELECT PSC11_0 */ -+ { -+ offsetof(struct ioctrl512x, io_control_psc11_0), 4, 0, -+ IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) -+ }, -+ /* FUNC0=SELECT IRQ0 */ -+ { -+ offsetof(struct ioctrl512x, io_control_irq0), 4, 0, -+ IO_PIN_FMUX(0) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) -+ } -+}; -+ -+static iopin_t rev2_silicon_pci_ioregs_init[] = { -+ /* FUNC0=PCI Sets next 54 to PCI pads */ -+ { -+ offsetof(struct ioctrl512x, io_control_pci_ad31), 54, 0, -+ IO_PIN_FMUX(0) | IO_PIN_HOLD(0) | IO_PIN_DS(0) -+ } -+}; -+ -+int checkboard(void) -+{ -+ volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; -+ u32 spridr; -+ -+ puts("Board: MECP_5123\n"); -+ -+ /* -+ * Initialize function mux & slew rate IO inter alia on IO -+ * Pins -+ */ -+ iopin_initialize(ioregs_init, ARRAY_SIZE(ioregs_init)); -+ -+ spridr = in_be32(&im->sysconf.spridr); -+ if (SVR_MJREV(spridr) >= 2) -+ iopin_initialize(rev2_silicon_pci_ioregs_init, 1); -+ -+ return 0; -+} -+ -+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) -+void ft_board_setup(void *blob, bd_t *bd) -+{ -+ ft_cpu_setup(blob, bd); -+ fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); -+} -+#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ -diff --git a/board/esd/ocrtc/cmd_ocrtc.c b/board/esd/ocrtc/cmd_ocrtc.c -index db2c548..5f3254d 100644 ---- a/board/esd/ocrtc/cmd_ocrtc.c -+++ b/board/esd/ocrtc/cmd_ocrtc.c -@@ -55,7 +55,7 @@ int do_setdevice(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - setdevice, 1, 1, do_setdevice, - "Set device number on pci adapter boards", -- NULL -+ "" - ); - - -@@ -78,7 +78,7 @@ int do_getdevice(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - getdevice, 1, 1, do_getdevice, - "Get device number and set slot env variable", -- NULL -+ "" - ); - - #endif -diff --git a/board/esd/pci405/cmd_pci405.c b/board/esd/pci405/cmd_pci405.c -index a0d1f3f..1d14611 100644 ---- a/board/esd/pci405/cmd_pci405.c -+++ b/board/esd/pci405/cmd_pci405.c -@@ -109,6 +109,6 @@ int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - loadpci, 1, 1, do_loadpci, - "Wait for pci-image and boot it", -- NULL -+ "" - ); - #endif -diff --git a/board/esd/pci405/pci405.c b/board/esd/pci405/pci405.c -index 8973f97..56184ca 100644 ---- a/board/esd/pci405/pci405.c -+++ b/board/esd/pci405/pci405.c -@@ -381,5 +381,5 @@ U_BOOT_CMD( - "wpeeprom 1\n" - " - enable I2C EEPROM write protection\n" - "wpeeprom 0\n" -- " - disable I2C EEPROM write protection\n" -- ); -+ " - disable I2C EEPROM write protection" -+); -diff --git a/board/esd/pf5200/pf5200.c b/board/esd/pf5200/pf5200.c -index f225f0e..4e64e83 100644 ---- a/board/esd/pf5200/pf5200.c -+++ b/board/esd/pf5200/pf5200.c -@@ -294,7 +294,7 @@ int do_poweroff(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - return (0); - } - --U_BOOT_CMD(poweroff, 1, 1, do_poweroff, "Switch off power", NULL); -+U_BOOT_CMD(poweroff, 1, 1, do_poweroff, "Switch off power", ""); - - int phypower(int flag) - { -@@ -338,7 +338,7 @@ int do_phypower(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - } - - U_BOOT_CMD(phypower, 2, 2, do_phypower, -- "Switch power of ethernet phy", NULL); -+ "Switch power of ethernet phy", ""); - - int do_writepci(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - { -@@ -369,5 +369,7 @@ int do_writepci(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - } - - U_BOOT_CMD(writepci, 3, 1, do_writepci, -- "Write some data to pcibus", -- " \n" " - Write some data to pcibus.\n"); -+ "Write some data to pcibus", -+ " \n" -+ "" -+); -diff --git a/board/esd/plu405/plu405.c b/board/esd/plu405/plu405.c -index a94604a..fdacbf6 100644 ---- a/board/esd/plu405/plu405.c -+++ b/board/esd/plu405/plu405.c -@@ -333,6 +333,7 @@ int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - } - - U_BOOT_CMD(eepwren, 2, 0, do_eep_wren, -- "Enable / disable / query EEPROM write access", -- NULL); -+ "Enable / disable / query EEPROM write access", -+ "" -+); - #endif /* #if defined(CONFIG_SYS_EEPROM_WREN) */ -diff --git a/board/esd/pmc405/fpgadata.c b/board/esd/pmc405/fpgadata.c -deleted file mode 100644 -index ebdf71d..0000000 ---- a/board/esd/pmc405/fpgadata.c -+++ /dev/null -@@ -1,2472 +0,0 @@ -- 0x07,0x20,0x12,0x00,0x12,0x01,0x04,0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x02,0x08, -- 0xfe,0x08,0x00,0x00,0x00,0x20,0x01,0x0f,0xff,0xff,0xff,0x09,0x00,0x00,0x00,0x00, -- 0xf9,0x60,0x20,0x93,0x02,0x08,0xff,0x02,0x08,0xff,0x02,0x08,0xe8,0x08,0x00,0x00, -- 0x00,0x06,0x01,0x00,0x09,0x05,0x00,0x02,0x08,0xed,0x04,0x00,0x03,0x0d,0x40,0x08, -- 0x00,0x00,0x00,0x12,0x01,0x00,0x00,0x00,0x09,0x03,0xff,0xff,0x00,0x00,0x00,0x01, -- 0x00,0x00,0x03,0x09,0x03,0xff,0xfd,0x03,0xff,0xfd,0x04,0x00,0x00,0x00,0x00,0x02, -- 0x08,0xea,0x08,0x00,0x00,0x00,0x22,0x01,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x00, -- 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x09,0x00, -- 0x00,0x04,0x38,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x08,0x00,0x01,0x00, -- 0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x0c,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09, -- 0x00,0x00,0x10,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x20,0x00,0x01, -- 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x24,0x38,0x01,0x00,0x00,0x00,0x00,0x01, -- 0x09,0x00,0x00,0x28,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x2c,0x00, -- 0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x30,0x00,0x01,0x00,0x00,0x00,0x00, -- 0x01,0x09,0x00,0x00,0x40,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x44, -- 0x14,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x48,0x00,0x01,0x00,0x00,0x00, -- 0x00,0x01,0x09,0x00,0x00,0x4c,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00, -- 0x4e,0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x00,0x50,0x00,0x03,0x00,0x00, -- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x00,0x80,0x00,0x01,0x00, -- 0x00,0x00,0x00,0x01,0x01,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x09, -- 0x00,0x00,0x84,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00, -- 0x09,0x00,0x00,0x88,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x8c,0x00, -- 0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x90,0x00,0x01,0x00,0x00,0x00,0x00, -- 0x01,0x09,0x00,0x00,0xa0,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xa4, -- 0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xa8,0x00,0x01,0x00,0x00,0x00, -- 0x00,0x01,0x09,0x00,0x00,0xac,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00, -- 0xb0,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xc0,0x00,0x01,0x00,0x00, -- 0x00,0x00,0x01,0x09,0x00,0x00,0xc4,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00, -- 0x00,0xc8,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xcc,0x00,0x01,0x00, -- 0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x09, -- 0x00,0x00,0xd0,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x03, -- 0x09,0x00,0x01,0x00,0x01,0x01,0x00,0x00,0x00,0x00,0x01,0x01,0x00,0x00,0x00,0x00, -- 0x00,0x04,0x00,0x00,0x00,0x00,0x09,0x00,0x01,0x04,0x00,0x01,0x00,0x00,0x00,0x00, -- 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x01,0x08,0x01,0x01,0x00,0x00,0x00, -- 0x00,0x01,0x09,0x00,0x01,0x0c,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01, -- 0x10,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x20,0x00,0x01,0x00,0x00, -- 0x00,0x00,0x01,0x09,0x00,0x01,0x24,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00, -- 0x01,0x28,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x2c,0x00,0x01,0x00, -- 0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x30,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09, -- 0x00,0x01,0x40,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x44,0x00,0x01, -- 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x48,0x00,0x01,0x00,0x00,0x00,0x00,0x01, -- 0x09,0x00,0x01,0x4c,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x4e,0x20, -- 0x01,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x01,0x50,0x00,0x03,0x00,0x00,0x00,0x00, -- 0x00,0x01,0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x01,0x80,0x00,0x01,0x00,0x00,0x00, -- 0x00,0x01,0x01,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x09,0x00,0x01, -- 0x84,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x09,0x00, -- 0x01,0x88,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x8c,0x00,0x01,0x00, -- 0x00,0x00,0x00,0x01,0x09,0x00,0x01,0x90,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09, -- 0x00,0x01,0xa0,0x10,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0xa4,0x00,0x01, -- 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0xa8,0x00,0x01,0x00,0x00,0x00,0x00,0x01, -- 0x09,0x00,0x01,0xac,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0xb0,0x00, -- 0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0xc0,0x00,0x21,0x00,0x00,0x00,0x00, -- 0x01,0x09,0x00,0x01,0xc4,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0xc8, -- 0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x01,0xcc,0x00,0x01,0x00,0x00,0x00, -- 0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x01, -- 0xd0,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x03,0x09,0x00, -- 0x02,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x01,0x00,0x00,0x00,0x00,0x00,0x04, -- 0x00,0x00,0x00,0x00,0x09,0x00,0x02,0x04,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x01, -- 0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x02,0x08,0x00,0x01,0x00,0x00,0x00,0x00,0x01, -- 0x09,0x00,0x02,0x0c,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x02,0x10,0x00, -- 0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x02,0x20,0x00,0x01,0x00,0x00,0x00,0x00, -- 0x01,0x09,0x00,0x02,0x24,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x02,0x28, -- 0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x02,0x2c,0x00,0x01,0x00,0x00,0x00, -- 0x00,0x01,0x09,0x00,0x02,0x30,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x02, -- 0x40,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x02,0x44,0x00,0x01,0x00,0x00, -- 0x00,0x00,0x01,0x09,0x00,0x02,0x48,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00, -- 0x02,0x4c,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x09,0x00,0x02,0x50,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x01, -- 0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x02,0x80,0x00,0x01,0x00,0x00,0x00,0x00,0x01, -- 0x01,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x09,0x00,0x02,0x84,0x00, -- 0x01,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x02,0x88, -- 0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x02,0x8c,0x00,0x01,0x00,0x00,0x00, -- 0x00,0x01,0x09,0x00,0x02,0x90,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x02, -- 0xa0,0x00,0x81,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x02,0xa4,0x00,0x01,0x00,0x00, -- 0x00,0x00,0x01,0x09,0x00,0x02,0xa8,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00, -- 0x02,0xac,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x02,0xb0,0x00,0x01,0x00, -- 0x00,0x00,0x00,0x01,0x09,0x00,0x02,0xc0,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09, -- 0x00,0x02,0xc4,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x02,0xc8,0x00,0x01, -- 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x02,0xcc,0x00,0x01,0x00,0x00,0x00,0x00,0x01, -- 0x04,0x00,0x00,0x4e,0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x02,0xd0,0x00, -- 0x03,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x03,0x00, -- 0x01,0x01,0x00,0x00,0x00,0x00,0x01,0x01,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00, -- 0x00,0x00,0x09,0x00,0x03,0x04,0x03,0x01,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00, -- 0x00,0x00,0x00,0x09,0x00,0x03,0x08,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00, -- 0x03,0x0c,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x03,0x10,0x01,0x01,0x00, -- 0x00,0x00,0x00,0x01,0x09,0x00,0x03,0x20,0x02,0x01,0x00,0x00,0x00,0x00,0x01,0x09, -- 0x00,0x03,0x24,0x03,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x03,0x28,0x01,0x01, -- 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x03,0x2c,0x00,0x01,0x00,0x00,0x00,0x00,0x01, -- 0x09,0x00,0x03,0x30,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x03,0x40,0x00, -- 0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x03,0x44,0x00,0x01,0x00,0x00,0x00,0x00, -- 0x01,0x09,0x00,0x03,0x48,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x03,0x4c, -- 0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00,0x00,0x00, -- 0x00,0x00,0x09,0x00,0x03,0x50,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00, -- 0x00,0x00,0x03,0x09,0x00,0x03,0x80,0x01,0x41,0x00,0x00,0x00,0x00,0x01,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x09,0x00,0x03,0x84,0x02,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x03,0x88,0x00,0x01, -- 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x03,0x8c,0x03,0x01,0x00,0x00,0x00,0x00,0x01, -- 0x09,0x00,0x03,0x90,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x03,0xa0,0x03, -- 0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x03,0xa4,0x01,0x01,0x00,0x00,0x00,0x00, -- 0x01,0x09,0x00,0x03,0xa8,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x03,0xac, -- 0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x03,0xb0,0x00,0x01,0x00,0x00,0x00, -- 0x00,0x01,0x09,0x00,0x03,0xc0,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x03, -- 0xc4,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x03,0xc8,0x00,0x01,0x00,0x00, -- 0x00,0x00,0x01,0x09,0x00,0x03,0xcc,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x04,0x00, -- 0x00,0x4e,0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x03,0xd0,0x00,0x03,0x00, -- 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0x09,0x00,0x11,0xc4,0xc0,0x03,0x00,0x11,0xc0,0x20,0x01,0x09,0x00,0x11,0xc8,0x08, -- 0x0b,0x00,0x11,0xc4,0xc0,0x01,0x09,0x00,0x11,0xcc,0x00,0x03,0x00,0x11,0xc8,0x08, -- 0x09,0x09,0x00,0x11,0xd0,0x00,0x13,0x00,0x11,0xcc,0x00,0x01,0x09,0x00,0x12,0x00, -- 0x00,0x03,0x00,0x11,0xd0,0x00,0x11,0x09,0x00,0x12,0x04,0x00,0x03,0x00,0x12,0x00, -- 0x00,0x01,0x09,0x00,0x12,0x08,0x00,0x03,0x00,0x12,0x04,0x00,0x01,0x09,0x00,0x12, -- 0x0c,0x00,0x03,0x00,0x12,0x08,0x00,0x01,0x09,0x00,0x12,0x10,0x00,0x03,0x00,0x12, -- 0x0c,0x00,0x01,0x09,0x00,0x12,0x20,0x00,0x03,0x00,0x12,0x10,0x00,0x01,0x09,0x00, -- 0x12,0x24,0x00,0x03,0x00,0x12,0x20,0x00,0x01,0x09,0x00,0x12,0x28,0x00,0x03,0x00, -- 0x12,0x24,0x00,0x01,0x09,0x00,0x12,0x2c,0x00,0x03,0x00,0x12,0x28,0x00,0x01,0x09, -- 0x00,0x12,0x30,0x00,0x03,0x00,0x12,0x2c,0x00,0x01,0x09,0x00,0x12,0x40,0x00,0x03, -- 0x00,0x12,0x30,0x00,0x01,0x09,0x00,0x12,0x44,0x00,0x03,0x00,0x12,0x40,0x00,0x01, -- 0x09,0x00,0x12,0x48,0x00,0x03,0x00,0x12,0x44,0x00,0x01,0x09,0x00,0x12,0x4c,0x00, -- 0x03,0x00,0x12,0x48,0x00,0x01,0x09,0x00,0x12,0x50,0x00,0x03,0x00,0x12,0x4c,0x00, -- 0x01,0x09,0x00,0x12,0x80,0x00,0x03,0x00,0x12,0x50,0x00,0x01,0x09,0x00,0x12,0x84, -- 0x00,0x03,0x00,0x12,0x80,0x00,0x01,0x09,0x00,0x12,0x88,0x00,0x03,0x00,0x12,0x84, -- 0x00,0x01,0x09,0x00,0x12,0x8c,0x00,0x03,0x00,0x12,0x88,0x00,0x01,0x09,0x00,0x12, -- 0x90,0x00,0x03,0x00,0x12,0x8c,0x00,0x01,0x09,0x00,0x12,0xa0,0x00,0x03,0x00,0x12, -- 0x90,0x00,0x01,0x09,0x00,0x12,0xa4,0x00,0x03,0x00,0x12,0xa0,0x00,0x01,0x09,0x00, -- 0x12,0xa8,0x00,0x03,0x00,0x12,0xa4,0x00,0x01,0x09,0x00,0x12,0xac,0x00,0x03,0x00, -- 0x12,0xa8,0x00,0x01,0x09,0x00,0x12,0xb0,0x00,0x03,0x00,0x12,0xac,0x00,0x01,0x09, -- 0x00,0x12,0xc0,0x00,0x03,0x00,0x12,0xb0,0x00,0x01,0x09,0x00,0x12,0xc4,0x00,0x03, -- 0x00,0x12,0xc0,0x00,0x01,0x09,0x00,0x12,0xc8,0x00,0x03,0x00,0x12,0xc4,0x00,0x01, -- 0x09,0x00,0x12,0xcc,0x00,0x03,0x00,0x12,0xc8,0x00,0x01,0x09,0x00,0x12,0xd0,0x00, -- 0x03,0x00,0x12,0xcc,0x00,0x01,0x09,0x00,0x13,0x00,0x00,0x03,0x00,0x12,0xd0,0x00, -- 0x01,0x09,0x00,0x13,0x04,0x00,0x03,0x00,0x13,0x00,0x00,0x01,0x09,0x00,0x13,0x08, -- 0x00,0x03,0x00,0x13,0x04,0x00,0x01,0x09,0x00,0x13,0x0c,0x00,0x03,0x00,0x13,0x08, -- 0x00,0x01,0x09,0x00,0x13,0x10,0x00,0x03,0x00,0x13,0x0c,0x00,0x01,0x09,0x00,0x13, -- 0x20,0x00,0x03,0x00,0x13,0x10,0x00,0x01,0x09,0x00,0x13,0x24,0x00,0x03,0x00,0x13, -- 0x20,0x00,0x01,0x09,0x00,0x13,0x28,0x00,0x03,0x00,0x13,0x24,0x00,0x01,0x09,0x00, -- 0x13,0x2c,0x00,0x03,0x00,0x13,0x28,0x00,0x01,0x09,0x00,0x13,0x30,0x00,0x03,0x00, -- 0x13,0x2c,0x00,0x01,0x09,0x00,0x13,0x40,0x00,0x03,0x00,0x13,0x30,0x00,0x01,0x09, -- 0x00,0x13,0x44,0x00,0x03,0x00,0x13,0x40,0x00,0x01,0x09,0x00,0x13,0x48,0x00,0x03, -- 0x00,0x13,0x44,0x00,0x01,0x09,0x00,0x13,0x4c,0x00,0x03,0x00,0x13,0x48,0x00,0x01, -- 0x09,0x00,0x13,0x50,0x00,0x03,0x00,0x13,0x4c,0x00,0x01,0x09,0x00,0x13,0x80,0x00, -- 0x03,0x00,0x13,0x50,0x00,0x01,0x09,0x00,0x13,0x84,0x00,0x03,0x00,0x13,0x80,0x00, -- 0x01,0x09,0x00,0x13,0x88,0x00,0x03,0x00,0x13,0x84,0x00,0x01,0x09,0x00,0x13,0x8c, -- 0x00,0x03,0x00,0x13,0x88,0x00,0x01,0x09,0x00,0x13,0x90,0x00,0x03,0x00,0x13,0x8c, -- 0x00,0x01,0x09,0x00,0x13,0xa2,0x00,0x03,0x00,0x13,0x90,0x00,0x01,0x09,0x00,0x13, -- 0xa4,0x00,0x03,0x00,0x13,0xa2,0x00,0x01,0x09,0x00,0x13,0xa8,0x00,0x03,0x00,0x13, -- 0xa4,0x00,0x01,0x09,0x00,0x13,0xac,0x00,0x03,0x00,0x13,0xa8,0x00,0x01,0x09,0x00, -- 0x13,0xb0,0x00,0x03,0x00,0x13,0xac,0x00,0x01,0x09,0x00,0x13,0xc0,0x00,0x03,0x00, -- 0x13,0xb0,0x00,0x01,0x09,0x00,0x13,0xc4,0x00,0x03,0x00,0x13,0xc0,0x00,0x01,0x09, -- 0x00,0x13,0xc8,0x00,0x03,0x00,0x13,0xc4,0x00,0x01,0x09,0x00,0x13,0xcc,0x00,0x03, -- 0x00,0x13,0xc8,0x00,0x01,0x09,0x00,0x13,0xd0,0x00,0x03,0x00,0x13,0xcc,0x00,0x01, -- 0x09,0x00,0x14,0x00,0x00,0x03,0x00,0x13,0xd0,0x00,0x01,0x09,0x00,0x14,0x04,0x00, -- 0x03,0x00,0x14,0x00,0x00,0x01,0x09,0x00,0x14,0x08,0x00,0x03,0x00,0x14,0x04,0x00, -- 0x01,0x09,0x00,0x14,0x0e,0x00,0x03,0x00,0x14,0x08,0x00,0x01,0x09,0x00,0x14,0x10, -- 0x00,0x03,0x00,0x14,0x0e,0x00,0x01,0x09,0x00,0x14,0x23,0x00,0x03,0x00,0x14,0x10, -- 0x00,0x01,0x09,0x00,0x14,0x24,0x00,0x03,0x00,0x14,0x23,0x00,0x01,0x09,0x00,0x14, -- 0x28,0x00,0x03,0x00,0x14,0x24,0x00,0x01,0x09,0x00,0x14,0x2e,0x00,0x03,0x00,0x14, -- 0x28,0x00,0x01,0x09,0x00,0x14,0x30,0x00,0x03,0x00,0x14,0x2e,0x00,0x01,0x09,0x00, -- 0x14,0x40,0x00,0x03,0x00,0x14,0x30,0x00,0x01,0x09,0x00,0x14,0x44,0x00,0x03,0x00, -- 0x14,0x40,0x00,0x01,0x09,0x00,0x14,0x48,0x00,0x03,0x00,0x14,0x44,0x00,0x01,0x09, -- 0x00,0x14,0x4c,0x00,0x03,0x00,0x14,0x48,0x00,0x01,0x09,0x00,0x14,0x50,0x00,0x03, -- 0x00,0x14,0x4c,0x00,0x01,0x09,0x00,0x14,0x80,0x00,0x03,0x00,0x14,0x50,0x00,0x01, -- 0x09,0x00,0x14,0x84,0x00,0x03,0x00,0x14,0x80,0x00,0x01,0x09,0x00,0x14,0x88,0x00, -- 0x03,0x00,0x14,0x84,0x00,0x01,0x09,0x00,0x14,0x8c,0x00,0x03,0x00,0x14,0x88,0x00, -- 0x01,0x09,0x00,0x14,0x90,0x00,0x03,0x00,0x14,0x8c,0x00,0x01,0x09,0x00,0x14,0xa0, -- 0x00,0x03,0x00,0x14,0x90,0x00,0x01,0x09,0x00,0x14,0xa4,0x00,0x03,0x00,0x14,0xa0, -- 0x00,0x01,0x09,0x00,0x14,0xa8,0x00,0x03,0x00,0x14,0xa4,0x00,0x01,0x09,0x00,0x14, -- 0xac,0x00,0x03,0x00,0x14,0xa8,0x00,0x01,0x09,0x00,0x14,0xb0,0x00,0x03,0x00,0x14, -- 0xac,0x00,0x01,0x09,0x00,0x14,0xc0,0x00,0x03,0x00,0x14,0xb0,0x00,0x01,0x09,0x00, -- 0x14,0xc4,0x00,0x03,0x00,0x14,0xc0,0x00,0x01,0x09,0x00,0x14,0xc8,0x00,0x03,0x00, -- 0x14,0xc4,0x00,0x01,0x09,0x00,0x14,0xcc,0x00,0x03,0x00,0x14,0xc8,0x00,0x01,0x09, -- 0x00,0x14,0xd0,0x00,0x03,0x00,0x14,0xcc,0x00,0x01,0x09,0x00,0x15,0x00,0x00,0x03, -- 0x00,0x14,0xd0,0x00,0x01,0x09,0x00,0x15,0x04,0x00,0x13,0x00,0x15,0x00,0x00,0x01, -- 0x09,0x00,0x15,0x08,0xc0,0x33,0x00,0x15,0x04,0x00,0x11,0x09,0x00,0x15,0x0c,0x80, -- 0x03,0x00,0x15,0x08,0xc0,0x31,0x09,0x00,0x15,0x10,0x80,0x03,0x00,0x15,0x0c,0x80, -- 0x01,0x09,0x00,0x15,0x20,0x04,0x03,0x00,0x15,0x10,0x80,0x01,0x09,0x00,0x15,0x24, -- 0x00,0x03,0x00,0x15,0x20,0x04,0x01,0x09,0x00,0x15,0x28,0x00,0x13,0x00,0x15,0x24, -- 0x00,0x01,0x09,0x00,0x15,0x2c,0x00,0x13,0x00,0x15,0x28,0x00,0x11,0x09,0x00,0x15, -- 0x30,0x00,0x13,0x00,0x15,0x2c,0x00,0x11,0x09,0x00,0x15,0x40,0x28,0x03,0x00,0x15, -- 0x30,0x00,0x11,0x09,0x00,0x15,0x44,0x28,0x0b,0x00,0x15,0x40,0x28,0x01,0x09,0x00, -- 0x15,0x48,0x48,0x1b,0x00,0x15,0x44,0x28,0x09,0x09,0x00,0x15,0x4c,0x00,0x13,0x00, -- 0x15,0x48,0x48,0x19,0x09,0x00,0x15,0x50,0x00,0x13,0x00,0x15,0x4c,0x00,0x11,0x09, -- 0x00,0x15,0x80,0xc0,0x33,0x00,0x15,0x50,0x00,0x11,0x09,0x00,0x15,0x84,0xc0,0x23, -- 0x00,0x15,0x80,0xc0,0x31,0x09,0x00,0x15,0x88,0x00,0x03,0x00,0x15,0x84,0xc0,0x21, -- 0x09,0x00,0x15,0x8c,0x00,0x03,0x00,0x15,0x88,0x00,0x01,0x09,0x00,0x15,0x90,0x00, -- 0x03,0x00,0x15,0x8c,0x00,0x01,0x09,0x00,0x15,0xa0,0x00,0x13,0x00,0x15,0x90,0x00, -- 0x01,0x09,0x00,0x15,0xa4,0x00,0x13,0x00,0x15,0xa0,0x00,0x11,0x09,0x00,0x15,0xa8, -- 0x00,0x03,0x00,0x15,0xa4,0x00,0x11,0x09,0x00,0x15,0xac,0x00,0x03,0x00,0x15,0xa8, -- 0x00,0x01,0x09,0x00,0x15,0xb0,0x00,0x03,0x00,0x15,0xac,0x00,0x01,0x09,0x00,0x15, -- 0xc0,0xc0,0x1b,0x00,0x15,0xb0,0x00,0x01,0x09,0x00,0x15,0xc4,0x40,0x13,0x00,0x15, -- 0xc0,0xc0,0x19,0x09,0x00,0x15,0xc8,0x00,0x03,0x00,0x15,0xc4,0x40,0x11,0x09,0x00, -- 0x15,0xcc,0x80,0x03,0x00,0x15,0xc8,0x00,0x01,0x09,0x00,0x15,0xd0,0x00,0x03,0x00, -- 0x15,0xcc,0x80,0x01,0x09,0x00,0x16,0x02,0x02,0x03,0x00,0x15,0xd0,0x00,0x01,0x09, -- 0x00,0x16,0x06,0x3a,0x03,0x00,0x16,0x02,0x02,0x01,0x09,0x00,0x16,0x0b,0x42,0x03, -- 0x00,0x16,0x06,0x3a,0x01,0x09,0x00,0x16,0x0d,0x02,0x03,0x00,0x16,0x0b,0x42,0x01, -- 0x09,0x00,0x16,0x13,0x02,0x03,0x00,0x16,0x0d,0x02,0x01,0x09,0x00,0x16,0x20,0x03, -- 0x03,0x00,0x16,0x13,0x02,0x01,0x09,0x00,0x16,0x27,0x3b,0x03,0x00,0x16,0x20,0x03, -- 0x01,0x09,0x00,0x16,0x2b,0x03,0x03,0x00,0x16,0x27,0x3b,0x01,0x09,0x00,0x16,0x2d, -- 0x01,0x03,0x00,0x16,0x2b,0x03,0x01,0x09,0x00,0x16,0x30,0x00,0x03,0x00,0x16,0x2d, -- 0x01,0x01,0x09,0x00,0x16,0x40,0x00,0x0b,0x00,0x16,0x30,0x00,0x01,0x09,0x00,0x16, -- 0x44,0x14,0x0b,0x00,0x16,0x40,0x00,0x09,0x09,0x00,0x16,0x48,0x00,0x0b,0x00,0x16, -- 0x44,0x14,0x09,0x09,0x00,0x16,0x4c,0x00,0x03,0x00,0x16,0x48,0x00,0x09,0x09,0x00, -- 0x16,0x50,0x00,0x03,0x00,0x16,0x4c,0x00,0x01,0x09,0x00,0x16,0x83,0x02,0x13,0x00, -- 0x16,0x50,0x00,0x01,0x09,0x00,0x16,0x87,0x02,0x13,0x00,0x16,0x83,0x02,0x11,0x09, -- 0x00,0x16,0x8b,0x02,0x13,0x00,0x16,0x87,0x02,0x11,0x09,0x00,0x16,0x8f,0x02,0x03, -- 0x00,0x16,0x8b,0x02,0x11,0x09,0x00,0x16,0x93,0x02,0x03,0x00,0x16,0x8f,0x02,0x01, -- 0x09,0x00,0x16,0xa3,0x03,0x03,0x00,0x16,0x93,0x02,0x01,0x09,0x00,0x16,0xa7,0x07, -- 0x03,0x00,0x16,0xa3,0x03,0x01,0x09,0x00,0x16,0xab,0x03,0x03,0x00,0x16,0xa7,0x07, -- 0x01,0x09,0x00,0x16,0xaf,0x01,0x03,0x00,0x16,0xab,0x03,0x01,0x09,0x00,0x16,0xb0, -- 0x00,0x03,0x00,0x16,0xaf,0x01,0x01,0x09,0x00,0x16,0xc0,0x00,0x03,0x00,0x16,0xb0, -- 0x00,0x01,0x09,0x00,0x16,0xc4,0x00,0x03,0x00,0x16,0xc0,0x00,0x01,0x09,0x00,0x16, -- 0xc8,0x08,0x03,0x00,0x16,0xc4,0x00,0x01,0x09,0x00,0x16,0xcc,0x00,0x03,0x00,0x16, -- 0xc8,0x08,0x01,0x09,0x00,0x16,0xd0,0x00,0x03,0x00,0x16,0xcc,0x00,0x01,0x09,0x00, -- 0x17,0x02,0x02,0x03,0x00,0x16,0xd0,0x00,0x01,0x09,0x00,0x17,0x07,0x02,0x03,0x00, -- 0x17,0x02,0x02,0x01,0x09,0x00,0x17,0x0b,0x02,0x03,0x00,0x17,0x07,0x02,0x01,0x09, -- 0x00,0x17,0x0f,0x02,0x03,0x00,0x17,0x0b,0x02,0x01,0x09,0x00,0x17,0x11,0x02,0x03, -- 0x00,0x17,0x0f,0x02,0x01,0x09,0x00,0x17,0x23,0x03,0x03,0x00,0x17,0x11,0x02,0x01, -- 0x09,0x00,0x17,0x27,0x03,0x03,0x00,0x17,0x23,0x03,0x01,0x09,0x00,0x17,0x2b,0x03, -- 0x03,0x00,0x17,0x27,0x03,0x01,0x09,0x00,0x17,0x2f,0x01,0x03,0x00,0x17,0x2b,0x03, -- 0x01,0x09,0x00,0x17,0x30,0x00,0x03,0x00,0x17,0x2f,0x01,0x01,0x09,0x00,0x17,0x40, -- 0x00,0x03,0x00,0x17,0x30,0x00,0x01,0x09,0x00,0x17,0x44,0x00,0x03,0x00,0x17,0x40, -- 0x00,0x01,0x09,0x00,0x17,0x48,0x00,0x03,0x00,0x17,0x44,0x00,0x01,0x09,0x00,0x17, -- 0x4c,0x00,0x03,0x00,0x17,0x48,0x00,0x01,0x09,0x00,0x17,0x50,0x00,0x03,0x00,0x17, -- 0x4c,0x00,0x01,0x09,0x00,0x17,0x80,0x0a,0x03,0x00,0x17,0x50,0x00,0x01,0x09,0x00, -- 0x17,0x84,0x00,0x03,0x00,0x17,0x80,0x0a,0x01,0x09,0x00,0x17,0x88,0x00,0x03,0x00, -- 0x17,0x84,0x00,0x01,0x09,0x00,0x17,0x8e,0x00,0x03,0x00,0x17,0x88,0x00,0x01,0x09, -- 0x00,0x17,0x90,0x00,0x03,0x00,0x17,0x8e,0x00,0x01,0x09,0x00,0x17,0xa3,0x01,0x03, -- 0x00,0x17,0x90,0x00,0x01,0x09,0x00,0x17,0xa6,0x01,0x03,0x00,0x17,0xa3,0x01,0x01, -- 0x09,0x00,0x17,0xa8,0x01,0x03,0x00,0x17,0xa6,0x01,0x01,0x09,0x00,0x17,0xae,0x01, -- 0x03,0x00,0x17,0xa8,0x01,0x01,0x09,0x00,0x17,0xb0,0x00,0x03,0x00,0x17,0xae,0x01, -- 0x01,0x09,0x00,0x17,0xc0,0x00,0x03,0x00,0x17,0xb0,0x00,0x01,0x09,0x00,0x17,0xc4, -- 0x00,0x03,0x00,0x17,0xc0,0x00,0x01,0x09,0x00,0x17,0xc8,0x00,0x03,0x00,0x17,0xc4, -- 0x00,0x01,0x09,0x00,0x17,0xcc,0x00,0x03,0x00,0x17,0xc8,0x00,0x01,0x09,0x00,0x17, -- 0xd0,0x00,0x03,0x00,0x17,0xcc,0x00,0x01,0x09,0x00,0x18,0x00,0x00,0x03,0x00,0x17, -- 0xd0,0x00,0x01,0x09,0x00,0x18,0x04,0x00,0x03,0x00,0x18,0x00,0x00,0x01,0x09,0x00, -- 0x18,0x08,0x00,0x03,0x00,0x18,0x04,0x00,0x01,0x09,0x00,0x18,0x0c,0x00,0x03,0x00, -- 0x18,0x08,0x00,0x01,0x09,0x00,0x18,0x10,0x00,0x03,0x00,0x18,0x0c,0x00,0x01,0x09, -- 0x00,0x18,0x20,0x00,0x03,0x00,0x18,0x10,0x00,0x01,0x09,0x00,0x18,0x26,0x00,0x03, -- 0x00,0x18,0x20,0x00,0x01,0x09,0x00,0x18,0x28,0x01,0x03,0x00,0x18,0x26,0x00,0x01, -- 0x09,0x00,0x18,0x2e,0x01,0x03,0x00,0x18,0x28,0x01,0x01,0x09,0x00,0x18,0x30,0x00, -- 0x03,0x00,0x18,0x2e,0x01,0x01,0x09,0x00,0x18,0x40,0x00,0x03,0x00,0x18,0x30,0x00, -- 0x01,0x09,0x00,0x18,0x44,0x00,0x03,0x00,0x18,0x40,0x00,0x01,0x09,0x00,0x18,0x48, -- 0x00,0x03,0x00,0x18,0x44,0x00,0x01,0x09,0x00,0x18,0x4c,0x00,0x03,0x00,0x18,0x48, -- 0x00,0x01,0x09,0x00,0x18,0x50,0x00,0x03,0x00,0x18,0x4c,0x00,0x01,0x09,0x00,0x18, -- 0x80,0x00,0x03,0x00,0x18,0x50,0x00,0x01,0x09,0x00,0x18,0x84,0x00,0x03,0x00,0x18, -- 0x80,0x00,0x01,0x09,0x00,0x18,0x88,0x00,0x03,0x00,0x18,0x84,0x00,0x01,0x09,0x00, -- 0x18,0x8c,0x00,0x03,0x00,0x18,0x88,0x00,0x01,0x09,0x00,0x18,0x90,0x00,0x03,0x00, -- 0x18,0x8c,0x00,0x01,0x09,0x00,0x18,0xa0,0x00,0x03,0x00,0x18,0x90,0x00,0x01,0x09, -- 0x00,0x18,0xa6,0x00,0x03,0x00,0x18,0xa0,0x00,0x01,0x09,0x00,0x18,0xa8,0x01,0x03, -- 0x00,0x18,0xa6,0x00,0x01,0x09,0x00,0x18,0xac,0x01,0x03,0x00,0x18,0xa8,0x01,0x01, -- 0x09,0x00,0x18,0xb0,0x00,0x03,0x00,0x18,0xac,0x01,0x01,0x09,0x00,0x18,0xc0,0x00, -- 0x03,0x00,0x18,0xb0,0x00,0x01,0x09,0x00,0x18,0xc4,0x00,0x03,0x00,0x18,0xc0,0x00, -- 0x01,0x09,0x00,0x18,0xc8,0x00,0x03,0x00,0x18,0xc4,0x00,0x01,0x09,0x00,0x18,0xcc, -- 0x00,0x03,0x00,0x18,0xc8,0x00,0x01,0x09,0x00,0x18,0xd0,0x00,0x03,0x00,0x18,0xcc, -- 0x00,0x01,0x09,0x00,0x19,0x01,0x00,0x03,0x00,0x18,0xd0,0x00,0x01,0x09,0x00,0x19, -- 0x04,0x00,0x03,0x00,0x19,0x01,0x00,0x01,0x09,0x00,0x19,0x08,0x00,0x03,0x00,0x19, -- 0x04,0x00,0x01,0x09,0x00,0x19,0x0c,0x00,0x03,0x00,0x19,0x08,0x00,0x01,0x09,0x00, -- 0x19,0x11,0x00,0x03,0x00,0x19,0x0c,0x00,0x01,0x09,0x00,0x19,0x20,0x00,0x03,0x00, -- 0x19,0x11,0x00,0x01,0x09,0x00,0x19,0x24,0x00,0x03,0x00,0x19,0x20,0x00,0x01,0x09, -- 0x00,0x19,0x28,0x00,0x03,0x00,0x19,0x24,0x00,0x01,0x09,0x00,0x19,0x2c,0x00,0x03, -- 0x00,0x19,0x28,0x00,0x01,0x09,0x00,0x19,0x30,0x00,0x03,0x00,0x19,0x2c,0x00,0x01, -- 0x09,0x00,0x19,0x40,0x00,0x03,0x00,0x19,0x30,0x00,0x01,0x09,0x00,0x19,0x44,0x00, -- 0x03,0x00,0x19,0x40,0x00,0x01,0x09,0x00,0x19,0x48,0x00,0x03,0x00,0x19,0x44,0x00, -- 0x01,0x09,0x00,0x19,0x4c,0x00,0x03,0x00,0x19,0x48,0x00,0x01,0x09,0x00,0x19,0x50, -- 0x00,0x03,0x00,0x19,0x4c,0x00,0x01,0x09,0x00,0x19,0x80,0x01,0x03,0x00,0x19,0x50, -- 0x00,0x01,0x09,0x00,0x19,0x85,0x00,0x03,0x00,0x19,0x80,0x01,0x01,0x09,0x00,0x19, -- 0x88,0x00,0x03,0x00,0x19,0x85,0x00,0x01,0x09,0x00,0x19,0x8c,0x00,0x03,0x00,0x19, -- 0x88,0x00,0x01,0x09,0x00,0x19,0x90,0x00,0x03,0x00,0x19,0x8c,0x00,0x01,0x09,0x00, -- 0x19,0xa0,0x00,0x03,0x00,0x19,0x90,0x00,0x01,0x09,0x00,0x19,0xa4,0x00,0x03,0x00, -- 0x19,0xa0,0x00,0x01,0x09,0x00,0x19,0xa8,0x00,0x03,0x00,0x19,0xa4,0x00,0x01,0x09, -- 0x00,0x19,0xac,0x00,0x03,0x00,0x19,0xa8,0x00,0x01,0x09,0x00,0x19,0xb0,0x00,0x03, -- 0x00,0x19,0xac,0x00,0x01,0x09,0x00,0x19,0xc0,0x00,0x03,0x00,0x19,0xb0,0x00,0x01, -- 0x09,0x00,0x19,0xc4,0x00,0x03,0x00,0x19,0xc0,0x00,0x01,0x09,0x00,0x19,0xc8,0x00, -- 0x03,0x00,0x19,0xc4,0x00,0x01,0x09,0x00,0x19,0xcc,0x00,0x03,0x00,0x19,0xc8,0x00, -- 0x01,0x09,0x00,0x19,0xd0,0x00,0x03,0x00,0x19,0xcc,0x00,0x01,0x09,0x00,0x1a,0x00, -- 0x01,0x03,0x00,0x19,0xd0,0x00,0x01,0x09,0x00,0x1a,0x04,0x00,0x03,0x00,0x1a,0x00, -- 0x01,0x01,0x09,0x00,0x1a,0x08,0x00,0x03,0x00,0x1a,0x04,0x00,0x01,0x09,0x00,0x1a, -- 0x0c,0x00,0x03,0x00,0x1a,0x08,0x00,0x01,0x09,0x00,0x1a,0x10,0x00,0x03,0x00,0x1a, -- 0x0c,0x00,0x01,0x09,0x00,0x1a,0x20,0x00,0x13,0x00,0x1a,0x10,0x00,0x01,0x09,0x00, -- 0x1a,0x24,0x00,0x13,0x00,0x1a,0x20,0x00,0x11,0x09,0x00,0x1a,0x28,0x00,0x13,0x00, -- 0x1a,0x24,0x00,0x11,0x09,0x00,0x1a,0x2c,0x00,0x13,0x00,0x1a,0x28,0x00,0x11,0x09, -- 0x00,0x1a,0x30,0x00,0x13,0x00,0x1a,0x2c,0x00,0x11,0x09,0x00,0x1a,0x40,0x00,0x13, -- 0x00,0x1a,0x30,0x00,0x11,0x09,0x00,0x1a,0x44,0x00,0x13,0x00,0x1a,0x40,0x00,0x11, -- 0x09,0x00,0x1a,0x48,0x00,0x13,0x00,0x1a,0x44,0x00,0x11,0x09,0x00,0x1a,0x4c,0x00, -- 0x13,0x00,0x1a,0x48,0x00,0x11,0x09,0x00,0x1a,0x50,0x00,0x13,0x00,0x1a,0x4c,0x00, -- 0x11,0x09,0x00,0x1a,0x82,0x81,0x03,0x00,0x1a,0x50,0x00,0x11,0x09,0x00,0x1a,0x84, -- 0x80,0x03,0x00,0x1a,0x82,0x81,0x01,0x09,0x00,0x1a,0x88,0x80,0x03,0x00,0x1a,0x84, -- 0x80,0x01,0x09,0x00,0x1a,0x8c,0x80,0x03,0x00,0x1a,0x88,0x80,0x01,0x09,0x00,0x1a, -- 0x90,0x80,0x03,0x00,0x1a,0x8c,0x80,0x01,0x09,0x00,0x1a,0xa0,0x00,0x03,0x00,0x1a, -- 0x90,0x80,0x01,0x09,0x00,0x1a,0xa4,0x00,0x03,0x00,0x1a,0xa0,0x00,0x01,0x09,0x00, -- 0x1a,0xa8,0x00,0x03,0x00,0x1a,0xa4,0x00,0x01,0x09,0x00,0x1a,0xac,0x00,0x03,0x00, -- 0x1a,0xa8,0x00,0x01,0x09,0x00,0x1a,0xb0,0x00,0x03,0x00,0x1a,0xac,0x00,0x01,0x09, -- 0x00,0x1a,0xc0,0x00,0x03,0x00,0x1a,0xb0,0x00,0x01,0x09,0x00,0x1a,0xc4,0x00,0x03, -- 0x00,0x1a,0xc0,0x00,0x01,0x09,0x00,0x1a,0xc8,0x00,0x03,0x00,0x1a,0xc4,0x00,0x01, -- 0x09,0x00,0x1a,0xcc,0x00,0x03,0x00,0x1a,0xc8,0x00,0x01,0x09,0x00,0x1a,0xd0,0x00, -- 0x03,0x00,0x1a,0xcc,0x00,0x01,0x09,0x00,0x1b,0x00,0x01,0x03,0x00,0x1a,0xd0,0x00, -- 0x01,0x09,0x00,0x1b,0x04,0x00,0x03,0x00,0x1b,0x00,0x01,0x01,0x09,0x00,0x1b,0x08, -- 0x00,0x03,0x00,0x1b,0x04,0x00,0x01,0x09,0x00,0x1b,0x0c,0x00,0x03,0x00,0x1b,0x08, -- 0x00,0x01,0x09,0x00,0x1b,0x10,0x00,0x03,0x00,0x1b,0x0c,0x00,0x01,0x09,0x00,0x1b, -- 0x20,0x00,0x03,0x00,0x1b,0x10,0x00,0x01,0x09,0x00,0x1b,0x24,0x00,0x03,0x00,0x1b, -- 0x20,0x00,0x01,0x09,0x00,0x1b,0x28,0x00,0x03,0x00,0x1b,0x24,0x00,0x01,0x09,0x00, -- 0x1b,0x2c,0x00,0x03,0x00,0x1b,0x28,0x00,0x01,0x09,0x00,0x1b,0x30,0x00,0x03,0x00, -- 0x1b,0x2c,0x00,0x01,0x09,0x00,0x1b,0x40,0x00,0x03,0x00,0x1b,0x30,0x00,0x01,0x09, -- 0x00,0x1b,0x44,0x00,0x03,0x00,0x1b,0x40,0x00,0x01,0x09,0x00,0x1b,0x48,0x00,0x03, -- 0x00,0x1b,0x44,0x00,0x01,0x09,0x00,0x1b,0x4c,0x00,0x03,0x00,0x1b,0x48,0x00,0x01, -- 0x09,0x00,0x1b,0x50,0x00,0x03,0x00,0x1b,0x4c,0x00,0x01,0x09,0x00,0x1b,0x81,0x01, -- 0x03,0x00,0x1b,0x50,0x00,0x01,0x09,0x00,0x1b,0x84,0x00,0x03,0x00,0x1b,0x81,0x01, -- 0x01,0x09,0x00,0x1b,0x88,0x00,0x03,0x00,0x1b,0x84,0x00,0x01,0x09,0x00,0x1b,0x8c, -- 0x00,0x03,0x00,0x1b,0x88,0x00,0x01,0x09,0x00,0x1b,0x91,0x01,0x03,0x00,0x1b,0x8c, -- 0x00,0x01,0x09,0x00,0x1b,0xa0,0x00,0x03,0x00,0x1b,0x91,0x01,0x01,0x09,0x00,0x1b, -- 0xa4,0x00,0x03,0x00,0x1b,0xa0,0x00,0x01,0x09,0x00,0x1b,0xa8,0x00,0x03,0x00,0x1b, -- 0xa4,0x00,0x01,0x09,0x00,0x1b,0xac,0x00,0x03,0x00,0x1b,0xa8,0x00,0x01,0x09,0x00, -- 0x1b,0xb0,0x00,0x03,0x00,0x1b,0xac,0x00,0x01,0x09,0x00,0x1b,0xc0,0x00,0x03,0x00, -- 0x1b,0xb0,0x00,0x01,0x09,0x00,0x1b,0xc4,0x00,0x03,0x00,0x1b,0xc0,0x00,0x01,0x09, -- 0x00,0x1b,0xc8,0x00,0x03,0x00,0x1b,0xc4,0x00,0x01,0x09,0x00,0x1b,0xcc,0x00,0x03, -- 0x00,0x1b,0xc8,0x00,0x01,0x09,0x00,0x1b,0xd0,0x00,0x03,0x00,0x1b,0xcc,0x00,0x01, -- 0x09,0x00,0x1c,0x00,0x00,0x03,0x00,0x1b,0xd0,0x00,0x01,0x09,0x00,0x1c,0x07,0x00, -- 0x03,0x00,0x1c,0x00,0x00,0x01,0x09,0x00,0x1c,0x08,0x00,0x03,0x00,0x1c,0x07,0x00, -- 0x01,0x09,0x00,0x1c,0x0c,0x00,0x03,0x00,0x1c,0x08,0x00,0x01,0x09,0x00,0x1c,0x10, -- 0x00,0x03,0x00,0x1c,0x0c,0x00,0x01,0x09,0x00,0x1c,0x20,0x00,0x03,0x00,0x1c,0x10, -- 0x00,0x01,0x09,0x00,0x1c,0x24,0x00,0x03,0x00,0x1c,0x20,0x00,0x01,0x09,0x00,0x1c, -- 0x28,0x00,0x03,0x00,0x1c,0x24,0x00,0x01,0x09,0x00,0x1c,0x2c,0x00,0x03,0x00,0x1c, -- 0x28,0x00,0x01,0x09,0x00,0x1c,0x30,0x00,0x03,0x00,0x1c,0x2c,0x00,0x01,0x09,0x00, -- 0x1c,0x40,0x00,0x03,0x00,0x1c,0x30,0x00,0x01,0x09,0x00,0x1c,0x44,0x00,0x03,0x00, -- 0x1c,0x40,0x00,0x01,0x09,0x00,0x1c,0x48,0x00,0x03,0x00,0x1c,0x44,0x00,0x01,0x09, -- 0x00,0x1c,0x4c,0x00,0x03,0x00,0x1c,0x48,0x00,0x01,0x09,0x00,0x1c,0x50,0x00,0x03, -- 0x00,0x1c,0x4c,0x00,0x01,0x09,0x00,0x1c,0x80,0x00,0x03,0x00,0x1c,0x50,0x00,0x01, -- 0x09,0x00,0x1c,0x85,0x00,0x03,0x00,0x1c,0x80,0x00,0x01,0x09,0x00,0x1c,0x88,0x00, -- 0x03,0x00,0x1c,0x85,0x00,0x01,0x09,0x00,0x1c,0x8c,0x00,0x03,0x00,0x1c,0x88,0x00, -- 0x01,0x09,0x00,0x1c,0x90,0x00,0x03,0x00,0x1c,0x8c,0x00,0x01,0x09,0x00,0x1c,0xa0, -- 0x00,0x03,0x00,0x1c,0x90,0x00,0x01,0x09,0x00,0x1c,0xa4,0x00,0x03,0x00,0x1c,0xa0, -- 0x00,0x01,0x09,0x00,0x1c,0xa8,0x00,0x03,0x00,0x1c,0xa4,0x00,0x01,0x09,0x00,0x1c, -- 0xac,0x00,0x03,0x00,0x1c,0xa8,0x00,0x01,0x09,0x00,0x1c,0xb0,0x00,0x03,0x00,0x1c, -- 0xac,0x00,0x01,0x09,0x00,0x1c,0xc0,0x00,0x03,0x00,0x1c,0xb0,0x00,0x01,0x09,0x00, -- 0x1c,0xc4,0x00,0x03,0x00,0x1c,0xc0,0x00,0x01,0x09,0x00,0x1c,0xc8,0x00,0x03,0x00, -- 0x1c,0xc4,0x00,0x01,0x09,0x00,0x1c,0xcc,0x00,0x03,0x00,0x1c,0xc8,0x00,0x01,0x09, -- 0x00,0x1c,0xd0,0x00,0x03,0x00,0x1c,0xcc,0x00,0x01,0x09,0x00,0x1d,0x01,0x00,0x03, -- 0x00,0x1c,0xd0,0x00,0x01,0x09,0x00,0x1d,0x04,0x00,0x03,0x00,0x1d,0x01,0x00,0x01, -- 0x09,0x00,0x1d,0x08,0x00,0x03,0x00,0x1d,0x04,0x00,0x01,0x09,0x00,0x1d,0x0c,0x00, -- 0x03,0x00,0x1d,0x08,0x00,0x01,0x09,0x00,0x1d,0x10,0x00,0x03,0x00,0x1d,0x0c,0x00, -- 0x01,0x09,0x00,0x1d,0x20,0x00,0x03,0x00,0x1d,0x10,0x00,0x01,0x09,0x00,0x1d,0x24, -- 0x00,0x03,0x00,0x1d,0x20,0x00,0x01,0x09,0x00,0x1d,0x28,0x00,0x03,0x00,0x1d,0x24, -- 0x00,0x01,0x09,0x00,0x1d,0x2c,0x00,0x03,0x00,0x1d,0x28,0x00,0x01,0x09,0x00,0x1d, -- 0x30,0x00,0x03,0x00,0x1d,0x2c,0x00,0x01,0x09,0x00,0x1d,0x40,0x00,0x03,0x00,0x1d, -- 0x30,0x00,0x01,0x09,0x00,0x1d,0x44,0x00,0x03,0x00,0x1d,0x40,0x00,0x01,0x09,0x00, -- 0x1d,0x48,0x00,0x03,0x00,0x1d,0x44,0x00,0x01,0x09,0x00,0x1d,0x4c,0x00,0x03,0x00, -- 0x1d,0x48,0x00,0x01,0x09,0x00,0x1d,0x50,0x00,0x03,0x00,0x1d,0x4c,0x00,0x01,0x09, -- 0x00,0x1d,0x80,0x00,0x03,0x00,0x1d,0x50,0x00,0x01,0x09,0x00,0x1d,0x87,0x00,0x03, -- 0x00,0x1d,0x80,0x00,0x01,0x09,0x00,0x1d,0x88,0x00,0x03,0x00,0x1d,0x87,0x00,0x01, -- 0x09,0x00,0x1d,0x8c,0x00,0x03,0x00,0x1d,0x88,0x00,0x01,0x09,0x00,0x1d,0x90,0x00, -- 0x03,0x00,0x1d,0x8c,0x00,0x01,0x09,0x00,0x1d,0xa0,0x00,0x03,0x00,0x1d,0x90,0x00, -- 0x01,0x09,0x00,0x1d,0xa4,0x00,0x03,0x00,0x1d,0xa0,0x00,0x01,0x09,0x00,0x1d,0xa8, -- 0x00,0x03,0x00,0x1d,0xa4,0x00,0x01,0x09,0x00,0x1d,0xac,0x00,0x03,0x00,0x1d,0xa8, -- 0x00,0x01,0x09,0x00,0x1d,0xb0,0x00,0x03,0x00,0x1d,0xac,0x00,0x01,0x09,0x00,0x1d, -- 0xc0,0x00,0x03,0x00,0x1d,0xb0,0x00,0x01,0x09,0x00,0x1d,0xc4,0x00,0x03,0x00,0x1d, -- 0xc0,0x00,0x01,0x09,0x00,0x1d,0xc8,0x00,0x03,0x00,0x1d,0xc4,0x00,0x01,0x09,0x00, -- 0x1d,0xcc,0x00,0x03,0x00,0x1d,0xc8,0x00,0x01,0x09,0x00,0x1d,0xd0,0x00,0x03,0x00, -- 0x1d,0xcc,0x00,0x01,0x09,0x00,0x1e,0x00,0x01,0x03,0x00,0x1d,0xd0,0x00,0x01,0x09, -- 0x00,0x1e,0x04,0x00,0x03,0x00,0x1e,0x00,0x01,0x01,0x09,0x00,0x1e,0x08,0x00,0x03, -- 0x00,0x1e,0x04,0x00,0x01,0x09,0x00,0x1e,0x0c,0x00,0x03,0x00,0x1e,0x08,0x00,0x01, -- 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0x09,0x00,0x27,0xa8,0x00,0x03,0x00,0x27,0xa4,0x00,0x01,0x09,0x00,0x27,0xac,0x00, -- 0x03,0x00,0x27,0xa8,0x00,0x01,0x09,0x00,0x27,0xb0,0x00,0x03,0x00,0x27,0xac,0x00, -- 0x01,0x09,0x00,0x27,0xc0,0x00,0x03,0x00,0x27,0xb0,0x00,0x01,0x09,0x00,0x27,0xc4, -- 0x00,0x03,0x00,0x27,0xc0,0x00,0x01,0x09,0x00,0x27,0xc8,0x00,0x03,0x00,0x27,0xc4, -- 0x00,0x01,0x09,0x00,0x27,0xcc,0x00,0x03,0x00,0x27,0xc8,0x00,0x01,0x09,0x00,0x27, -- 0xd0,0x00,0x03,0x00,0x27,0xcc,0x00,0x01,0x09,0x00,0x28,0x00,0x00,0x03,0x00,0x27, -- 0xd0,0x00,0x01,0x09,0x00,0x28,0x04,0x00,0x03,0x00,0x28,0x00,0x00,0x01,0x09,0x00, -- 0x28,0x08,0x00,0x03,0x00,0x28,0x04,0x00,0x01,0x09,0x00,0x28,0x0c,0x00,0x03,0x00, -- 0x28,0x08,0x00,0x01,0x09,0x00,0x28,0x10,0x00,0x03,0x00,0x28,0x0c,0x00,0x01,0x09, -- 0x00,0x28,0x20,0x00,0x13,0x00,0x28,0x10,0x00,0x01,0x09,0x00,0x28,0x24,0x00,0x13, -- 0x00,0x28,0x20,0x00,0x11,0x09,0x00,0x28,0x28,0x00,0x13,0x00,0x28,0x24,0x00,0x11, -- 0x09,0x00,0x28,0x2c,0x00,0x13,0x00,0x28,0x28,0x00,0x11,0x09,0x00,0x28,0x30,0x00, -- 0x13,0x00,0x28,0x2c,0x00,0x11,0x09,0x00,0x28,0x40,0x00,0x03,0x00,0x28,0x30,0x00, -- 0x11,0x09,0x00,0x28,0x44,0x00,0x03,0x00,0x28,0x40,0x00,0x01,0x09,0x00,0x28,0x48, -- 0x00,0x03,0x00,0x28,0x44,0x00,0x01,0x09,0x00,0x28,0x4c,0x00,0x03,0x00,0x28,0x48, -- 0x00,0x01,0x09,0x00,0x28,0x50,0x00,0x03,0x00,0x28,0x4c,0x00,0x01,0x09,0x00,0x28, -- 0x80,0x80,0x03,0x00,0x28,0x50,0x00,0x01,0x09,0x00,0x28,0x84,0x80,0x03,0x00,0x28, -- 0x80,0x80,0x01,0x09,0x00,0x28,0x88,0x80,0x03,0x00,0x28,0x84,0x80,0x01,0x09,0x00, -- 0x28,0x8c,0x80,0x03,0x00,0x28,0x88,0x80,0x01,0x09,0x00,0x28,0x90,0x80,0x03,0x00, -- 0x28,0x8c,0x80,0x01,0x09,0x00,0x28,0xa0,0x00,0x03,0x00,0x28,0x90,0x80,0x01,0x09, -- 0x00,0x28,0xa4,0x00,0x03,0x00,0x28,0xa0,0x00,0x01,0x09,0x00,0x28,0xa8,0x00,0x03, -- 0x00,0x28,0xa4,0x00,0x01,0x09,0x00,0x28,0xac,0x00,0x03,0x00,0x28,0xa8,0x00,0x01, -- 0x09,0x00,0x28,0xb0,0x00,0x03,0x00,0x28,0xac,0x00,0x01,0x09,0x00,0x28,0xc0,0x00, -- 0x13,0x00,0x28,0xb0,0x00,0x01,0x09,0x00,0x28,0xc4,0x00,0x13,0x00,0x28,0xc0,0x00, -- 0x11,0x09,0x00,0x28,0xc8,0x00,0x13,0x00,0x28,0xc4,0x00,0x11,0x09,0x00,0x28,0xcc, -- 0x00,0x13,0x00,0x28,0xc8,0x00,0x11,0x09,0x00,0x28,0xd0,0x00,0x13,0x00,0x28,0xcc, -- 0x00,0x11,0x09,0x00,0x29,0x00,0x00,0x03,0x00,0x28,0xd0,0x00,0x11,0x09,0x00,0x29, -- 0x04,0x00,0x03,0x00,0x29,0x00,0x00,0x01,0x09,0x00,0x29,0x08,0x00,0x03,0x00,0x29, -- 0x04,0x00,0x01,0x09,0x00,0x29,0x0c,0x00,0x03,0x00,0x29,0x08,0x00,0x01,0x09,0x00, -- 0x29,0x10,0x00,0x03,0x00,0x29,0x0c,0x00,0x01,0x09,0x00,0x29,0x20,0x00,0x03,0x00, -- 0x29,0x10,0x00,0x01,0x09,0x00,0x29,0x24,0x00,0x03,0x00,0x29,0x20,0x00,0x01,0x09, -- 0x00,0x29,0x28,0x00,0x03,0x00,0x29,0x24,0x00,0x01,0x09,0x00,0x29,0x2c,0x00,0x03, -- 0x00,0x29,0x28,0x00,0x01,0x09,0x00,0x29,0x30,0x00,0x03,0x00,0x29,0x2c,0x00,0x01, -- 0x09,0x00,0x29,0x40,0x00,0x03,0x00,0x29,0x30,0x00,0x01,0x09,0x00,0x29,0x44,0x00, -- 0x03,0x00,0x29,0x40,0x00,0x01,0x09,0x00,0x29,0x48,0x00,0x03,0x00,0x29,0x44,0x00, -- 0x01,0x09,0x00,0x29,0x4c,0x00,0x03,0x00,0x29,0x48,0x00,0x01,0x09,0x00,0x29,0x50, -- 0x00,0x03,0x00,0x29,0x4c,0x00,0x01,0x09,0x00,0x29,0x80,0x00,0x03,0x00,0x29,0x50, -- 0x00,0x01,0x09,0x00,0x29,0x84,0x00,0xc3,0x00,0x29,0x80,0x00,0x01,0x09,0x00,0x29, -- 0x88,0x00,0x03,0x00,0x29,0x84,0x00,0xc1,0x09,0x00,0x29,0x8c,0x00,0x03,0x00,0x29, -- 0x88,0x00,0x01,0x09,0x00,0x29,0x90,0x00,0x03,0x00,0x29,0x8c,0x00,0x01,0x09,0x00, -- 0x29,0xa0,0x00,0x03,0x00,0x29,0x90,0x00,0x01,0x09,0x00,0x29,0xa4,0x80,0xe3,0x00, -- 0x29,0xa0,0x00,0x01,0x09,0x00,0x29,0xa8,0x00,0x03,0x00,0x29,0xa4,0x80,0xe1,0x09, -- 0x00,0x29,0xac,0x00,0x03,0x00,0x29,0xa8,0x00,0x01,0x09,0x00,0x29,0xb0,0x00,0x03, -- 0x00,0x29,0xac,0x00,0x01,0x09,0x00,0x29,0xc0,0x00,0x03,0x00,0x29,0xb0,0x00,0x01, -- 0x09,0x00,0x29,0xc4,0x00,0x63,0x00,0x29,0xc0,0x00,0x01,0x09,0x00,0x29,0xc8,0x00, -- 0x03,0x00,0x29,0xc4,0x00,0x61,0x09,0x00,0x29,0xcc,0x00,0x03,0x00,0x29,0xc8,0x00, -- 0x01,0x09,0x00,0x29,0xd0,0x00,0x03,0x00,0x29,0xcc,0x00,0x01,0x09,0x00,0x2a,0x00, -- 0x00,0x03,0x00,0x29,0xd0,0x00,0x01,0x09,0x00,0x2a,0x04,0x00,0x03,0x00,0x2a,0x00, -- 0x00,0x01,0x09,0x00,0x2a,0x08,0x00,0x03,0x00,0x2a,0x04,0x00,0x01,0x09,0x00,0x2a, -- 0x0c,0x00,0x03,0x00,0x2a,0x08,0x00,0x01,0x09,0x00,0x2a,0x10,0x00,0x03,0x00,0x2a, -- 0x0c,0x00,0x01,0x09,0x00,0x2a,0x20,0x00,0x03,0x00,0x2a,0x10,0x00,0x01,0x09,0x00, -- 0x2a,0x24,0x00,0x03,0x00,0x2a,0x20,0x00,0x01,0x09,0x00,0x2a,0x28,0x00,0x03,0x00, -- 0x2a,0x24,0x00,0x01,0x09,0x00,0x2a,0x2c,0x00,0x03,0x00,0x2a,0x28,0x00,0x01,0x09, -- 0x00,0x2a,0x30,0x00,0x03,0x00,0x2a,0x2c,0x00,0x01,0x09,0x00,0x2a,0x40,0x00,0x03, -- 0x00,0x2a,0x30,0x00,0x01,0x09,0x00,0x2a,0x44,0x00,0x03,0x00,0x2a,0x40,0x00,0x01, -- 0x09,0x00,0x2a,0x48,0x00,0x03,0x00,0x2a,0x44,0x00,0x01,0x09,0x00,0x2a,0x4c,0x00, -- 0x03,0x00,0x2a,0x48,0x00,0x01,0x09,0x00,0x2a,0x50,0x00,0x03,0x00,0x2a,0x4c,0x00, -- 0x01,0x09,0x00,0x2a,0x80,0x00,0x03,0x00,0x2a,0x50,0x00,0x01,0x09,0x00,0x2a,0x84, -- 0x00,0x03,0x00,0x2a,0x80,0x00,0x01,0x09,0x00,0x2a,0x88,0x00,0x03,0x00,0x2a,0x84, -- 0x00,0x01,0x09,0x00,0x2a,0x8c,0x00,0x03,0x00,0x2a,0x88,0x00,0x01,0x09,0x00,0x2a, -- 0x90,0x00,0x03,0x00,0x2a,0x8c,0x00,0x01,0x09,0x00,0x2a,0xa0,0x00,0x03,0x00,0x2a, -- 0x90,0x00,0x01,0x09,0x00,0x2a,0xa4,0x00,0x03,0x00,0x2a,0xa0,0x00,0x01,0x09,0x00, -- 0x2a,0xa8,0x00,0x03,0x00,0x2a,0xa4,0x00,0x01,0x09,0x00,0x2a,0xac,0x00,0x03,0x00, -- 0x2a,0xa8,0x00,0x01,0x09,0x00,0x2a,0xb0,0x00,0x03,0x00,0x2a,0xac,0x00,0x01,0x09, -- 0x00,0x2a,0xc0,0x00,0x03,0x00,0x2a,0xb0,0x00,0x01,0x09,0x00,0x2a,0xc4,0x00,0x03, -- 0x00,0x2a,0xc0,0x00,0x01,0x09,0x00,0x2a,0xc8,0x00,0x03,0x00,0x2a,0xc4,0x00,0x01, -- 0x09,0x00,0x2a,0xcc,0x00,0x03,0x00,0x2a,0xc8,0x00,0x01,0x09,0x00,0x2a,0xd0,0x00, -- 0x03,0x00,0x2a,0xcc,0x00,0x01,0x09,0x00,0x2b,0x00,0x00,0x03,0x00,0x2a,0xd0,0x00, -- 0x01,0x09,0x00,0x2b,0x04,0x00,0x03,0x00,0x2b,0x00,0x00,0x01,0x09,0x00,0x2b,0x08, -- 0x00,0x03,0x00,0x2b,0x04,0x00,0x01,0x09,0x00,0x2b,0x0c,0x00,0x03,0x00,0x2b,0x08, -- 0x00,0x01,0x09,0x00,0x2b,0x10,0x00,0x03,0x00,0x2b,0x0c,0x00,0x01,0x09,0x00,0x2b, -- 0x20,0x00,0x03,0x00,0x2b,0x10,0x00,0x01,0x09,0x00,0x2b,0x24,0x00,0x03,0x00,0x2b, -- 0x20,0x00,0x01,0x09,0x00,0x2b,0x28,0x00,0x03,0x00,0x2b,0x24,0x00,0x01,0x09,0x00, -- 0x2b,0x2c,0x00,0x03,0x00,0x2b,0x28,0x00,0x01,0x09,0x00,0x2b,0x30,0x00,0x03,0x00, -- 0x2b,0x2c,0x00,0x01,0x09,0x00,0x2b,0x40,0x00,0x03,0x00,0x2b,0x30,0x00,0x01,0x09, -- 0x00,0x2b,0x44,0x00,0x03,0x00,0x2b,0x40,0x00,0x01,0x09,0x00,0x2b,0x48,0x00,0x03, -- 0x00,0x2b,0x44,0x00,0x01,0x09,0x00,0x2b,0x4c,0x00,0x03,0x00,0x2b,0x48,0x00,0x01, -- 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0x09,0x00,0x2d,0x08,0x00,0x03,0x00,0x2d,0x04,0x00,0x01,0x09,0x00,0x2d,0x0c,0x00, -- 0x03,0x00,0x2d,0x08,0x00,0x01,0x09,0x00,0x2d,0x10,0x00,0x03,0x00,0x2d,0x0c,0x00, -- 0x01,0x09,0x00,0x2d,0x20,0x00,0x03,0x00,0x2d,0x10,0x00,0x01,0x09,0x00,0x2d,0x24, -- 0x00,0x03,0x00,0x2d,0x20,0x00,0x01,0x09,0x00,0x2d,0x28,0x00,0x03,0x00,0x2d,0x24, -- 0x00,0x01,0x09,0x00,0x2d,0x2c,0x00,0x03,0x00,0x2d,0x28,0x00,0x01,0x09,0x00,0x2d, -- 0x30,0x00,0x03,0x00,0x2d,0x2c,0x00,0x01,0x09,0x00,0x2d,0x40,0x00,0x03,0x00,0x2d, -- 0x30,0x00,0x01,0x09,0x00,0x2d,0x44,0x00,0x03,0x00,0x2d,0x40,0x00,0x01,0x09,0x00, -- 0x2d,0x48,0x00,0x03,0x00,0x2d,0x44,0x00,0x01,0x09,0x00,0x2d,0x4c,0x00,0x03,0x00, -- 0x2d,0x48,0x00,0x01,0x09,0x00,0x2d,0x50,0x00,0x03,0x00,0x2d,0x4c,0x00,0x01,0x09, -- 0x00,0x2d,0x80,0x00,0x03,0x00,0x2d,0x50,0x00,0x01,0x09,0x00,0x2d,0x84,0x00,0x03, -- 0x00,0x2d,0x80,0x00,0x01,0x09,0x00,0x2d,0x88,0x00,0x03,0x00,0x2d,0x84,0x00,0x01, -- 0x09,0x00,0x2d,0x8c,0x00,0x03,0x00,0x2d,0x88,0x00,0x01,0x09,0x00,0x2d,0x90,0x00, -- 0x03,0x00,0x2d,0x8c,0x00,0x01,0x09,0x00,0x2d,0xa0,0x00,0x03,0x00,0x2d,0x90,0x00, -- 0x01,0x09,0x00,0x2d,0xa4,0x00,0x03,0x00,0x2d,0xa0,0x00,0x01,0x09,0x00,0x2d,0xa8, -- 0x00,0x03,0x00,0x2d,0xa4,0x00,0x01,0x09,0x00,0x2d,0xac,0x00,0x03,0x00,0x2d,0xa8, -- 0x00,0x01,0x09,0x00,0x2d,0xb0,0x00,0x03,0x00,0x2d,0xac,0x00,0x01,0x09,0x00,0x2d, -- 0xc0,0x00,0x03,0x00,0x2d,0xb0,0x00,0x01,0x09,0x00,0x2d,0xc4,0x00,0x03,0x00,0x2d, -- 0xc0,0x00,0x01,0x09,0x00,0x2d,0xc8,0x00,0x03,0x00,0x2d,0xc4,0x00,0x01,0x09,0x00, -- 0x2d,0xcc,0x00,0x03,0x00,0x2d,0xc8,0x00,0x01,0x09,0x00,0x2d,0xd0,0x00,0x03,0x00, -- 0x2d,0xcc,0x00,0x01,0x09,0x00,0x2e,0x00,0x00,0x03,0x00,0x2d,0xd0,0x00,0x01,0x09, -- 0x00,0x2e,0x04,0x00,0x03,0x00,0x2e,0x00,0x00,0x01,0x09,0x00,0x2e,0x08,0x00,0x03, -- 0x00,0x2e,0x04,0x00,0x01,0x09,0x00,0x2e,0x0c,0x00,0x03,0x00,0x2e,0x08,0x00,0x01, -- 0x09,0x00,0x2e,0x10,0x00,0x03,0x00,0x2e,0x0c,0x00,0x01,0x09,0x00,0x2e,0x20,0x00, -- 0x03,0x00,0x2e,0x10,0x00,0x01,0x09,0x00,0x2e,0x24,0x00,0x03,0x00,0x2e,0x20,0x00, -- 0x01,0x09,0x00,0x2e,0x28,0x00,0x03,0x00,0x2e,0x24,0x00,0x01,0x09,0x00,0x2e,0x2c, -- 0x00,0x03,0x00,0x2e,0x28,0x00,0x01,0x09,0x00,0x2e,0x30,0x00,0x03,0x00,0x2e,0x2c, -- 0x00,0x01,0x09,0x00,0x2e,0x40,0x00,0x03,0x00,0x2e,0x30,0x00,0x01,0x09,0x00,0x2e, -- 0x44,0x00,0x03,0x00,0x2e,0x40,0x00,0x01,0x09,0x00,0x2e,0x48,0x00,0x03,0x00,0x2e, -- 0x44,0x00,0x01,0x09,0x00,0x2e,0x4c,0x00,0x03,0x00,0x2e,0x48,0x00,0x01,0x09,0x00, -- 0x2e,0x50,0x00,0x03,0x00,0x2e,0x4c,0x00,0x01,0x09,0x00,0x2e,0x80,0x00,0x03,0x00, -- 0x2e,0x50,0x00,0x01,0x09,0x00,0x2e,0x84,0x00,0x03,0x00,0x2e,0x80,0x00,0x01,0x09, -- 0x00,0x2e,0x88,0x00,0x03,0x00,0x2e,0x84,0x00,0x01,0x09,0x00,0x2e,0x8c,0x00,0x03, -- 0x00,0x2e,0x88,0x00,0x01,0x09,0x00,0x2e,0x90,0x00,0x03,0x00,0x2e,0x8c,0x00,0x01, -- 0x09,0x00,0x2e,0xa0,0x00,0x03,0x00,0x2e,0x90,0x00,0x01,0x09,0x00,0x2e,0xa4,0x00, -- 0x03,0x00,0x2e,0xa0,0x00,0x01,0x09,0x00,0x2e,0xa8,0x00,0x03,0x00,0x2e,0xa4,0x00, -- 0x01,0x09,0x00,0x2e,0xac,0x00,0x03,0x00,0x2e,0xa8,0x00,0x01,0x09,0x00,0x2e,0xb0, -- 0x00,0x03,0x00,0x2e,0xac,0x00,0x01,0x09,0x00,0x2e,0xc0,0x00,0x03,0x00,0x2e,0xb0, -- 0x00,0x01,0x09,0x00,0x2e,0xc4,0x00,0x03,0x00,0x2e,0xc0,0x00,0x01,0x09,0x00,0x2e, -- 0xc8,0x00,0x03,0x00,0x2e,0xc4,0x00,0x01,0x09,0x00,0x2e,0xcc,0x00,0x03,0x00,0x2e, -- 0xc8,0x00,0x01,0x09,0x00,0x2e,0xd0,0x00,0x03,0x00,0x2e,0xcc,0x00,0x01,0x09,0x00, -- 0x2f,0x00,0x00,0x03,0x00,0x2e,0xd0,0x00,0x01,0x09,0x00,0x2f,0x04,0x00,0x03,0x00, -- 0x2f,0x00,0x00,0x01,0x09,0x00,0x2f,0x08,0x00,0x03,0x00,0x2f,0x04,0x00,0x01,0x09, -- 0x00,0x2f,0x0c,0x00,0x03,0x00,0x2f,0x08,0x00,0x01,0x09,0x00,0x2f,0x10,0x00,0x03, -- 0x00,0x2f,0x0c,0x00,0x01,0x09,0x00,0x2f,0x20,0x00,0x03,0x00,0x2f,0x10,0x00,0x01, -- 0x09,0x00,0x2f,0x24,0x00,0x03,0x00,0x2f,0x20,0x00,0x01,0x09,0x00,0x2f,0x28,0x00, -- 0x03,0x00,0x2f,0x24,0x00,0x01,0x09,0x00,0x2f,0x2c,0x00,0x03,0x00,0x2f,0x28,0x00, -- 0x01,0x09,0x00,0x2f,0x30,0x00,0x03,0x00,0x2f,0x2c,0x00,0x01,0x09,0x00,0x2f,0x40, -- 0x00,0x03,0x00,0x2f,0x30,0x00,0x01,0x09,0x00,0x2f,0x44,0x00,0x03,0x00,0x2f,0x40, -- 0x00,0x01,0x09,0x00,0x2f,0x48,0x00,0x03,0x00,0x2f,0x44,0x00,0x01,0x09,0x00,0x2f, -- 0x4c,0x00,0x03,0x00,0x2f,0x48,0x00,0x01,0x09,0x00,0x2f,0x50,0x00,0x03,0x00,0x2f, -- 0x4c,0x00,0x01,0x09,0x00,0x2f,0x80,0x00,0x03,0x00,0x2f,0x50,0x00,0x01,0x09,0x00, -- 0x2f,0x84,0x00,0x03,0x00,0x2f,0x80,0x00,0x01,0x09,0x00,0x2f,0x88,0x00,0x03,0x00, -- 0x2f,0x84,0x00,0x01,0x09,0x00,0x2f,0x8c,0x00,0x03,0x00,0x2f,0x88,0x00,0x01,0x09, -- 0x00,0x2f,0x90,0x00,0x03,0x00,0x2f,0x8c,0x00,0x01,0x09,0x00,0x2f,0xa0,0x00,0x03, -- 0x00,0x2f,0x90,0x00,0x01,0x09,0x00,0x2f,0xa4,0x00,0x03,0x00,0x2f,0xa0,0x00,0x01, -- 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0x09,0x00,0x34,0x84,0x00,0x03,0x00,0x34,0x80,0x00,0x01,0x09,0x00,0x34,0x88,0x00, -- 0x03,0x00,0x34,0x84,0x00,0x01,0x09,0x00,0x34,0x8c,0x00,0x03,0x00,0x34,0x88,0x00, -- 0x01,0x09,0x00,0x34,0x90,0x00,0x03,0x00,0x34,0x8c,0x00,0x01,0x09,0x00,0x34,0xa0, -- 0x00,0x03,0x00,0x34,0x90,0x00,0x01,0x09,0x00,0x34,0xa4,0x00,0x03,0x00,0x34,0xa0, -- 0x00,0x01,0x09,0x00,0x34,0xa8,0x00,0x03,0x00,0x34,0xa4,0x00,0x01,0x09,0x00,0x34, -- 0xac,0x00,0x03,0x00,0x34,0xa8,0x00,0x01,0x09,0x00,0x34,0xb0,0x00,0x03,0x00,0x34, -- 0xac,0x00,0x01,0x09,0x00,0x34,0xc0,0x00,0x03,0x00,0x34,0xb0,0x00,0x01,0x09,0x00, -- 0x34,0xc4,0x00,0x03,0x00,0x34,0xc0,0x00,0x01,0x09,0x00,0x34,0xc8,0x00,0x03,0x00, -- 0x34,0xc4,0x00,0x01,0x09,0x00,0x34,0xcc,0x00,0x03,0x00,0x34,0xc8,0x00,0x01,0x09, -- 0x00,0x34,0xd0,0x00,0x03,0x00,0x34,0xcc,0x00,0x01,0x09,0x00,0x35,0x00,0x00,0x03, -- 0x00,0x34,0xd0,0x00,0x01,0x09,0x00,0x35,0x04,0x00,0x03,0x00,0x35,0x00,0x00,0x01, -- 0x09,0x00,0x35,0x08,0x00,0x03,0x00,0x35,0x04,0x00,0x01,0x09,0x00,0x35,0x0c,0x00, -- 0x03,0x00,0x35,0x08,0x00,0x01,0x09,0x00,0x35,0x10,0x00,0x03,0x00,0x35,0x0c,0x00, -- 0x01,0x09,0x00,0x35,0x20,0x00,0x03,0x00,0x35,0x10,0x00,0x01,0x09,0x00,0x35,0x24, -- 0x00,0x03,0x00,0x35,0x20,0x00,0x01,0x09,0x00,0x35,0x28,0x00,0x03,0x00,0x35,0x24, -- 0x00,0x01,0x09,0x00,0x35,0x2c,0x00,0x03,0x00,0x35,0x28,0x00,0x01,0x09,0x00,0x35, -- 0x30,0x00,0x03,0x00,0x35,0x2c,0x00,0x01,0x09,0x00,0x35,0x40,0x00,0x03,0x00,0x35, -- 0x30,0x00,0x01,0x09,0x00,0x35,0x44,0x00,0x03,0x00,0x35,0x40,0x00,0x01,0x09,0x00, -- 0x35,0x48,0x00,0x03,0x00,0x35,0x44,0x00,0x01,0x09,0x00,0x35,0x4c,0x00,0x03,0x00, -- 0x35,0x48,0x00,0x01,0x09,0x00,0x35,0x50,0x00,0x03,0x00,0x35,0x4c,0x00,0x01,0x09, -- 0x00,0x35,0x80,0x00,0x03,0x00,0x35,0x50,0x00,0x01,0x09,0x00,0x35,0x84,0x00,0x03, -- 0x00,0x35,0x80,0x00,0x01,0x09,0x00,0x35,0x88,0x00,0x03,0x00,0x35,0x84,0x00,0x01, -- 0x09,0x00,0x35,0x8c,0x00,0x03,0x00,0x35,0x88,0x00,0x01,0x09,0x00,0x35,0x90,0x00, -- 0x03,0x00,0x35,0x8c,0x00,0x01,0x09,0x00,0x35,0xa0,0x00,0x03,0x00,0x35,0x90,0x00, -- 0x01,0x09,0x00,0x35,0xa4,0x00,0x03,0x00,0x35,0xa0,0x00,0x01,0x09,0x00,0x35,0xa8, -- 0x00,0x03,0x00,0x35,0xa4,0x00,0x01,0x09,0x00,0x35,0xac,0x00,0x03,0x00,0x35,0xa8, -- 0x00,0x01,0x09,0x00,0x35,0xb0,0x00,0x03,0x00,0x35,0xac,0x00,0x01,0x09,0x00,0x35, -- 0xc0,0x00,0x03,0x00,0x35,0xb0,0x00,0x01,0x09,0x00,0x35,0xc4,0x00,0x03,0x00,0x35, -- 0xc0,0x00,0x01,0x09,0x00,0x35,0xc8,0x00,0x03,0x00,0x35,0xc4,0x00,0x01,0x09,0x00, -- 0x35,0xcc,0x00,0x03,0x00,0x35,0xc8,0x00,0x01,0x09,0x00,0x35,0xd0,0x00,0x03,0x00, -- 0x35,0xcc,0x00,0x01,0x09,0x00,0x35,0xd0,0x00,0x03,0x00,0x35,0xd0,0x00,0x01,0x04, -- 0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x04,0x00,0x00,0x00,0x64,0x02,0x08,0xf0,0x04, -- 0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x07,0x00,0x07,0x20,0x12,0x00,0x12,0x01,0x04, -- 0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x08,0x00,0x00,0x00,0x01,0x01,0x00,0x09,0x00, -- 0x00,0x00, -diff --git a/board/esd/pmc405/pmc405.c b/board/esd/pmc405/pmc405.c -index 94caa6c..192a642 100644 ---- a/board/esd/pmc405/pmc405.c -+++ b/board/esd/pmc405/pmc405.c -@@ -34,13 +34,6 @@ DECLARE_GLOBAL_DATA_PTR; - - extern void lxt971_no_sleep(void); - --/* fpga configuration data - not compressed, generated by bin2c */ --const unsigned char fpgadata[] = --{ --#include "fpgadata.c" --}; --int filesize = sizeof(fpgadata); -- - int board_early_init_f (void) - { - /* -diff --git a/board/esd/pmc440/cmd_pmc440.c b/board/esd/pmc440/cmd_pmc440.c -index 0fbc3dc..1af431b 100644 ---- a/board/esd/pmc440/cmd_pmc440.c -+++ b/board/esd/pmc440/cmd_pmc440.c -@@ -99,8 +99,8 @@ int do_waithci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - waithci, 1, 1, do_waithci, - "Wait for host control interrupt", -- NULL -- ); -+ "" -+); - - void dump_fifo(pmc440_fpga_t *fpga, int f, int *n) - { -@@ -266,8 +266,8 @@ U_BOOT_CMD( - " - with 'wait' argument: interrupt driven read from all fifos\n" - " - with 'read' argument: read current contents from all fifos\n" - " - with 'write' argument: write 'data' 'cnt' times to " -- "'fifo' or 'address'\n" -- ); -+ "'fifo' or 'address'" -+); - - int do_setup_bootstrap_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - { -@@ -338,7 +338,7 @@ U_BOOT_CMD( - sbe, 4, 0, do_setup_bootstrap_eeprom, - "setup bootstrap eeprom", - " [ []]" -- ); -+); - - #if defined(CONFIG_PRAM) - #include -@@ -400,8 +400,8 @@ int do_painit(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - painit, 1, 1, do_painit, - "prepare PciAccess system", -- NULL -- ); -+ "" -+); - #endif /* CONFIG_PRAM */ - - int do_selfreset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -@@ -412,8 +412,8 @@ int do_selfreset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - selfreset, 1, 1, do_selfreset, - "assert self-reset# signal", -- NULL -- ); -+ "" -+); - - int do_resetout(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - { -@@ -449,8 +449,8 @@ int do_resetout(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - resetout, 2, 1, do_resetout, - "assert PMC-RESETOUT# signal", -- NULL -- ); -+ "" -+); - - int do_inta(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - { -@@ -481,8 +481,8 @@ int do_inta(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - inta, 2, 1, do_inta, - "Assert/Deassert or query INTA# state in non-monarch mode", -- NULL -- ); -+ "" -+); - - /* test-only */ - int do_pmm(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -@@ -514,8 +514,8 @@ int do_pmm(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - pmm, 2, 1, do_pmm, - "Setup pmm[1] registers", -- " (pciaddr will be aligned to 256MB)\n" -- ); -+ " (pciaddr will be aligned to 256MB)" -+); - - #if defined(CONFIG_SYS_EEPROM_WREN) - int do_eep_wren(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -@@ -549,8 +549,9 @@ int do_eep_wren(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - return state; - } - U_BOOT_CMD(eepwren, 2, 0, do_eep_wren, -- "Enable / disable / query EEPROM write access", -- NULL); -+ "Enable / disable / query EEPROM write access", -+ "" -+); - #endif /* #if defined(CONFIG_SYS_EEPROM_WREN) */ - - #endif /* CONFIG_CMD_BSP */ -diff --git a/board/esd/tasreg/tasreg.c b/board/esd/tasreg/tasreg.c -index 760c71d..1844442 100644 ---- a/board/esd/tasreg/tasreg.c -+++ b/board/esd/tasreg/tasreg.c -@@ -231,7 +231,7 @@ int do_iploop(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - - addr = simple_strtol (argv[1], NULL, 16); - -- printf("iprobe looping on addr 0x%lx (cntrl-c aborts)...\n", addr); -+ printf("i2c probe looping on addr 0x%lx (cntrl-c aborts)...\n", addr); - - for (;;) { - i2c_probe(addr); -@@ -249,9 +249,9 @@ int do_iploop(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - } - U_BOOT_CMD( - iploop, 2, 1, do_iploop, -- "iprobe loop ", -- NULL -- ); -+ "i2c probe loop ", -+ "" -+); - - /* - */ -@@ -303,8 +303,8 @@ int do_codec(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - codec, 1, 1, do_codec, - "Enable codec", -- NULL -- ); -+ "" -+); - - /* - */ -@@ -336,8 +336,8 @@ int do_saa(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - saa, 5, 1, do_saa, - "Write to SAA1064 ", -- NULL -- ); -+ "" -+); - - /* - */ -@@ -375,8 +375,8 @@ int do_iwrite(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - iwrite, 6, 1, do_iwrite, - "Write n bytes to I2C-device", -- "addr cnt data0 ... datan\n" -- ); -+ "addr cnt data0 ... datan" -+); - - /* - */ -@@ -407,8 +407,8 @@ int do_iread(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - iread, 3, 1, do_iread, - "Read from I2C ", -- NULL -- ); -+ "" -+); - - /* - */ -@@ -445,6 +445,6 @@ int do_ireadl(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - ireadl, 2, 1, do_ireadl, - "Read-loop from I2C ", -- NULL -- ); -+ "" -+); - #endif -diff --git a/board/esd/voh405/voh405.c b/board/esd/voh405/voh405.c -index 96a04b3..9127550 100644 ---- a/board/esd/voh405/voh405.c -+++ b/board/esd/voh405/voh405.c -@@ -392,6 +392,7 @@ int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - } - - U_BOOT_CMD(eepwren, 2, 0, do_eep_wren, -- "Enable / disable / query EEPROM write access", -- NULL); -+ "Enable / disable / query EEPROM write access", -+ "" -+); - #endif /* #if defined(CONFIG_SYS_EEPROM_WREN) */ -diff --git a/board/esd/vom405/config.mk b/board/esd/vom405/config.mk -index 3041b77..8e48bcd 100644 ---- a/board/esd/vom405/config.mk -+++ b/board/esd/vom405/config.mk -@@ -20,10 +20,4 @@ - # Foundation, Inc., 59 Temple Place, Suite 330, Boston, - # MA 02111-1307 USA - # -- --# --# esd VOH405 boards --# -- --TEXT_BASE = 0xFFFC0000 --#TEXT_BASE = 0x00FC0000 -+TEXT_BASE = 0xFFFC8000 -diff --git a/board/esd/vom405/fpgadata.c b/board/esd/vom405/fpgadata.c -deleted file mode 100644 -index 1c3a963..0000000 ---- a/board/esd/vom405/fpgadata.c -+++ /dev/null -@@ -1,1812 +0,0 @@ -- 0x07,0x20,0x12,0x00,0x12,0x01,0x04,0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x02,0x08, -- 0xfe,0x08,0x00,0x00,0x00,0x20,0x01,0x0f,0xff,0xff,0xff,0x09,0x00,0x00,0x00,0x00, -- 0xf9,0x60,0x40,0x93,0x02,0x08,0xff,0x02,0x08,0xff,0x02,0x08,0xe8,0x08,0x00,0x00, -- 0x00,0x06,0x01,0x00,0x09,0x05,0x00,0x02,0x08,0xed,0x04,0x00,0x03,0x0d,0x40,0x08, -- 0x00,0x00,0x00,0x12,0x01,0x00,0x00,0x00,0x09,0x03,0xff,0xff,0x00,0x00,0x00,0x01, -- 0x00,0x00,0x03,0x09,0x03,0xff,0xfd,0x03,0xff,0xfd,0x04,0x00,0x00,0x00,0x00,0x02, -- 0x08,0xea,0x08,0x00,0x00,0x00,0x32,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x00,0x04,0x00,0x00,0x00,0x01,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x08,0x00,0x00,0x00,0x01,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x0c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x01,0x09,0x00,0x00,0x10,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x01,0x09,0x00,0x00,0x20,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00, -- 0x01,0x09,0x00,0x00,0x24,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01, -- 0x09,0x00,0x00,0x28,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09, -- 0x00,0x00,0x2c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00, -- 0x00,0x30,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00, -- 0x40,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x44, -- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x48,0x00, -- 0x00,0x00,0x21,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x4c,0x00,0x00, -- 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x00,0x50,0x00,0x00,0x00,0x03,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x00, -- 0x80,0x00,0x00,0x10,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x09,0x00,0x00,0x84,0x00,0x00,0x00, -- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -- 0x09,0x00,0x00,0x88,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09, -- 0x00,0x00,0x8c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00, -- 0x00,0x90,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00, -- 0xa0,0x00,0x00,0x08,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xa4, -- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xa8,0x00, -- 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xac,0x00,0x00, -- 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xb0,0x00,0x00,0x00, -- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xc0,0x00,0x00,0x00,0x01, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xc4,0x00,0x00,0x00,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xc8,0x00,0x00,0x00,0x01,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0xcc,0x00,0x00,0x00,0x01,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x09,0x00,0x00,0xd0,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x01,0x00,0x00,0x00,0x00,0x01, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04, -- 0x00,0x00,0x00,0x00,0x09,0x00,0x01,0x04,0x00,0x00,0x01,0x01,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x01,0x08,0x00, -- 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0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x09,0x00,0x33,0x84,0x00, -- 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x09,0x00,0x33,0x88,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00, -- 0x01,0x09,0x00,0x33,0x8c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01, -- 0x09,0x00,0x33,0x90,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09, -- 0x00,0x33,0xa0,0x00,0x40,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00, -- 0x33,0xa4,0x00,0x40,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x33, -- 0xa8,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x33,0xac, -- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x33,0xb0,0x00, -- 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x33,0xc0,0x00,0x00, -- 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x33,0xc4,0x00,0x00,0x00, -- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x33,0xc8,0x00,0x20,0x00,0x01, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x33,0xcc,0x00,0x00,0x00,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x09,0x00,0x33,0xd0,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x34,0x00,0x00,0x00, -- 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x00,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x04,0x00,0x00,0x00,0x00,0x09,0x00,0x34,0x04,0x00,0x00,0x00,0x01,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x34, -- 0x08,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x34,0x0c, -- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x34,0x10,0x00, -- 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x34,0x20,0x00,0x00, -- 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x34,0x24,0x00,0x00,0x00, -- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x34,0x28,0x00,0x00,0x00,0x01, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x34,0x2c,0x00,0x00,0x00,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x34,0x30,0x00,0x00,0x00,0x01,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x34,0x40,0x00,0x00,0x00,0x01,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x01,0x09,0x00,0x34,0x44,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x01,0x09,0x00,0x34,0x48,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x01,0x09,0x00,0x34,0x4c,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00, -- 0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00, -- 0x34,0x50,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x34,0x80,0x00,0x00,0x00,0x01,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x01,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00, -- 0x00,0x09,0x00,0x34,0x84,0x00,0x00,0x00,0x81,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x34,0x88,0x00,0x00,0x00,0x01, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x34,0x8c,0x00,0x00,0x00,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x34,0x90,0x00,0x00,0x00,0x01,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x34,0xa0,0x00,0x00,0x00,0x01,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x01,0x09,0x00,0x34,0xa4,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x01,0x09,0x00,0x34,0xa8,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x01,0x09,0x00,0x34,0xac,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00, -- 0x01,0x09,0x00,0x34,0xb0,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01, -- 0x09,0x00,0x34,0xc0,0x00,0x00,0x00,0x11,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09, -- 0x00,0x34,0xc4,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00, -- 0x34,0xc8,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x34, -- 0xcc,0x00,0x00,0x00,0x81,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x4e, -- 0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x34,0xd0,0x00,0x00,0x00, -- 0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x03, -- 0x09,0x00,0x35,0x00,0xa0,0x00,0x08,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x09,0x00,0x35,0x04, -- 0x80,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x09,0x00,0x35,0x08,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x01,0x09,0x00,0x35,0x0c,0x20,0x00,0x08,0x01,0x00,0x00,0x00,0x00,0x00,0x00, -- 0x01,0x09,0x00,0x35,0x10,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01, -- 0x09,0x00,0x35,0x20,0xc0,0x00,0x14,0x11,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09, -- 0x00,0x35,0x24,0x00,0x00,0x00,0x15,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00, -- 0x35,0x28,0x00,0x80,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35, -- 0x2c,0xc0,0x00,0x14,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x30, -- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x40,0x08, -- 0x00,0x04,0x09,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x44,0x80,0x00, -- 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x48,0x00,0x00,0x00, -- 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x4c,0x88,0x00,0x84,0x01, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x09,0x00,0x35,0x50,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x35,0x80,0x00, -- 0x00,0x30,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x09,0x00,0x35,0x84,0x00,0x00,0x00,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00, -- 0x35,0x88,0x20,0x80,0x08,0x21,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35, -- 0x8c,0x40,0x00,0xc0,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0x90, -- 0xa0,0x00,0x08,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xa0,0x00, -- 0x00,0x20,0x0d,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xa4,0x00,0x80, -- 0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xa8,0xc0,0x1c,0x14, -- 0x85,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xac,0x00,0x00,0x48,0x01, -- 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xb0,0xc0,0x00,0x14,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xc0,0x80,0x00,0x80,0x01,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xc4,0x00,0x00,0x80,0x09,0x00,0x00,0x00, -- 0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xc8,0x08,0x00,0x04,0x61,0x00,0x00,0x00,0x00, -- 0x00,0x00,0x01,0x09,0x00,0x35,0xcc,0x40,0x00,0x48,0x01,0x00,0x00,0x00,0x00,0x00, -- 0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09, -- 0x00,0x35,0xd0,0x88,0x00,0x04,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00, -- 0x00,0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x35,0xd0,0x88,0x00,0x04,0x01,0x00,0x00, -- 0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x04,0x00,0x00, -- 0x00,0x64,0x02,0x08,0xf0,0x04,0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x02,0x08,0xff, -- 0x08,0x00,0x00,0x00,0x01,0x01,0x00,0x09,0x00,0x00,0x00, -diff --git a/board/esd/vom405/vom405.c b/board/esd/vom405/vom405.c -index d67b23e..a481aca 100644 ---- a/board/esd/vom405/vom405.c -+++ b/board/esd/vom405/vom405.c -@@ -31,13 +31,6 @@ DECLARE_GLOBAL_DATA_PTR; - - extern void lxt971_no_sleep(void); - --/* fpga configuration data - not compressed, generated by bin2c */ --const unsigned char fpgadata[] = --{ --#include "fpgadata.c" --}; --int filesize = sizeof(fpgadata); -- - int board_early_init_f (void) - { - /* -diff --git a/board/evb4510/u-boot.lds b/board/evb4510/u-boot.lds -deleted file mode 100644 -index b72e126..0000000 ---- a/board/evb4510/u-boot.lds -+++ /dev/null -@@ -1,69 +0,0 @@ --/* -- * (C) Copyright 2000-2004 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm720t/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; -- /* Stabs debugging sections. */ -- .stab 0 : { *(.stab) } -- .stabstr 0 : { *(.stabstr) } -- .stab.excl 0 : { *(.stab.excl) } -- .stab.exclstr 0 : { *(.stab.exclstr) } -- .stab.index 0 : { *(.stab.index) } -- .stab.indexstr 0 : { *(.stab.indexstr) } -- .comment 0 : { *(.comment) } -- .debug_abbrev 0 : { *(.debug_abbrev) } -- .debug_info 0 : { *(.debug_info) } -- .debug_line 0 : { *(.debug_line) } -- .debug_pubnames 0 : { *(.debug_pubnames) } -- .debug_aranges 0 : { *(.debug_aranges) } --} -diff --git a/board/evb64260/zuma_pbb.c b/board/evb64260/zuma_pbb.c -index aef9c27..cab4fca 100644 ---- a/board/evb64260/zuma_pbb.c -+++ b/board/evb64260/zuma_pbb.c -@@ -204,19 +204,17 @@ U_BOOT_CMD( - zinit, 1, 0, do_zuma_init_pbb, - "init zuma pbb", - "\n" -- " - init zuma pbb\n" - ); - U_BOOT_CMD( - zdtest, 3, 1, do_zuma_test_dma, - "run dma test", - "[cmd [count]]\n" -- " - run dma cmd (w=0,v=1,cp=2,cmp=3,wi=4,vi=5), count bytes\n" -+ " - run dma cmd (w=0,v=1,cp=2,cmp=3,wi=4,vi=5), count bytes" - ); - U_BOOT_CMD( - zminit, 1, 0, do_zuma_init_mbox, - "init zuma mbox", - "\n" -- " - init zuma mbox\n" - ); - - #endif -diff --git a/board/freescale/common/pixis.c b/board/freescale/common/pixis.c -index eb76d93..4851f06 100644 ---- a/board/freescale/common/pixis.c -+++ b/board/freescale/common/pixis.c -@@ -279,9 +279,10 @@ int pixis_disable_watchdog_cmd(cmd_tbl_t *cmdtp, - } - - U_BOOT_CMD( -- diswd, 1, 0, pixis_disable_watchdog_cmd, -- "Disable watchdog timer", -- NULL); -+ diswd, 1, 0, pixis_disable_watchdog_cmd, -+ "Disable watchdog timer", -+ "" -+); - - #ifdef CONFIG_PIXIS_SGMII_CMD - int pixis_set_sgmii(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -@@ -343,14 +344,15 @@ int pixis_set_sgmii(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - } - - U_BOOT_CMD( -- pixis_set_sgmii, CONFIG_SYS_MAXARGS, 1, pixis_set_sgmii, -- "pixis_set_sgmii" -- " - Enable or disable SGMII mode for a given TSEC \n", -- "\npixis_set_sgmii [TSEC num] \n" -- " TSEC num: 1,2,3,4 or 'all'. 'all' is default.\n" -- " on - enables SGMII\n" -- " off - disables SGMII\n" -- " switch - use switch settings\n"); -+ pixis_set_sgmii, CONFIG_SYS_MAXARGS, 1, pixis_set_sgmii, -+ "pixis_set_sgmii" -+ " - Enable or disable SGMII mode for a given TSEC \n", -+ "\npixis_set_sgmii [TSEC num] \n" -+ " TSEC num: 1,2,3,4 or 'all'. 'all' is default.\n" -+ " on - enables SGMII\n" -+ " off - disables SGMII\n" -+ " switch - use switch settings" -+); - #endif - - /* -@@ -544,5 +546,5 @@ U_BOOT_CMD( - " pixis_reset [altbank]\n" - " pixis_reset altbank wd\n" - " pixis_reset altbank cf \n" -- " pixis_reset cf \n" -- ); -+ " pixis_reset cf " -+); -diff --git a/board/freescale/common/sys_eeprom.c b/board/freescale/common/sys_eeprom.c -index 988cb94..ae5304a 100644 ---- a/board/freescale/common/sys_eeprom.c -+++ b/board/freescale/common/sys_eeprom.c -@@ -1,5 +1,5 @@ - /* -- * Copyright 2006, 2008 Freescale Semiconductor -+ * Copyright 2006, 2008-2009 Freescale Semiconductor - * York Sun (yorksun@freescale.com) - * Haiying Wang (haiying.wang@freescale.com) - * Timur Tabi (timur@freescale.com) -@@ -34,6 +34,8 @@ - #error "Please define either CONFIG_SYS_I2C_EEPROM_CCID or CONFIG_SYS_I2C_EEPROM_NXID" - #endif - -+#define MAX_NUM_PORTS 8 /* This value must be 8 as defined in doc */ -+ - /** - * static eeprom: EEPROM layout for CCID or NXID formats - * -@@ -50,7 +52,7 @@ static struct __attribute__ ((__packed__)) eeprom { - u8 res_0[40]; /* 0x18 - 0x3f Reserved */ - u8 mac_count; /* 0x40 Number of MAC addresses */ - u8 mac_flag; /* 0x41 MAC table flags */ -- u8 mac[8][6]; /* 0x42 - 0x71 MAC addresses */ -+ u8 mac[MAX_NUM_PORTS][6]; /* 0x42 - 0x71 MAC addresses */ - u32 crc; /* 0x72 CRC32 checksum */ - #endif - #ifdef CONFIG_SYS_I2C_EEPROM_NXID -@@ -66,7 +68,7 @@ static struct __attribute__ ((__packed__)) eeprom { - u8 res_1[21]; /* 0x2b - 0x3f Reserved */ - u8 mac_count; /* 0x40 Number of MAC addresses */ - u8 mac_flag; /* 0x41 MAC table flags */ -- u8 mac[8][6]; /* 0x42 - 0x71 MAC addresses */ -+ u8 mac[MAX_NUM_PORTS][6]; /* 0x42 - 0x71 MAC addresses */ - u32 crc; /* 0x72 CRC32 checksum */ - #endif - } e; -@@ -119,7 +121,8 @@ static void show_eeprom(void) - e.date[3] & 0x80 ? "PM" : ""); - - /* Show MAC addresses */ -- for (i = 0; i < min(e.mac_count, 8); i++) { -+ for (i = 0; i < min(e.mac_count, MAX_NUM_PORTS); i++) { -+ - u8 *p = e.mac[i]; - - printf("Eth%u: %02x:%02x:%02x:%02x:%02x:%02x\n", i, -@@ -404,7 +407,17 @@ int mac_read_from_eeprom(void) - } - } - -- for (i = 0; i < min(4, e.mac_count); i++) { -+ /* Check the number of MAC addresses which is limited to -+ * MAX_NUM_PORTS. -+ */ -+ if (e.mac_count > MAX_NUM_PORTS) { -+ printf("Warning: The number of MAC addresses is greater" -+ " than %u, force it to %u.\n", MAX_NUM_PORTS, -+ MAX_NUM_PORTS); -+ e.mac_count = MAX_NUM_PORTS; -+ } -+ -+ for (i = 0; i < e.mac_count; i++) { - if (memcmp(&e.mac[i], "\0\0\0\0\0\0", 6) && - memcmp(&e.mac[i], "\xFF\xFF\xFF\xFF\xFF\xFF", 6)) { - char ethaddr[18]; -diff --git a/board/freescale/mpc5121ads/Makefile b/board/freescale/mpc5121ads/Makefile -new file mode 100644 -index 0000000..20fbf6e ---- /dev/null -+++ b/board/freescale/mpc5121ads/Makefile -@@ -0,0 +1,53 @@ -+# -+# (C) Copyright 2007 -+# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -+# -+# See file CREDITS for list of people who contributed to this -+# project. -+# -+# This program is free software; you can redistribute it and/or -+# modify it under the terms of the GNU General Public License as -+# published by the Free Software Foundation; either version 2 of -+# the License, or (at your option) any later version. -+# -+# This program is distributed in the hope that it will be useful, -+# but WITHOUT ANY WARRANTY; without even the implied warranty of -+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+# GNU General Public License for more details. -+# -+# You should have received a copy of the GNU General Public License -+# along with this program; if not, write to the Free Software -+# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+# MA 02111-1307 USA -+# -+ -+include $(TOPDIR)/config.mk -+ -+$(shell mkdir -p $(OBJTREE)/board/freescale/common) -+ -+LIB = $(obj)lib$(BOARD).a -+ -+COBJS-y := $(BOARD).o -+ -+COBJS := $(COBJS-y) -+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -+OBJS := $(addprefix $(obj),$(COBJS)) -+SOBJS := $(addprefix $(obj),$(SOBJS)) -+ -+$(LIB): $(obj).depend $(OBJS) -+ $(AR) $(ARFLAGS) $@ $(OBJS) -+ -+clean: -+ rm -f $(SOBJS) $(OBJS) -+ -+distclean: clean -+ rm -f $(LIB) core *.bak $(obj).depend -+ -+######################################################################### -+ -+# defines $(obj).depend target -+include $(SRCTREE)/rules.mk -+ -+sinclude $(obj).depend -+ -+######################################################################### -diff --git a/board/freescale/mpc5121ads/README b/board/freescale/mpc5121ads/README -new file mode 100644 -index 0000000..defcd6b ---- /dev/null -+++ b/board/freescale/mpc5121ads/README -@@ -0,0 +1,7 @@ -+To configure for the current (Rev 3.x) ADS5121 -+ make ads5121_config -+This will automatically include PCI, the Real Time CLock, add backup flash -+ability and set the correct frequency and memory configuration. -+ -+To configure for the older Rev 2 ADS5121 type (this will not have PCI) -+ make ads5121_rev2_config -diff --git a/board/freescale/mpc5121ads/config.mk b/board/freescale/mpc5121ads/config.mk -new file mode 100644 -index 0000000..14998f4 ---- /dev/null -+++ b/board/freescale/mpc5121ads/config.mk -@@ -0,0 +1,23 @@ -+# -+# (C) Copyright 2007 DENX Software Engineering -+# -+# See file CREDITS for list of people who contributed to this -+# project. -+# -+# This program is free software; you can redistribute it and/or -+# modify it under the terms of the GNU General Public License as -+# published by the Free Software Foundation; either version 2 of -+# the License, or (at your option) any later version. -+# -+# This program is distributed in the hope that it will be useful, -+# but WITHOUT ANY WARRANTY; without even the implied warranty of -+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+# GNU General Public License for more details. -+# -+# You should have received a copy of the GNU General Public License -+# along with this program; if not, write to the Free Software -+# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+# MA 02111-1307 USA -+# -+ -+TEXT_BASE = 0xFFF00000 -diff --git a/board/freescale/mpc5121ads/mpc5121ads.c b/board/freescale/mpc5121ads/mpc5121ads.c -new file mode 100644 -index 0000000..ec74fd3 ---- /dev/null -+++ b/board/freescale/mpc5121ads/mpc5121ads.c -@@ -0,0 +1,366 @@ -+/* -+ * (C) Copyright 2007-2009 DENX Software Engineering -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#ifdef CONFIG_MISC_INIT_R -+#include -+#endif -+ -+#include -+#include -+ -+DECLARE_GLOBAL_DATA_PTR; -+ -+extern int mpc5121_diu_init(void); -+extern void ide_set_reset(int idereset); -+ -+/* Clocks in use */ -+#define SCCR1_CLOCKS_EN (CLOCK_SCCR1_CFG_EN | \ -+ CLOCK_SCCR1_DDR_EN | \ -+ CLOCK_SCCR1_FEC_EN | \ -+ CLOCK_SCCR1_LPC_EN | \ -+ CLOCK_SCCR1_NFC_EN | \ -+ CLOCK_SCCR1_PATA_EN | \ -+ CLOCK_SCCR1_PCI_EN | \ -+ CLOCK_SCCR1_PSC_EN(CONFIG_PSC_CONSOLE) | \ -+ CLOCK_SCCR1_PSCFIFO_EN | \ -+ CLOCK_SCCR1_TPR_EN) -+ -+#define SCCR2_CLOCKS_EN (CLOCK_SCCR2_DIU_EN | \ -+ CLOCK_SCCR2_I2C_EN | \ -+ CLOCK_SCCR2_MEM_EN | \ -+ CLOCK_SCCR2_SPDIF_EN) -+ -+#define CSAW_START(start) ((start) & 0xFFFF0000) -+#define CSAW_STOP(start, size) (((start) + (size) - 1) >> 16) -+ -+long int fixed_sdram(void); -+void __mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip); -+ -+/* Active chip number set in board_nand_select_device() (mpc5121_nfc.c) */ -+extern int mpc5121_nfc_chip; -+ -+/* Control chips select signal on MPC5121ADS board */ -+void mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip) -+{ -+ unsigned char *csreg = (u8 *)CONFIG_SYS_CPLD_BASE + 0x09; -+ u8 v; -+ -+ v = in_8(csreg); -+ v |= 0x0F; -+ -+ if (chip >= 0) { -+ __mpc5121_nfc_select_chip(mtd, 0); -+ v &= ~(1 << mpc5121_nfc_chip); -+ } else { -+ __mpc5121_nfc_select_chip(mtd, -1); -+ } -+ -+ out_8(csreg, v); -+} -+ -+int board_early_init_f (void) -+{ -+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; -+ u32 lpcaw, spridr; -+ -+ /* -+ * Initialize Local Window for the CPLD registers access (CS2 selects -+ * the CPLD chip) -+ */ -+ out_be32(&im->sysconf.lpcs2aw, -+ CSAW_START(CONFIG_SYS_CPLD_BASE) | -+ CSAW_STOP(CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_SIZE) -+ ); -+ out_be32(&im->lpc.cs_cfg[2], CONFIG_SYS_CS2_CFG); -+ -+ /* -+ * According to MPC5121e RM, configuring local access windows should -+ * be followed by a dummy read of the config register that was -+ * modified last and an isync -+ */ -+ lpcaw = in_be32(&im->sysconf.lpcs6aw); -+ __asm__ __volatile__ ("isync"); -+ -+ /* -+ * Disable Boot NOR FLASH write protect - CPLD Reg 8 NOR FLASH Control -+ * -+ * Without this the flash identification routine fails, as it needs to issue -+ * write commands in order to establish the device ID. -+ */ -+ -+#ifdef CONFIG_ADS5121_REV2 -+ out_8((u8 *)(CONFIG_SYS_CPLD_BASE + 0x08), 0xC1); -+#else -+ if (in_8((u8 *)(CONFIG_SYS_CPLD_BASE + 0x08)) & 0x04) { -+ out_8((u8 *)(CONFIG_SYS_CPLD_BASE + 0x08), 0xC1); -+ } else { -+ /* running from Backup flash */ -+ out_8((u8 *)(CONFIG_SYS_CPLD_BASE + 0x08), 0x32); -+ } -+#endif -+ /* -+ * Configure Flash Speed -+ */ -+ out_be32(&im->lpc.cs_cfg[0], CONFIG_SYS_CS0_CFG); -+ -+ spridr = in_be32(&im->sysconf.spridr); -+ -+ if (SVR_MJREV (spridr) >= 2) -+ out_be32 (&im->lpc.altr, CONFIG_SYS_CS_ALETIMING); -+ -+ /* -+ * Enable clocks -+ */ -+ out_be32 (&im->clk.sccr[0], SCCR1_CLOCKS_EN); -+ out_be32 (&im->clk.sccr[1], SCCR2_CLOCKS_EN); -+#if defined(CONFIG_IIM) || defined(CONFIG_CMD_FUSE) -+ setbits_be32 (&im->clk.sccr[1], CLOCK_SCCR2_IIM_EN); -+#endif -+ -+ return 0; -+} -+ -+phys_size_t initdram (int board_type) -+{ -+ u32 msize = 0; -+ -+ msize = fixed_sdram (); -+ -+ return msize; -+} -+ -+/* -+ * fixed sdram init -- the board doesn't use memory modules that have serial presence -+ * detect or similar mechanism for discovery of the DRAM settings -+ */ -+long int fixed_sdram (void) -+{ -+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; -+ u32 msize = CONFIG_SYS_DDR_SIZE * 1024 * 1024; -+ u32 msize_log2 = __ilog2 (msize); -+ u32 i; -+ -+ /* Initialize IO Control */ -+ out_be32 (&im->io_ctrl.io_control_mem, IOCTRL_MUX_DDR); -+ -+ /* Initialize DDR Local Window */ -+ out_be32 (&im->sysconf.ddrlaw.bar, CONFIG_SYS_DDR_BASE & 0xFFFFF000); -+ out_be32 (&im->sysconf.ddrlaw.ar, msize_log2 - 1); -+ -+ /* -+ * According to MPC5121e RM, configuring local access windows should -+ * be followed by a dummy read of the config register that was -+ * modified last and an isync -+ */ -+ in_be32(&im->sysconf.ddrlaw.ar); -+ __asm__ __volatile__ ("isync"); -+ -+ /* Enable DDR */ -+ out_be32(&im->mddrc.ddr_sys_config, CONFIG_SYS_MDDRC_SYS_CFG_EN); -+ -+ /* Initialize DDR Priority Manager */ -+ out_be32(&im->mddrc.prioman_config1, CONFIG_SYS_MDDRCGRP_PM_CFG1); -+ out_be32(&im->mddrc.prioman_config2, CONFIG_SYS_MDDRCGRP_PM_CFG2); -+ out_be32(&im->mddrc.hiprio_config, CONFIG_SYS_MDDRCGRP_HIPRIO_CFG); -+ out_be32(&im->mddrc.lut_table0_main_upper, CONFIG_SYS_MDDRCGRP_LUT0_MU); -+ out_be32(&im->mddrc.lut_table0_main_lower, CONFIG_SYS_MDDRCGRP_LUT0_ML); -+ out_be32(&im->mddrc.lut_table1_main_upper, CONFIG_SYS_MDDRCGRP_LUT1_MU); -+ out_be32(&im->mddrc.lut_table1_main_lower, CONFIG_SYS_MDDRCGRP_LUT1_ML); -+ out_be32(&im->mddrc.lut_table2_main_upper, CONFIG_SYS_MDDRCGRP_LUT2_MU); -+ out_be32(&im->mddrc.lut_table2_main_lower, CONFIG_SYS_MDDRCGRP_LUT2_ML); -+ out_be32(&im->mddrc.lut_table3_main_upper, CONFIG_SYS_MDDRCGRP_LUT3_MU); -+ out_be32(&im->mddrc.lut_table3_main_lower, CONFIG_SYS_MDDRCGRP_LUT3_ML); -+ out_be32(&im->mddrc.lut_table4_main_upper, CONFIG_SYS_MDDRCGRP_LUT4_MU); -+ out_be32(&im->mddrc.lut_table4_main_lower, CONFIG_SYS_MDDRCGRP_LUT4_ML); -+ out_be32(&im->mddrc.lut_table0_alternate_upper, CONFIG_SYS_MDDRCGRP_LUT0_AU); -+ out_be32(&im->mddrc.lut_table0_alternate_lower, CONFIG_SYS_MDDRCGRP_LUT0_AL); -+ out_be32(&im->mddrc.lut_table1_alternate_upper, CONFIG_SYS_MDDRCGRP_LUT1_AU); -+ out_be32(&im->mddrc.lut_table1_alternate_lower, CONFIG_SYS_MDDRCGRP_LUT1_AL); -+ out_be32(&im->mddrc.lut_table2_alternate_upper, CONFIG_SYS_MDDRCGRP_LUT2_AU); -+ out_be32(&im->mddrc.lut_table2_alternate_lower, CONFIG_SYS_MDDRCGRP_LUT2_AL); -+ out_be32(&im->mddrc.lut_table3_alternate_upper, CONFIG_SYS_MDDRCGRP_LUT3_AU); -+ out_be32(&im->mddrc.lut_table3_alternate_lower, CONFIG_SYS_MDDRCGRP_LUT3_AL); -+ out_be32(&im->mddrc.lut_table4_alternate_upper, CONFIG_SYS_MDDRCGRP_LUT4_AU); -+ out_be32(&im->mddrc.lut_table4_alternate_lower, CONFIG_SYS_MDDRCGRP_LUT4_AL); -+ -+ /* Initialize MDDRC */ -+ out_be32(&im->mddrc.ddr_sys_config, CONFIG_SYS_MDDRC_SYS_CFG); -+ out_be32(&im->mddrc.ddr_time_config0, CONFIG_SYS_MDDRC_TIME_CFG0); -+ out_be32(&im->mddrc.ddr_time_config1, CONFIG_SYS_MDDRC_TIME_CFG1); -+ out_be32(&im->mddrc.ddr_time_config2, CONFIG_SYS_MDDRC_TIME_CFG2); -+ -+ /* Initialize DDR */ -+ for (i = 0; i < 10; i++) -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP); -+ -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_PCHG_ALL); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_RFSH); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_RFSH); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_INIT_DEV_OP); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_EM2); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_PCHG_ALL); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_EM2); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_EM3); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_EN_DLL); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_INIT_DEV_OP); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_PCHG_ALL); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_RFSH); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_INIT_DEV_OP); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_OCD_DEFAULT); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_PCHG_ALL); -+ out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP); -+ -+ /* Start MDDRC */ -+ out_be32(&im->mddrc.ddr_time_config0, CONFIG_SYS_MDDRC_TIME_CFG0_RUN); -+ out_be32(&im->mddrc.ddr_sys_config, CONFIG_SYS_MDDRC_SYS_CFG_RUN); -+ -+ return msize; -+} -+ -+int misc_init_r(void) -+{ -+ u8 tmp_val; -+ -+ /* Using this for DIU init before the driver in linux takes over -+ * Enable the TFP410 Encoder (I2C address 0x38) -+ */ -+ -+ i2c_set_bus_num(2); -+ tmp_val = 0xBF; -+ i2c_write(0x38, 0x08, 1, &tmp_val, sizeof(tmp_val)); -+ /* Verify if enabled */ -+ tmp_val = 0; -+ i2c_read(0x38, 0x08, 1, &tmp_val, sizeof(tmp_val)); -+ debug("DVI Encoder Read: 0x%02lx\n", tmp_val); -+ -+ tmp_val = 0x10; -+ i2c_write(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val)); -+ /* Verify if enabled */ -+ tmp_val = 0; -+ i2c_read(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val)); -+ debug("DVI Encoder Read: 0x%02lx\n", tmp_val); -+ -+#ifdef CONFIG_FSL_DIU_FB -+# if !(defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE)) -+ mpc5121_diu_init(); -+# endif -+#endif -+ return 0; -+} -+ -+static iopin_t ioregs_init[] = { -+ /* FUNC1=FEC_RX_DV Sets Next 3 to FEC pads */ -+ { -+ offsetof(struct ioctrl512x, io_control_spdif_txclk), 3, 0, -+ IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) -+ }, -+ /* Set highest Slew on 9 PATA pins */ -+ { -+ offsetof(struct ioctrl512x, io_control_pata_ce1), 9, 1, -+ IO_PIN_FMUX(0) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) -+ }, -+ /* FUNC1=FEC_COL Sets Next 15 to FEC pads */ -+ { -+ offsetof(struct ioctrl512x, io_control_psc0_0), 15, 0, -+ IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) -+ }, -+ /* FUNC1=SPDIF_TXCLK */ -+ { -+ offsetof(struct ioctrl512x, io_control_lpc_cs1), 1, 0, -+ IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -+ IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3) -+ }, -+ /* FUNC2=SPDIF_TX and sets Next pin to SPDIF_RX */ -+ { -+ offsetof(struct ioctrl512x, io_control_i2c1_scl), 2, 0, -+ IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -+ IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3) -+ }, -+ /* FUNC2=DIU CLK */ -+ { -+ offsetof(struct ioctrl512x, io_control_psc6_0), 1, 0, -+ IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -+ IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3) -+ }, -+ /* FUNC2=DIU_HSYNC */ -+ { -+ offsetof(struct ioctrl512x, io_control_psc6_1), 1, 0, -+ IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) -+ }, -+ /* FUNC2=DIUVSYNC Sets Next 26 to DIU Pads */ -+ { -+ offsetof(struct ioctrl512x, io_control_psc6_4), 26, 0, -+ IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | -+ IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) -+ } -+}; -+ -+static iopin_t rev2_silicon_pci_ioregs_init[] = { -+ /* FUNC0=PCI Sets next 54 to PCI pads */ -+ { -+ offsetof(struct ioctrl512x, io_control_pci_ad31), 54, 0, -+ IO_PIN_FMUX(0) | IO_PIN_HOLD(0) | IO_PIN_DS(0) -+ } -+}; -+ -+int checkboard (void) -+{ -+ ushort brd_rev = *(vu_short *) (CONFIG_SYS_CPLD_BASE + 0x00); -+ uchar cpld_rev = *(vu_char *) (CONFIG_SYS_CPLD_BASE + 0x02); -+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; -+ u32 spridr = in_be32(&im->sysconf.spridr); -+ -+ printf ("Board: ADS5121 rev. 0x%04x (CPLD rev. 0x%02x)\n", -+ brd_rev, cpld_rev); -+ -+ /* initialize function mux & slew rate IO inter alia on IO Pins */ -+ iopin_initialize(ioregs_init, ARRAY_SIZE(ioregs_init)); -+ -+ if (SVR_MJREV (spridr) >= 2) -+ iopin_initialize(rev2_silicon_pci_ioregs_init, 1); -+ -+ return 0; -+} -+ -+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) -+void ft_board_setup(void *blob, bd_t *bd) -+{ -+ ft_cpu_setup(blob, bd); -+ fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); -+} -+#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ -diff --git a/board/freescale/mpc8349emds/mpc8349emds.c b/board/freescale/mpc8349emds/mpc8349emds.c -index 06064d9..61d1249 100644 ---- a/board/freescale/mpc8349emds/mpc8349emds.c -+++ b/board/freescale/mpc8349emds/mpc8349emds.c -@@ -38,7 +38,7 @@ - int fixed_sdram(void); - void sdram_init(void); - --#if defined(CONFIG_DDR_ECC) && defined(CONFIG_MPC83XX) -+#if defined(CONFIG_DDR_ECC) && defined(CONFIG_MPC83xx) - void ddr_enable_ecc(unsigned int dram_size); - #endif - -diff --git a/board/freescale/mpc8569mds/bcsr.c b/board/freescale/mpc8569mds/bcsr.c -index f462597..a936edb 100644 ---- a/board/freescale/mpc8569mds/bcsr.c -+++ b/board/freescale/mpc8569mds/bcsr.c -@@ -35,12 +35,29 @@ void disable_8569mds_flash_write() - clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 17), BCSR17_FLASH_nWP); - } - --void enable_8569mds_qe_mdio() -+void enable_8569mds_qe_uec() - { -+#if defined(CONFIG_SYS_UCC_RGMII_MODE) - setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 7), - BCSR7_UCC1_GETH_EN | BCSR7_UCC1_RGMII_EN); - setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 8), - BCSR8_UCC2_GETH_EN | BCSR8_UCC2_RGMII_EN); -+ setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 9), -+ BCSR9_UCC3_GETH_EN | BCSR9_UCC3_RGMII_EN); -+ setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 10), -+ BCSR10_UCC4_GETH_EN | BCSR10_UCC4_RGMII_EN); -+#elif defined(CONFIG_SYS_UCC_RMII_MODE) -+ /* Set UCC1-4 working at RMII mode */ -+ clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 7), -+ BCSR7_UCC1_GETH_EN | BCSR7_UCC1_RGMII_EN); -+ clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 8), -+ BCSR8_UCC2_GETH_EN | BCSR8_UCC2_RGMII_EN); -+ clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 9), -+ BCSR9_UCC3_GETH_EN | BCSR9_UCC3_RGMII_EN); -+ clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 10), -+ BCSR10_UCC4_GETH_EN | BCSR10_UCC4_RGMII_EN); -+ setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 9), BCSR9_UCC3_RMII_EN); -+#endif - } - - void disable_8569mds_brd_eeprom_write_protect() -diff --git a/board/freescale/mpc8569mds/bcsr.h b/board/freescale/mpc8569mds/bcsr.h -index 8efe9bd..e5d63c7 100644 ---- a/board/freescale/mpc8569mds/bcsr.h -+++ b/board/freescale/mpc8569mds/bcsr.h -@@ -76,7 +76,7 @@ - - void enable_8569mds_flash_write(void); - void disable_8569mds_flash_write(void); --void enable_8569mds_qe_mdio(void); -+void enable_8569mds_qe_uec(void); - void disable_8569mds_brd_eeprom_write_protect(void); - - #endif /* __BCSR_H_ */ -diff --git a/board/freescale/mpc8569mds/mpc8569mds.c b/board/freescale/mpc8569mds/mpc8569mds.c -index 7e6cfb7..1e7526a 100644 ---- a/board/freescale/mpc8569mds/mpc8569mds.c -+++ b/board/freescale/mpc8569mds/mpc8569mds.c -@@ -47,6 +47,7 @@ const qe_iop_conf_t qe_iop_conf_tab[] = { - /* QE_MUX_MDIO */ - {2, 30, 3, 0, 2}, /* QE_MUX_MDIO */ - -+#if defined(CONFIG_SYS_UCC_RGMII_MODE) - /* UCC_1_RGMII */ - {2, 11, 2, 0, 1}, /* CLK12 */ - {0, 0, 1, 0, 3}, /* ENET1_TXD0_SER1_TXD0 */ -@@ -77,6 +78,74 @@ const qe_iop_conf_t qe_iop_conf_tab[] = { - {2, 3, 2, 0, 1}, /* ENET2_GRXCLK */ - {2, 2, 1, 0, 2}, /* ENET2_GTXCLK */ - -+ /* UCC_3_RGMII */ -+ {2, 11, 2, 0, 1}, /* CLK12 */ -+ {0, 29, 1, 0, 2}, /* ENET3_TXD0_SER3_TXD0 */ -+ {0, 30, 1, 0, 3}, /* ENET3_TXD1_SER3_TXD1 */ -+ {0, 31, 1, 0, 2}, /* ENET3_TXD2_SER3_TXD2 */ -+ {1, 0, 1, 0, 3}, /* ENET3_TXD3_SER3_TXD3 */ -+ {1, 3, 2, 0, 3}, /* ENET3_RXD0_SER3_RXD0 */ -+ {1, 4, 2, 0, 1}, /* ENET3_RXD1_SER3_RXD1 */ -+ {1, 5, 2, 0, 2}, /* ENET3_RXD2_SER3_RXD2 */ -+ {1, 6, 2, 0, 3}, /* ENET3_RXD3_SER3_RXD3 */ -+ {1, 1, 1, 0, 1}, /* ENET3_TX_EN_SER3_RTS_B */ -+ {1, 9, 2, 0, 3}, /* ENET3_RX_DV_SER3_CTS_B */ -+ {2, 9, 2, 0, 2}, /* ENET3_GRXCLK */ -+ {2, 25, 1, 0, 2}, /* ENET3_GTXCLK */ -+ -+ /* UCC_4_RGMII */ -+ {2, 16, 2, 0, 3}, /* CLK17 */ -+ {1, 12, 1, 0, 2}, /* ENET4_TXD0_SER4_TXD0 */ -+ {1, 13, 1, 0, 2}, /* ENET4_TXD1_SER4_TXD1 */ -+ {1, 14, 1, 0, 1}, /* ENET4_TXD2_SER4_TXD2 */ -+ {1, 15, 1, 0, 2}, /* ENET4_TXD3_SER4_TXD3 */ -+ {1, 18, 2, 0, 2}, /* ENET4_RXD0_SER4_RXD0 */ -+ {1, 19, 2, 0, 1}, /* ENET4_RXD1_SER4_RXD1 */ -+ {1, 20, 2, 0, 1}, /* ENET4_RXD2_SER4_RXD2 */ -+ {1, 21, 2, 0, 2}, /* ENET4_RXD3_SER4_RXD3 */ -+ {1, 16, 1, 0, 2}, /* ENET4_TX_EN_SER4_RTS_B */ -+ {1, 24, 2, 0, 3}, /* ENET4_RX_DV_SER4_CTS_B */ -+ {2, 17, 2, 0, 2}, /* ENET4_GRXCLK */ -+ {2, 24, 1, 0, 2}, /* ENET4_GTXCLK */ -+ -+#elif defined(CONFIG_SYS_UCC_RMII_MODE) -+ /* UCC_1_RMII */ -+ {2, 15, 2, 0, 1}, /* CLK16 */ -+ {0, 0, 1, 0, 3}, /* ENET1_TXD0_SER1_TXD0 */ -+ {0, 1, 1, 0, 3}, /* ENET1_TXD1_SER1_TXD1 */ -+ {0, 6, 2, 0, 3}, /* ENET1_RXD0_SER1_RXD0 */ -+ {0, 7, 2, 0, 1}, /* ENET1_RXD1_SER1_RXD1 */ -+ {0, 4, 1, 0, 2}, /* ENET1_TX_EN_SER1_RTS_B */ -+ {0, 12, 2, 0, 3}, /* ENET1_RX_DV_SER1_CTS_B */ -+ -+ /* UCC_2_RMII */ -+ {2, 15, 2, 0, 1}, /* CLK16 */ -+ {0, 14, 1, 0, 2}, /* ENET2_TXD0_SER2_TXD0 */ -+ {0, 15, 1, 0, 2}, /* ENET2_TXD1_SER2_TXD1 */ -+ {0, 20, 2, 0, 2}, /* ENET2_RXD0_SER2_RXD0 */ -+ {0, 21, 2, 0, 1}, /* ENET2_RXD1_SER2_RXD1 */ -+ {0, 18, 1, 0, 2}, /* ENET2_TX_EN_SER2_RTS_B */ -+ {0, 26, 2, 0, 3}, /* ENET2_RX_DV_SER2_CTS_B */ -+ -+ /* UCC_3_RMII */ -+ {2, 15, 2, 0, 1}, /* CLK16 */ -+ {0, 29, 1, 0, 2}, /* ENET3_TXD0_SER3_TXD0 */ -+ {0, 30, 1, 0, 3}, /* ENET3_TXD1_SER3_TXD1 */ -+ {1, 3, 2, 0, 3}, /* ENET3_RXD0_SER3_RXD0 */ -+ {1, 4, 2, 0, 1}, /* ENET3_RXD1_SER3_RXD1 */ -+ {1, 1, 1, 0, 1}, /* ENET3_TX_EN_SER3_RTS_B */ -+ {1, 9, 2, 0, 3}, /* ENET3_RX_DV_SER3_CTS_B */ -+ -+ /* UCC_4_RMII */ -+ {2, 15, 2, 0, 1}, /* CLK16 */ -+ {1, 12, 1, 0, 2}, /* ENET4_TXD0_SER4_TXD0 */ -+ {1, 13, 1, 0, 2}, /* ENET4_TXD1_SER4_TXD1 */ -+ {1, 18, 2, 0, 2}, /* ENET4_RXD0_SER4_RXD0 */ -+ {1, 19, 2, 0, 1}, /* ENET4_RXD1_SER4_RXD1 */ -+ {1, 16, 1, 0, 2}, /* ENET4_TX_EN_SER4_RTS_B */ -+ {1, 24, 2, 0, 3}, /* ENET4_RX_DV_SER4_CTS_B */ -+#endif -+ - /* UART1 is muxed with QE PortF bit [9-12].*/ - {5, 12, 2, 0, 3}, /* UART1_SIN */ - {5, 9, 1, 0, 3}, /* UART1_SOUT */ -@@ -98,7 +167,7 @@ int board_early_init_f (void) - enable_8569mds_flash_write(); - - #ifdef CONFIG_QE -- enable_8569mds_qe_mdio(); -+ enable_8569mds_qe_uec(); - #endif - - #if CONFIG_SYS_I2C2_OFFSET -@@ -320,6 +389,61 @@ pci_init_board(void) - #if defined(CONFIG_OF_BOARD_SETUP) - void ft_board_setup(void *blob, bd_t *bd) - { -+#if defined(CONFIG_SYS_UCC_RMII_MODE) -+ int nodeoff, off, err; -+ unsigned int val; -+ const u32 *ph; -+ const u32 *index; -+ -+ /* fixup device tree for supporting rmii mode */ -+ nodeoff = -1; -+ while ((nodeoff = fdt_node_offset_by_compatible(blob, nodeoff, -+ "ucc_geth")) >= 0) { -+ err = fdt_setprop_string(blob, nodeoff, "tx-clock-name", -+ "clk16"); -+ if (err < 0) { -+ printf("WARNING: could not set tx-clock-name %s.\n", -+ fdt_strerror(err)); -+ break; -+ } -+ -+ err = fdt_setprop_string(blob, nodeoff, "phy-connection-type", -+ "rmii"); -+ if (err < 0) { -+ printf("WARNING: could not set phy-connection-type " -+ "%s.\n", fdt_strerror(err)); -+ break; -+ } -+ -+ index = fdt_getprop(blob, nodeoff, "cell-index", 0); -+ if (index == NULL) { -+ printf("WARNING: could not get cell-index of ucc\n"); -+ break; -+ } -+ -+ ph = fdt_getprop(blob, nodeoff, "phy-handle", 0); -+ if (ph == NULL) { -+ printf("WARNING: could not get phy-handle of ucc\n"); -+ break; -+ } -+ -+ off = fdt_node_offset_by_phandle(blob, *ph); -+ if (off < 0) { -+ printf("WARNING: could not get phy node %s.\n", -+ fdt_strerror(err)); -+ break; -+ } -+ -+ val = 0x7 + *index; /* RMII phy address starts from 0x8 */ -+ -+ err = fdt_setprop(blob, off, "reg", &val, sizeof(u32)); -+ if (err < 0) { -+ printf("WARNING: could not set reg for phy-handle " -+ "%s.\n", fdt_strerror(err)); -+ break; -+ } -+ } -+#endif - ft_cpu_setup(blob, bd); - - #ifdef CONFIG_PCIE1 -diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c b/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c -index 2b2d5d7..0ad878c 100644 ---- a/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c -+++ b/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c -@@ -140,8 +140,8 @@ U_BOOT_CMD( - diufb, CONFIG_SYS_MAXARGS, 1, mpc8610diu_init_show_bmp, - "Init or Display BMP file", - "init\n - initialize DIU\n" -- "addr\n - display bmp at address 'addr'\n" -- ); -+ "addr\n - display bmp at address 'addr'" -+); - - - #if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) -diff --git a/board/freescale/mx31ads/config.mk b/board/freescale/mx31ads/config.mk -index d34dc02..7ec0fe2 100644 ---- a/board/freescale/mx31ads/config.mk -+++ b/board/freescale/mx31ads/config.mk -@@ -1 +1,3 @@ - TEXT_BASE = 0x87f00000 -+ -+LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot.lds -diff --git a/board/freescale/p2020ds/Makefile b/board/freescale/p2020ds/Makefile -new file mode 100644 -index 0000000..41032ac ---- /dev/null -+++ b/board/freescale/p2020ds/Makefile -@@ -0,0 +1,54 @@ -+# -+# Copyright 2007-2009 Freescale Semiconductor, Inc. -+# (C) Copyright 2001-2006 -+# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -+# -+# See file CREDITS for list of people who contributed to this -+# project. -+# -+# This program is free software; you can redistribute it and/or -+# modify it under the terms of the GNU General Public License as -+# published by the Free Software Foundation; either version 2 of -+# the License, or (at your option) any later version. -+# -+# This program is distributed in the hope that it will be useful, -+# but WITHOUT ANY WARRANTY; without even the implied warranty of -+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+# GNU General Public License for more details. -+# -+# You should have received a copy of the GNU General Public License -+# along with this program; if not, write to the Free Software -+# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+# MA 02111-1307 USA -+# -+ -+include $(TOPDIR)/config.mk -+ -+LIB = $(obj)lib$(BOARD).a -+ -+COBJS-y += $(BOARD).o -+COBJS-y += ddr.o -+COBJS-y += law.o -+COBJS-y += tlb.o -+ -+SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) -+OBJS := $(addprefix $(obj),$(COBJS-y)) -+SOBJS := $(addprefix $(obj),$(SOBJS)) -+ -+$(LIB): $(obj).depend $(OBJS) $(SOBJS) -+ $(AR) $(ARFLAGS) $@ $(OBJS) -+ -+clean: -+ rm -f $(OBJS) $(SOBJS) -+ -+distclean: clean -+ rm -f $(LIB) core *.bak .depend -+ -+######################################################################### -+ -+# defines $(obj).depend target -+include $(SRCTREE)/rules.mk -+ -+sinclude $(obj).depend -+ -+######################################################################### -diff --git a/board/freescale/p2020ds/config.mk b/board/freescale/p2020ds/config.mk -new file mode 100644 -index 0000000..18bdc86 ---- /dev/null -+++ b/board/freescale/p2020ds/config.mk -@@ -0,0 +1,32 @@ -+# -+# Copyright 2007-2009 Freescale Semiconductor, Inc. -+# -+# See file CREDITS for list of people who contributed to this -+# project. -+# -+# This program is free software; you can redistribute it and/or -+# modify it under the terms of the GNU General Public License as -+# published by the Free Software Foundation; either version 2 of -+# the License, or (at your option) any later version. -+# -+# This program is distributed in the hope that it will be useful, -+# but WITHOUT ANY WARRANTY; without even the implied warranty of -+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+# GNU General Public License for more details. -+# -+# You should have received a copy of the GNU General Public License -+# along with this program; if not, write to the Free Software -+# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+# MA 02111-1307 USA -+# -+ -+# -+# p2020ds board -+# -+ifndef TEXT_BASE -+TEXT_BASE = 0xeff80000 -+endif -+ -+PLATFORM_CPPFLAGS += -DCONFIG_E500=1 -+PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1 -+PLATFORM_CPPFLAGS += -DCONFIG_P2020=1 -diff --git a/board/freescale/p2020ds/ddr.c b/board/freescale/p2020ds/ddr.c -new file mode 100644 -index 0000000..b9c0cb2 ---- /dev/null -+++ b/board/freescale/p2020ds/ddr.c -@@ -0,0 +1,130 @@ -+/* -+ * Copyright 2008-2009 Freescale Semiconductor, Inc. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * Version 2 as published by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include -+#include -+ -+static void get_spd(ddr3_spd_eeprom_t *spd, unsigned char i2c_address) -+{ -+ i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr3_spd_eeprom_t)); -+} -+ -+unsigned int fsl_ddr_get_mem_data_rate(void) -+{ -+ return get_ddr_freq(0); -+} -+ -+void fsl_ddr_get_spd(ddr3_spd_eeprom_t *ctrl_dimms_spd, -+ unsigned int ctrl_num) -+{ -+ unsigned int i; -+ unsigned int i2c_address = 0; -+ -+ for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) { -+ if (ctrl_num == 0 && i == 0) -+ i2c_address = SPD_EEPROM_ADDRESS1; -+ get_spd(&(ctrl_dimms_spd[i]), i2c_address); -+ } -+} -+ -+typedef struct { -+ u32 datarate_mhz_low; -+ u32 datarate_mhz_high; -+ u32 n_ranks; -+ u32 clk_adjust; -+ u32 cpo; -+ u32 write_data_delay; -+ u32 force_2T; -+} board_specific_parameters_t; -+ -+/* ranges for parameters: -+ * wr_data_delay = 0-6 -+ * clk adjust = 0-8 -+ * cpo 2-0x1E (30) -+ */ -+ -+ -+/* XXX: these values need to be checked for all interleaving modes. */ -+/* XXX: No reliable dual-rank 800 MHz setting has been found. It may -+ * seem reliable, but errors will appear when memory intensive -+ * program is run. */ -+/* XXX: Single rank at 800 MHz is OK. */ -+const board_specific_parameters_t board_specific_parameters[][20] = { -+ { -+ /* memory controller 0 */ -+ /* lo| hi| num| clk| cpo|wrdata|2T */ -+ /* mhz| mhz|ranks|adjst| | delay| */ -+ { 0, 333, 2, 6, 7, 3, 0}, -+ {334, 400, 2, 6, 9, 3, 0}, -+ {401, 549, 2, 6, 11, 3, 0}, -+ {550, 680, 2, 1, 10, 5, 0}, -+ {681, 850, 2, 1, 12, 5, 1}, -+ { 0, 333, 1, 6, 7, 3, 0}, -+ {334, 400, 1, 6, 9, 3, 0}, -+ {401, 549, 1, 6, 11, 3, 0}, -+ {550, 680, 1, 1, 10, 5, 0}, -+ {681, 850, 1, 1, 12, 5, 0} -+ }, -+}; -+ -+void fsl_ddr_board_options(memctl_options_t *popts, -+ dimm_params_t *pdimm, -+ unsigned int ctrl_num) -+{ -+ const board_specific_parameters_t *pbsp = -+ &(board_specific_parameters[ctrl_num][0]); -+ u32 num_params = sizeof(board_specific_parameters[ctrl_num]) / -+ sizeof(board_specific_parameters[0][0]); -+ u32 i; -+ ulong ddr_freq; -+ -+ /* set odt_rd_cfg and odt_wr_cfg. If the there is only one dimm in -+ * that controller, set odt_wr_cfg to 4 for CS0, and 0 to CS1. If -+ * there are two dimms in the controller, set odt_rd_cfg to 3 and -+ * odt_wr_cfg to 3 for the even CS, 0 for the odd CS. -+ */ -+ for (i = 0; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) { -+ if (i&1) { /* odd CS */ -+ popts->cs_local_opts[i].odt_rd_cfg = 0; -+ popts->cs_local_opts[i].odt_wr_cfg = 0; -+ } else { /* even CS */ -+ if (CONFIG_DIMM_SLOTS_PER_CTLR == 1) { -+ popts->cs_local_opts[i].odt_rd_cfg = 0; -+ popts->cs_local_opts[i].odt_wr_cfg = 4; -+ } else if (CONFIG_DIMM_SLOTS_PER_CTLR == 2) { -+ popts->cs_local_opts[i].odt_rd_cfg = 3; -+ popts->cs_local_opts[i].odt_wr_cfg = 3; -+ } -+ } -+ } -+ -+ /* Get clk_adjust, cpo, write_data_delay,2T, according to the board ddr -+ * freqency and n_banks specified in board_specific_parameters table. -+ */ -+ ddr_freq = get_ddr_freq(0) / 1000000; -+ for (i = 0; i < num_params; i++) { -+ if (ddr_freq >= pbsp->datarate_mhz_low && -+ ddr_freq <= pbsp->datarate_mhz_high && -+ pdimm->n_ranks == pbsp->n_ranks) { -+ popts->clk_adjust = pbsp->clk_adjust; -+ popts->cpo_override = pbsp->cpo; -+ popts->write_data_delay = pbsp->write_data_delay; -+ popts->twoT_en = pbsp->force_2T; -+ } -+ pbsp++; -+ } -+ -+ /* -+ * Factors to consider for half-strength driver enable: -+ * - number of DIMMs installed -+ */ -+ popts->half_strength_driver_enable = 0; -+} -diff --git a/board/freescale/p2020ds/law.c b/board/freescale/p2020ds/law.c -new file mode 100644 -index 0000000..da297c5 ---- /dev/null -+++ b/board/freescale/p2020ds/law.c -@@ -0,0 +1,42 @@ -+/* -+ * Copyright 2008-2009 Freescale Semiconductor, Inc. -+ * -+ * (C) Copyright 2000 -+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+#include -+#include -+ -+struct law_entry law_table[] = { -+ SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_LBC), -+ SET_LAW(CONFIG_SYS_PCIE1_MEM_PHYS, LAWAR_SIZE_512M, LAW_TRGT_IF_PCIE_1), -+ SET_LAW(CONFIG_SYS_PCIE1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCIE_1), -+ SET_LAW(CONFIG_SYS_PCIE2_MEM_PHYS, LAWAR_SIZE_512M, LAW_TRGT_IF_PCIE_2), -+ SET_LAW(CONFIG_SYS_PCIE2_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCIE_2), -+ SET_LAW(CONFIG_SYS_PCIE3_MEM_PHYS, LAWAR_SIZE_512M, LAW_TRGT_IF_PCIE_3), -+ SET_LAW(CONFIG_SYS_PCIE3_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCIE_3), -+ SET_LAW(PIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_LBC), -+ SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC), -+}; -+ -+int num_law_entries = ARRAY_SIZE(law_table); -diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c -new file mode 100644 -index 0000000..6b72d61 ---- /dev/null -+++ b/board/freescale/p2020ds/p2020ds.c -@@ -0,0 +1,634 @@ -+/* -+ * Copyright 2007-2009 Freescale Semiconductor, Inc. -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "../common/pixis.h" -+#include "../common/sgmii_riser.h" -+ -+DECLARE_GLOBAL_DATA_PTR; -+ -+phys_size_t fixed_sdram(void); -+ -+int checkboard(void) -+{ -+ puts("Board: P2020DS "); -+#ifdef CONFIG_PHYS_64BIT -+ puts("(36-bit addrmap) "); -+#endif -+ printf("Sys ID: 0x%02x, " -+ "Sys Ver: 0x%02x, FPGA Ver: 0x%02x\n", -+ in8(PIXIS_BASE + PIXIS_ID), in8(PIXIS_BASE + PIXIS_VER), -+ in8(PIXIS_BASE + PIXIS_PVER)); -+ return 0; -+} -+ -+phys_size_t initdram(int board_type) -+{ -+ phys_size_t dram_size = 0; -+ -+ puts("Initializing...."); -+ -+#ifdef CONFIG_SPD_EEPROM -+ dram_size = fsl_ddr_sdram(); -+#else -+ dram_size = fixed_sdram(); -+ -+ if (set_ddr_laws(CONFIG_SYS_DDR_SDRAM_BASE, -+ dram_size, -+ LAW_TRGT_IF_DDR) < 0) { -+ printf("ERROR setting Local Access Windows for DDR\n"); -+ return 0; -+ }; -+#endif -+ dram_size = setup_ddr_tlbs(dram_size / 0x100000); -+ dram_size *= 0x100000; -+ -+ puts(" DDR: "); -+ return dram_size; -+} -+ -+#if !defined(CONFIG_SPD_EEPROM) -+/* -+ * Fixed sdram init -- doesn't use serial presence detect. -+ */ -+ -+phys_size_t fixed_sdram(void) -+{ -+ volatile ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_MPC85xx_DDR_ADDR; -+ uint d_init; -+ -+ ddr->cs0_config = CONFIG_SYS_DDR_CS0_CONFIG; -+ ddr->timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3; -+ ddr->timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0; -+ ddr->sdram_mode = CONFIG_SYS_DDR_MODE_1; -+ ddr->sdram_mode_2 = CONFIG_SYS_DDR_MODE_2; -+ ddr->sdram_md_cntl = CONFIG_SYS_DDR_MODE_CTRL; -+ ddr->sdram_interval = CONFIG_SYS_DDR_INTERVAL; -+ ddr->sdram_data_init = CONFIG_SYS_DDR_DATA_INIT; -+ ddr->sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CTRL; -+ ddr->sdram_cfg_2 = CONFIG_SYS_DDR_CONTROL2; -+ ddr->ddr_zq_cntl = CONFIG_SYS_DDR_ZQ_CNTL; -+ ddr->ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CNTL; -+ ddr->ddr_cdr1 = CONFIG_SYS_DDR_CDR1; -+ ddr->timing_cfg_4 = CONFIG_SYS_DDR_TIMING_4; -+ ddr->timing_cfg_5 = CONFIG_SYS_DDR_TIMING_5; -+ -+ if (!strcmp("performance", getenv("perf_mode"))) { -+ /* Performance Mode Values */ -+ -+ ddr->cs1_config = CONFIG_SYS_DDR_CS1_CONFIG_PERF; -+ ddr->cs0_bnds = CONFIG_SYS_DDR_CS0_BNDS_PERF; -+ ddr->cs1_bnds = CONFIG_SYS_DDR_CS1_BNDS_PERF; -+ ddr->timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1_PERF; -+ ddr->timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2_PERF; -+ -+ asm("sync;isync"); -+ -+ udelay(500); -+ -+ ddr->sdram_cfg = CONFIG_SYS_DDR_CONTROL_PERF; -+ } else { -+ /* Stable Mode Values */ -+ -+ ddr->cs1_config = CONFIG_SYS_DDR_CS1_CONFIG; -+ ddr->cs0_bnds = CONFIG_SYS_DDR_CS0_BNDS; -+ ddr->cs1_bnds = CONFIG_SYS_DDR_CS1_BNDS; -+ ddr->timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1; -+ ddr->timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2; -+ -+ /* ECC will be assumed in stable mode */ -+ ddr->err_int_en = CONFIG_SYS_DDR_ERR_INT_EN; -+ ddr->err_disable = CONFIG_SYS_DDR_ERR_DIS; -+ ddr->err_sbe = CONFIG_SYS_DDR_SBE; -+ -+ asm("sync;isync"); -+ -+ udelay(500); -+ -+ ddr->sdram_cfg = CONFIG_SYS_DDR_CONTROL; -+ } -+ -+#if defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) -+ d_init = 1; -+ debug("DDR - 1st controller: memory initializing\n"); -+ /* -+ * Poll until memory is initialized. -+ * 512 Meg at 400 might hit this 200 times or so. -+ */ -+ while ((ddr->sdram_cfg_2 & (d_init << 4)) != 0) -+ udelay(1000); -+ debug("DDR: memory initialized\n\n"); -+ asm("sync; isync"); -+ udelay(500); -+#endif -+ -+ return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; -+} -+ -+#endif -+ -+#ifdef CONFIG_PCIE1 -+static struct pci_controller pcie1_hose; -+#endif -+ -+#ifdef CONFIG_PCIE2 -+static struct pci_controller pcie2_hose; -+#endif -+ -+#ifdef CONFIG_PCIE3 -+static struct pci_controller pcie3_hose; -+#endif -+ -+int first_free_busno = 0; -+ -+#ifdef CONFIG_PCI -+void pci_init_board(void) -+{ -+ volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); -+ uint devdisr = gur->devdisr; -+ uint io_sel = (gur->pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19; -+ uint host_agent = (gur->porbmsr & MPC85xx_PORBMSR_HA) >> 16; -+ -+ volatile ccsr_fsl_pci_t *pci; -+ struct pci_controller *hose; -+ int pcie_ep, pcie_configured; -+ struct pci_region *r; -+/* u32 temp32; */ -+ -+ debug(" pci_init_board: devdisr=%x, io_sel=%x, host_agent=%x\n", -+ devdisr, io_sel, host_agent); -+ -+ if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS)) -+ printf(" eTSEC2 is in sgmii mode.\n"); -+ if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS)) -+ printf(" eTSEC3 is in sgmii mode.\n"); -+ -+#ifdef CONFIG_PCIE2 -+ pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE2_ADDR; -+ hose = &pcie2_hose; -+ pcie_ep = (host_agent == 2) || (host_agent == 4) || -+ (host_agent == 6) || (host_agent == 0); -+ pcie_configured = (io_sel == 0x2) || (io_sel == 0xe); -+ r = hose->regions; -+ -+ if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE2)) { -+ printf("\n PCIE2 connected to ULI as %s (base addr %x)", -+ pcie_ep ? "End Point" : "Root Complex", -+ (uint)pci); -+ if (pci->pme_msg_det) { -+ pci->pme_msg_det = 0xffffffff; -+ debug(" with errors. Clearing. Now 0x%08x", -+ pci->pme_msg_det); -+ } -+ printf("\n"); -+ -+ /* inbound */ -+ r += fsl_pci_setup_inbound_windows(r); -+ -+ /* outbound memory */ -+ pci_set_region(r++, -+ CONFIG_SYS_PCIE2_MEM_BUS, -+ CONFIG_SYS_PCIE2_MEM_PHYS, -+ CONFIG_SYS_PCIE2_MEM_SIZE, -+ PCI_REGION_MEM); -+ -+ /* outbound io */ -+ pci_set_region(r++, -+ CONFIG_SYS_PCIE2_IO_BUS, -+ CONFIG_SYS_PCIE2_IO_PHYS, -+ CONFIG_SYS_PCIE2_IO_SIZE, -+ PCI_REGION_IO); -+ -+ hose->region_count = r - hose->regions; -+ hose->first_busno = first_free_busno; -+ pci_setup_indirect(hose, (int)&pci->cfg_addr, -+ (int)&pci->cfg_data); -+ -+ fsl_pci_init(hose); -+ first_free_busno = hose->last_busno+1; -+ printf(" PCIE2 on bus %02x - %02x\n", -+ hose->first_busno, hose->last_busno); -+ -+ /* -+ * The workaround doesn't work on p2020 because the location -+ * we try and read isn't valid on p2020, fix this later -+ */ -+#if 0 -+ /* -+ * Activate ULI1575 legacy chip by performing a fake -+ * memory access. Needed to make ULI RTC work. -+ * Device 1d has the first on-board memory BAR. -+ */ -+ -+ pci_hose_read_config_dword(hose, PCI_BDF(2, 0x1d, 0), -+ PCI_BASE_ADDRESS_1, &temp32); -+ if (temp32 >= CONFIG_SYS_PCIE3_MEM_BUS) { -+ void *p = pci_mem_to_virt(PCI_BDF(2, 0x1d, 0), -+ temp32, 4, 0); -+ debug(" uli1575 read to %p\n", p); -+ in_be32(p); -+ } -+#endif -+ } else { -+ printf(" PCIE2: disabled\n"); -+ } -+#else -+ gur->devdisr |= MPC85xx_DEVDISR_PCIE2; /* disable */ -+#endif -+ -+#ifdef CONFIG_PCIE3 -+ pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE3_ADDR; -+ hose = &pcie3_hose; -+ pcie_ep = (host_agent == 0) || (host_agent == 3) || -+ (host_agent == 5) || (host_agent == 6); -+ pcie_configured = (io_sel == 0x2) || (io_sel == 0x4); -+ r = hose->regions; -+ -+ if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE3)) { -+ printf("\n PCIE3 connected to Slot 1 as %s (base addr %x)", -+ pcie_ep ? "End Point" : "Root Complex", -+ (uint)pci); -+ if (pci->pme_msg_det) { -+ pci->pme_msg_det = 0xffffffff; -+ debug(" with errors. Clearing. Now 0x%08x", -+ pci->pme_msg_det); -+ } -+ printf("\n"); -+ -+ /* inbound */ -+ r += fsl_pci_setup_inbound_windows(r); -+ -+ /* outbound memory */ -+ pci_set_region(r++, -+ CONFIG_SYS_PCIE3_MEM_BUS, -+ CONFIG_SYS_PCIE3_MEM_PHYS, -+ CONFIG_SYS_PCIE3_MEM_SIZE, -+ PCI_REGION_MEM); -+ -+ /* outbound io */ -+ pci_set_region(r++, -+ CONFIG_SYS_PCIE3_IO_BUS, -+ CONFIG_SYS_PCIE3_IO_PHYS, -+ CONFIG_SYS_PCIE3_IO_SIZE, -+ PCI_REGION_IO); -+ -+ hose->region_count = r - hose->regions; -+ hose->first_busno = first_free_busno; -+ pci_setup_indirect(hose, (int)&pci->cfg_addr, -+ (int)&pci->cfg_data); -+ -+ fsl_pci_init(hose); -+ -+ first_free_busno = hose->last_busno+1; -+ printf(" PCIE3 on bus %02x - %02x\n", -+ hose->first_busno, hose->last_busno); -+ -+ } else { -+ printf(" PCIE3: disabled\n"); -+ } -+#else -+ gur->devdisr |= MPC85xx_DEVDISR_PCIE3; /* disable */ -+#endif -+ -+#ifdef CONFIG_PCIE1 -+ pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR; -+ hose = &pcie1_hose; -+ pcie_ep = (host_agent <= 1) || (host_agent == 4) || (host_agent == 5); -+ pcie_configured = (io_sel & 6) || (io_sel == 0xE) || (io_sel == 0xF); -+ r = hose->regions; -+ -+ if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)) { -+ printf("\n PCIE1 connected to Slot 2 as %s (base addr %x)", -+ pcie_ep ? "End Point" : "Root Complex", -+ (uint)pci); -+ if (pci->pme_msg_det) { -+ pci->pme_msg_det = 0xffffffff; -+ debug(" with errors. Clearing. Now 0x%08x", -+ pci->pme_msg_det); -+ } -+ printf("\n"); -+ -+ /* inbound */ -+ r += fsl_pci_setup_inbound_windows(r); -+ -+ /* outbound memory */ -+ pci_set_region(r++, -+ CONFIG_SYS_PCIE1_MEM_BUS, -+ CONFIG_SYS_PCIE1_MEM_PHYS, -+ CONFIG_SYS_PCIE1_MEM_SIZE, -+ PCI_REGION_MEM); -+ -+ /* outbound io */ -+ pci_set_region(r++, -+ CONFIG_SYS_PCIE1_IO_BUS, -+ CONFIG_SYS_PCIE1_IO_PHYS, -+ CONFIG_SYS_PCIE1_IO_SIZE, -+ PCI_REGION_IO); -+ -+ hose->region_count = r - hose->regions; -+ hose->first_busno = first_free_busno; -+ -+ pci_setup_indirect(hose, (int)&pci->cfg_addr, -+ (int)&pci->cfg_data); -+ -+ fsl_pci_init(hose); -+ -+ first_free_busno = hose->last_busno+1; -+ printf(" PCIE1 on bus %02x - %02x\n", -+ hose->first_busno, hose->last_busno); -+ -+ } else { -+ printf(" PCIE1: disabled\n"); -+ } -+#else -+ gur->devdisr |= MPC85xx_DEVDISR_PCIE; /* disable */ -+#endif -+} -+#endif -+ -+int board_early_init_r(void) -+{ -+ const unsigned int flashbase = CONFIG_SYS_FLASH_BASE; -+ const u8 flash_esel = 2; -+ -+ /* -+ * Remap Boot flash + PROMJET region to caching-inhibited -+ * so that flash can be erased properly. -+ */ -+ -+ /* Flush d-cache and invalidate i-cache of any FLASH data */ -+ flush_dcache(); -+ invalidate_icache(); -+ -+ /* invalidate existing TLB entry for flash + promjet */ -+ disable_tlb(flash_esel); -+ -+ set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS, -+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, -+ 0, flash_esel, BOOKE_PAGESZ_256M, 1); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_GET_CLK_FROM_ICS307 -+/* decode S[0-2] to Output Divider (OD) */ -+static unsigned char ics307_S_to_OD[] = { -+ 10, 2, 8, 4, 5, 7, 3, 6 -+}; -+ -+/* Calculate frequency being generated by ICS307-02 clock chip based upon -+ * the control bytes being programmed into it. */ -+/* XXX: This function should probably go into a common library */ -+static unsigned long -+ics307_clk_freq(unsigned char cw0, unsigned char cw1, unsigned char cw2) -+{ -+ const unsigned long InputFrequency = CONFIG_ICS307_REFCLK_HZ; -+ unsigned long VDW = ((cw1 << 1) & 0x1FE) + ((cw2 >> 7) & 1); -+ unsigned long RDW = cw2 & 0x7F; -+ unsigned long OD = ics307_S_to_OD[cw0 & 0x7]; -+ unsigned long freq; -+ -+ /* CLK1Frequency = InputFrequency * 2 * (VDW + 8) / ((RDW + 2) * OD) */ -+ -+ /* cw0: C1 C0 TTL F1 F0 S2 S1 S0 -+ * cw1: V8 V7 V6 V5 V4 V3 V2 V1 -+ * cw2: V0 R6 R5 R4 R3 R2 R1 R0 -+ * -+ * R6:R0 = Reference Divider Word (RDW) -+ * V8:V0 = VCO Divider Word (VDW) -+ * S2:S0 = Output Divider Select (OD) -+ * F1:F0 = Function of CLK2 Output -+ * TTL = duty cycle -+ * C1:C0 = internal load capacitance for cyrstal -+ */ -+ -+ /* Adding 1 to get a "nicely" rounded number, but this needs -+ * more tweaking to get a "properly" rounded number. */ -+ -+ freq = 1 + (InputFrequency * 2 * (VDW + 8) / ((RDW + 2) * OD)); -+ -+ debug("ICS307: CW[0-2]: %02X %02X %02X => %lu Hz\n", cw0, cw1, cw2, -+ freq); -+ return freq; -+} -+ -+unsigned long get_board_sys_clk(ulong dummy) -+{ -+ return gd->bus_clk; -+} -+ -+unsigned long get_board_ddr_clk(ulong dummy) -+{ -+ return gd->mem_clk; -+} -+ -+unsigned long -+calculate_board_sys_clk(ulong dummy) -+{ -+ ulong val; -+ val = ics307_clk_freq( -+ in8(PIXIS_BASE + PIXIS_VSYSCLK0), -+ in8(PIXIS_BASE + PIXIS_VSYSCLK1), -+ in8(PIXIS_BASE + PIXIS_VSYSCLK2)); -+ debug("sysclk val = %lu\n", val); -+ return val; -+} -+ -+unsigned long -+calculate_board_ddr_clk(ulong dummy) -+{ -+ ulong val; -+ val = ics307_clk_freq( -+ in8(PIXIS_BASE + PIXIS_VDDRCLK0), -+ in8(PIXIS_BASE + PIXIS_VDDRCLK1), -+ in8(PIXIS_BASE + PIXIS_VDDRCLK2)); -+ debug("ddrclk val = %lu\n", val); -+ return val; -+} -+#else -+unsigned long get_board_sys_clk(ulong dummy) -+{ -+ u8 i; -+ ulong val = 0; -+ -+ i = in8(PIXIS_BASE + PIXIS_SPD); -+ i &= 0x07; -+ -+ switch (i) { -+ case 0: -+ val = 33333333; -+ break; -+ case 1: -+ val = 40000000; -+ break; -+ case 2: -+ val = 50000000; -+ break; -+ case 3: -+ val = 66666666; -+ break; -+ case 4: -+ val = 83333333; -+ break; -+ case 5: -+ val = 100000000; -+ break; -+ case 6: -+ val = 133333333; -+ break; -+ case 7: -+ val = 166666666; -+ break; -+ } -+ -+ return val; -+} -+ -+unsigned long get_board_ddr_clk(ulong dummy) -+{ -+ u8 i; -+ ulong val = 0; -+ -+ i = in8(PIXIS_BASE + PIXIS_SPD); -+ i &= 0x38; -+ i >>= 3; -+ -+ switch (i) { -+ case 0: -+ val = 33333333; -+ break; -+ case 1: -+ val = 40000000; -+ break; -+ case 2: -+ val = 50000000; -+ break; -+ case 3: -+ val = 66666666; -+ break; -+ case 4: -+ val = 83333333; -+ break; -+ case 5: -+ val = 100000000; -+ break; -+ case 6: -+ val = 133333333; -+ break; -+ case 7: -+ val = 166666666; -+ break; -+ } -+ return val; -+} -+#endif -+ -+#ifdef CONFIG_TSEC_ENET -+int board_eth_init(bd_t *bis) -+{ -+ struct tsec_info_struct tsec_info[4]; -+ volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); -+ int num = 0; -+ -+#ifdef CONFIG_TSEC1 -+ SET_STD_TSEC_INFO(tsec_info[num], 1); -+ num++; -+#endif -+#ifdef CONFIG_TSEC2 -+ SET_STD_TSEC_INFO(tsec_info[num], 2); -+ if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS)) -+ tsec_info[num].flags |= TSEC_SGMII; -+ num++; -+#endif -+#ifdef CONFIG_TSEC3 -+ SET_STD_TSEC_INFO(tsec_info[num], 3); -+ if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS)) -+ tsec_info[num].flags |= TSEC_SGMII; -+ num++; -+#endif -+ -+ if (!num) { -+ printf("No TSECs initialized\n"); -+ -+ return 0; -+ } -+ -+#ifdef CONFIG_FSL_SGMII_RISER -+ fsl_sgmii_riser_init(tsec_info, num); -+#endif -+ -+ tsec_eth_init(bis, tsec_info, num); -+ -+ return 0; -+} -+#endif -+ -+#if defined(CONFIG_OF_BOARD_SETUP) -+void ft_board_setup(void *blob, bd_t *bd) -+{ -+ phys_addr_t base; -+ phys_size_t size; -+ -+ ft_cpu_setup(blob, bd); -+ -+ base = getenv_bootm_low(); -+ size = getenv_bootm_size(); -+ -+ fdt_fixup_memory(blob, (u64)base, (u64)size); -+ -+#ifdef CONFIG_PCIE3 -+ ft_fsl_pci_setup(blob, "pci0", &pcie3_hose); -+#endif -+#ifdef CONFIG_PCIE2 -+ ft_fsl_pci_setup(blob, "pci1", &pcie2_hose); -+#endif -+#ifdef CONFIG_PCIE1 -+ ft_fsl_pci_setup(blob, "pci2", &pcie1_hose); -+#endif -+#ifdef CONFIG_FSL_SGMII_RISER -+ fsl_sgmii_riser_fdt_fixup(blob); -+#endif -+} -+#endif -+ -+#ifdef CONFIG_MP -+void board_lmb_reserve(struct lmb *lmb) -+{ -+ cpu_mp_lmb_reserve(lmb); -+} -+#endif -diff --git a/board/freescale/p2020ds/tlb.c b/board/freescale/p2020ds/tlb.c -new file mode 100644 -index 0000000..b2e562a ---- /dev/null -+++ b/board/freescale/p2020ds/tlb.c -@@ -0,0 +1,95 @@ -+/* -+ * Copyright 2008-2009 Freescale Semiconductor, Inc. -+ * -+ * (C) Copyright 2000 -+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+#include -+ -+struct fsl_e_tlb_entry tlb_table[] = { -+ /* TLB 0 - for temp stack in cache */ -+ SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR, CONFIG_SYS_INIT_RAM_ADDR, -+ MAS3_SX|MAS3_SW|MAS3_SR, 0, -+ 0, 0, BOOKE_PAGESZ_4K, 0), -+ SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024, -+ CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024, -+ MAS3_SX|MAS3_SW|MAS3_SR, 0, -+ 0, 0, BOOKE_PAGESZ_4K, 0), -+ SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024, -+ CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024, -+ MAS3_SX|MAS3_SW|MAS3_SR, 0, -+ 0, 0, BOOKE_PAGESZ_4K, 0), -+ SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024, -+ CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024, -+ MAS3_SX|MAS3_SW|MAS3_SR, 0, -+ 0, 0, BOOKE_PAGESZ_4K, 0), -+ -+ /* TLB 1 */ -+ /* *I*** - Covers boot page */ -+ SET_TLB_ENTRY(1, 0xfffff000, 0xfffff000, -+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I, -+ 0, 0, BOOKE_PAGESZ_4K, 1), -+ -+ /* *I*G* - CCSRBAR */ -+ SET_TLB_ENTRY(1, CONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS, -+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, -+ 0, 1, BOOKE_PAGESZ_1M, 1), -+ -+ /* W**G* - Flash/promjet, localbus */ -+ /* This will be changed to *I*G* after relocation to RAM. */ -+ SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE_PHYS, -+ MAS3_SX|MAS3_SR, MAS2_W|MAS2_G, -+ 0, 2, BOOKE_PAGESZ_256M, 1), -+ -+ /* *I*G* - PCI */ -+ SET_TLB_ENTRY(1, CONFIG_SYS_PCIE3_MEM_VIRT, CONFIG_SYS_PCIE3_MEM_PHYS, -+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, -+ 0, 3, BOOKE_PAGESZ_1G, 1), -+ -+ /* *I*G* - PCI */ -+ SET_TLB_ENTRY(1, CONFIG_SYS_PCIE3_MEM_VIRT + 0x40000000, -+ CONFIG_SYS_PCIE3_MEM_PHYS + 0x40000000, -+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, -+ 0, 4, BOOKE_PAGESZ_256M, 1), -+ -+ SET_TLB_ENTRY(1, CONFIG_SYS_PCIE3_MEM_VIRT + 0x50000000, -+ CONFIG_SYS_PCIE3_MEM_PHYS + 0x50000000, -+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, -+ 0, 5, BOOKE_PAGESZ_256M, 1), -+ -+ /* *I*G* - PCI I/O */ -+ SET_TLB_ENTRY(1, CONFIG_SYS_PCIE3_IO_VIRT, CONFIG_SYS_PCIE3_IO_PHYS, -+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, -+ 0, 6, BOOKE_PAGESZ_256K, 1), -+ -+ /* *I*G - NAND */ -+ SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE_PHYS, -+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, -+ 0, 7, BOOKE_PAGESZ_1M, 1), -+ -+ SET_TLB_ENTRY(1, PIXIS_BASE, PIXIS_BASE_PHYS, -+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, -+ 0, 8, BOOKE_PAGESZ_4K, 1), -+}; -+ -+int num_tlb_entries = ARRAY_SIZE(tlb_table); -diff --git a/board/freescale/p2020ds/u-boot.lds b/board/freescale/p2020ds/u-boot.lds -new file mode 100644 -index 0000000..d6e22a7 ---- /dev/null -+++ b/board/freescale/p2020ds/u-boot.lds -@@ -0,0 +1,143 @@ -+/* -+ * Copyright 2007-2009 Freescale Semiconductor, Inc. -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+OUTPUT_ARCH(powerpc) -+/* Do we need any of these for elf? -+ __DYNAMIC = 0; */ -+PHDRS -+{ -+ text PT_LOAD; -+ bss PT_LOAD; -+} -+ -+SECTIONS -+{ -+ /* Read-only sections, merged into text segment: */ -+ . = + SIZEOF_HEADERS; -+ .interp : { *(.interp) } -+ .hash : { *(.hash) } -+ .dynsym : { *(.dynsym) } -+ .dynstr : { *(.dynstr) } -+ .rel.text : { *(.rel.text) } -+ .rela.text : { *(.rela.text) } -+ .rel.data : { *(.rel.data) } -+ .rela.data : { *(.rela.data) } -+ .rel.rodata : { *(.rel.rodata) } -+ .rela.rodata : { *(.rela.rodata) } -+ .rel.got : { *(.rel.got) } -+ .rela.got : { *(.rela.got) } -+ .rel.ctors : { *(.rel.ctors) } -+ .rela.ctors : { *(.rela.ctors) } -+ .rel.dtors : { *(.rel.dtors) } -+ .rela.dtors : { *(.rela.dtors) } -+ .rel.bss : { *(.rel.bss) } -+ .rela.bss : { *(.rela.bss) } -+ .rel.plt : { *(.rel.plt) } -+ .rela.plt : { *(.rela.plt) } -+ .init : { *(.init) } -+ .plt : { *(.plt) } -+ .text : -+ { -+ *(.text) -+ *(.fixup) -+ *(.got1) -+ } :text -+ _etext = .; -+ PROVIDE (etext = .); -+ .rodata : -+ { -+ *(.eh_frame) -+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) -+ } :text -+ .fini : { *(.fini) } =0 -+ .ctors : { *(.ctors) } -+ .dtors : { *(.dtors) } -+ -+ /* Read-write section, merged into data segment: */ -+ . = (. + 0x00FF) & 0xFFFFFF00; -+ _erotext = .; -+ PROVIDE (erotext = .); -+ .reloc : -+ { -+ *(.got) -+ _GOT2_TABLE_ = .; -+ *(.got2) -+ _FIXUP_TABLE_ = .; -+ *(.fixup) -+ } -+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2; -+ __fixup_entries = (. - _FIXUP_TABLE_) >> 2; -+ -+ .data : -+ { -+ *(.data) -+ *(.data1) -+ *(.sdata) -+ *(.sdata2) -+ *(.dynamic) -+ CONSTRUCTORS -+ } -+ _edata = .; -+ PROVIDE (edata = .); -+ -+ . = .; -+ __u_boot_cmd_start = .; -+ .u_boot_cmd : { *(.u_boot_cmd) } -+ __u_boot_cmd_end = .; -+ -+ . = .; -+ __start___ex_table = .; -+ __ex_table : { *(__ex_table) } -+ __stop___ex_table = .; -+ -+ . = ALIGN(256); -+ __init_begin = .; -+ .text.init : { *(.text.init) } -+ .data.init : { *(.data.init) } -+ . = ALIGN(256); -+ __init_end = .; -+ -+ .bootpg ADDR(.text) + 0x7f000 : -+ { -+ cpu/mpc85xx/start.o (.bootpg) -+ } :text = 0xffff -+ -+ .resetvec ADDR(.text) + 0x7fffc : -+ { -+ *(.resetvec) -+ } :text = 0xffff -+ -+ . = ADDR(.text) + 0x80000; -+ -+ __bss_start = .; -+ .bss (NOLOAD) : -+ { -+ *(.sbss) *(.scommon) -+ *(.dynbss) -+ *(.bss) -+ *(COMMON) -+ } :bss -+ -+ . = ALIGN(4); -+ _end = . ; -+ PROVIDE (end = .); -+} -diff --git a/board/g2000/g2000.c b/board/g2000/g2000.c -index b35038d..218f1be 100644 ---- a/board/g2000/g2000.c -+++ b/board/g2000/g2000.c -@@ -186,7 +186,7 @@ int do_dumpebc(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - dumpebc, 1, 1, do_dumpebc, - "Dump all EBC registers", -- NULL -+ "" - ); - - -@@ -208,7 +208,7 @@ int do_dumpdcr(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - dumpdcr, 1, 1, do_dumpdcr, - "Dump all DCR registers", -- NULL -+ "" - ); - - -@@ -272,6 +272,6 @@ int do_dumpspr(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - dumpspr, 1, 1, do_dumpspr, - "Dump all SPR registers", -- NULL -+ "" - ); - #endif -diff --git a/board/gcplus/u-boot.lds b/board/gcplus/u-boot.lds -deleted file mode 100644 -index 65b8167..0000000 ---- a/board/gcplus/u-boot.lds -+++ /dev/null -@@ -1,58 +0,0 @@ --/* -- * (C) Copyright 2000 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * 2003 (c) MontaVista Software, Inc. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/sa1100/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/hymod/bsp.c b/board/hymod/bsp.c -index 092d368..262070f 100644 ---- a/board/hymod/bsp.c -+++ b/board/hymod/bsp.c -@@ -297,7 +297,7 @@ U_BOOT_CMD( - "fpga info\n" - " - print information about the Hymod FPGA, namely the\n" - " memory addresses at which the four FPGA local bus\n" -- " address spaces appear in the physical address space\n" -+ " address spaces appear in the physical address space" - ); - /* ------------------------------------------------------------------------- */ - int -@@ -340,7 +340,7 @@ U_BOOT_CMD( - "[type]\n" - " - write zeroes into the EEPROM on the board of type `type'\n" - " (`type' is either `main' or `mezz' - default `main')\n" -- " Note: the EEPROM write enable jumper must be installed\n" -+ " Note: the EEPROM write enable jumper must be installed" - ); - - /* ------------------------------------------------------------------------- */ -diff --git a/board/impa7/u-boot.lds b/board/impa7/u-boot.lds -deleted file mode 100644 -index 8c9f624..0000000 ---- a/board/impa7/u-boot.lds -+++ /dev/null -@@ -1,56 +0,0 @@ --/* -- * (C) Copyright 2000 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm720t/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/imx31_litekit/u-boot.lds b/board/imx31_litekit/u-boot.lds -deleted file mode 100644 -index 19d40da..0000000 ---- a/board/imx31_litekit/u-boot.lds -+++ /dev/null -@@ -1,59 +0,0 @@ --/* -- * January 2004 - Changed to support H4 device -- * Copyright (c) 2004 Texas Instruments -- * -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm1136/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/imx31_phycore/u-boot.lds b/board/imx31_phycore/u-boot.lds -deleted file mode 100644 -index 19d40da..0000000 ---- a/board/imx31_phycore/u-boot.lds -+++ /dev/null -@@ -1,59 +0,0 @@ --/* -- * January 2004 - Changed to support H4 device -- * Copyright (c) 2004 Texas Instruments -- * -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm1136/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/inka4x0/inkadiag.c b/board/inka4x0/inkadiag.c -index 12c0a85..3761ef6 100644 ---- a/board/inka4x0/inkadiag.c -+++ b/board/inka4x0/inkadiag.c -@@ -439,14 +439,14 @@ static int do_inkadiag_help(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - - cmd_tbl_t cmd_inkadiag_sub[] = { - U_BOOT_CMD_MKENT(io, 1, 1, do_inkadiag_io, "read digital input", -- " [value] - get or set specified signal\n"), -+ " [value] - get or set specified signal"), - U_BOOT_CMD_MKENT(serial, 4, 1, do_inkadiag_serial, "test serial port", - " - test uart num [0..11] in mode\n" -- "and baudrate with msg\n"), -+ "and baudrate with msg"), - U_BOOT_CMD_MKENT(buzzer, 2, 1, do_inkadiag_buzzer, "activate buzzer", -- " - turn buzzer on for period ms with freq hz\n"), -+ " - turn buzzer on for period ms with freq hz"), - U_BOOT_CMD_MKENT(help, 4, 1, do_inkadiag_help, "get help", -- "[command] - get help for command\n"), -+ "[command] - get help for command"), - }; - - static int do_inkadiag_help(cmd_tbl_t *cmdtp, int flag, -@@ -483,7 +483,7 @@ U_BOOT_CMD(inkadiag, 6, 1, do_inkadiag, - "inkadiag - inka diagnosis\n", - "[inkadiag what ...]\n" - " - perform a diagnosis on inka hardware\n" -- "'inkadiag' performs hardware tests.\n\n"); -+ "'inkadiag' performs hardware tests."); - - /* Relocate the command table function pointers when running in RAM */ - int inkadiag_init_r (void) { -diff --git a/board/innokom/u-boot.lds b/board/innokom/u-boot.lds -deleted file mode 100644 -index a077bc5..0000000 ---- a/board/innokom/u-boot.lds -+++ /dev/null -@@ -1,56 +0,0 @@ --/* -- * (C) Copyright 2000 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/pxa/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/ixdp425/u-boot.lds b/board/ixdp425/u-boot.lds -deleted file mode 100644 -index 7c287e1..0000000 ---- a/board/ixdp425/u-boot.lds -+++ /dev/null -@@ -1,56 +0,0 @@ --/* -- * (C) Copyright 2000 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-bigarm", "elf32-bigarm", "elf32-bigarm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/ixp/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/kb9202/u-boot.lds b/board/kb9202/u-boot.lds -deleted file mode 100644 -index 12aca2e..0000000 ---- a/board/kb9202/u-boot.lds -+++ /dev/null -@@ -1,56 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/ --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm920t/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/keymile/common/keymile_hdlc_enet.c b/board/keymile/common/keymile_hdlc_enet.c -index 5797880..2e913ad 100644 ---- a/board/keymile/common/keymile_hdlc_enet.c -+++ b/board/keymile/common/keymile_hdlc_enet.c -@@ -591,7 +591,7 @@ int hdlc_enet_stest(struct cmd_tbl_s *a, int b, int c, char **d) - U_BOOT_CMD( - stest, 1, 1, hdlc_enet_stest, - "simple send test for hdlc_enet", -- "no arguments\n" -+ "" - ); - /* simple receive test routine */ - int hdlc_enet_rtest(struct cmd_tbl_s *a, int b, int c, char **d) -@@ -613,7 +613,7 @@ int hdlc_enet_rtest(struct cmd_tbl_s *a, int b, int c, char **d) - U_BOOT_CMD( - rtest, 1, 1, hdlc_enet_rtest, - "simple receive test for hdlc_enet", -- "no arguments\n" -+ "" - ); - #endif - -diff --git a/board/lart/u-boot.lds b/board/lart/u-boot.lds -deleted file mode 100644 -index 13b7bb7..0000000 ---- a/board/lart/u-boot.lds -+++ /dev/null -@@ -1,56 +0,0 @@ --/* -- * (C) Copyright 2000 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/sa1100/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/logodl/u-boot.lds b/board/logodl/u-boot.lds -deleted file mode 100644 -index a077bc5..0000000 ---- a/board/logodl/u-boot.lds -+++ /dev/null -@@ -1,56 +0,0 @@ --/* -- * (C) Copyright 2000 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/pxa/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/lpc2292sodimm/u-boot.lds b/board/lpc2292sodimm/u-boot.lds -deleted file mode 100644 -index cb5a3ba..0000000 ---- a/board/lpc2292sodimm/u-boot.lds -+++ /dev/null -@@ -1,55 +0,0 @@ --/* -- * (C) Copyright 2000 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm720t/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/lpd7a40x/u-boot.lds b/board/lpd7a40x/u-boot.lds -deleted file mode 100644 -index 0914be7..0000000 ---- a/board/lpd7a40x/u-boot.lds -+++ /dev/null -@@ -1,57 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/ --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/lh7a40x/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/lubbock/u-boot.lds b/board/lubbock/u-boot.lds -deleted file mode 100644 -index a077bc5..0000000 ---- a/board/lubbock/u-boot.lds -+++ /dev/null -@@ -1,56 +0,0 @@ --/* -- * (C) Copyright 2000 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/pxa/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/lwmon/lwmon.c b/board/lwmon/lwmon.c -index 1b665a9..75b3209 100644 ---- a/board/lwmon/lwmon.c -+++ b/board/lwmon/lwmon.c -@@ -853,7 +853,7 @@ U_BOOT_CMD( - pic, 4, 1, do_pic, - "read and write PIC registers", - "read reg - read PIC register `reg'\n" -- "pic write reg val - write value `val' to PIC register `reg'\n" -+ "pic write reg val - write value `val' to PIC register `reg'" - ); - - /*********************************************************************** -@@ -911,7 +911,7 @@ int do_kbd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - kbd, 1, 1, do_kbd, - "read keyboard status", -- NULL -+ "" - ); - - /* Read and set LSB switch */ -@@ -985,7 +985,7 @@ U_BOOT_CMD( - "check and set LSB switch", - "on - switch LSB on\n" - "lsb off - switch LSB off\n" -- "lsb - print current setting\n" -+ "lsb - print current setting" - ); - - #endif -diff --git a/board/lwmon5/kbd.c b/board/lwmon5/kbd.c -index bafd39c..be1a1df 100644 ---- a/board/lwmon5/kbd.c -+++ b/board/lwmon5/kbd.c -@@ -433,7 +433,7 @@ int do_kbd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - kbd, 1, 1, do_kbd, - "read keyboard status", -- NULL -+ "" - ); - - /*----------------------------- Utilities -----------------------------*/ -diff --git a/board/lwmon5/lwmon5.c b/board/lwmon5/lwmon5.c -index 4c04b98..9b76e76 100644 ---- a/board/lwmon5/lwmon5.c -+++ b/board/lwmon5/lwmon5.c -@@ -487,7 +487,7 @@ int do_eeprom_wp(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - eepromwp, 2, 0, do_eeprom_wp, - "eeprom write protect off/on", -- " - enable (on) or disable (off) I2C EEPROM write protect\n" -+ " - enable (on) or disable (off) I2C EEPROM write protect" - ); - - #if defined(CONFIG_VIDEO) -diff --git a/board/m501sk/m501sk.c b/board/m501sk/m501sk.c -index dc5b786..1e6a605 100644 ---- a/board/m501sk/m501sk.c -+++ b/board/m501sk/m501sk.c -@@ -127,7 +127,7 @@ int board_init(void) - m501sk_gpio_init(); - - /* Do interrupt init here, because flash needs timers */ -- interrupt_init(); -+ timer_init(); - flash_init(); - - return 0; -diff --git a/board/m501sk/u-boot.lds b/board/m501sk/u-boot.lds -deleted file mode 100644 -index f674bf6..0000000 ---- a/board/m501sk/u-boot.lds -+++ /dev/null -@@ -1,55 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm920t/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/micronas/vct/smc_eeprom.c b/board/micronas/vct/smc_eeprom.c -index 2bc7ad4..6587f13 100644 ---- a/board/micronas/vct/smc_eeprom.c -+++ b/board/micronas/vct/smc_eeprom.c -@@ -384,11 +384,11 @@ static int do_eeprom_save_mac(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[] - } - - U_BOOT_CMD(smcee, 1, 0, do_eeprom_erase_all, -- "smcee - Erase content of SMC EEPROM\n",); -+ "smcee - Erase content of SMC EEPROM",); - - U_BOOT_CMD(smced, 1, 0, do_eeprom_dump, -- "smced - Dump content of SMC EEPROM\n",); -+ "smced - Dump content of SMC EEPROM",); - - U_BOOT_CMD(smcew, 2, 0, do_eeprom_save_mac, - "smcew - Write MAC address to SMC EEPROM\n", -- "aa:bb:cc:dd:ee:ff new mac address\n"); -+ "aa:bb:cc:dd:ee:ff new mac address"); -diff --git a/board/modnet50/u-boot.lds b/board/modnet50/u-boot.lds -deleted file mode 100644 -index b72e126..0000000 ---- a/board/modnet50/u-boot.lds -+++ /dev/null -@@ -1,69 +0,0 @@ --/* -- * (C) Copyright 2000-2004 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm720t/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; -- /* Stabs debugging sections. */ -- .stab 0 : { *(.stab) } -- .stabstr 0 : { *(.stabstr) } -- .stab.excl 0 : { *(.stab.excl) } -- .stab.exclstr 0 : { *(.stab.exclstr) } -- .stab.index 0 : { *(.stab.index) } -- .stab.indexstr 0 : { *(.stab.indexstr) } -- .comment 0 : { *(.comment) } -- .debug_abbrev 0 : { *(.debug_abbrev) } -- .debug_info 0 : { *(.debug_info) } -- .debug_line 0 : { *(.debug_line) } -- .debug_pubnames 0 : { *(.debug_pubnames) } -- .debug_aranges 0 : { *(.debug_aranges) } --} -diff --git a/board/mp2usb/u-boot.lds b/board/mp2usb/u-boot.lds -deleted file mode 100644 -index 12aca2e..0000000 ---- a/board/mp2usb/u-boot.lds -+++ /dev/null -@@ -1,56 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/ --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm920t/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/mpl/mip405/cmd_mip405.c b/board/mpl/mip405/cmd_mip405.c -index dc13804..cd93a7c 100644 ---- a/board/mpl/mip405/cmd_mip405.c -+++ b/board/mpl/mip405/cmd_mip405.c -@@ -60,7 +60,7 @@ U_BOOT_CMD( - "mip405 flash mps - updates U-Boot with image from MPS\n" - "mip405 info - displays board information\n" - "mip405 led - switches LED on (on=1) or off (on=0)\n" -- "mip405 mem [cnt] - Memory Test -times, = -1 loop forever\n" -+ "mip405 mem [cnt] - Memory Test -times, = -1 loop forever" - ); - - /* ------------------------------------------------------------------------- */ -diff --git a/board/mpl/pati/cmd_pati.c b/board/mpl/pati/cmd_pati.c -index 95bfdcc..0682323 100644 ---- a/board/mpl/pati/cmd_pati.c -+++ b/board/mpl/pati/cmd_pati.c -@@ -443,7 +443,7 @@ U_BOOT_CMD( - " era - erase PCI EEPROM (write all word to 0xffff)\n" - " reload- Reload PCI Bridge with EEPROM Values\n" - " NOTE: must start on word boundary\n" -- " and must be even byte values\n" -+ " and must be even byte values" - ); - - /* ------------------------------------------------------------------------- */ -diff --git a/board/mpl/pip405/cmd_pip405.c b/board/mpl/pip405/cmd_pip405.c -index ad5e0a1..6bbae89 100644 ---- a/board/mpl/pip405/cmd_pip405.c -+++ b/board/mpl/pip405/cmd_pip405.c -@@ -63,7 +63,7 @@ U_BOOT_CMD( - "PIP405 specific Cmds", - "flash mem [SrcAddr] - updates U-Boot with image in memory\n" - "pip405 flash floppy [SrcAddr] - updates U-Boot with image from floppy\n" -- "pip405 flash mps - updates U-Boot with image from MPS\n" -+ "pip405 flash mps - updates U-Boot with image from MPS" - ); - - /* ------------------------------------------------------------------------- */ -diff --git a/board/mpl/vcma9/cmd_vcma9.c b/board/mpl/vcma9/cmd_vcma9.c -index cbe7fe2..0160774 100644 ---- a/board/mpl/vcma9/cmd_vcma9.c -+++ b/board/mpl/vcma9/cmd_vcma9.c -@@ -174,5 +174,5 @@ int do_vcma9(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - vcma9, 6, 1, do_vcma9, - "VCMA9 specific commands", -- "flash mem [SrcAddr]\n - updates U-Boot with image in memory\n" -+ "flash mem [SrcAddr]\n - updates U-Boot with image in memory" - ); -diff --git a/board/mpl/vcma9/u-boot.lds b/board/mpl/vcma9/u-boot.lds -deleted file mode 100644 -index b8cacf1..0000000 ---- a/board/mpl/vcma9/u-boot.lds -+++ /dev/null -@@ -1,57 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/ --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm920t/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/mx1ads/u-boot.lds b/board/mx1ads/u-boot.lds -deleted file mode 100644 -index 1c710cb..0000000 ---- a/board/mx1ads/u-boot.lds -+++ /dev/null -@@ -1,58 +0,0 @@ --/* -- * board/mx1ads/u-boot.lds -- * -- * (c) Copyright 2004 -- * Techware Information Technology, Inc. -- * http://www.techware.com.tw/ -- * -- * Ming-Len Wu -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm920t/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/mx1fs2/u-boot.lds b/board/mx1fs2/u-boot.lds -deleted file mode 100644 -index d912d93..0000000 ---- a/board/mx1fs2/u-boot.lds -+++ /dev/null -@@ -1,57 +0,0 @@ --/* -- * (C) Copyright 2000-2004 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- * -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm920t/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/netstar/netstar.c b/board/netstar/netstar.c -index ee4f2cd..ffd60bf 100644 ---- a/board/netstar/netstar.c -+++ b/board/netstar/netstar.c -@@ -48,7 +48,7 @@ int dram_init(void) - /* Take the Ethernet controller out of reset and wait - * for the EEPROM load to complete. */ - *((volatile unsigned short *) GPIO_DATA_OUTPUT_REG) |= 0x80; -- udelay(10); /* doesn't work before interrupt_init call */ -+ udelay(10); /* doesn't work before timer_init call */ - *((volatile unsigned short *) GPIO_DATA_OUTPUT_REG) &= ~0x80; - udelay(500); - -diff --git a/board/netstar/u-boot.lds b/board/netstar/u-boot.lds -deleted file mode 100644 -index 65a23a7..0000000 ---- a/board/netstar/u-boot.lds -+++ /dev/null -@@ -1,55 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm925t/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/ns9750dev/u-boot.lds b/board/ns9750dev/u-boot.lds -deleted file mode 100644 -index b4823f7..0000000 ---- a/board/ns9750dev/u-boot.lds -+++ /dev/null -@@ -1,59 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/ --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm926ejs/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = . ; -- --} -diff --git a/board/omap1510inn/u-boot.lds b/board/omap1510inn/u-boot.lds -deleted file mode 100644 -index eba0a3e..0000000 ---- a/board/omap1510inn/u-boot.lds -+++ /dev/null -@@ -1,57 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/ --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm925t/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/omap1610inn/u-boot.lds b/board/omap1610inn/u-boot.lds -deleted file mode 100644 -index e50b8d4..0000000 ---- a/board/omap1610inn/u-boot.lds -+++ /dev/null -@@ -1,52 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- . = ALIGN(4); -- .text : -- { -- cpu/arm926ejs/start.o (.text) -- *(.text) -- } -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- . = ALIGN(4); -- .data : { *(.data) } -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/omap2420h4/u-boot.lds b/board/omap2420h4/u-boot.lds -deleted file mode 100644 -index 22d93b4..0000000 ---- a/board/omap2420h4/u-boot.lds -+++ /dev/null -@@ -1,59 +0,0 @@ --/* -- * January 2004 - Changed to support H4 device -- * Copyright (c) 2004 Texas Instruments -- * -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm1136/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/omap3/beagle/beagle.c b/board/omap3/beagle/beagle.c -index 7eb70ee..d268e18 100644 ---- a/board/omap3/beagle/beagle.c -+++ b/board/omap3/beagle/beagle.c -@@ -33,6 +33,7 @@ - #include - #include - #include -+#include - #include - #include "beagle.h" - -@@ -57,7 +58,7 @@ int board_init(void) - - /* - * Routine: beagle_get_revision -- * Description: Return revision of the BeagleBoard this code is running on. -+ * Description: Return the revision of the BeagleBoard this code is running on. - * If it is a revision Ax/Bx board, this function returns 0, - * on a revision C board you will get a 1. - */ -@@ -74,22 +75,25 @@ int beagle_get_revision(void) - */ - void beagle_identify(void) - { -- gpio_t *gpio6_base = (gpio_t *)OMAP34XX_GPIO6_BASE; -- -- /* Configure GPIO 171 as input */ -- writel(readl(&gpio6_base->oe) | GPIO11, &gpio6_base->oe); -- -- /* Get value of GPIO 171 */ -- beagle_revision_c = readl(&gpio6_base->datain) & BOARD_REVISION_MASK; -+ beagle_revision_c = 0; -+ if (!omap_request_gpio(171)) { -+ unsigned int val; -+ -+ omap_set_gpio_direction(171, 1); -+ val = omap_get_gpio_datain(171); -+ omap_free_gpio(171); -+ -+ if (val) -+ beagle_revision_c = 0; -+ else -+ beagle_revision_c = 1; -+ } - - printf("Board revision "); -- if (beagle_revision_c) { -- printf("Ax/Bx\n"); -- beagle_revision_c = 0; -- } else { -+ if (beagle_revision_c) - printf("C\n"); -- beagle_revision_c = 1; -- } -+ else -+ printf("Ax/Bx\n"); - } - - /* -diff --git a/board/omap3/beagle/beagle.h b/board/omap3/beagle/beagle.h -index 324ec66..3a0f907 100644 ---- a/board/omap3/beagle/beagle.h -+++ b/board/omap3/beagle/beagle.h -@@ -371,7 +371,7 @@ const omap3_sysinfo sysinfo = { - MUX_VAL(CP(D2D_MBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_mbusflag*/\ - MUX_VAL(CP(D2D_SBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_sbusflag*/\ - MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /*sdrc_cke0*/\ -- MUX_VAL(CP(SDRC_CKE1), (IDIS | PTD | DIS | M7)) /*sdrc_cke1*/ -+ MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /*sdrc_cke1*/ - - #define MUX_BEAGLE_C() \ - MUX_VAL(CP(MCBSP3_DX), (IEN | PTD | DIS | M4)) /*GPIO_140*/\ -diff --git a/board/omap3/beagle/u-boot.lds b/board/omap3/beagle/u-boot.lds -deleted file mode 100644 -index 3af04a2..0000000 ---- a/board/omap3/beagle/u-boot.lds -+++ /dev/null -@@ -1,63 +0,0 @@ --/* -- * January 2004 - Changed to support H4 device -- * Copyright (c) 2004 Texas Instruments -- * -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm_cortexa8/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } -- __exidx_start = .; -- .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } -- __exidx_end = .; -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss : { *(.bss) } -- _end = .; --} -diff --git a/board/omap3/common/Makefile b/board/omap3/common/Makefile -index 7b892fa..b8a0b14 100644 ---- a/board/omap3/common/Makefile -+++ b/board/omap3/common/Makefile -@@ -33,6 +33,7 @@ COBJS-$(CONFIG_OMAP3_BEAGLE) += power.o - COBJS-$(CONFIG_OMAP3_OVERO) += power.o - COBJS-$(CONFIG_OMAP3_PANDORA) += power.o - COBJS-$(CONFIG_OMAP3_ZOOM1) += power.o -+COBJS-$(CONFIG_OMAP3_ZOOM2) += power.o - - COBJS := $(COBJS-y) - SRCS := $(COBJS:.o=.c) -diff --git a/board/omap3/evm/u-boot.lds b/board/omap3/evm/u-boot.lds -deleted file mode 100644 -index 3af04a2..0000000 ---- a/board/omap3/evm/u-boot.lds -+++ /dev/null -@@ -1,63 +0,0 @@ --/* -- * January 2004 - Changed to support H4 device -- * Copyright (c) 2004 Texas Instruments -- * -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm_cortexa8/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } -- __exidx_start = .; -- .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } -- __exidx_end = .; -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss : { *(.bss) } -- _end = .; --} -diff --git a/board/omap3/overo/overo.h b/board/omap3/overo/overo.h -index b595f6a..0b59120 100644 ---- a/board/omap3/overo/overo.h -+++ b/board/omap3/overo/overo.h -@@ -376,6 +376,6 @@ const omap3_sysinfo sysinfo = { - MUX_VAL(CP(D2D_MBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_mbusflag*/\ - MUX_VAL(CP(D2D_SBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_sbusflag*/\ - MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /*sdrc_cke0*/\ -- MUX_VAL(CP(SDRC_CKE1), (IDIS | PTD | DIS | M7)) /*sdrc_cke1*/ -+ MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /*sdrc_cke1*/ - - #endif -diff --git a/board/omap3/overo/u-boot.lds b/board/omap3/overo/u-boot.lds -deleted file mode 100644 -index 3af04a2..0000000 ---- a/board/omap3/overo/u-boot.lds -+++ /dev/null -@@ -1,63 +0,0 @@ --/* -- * January 2004 - Changed to support H4 device -- * Copyright (c) 2004 Texas Instruments -- * -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm_cortexa8/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } -- __exidx_start = .; -- .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } -- __exidx_end = .; -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss : { *(.bss) } -- _end = .; --} -diff --git a/board/omap3/pandora/u-boot.lds b/board/omap3/pandora/u-boot.lds -deleted file mode 100644 -index 3af04a2..0000000 ---- a/board/omap3/pandora/u-boot.lds -+++ /dev/null -@@ -1,63 +0,0 @@ --/* -- * January 2004 - Changed to support H4 device -- * Copyright (c) 2004 Texas Instruments -- * -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm_cortexa8/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } -- __exidx_start = .; -- .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } -- __exidx_end = .; -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss : { *(.bss) } -- _end = .; --} -diff --git a/board/omap3/zoom1/u-boot.lds b/board/omap3/zoom1/u-boot.lds -deleted file mode 100644 -index a49f572..0000000 ---- a/board/omap3/zoom1/u-boot.lds -+++ /dev/null -@@ -1,63 +0,0 @@ --/* -- * January 2004 - Changed to support H4 device -- * Copyright (c) 2004-2008 Texas Instruments -- * -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm_cortexa8/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } -- __exidx_start = .; -- .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } -- __exidx_end = .; -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss : { *(.bss) } -- _end = .; --} -diff --git a/board/omap3/zoom2/Makefile b/board/omap3/zoom2/Makefile -new file mode 100644 -index 0000000..2feafbe ---- /dev/null -+++ b/board/omap3/zoom2/Makefile -@@ -0,0 +1,53 @@ -+# -+# (C) Copyright 2000, 2001, 2002 -+# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -+# -+# See file CREDITS for list of people who contributed to this -+# project. -+# -+# This program is free software; you can redistribute it and/or -+# modify it under the terms of the GNU General Public License as -+# published by the Free Software Foundation; either version 2 of -+# the License, or (at your option) any later version. -+# -+# This program is distributed in the hope that it will be useful, -+# but WITHOUT ANY WARRANTY; without even the implied warranty of -+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+# GNU General Public License for more details. -+# -+# You should have received a copy of the GNU General Public License -+# along with this program; if not, write to the Free Software -+# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+# MA 02111-1307 USA -+# -+ -+include $(TOPDIR)/config.mk -+ -+LIB = $(obj)lib$(BOARD).a -+ -+COBJS-y := $(BOARD).o -+COBJS-y += debug_board.o -+COBJS-y += zoom2_serial.o -+COBJS-$(CONFIG_STATUS_LED) += led.o -+ -+COBJS := $(sort $(COBJS-y)) -+SRCS := $(COBJS:.o=.c) -+OBJS := $(addprefix $(obj),$(COBJS)) -+ -+$(LIB): $(obj).depend $(OBJS) -+ $(AR) $(ARFLAGS) $@ $(OBJS) -+ -+clean: -+ rm -f $(OBJS) -+ -+distclean: clean -+ rm -f $(LIB) core *.bak $(obj).depend -+ -+######################################################################### -+ -+# defines $(obj).depend target -+include $(SRCTREE)/rules.mk -+ -+sinclude $(obj).depend -+ -+######################################################################### -diff --git a/board/omap3/zoom2/config.mk b/board/omap3/zoom2/config.mk -new file mode 100644 -index 0000000..33f394b ---- /dev/null -+++ b/board/omap3/zoom2/config.mk -@@ -0,0 +1,33 @@ -+# -+# (C) Copyright 2009 -+# Texas Instruments, -+# -+# Zoom II uses OMAP3 (ARM-CortexA8) CPU -+# see http://www.ti.com/ for more information on Texas Instruments -+# -+# See file CREDITS for list of people who contributed to this -+# project. -+# -+# This program is free software; you can redistribute it and/or -+# modify it under the terms of the GNU General Public License as -+# published by the Free Software Foundation; either version 2 of -+# the License, or (at your option) any later version. -+# -+# This program is distributed in the hope that it will be useful, -+# but WITHOUT ANY WARRANTY; without even the implied warranty of -+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+# GNU General Public License for more details. -+# -+# You should have received a copy of the GNU General Public License -+# along with this program; if not, write to the Free Software -+# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+# MA 02111-1307 USA -+# -+# Physical Address: -+# 0x80000000 (bank0) -+# 0xA0000000 (bank1) -+# Linux-Kernel is expected to be at 0x80008000, entry 0x80008000 -+# (mem base + reserved) -+ -+# For use with external or internal boots. -+TEXT_BASE = 0x80e80000 -diff --git a/board/omap3/zoom2/debug_board.c b/board/omap3/zoom2/debug_board.c -new file mode 100644 -index 0000000..a4ddf29 ---- /dev/null -+++ b/board/omap3/zoom2/debug_board.c -@@ -0,0 +1,59 @@ -+/* -+ * Copyright (c) 2009 Wind River Systems, Inc. -+ * Tom Rix -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ * -+ */ -+#include -+#include -+#include -+#include -+#include -+ -+#define DEBUG_BOARD_CONNECTED 1 -+#define DEBUG_BOARD_NOT_CONNECTED 0 -+ -+static int debug_board_connected = DEBUG_BOARD_CONNECTED; -+ -+static void zoom2_debug_board_detect (void) -+{ -+ int val = 0; -+ -+ if (!omap_request_gpio(158)) { -+ /* -+ * GPIO to query for debug board -+ * 158 db board query -+ */ -+ omap_set_gpio_direction(158, 1); -+ val = omap_get_gpio_datain(158); -+ omap_free_gpio(158); -+ } -+ -+ if (!val) -+ debug_board_connected = DEBUG_BOARD_NOT_CONNECTED; -+} -+ -+int zoom2_debug_board_connected (void) -+{ -+ static int first_time = 1; -+ -+ if (first_time) { -+ zoom2_debug_board_detect (); -+ first_time = 0; -+ } -+ return debug_board_connected; -+} -diff --git a/board/omap3/zoom2/led.c b/board/omap3/zoom2/led.c -new file mode 100644 -index 0000000..4e14c58 ---- /dev/null -+++ b/board/omap3/zoom2/led.c -@@ -0,0 +1,129 @@ -+/* -+ * Copyright (c) 2009 Wind River Systems, Inc. -+ * Tom Rix -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+static unsigned int saved_state[2] = {STATUS_LED_OFF, STATUS_LED_OFF}; -+ -+/* -+ * GPIO LEDs -+ * 173 red -+ * 154 blue -+ * 61 blue2 -+ */ -+#define ZOOM2_LED_RED 173 -+#define ZOOM2_LED_BLUE 154 -+#define ZOOM2_LED_BLUE2 61 -+ -+void red_LED_off (void) -+{ -+ /* red */ -+ if (!omap_request_gpio(ZOOM2_LED_RED)) { -+ omap_set_gpio_direction(ZOOM2_LED_RED, 0); -+ omap_set_gpio_dataout(ZOOM2_LED_RED, 0); -+ } -+ saved_state[STATUS_LED_RED] = STATUS_LED_OFF; -+} -+ -+void blue_LED_off (void) -+{ -+ /* blue */ -+ if (!omap_request_gpio(ZOOM2_LED_BLUE)) { -+ omap_set_gpio_direction(ZOOM2_LED_BLUE, 0); -+ omap_set_gpio_dataout(ZOOM2_LED_BLUE, 0); -+ } -+ -+ /* blue 2 */ -+ if (!omap_request_gpio(ZOOM2_LED_BLUE2)) { -+ omap_set_gpio_direction(ZOOM2_LED_BLUE2, 0); -+ omap_set_gpio_dataout(ZOOM2_LED_BLUE2, 0); -+ } -+ saved_state[STATUS_LED_BLUE] = STATUS_LED_OFF; -+} -+ -+void red_LED_on (void) -+{ -+ blue_LED_off (); -+ -+ /* red */ -+ if (!omap_request_gpio(ZOOM2_LED_RED)) { -+ omap_set_gpio_direction(ZOOM2_LED_RED, 0); -+ omap_set_gpio_dataout(ZOOM2_LED_RED, 1); -+ } -+ saved_state[STATUS_LED_RED] = STATUS_LED_ON; -+} -+ -+void blue_LED_on (void) -+{ -+ red_LED_off (); -+ -+ /* blue */ -+ if (!omap_request_gpio(ZOOM2_LED_BLUE)) { -+ omap_set_gpio_direction(ZOOM2_LED_BLUE, 0); -+ omap_set_gpio_dataout(ZOOM2_LED_BLUE, 1); -+ } -+ -+ /* blue 2 */ -+ if (!omap_request_gpio(ZOOM2_LED_BLUE2)) { -+ omap_set_gpio_direction(ZOOM2_LED_BLUE2, 0); -+ omap_set_gpio_dataout(ZOOM2_LED_BLUE2, 1); -+ } -+ -+ saved_state[STATUS_LED_BLUE] = STATUS_LED_ON; -+} -+ -+void __led_init (led_id_t mask, int state) -+{ -+ __led_set (mask, state); -+} -+ -+void __led_toggle (led_id_t mask) -+{ -+ if (STATUS_LED_BLUE == mask) { -+ if (STATUS_LED_ON == saved_state[STATUS_LED_BLUE]) -+ blue_LED_off (); -+ else -+ blue_LED_on (); -+ } else if (STATUS_LED_RED == mask) { -+ if (STATUS_LED_ON == saved_state[STATUS_LED_RED]) -+ red_LED_off (); -+ else -+ red_LED_on (); -+ } -+} -+ -+void __led_set (led_id_t mask, int state) -+{ -+ if (STATUS_LED_BLUE == mask) { -+ if (STATUS_LED_ON == state) -+ blue_LED_on (); -+ else -+ blue_LED_off (); -+ } else if (STATUS_LED_RED == mask) { -+ if (STATUS_LED_ON == state) -+ red_LED_on (); -+ else -+ red_LED_off (); -+ } -+} -diff --git a/board/omap3/zoom2/zoom2.c b/board/omap3/zoom2/zoom2.c -new file mode 100644 -index 0000000..08fdafb ---- /dev/null -+++ b/board/omap3/zoom2/zoom2.c -@@ -0,0 +1,172 @@ -+/* -+ * Copyright (c) 2009 Wind River Systems, Inc. -+ * Tom Rix -+ * -+ * Derived from Zoom1 code by -+ * Nishanth Menon -+ * Sunil Kumar -+ * Shashi Ranjan -+ * Richard Woodruff -+ * Syed Mohammed Khasim -+ * -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+#include -+#ifdef CONFIG_STATUS_LED -+#include -+#endif -+#include -+#include -+#include -+#include -+#include -+#include -+#include "zoom2.h" -+#include "zoom2_serial.h" -+ -+/* -+ * This the the zoom2, board specific, gpmc configuration for the -+ * quad uart on the debug board. The more general gpmc configurations -+ * are setup at the cpu level in cpu/arm_cortexa8/omap3/mem.c -+ * -+ * The details of the setting of the serial gpmc setup are not available. -+ * The values were provided by another party. -+ */ -+extern void enable_gpmc_config(u32 *gpmc_config, gpmc_csx_t *gpmc_cs_base, -+ u32 base, u32 size); -+ -+static u32 gpmc_serial_TL16CP754C[GPMC_MAX_REG] = { -+ 0x00011000, -+ 0x001F1F01, -+ 0x00080803, -+ 0x1D091D09, -+ 0x041D1F1F, -+ 0x1D0904C4, 0 -+}; -+ -+/* Used to track the revision of the board */ -+static zoom2_revision revision = ZOOM2_REVISION_UNKNOWN; -+ -+/* -+ * Routine: zoom2_get_revision -+ * Description: Return the revision of the Zoom2 this code is running on. -+ */ -+zoom2_revision zoom2_get_revision(void) -+{ -+ return revision; -+} -+ -+/* -+ * Routine: zoom2_identify -+ * Description: Detect which version of Zoom2 we are running on. -+ */ -+void zoom2_identify(void) -+{ -+ /* -+ * To check for production board vs beta board, -+ * check if gpio 94 is clear. -+ * -+ * No way yet to check for alpha board identity. -+ * Alpha boards were produced in very limited quantities -+ * and they are not commonly used. They are mentioned here -+ * only for completeness. -+ */ -+ if (!omap_request_gpio(94)) { -+ unsigned int val; -+ -+ omap_set_gpio_direction(94, 1); -+ val = omap_get_gpio_datain(94); -+ omap_free_gpio(94); -+ -+ if (val) -+ revision = ZOOM2_REVISION_BETA; -+ else -+ revision = ZOOM2_REVISION_PRODUCTION; -+ } -+ -+ printf("Board revision "); -+ switch (revision) { -+ case ZOOM2_REVISION_PRODUCTION: -+ printf("Production\n"); -+ break; -+ case ZOOM2_REVISION_BETA: -+ printf("Beta\n"); -+ break; -+ default: -+ printf("Unknown\n"); -+ break; -+ } -+} -+ -+/* -+ * Routine: board_init -+ * Description: Early hardware init. -+ */ -+int board_init (void) -+{ -+ DECLARE_GLOBAL_DATA_PTR; -+ gpmc_csx_t *serial_cs_base; -+ u32 *gpmc_config; -+ -+ gpmc_init (); /* in SRAM or SDRAM, finish GPMC */ -+ -+ /* Configure console support on zoom2 */ -+ gpmc_config = gpmc_serial_TL16CP754C; -+ serial_cs_base = (gpmc_csx_t *) (GPMC_CONFIG_CS0_BASE + -+ (3 * GPMC_CONFIG_WIDTH)); -+ enable_gpmc_config(gpmc_config, -+ serial_cs_base, -+ SERIAL_TL16CP754C_BASE, -+ GPMC_SIZE_16M); -+ -+ /* board id for Linux */ -+ gd->bd->bi_arch_number = MACH_TYPE_OMAP_ZOOM2; -+ /* boot param addr */ -+ gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); -+ -+#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT) -+ status_led_set (STATUS_LED_BOOT, STATUS_LED_ON); -+#endif -+ return 0; -+} -+ -+/* -+ * Routine: misc_init_r -+ * Description: Configure zoom board specific configurations -+ */ -+int misc_init_r(void) -+{ -+ zoom2_identify(); -+ power_init_r(); -+ dieid_num_r(); -+ return 0; -+} -+ -+/* -+ * Routine: set_muxconf_regs -+ * Description: Setting up the configuration Mux registers specific to the -+ * hardware. Many pins need to be moved from protect to primary -+ * mode. -+ */ -+void set_muxconf_regs (void) -+{ -+ /* platform specific muxes */ -+ MUX_ZOOM2 (); -+} -diff --git a/board/omap3/zoom2/zoom2.h b/board/omap3/zoom2/zoom2.h -new file mode 100644 -index 0000000..a21d1d6 ---- /dev/null -+++ b/board/omap3/zoom2/zoom2.h -@@ -0,0 +1,158 @@ -+/* -+ * Copyright (c) 2009 Wind River Systems, Inc. -+ * Tom Rix -+ * -+ * Derived from: board/omap3/zoom1/zoom1.h -+ * Nishanth Menon -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+#ifndef _BOARD_ZOOM2_H_ -+#define _BOARD_ZOOM2_H_ -+ -+const omap3_sysinfo sysinfo = { -+ DDR_STACKED, -+ "OMAP3 Zoom2 ", -+ "NAND", -+}; -+ -+typedef enum { -+ ZOOM2_REVISION_UNKNOWN = 0, -+ ZOOM2_REVISION_ALPHA, -+ ZOOM2_REVISION_BETA, -+ ZOOM2_REVISION_PRODUCTION -+} zoom2_revision; -+ -+zoom2_revision zoom2_get_revision(void); -+ -+/* -+ * IEN - Input Enable -+ * IDIS - Input Disable -+ * PTD - Pull type Down -+ * PTU - Pull type Up -+ * DIS - Pull type selection is inactive -+ * EN - Pull type selection is active -+ * M0 - Mode 0 -+ * The commented string gives the final mux configuration for that pin -+ */ -+#define MUX_ZOOM2() \ -+ /* SDRC*/\ -+ MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)) /* SDRC_D0 */\ -+ MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)) /* SDRC_D1 */\ -+ MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)) /* SDRC_D2 */\ -+ MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)) /* SDRC_D3 */\ -+ MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)) /* SDRC_D4 */\ -+ MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)) /* SDRC_D5 */\ -+ MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)) /* SDRC_D6 */\ -+ MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)) /* SDRC_D7 */\ -+ MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)) /* SDRC_D8 */\ -+ MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)) /* SDRC_D9 */\ -+ MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)) /* SDRC_D10 */\ -+ MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)) /* SDRC_D11 */\ -+ MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /* SDRC_D12 */\ -+ MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)) /* SDRC_D13 */\ -+ MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)) /* SDRC_D14 */\ -+ MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)) /* SDRC_D15 */\ -+ MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)) /* SDRC_D16 */\ -+ MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)) /* SDRC_D17 */\ -+ MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)) /* SDRC_D18 */\ -+ MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)) /* SDRC_D19 */\ -+ MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)) /* SDRC_D20 */\ -+ MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)) /* SDRC_D21 */\ -+ MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)) /* SDRC_D22 */\ -+ MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)) /* SDRC_D23 */\ -+ MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)) /* SDRC_D24 */\ -+ MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)) /* SDRC_D25 */\ -+ MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)) /* SDRC_D26 */\ -+ MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)) /* SDRC_D27 */\ -+ MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)) /* SDRC_D28 */\ -+ MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)) /* SDRC_D29 */\ -+ MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)) /* SDRC_D30 */\ -+ MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)) /* SDRC_D31 */\ -+ MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)) /* SDRC_CLK */\ -+ MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)) /* SDRC_DQS0 */\ -+ MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)) /* SDRC_DQS1 */\ -+ MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) /* SDRC_DQS2 */\ -+ MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) /* SDRC_DQS3 */\ -+/* GPMC */\ -+ MUX_VAL(CP(GPMC_A1), (IDIS | PTD | DIS | M0)) /* GPMC_A1 */\ -+ MUX_VAL(CP(GPMC_A2), (IDIS | PTD | DIS | M0)) /* GPMC_A2 */\ -+ MUX_VAL(CP(GPMC_A3), (IDIS | PTD | DIS | M0)) /* GPMC_A3 */\ -+ MUX_VAL(CP(GPMC_A4), (IDIS | PTD | DIS | M0)) /* GPMC_A4 */\ -+ MUX_VAL(CP(GPMC_A5), (IDIS | PTD | DIS | M0)) /* GPMC_A5 */\ -+ MUX_VAL(CP(GPMC_A6), (IDIS | PTD | DIS | M0)) /* GPMC_A6 */\ -+ MUX_VAL(CP(GPMC_A7), (IDIS | PTD | DIS | M0)) /* GPMC_A7 */\ -+ MUX_VAL(CP(GPMC_A8), (IDIS | PTD | DIS | M0)) /* GPMC_A8 */\ -+ MUX_VAL(CP(GPMC_A9), (IDIS | PTD | DIS | M0)) /* GPMC_A9 */\ -+ MUX_VAL(CP(GPMC_A10), (IDIS | PTD | DIS | M0)) /* GPMC_A10 */\ -+ MUX_VAL(CP(GPMC_D0), (IEN | PTD | DIS | M0)) /* GPMC_D0 */\ -+ MUX_VAL(CP(GPMC_D1), (IEN | PTD | DIS | M0)) /* GPMC_D1 */\ -+ MUX_VAL(CP(GPMC_D2), (IEN | PTD | DIS | M0)) /* GPMC_D2 */\ -+ MUX_VAL(CP(GPMC_D3), (IEN | PTD | DIS | M0)) /* GPMC_D3 */\ -+ MUX_VAL(CP(GPMC_D4), (IEN | PTD | DIS | M0)) /* GPMC_D4 */\ -+ MUX_VAL(CP(GPMC_D5), (IEN | PTD | DIS | M0)) /* GPMC_D5 */\ -+ MUX_VAL(CP(GPMC_D6), (IEN | PTD | DIS | M0)) /* GPMC_D6 */\ -+ MUX_VAL(CP(GPMC_D7), (IEN | PTD | DIS | M0)) /* GPMC_D7 */\ -+ MUX_VAL(CP(GPMC_D8), (IEN | PTD | DIS | M0)) /* GPMC_D8 */\ -+ MUX_VAL(CP(GPMC_D9), (IEN | PTD | DIS | M0)) /* GPMC_D9 */\ -+ MUX_VAL(CP(GPMC_D10), (IEN | PTD | DIS | M0)) /* GPMC_D10 */\ -+ MUX_VAL(CP(GPMC_D11), (IEN | PTD | DIS | M0)) /* GPMC_D11 */\ -+ MUX_VAL(CP(GPMC_D12), (IEN | PTD | DIS | M0)) /* GPMC_D12 */\ -+ MUX_VAL(CP(GPMC_D13), (IEN | PTD | DIS | M0)) /* GPMC_D13 */\ -+ MUX_VAL(CP(GPMC_D14), (IEN | PTD | DIS | M0)) /* GPMC_D14 */\ -+ MUX_VAL(CP(GPMC_D15), (IEN | PTD | DIS | M0)) /* GPMC_D15 */\ -+ MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)) /* GPMC_nCS0 */\ -+ MUX_VAL(CP(GPMC_NCS1), (IDIS | PTU | EN | M7)) /* GPMC_nCS1 */\ -+ MUX_VAL(CP(GPMC_NCS2), (IDIS | PTU | EN | M7)) /* GPMC_nCS2 */\ -+ MUX_VAL(CP(GPMC_NCS3), (IDIS | PTU | EN | M7)) /* GPMC_nCS3 */\ -+ MUX_VAL(CP(GPMC_NCS4), (IDIS | PTU | EN | M7)) /* GPMC_nCS4 */\ -+ MUX_VAL(CP(GPMC_NCS5), (IDIS | PTD | DIS | M7)) /* GPMC_nCS5 */\ -+ MUX_VAL(CP(GPMC_NCS6), (IEN | PTD | DIS | M7)) /* GPMC_nCS6 */\ -+ MUX_VAL(CP(GPMC_NCS7), (IEN | PTU | EN | M7)) /* GPMC_nCS7 */\ -+ MUX_VAL(CP(GPMC_CLK), (IDIS | PTD | DIS | M0)) /* GPMC_CLK */\ -+ MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)) /* GPMC_nADV_ALE */\ -+ MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)) /* GPMC_nOE */\ -+ MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)) /* GPMC_nWE */\ -+ MUX_VAL(CP(GPMC_NWP), (IDIS | PTU | DIS | M0)) /* GPMC_nWP */\ -+ MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTD | DIS | M0)) /* GPMC_nBE0_CLE */\ -+ MUX_VAL(CP(GPMC_NBE1), (IEN | PTD | DIS | M0)) /* GPMC_nBE1 */\ -+ MUX_VAL(CP(GPMC_WAIT0), (IEN | PTD | EN | M0)) /* GPMC_WAIT0 */\ -+ MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)) /* GPMC_WAIT1 */\ -+ MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M0)) /* GPMC_WAIT2 */\ -+ MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M0)) /* GPMC_WAIT3 */\ -+/* IDCC modem Power On */\ -+ MUX_VAL(CP(CAM_D11), (IEN | PTU | EN | M4)) /* GPIO_110 */\ -+ MUX_VAL(CP(CAM_D4), (IEN | PTU | EN | M4)) /* GPIO_103 */\ -+/* GPMC CS7 has LAN9211 device */\ -+ MUX_VAL(CP(GPMC_NCS7), (IDIS | PTU | EN | M0)) /* GPMC_nCS7 */\ -+ MUX_VAL(CP(MCBSP1_DX), (IEN | PTD | DIS | M4)) /* LAN9221 */\ -+ MUX_VAL(CP(MCSPI1_CS2), (IEN | PTD | EN | M0)) /* MCSPI1_CS2 */\ -+/* GPMC CS3 has Serial TL16CP754C device */\ -+ MUX_VAL(CP(GPMC_NCS3), (IDIS | PTU | EN | M0)) /* GPMC_nCS3 */\ -+/* Toggle Reset pin of TL16CP754C device */\ -+ MUX_VAL(CP(MCBSP4_CLKX), (IEN | PTU | EN | M4)) /* GPIO_152 */\ -+ udelay(10);\ -+ MUX_VAL(CP(MCBSP4_CLKX), (IEN | PTD | EN | M4)) /* GPIO_152 */\ -+ MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /* SDRC_CKE1 */\ -+/* LEDS */\ -+ MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | EN | M4)) /* GPIO_173 red */\ -+ MUX_VAL(CP(MCBSP4_DX), (IEN | PTD | EN | M4)) /* GPIO_154 blue */\ -+ MUX_VAL(CP(GPMC_NBE1), (IEN | PTD | EN | M4)) /* GPIO_61 blue2 */ -+ -+#endif /* _BOARD_ZOOM2_H_ */ -diff --git a/board/omap3/zoom2/zoom2_serial.c b/board/omap3/zoom2/zoom2_serial.c -new file mode 100644 -index 0000000..a3d777d ---- /dev/null -+++ b/board/omap3/zoom2/zoom2_serial.c -@@ -0,0 +1,130 @@ -+/* -+ * Copyright (c) 2009 Wind River Systems, Inc. -+ * Tom Rix -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ * -+ * This file was adapted from cpu/mpc5xxx/serial.c -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include "zoom2_serial.h" -+ -+int quad_init_dev (unsigned long base) -+{ -+ /* -+ * The Quad UART is on the debug board. -+ * Check if the debug board is attached before using the UART -+ */ -+ if (zoom2_debug_board_connected ()) { -+ NS16550_t com_port = (NS16550_t) base; -+ int baud_divisor = CONFIG_SYS_NS16550_CLK / 16 / -+ CONFIG_BAUDRATE; -+ -+ /* -+ * Zoom2 has a board specific initialization of its UART. -+ * This generic initialization has been copied from -+ * drivers/serial/ns16550.c. The macros have been expanded. -+ * -+ * Do the following instead of -+ * -+ * NS16550_init (com_port, clock_divisor); -+ */ -+ com_port->ier = 0x00; -+ -+ /* -+ * On Zoom2 board Set pre-scalar to 1 -+ * CLKSEL is GND => MCR[7] is 1 => preslr is 4 -+ * So change the prescl to 1 -+ */ -+ com_port->lcr = 0xBF; -+ com_port->fcr |= 0x10; -+ com_port->mcr &= 0x7F; -+ -+ /* This is generic ns16550.c setup */ -+ com_port->lcr = UART_LCR_BKSE | UART_LCR_8N1; -+ com_port->dll = 0; -+ com_port->dlm = 0; -+ com_port->lcr = UART_LCR_8N1; -+ com_port->mcr = UART_MCR_DTR | UART_MCR_RTS; -+ com_port->fcr = UART_FCR_FIFO_EN | UART_FCR_RXSR | -+ UART_FCR_TXSR; -+ com_port->lcr = UART_LCR_BKSE | UART_LCR_8N1; -+ com_port->dll = baud_divisor & 0xff; -+ com_port->dlm = (baud_divisor >> 8) & 0xff; -+ com_port->lcr = UART_LCR_8N1; -+ } -+ /* -+ * We have to lie here, otherwise the board init code will hang -+ * on the check -+ */ -+ return 0; -+} -+ -+void quad_putc_dev (unsigned long base, const char c) -+{ -+ if (zoom2_debug_board_connected ()) { -+ -+ if (c == '\n') -+ quad_putc_dev (base, '\r'); -+ -+ NS16550_putc ((NS16550_t) base, c); -+ } -+} -+ -+void quad_puts_dev (unsigned long base, const char *s) -+{ -+ if (zoom2_debug_board_connected ()) { -+ while ((s != NULL) && (*s != '\0')) -+ quad_putc_dev (base, *s++); -+ } -+} -+ -+int quad_getc_dev (unsigned long base) -+{ -+ if (zoom2_debug_board_connected ()) -+ return NS16550_getc ((NS16550_t) base); -+ else -+ return 0; -+} -+ -+int quad_tstc_dev (unsigned long base) -+{ -+ if (zoom2_debug_board_connected ()) -+ return NS16550_tstc ((NS16550_t) base); -+ else -+ return 0; -+} -+ -+void quad_setbrg_dev (unsigned long base) -+{ -+ if (zoom2_debug_board_connected ()) { -+ -+ int clock_divisor = CONFIG_SYS_NS16550_CLK / 16 / -+ CONFIG_BAUDRATE; -+ -+ NS16550_reinit ((NS16550_t) base, clock_divisor); -+ } -+} -+ -+QUAD_INIT (0) -+QUAD_INIT (1) -+QUAD_INIT (2) -+QUAD_INIT (3) -diff --git a/board/omap3/zoom2/zoom2_serial.h b/board/omap3/zoom2/zoom2_serial.h -new file mode 100644 -index 0000000..c98158f ---- /dev/null -+++ b/board/omap3/zoom2/zoom2_serial.h -@@ -0,0 +1,75 @@ -+/* -+ * Copyright (c) 2009 Wind River Systems, Inc. -+ * Tom Rix -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ * -+ */ -+ -+#ifndef ZOOM2_SERIAL_H -+#define ZOOM2_SERIAL_H -+ -+extern int zoom2_debug_board_connected (void); -+ -+#define SERIAL_TL16CP754C_BASE 0x10000000 /* Zoom2 Serial chip address */ -+ -+#define QUAD_BASE_0 SERIAL_TL16CP754C_BASE -+#define QUAD_BASE_1 (SERIAL_TL16CP754C_BASE + 0x100) -+#define QUAD_BASE_2 (SERIAL_TL16CP754C_BASE + 0x200) -+#define QUAD_BASE_3 (SERIAL_TL16CP754C_BASE + 0x300) -+ -+#define S(a) #a -+#define N(a) S(quad##a) -+#define U(a) S(UART##a) -+ -+#define QUAD_INIT(n) \ -+int quad_init_##n(void) \ -+{ \ -+ return quad_init_dev(QUAD_BASE_##n); \ -+} \ -+void quad_setbrg_##n(void) \ -+{ \ -+ quad_setbrg_dev(QUAD_BASE_##n); \ -+} \ -+void quad_putc_##n(const char c) \ -+{ \ -+ quad_putc_dev(QUAD_BASE_##n, c); \ -+} \ -+void quad_puts_##n(const char *s) \ -+{ \ -+ quad_puts_dev(QUAD_BASE_##n, s); \ -+} \ -+int quad_getc_##n(void) \ -+{ \ -+ return quad_getc_dev(QUAD_BASE_##n); \ -+} \ -+int quad_tstc_##n(void) \ -+{ \ -+ return quad_tstc_dev(QUAD_BASE_##n); \ -+} \ -+struct serial_device zoom2_serial_device##n = \ -+{ \ -+ N(n), \ -+ U(n), \ -+ quad_init_##n, \ -+ quad_setbrg_##n, \ -+ quad_getc_##n, \ -+ quad_tstc_##n, \ -+ quad_putc_##n, \ -+ quad_puts_##n, \ -+}; -+ -+#endif /* ZOOM2_SERIAL_H */ -diff --git a/board/omap5912osk/u-boot.lds b/board/omap5912osk/u-boot.lds -deleted file mode 100644 -index b76b51a..0000000 ---- a/board/omap5912osk/u-boot.lds -+++ /dev/null -@@ -1,52 +0,0 @@ --/* -- * (C) Copyright 2002-2004 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- . = ALIGN(4); -- .text : -- { -- cpu/arm926ejs/start.o (.text) -- *(.text) -- } -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- . = ALIGN(4); -- .data : { *(.data) } -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/omap730p2/u-boot.lds b/board/omap730p2/u-boot.lds -deleted file mode 100644 -index e50b8d4..0000000 ---- a/board/omap730p2/u-boot.lds -+++ /dev/null -@@ -1,52 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- . = ALIGN(4); -- .text : -- { -- cpu/arm926ejs/start.o (.text) -- *(.text) -- } -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- . = ALIGN(4); -- .data : { *(.data) } -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/pcippc2/pcippc2.c b/board/pcippc2/pcippc2.c -index 80c2cb5..7985f7d 100644 ---- a/board/pcippc2/pcippc2.c -+++ b/board/pcippc2/pcippc2.c -@@ -239,7 +239,7 @@ U_BOOT_CMD( - "check and set watchdog", - "on - switch watchDog on\n" - "wd off - switch watchdog off\n" -- "wd - print current status\n" -+ "wd - print current status" - ); - - #endif -diff --git a/board/pcs440ep/pcs440ep.c b/board/pcs440ep/pcs440ep.c -index 9cc3f5b..47d6391 100644 ---- a/board/pcs440ep/pcs440ep.c -+++ b/board/pcs440ep/pcs440ep.c -@@ -763,7 +763,7 @@ U_BOOT_CMD( - " 0x02 = DIAG 2 on\n" - " 0x04 = DIAG 3 on\n" - " 0x08 = DIAG 4 on\n" -- " > 0x100 set the LED, who are on, to state blinking\n" -+ " > 0x100 set the LED, who are on, to state blinking" - ); - - #if defined(CONFIG_SHA1_CHECK_UB_IMG) -@@ -823,7 +823,7 @@ U_BOOT_CMD( - "calculate the SHA1 Sum", - "address len [addr] calculate the SHA1 sum [save at addr]\n" - " -p calculate the SHA1 sum from the U-Boot image in flash and print\n" -- " -c check the U-Boot image in flash\n" -+ " -c check the U-Boot image in flash" - ); - #endif - -diff --git a/board/pleb2/u-boot.lds b/board/pleb2/u-boot.lds -deleted file mode 100644 -index a077bc5..0000000 ---- a/board/pleb2/u-boot.lds -+++ /dev/null -@@ -1,56 +0,0 @@ --/* -- * (C) Copyright 2000 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/pxa/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/pn62/cmd_pn62.c b/board/pn62/cmd_pn62.c -index ff5d63e..a989351 100644 ---- a/board/pn62/cmd_pn62.c -+++ b/board/pn62/cmd_pn62.c -@@ -54,8 +54,8 @@ int do_led (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - led , 3, 1, do_led, - "set LED 0..11 on the PN62 board", -- "i fun\n" -- " - set 'i'th LED to function 'fun'\n" -+ "i fun" -+ " - set 'i'th LED to function 'fun'" - ); - - /* -@@ -177,7 +177,7 @@ U_BOOT_CMD( - loadpci, 2, 1, do_loadpci, - "load binary file over PCI", - "[addr]\n" -- " - load binary file over PCI to address 'addr'\n" -+ " - load binary file over PCI to address 'addr'" - ); - - #endif -diff --git a/board/prodrive/pdnb3/pdnb3.c b/board/prodrive/pdnb3/pdnb3.c -index 8777284..c323456 100644 ---- a/board/prodrive/pdnb3/pdnb3.c -+++ b/board/prodrive/pdnb3/pdnb3.c -@@ -228,7 +228,7 @@ int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - fpga, 2, 0, do_fpga, - "boot FPGA", -- "address size\n - boot FPGA with gzipped image at
\n" -+ "address size\n - boot FPGA with gzipped image at
" - ); - - #if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI) -diff --git a/board/prodrive/pdnb3/u-boot.lds b/board/prodrive/pdnb3/u-boot.lds -deleted file mode 100644 -index 6324436..0000000 ---- a/board/prodrive/pdnb3/u-boot.lds -+++ /dev/null -@@ -1,56 +0,0 @@ --/* -- * (C) Copyright 2006 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-bigarm", "elf32-bigarm", "elf32-bigarm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/ixp/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/pxa255_idp/pxa_idp.c b/board/pxa255_idp/pxa_idp.c -index aa598aa..e9e479c 100644 ---- a/board/pxa255_idp/pxa_idp.c -+++ b/board/pxa255_idp/pxa_idp.c -@@ -129,7 +129,7 @@ int do_idpcmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - - U_BOOT_CMD(idpcmd, CONFIG_SYS_MAXARGS, 0, do_idpcmd, - "custom IDP command", -- "no args at this time\n" -+ "no args at this time" - ); - - #endif -diff --git a/board/pxa255_idp/u-boot.lds b/board/pxa255_idp/u-boot.lds -deleted file mode 100644 -index fb4358b..0000000 ---- a/board/pxa255_idp/u-boot.lds -+++ /dev/null -@@ -1,56 +0,0 @@ --/* -- * (C) Copyright 2000-2005 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/pxa/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} diff --git a/board/qi_lb60/Makefile b/board/qi_lb60/Makefile new file mode 100644 index 0000000..470447d @@ -20432,5320 +417,8 @@ index 0000000..a15a96e + .bss : { *(.bss) } + uboot_end = .; +} -diff --git a/board/r360mpi/r360mpi.c b/board/r360mpi/r360mpi.c -index 1871984..703af73 100644 ---- a/board/r360mpi/r360mpi.c -+++ b/board/r360mpi/r360mpi.c -@@ -415,5 +415,5 @@ int do_kbd (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - kbd, 1, 1, do_kbd, - "read keyboard status", -- NULL -+ "" - ); -diff --git a/board/renesas/sh7785lcr/rtl8169_mac.c b/board/renesas/sh7785lcr/rtl8169_mac.c -index 6d0bbc0..634efb4 100644 ---- a/board/renesas/sh7785lcr/rtl8169_mac.c -+++ b/board/renesas/sh7785lcr/rtl8169_mac.c -@@ -325,7 +325,7 @@ U_BOOT_CMD( - setmac, 2, 1, do_set_mac, - "write MAC address for RTL8110SCL", - "\n" -- "setmac - write MAC address for RTL8110SCL\n" -+ "setmac - write MAC address for RTL8110SCL" - ); - - int do_print_mac(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -@@ -344,5 +344,5 @@ U_BOOT_CMD( - printmac, 1, 1, do_print_mac, - "print MAC address for RTL8110", - "\n" -- " - print MAC address for RTL8110\n" -+ " - print MAC address for RTL8110" - ); -diff --git a/board/renesas/sh7785lcr/selfcheck.c b/board/renesas/sh7785lcr/selfcheck.c -index 6dbb784..e803b3c 100644 ---- a/board/renesas/sh7785lcr/selfcheck.c -+++ b/board/renesas/sh7785lcr/selfcheck.c -@@ -168,5 +168,5 @@ U_BOOT_CMD( - "hwtest sm107 - output SM107 version\n" - "hwtest net - check RTL8110 ID\n" - "hwtest sata - check SiI3512 ID\n" -- "hwtest pci - output PCI slot device ID\n" -+ "hwtest pci - output PCI slot device ID" - ); -diff --git a/board/renesas/sh7785lcr/sh7785lcr.c b/board/renesas/sh7785lcr/sh7785lcr.c -index 6bdf3c0..9948d04 100644 ---- a/board/renesas/sh7785lcr/sh7785lcr.c -+++ b/board/renesas/sh7785lcr/sh7785lcr.c -@@ -82,6 +82,6 @@ U_BOOT_CMD( - pmb, 1, 1, do_pmb, - "pmb - PMB setting\n", - "\n" -- " - PMB setting for all SDRAM mapping\n" -+ " - PMB setting for all SDRAM mapping" - ); - #endif -diff --git a/board/ronetix/pm9263/pm9263.c b/board/ronetix/pm9263/pm9263.c -index d24ef9a..d2598a0 100644 ---- a/board/ronetix/pm9263/pm9263.c -+++ b/board/ronetix/pm9263/pm9263.c -@@ -382,15 +382,8 @@ int board_eth_init(bd_t *bis) - int checkboard (void) - { - char *ss; -- char buf[32]; - - printf ("Board : Ronetix PM9263\n"); -- printf ("Crystal frequency: %8s MHz\n", -- strmhz(buf, get_main_clk_rate())); -- printf ("CPU clock : %8s MHz\n", -- strmhz(buf, get_cpu_clk_rate())); -- printf ("Master clock : %8s MHz\n", -- strmhz(buf, get_mck_clk_rate())); - - switch (gd->fb_base) { - case PHYS_PSRAM: -diff --git a/board/samsung/smdk2400/u-boot.lds b/board/samsung/smdk2400/u-boot.lds -deleted file mode 100644 -index b8cacf1..0000000 ---- a/board/samsung/smdk2400/u-boot.lds -+++ /dev/null -@@ -1,57 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/ --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm920t/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/samsung/smdk2410/u-boot.lds b/board/samsung/smdk2410/u-boot.lds -deleted file mode 100644 -index b8cacf1..0000000 ---- a/board/samsung/smdk2410/u-boot.lds -+++ /dev/null -@@ -1,57 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/ --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm920t/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/samsung/smdk6400/config.mk b/board/samsung/smdk6400/config.mk -index 0255a07..4ab1d7e 100644 ---- a/board/samsung/smdk6400/config.mk -+++ b/board/samsung/smdk6400/config.mk -@@ -28,3 +28,5 @@ TEXT_BASE = $(RAM_TEXT) - else - TEXT_BASE = 0 - endif -+ -+LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot-nand.lds -diff --git a/board/sandburst/common/ppc440gx_i2c.c b/board/sandburst/common/ppc440gx_i2c.c -index c1af70c..bc88e5a 100644 ---- a/board/sandburst/common/ppc440gx_i2c.c -+++ b/board/sandburst/common/ppc440gx_i2c.c -@@ -501,7 +501,7 @@ int do_i2c1_probe(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - iprobe1, 1, 1, do_i2c1_probe, - "probe to discover valid I2C chip addresses", -- "\n -discover valid I2C chip addresses\n" -+ "" - ); - - #endif /* CONFIG_I2C_BUS1 */ -diff --git a/board/sandburst/karef/karef.c b/board/sandburst/karef/karef.c -index b8ae68f..92f5247 100644 ---- a/board/sandburst/karef/karef.c -+++ b/board/sandburst/karef/karef.c -@@ -611,7 +611,7 @@ int karefRecover(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - } - - U_BOOT_CMD(kasetup, 1, 1, karefSetupVars, -- "Set environment to factory defaults", NULL); -+ "Set environment to factory defaults", ""); - - U_BOOT_CMD(karecover, 1, 1, karefRecover, -- "Set environment to allow for fs recovery", NULL); -+ "Set environment to allow for fs recovery", ""); -diff --git a/board/sandburst/metrobox/metrobox.c b/board/sandburst/metrobox/metrobox.c -index fc136c8..27d7f74 100644 ---- a/board/sandburst/metrobox/metrobox.c -+++ b/board/sandburst/metrobox/metrobox.c -@@ -577,7 +577,7 @@ int metroboxRecover(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - } - - U_BOOT_CMD(mbsetup, 1, 1, metroboxSetupVars, -- "Set environment to factory defaults", NULL); -+ "Set environment to factory defaults", ""); - - U_BOOT_CMD(mbrecover, 1, 1, metroboxRecover, -- "Set environment to allow for fs recovery", NULL); -+ "Set environment to allow for fs recovery", ""); -diff --git a/board/sbc2410x/u-boot.lds b/board/sbc2410x/u-boot.lds -deleted file mode 100644 -index 12aca2e..0000000 ---- a/board/sbc2410x/u-boot.lds -+++ /dev/null -@@ -1,56 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/ --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm920t/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/sbc8349/sbc8349.c b/board/sbc8349/sbc8349.c -index e01cb03..34861d4 100644 ---- a/board/sbc8349/sbc8349.c -+++ b/board/sbc8349/sbc8349.c -@@ -39,7 +39,7 @@ - int fixed_sdram(void); - void sdram_init(void); - --#if defined(CONFIG_DDR_ECC) && defined(CONFIG_MPC83XX) -+#if defined(CONFIG_DDR_ECC) && defined(CONFIG_MPC83xx) - void ddr_enable_ecc(unsigned int dram_size); - #endif - -diff --git a/board/scb9328/u-boot.lds b/board/scb9328/u-boot.lds -deleted file mode 100644 -index d912d93..0000000 ---- a/board/scb9328/u-boot.lds -+++ /dev/null -@@ -1,57 +0,0 @@ --/* -- * (C) Copyright 2000-2004 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- * -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm920t/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/shannon/u-boot.lds b/board/shannon/u-boot.lds -deleted file mode 100644 -index 13b7bb7..0000000 ---- a/board/shannon/u-boot.lds -+++ /dev/null -@@ -1,56 +0,0 @@ --/* -- * (C) Copyright 2000 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/sa1100/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/siemens/SMN42/u-boot.lds b/board/siemens/SMN42/u-boot.lds -deleted file mode 100644 -index cb5a3ba..0000000 ---- a/board/siemens/SMN42/u-boot.lds -+++ /dev/null -@@ -1,55 +0,0 @@ --/* -- * (C) Copyright 2000 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm720t/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/siemens/common/fpga.c b/board/siemens/common/fpga.c -index c9a93e1..4b45902 100644 ---- a/board/siemens/common/fpga.c -+++ b/board/siemens/common/fpga.c -@@ -295,7 +295,7 @@ U_BOOT_CMD( - "access FPGA(s)", - "fpga status [name] - print FPGA status\n" - "fpga reset [name] - reset FPGA\n" -- "fpga load [name] addr - load FPGA configuration data\n" -+ "fpga load [name] addr - load FPGA configuration data" - ); - - #endif -diff --git a/board/siemens/pcu_e/pcu_e.c b/board/siemens/pcu_e/pcu_e.c -index f87d6bc..827578c 100644 ---- a/board/siemens/pcu_e/pcu_e.c -+++ b/board/siemens/pcu_e/pcu_e.c -@@ -404,10 +404,10 @@ int do_puma (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - } - - U_BOOT_CMD (puma, 4, 1, do_puma, -- "access PUMA FPGA", -- "status - print PUMA status\n" -- "puma load addr len - load PUMA configuration data\n"); -- -+ "access PUMA FPGA", -+ "status - print PUMA status\n" -+ "puma load addr len - load PUMA configuration data" -+); - #endif - - /* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . */ -diff --git a/board/ssv/common/cmd_sled.c b/board/ssv/common/cmd_sled.c -index 99ff507..449c1a4 100644 ---- a/board/ssv/common/cmd_sled.c -+++ b/board/ssv/common/cmd_sled.c -@@ -157,6 +157,6 @@ int do_sled (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - - U_BOOT_CMD (sled, 3, 0, do_sled, - "check and set status led", -- "sled [name [state]]\n" __NAME_STR " - state: on|off|blink\n"); -+ "sled [name [state]]\n" __NAME_STR " - state: on|off|blink"); - #endif - #endif /* CONFIG_STATUS_LED */ -diff --git a/board/ssv/common/wd_pio.c b/board/ssv/common/wd_pio.c -index 9b38425..eaf1d25 100644 ---- a/board/ssv/common/wd_pio.c -+++ b/board/ssv/common/wd_pio.c -@@ -154,7 +154,7 @@ U_BOOT_CMD( - "check and set watchdog", - "on - switch watchDog on\n" - "wd off - switch watchdog off\n" -- "wd - print current status\n" -+ "wd - print current status" - ); - #endif - #endif /* CONFIG_HW_WATCHDOG */ -diff --git a/board/st/nmdk8815/u-boot.lds b/board/st/nmdk8815/u-boot.lds -deleted file mode 100644 -index 0925e4f..0000000 ---- a/board/st/nmdk8815/u-boot.lds -+++ /dev/null -@@ -1,51 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- . = ALIGN(4); -- .text : -- { -- cpu/arm926ejs/start.o (.text) -- *(.text) -- } -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- . = ALIGN(4); -- .data : { *(.data) } -- . = ALIGN(4); -- .got : { *(.got) } -- -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/sx1/u-boot.lds b/board/sx1/u-boot.lds -deleted file mode 100644 -index af0b4d0..0000000 ---- a/board/sx1/u-boot.lds -+++ /dev/null -@@ -1,57 +0,0 @@ --/* -- * (C) Copyright 2004 -- * Wolfgang Denk, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/ --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm925t/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/tqc/tqm5200/cmd_stk52xx.c b/board/tqc/tqm5200/cmd_stk52xx.c -index 20632a7..e309beb 100644 ---- a/board/tqc/tqm5200/cmd_stk52xx.c -+++ b/board/tqc/tqm5200/cmd_stk52xx.c -@@ -1201,21 +1201,21 @@ U_BOOT_CMD( - "sound square [duration] [freq] [channel]\n" - " - generate squarewave for 'duration' ms with frequency 'freq'\n" - " on left \"l\" or right \"r\" channel\n" -- "pcm1772 reg val\n" -+ "pcm1772 reg val" - ); - - U_BOOT_CMD( - wav , 3, 1, cmd_wav, - "play wav file", - "[addr] [bytes]\n" -- " - play wav file at address 'addr' with length 'bytes'\n" -+ " - play wav file at address 'addr' with length 'bytes'" - ); - - U_BOOT_CMD( - beep , 2, 1, cmd_beep, - "play short beep", - "[channel]\n" -- " - play short beep on \"l\"eft or \"r\"ight channel\n" -+ " - play short beep on \"l\"eft or \"r\"ight channel" - ); - #endif /* CONFIG_STK52XX || CONFIG_FO300 */ - -@@ -1228,10 +1228,11 @@ U_BOOT_CMD( - "fkt can\n" - " - loopback plug for X83 required\n" - "fkt rs232 number\n" -- " - loopback plug(s) for X2 required\n" -+ " - loopback plug(s) for X2 required" - #ifndef CONFIG_TQM5200S -+ "\n" - "fkt backlight on/off\n" -- " - switch backlight on or off\n" -+ " - switch backlight on or off" - #endif /* !CONFIG_TQM5200S */ - ); - #elif defined(CONFIG_FO300) -@@ -1241,7 +1242,7 @@ U_BOOT_CMD( - "fkt can\n" - " - loopback plug for X16/X29 required\n" - "fkt rs232 number\n" -- " - loopback plug(s) for X21/X22 required\n" -+ " - loopback plug(s) for X21/X22 required" - ); - #endif - #endif -diff --git a/board/tqc/tqm5200/cmd_tb5200.c b/board/tqc/tqm5200/cmd_tb5200.c -index b9c9e7e..578e716 100644 ---- a/board/tqc/tqm5200/cmd_tb5200.c -+++ b/board/tqc/tqm5200/cmd_tb5200.c -@@ -91,13 +91,13 @@ int cmd_backlight(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - led , 2, 1, cmd_led, - "switch status LED on or off", -- "on/off\n" -+ "on/off" - ); - - U_BOOT_CMD( - backlight , 2, 1, cmd_backlight, - "switch backlight on or off", -- "on/off\n" -+ "on/off" - ); - - #endif /* CONFIG_STK52XX */ -diff --git a/board/tqc/tqm8272/tqm8272.c b/board/tqc/tqm8272/tqm8272.c -index 5bc080f..92f74a3 100644 ---- a/board/tqc/tqm8272/tqm8272.c -+++ b/board/tqc/tqm8272/tqm8272.c -@@ -867,7 +867,7 @@ int do_hwib_dump (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - hwib, 1, 1, do_hwib_dump, - "dump HWIB'", -- "\n" -+ "" - ); - - #ifdef CONFIG_SYS_UPDATE_FLASH_SIZE -diff --git a/board/tqc/tqm834x/pci.c b/board/tqc/tqm834x/pci.c -index cb2cb8d..6c113e3 100644 ---- a/board/tqc/tqm834x/pci.c -+++ b/board/tqc/tqm834x/pci.c -@@ -24,7 +24,15 @@ - - #include - #include -+#include - #include -+#include -+#if defined(CONFIG_OF_LIBFDT) -+#include -+#include -+#endif -+ -+DECLARE_GLOBAL_DATA_PTR; - - #ifdef CONFIG_PCI - -@@ -217,4 +225,41 @@ pci_init_board(void) - */ - hose->last_busno = pci_hose_scan(hose); - } -+ -+#if defined(CONFIG_OF_LIBFDT) -+void ft_pci_setup(void *blob, bd_t *bd) -+{ -+ int nodeoffset; -+ int tmp[2]; -+ const char *path; -+ -+ nodeoffset = fdt_path_offset(blob, "/aliases"); -+ if (nodeoffset >= 0) { -+ path = fdt_getprop(blob, nodeoffset, "pci0", NULL); -+ if (path) { -+ tmp[0] = cpu_to_be32(pci1_hose.first_busno); -+ tmp[1] = cpu_to_be32(pci1_hose.last_busno); -+ do_fixup_by_path(blob, path, "bus-range", -+ &tmp, sizeof(tmp), 1); -+ -+ tmp[0] = cpu_to_be32(gd->pci_clk); -+ do_fixup_by_path(blob, path, "clock-frequency", -+ &tmp, sizeof(tmp[0]), 1); -+ } -+#ifdef CONFIG_MPC83XX_PCI2 -+ path = fdt_getprop(blob, nodeoffset, "pci1", NULL); -+ if (path) { -+ tmp[0] = cpu_to_be32(pci2_hose.first_busno); -+ tmp[1] = cpu_to_be32(pci2_hose.last_busno); -+ do_fixup_by_path(blob, path, "bus-range", -+ &tmp, sizeof(tmp), 1); -+ -+ tmp[0] = cpu_to_be32(gd->pci_clk); -+ do_fixup_by_path(blob, path, "clock-frequency", -+ &tmp, sizeof(tmp[0]), 1); -+ } -+#endif -+ } -+} -+#endif /* CONFIG_OF_LIBFDT */ - #endif /* CONFIG_PCI */ -diff --git a/board/tqc/tqm834x/tqm834x.c b/board/tqc/tqm834x/tqm834x.c -index 106cac2..4fd8cd6 100644 ---- a/board/tqc/tqm834x/tqm834x.c -+++ b/board/tqc/tqm834x/tqm834x.c -@@ -431,3 +431,14 @@ static void set_ddr_config(void) { - #endif - } - } -+ -+#ifdef CONFIG_OF_BOARD_SETUP -+void ft_board_setup(void *blob, bd_t *bd) -+{ -+ ft_cpu_setup(blob, bd); -+ -+#ifdef CONFIG_PCI -+ ft_pci_setup(blob, bd); -+#endif /* CONFIG_PCI */ -+} -+#endif /* CONFIG_OF_BOARD_SETUP */ -diff --git a/board/trab/cmd_trab.c b/board/trab/cmd_trab.c -index 7e2a672..d0465fb 100644 ---- a/board/trab/cmd_trab.c -+++ b/board/trab/cmd_trab.c -@@ -262,7 +262,7 @@ U_BOOT_CMD( - "\n" - " - start burn-in test application\n" - " The burn-in test could took a while to finish!\n" -- " The content of the onboard EEPROM is modified!\n" -+ " The content of the onboard EEPROM is modified!" - ); - - -@@ -295,7 +295,7 @@ U_BOOT_CMD( - "read dip switch on TRAB", - "\n" - " - read state of dip switch (S1) on TRAB board\n" -- " read sequence: 1-2-3-4; ON=1; OFF=0; e.g.: \"0100\"\n" -+ " read sequence: 1-2-3-4; ON=1; OFF=0; e.g.: \"0100\"" - ); - - -@@ -323,7 +323,7 @@ U_BOOT_CMD( - vcc5v, 1, 1, do_vcc5v, - "read VCC5V on TRAB", - "\n" -- " - read actual value of voltage VCC5V\n" -+ " - read actual value of voltage VCC5V" - ); - - -@@ -347,7 +347,7 @@ int do_contact_temp (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - c_temp, 1, 1, do_contact_temp, - "read contact temperature on TRAB", -- "\n" -+ "" - " - reads the onboard temperature (=contact temperature)\n" - ); - -@@ -401,7 +401,7 @@ U_BOOT_CMD( - "print burn in status on TRAB", - "\n" - " - prints the status variables of the last burn in test\n" -- " stored in the onboard EEPROM on TRAB board\n" -+ " stored in the onboard EEPROM on TRAB board" - ); - - static int read_dip (void) -@@ -890,7 +890,7 @@ U_BOOT_CMD( - "delay\n" - " - contact temperature [1/100 C] is printed endlessly to console\n" - " specifies the seconds to wait between two measurements\n" -- " For each measurment a timestamp is printeted\n" -+ " For each measurment a timestamp is printeted" - ); - - #endif -diff --git a/board/trab/config.mk b/board/trab/config.mk -index 7a5de60..88f3beb 100644 ---- a/board/trab/config.mk -+++ b/board/trab/config.mk -@@ -24,3 +24,5 @@ sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - ifndef TEXT_BASE - TEXT_BASE = 0x0DF40000 - endif -+ -+LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot.lds -diff --git a/board/trab/trab.c b/board/trab/trab.c -index 5359065..ddf6abf 100644 ---- a/board/trab/trab.c -+++ b/board/trab/trab.c -@@ -323,7 +323,7 @@ int do_kbd (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - kbd, 1, 1, do_kbd, - "read keyboard status", -- NULL -+ "" - ); - - #ifdef CONFIG_MODEM_SUPPORT -diff --git a/board/trizepsiv/eeprom.c b/board/trizepsiv/eeprom.c -index 9fa7aef..b6b16bf 100644 ---- a/board/trizepsiv/eeprom.c -+++ b/board/trizepsiv/eeprom.c -@@ -81,4 +81,5 @@ U_BOOT_CMD( - "\tdm9000ee read \n" - "\tword:\t\t00-02 : MAC Address\n" - "\t\t\t03-07 : DM9000 Configuration\n" -- "\t\t\t08-63 : User data\n"); -+ "\t\t\t08-63 : User data" -+); -diff --git a/board/trizepsiv/u-boot.lds b/board/trizepsiv/u-boot.lds -deleted file mode 100644 -index a077bc5..0000000 ---- a/board/trizepsiv/u-boot.lds -+++ /dev/null -@@ -1,56 +0,0 @@ --/* -- * (C) Copyright 2000 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/pxa/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/voiceblue/u-boot.lds b/board/voiceblue/u-boot.lds -deleted file mode 100644 -index c60cb2b..0000000 ---- a/board/voiceblue/u-boot.lds -+++ /dev/null -@@ -1,56 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm925t/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/voiceblue/voiceblue.c b/board/voiceblue/voiceblue.c -index c8dde36..59b3310 100644 ---- a/board/voiceblue/voiceblue.c -+++ b/board/voiceblue/voiceblue.c -@@ -43,7 +43,7 @@ int dram_init(void) - /* Take the Ethernet controller out of reset and wait - * for the EEPROM load to complete. */ - *((volatile unsigned short *) GPIO_DATA_OUTPUT_REG) |= 0x80; -- udelay(10); /* doesn't work before interrupt_init call */ -+ udelay(10); /* doesn't work before timer_init call */ - *((volatile unsigned short *) GPIO_DATA_OUTPUT_REG) &= ~0x80; - udelay(500); - -diff --git a/board/w7o/cmd_vpd.c b/board/w7o/cmd_vpd.c -index eaec940..013fc79 100644 ---- a/board/w7o/cmd_vpd.c -+++ b/board/w7o/cmd_vpd.c -@@ -60,7 +60,7 @@ U_BOOT_CMD( - vpd, 2, 1, do_vpd, - "Read Vital Product Data", - "[dev_addr]\n" -- " - Read VPD Data from default address, or device address 'dev_addr'.\n" -+ " - Read VPD Data from default address, or device address 'dev_addr'." - ); - - #endif -diff --git a/board/wepep250/u-boot.lds b/board/wepep250/u-boot.lds -deleted file mode 100644 -index a077bc5..0000000 ---- a/board/wepep250/u-boot.lds -+++ /dev/null -@@ -1,56 +0,0 @@ --/* -- * (C) Copyright 2000 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/pxa/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/xaeniax/u-boot.lds b/board/xaeniax/u-boot.lds -deleted file mode 100644 -index a077bc5..0000000 ---- a/board/xaeniax/u-boot.lds -+++ /dev/null -@@ -1,56 +0,0 @@ --/* -- * (C) Copyright 2000 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/pxa/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/xes/common/Makefile b/board/xes/common/Makefile -index e7620f4..d022831 100644 ---- a/board/xes/common/Makefile -+++ b/board/xes/common/Makefile -@@ -29,9 +29,10 @@ endif - - LIB = $(obj)lib$(VENDOR).a - --COBJS-$(CONFIG_FSL_PCI_INIT) += fsl_85xx_pci.o --COBJS-$(CONFIG_MPC8572) += fsl_8572_clk.o --COBJS-$(CONFIG_MPC85xx) += fsl_85xx_ddr.o -+COBJS-$(CONFIG_FSL_PCI_INIT) += fsl_8xxx_pci.o -+COBJS-$(CONFIG_MPC8572) += fsl_8xxx_clk.o -+COBJS-$(CONFIG_MPC86xx) += fsl_8xxx_clk.o -+COBJS-$(CONFIG_FSL_DDR2) += fsl_8xxx_ddr.o - COBJS-$(CONFIG_NAND_ACTL) += actl_nand.o - - SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) -diff --git a/board/xes/common/fsl_8572_clk.c b/board/xes/common/fsl_8572_clk.c -deleted file mode 100644 -index f5df2da..0000000 ---- a/board/xes/common/fsl_8572_clk.c -+++ /dev/null -@@ -1,51 +0,0 @@ --/* -- * Copyright 2008 Extreme Engineering Solutions, Inc. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include -- --/* -- * Return SYSCLK input frequency - 50 MHz or 66 MHz depending on POR config -- */ --unsigned long get_board_sys_clk(ulong dummy) --{ -- volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); -- u32 gpporcr = gur->gpporcr; -- -- if (gpporcr & 0x10000) -- return 66666666; -- else -- return 50000000; --} -- --/* -- * Return DDR input clock - synchronous with SYSCLK or 66 MHz -- */ --unsigned long get_board_ddr_clk(ulong dummy) --{ -- volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); -- u32 ddr_ratio = ((gur->porpllsr) & 0x00003e00) >> 9; -- -- if (ddr_ratio == 0x7) -- return get_board_sys_clk(dummy); -- -- return 66666666; --} -diff --git a/board/xes/common/fsl_85xx_ddr.c b/board/xes/common/fsl_85xx_ddr.c -deleted file mode 100644 -index 30b4767..0000000 ---- a/board/xes/common/fsl_85xx_ddr.c -+++ /dev/null -@@ -1,93 +0,0 @@ --/* -- * Copyright 2008 Extreme Engineering Solutions, Inc. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --#include --#include -- --#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) --extern void ddr_enable_ecc(unsigned int dram_size); --#endif -- --phys_size_t initdram(int board_type) --{ -- phys_size_t dram_size = fsl_ddr_sdram(); -- -- dram_size = setup_ddr_tlbs(dram_size / 0x100000); -- -- dram_size *= 0x100000; -- --#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) -- /* Initialize and enable DDR ECC */ -- ddr_enable_ecc(dram_size); --#endif -- -- return dram_size; --} -- --#if defined(CONFIG_DDR_ECC) || (CONFIG_NUM_DDR_CONTROLLERS > 1) --void board_add_ram_info(int use_default) --{ --#if (CONFIG_NUM_DDR_CONTROLLERS > 1) -- volatile ccsr_ddr_t *ddr1 = (void *)(CONFIG_SYS_MPC85xx_DDR_ADDR); --#endif -- -- puts(" ("); -- --#if (CONFIG_NUM_DDR_CONTROLLERS > 1) -- /* Print interleaving information */ -- if (ddr1->cs0_config & 0x20000000) { -- switch ((ddr1->cs0_config >> 24) & 0xf) { -- case 0: -- puts("cache line"); -- break; -- case 1: -- puts("page"); -- break; -- case 2: -- puts("bank"); -- break; -- case 3: -- puts("super-bank"); -- break; -- default: -- puts("invalid"); -- break; -- } -- } else { -- puts("no"); -- } -- -- puts(" interleaving"); --#endif -- --#if (CONFIG_NUM_DDR_CONTROLLERS > 1) && defined(CONFIG_DDR_ECC) -- puts(", "); --#endif -- --#if defined(CONFIG_DDR_ECC) -- puts("ECC enabled"); --#endif -- -- puts(")"); --} --#endif /* CONFIG_DDR_ECC || CONFIG_NUM_DDR_CONTROLLERS > 1 */ -diff --git a/board/xes/common/fsl_85xx_pci.c b/board/xes/common/fsl_85xx_pci.c -deleted file mode 100644 -index af34fe6..0000000 ---- a/board/xes/common/fsl_85xx_pci.c -+++ /dev/null -@@ -1,372 +0,0 @@ --/* -- * Copyright 2008 Extreme Engineering Solutions, Inc. -- * Copyright 2007-2008 Freescale Semiconductor, Inc. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --#include --#include --#include --#include --#include -- --int first_free_busno = 0; -- --#ifdef CONFIG_PCI1 --static struct pci_controller pci1_hose; --#endif --#ifdef CONFIG_PCIE1 --static struct pci_controller pcie1_hose; --#endif --#ifdef CONFIG_PCIE2 --static struct pci_controller pcie2_hose; --#endif --#ifdef CONFIG_PCIE3 --static struct pci_controller pcie3_hose; --#endif -- --#ifdef CONFIG_MPC8572 --/* Correlate host/agent POR bits to usable info. Table 4-14 */ --struct host_agent_cfg_t { -- uchar pcie_root[3]; -- uchar rio_host; --} host_agent_cfg[8] = { -- {{0, 0, 0}, 0}, -- {{0, 1, 1}, 1}, -- {{1, 0, 1}, 0}, -- {{1, 1, 0}, 1}, -- {{0, 0, 1}, 0}, -- {{0, 1, 0}, 1}, -- {{1, 0, 0}, 0}, -- {{1, 1, 1}, 1} --}; -- --/* Correlate port width POR bits to usable info. Table 4-15 */ --struct io_port_cfg_t { -- uchar pcie_width[3]; -- uchar rio_width; --} io_port_cfg[16] = { -- {{0, 0, 0}, 0}, -- {{0, 0, 0}, 0}, -- {{4, 0, 0}, 0}, -- {{4, 4, 0}, 0}, -- {{0, 0, 0}, 0}, -- {{0, 0, 0}, 0}, -- {{0, 0, 0}, 4}, -- {{4, 2, 2}, 0}, -- {{0, 0, 0}, 0}, -- {{0, 0, 0}, 0}, -- {{0, 0, 0}, 0}, -- {{4, 0, 0}, 4}, -- {{4, 0, 0}, 4}, -- {{0, 0, 0}, 4}, -- {{0, 0, 0}, 4}, -- {{8, 0, 0}, 0}, --}; --#elif defined CONFIG_MPC8548 --/* Correlate host/agent POR bits to usable info. Table 4-12 */ --struct host_agent_cfg_t { -- uchar pci_host[2]; -- uchar pcie_root[1]; -- uchar rio_host; --} host_agent_cfg[8] = { -- {{1, 1}, {0}, 0}, -- {{1, 1}, {1}, 0}, -- {{1, 1}, {0}, 1}, -- {{0, 0}, {0}, 0}, /* reserved */ -- {{0, 1}, {1}, 0}, -- {{1, 1}, {1}, 0}, -- {{0, 1}, {1}, 1}, -- {{1, 1}, {1}, 1} --}; -- --/* Correlate port width POR bits to usable info. Table 4-13 */ --struct io_port_cfg_t { -- uchar pcie_width[1]; -- uchar rio_width; --} io_port_cfg[8] = { -- {{0}, 0}, -- {{0}, 0}, -- {{0}, 0}, -- {{4}, 4}, -- {{4}, 4}, -- {{0}, 4}, -- {{0}, 4}, -- {{8}, 0}, --}; --#endif -- --void pci_init_board(void) --{ -- struct pci_controller *hose; -- volatile ccsr_fsl_pci_t *pci; -- int width; -- int host; -- volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); -- uint devdisr = gur->devdisr; -- uint io_sel = (gur->pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19; -- uint host_agent = (gur->porbmsr & MPC85xx_PORBMSR_HA) >> 16; -- struct pci_region *r; -- --#ifdef CONFIG_PCI1 -- uint pci_spd_norm = (gur->pordevsr & MPC85xx_PORDEVSR_PCI1_SPD); -- uint pci_32 = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_PCI32; -- uint pci_arb = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_ARB; -- uint pcix = gur->pordevsr & MPC85xx_PORDEVSR_PCI1; -- uint freq = CONFIG_SYS_CLK_FREQ / 1000 / 1000; -- -- width = 0; /* Silence compiler warning... */ -- io_sel &= 0xf; /* Silence compiler warning... */ -- pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI1_ADDR; -- hose = &pci1_hose; -- host = host_agent_cfg[host_agent].pci_host[0]; -- r = hose->regions; -- -- -- if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { -- printf("\n PCI1: %d bit %s, %s %d MHz, %s, %s\n", -- pci_32 ? 32 : 64, -- pcix ? "PCIX" : "PCI", -- pci_spd_norm ? ">=" : "<=", -- pcix ? freq * 2 : freq, -- host ? "host" : "agent", -- pci_arb ? "arbiter" : "external-arbiter"); -- -- /* inbound */ -- r += fsl_pci_setup_inbound_windows(r); -- -- /* outbound memory */ -- pci_set_region(r++, -- CONFIG_SYS_PCI1_MEM_BASE, -- CONFIG_SYS_PCI1_MEM_PHYS, -- CONFIG_SYS_PCI1_MEM_SIZE, -- PCI_REGION_MEM); -- -- /* outbound io */ -- pci_set_region(r++, -- CONFIG_SYS_PCI1_IO_BASE, -- CONFIG_SYS_PCI1_IO_PHYS, -- CONFIG_SYS_PCI1_IO_SIZE, -- PCI_REGION_IO); -- -- hose->region_count = r - hose->regions; -- -- hose->first_busno = first_free_busno; -- pci_setup_indirect(hose, (int)&pci->cfg_addr, -- (int)&pci->cfg_data); -- -- fsl_pci_init(hose); -- -- /* Unlock inbound PCI configuration cycles */ -- if (!host) -- fsl_pci_config_unlock(hose); -- -- first_free_busno = hose->last_busno + 1; -- printf(" PCI1 on bus %02x - %02x\n", -- hose->first_busno, hose->last_busno); -- } else { -- printf(" PCI1: disabled\n"); -- } --#elif defined CONFIG_MPC8548 -- /* PCI1 not present on MPC8572 */ -- gur->devdisr |= MPC85xx_DEVDISR_PCI1; /* disable */ --#endif --#ifdef CONFIG_PCIE1 -- pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR; -- hose = &pcie1_hose; -- host = host_agent_cfg[host_agent].pcie_root[0]; -- width = io_port_cfg[io_sel].pcie_width[0]; -- r = hose->regions; -- -- if (width && !(devdisr & MPC85xx_DEVDISR_PCIE)) { -- printf("\n PCIE1 connected as %s (x%d)", -- host ? "Root Complex" : "End Point", width); -- if (pci->pme_msg_det) { -- pci->pme_msg_det = 0xffffffff; -- debug(" with errors. Clearing. Now 0x%08x", -- pci->pme_msg_det); -- } -- printf("\n"); -- -- /* inbound */ -- r += fsl_pci_setup_inbound_windows(r); -- -- /* outbound memory */ -- pci_set_region(r++, -- CONFIG_SYS_PCIE1_MEM_BASE, -- CONFIG_SYS_PCIE1_MEM_PHYS, -- CONFIG_SYS_PCIE1_MEM_SIZE, -- PCI_REGION_MEM); -- -- /* outbound io */ -- pci_set_region(r++, -- CONFIG_SYS_PCIE1_IO_BASE, -- CONFIG_SYS_PCIE1_IO_PHYS, -- CONFIG_SYS_PCIE1_IO_SIZE, -- PCI_REGION_IO); -- -- hose->region_count = r - hose->regions; -- -- hose->first_busno = first_free_busno; -- pci_setup_indirect(hose, (int)&pci->cfg_addr, -- (int) &pci->cfg_data); -- -- fsl_pci_init(hose); -- -- /* Unlock inbound PCI configuration cycles */ -- if (!host) -- fsl_pci_config_unlock(hose); -- -- first_free_busno = hose->last_busno + 1; -- printf(" PCIE1 on bus %02x - %02x\n", -- hose->first_busno, hose->last_busno); -- } --#else -- gur->devdisr |= MPC85xx_DEVDISR_PCIE; /* disable */ --#endif /* CONFIG_PCIE1 */ -- --#ifdef CONFIG_PCIE2 -- pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE2_ADDR; -- hose = &pcie2_hose; -- host = host_agent_cfg[host_agent].pcie_root[1]; -- width = io_port_cfg[io_sel].pcie_width[1]; -- r = hose->regions; -- -- if (width && !(devdisr & MPC85xx_DEVDISR_PCIE2)) { -- printf("\n PCIE2 connected as %s (x%d)", -- host ? "Root Complex" : "End Point", width); -- if (pci->pme_msg_det) { -- pci->pme_msg_det = 0xffffffff; -- debug(" with errors. Clearing. Now 0x%08x", -- pci->pme_msg_det); -- } -- printf("\n"); -- -- /* inbound */ -- r += fsl_pci_setup_inbound_windows(r); -- -- /* outbound memory */ -- pci_set_region(r++, -- CONFIG_SYS_PCIE2_MEM_BASE, -- CONFIG_SYS_PCIE2_MEM_PHYS, -- CONFIG_SYS_PCIE2_MEM_SIZE, -- PCI_REGION_MEM); -- -- /* outbound io */ -- pci_set_region(r++, -- CONFIG_SYS_PCIE2_IO_BASE, -- CONFIG_SYS_PCIE2_IO_PHYS, -- CONFIG_SYS_PCIE2_IO_SIZE, -- PCI_REGION_IO); -- -- hose->region_count = r - hose->regions; -- -- hose->first_busno = first_free_busno; -- pci_setup_indirect(hose, (int)&pci->cfg_addr, -- (int)&pci->cfg_data); -- -- fsl_pci_init(hose); -- -- /* Unlock inbound PCI configuration cycles */ -- if (!host) -- fsl_pci_config_unlock(hose); -- -- first_free_busno = hose->last_busno + 1; -- printf(" PCIE2 on bus %02x - %02x\n", -- hose->first_busno, hose->last_busno); -- } --#else -- gur->devdisr |= MPC85xx_DEVDISR_PCIE2; /* disable */ --#endif /* CONFIG_PCIE2 */ -- --#ifdef CONFIG_PCIE3 -- pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE3_ADDR; -- hose = &pcie3_hose; -- host = host_agent_cfg[host_agent].pcie_root[2]; -- width = io_port_cfg[io_sel].pcie_width[2]; -- r = hose->regions; -- -- if (width && !(devdisr & MPC85xx_DEVDISR_PCIE3)) { -- printf("\n PCIE3 connected as %s (x%d)", -- host ? "Root Complex" : "End Point", width); -- if (pci->pme_msg_det) { -- pci->pme_msg_det = 0xffffffff; -- debug(" with errors. Clearing. Now 0x%08x", -- pci->pme_msg_det); -- } -- printf("\n"); -- -- /* inbound */ -- r += fsl_pci_setup_inbound_windows(r); -- -- /* outbound memory */ -- pci_set_region(r++, -- CONFIG_SYS_PCIE3_MEM_BASE, -- CONFIG_SYS_PCIE3_MEM_PHYS, -- CONFIG_SYS_PCIE3_MEM_SIZE, -- PCI_REGION_MEM); -- -- /* outbound io */ -- pci_set_region(r++, -- CONFIG_SYS_PCIE3_IO_BASE, -- CONFIG_SYS_PCIE3_IO_PHYS, -- CONFIG_SYS_PCIE3_IO_SIZE, -- PCI_REGION_IO); -- -- hose->region_count = r - hose->regions; -- -- hose->first_busno = first_free_busno; -- pci_setup_indirect(hose, (int)&pci->cfg_addr, -- (int)&pci->cfg_data); -- -- fsl_pci_init(hose); -- -- /* Unlock inbound PCI configuration cycles */ -- if (!host) -- fsl_pci_config_unlock(hose); -- -- first_free_busno = hose->last_busno + 1; -- printf(" PCIE3 on bus %02x - %02x\n", -- hose->first_busno, hose->last_busno); -- } --#else -- gur->devdisr |= MPC85xx_DEVDISR_PCIE3; /* disable */ --#endif /* CONFIG_PCIE3 */ --} -- --#if defined(CONFIG_OF_BOARD_SETUP) --void ft_board_pci_setup(void *blob, bd_t *bd) --{ -- /* TODO - make node name (eg pci0) dynamic */ --#ifdef CONFIG_PCI1 -- ft_fsl_pci_setup(blob, "pci0", &pci1_hose); --#endif --#ifdef CONFIG_PCIE1 -- ft_fsl_pci_setup(blob, "pci2", &pcie1_hose); --#endif --#ifdef CONFIG_PCIE2 -- ft_fsl_pci_setup(blob, "pci1", &pcie2_hose); --#endif --#ifdef CONFIG_PCIE3 -- ft_fsl_pci_setup(blob, "pci0", &pcie3_hose); --#endif --} --#endif /* CONFIG_OF_BOARD_SETUP */ -diff --git a/board/xes/common/fsl_8xxx_clk.c b/board/xes/common/fsl_8xxx_clk.c -new file mode 100644 -index 0000000..0155670 ---- /dev/null -+++ b/board/xes/common/fsl_8xxx_clk.c -@@ -0,0 +1,59 @@ -+/* -+ * Copyright 2008 Extreme Engineering Solutions, Inc. -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+ -+/* -+ * Return SYSCLK input frequency - 50 MHz or 66 MHz depending on POR config -+ */ -+unsigned long get_board_sys_clk(ulong dummy) -+{ -+#if defined(CONFIG_MPC85xx) -+ volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); -+#elif defined(CONFIG_MPC86xx) -+ immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; -+ volatile ccsr_gur_t *gur = &immap->im_gur; -+#endif -+ u32 gpporcr = gur->gpporcr; -+ -+ if (gpporcr & 0x10000) -+ return 66666666; -+ else -+ return 50000000; -+} -+ -+#ifdef CONFIG_MPC85xx -+/* -+ * Return DDR input clock - synchronous with SYSCLK or 66 MHz -+ * Note: 86xx doesn't support asynchronous DDR clk -+ */ -+unsigned long get_board_ddr_clk(ulong dummy) -+{ -+ volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); -+ u32 ddr_ratio = ((gur->porpllsr) & 0x00003e00) >> 9; -+ -+ if (ddr_ratio == 0x7) -+ return get_board_sys_clk(dummy); -+ -+ return 66666666; -+} -+#endif -diff --git a/board/xes/common/fsl_8xxx_ddr.c b/board/xes/common/fsl_8xxx_ddr.c -new file mode 100644 -index 0000000..ec64efa ---- /dev/null -+++ b/board/xes/common/fsl_8xxx_ddr.c -@@ -0,0 +1,99 @@ -+/* -+ * Copyright 2008 Extreme Engineering Solutions, Inc. -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+#include -+#include -+ -+#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) -+extern void ddr_enable_ecc(unsigned int dram_size); -+#endif -+ -+phys_size_t initdram(int board_type) -+{ -+ phys_size_t dram_size = fsl_ddr_sdram(); -+ -+#ifdef CONFIG_MPC85xx -+ dram_size = setup_ddr_tlbs(dram_size / 0x100000); -+ dram_size *= 0x100000; -+#endif -+ -+#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) -+ /* Initialize and enable DDR ECC */ -+ ddr_enable_ecc(dram_size); -+#endif -+ -+ return dram_size; -+} -+ -+#if defined(CONFIG_DDR_ECC) || (CONFIG_NUM_DDR_CONTROLLERS > 1) -+void board_add_ram_info(int use_default) -+{ -+#if (CONFIG_NUM_DDR_CONTROLLERS > 1) -+#if defined(CONFIG_MPC85xx) -+ volatile ccsr_ddr_t *ddr1 = (void *)(CONFIG_SYS_MPC85xx_DDR_ADDR); -+#elif defined(CONFIG_MPC86xx) -+ volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; -+ volatile ccsr_ddr_t *ddr1 = &immap->im_ddr1; -+#endif -+#endif -+ -+ puts(" ("); -+ -+#if (CONFIG_NUM_DDR_CONTROLLERS > 1) -+ /* Print interleaving information */ -+ if (ddr1->cs0_config & 0x20000000) { -+ switch ((ddr1->cs0_config >> 24) & 0xf) { -+ case 0: -+ puts("cache line"); -+ break; -+ case 1: -+ puts("page"); -+ break; -+ case 2: -+ puts("bank"); -+ break; -+ case 3: -+ puts("super-bank"); -+ break; -+ default: -+ puts("invalid"); -+ break; -+ } -+ } else { -+ puts("no"); -+ } -+ -+ puts(" interleaving"); -+#endif -+ -+#if (CONFIG_NUM_DDR_CONTROLLERS > 1) && defined(CONFIG_DDR_ECC) -+ puts(", "); -+#endif -+ -+#if defined(CONFIG_DDR_ECC) -+ puts("ECC enabled"); -+#endif -+ -+ puts(")"); -+} -+#endif /* CONFIG_DDR_ECC || CONFIG_NUM_DDR_CONTROLLERS > 1 */ -diff --git a/board/xes/common/fsl_8xxx_pci.c b/board/xes/common/fsl_8xxx_pci.c -new file mode 100644 -index 0000000..025cc18 ---- /dev/null -+++ b/board/xes/common/fsl_8xxx_pci.c -@@ -0,0 +1,435 @@ -+/* -+ * Copyright 2008 Extreme Engineering Solutions, Inc. -+ * Copyright 2007-2008 Freescale Semiconductor, Inc. -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+int first_free_busno = 0; -+ -+#ifdef CONFIG_PCI1 -+static struct pci_controller pci1_hose; -+#endif -+#ifdef CONFIG_PCIE1 -+static struct pci_controller pcie1_hose; -+#endif -+#ifdef CONFIG_PCIE2 -+static struct pci_controller pcie2_hose; -+#endif -+#ifdef CONFIG_PCIE3 -+static struct pci_controller pcie3_hose; -+#endif -+ -+#ifdef CONFIG_MPC8572 -+/* Correlate host/agent POR bits to usable info. Table 4-14 */ -+struct host_agent_cfg_t { -+ uchar pcie_root[3]; -+ uchar rio_host; -+} host_agent_cfg[8] = { -+ {{0, 0, 0}, 0}, -+ {{0, 1, 1}, 1}, -+ {{1, 0, 1}, 0}, -+ {{1, 1, 0}, 1}, -+ {{0, 0, 1}, 0}, -+ {{0, 1, 0}, 1}, -+ {{1, 0, 0}, 0}, -+ {{1, 1, 1}, 1} -+}; -+ -+/* Correlate port width POR bits to usable info. Table 4-15 */ -+struct io_port_cfg_t { -+ uchar pcie_width[3]; -+ uchar rio_width; -+} io_port_cfg[16] = { -+ {{0, 0, 0}, 0}, -+ {{0, 0, 0}, 0}, -+ {{4, 0, 0}, 0}, -+ {{4, 4, 0}, 0}, -+ {{0, 0, 0}, 0}, -+ {{0, 0, 0}, 0}, -+ {{0, 0, 0}, 4}, -+ {{4, 2, 2}, 0}, -+ {{0, 0, 0}, 0}, -+ {{0, 0, 0}, 0}, -+ {{0, 0, 0}, 0}, -+ {{4, 0, 0}, 4}, -+ {{4, 0, 0}, 4}, -+ {{0, 0, 0}, 4}, -+ {{0, 0, 0}, 4}, -+ {{8, 0, 0}, 0}, -+}; -+#elif defined CONFIG_MPC8548 -+/* Correlate host/agent POR bits to usable info. Table 4-12 */ -+struct host_agent_cfg_t { -+ uchar pci_host[2]; -+ uchar pcie_root[1]; -+ uchar rio_host; -+} host_agent_cfg[8] = { -+ {{1, 1}, {0}, 0}, -+ {{1, 1}, {1}, 0}, -+ {{1, 1}, {0}, 1}, -+ {{0, 0}, {0}, 0}, /* reserved */ -+ {{0, 1}, {1}, 0}, -+ {{1, 1}, {1}, 0}, -+ {{0, 1}, {1}, 1}, -+ {{1, 1}, {1}, 1} -+}; -+ -+/* Correlate port width POR bits to usable info. Table 4-13 */ -+struct io_port_cfg_t { -+ uchar pcie_width[1]; -+ uchar rio_width; -+} io_port_cfg[8] = { -+ {{0}, 0}, -+ {{0}, 0}, -+ {{0}, 0}, -+ {{4}, 4}, -+ {{4}, 4}, -+ {{0}, 4}, -+ {{0}, 4}, -+ {{8}, 0}, -+}; -+#elif defined CONFIG_MPC86xx -+/* Correlate host/agent POR bits to usable info. Table 4-17 */ -+struct host_agent_cfg_t { -+ uchar pcie_root[2]; -+ uchar rio_host; -+} host_agent_cfg[8] = { -+ {{0, 0}, 0}, -+ {{1, 0}, 1}, -+ {{0, 1}, 0}, -+ {{1, 1}, 1} -+}; -+ -+/* Correlate port width POR bits to usable info. Table 4-16 */ -+struct io_port_cfg_t { -+ uchar pcie_width[2]; -+ uchar rio_width; -+} io_port_cfg[16] = { -+ {{0, 0}, 0}, -+ {{0, 0}, 0}, -+ {{8, 0}, 0}, -+ {{8, 8}, 0}, -+ {{0, 0}, 0}, -+ {{8, 0}, 4}, -+ {{8, 0}, 4}, -+ {{8, 0}, 4}, -+ {{0, 0}, 0}, -+ {{0, 0}, 4}, -+ {{0, 0}, 4}, -+ {{0, 0}, 4}, -+ {{0, 0}, 0}, -+ {{0, 0}, 0}, -+ {{0, 8}, 0}, -+ {{8, 8}, 0}, -+}; -+#endif -+ -+/* -+ * 85xx and 86xx share naming conventions, but different layout. -+ * Correlate names to CPU-specific values to share common -+ * PCI code. -+ */ -+#if defined(CONFIG_MPC85xx) -+#define MPC8xxx_DEVDISR_PCIE1 MPC85xx_DEVDISR_PCIE -+#define MPC8xxx_DEVDISR_PCIE2 MPC85xx_DEVDISR_PCIE2 -+#define MPC8xxx_DEVDISR_PCIE3 MPC85xx_DEVDISR_PCIE3 -+#define MPC8xxx_PORDEVSR_IO_SEL MPC85xx_PORDEVSR_IO_SEL -+#define MPC8xxx_PORDEVSR_IO_SEL_SHIFT MPC85xx_PORDEVSR_IO_SEL_SHIFT -+#define MPC8xxx_PORBMSR_HA MPC85xx_PORBMSR_HA -+#define MPC8xxx_PORBMSR_HA_SHIFT MPC85xx_PORBMSR_HA_SHIFT -+#elif defined(CONFIG_MPC86xx) -+#define MPC8xxx_DEVDISR_PCIE1 MPC86xx_DEVDISR_PCIEX1 -+#define MPC8xxx_DEVDISR_PCIE2 MPC86xx_DEVDISR_PCIEX2 -+#define MPC8xxx_DEVDISR_PCIE3 0 /* 8641 doesn't have PCIe3 */ -+#define MPC8xxx_PORDEVSR_IO_SEL MPC8641_PORDEVSR_IO_SEL -+#define MPC8xxx_PORDEVSR_IO_SEL_SHIFT MPC8641_PORDEVSR_IO_SEL_SHIFT -+#define MPC8xxx_PORBMSR_HA MPC8641_PORBMSR_HA -+#define MPC8xxx_PORBMSR_HA_SHIFT MPC8641_PORBMSR_HA_SHIFT -+#endif -+ -+void pci_init_board(void) -+{ -+ struct pci_controller *hose; -+ volatile ccsr_fsl_pci_t *pci; -+ int width; -+ int host; -+#if defined(CONFIG_MPC85xx) -+ volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); -+#elif defined(CONFIG_MPC86xx) -+ immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; -+ volatile ccsr_gur_t *gur = &immap->im_gur; -+#endif -+ uint devdisr = gur->devdisr; -+ uint io_sel = (gur->pordevsr & MPC8xxx_PORDEVSR_IO_SEL) >> -+ MPC8xxx_PORDEVSR_IO_SEL_SHIFT; -+ uint host_agent = (gur->porbmsr & MPC8xxx_PORBMSR_HA) >> -+ MPC8xxx_PORBMSR_HA_SHIFT; -+ struct pci_region *r; -+ -+#ifdef CONFIG_PCI1 -+ uint pci_spd_norm = (gur->pordevsr & MPC85xx_PORDEVSR_PCI1_SPD); -+ uint pci_32 = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_PCI32; -+ uint pci_arb = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_ARB; -+ uint pcix = gur->pordevsr & MPC85xx_PORDEVSR_PCI1; -+ uint freq = CONFIG_SYS_CLK_FREQ / 1000 / 1000; -+ -+ width = 0; /* Silence compiler warning... */ -+ io_sel &= 0xf; /* Silence compiler warning... */ -+ pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI1_ADDR; -+ hose = &pci1_hose; -+ host = host_agent_cfg[host_agent].pci_host[0]; -+ r = hose->regions; -+ -+ -+ if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { -+ printf("\n PCI1: %d bit %s, %s %d MHz, %s, %s\n", -+ pci_32 ? 32 : 64, -+ pcix ? "PCIX" : "PCI", -+ pci_spd_norm ? ">=" : "<=", -+ pcix ? freq * 2 : freq, -+ host ? "host" : "agent", -+ pci_arb ? "arbiter" : "external-arbiter"); -+ -+ /* inbound */ -+ r += fsl_pci_setup_inbound_windows(r); -+ -+ /* outbound memory */ -+ pci_set_region(r++, -+ CONFIG_SYS_PCI1_MEM_BASE, -+ CONFIG_SYS_PCI1_MEM_PHYS, -+ CONFIG_SYS_PCI1_MEM_SIZE, -+ PCI_REGION_MEM); -+ -+ /* outbound io */ -+ pci_set_region(r++, -+ CONFIG_SYS_PCI1_IO_BASE, -+ CONFIG_SYS_PCI1_IO_PHYS, -+ CONFIG_SYS_PCI1_IO_SIZE, -+ PCI_REGION_IO); -+ -+ hose->region_count = r - hose->regions; -+ -+ hose->first_busno = first_free_busno; -+ pci_setup_indirect(hose, (int)&pci->cfg_addr, -+ (int)&pci->cfg_data); -+ -+ fsl_pci_init(hose); -+ -+ /* Unlock inbound PCI configuration cycles */ -+ if (!host) -+ fsl_pci_config_unlock(hose); -+ -+ first_free_busno = hose->last_busno + 1; -+ printf(" PCI1 on bus %02x - %02x\n", -+ hose->first_busno, hose->last_busno); -+ } else { -+ printf(" PCI1: disabled\n"); -+ } -+#elif defined CONFIG_MPC8548 -+ /* PCI1 not present on MPC8572 */ -+ gur->devdisr |= MPC85xx_DEVDISR_PCI1; /* disable */ -+#endif -+#ifdef CONFIG_PCIE1 -+ pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR; -+ hose = &pcie1_hose; -+ host = host_agent_cfg[host_agent].pcie_root[0]; -+ width = io_port_cfg[io_sel].pcie_width[0]; -+ r = hose->regions; -+ -+ if (width && !(devdisr & MPC8xxx_DEVDISR_PCIE1)) { -+ printf("\n PCIE1 connected as %s (x%d)", -+ host ? "Root Complex" : "End Point", width); -+ if (pci->pme_msg_det) { -+ pci->pme_msg_det = 0xffffffff; -+ debug(" with errors. Clearing. Now 0x%08x", -+ pci->pme_msg_det); -+ } -+ printf("\n"); -+ -+ /* inbound */ -+ r += fsl_pci_setup_inbound_windows(r); -+ -+ /* outbound memory */ -+ pci_set_region(r++, -+ CONFIG_SYS_PCIE1_MEM_BASE, -+ CONFIG_SYS_PCIE1_MEM_PHYS, -+ CONFIG_SYS_PCIE1_MEM_SIZE, -+ PCI_REGION_MEM); -+ -+ /* outbound io */ -+ pci_set_region(r++, -+ CONFIG_SYS_PCIE1_IO_BASE, -+ CONFIG_SYS_PCIE1_IO_PHYS, -+ CONFIG_SYS_PCIE1_IO_SIZE, -+ PCI_REGION_IO); -+ -+ hose->region_count = r - hose->regions; -+ -+ hose->first_busno = first_free_busno; -+ pci_setup_indirect(hose, (int)&pci->cfg_addr, -+ (int) &pci->cfg_data); -+ -+ fsl_pci_init(hose); -+ -+ /* Unlock inbound PCI configuration cycles */ -+ if (!host) -+ fsl_pci_config_unlock(hose); -+ -+ first_free_busno = hose->last_busno + 1; -+ printf(" PCIE1 on bus %02x - %02x\n", -+ hose->first_busno, hose->last_busno); -+ } -+#else -+ gur->devdisr |= MPC8xxx_DEVDISR_PCIE1; /* disable */ -+#endif /* CONFIG_PCIE1 */ -+ -+#ifdef CONFIG_PCIE2 -+ pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE2_ADDR; -+ hose = &pcie2_hose; -+ host = host_agent_cfg[host_agent].pcie_root[1]; -+ width = io_port_cfg[io_sel].pcie_width[1]; -+ r = hose->regions; -+ -+ if (width && !(devdisr & MPC8xxx_DEVDISR_PCIE2)) { -+ printf("\n PCIE2 connected as %s (x%d)", -+ host ? "Root Complex" : "End Point", width); -+ if (pci->pme_msg_det) { -+ pci->pme_msg_det = 0xffffffff; -+ debug(" with errors. Clearing. Now 0x%08x", -+ pci->pme_msg_det); -+ } -+ printf("\n"); -+ -+ /* inbound */ -+ r += fsl_pci_setup_inbound_windows(r); -+ -+ /* outbound memory */ -+ pci_set_region(r++, -+ CONFIG_SYS_PCIE2_MEM_BASE, -+ CONFIG_SYS_PCIE2_MEM_PHYS, -+ CONFIG_SYS_PCIE2_MEM_SIZE, -+ PCI_REGION_MEM); -+ -+ /* outbound io */ -+ pci_set_region(r++, -+ CONFIG_SYS_PCIE2_IO_BASE, -+ CONFIG_SYS_PCIE2_IO_PHYS, -+ CONFIG_SYS_PCIE2_IO_SIZE, -+ PCI_REGION_IO); -+ -+ hose->region_count = r - hose->regions; -+ -+ hose->first_busno = first_free_busno; -+ pci_setup_indirect(hose, (int)&pci->cfg_addr, -+ (int)&pci->cfg_data); -+ -+ fsl_pci_init(hose); -+ -+ /* Unlock inbound PCI configuration cycles */ -+ if (!host) -+ fsl_pci_config_unlock(hose); -+ -+ first_free_busno = hose->last_busno + 1; -+ printf(" PCIE2 on bus %02x - %02x\n", -+ hose->first_busno, hose->last_busno); -+ } -+#else -+ gur->devdisr |= MPC8xxx_DEVDISR_PCIE2; /* disable */ -+#endif /* CONFIG_PCIE2 */ -+ -+#ifdef CONFIG_PCIE3 -+ pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE3_ADDR; -+ hose = &pcie3_hose; -+ host = host_agent_cfg[host_agent].pcie_root[2]; -+ width = io_port_cfg[io_sel].pcie_width[2]; -+ r = hose->regions; -+ -+ if (width && !(devdisr & MPC8xxx_DEVDISR_PCIE3)) { -+ printf("\n PCIE3 connected as %s (x%d)", -+ host ? "Root Complex" : "End Point", width); -+ if (pci->pme_msg_det) { -+ pci->pme_msg_det = 0xffffffff; -+ debug(" with errors. Clearing. Now 0x%08x", -+ pci->pme_msg_det); -+ } -+ printf("\n"); -+ -+ /* inbound */ -+ r += fsl_pci_setup_inbound_windows(r); -+ -+ /* outbound memory */ -+ pci_set_region(r++, -+ CONFIG_SYS_PCIE3_MEM_BASE, -+ CONFIG_SYS_PCIE3_MEM_PHYS, -+ CONFIG_SYS_PCIE3_MEM_SIZE, -+ PCI_REGION_MEM); -+ -+ /* outbound io */ -+ pci_set_region(r++, -+ CONFIG_SYS_PCIE3_IO_BASE, -+ CONFIG_SYS_PCIE3_IO_PHYS, -+ CONFIG_SYS_PCIE3_IO_SIZE, -+ PCI_REGION_IO); -+ -+ hose->region_count = r - hose->regions; -+ -+ hose->first_busno = first_free_busno; -+ pci_setup_indirect(hose, (int)&pci->cfg_addr, -+ (int)&pci->cfg_data); -+ -+ fsl_pci_init(hose); -+ -+ /* Unlock inbound PCI configuration cycles */ -+ if (!host) -+ fsl_pci_config_unlock(hose); -+ -+ first_free_busno = hose->last_busno + 1; -+ printf(" PCIE3 on bus %02x - %02x\n", -+ hose->first_busno, hose->last_busno); -+ } -+#else -+ gur->devdisr |= MPC8xxx_DEVDISR_PCIE3; /* disable */ -+#endif /* CONFIG_PCIE3 */ -+} -+ -+#if defined(CONFIG_OF_BOARD_SETUP) -+void ft_board_pci_setup(void *blob, bd_t *bd) -+{ -+ /* TODO - make node name (eg pci0) dynamic */ -+#ifdef CONFIG_PCI1 -+ ft_fsl_pci_setup(blob, "pci0", &pci1_hose); -+#endif -+#ifdef CONFIG_PCIE1 -+ ft_fsl_pci_setup(blob, "pci2", &pcie1_hose); -+#endif -+#ifdef CONFIG_PCIE2 -+ ft_fsl_pci_setup(blob, "pci1", &pcie2_hose); -+#endif -+#ifdef CONFIG_PCIE3 -+ ft_fsl_pci_setup(blob, "pci0", &pcie3_hose); -+#endif -+} -+#endif /* CONFIG_OF_BOARD_SETUP */ -diff --git a/board/xm250/u-boot.lds b/board/xm250/u-boot.lds -deleted file mode 100644 -index 8af5001..0000000 ---- a/board/xm250/u-boot.lds -+++ /dev/null -@@ -1,56 +0,0 @@ --/* -- * (C) Copyright 2000-2004 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/pxa/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/xsengine/u-boot.lds b/board/xsengine/u-boot.lds -deleted file mode 100644 -index 8af5001..0000000 ---- a/board/xsengine/u-boot.lds -+++ /dev/null -@@ -1,56 +0,0 @@ --/* -- * (C) Copyright 2000-2004 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/pxa/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/board/zeus/update.c b/board/zeus/update.c -index ce1f34f..c8487e5 100644 ---- a/board/zeus/update.c -+++ b/board/zeus/update.c -@@ -99,7 +99,7 @@ int do_update_boot_eeprom(cmd_tbl_t* cmdtp, int flag, int argc, char* argv[]) - U_BOOT_CMD ( - update_boot_eeprom, 1, 1, do_update_boot_eeprom, - "update boot eeprom content", -- NULL -+ "" - ); - - #endif -diff --git a/board/zeus/zeus.c b/board/zeus/zeus.c -index 3f329c2..9bc390f 100644 ---- a/board/zeus/zeus.c -+++ b/board/zeus/zeus.c -@@ -328,7 +328,7 @@ int do_set_default(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - setdef, 4, 1, do_set_default, - "write board-specific values to EEPROM (ethaddr...)", -- "ethaddr eth1addr serial#\n - write board-specific values to EEPROM\n" -+ "ethaddr eth1addr serial#\n - write board-specific values to EEPROM" - ); - - static inline int sw_reset_pressed(void) -@@ -419,7 +419,7 @@ int do_chkreset(cmd_tbl_t* cmdtp, int flag, int argc, char* argv[]) - U_BOOT_CMD ( - chkreset, 1, 1, do_chkreset, - "Check for status of SW-reset button and act accordingly", -- NULL -+ "" - ); - - #if defined(CONFIG_POST) -diff --git a/board/zylonite/u-boot.lds b/board/zylonite/u-boot.lds -deleted file mode 100644 -index a077bc5..0000000 ---- a/board/zylonite/u-boot.lds -+++ /dev/null -@@ -1,56 +0,0 @@ --/* -- * (C) Copyright 2000 -- * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/pxa/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/common/Makefile b/common/Makefile -index b9f4ca7..ee0cb33 100644 ---- a/common/Makefile -+++ b/common/Makefile -@@ -153,8 +153,10 @@ COBJS-$(CONFIG_CMD_DOC) += docecc.o - COBJS-$(CONFIG_CONSOLE_MUX) += iomux.o - COBJS-y += flash.o - COBJS-$(CONFIG_CMD_KGDB) += kgdb.o -+COBJS-$(CONFIG_KALLSYMS) += kallsyms.o - COBJS-$(CONFIG_LCD) += lcd.o - COBJS-$(CONFIG_LYNXKDI) += lynxkdi.o -+COBJS-$(CONFIG_MODEM_SUPPORT) += modem.o - COBJS-$(CONFIG_UPDATE_TFTP) += update.o - COBJS-$(CONFIG_USB_KEYBOARD) += usb_kbd.o - -diff --git a/common/cmd_ambapp.c b/common/cmd_ambapp.c -index 06531f1..bb20ab5 100644 ---- a/common/cmd_ambapp.c -+++ b/common/cmd_ambapp.c -@@ -273,6 +273,7 @@ int ambapp_init_reloc(void) - } - - U_BOOT_CMD(ambapp, 1, 1, do_ambapp_print, -- "list AMBA Plug&Play information", -- "ambapp\n" -- " - lists AMBA (AHB & APB) Plug&Play devices present on the system\n"); -+ "list AMBA Plug&Play information", -+ "ambapp\n" -+ " - lists AMBA (AHB & APB) Plug&Play devices present on the system" -+); -diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c -index b230924..11c1547 100644 ---- a/common/cmd_bdinfo.c -+++ b/common/cmd_bdinfo.c -@@ -384,5 +384,5 @@ static void print_str(const char *name, const char *str) - U_BOOT_CMD( - bdinfo, 1, 1, do_bdinfo, - "print Board Info structure", -- NULL -+ "" - ); -diff --git a/common/cmd_bedbug.c b/common/cmd_bedbug.c -index cd9e720..8be1c25 100644 ---- a/common/cmd_bedbug.c -+++ b/common/cmd_bedbug.c -@@ -108,7 +108,7 @@ int do_bedbug_dis (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - - U_BOOT_CMD (ds, 3, 1, do_bedbug_dis, - "disassemble memory", -- "ds
[# instructions]\n"); -+ "ds
[# instructions]"); - - /* ====================================================================== - * Entry point from the interpreter to the assembler. Assembles -@@ -160,7 +160,7 @@ int do_bedbug_asm (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - } /* do_bedbug_asm */ - - U_BOOT_CMD (as, 2, 0, do_bedbug_asm, -- "assemble memory", "as
\n"); -+ "assemble memory", "as
"); - - /* ====================================================================== - * Used to set a break point from the interpreter. Simply calls into the -@@ -181,7 +181,7 @@ U_BOOT_CMD (break, 3, 0, do_bedbug_break, - " - Set or clear a breakpoint\n" - "break
- Break at an address\n" - "break off - Disable breakpoint.\n" -- "break show - List breakpoints.\n"); -+ "break show - List breakpoints."); - - /* ====================================================================== - * Called from the debug interrupt routine. Simply calls the CPU-specific -@@ -278,7 +278,7 @@ int do_bedbug_continue (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - - U_BOOT_CMD (continue, 1, 0, do_bedbug_continue, - "continue from a breakpoint", -- " - continue from a breakpoint.\n"); -+ ""); - - /* ====================================================================== - * Interpreter command to continue to the next instruction, stepping into -@@ -309,7 +309,7 @@ int do_bedbug_step (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - - U_BOOT_CMD (step, 1, 1, do_bedbug_step, - "single step execution.", -- " - single step execution.\n"); -+ ""); - - /* ====================================================================== - * Interpreter command to continue to the next instruction, stepping over -@@ -340,7 +340,7 @@ int do_bedbug_next (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - - U_BOOT_CMD (next, 1, 1, do_bedbug_next, - "single step execution, stepping over subroutines.", -- " - single step execution, stepping over subroutines.\n"); -+ ""); - - /* ====================================================================== - * Interpreter command to print the current stack. This assumes an EABI -@@ -385,7 +385,7 @@ int do_bedbug_stack (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - - U_BOOT_CMD (where, 1, 1, do_bedbug_stack, - "Print the running stack.", -- " - Print the running stack.\n"); -+ ""); - - /* ====================================================================== - * Interpreter command to dump the registers. Calls the CPU-specific -@@ -405,7 +405,7 @@ int do_bedbug_rdump (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - } /* do_bedbug_rdump */ - - U_BOOT_CMD (rdump, 1, 1, do_bedbug_rdump, -- "Show registers.", " - Show registers.\n"); -+ "Show registers.", ""); - /* ====================================================================== */ - - -diff --git a/common/cmd_bmp.c b/common/cmd_bmp.c -index abbb070..fc8462e 100644 ---- a/common/cmd_bmp.c -+++ b/common/cmd_bmp.c -@@ -141,7 +141,7 @@ U_BOOT_CMD( - bmp, 5, 1, do_bmp, - "manipulate BMP image data", - "info - display image info\n" -- "bmp display [x y] - display image at x,y\n" -+ "bmp display [x y] - display image at x,y" - ); - - /* -diff --git a/common/cmd_boot.c b/common/cmd_boot.c -index efc1a02..bfc1db2 100644 ---- a/common/cmd_boot.c -+++ b/common/cmd_boot.c -@@ -66,7 +66,7 @@ U_BOOT_CMD( - go, CONFIG_SYS_MAXARGS, 1, do_go, - "start application at address 'addr'", - "addr [arg ...]\n - start application at address 'addr'\n" -- " passing 'arg' as arguments\n" -+ " passing 'arg' as arguments" - ); - - extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -@@ -74,5 +74,5 @@ extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - U_BOOT_CMD( - reset, 1, 0, do_reset, - "Perform RESET of the CPU", -- NULL -+ "" - ); -diff --git a/common/cmd_bootldr.c b/common/cmd_bootldr.c -index 48d113f..b2a8b0e 100644 ---- a/common/cmd_bootldr.c -+++ b/common/cmd_bootldr.c -@@ -170,4 +170,5 @@ int do_bootldr(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD(bootldr, 2, 0, do_bootldr, - "boot ldr image from memory", - "[addr]\n" -- " - boot ldr image stored in memory\n"); -+ "" -+); -diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c -index bd1813a..367d5a7 100644 ---- a/common/cmd_bootm.c -+++ b/common/cmd_bootm.c -@@ -948,7 +948,7 @@ U_BOOT_CMD( - "\tbdt - OS specific bd_t processing\n" - "\tcmdline - OS specific command line processing/setup\n" - "\tprep - OS specific prep before relocation or go\n" -- "\tgo - start OS\n" -+ "\tgo - start OS" - ); - - /*******************************************************************/ -@@ -973,14 +973,14 @@ int do_bootd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - boot, 1, 1, do_bootd, - "boot default, i.e., run 'bootcmd'", -- NULL -+ "" - ); - - /* keep old command name "bootd" for backward compatibility */ - U_BOOT_CMD( - bootd, 1, 1, do_bootd, - "boot default, i.e., run 'bootcmd'", -- NULL -+ "" - ); - - #endif -@@ -1068,7 +1068,7 @@ U_BOOT_CMD( - "addr [addr ...]\n" - " - print header information for application image starting at\n" - " address 'addr' in memory; this includes verification of the\n" -- " image contents (magic number, header and payload checksums)\n" -+ " image contents (magic number, header and payload checksums)" - ); - #endif - -@@ -1135,7 +1135,7 @@ U_BOOT_CMD( - "list all images found in flash", - "\n" - " - Prints information about all images found at sector\n" -- " boundaries in flash.\n" -+ " boundaries in flash." - ); - #endif - -diff --git a/common/cmd_cache.c b/common/cmd_cache.c -index c0f2cba..0dfa336 100644 ---- a/common/cmd_cache.c -+++ b/common/cmd_cache.c -@@ -99,14 +99,14 @@ U_BOOT_CMD( - icache, 2, 1, do_icache, - "enable or disable instruction cache", - "[on, off]\n" -- " - enable or disable instruction cache\n" -+ " - enable or disable instruction cache" - ); - - U_BOOT_CMD( - dcache, 2, 1, do_dcache, - "enable or disable data cache", - "[on, off]\n" -- " - enable or disable data (writethrough) cache\n" -+ " - enable or disable data (writethrough) cache" - ); - - #endif -diff --git a/common/cmd_cplbinfo.c b/common/cmd_cplbinfo.c -index 56e70d6..1a044d2 100644 ---- a/common/cmd_cplbinfo.c -+++ b/common/cmd_cplbinfo.c -@@ -55,5 +55,5 @@ int do_cplbinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - - U_BOOT_CMD(cplbinfo, 1, 0, do_cplbinfo, - "display current CPLB tables", -- "\n" -- " - display current CPLB tables\n"); -+ "" -+); -diff --git a/common/cmd_dataflash_mmc_mux.c b/common/cmd_dataflash_mmc_mux.c -index 4b2cf1c..97e303e 100644 ---- a/common/cmd_dataflash_mmc_mux.c -+++ b/common/cmd_dataflash_mmc_mux.c -@@ -61,5 +61,5 @@ U_BOOT_CMD( - dataflash_mmc_mux, 2, 1, do_dataflash_mmc_mux, - "dataflash_mmc_mux\t- enable or disable MMC or SPI\n", - "[mmc, spi]\n" -- " - enable or disable MMC or SPI\n" -+ " - enable or disable MMC or SPI" - ); -diff --git a/common/cmd_date.c b/common/cmd_date.c -index 3d78be2..b69e935 100644 ---- a/common/cmd_date.c -+++ b/common/cmd_date.c -@@ -218,5 +218,5 @@ U_BOOT_CMD( - "[MMDDhhmm[[CC]YY][.ss]]\ndate reset\n" - " - without arguments: print date & time\n" - " - with numeric argument: set the system date & time\n" -- " - with 'reset' argument: reset the RTC\n" -+ " - with 'reset' argument: reset the RTC" - ); -diff --git a/common/cmd_dcr.c b/common/cmd_dcr.c -index 7aed06c..4f23b8d 100644 ---- a/common/cmd_dcr.c -+++ b/common/cmd_dcr.c -@@ -224,22 +224,22 @@ int do_setidcr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - getdcr, 2, 1, do_getdcr, - "Get an AMCC PPC 4xx DCR's value", -- "dcrn - return a DCR's value.\n" -+ "dcrn - return a DCR's value." - ); - U_BOOT_CMD( - setdcr, 2, 1, do_setdcr, - "Set an AMCC PPC 4xx DCR's value", -- "dcrn - set a DCR's value.\n" -+ "dcrn - set a DCR's value." - ); - - U_BOOT_CMD( - getidcr, 3, 1, do_getidcr, - "Get a register value via indirect DCR addressing", -- "adr_dcrn[.dat_dcrn] offset - write offset to adr_dcrn, read value from dat_dcrn.\n" -+ "adr_dcrn[.dat_dcrn] offset - write offset to adr_dcrn, read value from dat_dcrn." - ); - - U_BOOT_CMD( - setidcr, 4, 1, do_setidcr, - "Set a register value via indirect DCR addressing", -- "adr_dcrn[.dat_dcrn] offset value - write offset to adr_dcrn, write value to dat_dcrn.\n" -+ "adr_dcrn[.dat_dcrn] offset value - write offset to adr_dcrn, write value to dat_dcrn." - ); -diff --git a/common/cmd_df.c b/common/cmd_df.c -index d64f900..7f957fe 100644 ---- a/common/cmd_df.c -+++ b/common/cmd_df.c -@@ -34,4 +34,4 @@ usage: - U_BOOT_CMD( - sf, 2, 1, do_serial_flash, - "Serial flash sub-system", -- "probe [bus:]cs - init flash device on given SPI bus and CS\n") -+ "probe [bus:]cs - init flash device on given SPI bus and CS") -diff --git a/common/cmd_diag.c b/common/cmd_diag.c -index c2a6175..0436c49 100644 ---- a/common/cmd_diag.c -+++ b/common/cmd_diag.c -@@ -72,5 +72,5 @@ U_BOOT_CMD( - " - print information about specified tests\n" - "diag run - run all available tests\n" - "diag run [test1 [test2]]\n" -- " - run specified tests\n" -+ " - run specified tests" - ); -diff --git a/common/cmd_display.c b/common/cmd_display.c -index 4102424..3422395 100644 ---- a/common/cmd_display.c -+++ b/common/cmd_display.c -@@ -74,5 +74,5 @@ U_BOOT_CMD( - "display string on dot matrix display", - "[]\n" - " - with argument: display on dot matrix display\n" -- " - without arguments: clear dot matrix display\n" -+ " - without arguments: clear dot matrix display" - ); -diff --git a/common/cmd_doc.c b/common/cmd_doc.c -index 3385c67..5cc90f0 100644 ---- a/common/cmd_doc.c -+++ b/common/cmd_doc.c -@@ -202,7 +202,7 @@ U_BOOT_CMD( - "doc write addr off size - read/write `size'" - " bytes starting at offset `off'\n" - " to/from memory address `addr'\n" -- "doc erase off size - erase `size' bytes of DOC from offset `off'\n" -+ "doc erase off size - erase `size' bytes of DOC from offset `off'" - ); - - int do_docboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -@@ -342,7 +342,7 @@ int do_docboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - docboot, 4, 1, do_docboot, - "boot from DOC device", -- "loadAddr dev\n" -+ "loadAddr dev" - ); - - int doc_rw (struct DiskOnChip* this, int cmd, -diff --git a/common/cmd_dtt.c b/common/cmd_dtt.c -index 7783c88..3cfd36e 100644 ---- a/common/cmd_dtt.c -+++ b/common/cmd_dtt.c -@@ -55,6 +55,6 @@ int do_dtt (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - - U_BOOT_CMD( - dtt, 1, 1, do_dtt, -- "Digital Thermometer and Thermostat", -- " - Read temperature from digital thermometer and thermostat.\n" -+ "Read temperature from Digital Thermometer and Thermostat", -+ "" - ); -diff --git a/common/cmd_eeprom.c b/common/cmd_eeprom.c -index e598bf1..102efaf 100644 ---- a/common/cmd_eeprom.c -+++ b/common/cmd_eeprom.c -@@ -401,10 +401,6 @@ eeprom_probe (unsigned dev_addr, unsigned offset) - #define CONFIG_SYS_I2C_SPEED 50000 - #endif - --#ifndef CONFIG_SYS_I2C_SLAVE --#define CONFIG_SYS_I2C_SLAVE 0xFE --#endif -- - void eeprom_init (void) - { - #if defined(CONFIG_SPI) -@@ -428,7 +424,7 @@ U_BOOT_CMD( - "EEPROM sub-system", - "read devaddr addr off cnt\n" - "eeprom write devaddr addr off cnt\n" -- " - read/write `cnt' bytes from `devaddr` EEPROM at offset `off'\n" -+ " - read/write `cnt' bytes from `devaddr` EEPROM at offset `off'" - ); - #else /* One EEPROM */ - U_BOOT_CMD( -@@ -436,7 +432,7 @@ U_BOOT_CMD( - "EEPROM sub-system", - "read addr off cnt\n" - "eeprom write addr off cnt\n" -- " - read/write `cnt' bytes at EEPROM offset `off'\n" -+ " - read/write `cnt' bytes at EEPROM offset `off'" - ); - #endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */ - -diff --git a/common/cmd_elf.c b/common/cmd_elf.c -index 83e7589..abec7dd 100644 ---- a/common/cmd_elf.c -+++ b/common/cmd_elf.c -@@ -313,11 +313,11 @@ unsigned long load_elf_image (unsigned long addr) - U_BOOT_CMD( - bootelf, 2, 0, do_bootelf, - "Boot from an ELF image in memory", -- " [address] - load address of ELF image.\n" -+ " [address] - load address of ELF image." - ); - - U_BOOT_CMD( - bootvx, 2, 0, do_bootvx, - "Boot vxWorks from an ELF image", -- " [address] - load address of vxWorks ELF image.\n" -+ " [address] - load address of vxWorks ELF image." - ); -diff --git a/common/cmd_ext2.c b/common/cmd_ext2.c -index 923b355..6ee60c6 100644 ---- a/common/cmd_ext2.c -+++ b/common/cmd_ext2.c -@@ -118,7 +118,7 @@ U_BOOT_CMD( - ext2ls, 4, 1, do_ext2ls, - "list files in a directory (default /)", - " [directory]\n" -- " - list files from 'dev' on 'interface' in a 'directory'\n" -+ " - list files from 'dev' on 'interface' in a 'directory'" - ); - - /****************************************************************************** -@@ -256,5 +256,5 @@ U_BOOT_CMD( - "load binary file from a Ext2 filesystem", - " [addr] [filename] [bytes]\n" - " - load binary file 'filename' from 'dev' on 'interface'\n" -- " to address 'addr' from ext2 filesystem\n" -+ " to address 'addr' from ext2 filesystem" - ); -diff --git a/common/cmd_fat.c b/common/cmd_fat.c -index 4a26b80..f3089a2 100644 ---- a/common/cmd_fat.c -+++ b/common/cmd_fat.c -@@ -91,7 +91,7 @@ U_BOOT_CMD( - "load binary file from a dos filesystem", - " [bytes]\n" - " - load binary file 'filename' from 'dev' on 'interface'\n" -- " to address 'addr' from dos filesystem\n" -+ " to address 'addr' from dos filesystem" - ); - - int do_fat_ls (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -@@ -138,7 +138,7 @@ U_BOOT_CMD( - fatls, 4, 1, do_fat_ls, - "list files in a directory (default /)", - " [directory]\n" -- " - list files from 'dev' on 'interface' in a 'directory'\n" -+ " - list files from 'dev' on 'interface' in a 'directory'" - ); - - int do_fat_fsinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -@@ -176,7 +176,7 @@ U_BOOT_CMD( - fatinfo, 3, 1, do_fat_fsinfo, - "print information about filesystem", - " \n" -- " - print information about filesystem from 'dev' on 'interface'\n" -+ " - print information about filesystem from 'dev' on 'interface'" - ); - - #ifdef NOT_IMPLEMENTED_YET -diff --git a/common/cmd_fdc.c b/common/cmd_fdc.c -index c043b97..8e18c71 100644 ---- a/common/cmd_fdc.c -+++ b/common/cmd_fdc.c -@@ -903,6 +903,6 @@ int do_fdcboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - fdcboot, 3, 1, do_fdcboot, - "boot from floppy device", -- "loadAddr drive\n" -+ "loadAddr drive" - ); - #endif -diff --git a/common/cmd_fdos.c b/common/cmd_fdos.c -index bcf98d9..3cc6586 100644 ---- a/common/cmd_fdos.c -+++ b/common/cmd_fdos.c -@@ -143,11 +143,11 @@ int do_fdosls(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - fdosboot, 3, 0, do_fdosboot, - "boot from a dos floppy file", -- "[loadAddr] [filename]\n" -+ "[loadAddr] [filename]" - ); - - U_BOOT_CMD( - fdosls, 2, 0, do_fdosls, - "list files in a directory", -- "[directory]\n" -+ "[directory]" - ); -diff --git a/common/cmd_fdt.c b/common/cmd_fdt.c -index 0947b72..8683772 100644 ---- a/common/cmd_fdt.c -+++ b/common/cmd_fdt.c -@@ -840,5 +840,5 @@ U_BOOT_CMD( - "fdt chosen [ ] - Add/update the /chosen branch in the tree\n" - " / - initrd start/end addr\n" - "NOTE: Dereference aliases by omiting the leading '/', " -- "e.g. fdt print ethernet0.\n" -+ "e.g. fdt print ethernet0." - ); -diff --git a/common/cmd_flash.c b/common/cmd_flash.c -index f1f3517..9f27ab0 100644 ---- a/common/cmd_flash.c -+++ b/common/cmd_flash.c -@@ -712,7 +712,7 @@ U_BOOT_CMD( - flinfo, 2, 1, do_flinfo, - "print FLASH memory information", - "\n - print information for all FLASH memory banks\n" -- "flinfo N\n - print information for FLASH memory bank # N\n" -+ "flinfo N\n - print information for FLASH memory bank # N" - ); - - U_BOOT_CMD( -@@ -726,7 +726,7 @@ U_BOOT_CMD( - "erase N:SF[-SL]\n - erase sectors SF-SL in FLASH bank # N\n" - "erase bank N\n - erase FLASH bank # N\n" - TMP_ERASE -- "erase all\n - erase all FLASH banks\n" -+ "erase all\n - erase all FLASH banks" - ); - - U_BOOT_CMD( -@@ -751,7 +751,7 @@ U_BOOT_CMD( - " - make sectors SF-SL writable in FLASH bank # N\n" - "protect off bank N\n - make FLASH bank # N writable\n" - TMP_PROT_OFF -- "protect off all\n - make all FLASH banks writable\n" -+ "protect off all\n - make all FLASH banks writable" - ); - - #undef TMP_ERASE -diff --git a/common/cmd_fpga.c b/common/cmd_fpga.c -index 362bffd..2e017b8 100644 ---- a/common/cmd_fpga.c -+++ b/common/cmd_fpga.c -@@ -357,9 +357,10 @@ U_BOOT_CMD (fpga, 6, 1, do_fpga, - "\tload\tLoad device from memory buffer\n" - "\tloadb\tLoad device from bitstream buffer (Xilinx devices only)\n" - "\tloadmk\tLoad device generated with mkimage\n" -- "\tdump\tLoad device to memory buffer\n" -+ "\tdump\tLoad device to memory buffer" - #if defined(CONFIG_FIT) -+ "\n" - "\tFor loadmk operating on FIT format uImage address must include\n" -- "\tsubimage unit name in the form of addr:\n" -+ "\tsubimage unit name in the form of addr:" - #endif - ); -diff --git a/common/cmd_i2c.c b/common/cmd_i2c.c -index 16439ac..ae26845 100644 ---- a/common/cmd_i2c.c -+++ b/common/cmd_i2c.c -@@ -27,11 +27,6 @@ - * There are several parameters in many of the commands that bear further - * explanations: - * -- * Two of the commands (imm and imw) take a byte/word/long modifier -- * (e.g. imm.w specifies the word-length modifier). This was done to -- * allow manipulating word-length registers. It was not done on any other -- * commands because it was not deemed useful. -- * - * {i2c_chip} is the I2C chip address (the first byte sent on the bus). - * Each I2C chip on the bus has a unique address. On the I2C data bus, - * the address is the upper seven bits and the LSB is the "read/write" -@@ -69,11 +64,11 @@ - * {addr} field (since .1 is the default, it doesn't actually have to - * be specified). Examples: given a memory chip at I2C chip address - * 0x50, the following would happen... -- * imd 50 0 10 display 16 bytes starting at 0x000 -+ * i2c md 50 0 10 display 16 bytes starting at 0x000 - * On the bus: A0 00 A1 ... -- * imd 50 100 10 display 16 bytes starting at 0x100 -+ * i2c md 50 100 10 display 16 bytes starting at 0x100 - * On the bus: A2 00 A3 ... -- * imd 50 210 10 display 16 bytes starting at 0x210 -+ * i2c md 50 210 10 display 16 bytes starting at 0x210 - * On the bus: A4 10 A5 ... - * This is awfully ugly. It would be nice if someone would think up - * a better way of handling this. -@@ -135,12 +130,27 @@ DECLARE_GLOBAL_DATA_PTR; - - #endif - --static int --mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char *argv[]); -+/* TODO: Implement architecture-specific get/set functions */ -+unsigned int __def_i2c_get_bus_speed(void) -+{ -+ return CONFIG_SYS_I2C_SPEED; -+} -+unsigned int i2c_get_bus_speed(void) -+ __attribute__((weak, alias("__def_i2c_get_bus_speed"))); -+ -+int __def_i2c_set_bus_speed(unsigned int speed) -+{ -+ if (speed != CONFIG_SYS_I2C_SPEED) -+ return -1; -+ -+ return 0; -+} -+int i2c_set_bus_speed(unsigned int) -+ __attribute__((weak, alias("__def_i2c_set_bus_speed"))); - - /* - * Syntax: -- * imd {i2c_chip} {addr}{.0, .1, .2} {len} -+ * i2c md {i2c_chip} {addr}{.0, .1, .2} {len} - */ - #define DISP_LINE_LEN 16 - -@@ -244,20 +254,11 @@ int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - return 0; - } - --int do_i2c_mm ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) --{ -- return mod_i2c_mem (cmdtp, 1, flag, argc, argv); --} -- --int do_i2c_nm ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) --{ -- return mod_i2c_mem (cmdtp, 0, flag, argc, argv); --} - - /* Write (fill) memory - * - * Syntax: -- * imw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}] -+ * i2c mw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}] - */ - int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - { -@@ -341,7 +342,7 @@ int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - /* Calculate a CRC on memory - * - * Syntax: -- * icrc32 {i2c_chip} {addr}{.0, .1, .2} {count} -+ * i2c crc32 {i2c_chip} {addr}{.0, .1, .2} {count} - */ - int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - { -@@ -410,8 +411,8 @@ int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - /* Modify memory. - * - * Syntax: -- * imm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2} -- * inm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2} -+ * i2c mm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2} -+ * i2c nm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2} - */ - - static int -@@ -544,7 +545,7 @@ mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char *argv[]) - - /* - * Syntax: -- * iprobe {addr}{.0, .1, .2} -+ * i2c probe {addr}{.0, .1, .2} - */ - int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - { -@@ -586,7 +587,7 @@ int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - - /* - * Syntax: -- * iloop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}] -+ * i2c loop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}] - * {length} - Number of bytes to read - * {delay} - A DECIMAL number and defaults to 1000 uSec - */ -@@ -708,7 +709,7 @@ static void decode_bits (u_char const b, char const *str[], int const do_once) - - /* - * Syntax: -- * sdram {i2c_chip} -+ * i2c sdram {i2c_chip} - */ - int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - { -@@ -1186,13 +1187,6 @@ int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - } - #endif - --#if defined(CONFIG_I2C_CMD_TREE) --int do_i2c_reset(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) --{ -- i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); -- return 0; --} -- - #if defined(CONFIG_I2C_MUX) - int do_i2c_add_bus(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - { -@@ -1262,52 +1256,55 @@ int do_i2c_bus_speed(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - - int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - { -+ /* Strip off leading 'i2c' command argument */ -+ argc--; -+ argv++; -+ - #if defined(CONFIG_I2C_MUX) -- if (!strncmp(argv[1], "bu", 2)) -- return do_i2c_add_bus(cmdtp, flag, --argc, ++argv); -+ if (!strncmp(argv[0], "bu", 2)) -+ return do_i2c_add_bus(cmdtp, flag, argc, argv); - #endif /* CONFIG_I2C_MUX */ -- if (!strncmp(argv[1], "sp", 2)) -- return do_i2c_bus_speed(cmdtp, flag, --argc, ++argv); -+ if (!strncmp(argv[0], "sp", 2)) -+ return do_i2c_bus_speed(cmdtp, flag, argc, argv); - #if defined(CONFIG_I2C_MULTI_BUS) -- if (!strncmp(argv[1], "de", 2)) -- return do_i2c_bus_num(cmdtp, flag, --argc, ++argv); -+ if (!strncmp(argv[0], "de", 2)) -+ return do_i2c_bus_num(cmdtp, flag, argc, argv); - #endif /* CONFIG_I2C_MULTI_BUS */ -- if (!strncmp(argv[1], "md", 2)) -- return do_i2c_md(cmdtp, flag, --argc, ++argv); -- if (!strncmp(argv[1], "mm", 2)) -- return do_i2c_mm(cmdtp, flag, --argc, ++argv); -- if (!strncmp(argv[1], "mw", 2)) -- return do_i2c_mw(cmdtp, flag, --argc, ++argv); -- if (!strncmp(argv[1], "nm", 2)) -- return do_i2c_nm(cmdtp, flag, --argc, ++argv); -- if (!strncmp(argv[1], "cr", 2)) -- return do_i2c_crc(cmdtp, flag, --argc, ++argv); -- if (!strncmp(argv[1], "pr", 2)) -- return do_i2c_probe(cmdtp, flag, --argc, ++argv); -- if (!strncmp(argv[1], "re", 2)) -- return do_i2c_reset(cmdtp, flag, --argc, ++argv); -- if (!strncmp(argv[1], "lo", 2)) -- return do_i2c_loop(cmdtp, flag, --argc, ++argv); -+ if (!strncmp(argv[0], "md", 2)) -+ return do_i2c_md(cmdtp, flag, argc, argv); -+ if (!strncmp(argv[0], "mm", 2)) -+ return mod_i2c_mem (cmdtp, 1, flag, argc, argv); -+ if (!strncmp(argv[0], "mw", 2)) -+ return do_i2c_mw(cmdtp, flag, argc, argv); -+ if (!strncmp(argv[0], "nm", 2)) -+ return mod_i2c_mem (cmdtp, 0, flag, argc, argv); -+ if (!strncmp(argv[0], "cr", 2)) -+ return do_i2c_crc(cmdtp, flag, argc, argv); -+ if (!strncmp(argv[0], "pr", 2)) -+ return do_i2c_probe(cmdtp, flag, argc, argv); -+ if (!strncmp(argv[0], "re", 2)) -+ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); -+ return 0; -+ if (!strncmp(argv[0], "lo", 2)) -+ return do_i2c_loop(cmdtp, flag, argc, argv); - #if defined(CONFIG_CMD_SDRAM) -- if (!strncmp(argv[1], "sd", 2)) -- return do_sdram(cmdtp, flag, --argc, ++argv); -+ if (!strncmp(argv[0], "sd", 2)) -+ return do_sdram(cmdtp, flag, argc, argv); - #endif - else - cmd_usage(cmdtp); - return 0; - } --#endif /* CONFIG_I2C_CMD_TREE */ - - /***************************************************/ - --#if defined(CONFIG_I2C_CMD_TREE) - U_BOOT_CMD( - i2c, 6, 1, do_i2c, - "I2C sub-system", -+ "speed [speed] - show or set I2C bus speed\n" - #if defined(CONFIG_I2C_MUX) -- "bus [muxtype:muxaddr:muxchannel] - add a new bus reached over muxes.\n" -+ "i2c bus [muxtype:muxaddr:muxchannel] - add a new bus reached over muxes\n" - #endif /* CONFIG_I2C_MUX */ -- "speed [speed] - show or set I2C bus speed\n" - #if defined(CONFIG_I2C_MULTI_BUS) - "i2c dev [dev] - show or set current I2C bus\n" - #endif /* CONFIG_I2C_MULTI_BUS */ -@@ -1318,66 +1315,12 @@ U_BOOT_CMD( - "i2c crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n" - "i2c probe - show devices on the I2C bus\n" - "i2c reset - re-init the I2C Controller\n" -- "i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device\n" -+ "i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device" - #if defined(CONFIG_CMD_SDRAM) -- "i2c sdram chip - print SDRAM configuration information\n" -+ "\n" -+ "i2c sdram chip - print SDRAM configuration information" - #endif - ); --#endif /* CONFIG_I2C_CMD_TREE */ --U_BOOT_CMD( -- imd, 4, 1, do_i2c_md, \ -- "i2c memory display", \ -- "chip address[.0, .1, .2] [# of objects]\n - i2c memory display\n" \ --); -- --U_BOOT_CMD( -- imm, 3, 1, do_i2c_mm, -- "i2c memory modify (auto-incrementing)", -- "chip address[.0, .1, .2]\n" -- " - memory modify, auto increment address\n" --); --U_BOOT_CMD( -- inm, 3, 1, do_i2c_nm, -- "memory modify (constant address)", -- "chip address[.0, .1, .2]\n - memory modify, read and keep address\n" --); -- --U_BOOT_CMD( -- imw, 5, 1, do_i2c_mw, -- "memory write (fill)", -- "chip address[.0, .1, .2] value [count]\n - memory write (fill)\n" --); -- --U_BOOT_CMD( -- icrc32, 5, 1, do_i2c_crc, -- "checksum calculation", -- "chip address[.0, .1, .2] count\n - compute CRC32 checksum\n" --); -- --U_BOOT_CMD( -- iprobe, 1, 1, do_i2c_probe, -- "probe to discover valid I2C chip addresses", -- "\n -discover valid I2C chip addresses\n" --); -- --/* -- * Require full name for "iloop" because it is an infinite loop! -- */ --U_BOOT_CMD( -- iloop, 5, 1, do_i2c_loop, -- "infinite loop on address range", -- "chip address[.0, .1, .2] [# of objects]\n" -- " - loop, reading a set of addresses\n" --); -- --#if defined(CONFIG_CMD_SDRAM) --U_BOOT_CMD( -- isdram, 2, 1, do_sdram, -- "print SDRAM configuration information", -- "chip\n - print SDRAM configuration information\n" -- " (valid chip values 50..57)\n" --); --#endif - - #if defined(CONFIG_I2C_MUX) - -diff --git a/common/cmd_ide.c b/common/cmd_ide.c -index d86bf37..4d7a0ac 100644 ---- a/common/cmd_ide.c -+++ b/common/cmd_ide.c -@@ -45,10 +45,6 @@ - #include - #endif - --#ifdef CONFIG_MPC512X --#include --#endif -- - #include - #include - -@@ -2108,11 +2104,11 @@ U_BOOT_CMD( - "ide read addr blk# cnt\n" - "ide write addr blk# cnt - read/write `cnt'" - " blocks starting at block `blk#'\n" -- " to/from memory address `addr'\n" -+ " to/from memory address `addr'" - ); - - U_BOOT_CMD( - diskboot, 3, 1, do_diskboot, - "boot from IDE device", -- "loadAddr dev:part\n" -+ "loadAddr dev:part" - ); -diff --git a/common/cmd_immap.c b/common/cmd_immap.c -index c8367f0..37e6058 100644 ---- a/common/cmd_immap.c -+++ b/common/cmd_immap.c -@@ -615,39 +615,39 @@ do_mccinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - siuinfo, 1, 1, do_siuinfo, - "print System Interface Unit (SIU) registers", -- NULL -+ "" - ); - - U_BOOT_CMD( - memcinfo, 1, 1, do_memcinfo, - "print Memory Controller registers", -- NULL -+ "" - ); - - U_BOOT_CMD( - sitinfo, 1, 1, do_sitinfo, - "print System Integration Timers (SIT) registers", -- NULL -+ "" - ); - - #ifdef CONFIG_8260 - U_BOOT_CMD( - icinfo, 1, 1, do_icinfo, - "print Interrupt Controller registers", -- NULL -+ "" - ); - #endif - - U_BOOT_CMD( - carinfo, 1, 1, do_carinfo, - "print Clocks and Reset registers", -- NULL -+ "" - ); - - U_BOOT_CMD( - iopinfo, 1, 1, do_iopinfo, - "print I/O Port registers", -- NULL -+ "" - ); - - U_BOOT_CMD( -@@ -659,62 +659,61 @@ U_BOOT_CMD( - U_BOOT_CMD( - dmainfo, 1, 1, do_dmainfo, - "print SDMA/IDMA registers", -- NULL -+ "" - ); - - U_BOOT_CMD( - fccinfo, 1, 1, do_fccinfo, - "print FCC registers", -- NULL -+ "" - ); - - U_BOOT_CMD( - brginfo, 1, 1, do_brginfo, - "print Baud Rate Generator (BRG) registers", -- NULL -+ "" - ); - - U_BOOT_CMD( - i2cinfo, 1, 1, do_i2cinfo, - "print I2C registers", -- NULL -+ "" - ); - - U_BOOT_CMD( - sccinfo, 1, 1, do_sccinfo, - "print SCC registers", -- NULL -+ "" - ); - - U_BOOT_CMD( - smcinfo, 1, 1, do_smcinfo, - "print SMC registers", -- NULL -+ "" - ); - - U_BOOT_CMD( - spiinfo, 1, 1, do_spiinfo, - "print Serial Peripheral Interface (SPI) registers", -- NULL -+ "" - ); - - U_BOOT_CMD( - muxinfo, 1, 1, do_muxinfo, - "print CPM Multiplexing registers", -- NULL -+ "" - ); - - U_BOOT_CMD( - siinfo, 1, 1, do_siinfo, - "print Serial Interface (SI) registers", -- NULL -+ "" - ); - - U_BOOT_CMD( - mccinfo, 1, 1, do_mccinfo, - "print MCC registers", -- NULL -+ "" - ); - -- - #endif -diff --git a/common/cmd_irq.c b/common/cmd_irq.c -index a21aede..4604a5a 100644 ---- a/common/cmd_irq.c -+++ b/common/cmd_irq.c -@@ -45,6 +45,5 @@ int do_interrupts(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - interrupts, 5, 0, do_interrupts, - "enable or disable interrupts", -- "[on, off]\n" -- " - enable or disable interrupts\n" -+ "[on, off]" - ); -diff --git a/common/cmd_itest.c b/common/cmd_itest.c -index 309b08b..5b301bf 100644 ---- a/common/cmd_itest.c -+++ b/common/cmd_itest.c -@@ -191,5 +191,5 @@ int do_itest ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[] ) - U_BOOT_CMD( - itest, 4, 0, do_itest, - "return true/false on integer compare", -- "[.b, .w, .l, .s] [*]value1 [*]value2\n" -+ "[.b, .w, .l, .s] [*]value1 [*]value2" - ); -diff --git a/common/cmd_jffs2.c b/common/cmd_jffs2.c -index 3bb6c3c..4db4a83 100644 ---- a/common/cmd_jffs2.c -+++ b/common/cmd_jffs2.c -@@ -636,18 +636,17 @@ U_BOOT_CMD( - "load binary file from a filesystem image", - "[ off ] [ filename ]\n" - " - load binary file from flash bank\n" -- " with offset 'off'\n" -+ " with offset 'off'" - ); - U_BOOT_CMD( - ls, 2, 1, do_jffs2_ls, - "list files in a directory (default /)", -- "[ directory ]\n" -- " - list files in a directory.\n" -+ "[ directory ]" - ); - - U_BOOT_CMD( - fsinfo, 1, 1, do_jffs2_fsinfo, - "print information about filesystems", -- " - print information about filesystems\n" -+ "" - ); - /***************************************************/ -diff --git a/common/cmd_license.c b/common/cmd_license.c -index c3c3496..141215b 100644 ---- a/common/cmd_license.c -+++ b/common/cmd_license.c -@@ -53,7 +53,8 @@ int do_license(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - } - - U_BOOT_CMD(license, 1, 1, do_license, -- "print GPL license text", -- NULL); -+ "print GPL license text", -+ "" -+); - - #endif /* CONFIG_CMD_LICENSE */ -diff --git a/common/cmd_load.c b/common/cmd_load.c -index 2b5a66d..73fbf74 100644 ---- a/common/cmd_load.c -+++ b/common/cmd_load.c -@@ -1049,7 +1049,7 @@ U_BOOT_CMD( - "load S-Record file over serial line", - "[ off ] [ baud ]\n" - " - load S-Record file over serial line" -- " with offset 'off' and baudrate 'baud'\n" -+ " with offset 'off' and baudrate 'baud'" - ); - - #else /* ! CONFIG_SYS_LOADS_BAUD_CHANGE */ -@@ -1057,7 +1057,7 @@ U_BOOT_CMD( - loads, 2, 0, do_load_serial, - "load S-Record file over serial line", - "[ off ]\n" -- " - load S-Record file over serial line with offset 'off'\n" -+ " - load S-Record file over serial line with offset 'off'" - ); - #endif /* CONFIG_SYS_LOADS_BAUD_CHANGE */ - -@@ -1073,14 +1073,14 @@ U_BOOT_CMD( - "save S-Record file over serial line", - "[ off ] [size] [ baud ]\n" - " - save S-Record file over serial line" -- " with offset 'off', size 'size' and baudrate 'baud'\n" -+ " with offset 'off', size 'size' and baudrate 'baud'" - ); - #else /* ! CONFIG_SYS_LOADS_BAUD_CHANGE */ - U_BOOT_CMD( - saves, 3, 0, do_save_serial, - "save S-Record file over serial line", - "[ off ] [size]\n" -- " - save S-Record file over serial line with offset 'off' and size 'size'\n" -+ " - save S-Record file over serial line with offset 'off' and size 'size'" - ); - #endif /* CONFIG_SYS_LOADS_BAUD_CHANGE */ - #endif -@@ -1093,7 +1093,7 @@ U_BOOT_CMD( - "load binary file over serial line (kermit mode)", - "[ off ] [ baud ]\n" - " - load binary file over serial line" -- " with offset 'off' and baudrate 'baud'\n" -+ " with offset 'off' and baudrate 'baud'" - ); - - U_BOOT_CMD( -@@ -1101,7 +1101,7 @@ U_BOOT_CMD( - "load binary file over serial line (ymodem mode)", - "[ off ] [ baud ]\n" - " - load binary file over serial line" -- " with offset 'off' and baudrate 'baud'\n" -+ " with offset 'off' and baudrate 'baud'" - ); - - #endif -@@ -1130,8 +1130,8 @@ int do_hwflow (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - - U_BOOT_CMD( - hwflow, 2, 0, do_hwflow, -- "turn the harwdare flow control on/off", -- "[on|off]\n - change RTS/CTS hardware flow control over serial line\n" -+ "turn RTS/CTS hardware flow control in serial line on/off", -+ "[on|off]" - ); - - #endif -diff --git a/common/cmd_log.c b/common/cmd_log.c -index a03835d..d422d9f 100644 ---- a/common/cmd_log.c -+++ b/common/cmd_log.c -@@ -256,7 +256,7 @@ U_BOOT_CMD( - "info - show pointer details\n" - "log reset - clear contents\n" - "log show - show contents\n" -- "log append - append to the logbuffer\n" -+ "log append - append to the logbuffer" - ); - - static int logbuff_printk(const char *line) -diff --git a/common/cmd_mac.c b/common/cmd_mac.c -index cf601e4..20403da 100644 ---- a/common/cmd_mac.c -+++ b/common/cmd_mac.c -@@ -44,20 +44,6 @@ U_BOOT_CMD( - " - program date\n" - "mac ports\n" - " - program the number of ports\n" -- "mac 0\n" -- " - program the MAC address for port 0\n" -- "mac 1\n" -- " - program the MAC address for port 1\n" -- "mac 2\n" -- " - program the MAC address for port 2\n" -- "mac 3\n" -- " - program the MAC address for port 3\n" -- "mac 4\n" -- " - program the MAC address for port 4\n" -- "mac 5\n" -- " - program the MAC address for port 5\n" -- "mac 6\n" -- " - program the MAC address for port 6\n" -- "mac 7\n" -- " - program the MAC address for port 7\n" -+ "mac X\n" -+ " - program the MAC address for port X [X=0...7]" - ); -diff --git a/common/cmd_mem.c b/common/cmd_mem.c -index 2d4fc2a..cdf8c79 100644 ---- a/common/cmd_mem.c -+++ b/common/cmd_mem.c -@@ -1172,39 +1172,39 @@ int do_unzip ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - md, 3, 1, do_mem_md, - "memory display", -- "[.b, .w, .l] address [# of objects]\n - memory display\n" -+ "[.b, .w, .l] address [# of objects]" - ); - - - U_BOOT_CMD( - mm, 2, 1, do_mem_mm, -- "memory modify (auto-incrementing)", -- "[.b, .w, .l] address\n" " - memory modify, auto increment address\n" -+ "memory modify (auto-incrementing address)", -+ "[.b, .w, .l] address" - ); - - - U_BOOT_CMD( - nm, 2, 1, do_mem_nm, - "memory modify (constant address)", -- "[.b, .w, .l] address\n - memory modify, read and keep address\n" -+ "[.b, .w, .l] address" - ); - - U_BOOT_CMD( - mw, 4, 1, do_mem_mw, - "memory write (fill)", -- "[.b, .w, .l] address value [count]\n - write memory\n" -+ "[.b, .w, .l] address value [count]" - ); - - U_BOOT_CMD( - cp, 4, 1, do_mem_cp, - "memory copy", -- "[.b, .w, .l] source target count\n - copy memory\n" -+ "[.b, .w, .l] source target count" - ); - - U_BOOT_CMD( - cmp, 4, 1, do_mem_cmp, - "memory compare", -- "[.b, .w, .l] addr1 addr2 count\n - compare memory\n" -+ "[.b, .w, .l] addr1 addr2 count" - ); - - #ifndef CONFIG_CRC32_VERIFY -@@ -1212,7 +1212,7 @@ U_BOOT_CMD( - U_BOOT_CMD( - crc32, 4, 1, do_mem_crc, - "checksum calculation", -- "address count [addr]\n - compute CRC32 checksum [save at addr]\n" -+ "address count [addr]\n - compute CRC32 checksum [save at addr]" - ); - - #else /* CONFIG_CRC32_VERIFY */ -@@ -1221,7 +1221,7 @@ U_BOOT_CMD( - crc32, 5, 1, do_mem_crc, - "checksum calculation", - "address count [addr]\n - compute CRC32 checksum [save at addr]\n" -- "-v address count crc\n - verify crc of memory area\n" -+ "-v address count crc\n - verify crc of memory area" - ); - - #endif /* CONFIG_CRC32_VERIFY */ -@@ -1230,43 +1230,40 @@ U_BOOT_CMD( - base, 2, 1, do_mem_base, - "print or set address offset", - "\n - print address offset for memory commands\n" -- "base off\n - set address offset for memory commands to 'off'\n" -+ "base off\n - set address offset for memory commands to 'off'" - ); - - U_BOOT_CMD( - loop, 3, 1, do_mem_loop, - "infinite loop on address range", -- "[.b, .w, .l] address number_of_objects\n" -- " - loop on a set of addresses\n" -+ "[.b, .w, .l] address number_of_objects" - ); - - #ifdef CONFIG_LOOPW - U_BOOT_CMD( - loopw, 4, 1, do_mem_loopw, - "infinite write loop on address range", -- "[.b, .w, .l] address number_of_objects data_to_write\n" -- " - loop on a set of addresses\n" -+ "[.b, .w, .l] address number_of_objects data_to_write" - ); - #endif /* CONFIG_LOOPW */ - - U_BOOT_CMD( - mtest, 5, 1, do_mem_mtest, -- "simple RAM test", -- "[start [end [pattern [iterations]]]]\n" -- " - simple RAM read/write test\n" -+ "simple RAM read/write test", -+ "[start [end [pattern [iterations]]]]" - ); - - #ifdef CONFIG_MX_CYCLIC - U_BOOT_CMD( - mdc, 4, 1, do_mem_mdc, - "memory display cyclic", -- "[.b, .w, .l] address count delay(ms)\n - memory display cyclic\n" -+ "[.b, .w, .l] address count delay(ms)" - ); - - U_BOOT_CMD( - mwc, 4, 1, do_mem_mwc, - "memory write cyclic", -- "[.b, .w, .l] address value delay(ms)\n - memory write cyclic\n" -+ "[.b, .w, .l] address value delay(ms)" - ); - #endif /* CONFIG_MX_CYCLIC */ - -@@ -1274,6 +1271,6 @@ U_BOOT_CMD( - U_BOOT_CMD( - unzip, 4, 1, do_unzip, - "unzip a memory region", -- "srcaddr dstaddr [dstsize]\n" -+ "srcaddr dstaddr [dstsize]" - ); - #endif /* CONFIG_CMD_UNZIP */ -diff --git a/common/cmd_mfsl.c b/common/cmd_mfsl.c -index 6470bac..b19ad0e 100644 ---- a/common/cmd_mfsl.c -+++ b/common/cmd_mfsl.c -@@ -394,8 +394,7 @@ U_BOOT_CMD (frd, 3, 1, do_frd, - " 0 - non blocking data read\n" - " 1 - non blocking control read\n" - " 2 - blocking data read\n" -- " 3 - blocking control read\n"); -- -+ " 3 - blocking control read"); - - U_BOOT_CMD (fwr, 4, 1, do_fwr, - "write data to FSL", -@@ -403,11 +402,11 @@ U_BOOT_CMD (fwr, 4, 1, do_fwr, - " 0 - non blocking data write\n" - " 1 - non blocking control write\n" - " 2 - blocking data write\n" -- " 3 - blocking control write\n"); -+ " 3 - blocking control write"); - - U_BOOT_CMD (rspr, 3, 1, do_rspr, - "read/write special purpose register", - "- reg_num [write value] read/write special purpose register\n" - " 1 - MSR - Machine status register\n" - " 3 - EAR - Exception address register\n" -- " 5 - ESR - Exception status register\n"); -+ " 5 - ESR - Exception status register"); -diff --git a/common/cmd_mgdisk.c b/common/cmd_mgdisk.c -index 48323d4..aadc335 100644 ---- a/common/cmd_mgdisk.c -+++ b/common/cmd_mgdisk.c -@@ -70,7 +70,7 @@ U_BOOT_CMD( - " - random read : mgd read [from] [to] [size]\n" - " - random write : mgd write [from] [to] [size]\n" - " - sector read : mgd readsec [sector] [to] [counts]\n" -- " - sector write : mgd writesec [from] [sector] [counts]\n" -+ " - sector write : mgd writesec [from] [sector] [counts]" - ); - - #endif -diff --git a/common/cmd_mii.c b/common/cmd_mii.c -index d70031a..65e13c3 100644 ---- a/common/cmd_mii.c -+++ b/common/cmd_mii.c -@@ -460,5 +460,5 @@ U_BOOT_CMD( - "mii read - read MII PHY register \n" - "mii write - write MII PHY register \n" - "mii dump - pretty-print (0-5 only)\n" -- "Addr and/or reg may be ranges, e.g. 2-7.\n" -+ "Addr and/or reg may be ranges, e.g. 2-7." - ); -diff --git a/common/cmd_misc.c b/common/cmd_misc.c -index 024299a..b97537e 100644 ---- a/common/cmd_misc.c -+++ b/common/cmd_misc.c -@@ -56,7 +56,7 @@ int do_irqinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - U_BOOT_CMD( - irqinfo, 1, 1, do_irqinfo, - "print information about IRQs", -- NULL -+ "" - ); - #endif - -@@ -64,5 +64,5 @@ U_BOOT_CMD( - sleep , 2, 1, do_sleep, - "delay execution for some time", - "N\n" -- " - delay execution for N seconds (N is _decimal_ !!!)\n" -+ " - delay execution for N seconds (N is _decimal_ !!!)" - ); -diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c -index 039fe59..32fe49b 100644 ---- a/common/cmd_mmc.c -+++ b/common/cmd_mmc.c -@@ -89,7 +89,7 @@ U_BOOT_CMD( - mmc, 3, 1, do_mmc, - "MMC sub-system", - "init [dev] - init MMC sub system\n" -- "mmc device [dev] - show or set current device\n" -+ "mmc device [dev] - show or set current device" - ); - #else /* !CONFIG_GENERIC_MMC */ - -@@ -135,9 +135,10 @@ int do_mmcinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - return 0; - } - --U_BOOT_CMD(mmcinfo, 2, 0, do_mmcinfo, -- "print MMC information", -- "\n"); -+U_BOOT_CMD(mmcinfo, 2, 0, do_mmcinfo, -+ "mmcinfo -- display MMC info\n", -+ "" -+); - - int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - { -@@ -231,5 +232,5 @@ U_BOOT_CMD( - "read addr blk# cnt\n" - "mmc write addr blk# cnt\n" - "mmc rescan \n" -- "mmc list - list available devices\n"); -+ "mmc list - lists available devices"); - #endif -diff --git a/common/cmd_mp.c b/common/cmd_mp.c -index a0839c2..faa8700 100644 ---- a/common/cmd_mp.c -+++ b/common/cmd_mp.c -@@ -78,7 +78,7 @@ cpu_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - " Default for r3 is and r6 is 0\n" \ - "\n" \ - " When cpu is released r4 and r5 = 0.\n" \ -- " r7 will contain the size of the initial mapped area\n" -+ " r7 will contain the size of the initial mapped area" - #endif - - U_BOOT_CMD( -@@ -86,8 +86,9 @@ U_BOOT_CMD( - "Multiprocessor CPU boot manipulation and release", - " reset - Reset cpu \n" - "cpu status - Status of cpu \n" -- "cpu release [args] - Release cpu at with [args]\n" -+ "cpu release [args] - Release cpu at with [args]" - #ifdef CPU_ARCH_HELP -+ "\n" - CPU_ARCH_HELP - #endif -- ); -+); -diff --git a/common/cmd_mtdparts.c b/common/cmd_mtdparts.c -index 6a0849f..2d1446e 100644 ---- a/common/cmd_mtdparts.c -+++ b/common/cmd_mtdparts.c -@@ -90,7 +90,8 @@ - #include - #include - #include --#include -+#include -+#include - - #if defined(CONFIG_CMD_NAND) - #ifdef CONFIG_NAND_LEGACY -@@ -102,7 +103,6 @@ - #endif - - #if defined(CONFIG_CMD_ONENAND) --#include - #include - #include - #endif -@@ -137,14 +137,12 @@ - #if defined(MTDIDS_DEFAULT) - static const char *const mtdids_default = MTDIDS_DEFAULT; - #else --#warning "MTDIDS_DEFAULT not defined!" - static const char *const mtdids_default = NULL; - #endif - - #if defined(MTDPARTS_DEFAULT) - static const char *const mtdparts_default = MTDPARTS_DEFAULT; - #else --#warning "MTDPARTS_DEFAULT not defined!" - static const char *const mtdparts_default = NULL; - #endif - -@@ -303,137 +301,91 @@ static void current_save(void) - } - - /** -- * Performs sanity check for supplied NOR flash partition. Table of existing -- * NOR flash devices is searched and partition device is located. Alignment -- * with the granularity of NOR flash sectors is verified. -+ * Performs sanity check for supplied flash partition. -+ * Table of existing MTD flash devices is searched and partition device -+ * is located. Alignment with the granularity of nand erasesize is verified. - * - * @param id of the parent device - * @param part partition to validate - * @return 0 if partition is valid, 1 otherwise - */ --static int part_validate_nor(struct mtdids *id, struct part_info *part) -+static int part_validate_eraseblock(struct mtdids *id, struct part_info *part) - { --#if defined(CONFIG_CMD_FLASH) -- /* info for FLASH chips */ -- extern flash_info_t flash_info[]; -- flash_info_t *flash; -- int offset_aligned; -- u32 end_offset, sector_size = 0; -- int i; -- -- flash = &flash_info[id->num]; -- -- /* size of last sector */ -- part->sector_size = flash->size - -- (flash->start[flash->sector_count-1] - flash->start[0]); -- -- offset_aligned = 0; -- for (i = 0; i < flash->sector_count; i++) { -- if ((flash->start[i] - flash->start[0]) == part->offset) { -- offset_aligned = 1; -- break; -- } -- } -- if (offset_aligned == 0) { -- printf("%s%d: partition (%s) start offset alignment incorrect\n", -- MTD_DEV_TYPE(id->type), id->num, part->name); -+ struct mtd_info *mtd; -+ char mtd_dev[16]; -+ int i, j; -+ ulong start; -+ -+ sprintf(mtd_dev, "%s%d", MTD_DEV_TYPE(id->type), id->num); -+ mtd = get_mtd_device_nm(mtd_dev); -+ if (IS_ERR(mtd)) { -+ printf("Partition %s not found on device %s!\n", part->name, mtd_dev); - return 1; - } - -- end_offset = part->offset + part->size; -- offset_aligned = 0; -- for (i = 0; i < flash->sector_count; i++) { -- if (i) { -- sector_size = flash->start[i] - flash->start[i-1]; -- if (part->sector_size < sector_size) -- part->sector_size = sector_size; -- } -- if ((flash->start[i] - flash->start[0]) == end_offset) -- offset_aligned = 1; -- } -- -- if (offset_aligned || flash->size == end_offset) -- return 0; -- -- printf("%s%d: partition (%s) size alignment incorrect\n", -- MTD_DEV_TYPE(id->type), id->num, part->name); --#endif -- return 1; --} -- --/** -- * Performs sanity check for supplied NAND flash partition. Table of existing -- * NAND flash devices is searched and partition device is located. Alignment -- * with the granularity of nand erasesize is verified. -- * -- * @param id of the parent device -- * @param part partition to validate -- * @return 0 if partition is valid, 1 otherwise -- */ --static int part_validate_nand(struct mtdids *id, struct part_info *part) --{ --#if defined(CONFIG_CMD_NAND) -- /* info for NAND chips */ -- nand_info_t *nand; -+ part->sector_size = mtd->erasesize; - -- nand = &nand_info[id->num]; -+ if (!mtd->numeraseregions) { -+ /* -+ * Only one eraseregion (NAND, OneNAND or uniform NOR), -+ * checking for alignment is easy here -+ */ -+ if ((unsigned long)part->offset % mtd->erasesize) { -+ printf("%s%d: partition (%s) start offset" -+ "alignment incorrect\n", -+ MTD_DEV_TYPE(id->type), id->num, part->name); -+ return 1; -+ } - -- part->sector_size = nand->erasesize; -+ if (part->size % mtd->erasesize) { -+ printf("%s%d: partition (%s) size alignment incorrect\n", -+ MTD_DEV_TYPE(id->type), id->num, part->name); -+ return 1; -+ } -+ } else { -+ /* -+ * Multiple eraseregions (non-uniform NOR), -+ * checking for alignment is more complex here -+ */ -+ -+ /* Check start alignment */ -+ for (i = 0; i < mtd->numeraseregions; i++) { -+ start = mtd->eraseregions[i].offset; -+ for (j = 0; j < mtd->eraseregions[i].numblocks; j++) { -+ if (part->offset == start) -+ goto start_ok; -+ start += mtd->eraseregions[i].erasesize; -+ } -+ } - -- if ((unsigned long)(part->offset) % nand->erasesize) { - printf("%s%d: partition (%s) start offset alignment incorrect\n", -- MTD_DEV_TYPE(id->type), id->num, part->name); -- return 1; -- } -- -- if (part->size % nand->erasesize) { -- printf("%s%d: partition (%s) size alignment incorrect\n", -- MTD_DEV_TYPE(id->type), id->num, part->name); -+ MTD_DEV_TYPE(id->type), id->num, part->name); - return 1; -- } - -- return 0; --#else -- return 1; --#endif --} -+ start_ok: - --/** -- * Performs sanity check for supplied OneNAND flash partition. -- * Table of existing OneNAND flash devices is searched and partition device -- * is located. Alignment with the granularity of nand erasesize is verified. -- * -- * @param id of the parent device -- * @param part partition to validate -- * @return 0 if partition is valid, 1 otherwise -- */ --static int part_validate_onenand(struct mtdids *id, struct part_info *part) --{ --#if defined(CONFIG_CMD_ONENAND) -- /* info for OneNAND chips */ -- struct mtd_info *mtd; -- -- mtd = &onenand_mtd; -- -- part->sector_size = mtd->erasesize; -- -- if ((unsigned long)(part->offset) % mtd->erasesize) { -- printf("%s%d: partition (%s) start offset" -- "alignment incorrect\n", -- MTD_DEV_TYPE(id->type), id->num, part->name); -- return 1; -- } -+ /* Check end/size alignment */ -+ for (i = 0; i < mtd->numeraseregions; i++) { -+ start = mtd->eraseregions[i].offset; -+ for (j = 0; j < mtd->eraseregions[i].numblocks; j++) { -+ if ((part->offset + part->size) == start) -+ goto end_ok; -+ start += mtd->eraseregions[i].erasesize; -+ } -+ } -+ /* Check last sector alignment */ -+ if ((part->offset + part->size) == start) -+ goto end_ok; - -- if (part->size % mtd->erasesize) { - printf("%s%d: partition (%s) size alignment incorrect\n", -- MTD_DEV_TYPE(id->type), id->num, part->name); -+ MTD_DEV_TYPE(id->type), id->num, part->name); - return 1; -+ -+ end_ok: -+ return 0; - } - - return 0; --#else -- return 1; --#endif - } - - -@@ -469,16 +421,11 @@ static int part_validate(struct mtdids *id, struct part_info *part) - return 1; - } - -- if (id->type == MTD_DEV_TYPE_NAND) -- return part_validate_nand(id, part); -- else if (id->type == MTD_DEV_TYPE_NOR) -- return part_validate_nor(id, part); -- else if (id->type == MTD_DEV_TYPE_ONENAND) -- return part_validate_onenand(id, part); -- else -- DEBUGF("part_validate: invalid dev type\n"); -- -- return 1; -+ /* -+ * Now we need to check if the partition starts and ends on -+ * sector (eraseblock) regions -+ */ -+ return part_validate_eraseblock(id, part); - } - - /** -@@ -762,48 +709,19 @@ static int part_parse(const char *const partdef, const char **ret, struct part_i - */ - int mtd_device_validate(u8 type, u8 num, u32 *size) - { -- if (type == MTD_DEV_TYPE_NOR) { --#if defined(CONFIG_CMD_FLASH) -- if (num < CONFIG_SYS_MAX_FLASH_BANKS) { -- extern flash_info_t flash_info[]; -- *size = flash_info[num].size; -- -- return 0; -- } -+ struct mtd_info *mtd; -+ char mtd_dev[16]; - -- printf("no such FLASH device: %s%d (valid range 0 ... %d\n", -- MTD_DEV_TYPE(type), num, CONFIG_SYS_MAX_FLASH_BANKS - 1); --#else -- printf("support for FLASH devices not present\n"); --#endif -- } else if (type == MTD_DEV_TYPE_NAND) { --#if defined(CONFIG_CMD_NAND) -- if (num < CONFIG_SYS_MAX_NAND_DEVICE) { --#ifndef CONFIG_NAND_LEGACY -- *size = nand_info[num].size; --#else -- extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE]; -- *size = nand_dev_desc[num].totlen; --#endif -- return 0; -- } -+ sprintf(mtd_dev, "%s%d", MTD_DEV_TYPE(type), num); -+ mtd = get_mtd_device_nm(mtd_dev); -+ if (IS_ERR(mtd)) { -+ printf("Device %s not found!\n", mtd_dev); -+ return 1; -+ } - -- printf("no such NAND device: %s%d (valid range 0 ... %d)\n", -- MTD_DEV_TYPE(type), num, CONFIG_SYS_MAX_NAND_DEVICE - 1); --#else -- printf("support for NAND devices not present\n"); --#endif -- } else if (type == MTD_DEV_TYPE_ONENAND) { --#if defined(CONFIG_CMD_ONENAND) -- *size = onenand_mtd.size; -- return 0; --#else -- printf("support for OneNAND devices not present\n"); --#endif -- } else -- printf("Unknown defice type %d\n", type); -+ *size = mtd->size; - -- return 1; -+ return 0; - } - - /** -@@ -1344,8 +1262,10 @@ static void list_partitions(void) - } - - printf("\ndefaults:\n"); -- printf("mtdids : %s\n", mtdids_default); -- printf("mtdparts: %s\n", mtdparts_default); -+ printf("mtdids : %s\n", -+ mtdids_default ? mtdids_default : "none"); -+ printf("mtdparts: %s\n", -+ mtdparts_default ? mtdparts_default : "none"); - } - - /** -@@ -1943,7 +1863,7 @@ U_BOOT_CMD( - chpart, 2, 0, do_chpart, - "change active partition", - "part-id\n" -- " - change active partition (e.g. part-id = nand0,1)\n" -+ " - change active partition (e.g. part-id = nand0,1)" - ); - - U_BOOT_CMD( -@@ -1978,6 +1898,6 @@ U_BOOT_CMD( - " := standard linux memsize OR '-' to denote all remaining space\n" - " := partition start offset within the device\n" - " := '(' NAME ')'\n" -- " := when set to 'ro' makes partition read-only (not used, passed to kernel)\n" -+ " := when set to 'ro' makes partition read-only (not used, passed to kernel)" - ); - /***************************************************/ -diff --git a/common/cmd_nand.c b/common/cmd_nand.c -index 1992531..9451416 100644 ---- a/common/cmd_nand.c -+++ b/common/cmd_nand.c -@@ -476,25 +476,26 @@ usage: - return 1; - } - --U_BOOT_CMD(nand, 5, 1, do_nand, -- "NAND sub-system", -- "info - show available NAND devices\n" -- "nand device [dev] - show or set current device\n" -- "nand read - addr off|partition size\n" -- "nand write - addr off|partition size\n" -- " read/write 'size' bytes starting at offset 'off'\n" -- " to/from memory address 'addr', skipping bad blocks.\n" -- "nand erase [clean] [off size] - erase 'size' bytes from\n" -- " offset 'off' (entire device if not specified)\n" -- "nand bad - show bad blocks\n" -- "nand dump[.oob] off - dump page\n" -- "nand scrub - really clean NAND erasing bad blocks (UNSAFE)\n" -- "nand markbad off - mark bad block at offset (UNSAFE)\n" -- "nand biterr off - make a bit error at offset (UNSAFE)\n" -+U_BOOT_CMD(nand, CONFIG_SYS_MAXARGS, 1, do_nand, -+ "NAND sub-system", -+ "info - show available NAND devices\n" -+ "nand device [dev] - show or set current device\n" -+ "nand read - addr off|partition size\n" -+ "nand write - addr off|partition size\n" -+ " read/write 'size' bytes starting at offset 'off'\n" -+ " to/from memory address 'addr', skipping bad blocks.\n" -+ "nand erase [clean] [off size] - erase 'size' bytes from\n" -+ " offset 'off' (entire device if not specified)\n" -+ "nand bad - show bad blocks\n" -+ "nand dump[.oob] off - dump page\n" -+ "nand scrub - really clean NAND erasing bad blocks (UNSAFE)\n" -+ "nand markbad off [...] - mark bad block(s) at offset (UNSAFE)\n" -+ "nand biterr off - make a bit error at offset (UNSAFE)" - #ifdef CONFIG_CMD_NAND_LOCK_UNLOCK -- "nand lock [tight] [status]\n" -- " bring nand to lock state or display locked pages\n" -- "nand unlock [offset] [size] - unlock section\n" -+ "\n" -+ "nand lock [tight] [status]\n" -+ " bring nand to lock state or display locked pages\n" -+ "nand unlock [offset] [size] - unlock section" - #endif - ); - -@@ -673,8 +674,8 @@ usage: - - U_BOOT_CMD(nboot, 4, 1, do_nandboot, - "boot from NAND device", -- "[partition] | [[[loadAddr] dev] offset]\n"); -- -+ "[partition] | [[[loadAddr] dev] offset]" -+); - #endif - - #else /* CONFIG_NAND_LEGACY */ -@@ -941,7 +942,7 @@ U_BOOT_CMD( - " offset `off' (entire device if not specified)\n" - "nand bad - show bad blocks\n" - "nand read.oob addr off size - read out-of-band data\n" -- "nand write.oob addr off size - read out-of-band data\n" -+ "nand write.oob addr off size - read out-of-band data" - ); - - int do_nandboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -@@ -1081,7 +1082,7 @@ int do_nandboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - nboot, 4, 1, do_nandboot, - "boot from NAND device", -- "loadAddr dev\n" -+ "loadAddr dev" - ); - - #endif -diff --git a/common/cmd_net.c b/common/cmd_net.c -index 92bbf85..68183c4 100644 ---- a/common/cmd_net.c -+++ b/common/cmd_net.c -@@ -40,7 +40,7 @@ int do_bootp (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - bootp, 3, 1, do_bootp, - "boot image via network using BOOTP/TFTP protocol", -- "[loadAddress] [[hostIPaddr:]bootfilename]\n" -+ "[loadAddress] [[hostIPaddr:]bootfilename]" - ); - - int do_tftpb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -@@ -51,7 +51,7 @@ int do_tftpb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - tftpboot, 3, 1, do_tftpb, - "boot image via network using TFTP protocol", -- "[loadAddress] [[hostIPaddr:]bootfilename]\n" -+ "[loadAddress] [[hostIPaddr:]bootfilename]" - ); - - int do_rarpb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -@@ -62,7 +62,7 @@ int do_rarpb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - rarpboot, 3, 1, do_rarpb, - "boot image via network using RARP/TFTP protocol", -- "[loadAddress] [[hostIPaddr:]bootfilename]\n" -+ "[loadAddress] [[hostIPaddr:]bootfilename]" - ); - - #if defined(CONFIG_CMD_DHCP) -@@ -74,7 +74,7 @@ int do_dhcp (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - dhcp, 3, 1, do_dhcp, - "boot image via network using DHCP/TFTP protocol", -- "[loadAddress] [[hostIPaddr:]bootfilename]\n" -+ "[loadAddress] [[hostIPaddr:]bootfilename]" - ); - #endif - -@@ -87,7 +87,7 @@ int do_nfs (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - nfs, 3, 1, do_nfs, - "boot image via network using NFS protocol", -- "[loadAddress] [[hostIPaddr:]bootfilename]\n" -+ "[loadAddress] [[hostIPaddr:]bootfilename]" - ); - #endif - -@@ -269,7 +269,7 @@ int do_ping (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - ping, 2, 1, do_ping, - "send ICMP ECHO_REQUEST to network host", -- "pingAddress\n" -+ "pingAddress" - ); - #endif - -diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c -index 3ee971a..2186205 100644 ---- a/common/cmd_nvedit.c -+++ b/common/cmd_nvedit.c -@@ -94,56 +94,72 @@ int get_env_id (void) - * Command interface: print one or all environment variables - */ - --int do_printenv (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -+/* -+ * state 0: finish printing this string and return (matched!) -+ * state 1: no matching to be done; print everything -+ * state 2: continue searching for matched name -+ */ -+static int printenv(char *name, int state) - { -- int i, j, k, nxt; -- int rcode = 0; -- -- if (argc == 1) { /* Print all env variables */ -- for (i=0; env_get_char(i) != '\0'; i=nxt+1) { -- for (nxt=i; env_get_char(nxt) != '\0'; ++nxt) -- ; -- for (k=i; k= 0) -+ state = 0; -+ -+ j = 0; -+ do { -+ buf[j++] = c = env_get_char(i++); -+ if (j == sizeof(buf) - 1) { -+ if (state <= 1) -+ puts(buf); -+ j = 0; - } -- } -+ } while (c != '\0'); - -- printf("\nEnvironment size: %d/%ld bytes\n", -- i, (ulong)ENV_SIZE); -+ if (state <= 1) { -+ if (j) -+ puts(buf); -+ putc('\n'); -+ } - -- return 0; -+ if (ctrlc()) -+ return -1; - } - -- for (i=1; i - -+#if !defined(CONFIG_SYS_64BIT_VSPRINTF) -+#warning Please define CONFIG_SYS_64BIT_VSPRINTF for correct output! -+#endif -+ - static struct mtd_info *mtd; - - static loff_t next_ofs; -@@ -53,7 +57,7 @@ static int arg_off_size(int argc, char *argv[], ulong *off, size_t *size) - } - - if ((*off + *size) > mtd->size) { -- printf("total chip size (0x%x) exceeded!\n", mtd->size); -+ printf("total chip size (0x%llx) exceeded!\n", mtd->size); - return -1; - } - -@@ -482,5 +486,5 @@ U_BOOT_CMD( - "onenand test [off size] - test 'size' bytes from\n" - " offset 'off' (entire device if not specified)\n" - "onenand dump[.oob] off - dump page\n" -- "onenand markbad off - mark bad block at offset (UNSAFE)\n" -+ "onenand markbad off [...] - mark bad block(s) at offset (UNSAFE)" - ); -diff --git a/common/cmd_otp.c b/common/cmd_otp.c -index 4be4344..30af5a3 100644 ---- a/common/cmd_otp.c -+++ b/common/cmd_otp.c -@@ -233,4 +233,5 @@ U_BOOT_CMD(otp, 7, 0, do_otp, - "otp write [--force] [count] [half]\n" - " - write 'count' half-pages starting at 'page' (offset 'half') from 'addr'\n" - "otp lock \n" -- " - lock 'count' pages starting at 'page'\n"); -+ " - lock 'count' pages starting at 'page'" -+); -diff --git a/common/cmd_pci.c b/common/cmd_pci.c -index 4a9317f..8a260df 100644 ---- a/common/cmd_pci.c -+++ b/common/cmd_pci.c -@@ -555,5 +555,5 @@ U_BOOT_CMD( - "pci modify[.b, .w, .l] b.d.f address\n" - " - modify, auto increment CFG address\n" - "pci write[.b, .w, .l] b.d.f address value\n" -- " - write to CFG address\n" -+ " - write to CFG address" - ); -diff --git a/common/cmd_pcmcia.c b/common/cmd_pcmcia.c -index e448456..e576b0c 100644 ---- a/common/cmd_pcmcia.c -+++ b/common/cmd_pcmcia.c -@@ -90,8 +90,8 @@ U_BOOT_CMD( - pinit, 2, 0, do_pinit, - "PCMCIA sub-system", - "on - power on PCMCIA socket\n" -- "pinit off - power off PCMCIA socket\n" -- ); -+ "pinit off - power off PCMCIA socket" -+); - - #endif - -diff --git a/common/cmd_portio.c b/common/cmd_portio.c -index 41b1991..f8befee 100644 ---- a/common/cmd_portio.c -+++ b/common/cmd_portio.c -@@ -94,7 +94,7 @@ int do_portio_out (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - out, 3, 1, do_portio_out, - "write datum to IO port", -- "[.b, .w, .l] port value\n - output to IO port\n" -+ "[.b, .w, .l] port value\n - output to IO port" - ); - - int do_portio_in (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) -@@ -159,5 +159,5 @@ U_BOOT_CMD( - in, 2, 1, do_portio_in, - "read data from an IO port", - "[.b, .w, .l] port\n" -- " - read datum from IO port\n" -+ " - read datum from IO port" - ); -diff --git a/common/cmd_reginfo.c b/common/cmd_reginfo.c -index 0e28c05..abb9941 100644 ---- a/common/cmd_reginfo.c -+++ b/common/cmd_reginfo.c -@@ -383,5 +383,6 @@ int do_reginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - reginfo, 2, 1, do_reginfo, - "print register information", -+ "" - ); - #endif -diff --git a/common/cmd_reiser.c b/common/cmd_reiser.c -index 14e4bd4..8ede782 100644 ---- a/common/cmd_reiser.c -+++ b/common/cmd_reiser.c -@@ -104,7 +104,7 @@ U_BOOT_CMD( - reiserls, 4, 1, do_reiserls, - "list files in a directory (default /)", - " [directory]\n" -- " - list files from 'dev' on 'interface' in a 'directory'\n" -+ " - list files from 'dev' on 'interface' in a 'directory'" - ); - - /****************************************************************************** -@@ -235,5 +235,5 @@ U_BOOT_CMD( - "load binary file from a Reiser filesystem", - " [addr] [filename] [bytes]\n" - " - load binary file 'filename' from 'dev' on 'interface'\n" -- " to address 'addr' from dos filesystem\n" -+ " to address 'addr' from dos filesystem" - ); -diff --git a/common/cmd_sata.c b/common/cmd_sata.c -index e849778..a8147e0 100644 ---- a/common/cmd_sata.c -+++ b/common/cmd_sata.c -@@ -200,4 +200,5 @@ U_BOOT_CMD( - "sata device [dev] - show or set current device\n" - "sata part [dev] - print partition table\n" - "sata read addr blk# cnt\n" -- "sata write addr blk# cnt\n"); -+ "sata write addr blk# cnt" -+); -diff --git a/common/cmd_scsi.c b/common/cmd_scsi.c -index dd2c1ae..f89492f 100644 ---- a/common/cmd_scsi.c -+++ b/common/cmd_scsi.c -@@ -623,11 +623,11 @@ U_BOOT_CMD( - "scsi device [dev] - show or set current device\n" - "scsi part [dev] - print partition table of one or all SCSI devices\n" - "scsi read addr blk# cnt - read `cnt' blocks starting at block `blk#'\n" -- " to memory address `addr'\n" -+ " to memory address `addr'" - ); - - U_BOOT_CMD( - scsiboot, 3, 1, do_scsiboot, - "boot from SCSI device", -- "loadAddr dev:part\n" -+ "loadAddr dev:part" - ); -diff --git a/common/cmd_setexpr.c b/common/cmd_setexpr.c -index 9a5e720..f8b5d4d 100644 ---- a/common/cmd_setexpr.c -+++ b/common/cmd_setexpr.c -@@ -66,5 +66,5 @@ U_BOOT_CMD( - "set environment variable as the result of eval expression", - "name value1 value2\n" - " - set environment variable 'name' to the result of the evaluated\n" -- " express specified by . can be &, |, ^, +, -, *, /, %\n" -+ " express specified by . can be &, |, ^, +, -, *, /, %" - ); -diff --git a/common/cmd_sf.c b/common/cmd_sf.c -index 6a60b16..2d463a8 100644 ---- a/common/cmd_sf.c -+++ b/common/cmd_sf.c -@@ -188,4 +188,5 @@ U_BOOT_CMD( - " `offset' to memory at `addr'\n" - "sf write addr offset len - write `len' bytes from memory\n" - " at `addr' to flash at `offset'\n" -- "sf erase offset len - erase `len' bytes from `offset'\n"); -+ "sf erase offset len - erase `len' bytes from `offset'" -+); -diff --git a/common/cmd_source.c b/common/cmd_source.c -index 43e1315..965b8b1 100644 ---- a/common/cmd_source.c -+++ b/common/cmd_source.c -@@ -229,10 +229,11 @@ U_BOOT_CMD( - "run script from memory", - "[addr]\n" - "\t- run script starting at addr\n" -- "\t- A valid image header must be present\n" -+ "\t- A valid image header must be present" - #if defined(CONFIG_FIT) -+ "\n" - "For FIT format uImage addr must include subimage\n" -- "unit name in the form of addr:\n" -+ "unit name in the form of addr:" - #endif - ); - -@@ -251,6 +252,6 @@ do_autoscr (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - autoscr, 2, 0, do_autoscr, - "DEPRECATED - use \"source\" command instead", -- "DEPRECATED - use \"source\" command instead\n" -+ "" - ); - #endif -diff --git a/common/cmd_spi.c b/common/cmd_spi.c -index 746d14f..ab7aac7 100644 ---- a/common/cmd_spi.c -+++ b/common/cmd_spi.c -@@ -142,5 +142,5 @@ U_BOOT_CMD( - " - Send bits from out the SPI\n" - " - Identifies the chip select of the device\n" - " - Number of bits to send (base 10)\n" -- " - Hexadecimal string that gets sent\n" -+ " - Hexadecimal string that gets sent" - ); -diff --git a/common/cmd_strings.c b/common/cmd_strings.c -index 4517ba2..3a0d8ff 100644 ---- a/common/cmd_strings.c -+++ b/common/cmd_strings.c -@@ -43,4 +43,5 @@ int do_strings(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD(strings, 3, 1, do_strings, - "display strings", - " [byte count]\n" -- " - display strings at for at least [byte count] or first double NUL\n"); -+ " - display strings at for at least [byte count] or first double NUL" -+); -diff --git a/common/cmd_ubi.c b/common/cmd_ubi.c -index 64a7307..bbca389 100644 ---- a/common/cmd_ubi.c -+++ b/common/cmd_ubi.c -@@ -609,5 +609,5 @@ U_BOOT_CMD(ubi, 6, 1, do_ubi, - "[Legends]\n" - " volume: charater name\n" - " size: KiB, MiB, GiB, and bytes\n" -- " type: s[tatic] or d[ynamic] (default=dynamic)\n" -+ " type: s[tatic] or d[ynamic] (default=dynamic)" - ); -diff --git a/common/cmd_ubifs.c b/common/cmd_ubifs.c -index 4767aa4..d9f60d5 100644 ---- a/common/cmd_ubifs.c -+++ b/common/cmd_ubifs.c -@@ -119,14 +119,17 @@ int do_ubifs_load(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - ubifsmount, 2, 0, do_ubifs_mount, - "mount UBIFS volume", -- "\n"); -+ "" -+); - - U_BOOT_CMD(ubifsls, 2, 0, do_ubifs_ls, -- "list files in a directory", -- "[directory]\n" -- " - list files in a 'directory' (default '/')\n"); -+ "list files in a directory", -+ "[directory]\n" -+ " - list files in a 'directory' (default '/')" -+); - - U_BOOT_CMD(ubifsload, 4, 0, do_ubifs_load, -- "load file from an UBIFS filesystem", -- " [bytes]\n" -- " - load file 'filename' to address 'addr'\n"); -+ "load file from an UBIFS filesystem", -+ " [bytes]\n" -+ " - load file 'filename' to address 'addr'" -+); -diff --git a/common/cmd_universe.c b/common/cmd_universe.c -index bfb91b5..0a6d722 100644 ---- a/common/cmd_universe.c -+++ b/common/cmd_universe.c -@@ -382,5 +382,5 @@ U_BOOT_CMD( - " 03 -> Configuration Space\n" - " [vdw] = VMEbus Maximum Datawidth: 01 -> D8 Data Width\n" - " 02 -> D16 Data Width\n" -- " 03 -> D32 Data Width\n" -+ " 03 -> D32 Data Width" - ); -diff --git a/common/cmd_usb.c b/common/cmd_usb.c -index a18e16e..7b8ee6b 100644 ---- a/common/cmd_usb.c -+++ b/common/cmd_usb.c -@@ -686,14 +686,14 @@ U_BOOT_CMD( - "usb part [dev] - print partition table of one or all USB storage" - " devices\n" - "usb read addr blk# cnt - read `cnt' blocks starting at block `blk#'\n" -- " to memory address `addr'\n" -+ " to memory address `addr'" - ); - - - U_BOOT_CMD( - usbboot, 3, 1, do_usbboot, - "boot from USB device", -- "loadAddr dev:part\n" -+ "loadAddr dev:part" - ); - - #else -@@ -702,6 +702,6 @@ U_BOOT_CMD( - "USB sub-system", - "reset - reset (rescan) USB controller\n" - "usb tree - show USB device tree\n" -- "usb info [dev] - show available USB devices\n" -+ "usb info [dev] - show available USB devices" - ); - #endif -diff --git a/common/cmd_vfd.c b/common/cmd_vfd.c -index 84d9530..9c5b038 100644 ---- a/common/cmd_vfd.c -+++ b/common/cmd_vfd.c -@@ -71,7 +71,7 @@ U_BOOT_CMD( - "/N\n" - " - load bitmap N to the VFDs (N is _decimal_ !!!)\n" - "vfd ADDR\n" -- " - load bitmap at address ADDR\n" -+ " - load bitmap at address ADDR" - ); - #endif - -diff --git a/common/cmd_ximg.c b/common/cmd_ximg.c -index a45d248..5593b2d 100644 ---- a/common/cmd_ximg.c -+++ b/common/cmd_ximg.c -@@ -180,11 +180,12 @@ do_imgextract(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - } - - U_BOOT_CMD(imxtract, 4, 1, do_imgextract, -- "extract a part of a multi-image", -- "addr part [dest]\n" -- " - extract from legacy image at and copy to \n" -+ "extract a part of a multi-image", -+ "addr part [dest]\n" -+ " - extract from legacy image at and copy to " - #if defined(CONFIG_FIT) -- "addr uname [dest]\n" -- " - extract subimage from FIT image at and copy to \n" -+ "\n" -+ "addr uname [dest]\n" -+ " - extract subimage from FIT image at and copy to " - #endif - ); -diff --git a/common/cmd_yaffs2.c b/common/cmd_yaffs2.c -index c47ea76..d448d04 100644 ---- a/common/cmd_yaffs2.c -+++ b/common/cmd_yaffs2.c -@@ -143,71 +143,71 @@ int do_ydump (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - ymount, 3, 0, do_ymount, - "mount yaffs", -- "\n" -+ "" - ); - - U_BOOT_CMD( - yumount, 3, 0, do_yumount, - "unmount yaffs", -- "\n" -+ "" - ); - - U_BOOT_CMD( - yls, 4, 0, do_yls, - "yaffs ls", -- "[-l] name\n" -+ "[-l] name" - ); - - U_BOOT_CMD( - yrd, 2, 0, do_yrd, - "read file from yaffs", -- "filename\n" -+ "filename" - ); - - U_BOOT_CMD( - ywr, 4, 0, do_ywr, - "write file to yaffs", -- "filename value num_vlues\n" -+ "filename value num_vlues" - ); - - U_BOOT_CMD( - yrdm, 3, 0, do_yrdm, - "read file to memory from yaffs", -- "filename offset\n" -+ "filename offset" - ); - - U_BOOT_CMD( - ywrm, 4, 0, do_ywrm, - "write file from memory to yaffs", -- "filename offset size\n" -+ "filename offset size" - ); - - U_BOOT_CMD( - ymkdir, 2, 0, do_ymkdir, - "YAFFS mkdir", -- "dirname\n" -+ "dirname" - ); - - U_BOOT_CMD( - yrmdir, 2, 0, do_yrmdir, - "YAFFS rmdir", -- "dirname\n" -+ "dirname" - ); - - U_BOOT_CMD( - yrm, 2, 0, do_yrm, - "YAFFS rm", -- "path\n" -+ "path" - ); - - U_BOOT_CMD( - ymv, 4, 0, do_ymv, - "YAFFS mv", -- "oldPath newPath\n" -+ "oldPath newPath" - ); - - U_BOOT_CMD( - ydump, 2, 0, do_ydump, - "YAFFS device struct", -- "dirname\n" -+ "dirname" - ); -diff --git a/common/command.c b/common/command.c -index c9a3f5b..b57f8df 100644 ---- a/common/command.c -+++ b/common/command.c -@@ -39,7 +39,7 @@ do_version (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - version, 1, 1, do_version, - "print monitor version", -- NULL -+ "" - ); - - #if defined(CONFIG_CMD_ECHO) -@@ -73,7 +73,7 @@ U_BOOT_CMD( - echo, CONFIG_SYS_MAXARGS, 1, do_echo, - "echo args to console", - "[args..]\n" -- " - echo args to console; \\c suppresses newline\n" -+ " - echo args to console; \\c suppresses newline" - ); - - #endif -@@ -204,8 +204,7 @@ do_test (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - test, CONFIG_SYS_MAXARGS, 1, do_test, - "minimal test like /bin/sh", -- "[args..]\n" -- " - test functionality\n" -+ "[args..]" - ); - - int -@@ -223,7 +222,7 @@ do_exit (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - exit, 2, 1, do_exit, - "exit script", -- " - exit functionality\n" -+ "" - ); - - -@@ -286,21 +285,7 @@ int _do_help (cmd_tbl_t *cmd_start, int cmd_items, cmd_tbl_t * cmdtp, int - */ - for (i = 1; i < argc; ++i) { - if ((cmdtp = find_cmd_tbl (argv[i], cmd_start, cmd_items )) != NULL) { --#ifdef CONFIG_SYS_LONGHELP -- /* found - print (long) help info */ -- puts (cmdtp->name); -- putc (' '); -- if (cmdtp->help) { -- puts (cmdtp->help); -- } else { -- puts ("- No help available.\n"); -- rcode = 1; -- } -- putc ('\n'); --#else /* no long help available */ -- if (cmdtp->usage) -- printf ("%s - %s\n", cmdtp->name, cmdtp->usage); --#endif /* CONFIG_SYS_LONGHELP */ -+ rcode |= cmd_usage(cmdtp); - } else { - printf ("Unknown command '%s' - try 'help'" - " without arguments for list of all" -@@ -328,15 +313,15 @@ U_BOOT_CMD( - "'help' prints online help for the monitor commands.\n\n" - "Without arguments, it prints a short usage message for all commands.\n\n" - "To get detailed help information for specific commands you can type\n" -- "'help' with one or more command names as arguments.\n" -+ "'help' with one or more command names as arguments." - ); - --/* This do not ust the U_BOOT_CMD macro as ? can't be used in symbol names */ -+/* This does not use the U_BOOT_CMD macro as ? can't be used in symbol names */ - #ifdef CONFIG_SYS_LONGHELP - cmd_tbl_t __u_boot_cmd_question_mark Struct_Section = { - "?", CONFIG_SYS_MAXARGS, 1, do_help, - "alias for 'help'", -- NULL -+ "" - }; - #else - cmd_tbl_t __u_boot_cmd_question_mark Struct_Section = { -@@ -386,9 +371,22 @@ cmd_tbl_t *find_cmd (const char *cmd) - return find_cmd_tbl(cmd, &__u_boot_cmd_start, len); - } - --void cmd_usage(cmd_tbl_t *cmdtp) -+int cmd_usage(cmd_tbl_t *cmdtp) - { -- printf("Usage:\n%s - %s\n\n", cmdtp->name, cmdtp->usage); -+ printf("%s - %s\n\n", cmdtp->name, cmdtp->usage); -+ -+#ifdef CONFIG_SYS_LONGHELP -+ printf("Usage:\n%s ", cmdtp->name); -+ -+ if (!cmdtp->help) { -+ puts ("- No additional help available.\n"); -+ return 1; -+ } -+ -+ puts (cmdtp->help); -+ putc ('\n'); -+#endif /* CONFIG_SYS_LONGHELP */ -+ return 0; - } - - #ifdef CONFIG_AUTO_COMPLETE -diff --git a/common/env_onenand.c b/common/env_onenand.c -index dbccc79..ed77051 100644 ---- a/common/env_onenand.c -+++ b/common/env_onenand.c -@@ -109,7 +109,7 @@ int saveenv(void) - - if (onenand_write(&onenand_mtd, env_addr, onenand_mtd.writesize, &retlen, - (u_char *) env_ptr)) { -- printf("OneNAND: write failed at 0x%08x\n", instr.addr); -+ printf("OneNAND: write failed at 0x%llx\n", instr.addr); - return 2; - } - -diff --git a/common/fdt_support.c b/common/fdt_support.c -index b54f886..fc077e8 100644 ---- a/common/fdt_support.c -+++ b/common/fdt_support.c -@@ -495,7 +495,7 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd) - } - #endif /* CONFIG_HAS_FSL_DR_USB */ - --#if defined(CONFIG_MPC83XX) || defined(CONFIG_MPC85xx) -+#if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) - /* - * update crypto node properties to a specified revision of the SEC - * called with sec_rev == 0 if not on an mpc8xxxE processor -@@ -580,7 +580,7 @@ void fdt_fixup_crypto_node(void *blob, int sec_rev) - printf("WARNING: could not set crypto property: %s\n", - fdt_strerror(err)); - } --#endif /* defined(CONFIG_MPC83XX) || defined(CONFIG_MPC85xx) */ -+#endif /* defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) */ - - /* Resize the fdt to its actual size + a bit of padding */ - int fdt_resize(void *blob) -diff --git a/common/hush.c b/common/hush.c -index cf5782a..97fd070 100644 ---- a/common/hush.c -+++ b/common/hush.c -@@ -3627,7 +3627,7 @@ U_BOOT_CMD( - "print local hushshell variables", - "\n - print values of all hushshell variables\n" - "showvar name ...\n" -- " - print value of hushshell variable 'name'\n" -+ " - print value of hushshell variable 'name'" - ); - - #endif -diff --git a/common/kallsyms.c b/common/kallsyms.c -new file mode 100644 -index 0000000..ce42a93 ---- /dev/null -+++ b/common/kallsyms.c -@@ -0,0 +1,44 @@ -+/* -+ * Helper functions for working with the builtin symbol table -+ * -+ * Copyright (c) 2008-2009 Analog Devices Inc. -+ * Licensed under the GPL-2 or later. -+ */ -+ -+#include -+ -+/* We need the weak marking as this symbol is provided specially */ -+extern const char system_map[] __attribute__((weak)); -+ -+/* Given an address, return a pointer to the symbol name and store -+ * the base address in caddr. So if the symbol map had an entry: -+ * 03fb9b7c_spi_cs_deactivate -+ * Then the following call: -+ * unsigned long base; -+ * const char *sym = symbol_lookup(0x03fb9b80, &base); -+ * Would end up setting the variables like so: -+ * base = 0x03fb9b7c; -+ * sym = "_spi_cs_deactivate"; -+ */ -+const char *symbol_lookup(unsigned long addr, unsigned long *caddr) -+{ -+ const char *sym, *csym; -+ char *esym; -+ unsigned long sym_addr; -+ -+ sym = system_map; -+ csym = NULL; -+ *caddr = 0; -+ -+ while (*sym) { -+ sym_addr = simple_strtoul(sym, &esym, 16); -+ sym = esym; -+ if (sym_addr > addr) -+ break; -+ *caddr = sym_addr; -+ csym = sym; -+ sym += strlen(sym) + 1; -+ } -+ -+ return csym; -+} diff --git a/common/lcd.c b/common/lcd.c -index 4155170..aff35ff 100644 +index 74a5c77..aff35ff 100644 --- a/common/lcd.c +++ b/common/lcd.c @@ -64,7 +64,9 @@ @@ -25813,15 +486,6 @@ index 4155170..aff35ff 100644 /* Paint the logo and retrieve LCD base address */ debug ("[LCD] Drawing the logo...\n"); lcd_console_address = lcd_logo (); -@@ -427,7 +452,7 @@ static int lcd_clear (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - cls, 1, 1, lcd_clear, - "clear screen", -- NULL -+ "" - ); - - /*----------------------------------------------------------------------*/ @@ -491,6 +516,8 @@ static void lcd_setfgcolor (int color) { #ifdef CONFIG_ATMEL_LCD @@ -25880,8956 +544,6 @@ index 4155170..aff35ff 100644 } } -diff --git a/common/modem.c b/common/modem.c -new file mode 100644 -index 0000000..a017b29 ---- /dev/null -+++ b/common/modem.c -@@ -0,0 +1,118 @@ -+/* -+ * (C) Copyright 2002-2009 -+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+ -+/* 'inline' - We have to do it fast */ -+static inline void mdm_readline(char *buf, int bufsiz) -+{ -+ char c; -+ char *p; -+ int n; -+ -+ n = 0; -+ p = buf; -+ for(;;) { -+ c = serial_getc(); -+ -+ /* dbg("(%c)", c); */ -+ -+ switch(c) { -+ case '\r': -+ break; -+ case '\n': -+ *p = '\0'; -+ return; -+ -+ default: -+ if(n++ > bufsiz) { -+ *p = '\0'; -+ return; /* sanity check */ -+ } -+ *p = c; -+ p++; -+ break; -+ } -+ } -+} -+ -+extern void dbg(const char *fmt, ...); -+int mdm_init (void) -+{ -+ char env_str[16]; -+ char *init_str; -+ int i; -+ extern char console_buffer[]; -+ extern void enable_putc(void); -+ extern int hwflow_onoff(int); -+ -+ enable_putc(); /* enable serial_putc() */ -+ -+#ifdef CONFIG_HWFLOW -+ init_str = getenv("mdm_flow_control"); -+ if (init_str && (strcmp(init_str, "rts/cts") == 0)) -+ hwflow_onoff (1); -+ else -+ hwflow_onoff(-1); -+#endif -+ -+ for (i = 1;;i++) { -+ sprintf(env_str, "mdm_init%d", i); -+ if ((init_str = getenv(env_str)) != NULL) { -+ serial_puts(init_str); -+ serial_puts("\n"); -+ for(;;) { -+ mdm_readline(console_buffer, CONFIG_SYS_CBSIZE); -+ dbg("ini%d: [%s]", i, console_buffer); -+ -+ if ((strcmp(console_buffer, "OK") == 0) || -+ (strcmp(console_buffer, "ERROR") == 0)) { -+ dbg("ini%d: cmd done", i); -+ break; -+ } else /* in case we are originating call ... */ -+ if (strncmp(console_buffer, "CONNECT", 7) == 0) { -+ dbg("ini%d: connect", i); -+ return 0; -+ } -+ } -+ } else -+ break; /* no init string - stop modem init */ -+ -+ udelay(100000); -+ } -+ -+ udelay(100000); -+ -+ /* final stage - wait for connect */ -+ for(;i > 1;) { /* if 'i' > 1 - wait for connection -+ message from modem */ -+ mdm_readline(console_buffer, CONFIG_SYS_CBSIZE); -+ dbg("ini_f: [%s]", console_buffer); -+ if (strncmp(console_buffer, "CONNECT", 7) == 0) { -+ dbg("ini_f: connected"); -+ return 0; -+ } -+ } -+ -+ return 0; -+} -diff --git a/common/serial.c b/common/serial.c -index 09385d0..dd80e7c 100644 ---- a/common/serial.c -+++ b/common/serial.c -@@ -68,6 +68,8 @@ struct serial_device *__default_serial_console (void) - #else - #error "CONFIG_SERIAL? missing." - #endif -+#elif defined(CONFIG_OMAP3_ZOOM2) -+ return ZOOM2_DEFAULT_SERIAL_DEVICE; - #else - #error No default console - #endif -diff --git a/common/system_map.c b/common/system_map.c -new file mode 100644 -index 0000000..8307293 ---- /dev/null -+++ b/common/system_map.c -@@ -0,0 +1,8 @@ -+/* -+ * The builtin symbol table for use with kallsyms -+ * -+ * Copyright (c) 2008-2009 Analog Devices Inc. -+ * Licensed under the GPL-2 or later. -+ */ -+ -+const char const system_map[] = SYSTEM_MAP; -diff --git a/config.mk b/config.mk -index b1254e9..7fc0453 100644 ---- a/config.mk -+++ b/config.mk -@@ -206,23 +206,17 @@ export TEXT_BASE PLATFORM_CPPFLAGS PLATFORM_RELFLAGS CPPFLAGS CFLAGS AFLAGS - - ######################################################################### - --ifndef REMOTE_BUILD -- --%.s: %.S -- $(CPP) $(AFLAGS) -o $@ $< --%.o: %.S -- $(CC) $(AFLAGS) -c -o $@ $< --%.o: %.c -- $(CC) $(CFLAGS) -c -o $@ $< -- --else -- -+# Allow boards to use custom optimize flags on a per dir/file basis -+BCURDIR := $(notdir $(CURDIR)) - $(obj)%.s: %.S -- $(CPP) $(AFLAGS) -o $@ $< -+ $(CPP) $(AFLAGS) $(AFLAGS_$(@F)) $(AFLAGS_$(BCURDIR)) -o $@ $< - $(obj)%.o: %.S -- $(CC) $(AFLAGS) -c -o $@ $< -+ $(CC) $(AFLAGS) $(AFLAGS_$(@F)) $(AFLAGS_$(BCURDIR)) -o $@ $< -c - $(obj)%.o: %.c -- $(CC) $(CFLAGS) -c -o $@ $< --endif -+ $(CC) $(CFLAGS) $(CFLAGS_$(@F)) $(CFLAGS_$(BCURDIR)) -o $@ $< -c -+$(obj)%.i: %.c -+ $(CPP) $(CFLAGS) $(CFLAGS_$(@F)) $(CFLAGS_$(BCURDIR)) -o $@ $< -c -+$(obj)%.s: %.c -+ $(CC) $(CFLAGS) $(CFLAGS_$(@F)) $(CFLAGS_$(BCURDIR)) -o $@ $< -c -S - - ######################################################################### -diff --git a/cpu/arm1136/cpu.c b/cpu/arm1136/cpu.c -index 7381da0..ade7f46 100644 ---- a/cpu/arm1136/cpu.c -+++ b/cpu/arm1136/cpu.c -@@ -35,24 +35,8 @@ - #include - #include - --#ifdef CONFIG_USE_IRQ --DECLARE_GLOBAL_DATA_PTR; --#endif -- - static void cache_flush(void); - --int cpu_init (void) --{ -- /* -- * setup up stacks if necessary -- */ --#ifdef CONFIG_USE_IRQ -- IRQ_STACK_START = _armboot_start - CONFIG_SYS_MALLOC_LEN - CONFIG_SYS_GBL_DATA_SIZE - 4; -- FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ; --#endif -- return 0; --} -- - int cleanup_before_linux (void) - { - /* -diff --git a/cpu/arm1136/mx31/Makefile b/cpu/arm1136/mx31/Makefile -index 0e06f0a..1e49e8d 100644 ---- a/cpu/arm1136/mx31/Makefile -+++ b/cpu/arm1136/mx31/Makefile -@@ -25,7 +25,8 @@ include $(TOPDIR)/config.mk - - LIB = $(obj)lib$(SOC).a - --COBJS = interrupts.o generic.o -+COBJS += generic.o -+COBJS += timer.o - - SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) - OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) -diff --git a/cpu/arm1136/mx31/interrupts.c b/cpu/arm1136/mx31/interrupts.c -deleted file mode 100644 -index ab7202f..0000000 ---- a/cpu/arm1136/mx31/interrupts.c -+++ /dev/null -@@ -1,171 +0,0 @@ --/* -- * (C) Copyright 2007 -- * Sascha Hauer, Pengutronix -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --#include --#include -- --#define TIMER_BASE 0x53f90000 /* General purpose timer 1 */ -- --/* General purpose timers registers */ --#define GPTCR __REG(TIMER_BASE) /* Control register */ --#define GPTPR __REG(TIMER_BASE + 0x4) /* Prescaler register */ --#define GPTSR __REG(TIMER_BASE + 0x8) /* Status register */ --#define GPTCNT __REG(TIMER_BASE + 0x24) /* Counter register */ -- --/* General purpose timers bitfields */ --#define GPTCR_SWR (1 << 15) /* Software reset */ --#define GPTCR_FRR (1 << 9) /* Freerun / restart */ --#define GPTCR_CLKSOURCE_32 (4 << 6) /* Clock source */ --#define GPTCR_TEN 1 /* Timer enable */ -- --static ulong timestamp; --static ulong lastinc; -- --/* "time" is measured in 1 / CONFIG_SYS_HZ seconds, "tick" is internal timer period */ --#ifdef CONFIG_MX31_TIMER_HIGH_PRECISION --/* ~0.4% error - measured with stop-watch on 100s boot-delay */ --static inline unsigned long long tick_to_time(unsigned long long tick) --{ -- tick *= CONFIG_SYS_HZ; -- do_div(tick, CONFIG_MX31_CLK32); -- return tick; --} -- --static inline unsigned long long time_to_tick(unsigned long long time) --{ -- time *= CONFIG_MX31_CLK32; -- do_div(time, CONFIG_SYS_HZ); -- return time; --} -- --static inline unsigned long long us_to_tick(unsigned long long us) --{ -- us = us * CONFIG_MX31_CLK32 + 999999; -- do_div(us, 1000000); -- return us; --} --#else --/* ~2% error */ --#define TICK_PER_TIME ((CONFIG_MX31_CLK32 + CONFIG_SYS_HZ / 2) / CONFIG_SYS_HZ) --#define US_PER_TICK (1000000 / CONFIG_MX31_CLK32) -- --static inline unsigned long long tick_to_time(unsigned long long tick) --{ -- do_div(tick, TICK_PER_TIME); -- return tick; --} -- --static inline unsigned long long time_to_tick(unsigned long long time) --{ -- return time * TICK_PER_TIME; --} -- --static inline unsigned long long us_to_tick(unsigned long long us) --{ -- us += US_PER_TICK - 1; -- do_div(us, US_PER_TICK); -- return us; --} --#endif -- --/* nothing really to do with interrupts, just starts up a counter. */ --/* The 32768Hz 32-bit timer overruns in 131072 seconds */ --int interrupt_init (void) --{ -- int i; -- -- /* setup GP Timer 1 */ -- GPTCR = GPTCR_SWR; -- for (i = 0; i < 100; i++) -- GPTCR = 0; /* We have no udelay by now */ -- GPTPR = 0; /* 32Khz */ -- /* Freerun Mode, PERCLK1 input */ -- GPTCR |= GPTCR_CLKSOURCE_32 | GPTCR_TEN; -- -- return 0; --} -- --void reset_timer_masked (void) --{ -- /* reset time */ -- lastinc = GPTCNT; /* capture current incrementer value time */ -- timestamp = 0; /* start "advancing" time stamp from 0 */ --} -- --void reset_timer(void) --{ -- reset_timer_masked(); --} -- --unsigned long long get_ticks (void) --{ -- ulong now = GPTCNT; /* current tick value */ -- -- if (now >= lastinc) /* normal mode (non roll) */ -- /* move stamp forward with absolut diff ticks */ -- timestamp += (now - lastinc); -- else /* we have rollover of incrementer */ -- timestamp += (0xFFFFFFFF - lastinc) + now; -- lastinc = now; -- return timestamp; --} -- --ulong get_timer_masked (void) --{ -- /* -- * get_ticks() returns a long long (64 bit), it wraps in -- * 2^64 / CONFIG_MX31_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~ -- * 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in -- * 5 * 10^6 days - long enough. -- */ -- return tick_to_time(get_ticks()); --} -- --ulong get_timer (ulong base) --{ -- return get_timer_masked () - base; --} -- --void set_timer (ulong t) --{ -- timestamp = time_to_tick(t); --} -- --/* delay x useconds AND perserve advance timstamp value */ --void udelay (unsigned long usec) --{ -- unsigned long long tmp; -- ulong tmo; -- -- tmo = us_to_tick(usec); -- tmp = get_ticks() + tmo; /* get current timestamp */ -- -- while (get_ticks() < tmp) /* loop till event */ -- /*NOP*/; --} -- --void reset_cpu (ulong addr) --{ -- __REG16(WDOG_BASE) = 4; --} -diff --git a/cpu/arm1136/mx31/timer.c b/cpu/arm1136/mx31/timer.c -new file mode 100644 -index 0000000..29b484e ---- /dev/null -+++ b/cpu/arm1136/mx31/timer.c -@@ -0,0 +1,170 @@ -+/* -+ * (C) Copyright 2007 -+ * Sascha Hauer, Pengutronix -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+#include -+#include -+ -+#define TIMER_BASE 0x53f90000 /* General purpose timer 1 */ -+ -+/* General purpose timers registers */ -+#define GPTCR __REG(TIMER_BASE) /* Control register */ -+#define GPTPR __REG(TIMER_BASE + 0x4) /* Prescaler register */ -+#define GPTSR __REG(TIMER_BASE + 0x8) /* Status register */ -+#define GPTCNT __REG(TIMER_BASE + 0x24) /* Counter register */ -+ -+/* General purpose timers bitfields */ -+#define GPTCR_SWR (1 << 15) /* Software reset */ -+#define GPTCR_FRR (1 << 9) /* Freerun / restart */ -+#define GPTCR_CLKSOURCE_32 (4 << 6) /* Clock source */ -+#define GPTCR_TEN 1 /* Timer enable */ -+ -+static ulong timestamp; -+static ulong lastinc; -+ -+/* "time" is measured in 1 / CONFIG_SYS_HZ seconds, "tick" is internal timer period */ -+#ifdef CONFIG_MX31_TIMER_HIGH_PRECISION -+/* ~0.4% error - measured with stop-watch on 100s boot-delay */ -+static inline unsigned long long tick_to_time(unsigned long long tick) -+{ -+ tick *= CONFIG_SYS_HZ; -+ do_div(tick, CONFIG_MX31_CLK32); -+ return tick; -+} -+ -+static inline unsigned long long time_to_tick(unsigned long long time) -+{ -+ time *= CONFIG_MX31_CLK32; -+ do_div(time, CONFIG_SYS_HZ); -+ return time; -+} -+ -+static inline unsigned long long us_to_tick(unsigned long long us) -+{ -+ us = us * CONFIG_MX31_CLK32 + 999999; -+ do_div(us, 1000000); -+ return us; -+} -+#else -+/* ~2% error */ -+#define TICK_PER_TIME ((CONFIG_MX31_CLK32 + CONFIG_SYS_HZ / 2) / CONFIG_SYS_HZ) -+#define US_PER_TICK (1000000 / CONFIG_MX31_CLK32) -+ -+static inline unsigned long long tick_to_time(unsigned long long tick) -+{ -+ do_div(tick, TICK_PER_TIME); -+ return tick; -+} -+ -+static inline unsigned long long time_to_tick(unsigned long long time) -+{ -+ return time * TICK_PER_TIME; -+} -+ -+static inline unsigned long long us_to_tick(unsigned long long us) -+{ -+ us += US_PER_TICK - 1; -+ do_div(us, US_PER_TICK); -+ return us; -+} -+#endif -+ -+/* The 32768Hz 32-bit timer overruns in 131072 seconds */ -+int timer_init (void) -+{ -+ int i; -+ -+ /* setup GP Timer 1 */ -+ GPTCR = GPTCR_SWR; -+ for (i = 0; i < 100; i++) -+ GPTCR = 0; /* We have no udelay by now */ -+ GPTPR = 0; /* 32Khz */ -+ /* Freerun Mode, PERCLK1 input */ -+ GPTCR |= GPTCR_CLKSOURCE_32 | GPTCR_TEN; -+ -+ return 0; -+} -+ -+void reset_timer_masked (void) -+{ -+ /* reset time */ -+ lastinc = GPTCNT; /* capture current incrementer value time */ -+ timestamp = 0; /* start "advancing" time stamp from 0 */ -+} -+ -+void reset_timer(void) -+{ -+ reset_timer_masked(); -+} -+ -+unsigned long long get_ticks (void) -+{ -+ ulong now = GPTCNT; /* current tick value */ -+ -+ if (now >= lastinc) /* normal mode (non roll) */ -+ /* move stamp forward with absolut diff ticks */ -+ timestamp += (now - lastinc); -+ else /* we have rollover of incrementer */ -+ timestamp += (0xFFFFFFFF - lastinc) + now; -+ lastinc = now; -+ return timestamp; -+} -+ -+ulong get_timer_masked (void) -+{ -+ /* -+ * get_ticks() returns a long long (64 bit), it wraps in -+ * 2^64 / CONFIG_MX31_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~ -+ * 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in -+ * 5 * 10^6 days - long enough. -+ */ -+ return tick_to_time(get_ticks()); -+} -+ -+ulong get_timer (ulong base) -+{ -+ return get_timer_masked () - base; -+} -+ -+void set_timer (ulong t) -+{ -+ timestamp = time_to_tick(t); -+} -+ -+/* delay x useconds AND perserve advance timstamp value */ -+void udelay (unsigned long usec) -+{ -+ unsigned long long tmp; -+ ulong tmo; -+ -+ tmo = us_to_tick(usec); -+ tmp = get_ticks() + tmo; /* get current timestamp */ -+ -+ while (get_ticks() < tmp) /* loop till event */ -+ /*NOP*/; -+} -+ -+void reset_cpu (ulong addr) -+{ -+ __REG16(WDOG_BASE) = 4; -+} -diff --git a/cpu/arm1136/omap24xx/Makefile b/cpu/arm1136/omap24xx/Makefile -index f9afed7..48dc7e3 100644 ---- a/cpu/arm1136/omap24xx/Makefile -+++ b/cpu/arm1136/omap24xx/Makefile -@@ -25,8 +25,9 @@ include $(TOPDIR)/config.mk - - LIB = $(obj)lib$(SOC).a - --COBJS = interrupts.o --SOBJS = start.o -+SOBJS = reset.o -+ -+COBJS = timer.o - - SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) - OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) -diff --git a/cpu/arm1136/omap24xx/interrupts.c b/cpu/arm1136/omap24xx/interrupts.c -deleted file mode 100644 -index a0c535d..0000000 ---- a/cpu/arm1136/omap24xx/interrupts.c -+++ /dev/null -@@ -1,159 +0,0 @@ --/* -- * (C) Copyright 2004 -- * Texas Instruments -- * Richard Woodruff -- * -- * (C) Copyright 2002 -- * Sysgo Real-Time Solutions, GmbH -- * Marius Groeger -- * Alex Zuepke -- * -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --#include --#include -- --#define TIMER_LOAD_VAL 0 -- --/* macro to read the 32 bit timer */ --#define READ_TIMER (*((volatile ulong *)(CONFIG_SYS_TIMERBASE+TCRR))) -- --static ulong timestamp; --static ulong lastinc; -- --/* nothing really to do with interrupts, just starts up a counter. */ --int interrupt_init (void) --{ -- int32_t val; -- -- /* Start the counter ticking up */ -- *((int32_t *) (CONFIG_SYS_TIMERBASE + TLDR)) = TIMER_LOAD_VAL; /* reload value on overflow*/ -- val = (CONFIG_SYS_PTV << 2) | BIT5 | BIT1 | BIT0; /* mask to enable timer*/ -- *((int32_t *) (CONFIG_SYS_TIMERBASE + TCLR)) = val; /* start timer */ -- -- reset_timer_masked(); /* init the timestamp and lastinc value */ -- -- return(0); --} --/* -- * timer without interrupts -- */ --void reset_timer (void) --{ -- reset_timer_masked (); --} -- --ulong get_timer (ulong base) --{ -- return get_timer_masked () - base; --} -- --void set_timer (ulong t) --{ -- timestamp = t; --} -- --/* delay x useconds AND perserve advance timstamp value */ --void udelay (unsigned long usec) --{ -- ulong tmo, tmp; -- -- if (usec >= 1000) { /* if "big" number, spread normalization to seconds */ -- tmo = usec / 1000; /* start to normalize for usec to ticks per sec */ -- tmo *= CONFIG_SYS_HZ; /* find number of "ticks" to wait to achieve target */ -- tmo /= 1000; /* finish normalize. */ -- } else { /* else small number, don't kill it prior to HZ multiply */ -- tmo = usec * CONFIG_SYS_HZ; -- tmo /= (1000*1000); -- } -- -- tmp = get_timer (0); /* get current timestamp */ -- if ( (tmo + tmp + 1) < tmp )/* if setting this forward will roll time stamp */ -- reset_timer_masked (); /* reset "advancing" timestamp to 0, set lastinc value */ -- else -- tmo += tmp; /* else, set advancing stamp wake up time */ -- while (get_timer_masked () < tmo)/* loop till event */ -- /*NOP*/; --} -- --void reset_timer_masked (void) --{ -- /* reset time */ -- lastinc = READ_TIMER; /* capture current incrementer value time */ -- timestamp = 0; /* start "advancing" time stamp from 0 */ --} -- --ulong get_timer_masked (void) --{ -- ulong now = READ_TIMER; /* current tick value */ -- -- if (now >= lastinc) /* normal mode (non roll) */ -- timestamp += (now - lastinc); /* move stamp fordward with absoulte diff ticks */ -- else /* we have rollover of incrementer */ -- timestamp += (0xFFFFFFFF - lastinc) + now; -- lastinc = now; -- return timestamp; --} -- --/* waits specified delay value and resets timestamp */ --void udelay_masked (unsigned long usec) --{ -- ulong tmo; -- ulong endtime; -- signed long diff; -- -- if (usec >= 1000) { /* if "big" number, spread normalization to seconds */ -- tmo = usec / 1000; /* start to normalize for usec to ticks per sec */ -- tmo *= CONFIG_SYS_HZ; /* find number of "ticks" to wait to achieve target */ -- tmo /= 1000; /* finish normalize. */ -- } else { /* else small number, don't kill it prior to HZ multiply */ -- tmo = usec * CONFIG_SYS_HZ; -- tmo /= (1000*1000); -- } -- endtime = get_timer_masked () + tmo; -- -- do { -- ulong now = get_timer_masked (); -- diff = endtime - now; -- } while (diff >= 0); --} -- --/* -- * This function is derived from PowerPC code (read timebase as long long). -- * On ARM it just returns the timer value. -- */ --unsigned long long get_ticks(void) --{ -- return get_timer(0); --} --/* -- * This function is derived from PowerPC code (timebase clock frequency). -- * On ARM it returns the number of timer ticks per second. -- */ --ulong get_tbclk (void) --{ -- ulong tbclk; -- tbclk = CONFIG_SYS_HZ; -- return tbclk; --} -diff --git a/cpu/arm1136/omap24xx/reset.S b/cpu/arm1136/omap24xx/reset.S -new file mode 100644 -index 0000000..5f8343f ---- /dev/null -+++ b/cpu/arm1136/omap24xx/reset.S -@@ -0,0 +1,42 @@ -+/* -+ * armboot - Startup Code for OMP2420/ARM1136 CPU-core -+ * -+ * Copyright (c) 2004 Texas Instruments -+ * -+ * Copyright (c) 2001 Marius Gröger -+ * Copyright (c) 2002 Alex Züpke -+ * Copyright (c) 2002 Gary Jennejohn -+ * Copyright (c) 2003 Richard Woodruff -+ * Copyright (c) 2003 Kshitij -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+ -+.globl reset_cpu -+reset_cpu: -+ ldr r1, rstctl /* get addr for global reset reg */ -+ mov r3, #0x2 /* full reset pll+mpu */ -+ str r3, [r1] /* force reset */ -+ mov r0, r0 -+_loop_forever: -+ b _loop_forever -+rstctl: -+ .word PM_RSTCTRL_WKUP -diff --git a/cpu/arm1136/omap24xx/start.S b/cpu/arm1136/omap24xx/start.S -deleted file mode 100644 -index 5f8343f..0000000 ---- a/cpu/arm1136/omap24xx/start.S -+++ /dev/null -@@ -1,42 +0,0 @@ --/* -- * armboot - Startup Code for OMP2420/ARM1136 CPU-core -- * -- * Copyright (c) 2004 Texas Instruments -- * -- * Copyright (c) 2001 Marius Gröger -- * Copyright (c) 2002 Alex Züpke -- * Copyright (c) 2002 Gary Jennejohn -- * Copyright (c) 2003 Richard Woodruff -- * Copyright (c) 2003 Kshitij -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include -- --.globl reset_cpu --reset_cpu: -- ldr r1, rstctl /* get addr for global reset reg */ -- mov r3, #0x2 /* full reset pll+mpu */ -- str r3, [r1] /* force reset */ -- mov r0, r0 --_loop_forever: -- b _loop_forever --rstctl: -- .word PM_RSTCTRL_WKUP -diff --git a/cpu/arm1136/omap24xx/timer.c b/cpu/arm1136/omap24xx/timer.c -new file mode 100644 -index 0000000..8dd8d7b ---- /dev/null -+++ b/cpu/arm1136/omap24xx/timer.c -@@ -0,0 +1,158 @@ -+/* -+ * (C) Copyright 2004 -+ * Texas Instruments -+ * Richard Woodruff -+ * -+ * (C) Copyright 2002 -+ * Sysgo Real-Time Solutions, GmbH -+ * Marius Groeger -+ * Alex Zuepke -+ * -+ * (C) Copyright 2002 -+ * Gary Jennejohn, DENX Software Engineering, -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+#include -+#include -+ -+#define TIMER_LOAD_VAL 0 -+ -+/* macro to read the 32 bit timer */ -+#define READ_TIMER (*((volatile ulong *)(CONFIG_SYS_TIMERBASE+TCRR))) -+ -+static ulong timestamp; -+static ulong lastinc; -+ -+int timer_init (void) -+{ -+ int32_t val; -+ -+ /* Start the counter ticking up */ -+ *((int32_t *) (CONFIG_SYS_TIMERBASE + TLDR)) = TIMER_LOAD_VAL; /* reload value on overflow*/ -+ val = (CONFIG_SYS_PTV << 2) | BIT5 | BIT1 | BIT0; /* mask to enable timer*/ -+ *((int32_t *) (CONFIG_SYS_TIMERBASE + TCLR)) = val; /* start timer */ -+ -+ reset_timer_masked(); /* init the timestamp and lastinc value */ -+ -+ return(0); -+} -+/* -+ * timer without interrupts -+ */ -+void reset_timer (void) -+{ -+ reset_timer_masked (); -+} -+ -+ulong get_timer (ulong base) -+{ -+ return get_timer_masked () - base; -+} -+ -+void set_timer (ulong t) -+{ -+ timestamp = t; -+} -+ -+/* delay x useconds AND perserve advance timstamp value */ -+void udelay (unsigned long usec) -+{ -+ ulong tmo, tmp; -+ -+ if (usec >= 1000) { /* if "big" number, spread normalization to seconds */ -+ tmo = usec / 1000; /* start to normalize for usec to ticks per sec */ -+ tmo *= CONFIG_SYS_HZ; /* find number of "ticks" to wait to achieve target */ -+ tmo /= 1000; /* finish normalize. */ -+ } else { /* else small number, don't kill it prior to HZ multiply */ -+ tmo = usec * CONFIG_SYS_HZ; -+ tmo /= (1000*1000); -+ } -+ -+ tmp = get_timer (0); /* get current timestamp */ -+ if ( (tmo + tmp + 1) < tmp )/* if setting this forward will roll time stamp */ -+ reset_timer_masked (); /* reset "advancing" timestamp to 0, set lastinc value */ -+ else -+ tmo += tmp; /* else, set advancing stamp wake up time */ -+ while (get_timer_masked () < tmo)/* loop till event */ -+ /*NOP*/; -+} -+ -+void reset_timer_masked (void) -+{ -+ /* reset time */ -+ lastinc = READ_TIMER; /* capture current incrementer value time */ -+ timestamp = 0; /* start "advancing" time stamp from 0 */ -+} -+ -+ulong get_timer_masked (void) -+{ -+ ulong now = READ_TIMER; /* current tick value */ -+ -+ if (now >= lastinc) /* normal mode (non roll) */ -+ timestamp += (now - lastinc); /* move stamp fordward with absoulte diff ticks */ -+ else /* we have rollover of incrementer */ -+ timestamp += (0xFFFFFFFF - lastinc) + now; -+ lastinc = now; -+ return timestamp; -+} -+ -+/* waits specified delay value and resets timestamp */ -+void udelay_masked (unsigned long usec) -+{ -+ ulong tmo; -+ ulong endtime; -+ signed long diff; -+ -+ if (usec >= 1000) { /* if "big" number, spread normalization to seconds */ -+ tmo = usec / 1000; /* start to normalize for usec to ticks per sec */ -+ tmo *= CONFIG_SYS_HZ; /* find number of "ticks" to wait to achieve target */ -+ tmo /= 1000; /* finish normalize. */ -+ } else { /* else small number, don't kill it prior to HZ multiply */ -+ tmo = usec * CONFIG_SYS_HZ; -+ tmo /= (1000*1000); -+ } -+ endtime = get_timer_masked () + tmo; -+ -+ do { -+ ulong now = get_timer_masked (); -+ diff = endtime - now; -+ } while (diff >= 0); -+} -+ -+/* -+ * This function is derived from PowerPC code (read timebase as long long). -+ * On ARM it just returns the timer value. -+ */ -+unsigned long long get_ticks(void) -+{ -+ return get_timer(0); -+} -+/* -+ * This function is derived from PowerPC code (timebase clock frequency). -+ * On ARM it returns the number of timer ticks per second. -+ */ -+ulong get_tbclk (void) -+{ -+ ulong tbclk; -+ tbclk = CONFIG_SYS_HZ; -+ return tbclk; -+} -diff --git a/cpu/arm1136/u-boot.lds b/cpu/arm1136/u-boot.lds -new file mode 100644 -index 0000000..7181a56 ---- /dev/null -+++ b/cpu/arm1136/u-boot.lds -@@ -0,0 +1,64 @@ -+/* -+ * (C) Copyright 2009 -+ * Ilya Yanok, Emcraft Systems Ltd, -+ * -+ * Copyright (C) 2005-2007 Samsung Electronics -+ * Kyungin Park -+ * -+ * Copyright (c) 2004 Texas Instruments -+ * -+ * (C) Copyright 2002 -+ * Gary Jennejohn, DENX Software Engineering, -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -+OUTPUT_ARCH(arm) -+ENTRY(_start) -+SECTIONS -+{ -+ . = 0x00000000; -+ -+ . = ALIGN(4); -+ .text : -+ { -+ cpu/arm1136/start.o (.text) -+ *(.text) -+ } -+ -+ . = ALIGN(4); -+ .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -+ -+ . = ALIGN(4); -+ .data : { *(.data) } -+ -+ . = ALIGN(4); -+ .got : { *(.got) } -+ -+ . = .; -+ __u_boot_cmd_start = .; -+ .u_boot_cmd : { *(.u_boot_cmd) } -+ __u_boot_cmd_end = .; -+ -+ . = ALIGN(4); -+ __bss_start = .; -+ .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -+ _end = .; -+} -diff --git a/cpu/arm1176/cpu.c b/cpu/arm1176/cpu.c -index fbc8ea8..c59a77b 100644 ---- a/cpu/arm1176/cpu.c -+++ b/cpu/arm1176/cpu.c -@@ -38,11 +38,6 @@ - - static void cache_flush (void); - --int cpu_init (void) --{ -- return 0; --} -- - int cleanup_before_linux (void) - { - /* -diff --git a/cpu/arm1176/s3c64xx/Makefile b/cpu/arm1176/s3c64xx/Makefile -index fa4ee3f..4656d9a 100644 ---- a/cpu/arm1176/s3c64xx/Makefile -+++ b/cpu/arm1176/s3c64xx/Makefile -@@ -28,8 +28,8 @@ include $(TOPDIR)/config.mk - - LIB = $(obj)lib$(SOC).a - --COBJS-y = interrupts.o - COBJS-$(CONFIG_S3C6400) += cpu_init.o speed.o -+COBJS-y += timer.o - - OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y)) - -diff --git a/cpu/arm1176/s3c64xx/interrupts.c b/cpu/arm1176/s3c64xx/interrupts.c -deleted file mode 100644 -index 7bb9848..0000000 ---- a/cpu/arm1176/s3c64xx/interrupts.c -+++ /dev/null -@@ -1,177 +0,0 @@ --/* -- * (C) Copyright 2003 -- * Texas Instruments -- * -- * (C) Copyright 2002 -- * Sysgo Real-Time Solutions, GmbH -- * Marius Groeger -- * -- * (C) Copyright 2002 -- * Sysgo Real-Time Solutions, GmbH -- * Alex Zuepke -- * -- * (C) Copyright 2002-2004 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * (C) Copyright 2004 -- * Philippe Robin, ARM Ltd. -- * -- * (C) Copyright 2008 -- * Guennadi Liakhovetki, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --#include --#include --#include -- --static ulong timer_load_val; -- --#define PRESCALER 167 -- --static s3c64xx_timers *s3c64xx_get_base_timers(void) --{ -- return (s3c64xx_timers *)ELFIN_TIMER_BASE; --} -- --/* macro to read the 16 bit timer */ --static inline ulong read_timer(void) --{ -- s3c64xx_timers *const timers = s3c64xx_get_base_timers(); -- -- return timers->TCNTO4; --} -- --/* Internal tick units */ --/* Last decremneter snapshot */ --static unsigned long lastdec; --/* Monotonic incrementing timer */ --static unsigned long long timestamp; -- --int interrupt_init(void) --{ -- s3c64xx_timers *const timers = s3c64xx_get_base_timers(); -- -- /* use PWM Timer 4 because it has no output */ -- /* -- * We use the following scheme for the timer: -- * Prescaler is hard fixed at 167, divider at 1/4. -- * This gives at PCLK frequency 66MHz approx. 10us ticks -- * The timer is set to wrap after 100s, at 66MHz this obviously -- * happens after 10,000,000 ticks. A long variable can thus -- * keep values up to 40,000s, i.e., 11 hours. This should be -- * enough for most uses:-) Possible optimizations: select a -- * binary-friendly frequency, e.g., 1ms / 128. Also calculate -- * the prescaler automatically for other PCLK frequencies. -- */ -- timers->TCFG0 = PRESCALER << 8; -- if (timer_load_val == 0) { -- timer_load_val = get_PCLK() / PRESCALER * (100 / 4); /* 100s */ -- timers->TCFG1 = (timers->TCFG1 & ~0xf0000) | 0x20000; -- } -- -- /* load value for 10 ms timeout */ -- lastdec = timers->TCNTB4 = timer_load_val; -- /* auto load, manual update of Timer 4 */ -- timers->TCON = (timers->TCON & ~0x00700000) | TCON_4_AUTO | -- TCON_4_UPDATE; -- -- /* auto load, start Timer 4 */ -- timers->TCON = (timers->TCON & ~0x00700000) | TCON_4_AUTO | COUNT_4_ON; -- timestamp = 0; -- -- return 0; --} -- --/* -- * timer without interrupts -- */ -- --/* -- * This function is derived from PowerPC code (read timebase as long long). -- * On ARM it just returns the timer value. -- */ --unsigned long long get_ticks(void) --{ -- ulong now = read_timer(); -- -- if (lastdec >= now) { -- /* normal mode */ -- timestamp += lastdec - now; -- } else { -- /* we have an overflow ... */ -- timestamp += lastdec + timer_load_val - now; -- } -- lastdec = now; -- -- return timestamp; --} -- --/* -- * This function is derived from PowerPC code (timebase clock frequency). -- * On ARM it returns the number of timer ticks per second. -- */ --ulong get_tbclk(void) --{ -- /* We overrun in 100s */ -- return (ulong)(timer_load_val / 100); --} -- --void reset_timer_masked(void) --{ -- /* reset time */ -- lastdec = read_timer(); -- timestamp = 0; --} -- --void reset_timer(void) --{ -- reset_timer_masked(); --} -- --ulong get_timer_masked(void) --{ -- unsigned long long res = get_ticks(); -- do_div (res, (timer_load_val / (100 * CONFIG_SYS_HZ))); -- return res; --} -- --ulong get_timer(ulong base) --{ -- return get_timer_masked() - base; --} -- --void set_timer(ulong t) --{ -- timestamp = t * (timer_load_val / (100 * CONFIG_SYS_HZ)); --} -- --void udelay(unsigned long usec) --{ -- unsigned long long tmp; -- ulong tmo; -- -- tmo = (usec + 9) / 10; -- tmp = get_ticks() + tmo; /* get current timestamp */ -- -- while (get_ticks() < tmp)/* loop till event */ -- /*NOP*/; --} -diff --git a/cpu/arm1176/s3c64xx/timer.c b/cpu/arm1176/s3c64xx/timer.c -new file mode 100644 -index 0000000..22a5b77 ---- /dev/null -+++ b/cpu/arm1176/s3c64xx/timer.c -@@ -0,0 +1,177 @@ -+/* -+ * (C) Copyright 2003 -+ * Texas Instruments -+ * -+ * (C) Copyright 2002 -+ * Sysgo Real-Time Solutions, GmbH -+ * Marius Groeger -+ * -+ * (C) Copyright 2002 -+ * Sysgo Real-Time Solutions, GmbH -+ * Alex Zuepke -+ * -+ * (C) Copyright 2002-2004 -+ * Gary Jennejohn, DENX Software Engineering, -+ * -+ * (C) Copyright 2004 -+ * Philippe Robin, ARM Ltd. -+ * -+ * (C) Copyright 2008 -+ * Guennadi Liakhovetki, DENX Software Engineering, -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+#include -+#include -+#include -+ -+static ulong timer_load_val; -+ -+#define PRESCALER 167 -+ -+static s3c64xx_timers *s3c64xx_get_base_timers(void) -+{ -+ return (s3c64xx_timers *)ELFIN_TIMER_BASE; -+} -+ -+/* macro to read the 16 bit timer */ -+static inline ulong read_timer(void) -+{ -+ s3c64xx_timers *const timers = s3c64xx_get_base_timers(); -+ -+ return timers->TCNTO4; -+} -+ -+/* Internal tick units */ -+/* Last decremneter snapshot */ -+static unsigned long lastdec; -+/* Monotonic incrementing timer */ -+static unsigned long long timestamp; -+ -+int timer_init(void) -+{ -+ s3c64xx_timers *const timers = s3c64xx_get_base_timers(); -+ -+ /* use PWM Timer 4 because it has no output */ -+ /* -+ * We use the following scheme for the timer: -+ * Prescaler is hard fixed at 167, divider at 1/4. -+ * This gives at PCLK frequency 66MHz approx. 10us ticks -+ * The timer is set to wrap after 100s, at 66MHz this obviously -+ * happens after 10,000,000 ticks. A long variable can thus -+ * keep values up to 40,000s, i.e., 11 hours. This should be -+ * enough for most uses:-) Possible optimizations: select a -+ * binary-friendly frequency, e.g., 1ms / 128. Also calculate -+ * the prescaler automatically for other PCLK frequencies. -+ */ -+ timers->TCFG0 = PRESCALER << 8; -+ if (timer_load_val == 0) { -+ timer_load_val = get_PCLK() / PRESCALER * (100 / 4); /* 100s */ -+ timers->TCFG1 = (timers->TCFG1 & ~0xf0000) | 0x20000; -+ } -+ -+ /* load value for 10 ms timeout */ -+ lastdec = timers->TCNTB4 = timer_load_val; -+ /* auto load, manual update of Timer 4 */ -+ timers->TCON = (timers->TCON & ~0x00700000) | TCON_4_AUTO | -+ TCON_4_UPDATE; -+ -+ /* auto load, start Timer 4 */ -+ timers->TCON = (timers->TCON & ~0x00700000) | TCON_4_AUTO | COUNT_4_ON; -+ timestamp = 0; -+ -+ return 0; -+} -+ -+/* -+ * timer without interrupts -+ */ -+ -+/* -+ * This function is derived from PowerPC code (read timebase as long long). -+ * On ARM it just returns the timer value. -+ */ -+unsigned long long get_ticks(void) -+{ -+ ulong now = read_timer(); -+ -+ if (lastdec >= now) { -+ /* normal mode */ -+ timestamp += lastdec - now; -+ } else { -+ /* we have an overflow ... */ -+ timestamp += lastdec + timer_load_val - now; -+ } -+ lastdec = now; -+ -+ return timestamp; -+} -+ -+/* -+ * This function is derived from PowerPC code (timebase clock frequency). -+ * On ARM it returns the number of timer ticks per second. -+ */ -+ulong get_tbclk(void) -+{ -+ /* We overrun in 100s */ -+ return (ulong)(timer_load_val / 100); -+} -+ -+void reset_timer_masked(void) -+{ -+ /* reset time */ -+ lastdec = read_timer(); -+ timestamp = 0; -+} -+ -+void reset_timer(void) -+{ -+ reset_timer_masked(); -+} -+ -+ulong get_timer_masked(void) -+{ -+ unsigned long long res = get_ticks(); -+ do_div (res, (timer_load_val / (100 * CONFIG_SYS_HZ))); -+ return res; -+} -+ -+ulong get_timer(ulong base) -+{ -+ return get_timer_masked() - base; -+} -+ -+void set_timer(ulong t) -+{ -+ timestamp = t * (timer_load_val / (100 * CONFIG_SYS_HZ)); -+} -+ -+void udelay(unsigned long usec) -+{ -+ unsigned long long tmp; -+ ulong tmo; -+ -+ tmo = (usec + 9) / 10; -+ tmp = get_ticks() + tmo; /* get current timestamp */ -+ -+ while (get_ticks() < tmp)/* loop till event */ -+ /*NOP*/; -+} -diff --git a/cpu/arm1176/u-boot.lds b/cpu/arm1176/u-boot.lds -new file mode 100644 -index 0000000..cc682f5 ---- /dev/null -+++ b/cpu/arm1176/u-boot.lds -@@ -0,0 +1,56 @@ -+/* -+ * (C) Copyright 2002-2004 -+ * Gary Jennejohn, DENX Software Engineering, -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -+OUTPUT_ARCH(arm) -+ENTRY(_start) -+SECTIONS -+{ -+ . = 0x00000000; -+ -+ . = ALIGN(4); -+ .text : -+ { -+ cpu/arm1176/start.o (.text) -+ *(.text) -+ } -+ -+ . = ALIGN(4); -+ .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -+ -+ . = ALIGN(4); -+ .data : { *(.data) } -+ -+ . = ALIGN(4); -+ .got : { *(.got) } -+ -+ . = .; -+ __u_boot_cmd_start = .; -+ .u_boot_cmd : { *(.u_boot_cmd) } -+ __u_boot_cmd_end = .; -+ -+ . = ALIGN(4); -+ __bss_start = .; -+ .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -+ _end = .; -+} -diff --git a/cpu/arm720t/cpu.c b/cpu/arm720t/cpu.c -index 6c40903..88c71bf 100644 ---- a/cpu/arm720t/cpu.c -+++ b/cpu/arm720t/cpu.c -@@ -40,18 +40,6 @@ - static void cache_flush(void); - #endif - --int cpu_init (void) --{ -- /* -- * setup up stacks if necessary -- */ --#ifdef CONFIG_USE_IRQ -- IRQ_STACK_START = _armboot_start - CONFIG_SYS_MALLOC_LEN - CONFIG_SYS_GBL_DATA_SIZE - 4; -- FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ; --#endif -- return 0; --} -- - int cleanup_before_linux (void) - { - /* -diff --git a/cpu/arm720t/interrupts.c b/cpu/arm720t/interrupts.c -index 39ed345..91d552c 100644 ---- a/cpu/arm720t/interrupts.c -+++ b/cpu/arm720t/interrupts.c -@@ -110,9 +110,34 @@ static void timer_isr( void *data) { - static ulong timestamp; - static ulong lastdec; - --int interrupt_init (void) -+#if defined(CONFIG_USE_IRQ) && defined(CONFIG_S3C4510B) -+int arch_interrupt_init (void) - { -+ int i; -+ -+ /* install default interrupt handlers */ -+ for ( i = 0; i < N_IRQS; i++) { -+ IRQ_HANDLER[i].m_data = (void *)i; -+ IRQ_HANDLER[i].m_func = default_isr; -+ } -+ -+ /* configure interrupts for IRQ mode */ -+ PUT_REG( REG_INTMODE, 0x0); -+ /* clear any pending interrupts */ -+ PUT_REG( REG_INTPEND, 0x1FFFFF); -+ -+ lastdec = 0; -+ -+ /* install interrupt handler for timer */ -+ IRQ_HANDLER[INT_TIMER0].m_data = (void *)×tamp; -+ IRQ_HANDLER[INT_TIMER0].m_func = timer_isr; -+ -+ return 0; -+} -+#endif - -+int timer_init (void) -+{ - #if defined(CONFIG_NETARM) - /* disable all interrupts */ - IRQEN = 0; -@@ -137,25 +162,6 @@ int interrupt_init (void) - /* set timer 1 counter */ - lastdec = IO_TC1D = TIMER_LOAD_VAL; - #elif defined(CONFIG_S3C4510B) -- int i; -- -- /* install default interrupt handlers */ -- for ( i = 0; i < N_IRQS; i++) { -- IRQ_HANDLER[i].m_data = (void *)i; -- IRQ_HANDLER[i].m_func = default_isr; -- } -- -- /* configure interrupts for IRQ mode */ -- PUT_REG( REG_INTMODE, 0x0); -- /* clear any pending interrupts */ -- PUT_REG( REG_INTPEND, 0x1FFFFF); -- -- lastdec = 0; -- -- /* install interrupt handler for timer */ -- IRQ_HANDLER[INT_TIMER0].m_data = (void *)×tamp; -- IRQ_HANDLER[INT_TIMER0].m_func = timer_isr; -- - /* configure free running timer 0 */ - PUT_REG( REG_TMOD, 0x0); - /* Stop timer 0 */ -@@ -187,7 +193,7 @@ int interrupt_init (void) - PUT32(T0TCR, 1); /* enable timer0 */ - - #else --#error No interrupt_init() defined for this CPU type -+#error No timer_init() defined for this CPU type - #endif - timestamp = 0; - -diff --git a/cpu/arm720t/u-boot.lds b/cpu/arm720t/u-boot.lds -new file mode 100644 -index 0000000..111c3f5 ---- /dev/null -+++ b/cpu/arm720t/u-boot.lds -@@ -0,0 +1,56 @@ -+/* -+ * (C) Copyright 2000-2004 -+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -+OUTPUT_ARCH(arm) -+ENTRY(_start) -+SECTIONS -+{ -+ . = 0x00000000; -+ -+ . = ALIGN(4); -+ .text : -+ { -+ cpu/arm720t/start.o (.text) -+ *(.text) -+ } -+ -+ . = ALIGN(4); -+ .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -+ -+ . = ALIGN(4); -+ .data : { *(.data) } -+ -+ . = ALIGN(4); -+ .got : { *(.got) } -+ -+ . = .; -+ __u_boot_cmd_start = .; -+ .u_boot_cmd : { *(.u_boot_cmd) } -+ __u_boot_cmd_end = .; -+ -+ . = ALIGN(4); -+ __bss_start = .; -+ .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -+ _end = .; -+} -diff --git a/cpu/arm920t/at91rm9200/Makefile b/cpu/arm920t/at91rm9200/Makefile -index 67f17fa..73aeeac 100644 ---- a/cpu/arm920t/at91rm9200/Makefile -+++ b/cpu/arm920t/at91rm9200/Makefile -@@ -25,9 +25,17 @@ include $(TOPDIR)/config.mk - - LIB = $(obj)lib$(SOC).a - --COBJS = bcm5221.o dm9161.o ether.o i2c.o interrupts.o \ -- lxt972.o usb.o spi.o --SOBJS = lowlevel_init.o -+SOBJS += lowlevel_init.o -+ -+COBJS += bcm5221.o -+COBJS += dm9161.o -+COBJS += ether.o -+COBJS += i2c.o -+COBJS += lxt972.o -+COBJS += reset.o -+COBJS += spi.o -+COBJS += timer.o -+COBJS += usb.o - - SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) - OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) -diff --git a/cpu/arm920t/at91rm9200/i2c.c b/cpu/arm920t/at91rm9200/i2c.c -index 9fd72d3..1711088 100644 ---- a/cpu/arm920t/at91rm9200/i2c.c -+++ b/cpu/arm920t/at91rm9200/i2c.c -@@ -189,14 +189,4 @@ i2c_init(int speed, int slaveaddr) - return; - } - --int i2c_set_bus_speed(unsigned int speed) --{ -- return -1; --} -- --unsigned int i2c_get_bus_speed(void) --{ -- return CONFIG_SYS_I2C_SPEED; --} -- - #endif /* CONFIG_HARD_I2C */ -diff --git a/cpu/arm920t/at91rm9200/interrupts.c b/cpu/arm920t/at91rm9200/interrupts.c -deleted file mode 100644 -index cff4916..0000000 ---- a/cpu/arm920t/at91rm9200/interrupts.c -+++ /dev/null -@@ -1,197 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Lineo, Inc. -- * Bernhard Kuhn -- * -- * (C) Copyright 2002 -- * Sysgo Real-Time Solutions, GmbH -- * Marius Groeger -- * -- * (C) Copyright 2002 -- * Sysgo Real-Time Solutions, GmbH -- * Alex Zuepke -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --/*#include */ --#include --/*#include */ -- --/* the number of clocks per CONFIG_SYS_HZ */ --#define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK/CONFIG_SYS_HZ) -- --/* macro to read the 16 bit timer */ --#define READ_TIMER (tmr->TC_CV & 0x0000ffff) --AT91PS_TC tmr; -- --static ulong timestamp; --static ulong lastinc; -- --void board_reset(void) __attribute__((__weak__)); -- --int interrupt_init (void) --{ -- tmr = AT91C_BASE_TC0; -- -- /* enables TC1.0 clock */ -- *AT91C_PMC_PCER = 1 << AT91C_ID_TC0; /* enable clock */ -- -- *AT91C_TCB0_BCR = 0; -- *AT91C_TCB0_BMR = AT91C_TCB_TC0XC0S_NONE | AT91C_TCB_TC1XC1S_NONE | AT91C_TCB_TC2XC2S_NONE; -- tmr->TC_CCR = AT91C_TC_CLKDIS; --#define AT91C_TC_CMR_CPCTRG (1 << 14) -- /* set to MCLK/2 and restart the timer when the vlaue in TC_RC is reached */ -- tmr->TC_CMR = AT91C_TC_TIMER_DIV1_CLOCK | AT91C_TC_CMR_CPCTRG; -- -- tmr->TC_IDR = ~0ul; -- tmr->TC_RC = TIMER_LOAD_VAL; -- lastinc = 0; -- tmr->TC_CCR = AT91C_TC_SWTRG | AT91C_TC_CLKEN; -- timestamp = 0; -- -- return (0); --} -- --/* -- * timer without interrupts -- */ -- --void reset_timer (void) --{ -- reset_timer_masked (); --} -- --ulong get_timer (ulong base) --{ -- return get_timer_masked () - base; --} -- --void set_timer (ulong t) --{ -- timestamp = t; --} -- --void udelay (unsigned long usec) --{ -- udelay_masked(usec); --} -- --void reset_timer_masked (void) --{ -- /* reset time */ -- lastinc = READ_TIMER; -- timestamp = 0; --} -- --ulong get_timer_raw (void) --{ -- ulong now = READ_TIMER; -- -- if (now >= lastinc) { -- /* normal mode */ -- timestamp += now - lastinc; -- } else { -- /* we have an overflow ... */ -- timestamp += now + TIMER_LOAD_VAL - lastinc; -- } -- lastinc = now; -- -- return timestamp; --} -- --ulong get_timer_masked (void) --{ -- return get_timer_raw()/TIMER_LOAD_VAL; --} -- --void udelay_masked (unsigned long usec) --{ -- ulong tmo; -- ulong endtime; -- signed long diff; -- -- tmo = CONFIG_SYS_HZ_CLOCK / 1000; -- tmo *= usec; -- tmo /= 1000; -- -- endtime = get_timer_raw () + tmo; -- -- do { -- ulong now = get_timer_raw (); -- diff = endtime - now; -- } while (diff >= 0); --} -- --/* -- * This function is derived from PowerPC code (read timebase as long long). -- * On ARM it just returns the timer value. -- */ --unsigned long long get_ticks(void) --{ -- return get_timer(0); --} -- --/* -- * This function is derived from PowerPC code (timebase clock frequency). -- * On ARM it returns the number of timer ticks per second. -- */ --ulong get_tbclk (void) --{ -- ulong tbclk; -- -- tbclk = CONFIG_SYS_HZ; -- return tbclk; --} -- --/* -- * Reset the cpu by setting up the watchdog timer and let him time out -- * or toggle a GPIO pin on the AT91RM9200DK board -- */ --void reset_cpu (ulong ignored) --{ -- --#if defined(CONFIG_AT91RM9200_USART) -- /*shutdown the console to avoid strange chars during reset */ -- serial_exit(); --#endif -- -- if (board_reset) -- board_reset(); -- -- /* this is the way Linux does it */ -- -- /* FIXME: -- * These defines should be moved into -- * include/asm-arm/arch-at91rm9200/AT91RM9200.h -- * as soon as the whitespace fix gets applied. -- */ -- #define AT91C_ST_RSTEN (0x1 << 16) -- #define AT91C_ST_EXTEN (0x1 << 17) -- #define AT91C_ST_WDRST (0x1 << 0) -- #define ST_WDMR *((unsigned long *)0xfffffd08) /* watchdog mode register */ -- #define ST_CR *((unsigned long *)0xfffffd00) /* system clock control register */ -- -- ST_WDMR = AT91C_ST_RSTEN | AT91C_ST_EXTEN | 1 ; -- ST_CR = AT91C_ST_WDRST; -- -- while (1); -- /* Never reached */ --} -diff --git a/cpu/arm920t/at91rm9200/reset.c b/cpu/arm920t/at91rm9200/reset.c -new file mode 100644 -index 0000000..945ea2c ---- /dev/null -+++ b/cpu/arm920t/at91rm9200/reset.c -@@ -0,0 +1,71 @@ -+/* -+ * (C) Copyright 2002 -+ * Lineo, Inc. -+ * Bernhard Kuhn -+ * -+ * (C) Copyright 2002 -+ * Sysgo Real-Time Solutions, GmbH -+ * Marius Groeger -+ * -+ * (C) Copyright 2002 -+ * Sysgo Real-Time Solutions, GmbH -+ * Alex Zuepke -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+#include -+ -+void board_reset(void) __attribute__((__weak__)); -+ -+/* -+ * Reset the cpu by setting up the watchdog timer and let him time out -+ * or toggle a GPIO pin on the AT91RM9200DK board -+ */ -+void reset_cpu (ulong ignored) -+{ -+ -+#if defined(CONFIG_AT91RM9200_USART) -+ /*shutdown the console to avoid strange chars during reset */ -+ serial_exit(); -+#endif -+ -+ if (board_reset) -+ board_reset(); -+ -+ /* this is the way Linux does it */ -+ -+ /* FIXME: -+ * These defines should be moved into -+ * include/asm-arm/arch-at91rm9200/AT91RM9200.h -+ * as soon as the whitespace fix gets applied. -+ */ -+ #define AT91C_ST_RSTEN (0x1 << 16) -+ #define AT91C_ST_EXTEN (0x1 << 17) -+ #define AT91C_ST_WDRST (0x1 << 0) -+ #define ST_WDMR *((unsigned long *)0xfffffd08) /* watchdog mode register */ -+ #define ST_CR *((unsigned long *)0xfffffd00) /* system clock control register */ -+ -+ ST_WDMR = AT91C_ST_RSTEN | AT91C_ST_EXTEN | 1 ; -+ ST_CR = AT91C_ST_WDRST; -+ -+ while (1); -+ /* Never reached */ -+} -diff --git a/cpu/arm920t/at91rm9200/timer.c b/cpu/arm920t/at91rm9200/timer.c -new file mode 100644 -index 0000000..235d107 ---- /dev/null -+++ b/cpu/arm920t/at91rm9200/timer.c -@@ -0,0 +1,160 @@ -+/* -+ * (C) Copyright 2002 -+ * Lineo, Inc. -+ * Bernhard Kuhn -+ * -+ * (C) Copyright 2002 -+ * Sysgo Real-Time Solutions, GmbH -+ * Marius Groeger -+ * -+ * (C) Copyright 2002 -+ * Sysgo Real-Time Solutions, GmbH -+ * Alex Zuepke -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+/*#include */ -+#include -+/*#include */ -+ -+/* the number of clocks per CONFIG_SYS_HZ */ -+#define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK/CONFIG_SYS_HZ) -+ -+/* macro to read the 16 bit timer */ -+#define READ_TIMER (tmr->TC_CV & 0x0000ffff) -+AT91PS_TC tmr; -+ -+static ulong timestamp; -+static ulong lastinc; -+ -+int timer_init (void) -+{ -+ tmr = AT91C_BASE_TC0; -+ -+ /* enables TC1.0 clock */ -+ *AT91C_PMC_PCER = 1 << AT91C_ID_TC0; /* enable clock */ -+ -+ *AT91C_TCB0_BCR = 0; -+ *AT91C_TCB0_BMR = AT91C_TCB_TC0XC0S_NONE | AT91C_TCB_TC1XC1S_NONE | AT91C_TCB_TC2XC2S_NONE; -+ tmr->TC_CCR = AT91C_TC_CLKDIS; -+#define AT91C_TC_CMR_CPCTRG (1 << 14) -+ /* set to MCLK/2 and restart the timer when the vlaue in TC_RC is reached */ -+ tmr->TC_CMR = AT91C_TC_TIMER_DIV1_CLOCK | AT91C_TC_CMR_CPCTRG; -+ -+ tmr->TC_IDR = ~0ul; -+ tmr->TC_RC = TIMER_LOAD_VAL; -+ lastinc = 0; -+ tmr->TC_CCR = AT91C_TC_SWTRG | AT91C_TC_CLKEN; -+ timestamp = 0; -+ -+ return (0); -+} -+ -+/* -+ * timer without interrupts -+ */ -+ -+void reset_timer (void) -+{ -+ reset_timer_masked (); -+} -+ -+ulong get_timer (ulong base) -+{ -+ return get_timer_masked () - base; -+} -+ -+void set_timer (ulong t) -+{ -+ timestamp = t; -+} -+ -+void udelay (unsigned long usec) -+{ -+ udelay_masked(usec); -+} -+ -+void reset_timer_masked (void) -+{ -+ /* reset time */ -+ lastinc = READ_TIMER; -+ timestamp = 0; -+} -+ -+ulong get_timer_raw (void) -+{ -+ ulong now = READ_TIMER; -+ -+ if (now >= lastinc) { -+ /* normal mode */ -+ timestamp += now - lastinc; -+ } else { -+ /* we have an overflow ... */ -+ timestamp += now + TIMER_LOAD_VAL - lastinc; -+ } -+ lastinc = now; -+ -+ return timestamp; -+} -+ -+ulong get_timer_masked (void) -+{ -+ return get_timer_raw()/TIMER_LOAD_VAL; -+} -+ -+void udelay_masked (unsigned long usec) -+{ -+ ulong tmo; -+ ulong endtime; -+ signed long diff; -+ -+ tmo = CONFIG_SYS_HZ_CLOCK / 1000; -+ tmo *= usec; -+ tmo /= 1000; -+ -+ endtime = get_timer_raw () + tmo; -+ -+ do { -+ ulong now = get_timer_raw (); -+ diff = endtime - now; -+ } while (diff >= 0); -+} -+ -+/* -+ * This function is derived from PowerPC code (read timebase as long long). -+ * On ARM it just returns the timer value. -+ */ -+unsigned long long get_ticks(void) -+{ -+ return get_timer(0); -+} -+ -+/* -+ * This function is derived from PowerPC code (timebase clock frequency). -+ * On ARM it returns the number of timer ticks per second. -+ */ -+ulong get_tbclk (void) -+{ -+ ulong tbclk; -+ -+ tbclk = CONFIG_SYS_HZ; -+ return tbclk; -+} -diff --git a/cpu/arm920t/cpu.c b/cpu/arm920t/cpu.c -index 0c080fe..34adb11 100644 ---- a/cpu/arm920t/cpu.c -+++ b/cpu/arm920t/cpu.c -@@ -31,27 +31,10 @@ - - #include - #include --#include - #include - --#ifdef CONFIG_USE_IRQ --DECLARE_GLOBAL_DATA_PTR; --#endif -- - static void cache_flush(void); - --int cpu_init (void) --{ -- /* -- * setup up stacks if necessary -- */ --#ifdef CONFIG_USE_IRQ -- IRQ_STACK_START = _armboot_start - CONFIG_SYS_MALLOC_LEN - CONFIG_SYS_GBL_DATA_SIZE - 4; -- FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ; --#endif -- return 0; --} -- - int cleanup_before_linux (void) - { - /* -diff --git a/cpu/arm920t/imx/Makefile b/cpu/arm920t/imx/Makefile -index d3352de..28945e2 100644 ---- a/cpu/arm920t/imx/Makefile -+++ b/cpu/arm920t/imx/Makefile -@@ -25,7 +25,9 @@ include $(TOPDIR)/config.mk - - LIB = $(obj)lib$(SOC).a - --COBJS = generic.o interrupts.o speed.o -+COBJS += generic.o -+COBJS += speed.o -+COBJS += timer.o - - SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) - OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) -diff --git a/cpu/arm920t/imx/interrupts.c b/cpu/arm920t/imx/interrupts.c -deleted file mode 100644 -index 1beaf9d..0000000 ---- a/cpu/arm920t/imx/interrupts.c -+++ /dev/null -@@ -1,139 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Sysgo Real-Time Solutions, GmbH -- * Marius Groeger -- * -- * (C) Copyright 2002 -- * Sysgo Real-Time Solutions, GmbH -- * Alex Zuepke -- * -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --#if defined (CONFIG_IMX) -- --#include --#include -- --int interrupt_init (void) --{ -- int i; -- /* setup GP Timer 1 */ -- TCTL1 = TCTL_SWR; -- for ( i=0; i<100; i++) TCTL1 = 0; /* We have no udelay by now */ -- TPRER1 = get_PERCLK1() / 1000000; /* 1 MHz */ -- TCTL1 |= TCTL_FRR | (1<<1); /* Freerun Mode, PERCLK1 input */ -- -- reset_timer_masked(); -- -- return (0); --} -- --/* -- * timer without interrupts -- */ -- --void reset_timer (void) --{ -- reset_timer_masked (); --} -- --ulong get_timer (ulong base) --{ -- return get_timer_masked() - base; --} -- --void set_timer (ulong t) --{ -- /* nop */ --} -- --void reset_timer_masked (void) --{ -- TCTL1 &= ~TCTL_TEN; -- TCTL1 |= TCTL_TEN; /* Enable timer */ --} -- --ulong get_timer_masked (void) --{ -- return TCN1; --} -- --void udelay_masked (unsigned long usec) --{ -- ulong endtime = get_timer_masked() + usec; -- signed long diff; -- -- do { -- ulong now = get_timer_masked (); -- diff = endtime - now; -- } while (diff >= 0); --} -- --void udelay (unsigned long usec) --{ -- udelay_masked(usec); --} -- --/* -- * This function is derived from PowerPC code (read timebase as long long). -- * On ARM it just returns the timer value. -- */ --unsigned long long get_ticks(void) --{ -- return get_timer(0); --} -- --/* -- * This function is derived from PowerPC code (timebase clock frequency). -- * On ARM it returns the number of timer ticks per second. -- */ --ulong get_tbclk (void) --{ -- ulong tbclk; -- -- tbclk = CONFIG_SYS_HZ; -- -- return tbclk; --} -- --/* -- * Reset the cpu by setting up the watchdog timer and let him time out -- */ --void reset_cpu (ulong ignored) --{ -- /* Disable watchdog and set Time-Out field to 0 */ -- WCR = 0x00000000; -- -- /* Write Service Sequence */ -- WSR = 0x00005555; -- WSR = 0x0000AAAA; -- -- /* Enable watchdog */ -- WCR = 0x00000001; -- -- while (1); -- /*NOTREACHED*/ --} -- --#endif /* defined (CONFIG_IMX) */ -diff --git a/cpu/arm920t/imx/timer.c b/cpu/arm920t/imx/timer.c -new file mode 100644 -index 0000000..31ec588 ---- /dev/null -+++ b/cpu/arm920t/imx/timer.c -@@ -0,0 +1,138 @@ -+/* -+ * (C) Copyright 2002 -+ * Sysgo Real-Time Solutions, GmbH -+ * Marius Groeger -+ * -+ * (C) Copyright 2002 -+ * Sysgo Real-Time Solutions, GmbH -+ * Alex Zuepke -+ * -+ * (C) Copyright 2002 -+ * Gary Jennejohn, DENX Software Engineering, -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+#if defined (CONFIG_IMX) -+ -+#include -+ -+int timer_init (void) -+{ -+ int i; -+ /* setup GP Timer 1 */ -+ TCTL1 = TCTL_SWR; -+ for ( i=0; i<100; i++) TCTL1 = 0; /* We have no udelay by now */ -+ TPRER1 = get_PERCLK1() / 1000000; /* 1 MHz */ -+ TCTL1 |= TCTL_FRR | (1<<1); /* Freerun Mode, PERCLK1 input */ -+ -+ reset_timer_masked(); -+ -+ return (0); -+} -+ -+/* -+ * timer without interrupts -+ */ -+ -+void reset_timer (void) -+{ -+ reset_timer_masked (); -+} -+ -+ulong get_timer (ulong base) -+{ -+ return get_timer_masked() - base; -+} -+ -+void set_timer (ulong t) -+{ -+ /* nop */ -+} -+ -+void reset_timer_masked (void) -+{ -+ TCTL1 &= ~TCTL_TEN; -+ TCTL1 |= TCTL_TEN; /* Enable timer */ -+} -+ -+ulong get_timer_masked (void) -+{ -+ return TCN1; -+} -+ -+void udelay_masked (unsigned long usec) -+{ -+ ulong endtime = get_timer_masked() + usec; -+ signed long diff; -+ -+ do { -+ ulong now = get_timer_masked (); -+ diff = endtime - now; -+ } while (diff >= 0); -+} -+ -+void udelay (unsigned long usec) -+{ -+ udelay_masked(usec); -+} -+ -+/* -+ * This function is derived from PowerPC code (read timebase as long long). -+ * On ARM it just returns the timer value. -+ */ -+unsigned long long get_ticks(void) -+{ -+ return get_timer(0); -+} -+ -+/* -+ * This function is derived from PowerPC code (timebase clock frequency). -+ * On ARM it returns the number of timer ticks per second. -+ */ -+ulong get_tbclk (void) -+{ -+ ulong tbclk; -+ -+ tbclk = CONFIG_SYS_HZ; -+ -+ return tbclk; -+} -+ -+/* -+ * Reset the cpu by setting up the watchdog timer and let him time out -+ */ -+void reset_cpu (ulong ignored) -+{ -+ /* Disable watchdog and set Time-Out field to 0 */ -+ WCR = 0x00000000; -+ -+ /* Write Service Sequence */ -+ WSR = 0x00005555; -+ WSR = 0x0000AAAA; -+ -+ /* Enable watchdog */ -+ WCR = 0x00000001; -+ -+ while (1); -+ /*NOTREACHED*/ -+} -+ -+#endif /* defined (CONFIG_IMX) */ -diff --git a/cpu/arm920t/interrupts.c b/cpu/arm920t/interrupts.c -index 1fbd1f0..ea24cdf 100644 ---- a/cpu/arm920t/interrupts.c -+++ b/cpu/arm920t/interrupts.c -@@ -30,7 +30,6 @@ - */ - - #include --#include - - #ifdef CONFIG_USE_IRQ - #include -diff --git a/cpu/arm920t/ks8695/Makefile b/cpu/arm920t/ks8695/Makefile -index f6b0063..f53fdc2 100644 ---- a/cpu/arm920t/ks8695/Makefile -+++ b/cpu/arm920t/ks8695/Makefile -@@ -25,9 +25,10 @@ include $(TOPDIR)/config.mk - - LIB = $(obj)lib$(SOC).a - --COBJS = interrupts.o - SOBJS = lowlevel_init.o - -+COBJS = timer.o -+ - SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) - OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) - -diff --git a/cpu/arm920t/ks8695/interrupts.c b/cpu/arm920t/ks8695/interrupts.c -deleted file mode 100644 -index 883d689..0000000 ---- a/cpu/arm920t/ks8695/interrupts.c -+++ /dev/null -@@ -1,112 +0,0 @@ --/* -- * (C) Copyright 2004-2005, Greg Ungerer -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --#include -- --/* -- * Handy KS8695 register access functions. -- */ --#define ks8695_read(a) *((volatile ulong *) (KS8695_IO_BASE + (a))) --#define ks8695_write(a,v) *((volatile ulong *) (KS8695_IO_BASE + (a))) = (v) -- --int timer_inited; --ulong timer_ticks; -- --int interrupt_init (void) --{ -- /* nothing happens here - we don't setup any IRQs */ -- return (0); --} -- --/* -- * Initial timer set constants. Nothing complicated, just set for a 1ms -- * tick. -- */ --#define TIMER_INTERVAL (TICKS_PER_uSEC * mSEC_1) --#define TIMER_COUNT (TIMER_INTERVAL / 2) --#define TIMER_PULSE TIMER_COUNT -- --void reset_timer_masked(void) --{ -- /* Set the hadware timer for 1ms */ -- ks8695_write(KS8695_TIMER1, TIMER_COUNT); -- ks8695_write(KS8695_TIMER1_PCOUNT, TIMER_PULSE); -- ks8695_write(KS8695_TIMER_CTRL, 0x2); -- timer_ticks = 0; -- timer_inited++; --} -- --void reset_timer(void) --{ -- reset_timer_masked(); --} -- --ulong get_timer_masked(void) --{ -- /* Check for timer wrap */ -- if (ks8695_read(KS8695_INT_STATUS) & KS8695_INTMASK_TIMERINT1) { -- /* Clear interrupt condition */ -- ks8695_write(KS8695_INT_STATUS, KS8695_INTMASK_TIMERINT1); -- timer_ticks++; -- } -- return timer_ticks; --} -- --ulong get_timer(ulong base) --{ -- return (get_timer_masked() - base); --} -- --void set_timer(ulong t) --{ -- timer_ticks = t; --} -- --void udelay(ulong usec) --{ -- ulong start = get_timer_masked(); -- ulong end; -- -- if (!timer_inited) -- reset_timer(); -- -- /* Only 1ms resolution :-( */ -- end = usec / 1000; -- while (get_timer(start) < end) -- ; --} -- --void reset_cpu (ulong ignored) --{ -- ulong tc; -- -- /* Set timer0 to watchdog, and let it timeout */ -- tc = ks8695_read(KS8695_TIMER_CTRL) & 0x2; -- ks8695_write(KS8695_TIMER_CTRL, tc); -- ks8695_write(KS8695_TIMER0, ((10 << 8) | 0xff)); -- ks8695_write(KS8695_TIMER_CTRL, (tc | 0x1)); -- -- /* Should only wait here till watchdog resets */ -- for (;;) -- ; --} -diff --git a/cpu/arm920t/ks8695/timer.c b/cpu/arm920t/ks8695/timer.c -new file mode 100644 -index 0000000..22987bc ---- /dev/null -+++ b/cpu/arm920t/ks8695/timer.c -@@ -0,0 +1,108 @@ -+/* -+ * (C) Copyright 2004-2005, Greg Ungerer -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+#include -+ -+/* -+ * Handy KS8695 register access functions. -+ */ -+#define ks8695_read(a) *((volatile ulong *) (KS8695_IO_BASE + (a))) -+#define ks8695_write(a,v) *((volatile ulong *) (KS8695_IO_BASE + (a))) = (v) -+ -+ulong timer_ticks; -+ -+int timer_init (void) -+{ -+ reset_timer(); -+ -+ return 0; -+} -+ -+/* -+ * Initial timer set constants. Nothing complicated, just set for a 1ms -+ * tick. -+ */ -+#define TIMER_INTERVAL (TICKS_PER_uSEC * mSEC_1) -+#define TIMER_COUNT (TIMER_INTERVAL / 2) -+#define TIMER_PULSE TIMER_COUNT -+ -+void reset_timer_masked(void) -+{ -+ /* Set the hadware timer for 1ms */ -+ ks8695_write(KS8695_TIMER1, TIMER_COUNT); -+ ks8695_write(KS8695_TIMER1_PCOUNT, TIMER_PULSE); -+ ks8695_write(KS8695_TIMER_CTRL, 0x2); -+ timer_ticks = 0; -+} -+ -+void reset_timer(void) -+{ -+ reset_timer_masked(); -+} -+ -+ulong get_timer_masked(void) -+{ -+ /* Check for timer wrap */ -+ if (ks8695_read(KS8695_INT_STATUS) & KS8695_INTMASK_TIMERINT1) { -+ /* Clear interrupt condition */ -+ ks8695_write(KS8695_INT_STATUS, KS8695_INTMASK_TIMERINT1); -+ timer_ticks++; -+ } -+ return timer_ticks; -+} -+ -+ulong get_timer(ulong base) -+{ -+ return (get_timer_masked() - base); -+} -+ -+void set_timer(ulong t) -+{ -+ timer_ticks = t; -+} -+ -+void udelay(ulong usec) -+{ -+ ulong start = get_timer_masked(); -+ ulong end; -+ -+ /* Only 1ms resolution :-( */ -+ end = usec / 1000; -+ while (get_timer(start) < end) -+ ; -+} -+ -+void reset_cpu (ulong ignored) -+{ -+ ulong tc; -+ -+ /* Set timer0 to watchdog, and let it timeout */ -+ tc = ks8695_read(KS8695_TIMER_CTRL) & 0x2; -+ ks8695_write(KS8695_TIMER_CTRL, tc); -+ ks8695_write(KS8695_TIMER0, ((10 << 8) | 0xff)); -+ ks8695_write(KS8695_TIMER_CTRL, (tc | 0x1)); -+ -+ /* Should only wait here till watchdog resets */ -+ for (;;) -+ ; -+} -diff --git a/cpu/arm920t/s3c24x0/Makefile b/cpu/arm920t/s3c24x0/Makefile -index 3afe19c..5d2be2c 100644 ---- a/cpu/arm920t/s3c24x0/Makefile -+++ b/cpu/arm920t/s3c24x0/Makefile -@@ -25,7 +25,10 @@ include $(TOPDIR)/config.mk - - LIB = $(obj)lib$(SOC).a - --COBJS = interrupts.o speed.o usb.o usb_ohci.o -+COBJS += speed.o -+COBJS += timer.o -+COBJS += usb.o -+COBJS += usb_ohci.o - - SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) - OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) -diff --git a/cpu/arm920t/s3c24x0/interrupts.c b/cpu/arm920t/s3c24x0/interrupts.c -deleted file mode 100644 -index b8ce6ae..0000000 ---- a/cpu/arm920t/s3c24x0/interrupts.c -+++ /dev/null -@@ -1,228 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Sysgo Real-Time Solutions, GmbH -- * Marius Groeger -- * -- * (C) Copyright 2002 -- * Sysgo Real-Time Solutions, GmbH -- * Alex Zuepke -- * -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) -- --#include --#if defined(CONFIG_S3C2400) --#include --#elif defined(CONFIG_S3C2410) --#include --#endif -- --int timer_load_val = 0; -- --/* macro to read the 16 bit timer */ --static inline ulong READ_TIMER(void) --{ -- S3C24X0_TIMERS * const timers = S3C24X0_GetBase_TIMERS(); -- -- return (timers->TCNTO4 & 0xffff); --} -- --static ulong timestamp; --static ulong lastdec; -- --int interrupt_init (void) --{ -- S3C24X0_TIMERS * const timers = S3C24X0_GetBase_TIMERS(); -- -- /* use PWM Timer 4 because it has no output */ -- /* prescaler for Timer 4 is 16 */ -- timers->TCFG0 = 0x0f00; -- if (timer_load_val == 0) -- { -- /* -- * for 10 ms clock period @ PCLK with 4 bit divider = 1/2 -- * (default) and prescaler = 16. Should be 10390 -- * @33.25MHz and 15625 @ 50 MHz -- */ -- timer_load_val = get_PCLK()/(2 * 16 * 100); -- } -- /* load value for 10 ms timeout */ -- lastdec = timers->TCNTB4 = timer_load_val; -- /* auto load, manual update of Timer 4 */ -- timers->TCON = (timers->TCON & ~0x0700000) | 0x600000; -- /* auto load, start Timer 4 */ -- timers->TCON = (timers->TCON & ~0x0700000) | 0x500000; -- timestamp = 0; -- -- return (0); --} -- --/* -- * timer without interrupts -- */ -- --void reset_timer (void) --{ -- reset_timer_masked (); --} -- --ulong get_timer (ulong base) --{ -- return get_timer_masked () - base; --} -- --void set_timer (ulong t) --{ -- timestamp = t; --} -- --void udelay (unsigned long usec) --{ -- ulong tmo; -- ulong start = get_timer(0); -- -- tmo = usec / 1000; -- tmo *= (timer_load_val * 100); -- tmo /= 1000; -- -- while ((ulong)(get_timer_masked () - start) < tmo) -- /*NOP*/; --} -- --void reset_timer_masked (void) --{ -- /* reset time */ -- lastdec = READ_TIMER(); -- timestamp = 0; --} -- --ulong get_timer_masked (void) --{ -- ulong now = READ_TIMER(); -- -- if (lastdec >= now) { -- /* normal mode */ -- timestamp += lastdec - now; -- } else { -- /* we have an overflow ... */ -- timestamp += lastdec + timer_load_val - now; -- } -- lastdec = now; -- -- return timestamp; --} -- --void udelay_masked (unsigned long usec) --{ -- ulong tmo; -- ulong endtime; -- signed long diff; -- -- if (usec >= 1000) { -- tmo = usec / 1000; -- tmo *= (timer_load_val * 100); -- tmo /= 1000; -- } else { -- tmo = usec * (timer_load_val * 100); -- tmo /= (1000*1000); -- } -- -- endtime = get_timer_masked () + tmo; -- -- do { -- ulong now = get_timer_masked (); -- diff = endtime - now; -- } while (diff >= 0); --} -- --/* -- * This function is derived from PowerPC code (read timebase as long long). -- * On ARM it just returns the timer value. -- */ --unsigned long long get_ticks(void) --{ -- return get_timer(0); --} -- --/* -- * This function is derived from PowerPC code (timebase clock frequency). -- * On ARM it returns the number of timer ticks per second. -- */ --ulong get_tbclk (void) --{ -- ulong tbclk; -- --#if defined(CONFIG_SMDK2400) || defined(CONFIG_TRAB) -- tbclk = timer_load_val * 100; --#elif defined(CONFIG_SBC2410X) || \ -- defined(CONFIG_SMDK2410) || \ -- defined(CONFIG_VCMA9) -- tbclk = CONFIG_SYS_HZ; --#else --# error "tbclk not configured" --#endif -- -- return tbclk; --} -- --/* -- * reset the cpu by setting up the watchdog timer and let him time out -- */ --void reset_cpu (ulong ignored) --{ -- volatile S3C24X0_WATCHDOG * watchdog; -- --#ifdef CONFIG_TRAB -- extern void disable_vfd (void); -- -- disable_vfd(); --#endif -- -- watchdog = S3C24X0_GetBase_WATCHDOG(); -- -- /* Disable watchdog */ -- watchdog->WTCON = 0x0000; -- -- /* Initialize watchdog timer count register */ -- watchdog->WTCNT = 0x0001; -- -- /* Enable watchdog timer; assert reset at timer timeout */ -- watchdog->WTCON = 0x0021; -- -- while(1); /* loop forever and wait for reset to happen */ -- -- /*NOTREACHED*/ --} -- --#ifdef CONFIG_USE_IRQ --void s3c2410_irq(void) --{ -- S3C24X0_INTERRUPT * irq = S3C24X0_GetBase_INTERRUPT(); -- u_int32_t intpnd = irq->INTPND; -- --} --#endif /* USE_IRQ */ -- --#endif /* defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) */ -diff --git a/cpu/arm920t/s3c24x0/timer.c b/cpu/arm920t/s3c24x0/timer.c -new file mode 100644 -index 0000000..f0a09cd ---- /dev/null -+++ b/cpu/arm920t/s3c24x0/timer.c -@@ -0,0 +1,227 @@ -+/* -+ * (C) Copyright 2002 -+ * Sysgo Real-Time Solutions, GmbH -+ * Marius Groeger -+ * -+ * (C) Copyright 2002 -+ * Sysgo Real-Time Solutions, GmbH -+ * Alex Zuepke -+ * -+ * (C) Copyright 2002 -+ * Gary Jennejohn, DENX Software Engineering, -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) -+ -+#if defined(CONFIG_S3C2400) -+#include -+#elif defined(CONFIG_S3C2410) -+#include -+#endif -+ -+int timer_load_val = 0; -+ -+/* macro to read the 16 bit timer */ -+static inline ulong READ_TIMER(void) -+{ -+ S3C24X0_TIMERS * const timers = S3C24X0_GetBase_TIMERS(); -+ -+ return (timers->TCNTO4 & 0xffff); -+} -+ -+static ulong timestamp; -+static ulong lastdec; -+ -+int timer_init (void) -+{ -+ S3C24X0_TIMERS * const timers = S3C24X0_GetBase_TIMERS(); -+ -+ /* use PWM Timer 4 because it has no output */ -+ /* prescaler for Timer 4 is 16 */ -+ timers->TCFG0 = 0x0f00; -+ if (timer_load_val == 0) -+ { -+ /* -+ * for 10 ms clock period @ PCLK with 4 bit divider = 1/2 -+ * (default) and prescaler = 16. Should be 10390 -+ * @33.25MHz and 15625 @ 50 MHz -+ */ -+ timer_load_val = get_PCLK()/(2 * 16 * 100); -+ } -+ /* load value for 10 ms timeout */ -+ lastdec = timers->TCNTB4 = timer_load_val; -+ /* auto load, manual update of Timer 4 */ -+ timers->TCON = (timers->TCON & ~0x0700000) | 0x600000; -+ /* auto load, start Timer 4 */ -+ timers->TCON = (timers->TCON & ~0x0700000) | 0x500000; -+ timestamp = 0; -+ -+ return (0); -+} -+ -+/* -+ * timer without interrupts -+ */ -+ -+void reset_timer (void) -+{ -+ reset_timer_masked (); -+} -+ -+ulong get_timer (ulong base) -+{ -+ return get_timer_masked () - base; -+} -+ -+void set_timer (ulong t) -+{ -+ timestamp = t; -+} -+ -+void udelay (unsigned long usec) -+{ -+ ulong tmo; -+ ulong start = get_timer(0); -+ -+ tmo = usec / 1000; -+ tmo *= (timer_load_val * 100); -+ tmo /= 1000; -+ -+ while ((ulong)(get_timer_masked () - start) < tmo) -+ /*NOP*/; -+} -+ -+void reset_timer_masked (void) -+{ -+ /* reset time */ -+ lastdec = READ_TIMER(); -+ timestamp = 0; -+} -+ -+ulong get_timer_masked (void) -+{ -+ ulong now = READ_TIMER(); -+ -+ if (lastdec >= now) { -+ /* normal mode */ -+ timestamp += lastdec - now; -+ } else { -+ /* we have an overflow ... */ -+ timestamp += lastdec + timer_load_val - now; -+ } -+ lastdec = now; -+ -+ return timestamp; -+} -+ -+void udelay_masked (unsigned long usec) -+{ -+ ulong tmo; -+ ulong endtime; -+ signed long diff; -+ -+ if (usec >= 1000) { -+ tmo = usec / 1000; -+ tmo *= (timer_load_val * 100); -+ tmo /= 1000; -+ } else { -+ tmo = usec * (timer_load_val * 100); -+ tmo /= (1000*1000); -+ } -+ -+ endtime = get_timer_masked () + tmo; -+ -+ do { -+ ulong now = get_timer_masked (); -+ diff = endtime - now; -+ } while (diff >= 0); -+} -+ -+/* -+ * This function is derived from PowerPC code (read timebase as long long). -+ * On ARM it just returns the timer value. -+ */ -+unsigned long long get_ticks(void) -+{ -+ return get_timer(0); -+} -+ -+/* -+ * This function is derived from PowerPC code (timebase clock frequency). -+ * On ARM it returns the number of timer ticks per second. -+ */ -+ulong get_tbclk (void) -+{ -+ ulong tbclk; -+ -+#if defined(CONFIG_SMDK2400) || defined(CONFIG_TRAB) -+ tbclk = timer_load_val * 100; -+#elif defined(CONFIG_SBC2410X) || \ -+ defined(CONFIG_SMDK2410) || \ -+ defined(CONFIG_VCMA9) -+ tbclk = CONFIG_SYS_HZ; -+#else -+# error "tbclk not configured" -+#endif -+ -+ return tbclk; -+} -+ -+/* -+ * reset the cpu by setting up the watchdog timer and let him time out -+ */ -+void reset_cpu (ulong ignored) -+{ -+ volatile S3C24X0_WATCHDOG * watchdog; -+ -+#ifdef CONFIG_TRAB -+ extern void disable_vfd (void); -+ -+ disable_vfd(); -+#endif -+ -+ watchdog = S3C24X0_GetBase_WATCHDOG(); -+ -+ /* Disable watchdog */ -+ watchdog->WTCON = 0x0000; -+ -+ /* Initialize watchdog timer count register */ -+ watchdog->WTCNT = 0x0001; -+ -+ /* Enable watchdog timer; assert reset at timer timeout */ -+ watchdog->WTCON = 0x0021; -+ -+ while(1); /* loop forever and wait for reset to happen */ -+ -+ /*NOTREACHED*/ -+} -+ -+#ifdef CONFIG_USE_IRQ -+void s3c2410_irq(void) -+{ -+ S3C24X0_INTERRUPT * irq = S3C24X0_GetBase_INTERRUPT(); -+ u_int32_t intpnd = irq->INTPND; -+ -+} -+#endif /* USE_IRQ */ -+ -+#endif /* defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) */ -diff --git a/cpu/arm920t/u-boot.lds b/cpu/arm920t/u-boot.lds -new file mode 100644 -index 0000000..d9bfbee ---- /dev/null -+++ b/cpu/arm920t/u-boot.lds -@@ -0,0 +1,64 @@ -+/* -+ * (c) Copyright 2004 -+ * Techware Information Technology, Inc. -+ * Ming-Len Wu -+ * -+ * (C) Copyright 2000-2004 -+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -+ * -+ * (C) Copyright 2002 -+ * Gary Jennejohn, DENX Software Engineering, -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ * -+ */ -+ -+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -+OUTPUT_ARCH(arm) -+ENTRY(_start) -+SECTIONS -+{ -+ . = 0x00000000; -+ -+ . = ALIGN(4); -+ .text : -+ { -+ cpu/arm920t/start.o (.text) -+ *(.text) -+ } -+ -+ . = ALIGN(4); -+ .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -+ -+ . = ALIGN(4); -+ .data : { *(.data) } -+ -+ . = ALIGN(4); -+ .got : { *(.got) } -+ -+ . = .; -+ __u_boot_cmd_start = .; -+ .u_boot_cmd : { *(.u_boot_cmd) } -+ __u_boot_cmd_end = .; -+ -+ . = ALIGN(4); -+ __bss_start = .; -+ .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -+ _end = .; -+} -diff --git a/cpu/arm925t/Makefile b/cpu/arm925t/Makefile -index 0d4912c..8d0e88f 100644 ---- a/cpu/arm925t/Makefile -+++ b/cpu/arm925t/Makefile -@@ -26,7 +26,10 @@ include $(TOPDIR)/config.mk - LIB = $(obj)lib$(CPU).a - - START = start.o --COBJS = interrupts.o cpu.o omap925.o -+ -+COBJS += cpu.o -+COBJS += omap925.o -+COBJS += timer.o - - SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) - OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) -diff --git a/cpu/arm925t/cpu.c b/cpu/arm925t/cpu.c -index 62828b1..71700bb 100644 ---- a/cpu/arm925t/cpu.c -+++ b/cpu/arm925t/cpu.c -@@ -34,24 +34,8 @@ - #include - #include - --#ifdef CONFIG_USE_IRQ --DECLARE_GLOBAL_DATA_PTR; --#endif -- - static void cache_flush(void); - --int cpu_init (void) --{ -- /* -- * setup up stacks if necessary -- */ --#ifdef CONFIG_USE_IRQ -- IRQ_STACK_START = _armboot_start - CONFIG_SYS_MALLOC_LEN - CONFIG_SYS_GBL_DATA_SIZE - 4; -- FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ; --#endif -- return 0; --} -- - int cleanup_before_linux (void) - { - /* -diff --git a/cpu/arm925t/interrupts.c b/cpu/arm925t/interrupts.c -deleted file mode 100644 -index 179992d..0000000 ---- a/cpu/arm925t/interrupts.c -+++ /dev/null -@@ -1,137 +0,0 @@ --/* -- * (C) Copyright 2009 -- * 2N Telekomunikace, -- * -- * (C) Copyright 2003 -- * Texas Instruments, -- * -- * (C) Copyright 2002 -- * Sysgo Real-Time Solutions, GmbH -- * Marius Groeger -- * -- * (C) Copyright 2002 -- * Sysgo Real-Time Solutions, GmbH -- * Alex Zuepke -- * -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --#include --#include --#include -- --#define TIMER_LOAD_VAL 0xffffffff --#define TIMER_CLOCK (CONFIG_SYS_CLK_FREQ / (2 << CONFIG_SYS_PTV)) -- --static uint32_t timestamp; --static uint32_t lastdec; -- --/* nothing really to do with interrupts, just starts up a counter. */ --int interrupt_init (void) --{ -- /* Start the decrementer ticking down from 0xffffffff */ -- __raw_writel(TIMER_LOAD_VAL, CONFIG_SYS_TIMERBASE + LOAD_TIM); -- __raw_writel(MPUTIM_ST | MPUTIM_AR | MPUTIM_CLOCK_ENABLE | -- (CONFIG_SYS_PTV << MPUTIM_PTV_BIT), -- CONFIG_SYS_TIMERBASE + CNTL_TIMER); -- -- /* init the timestamp and lastdec value */ -- reset_timer_masked(); -- -- return 0; --} -- --/* -- * timer without interrupts -- */ -- --void reset_timer (void) --{ -- reset_timer_masked (); --} -- --ulong get_timer (ulong base) --{ -- return get_timer_masked () - base; --} -- --void set_timer (ulong t) --{ -- timestamp = t; --} -- --/* delay x useconds AND preserve advance timestamp value */ --void udelay (unsigned long usec) --{ -- int32_t tmo = usec * (TIMER_CLOCK / 1000) / 1000; -- uint32_t now, last = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM); -- -- while (tmo > 0) { -- now = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM); -- if (last < now) /* count down timer underflow */ -- tmo -= TIMER_LOAD_VAL - now + last; -- else -- tmo -= last - now; -- last = now; -- } --} -- --void reset_timer_masked (void) --{ -- /* reset time */ -- lastdec = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM) / -- (TIMER_CLOCK / CONFIG_SYS_HZ); -- timestamp = 0; /* start "advancing" time stamp from 0 */ --} -- --ulong get_timer_masked (void) --{ -- uint32_t now = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM) / -- (TIMER_CLOCK / CONFIG_SYS_HZ); -- if (lastdec < now) /* count down timer underflow */ -- timestamp += TIMER_LOAD_VAL / (TIMER_CLOCK / CONFIG_SYS_HZ) - -- now + lastdec; -- else -- timestamp += lastdec - now; -- lastdec = now; -- -- return timestamp; --} -- --/* -- * This function is derived from PowerPC code (read timebase as long long). -- * On ARM it just returns the timer value. -- */ --unsigned long long get_ticks(void) --{ -- return get_timer(0); --} -- --/* -- * This function is derived from PowerPC code (timebase clock frequency). -- * On ARM it returns the number of timer ticks per second. -- */ --ulong get_tbclk (void) --{ -- return CONFIG_SYS_HZ; --} -diff --git a/cpu/arm925t/timer.c b/cpu/arm925t/timer.c -new file mode 100644 -index 0000000..c16ef25 ---- /dev/null -+++ b/cpu/arm925t/timer.c -@@ -0,0 +1,137 @@ -+/* -+ * (C) Copyright 2009 -+ * 2N Telekomunikace, -+ * -+ * (C) Copyright 2003 -+ * Texas Instruments, -+ * -+ * (C) Copyright 2002 -+ * Sysgo Real-Time Solutions, GmbH -+ * Marius Groeger -+ * -+ * (C) Copyright 2002 -+ * Sysgo Real-Time Solutions, GmbH -+ * Alex Zuepke -+ * -+ * (C) Copyright 2002 -+ * Gary Jennejohn, DENX Software Engineering, -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+#include -+#include -+#include -+ -+#define TIMER_LOAD_VAL 0xffffffff -+#define TIMER_CLOCK (CONFIG_SYS_CLK_FREQ / (2 << CONFIG_SYS_PTV)) -+ -+static uint32_t timestamp; -+static uint32_t lastdec; -+ -+/* nothing really to do with interrupts, just starts up a counter. */ -+int timer_init (void) -+{ -+ /* Start the decrementer ticking down from 0xffffffff */ -+ __raw_writel(TIMER_LOAD_VAL, CONFIG_SYS_TIMERBASE + LOAD_TIM); -+ __raw_writel(MPUTIM_ST | MPUTIM_AR | MPUTIM_CLOCK_ENABLE | -+ (CONFIG_SYS_PTV << MPUTIM_PTV_BIT), -+ CONFIG_SYS_TIMERBASE + CNTL_TIMER); -+ -+ /* init the timestamp and lastdec value */ -+ reset_timer_masked(); -+ -+ return 0; -+} -+ -+/* -+ * timer without interrupts -+ */ -+ -+void reset_timer (void) -+{ -+ reset_timer_masked (); -+} -+ -+ulong get_timer (ulong base) -+{ -+ return get_timer_masked () - base; -+} -+ -+void set_timer (ulong t) -+{ -+ timestamp = t; -+} -+ -+/* delay x useconds AND preserve advance timestamp value */ -+void udelay (unsigned long usec) -+{ -+ int32_t tmo = usec * (TIMER_CLOCK / 1000) / 1000; -+ uint32_t now, last = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM); -+ -+ while (tmo > 0) { -+ now = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM); -+ if (last < now) /* count down timer underflow */ -+ tmo -= TIMER_LOAD_VAL - now + last; -+ else -+ tmo -= last - now; -+ last = now; -+ } -+} -+ -+void reset_timer_masked (void) -+{ -+ /* reset time */ -+ lastdec = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM) / -+ (TIMER_CLOCK / CONFIG_SYS_HZ); -+ timestamp = 0; /* start "advancing" time stamp from 0 */ -+} -+ -+ulong get_timer_masked (void) -+{ -+ uint32_t now = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM) / -+ (TIMER_CLOCK / CONFIG_SYS_HZ); -+ if (lastdec < now) /* count down timer underflow */ -+ timestamp += TIMER_LOAD_VAL / (TIMER_CLOCK / CONFIG_SYS_HZ) - -+ now + lastdec; -+ else -+ timestamp += lastdec - now; -+ lastdec = now; -+ -+ return timestamp; -+} -+ -+/* -+ * This function is derived from PowerPC code (read timebase as long long). -+ * On ARM it just returns the timer value. -+ */ -+unsigned long long get_ticks(void) -+{ -+ return get_timer(0); -+} -+ -+/* -+ * This function is derived from PowerPC code (timebase clock frequency). -+ * On ARM it returns the number of timer ticks per second. -+ */ -+ulong get_tbclk (void) -+{ -+ return CONFIG_SYS_HZ; -+} -diff --git a/cpu/arm925t/u-boot.lds b/cpu/arm925t/u-boot.lds -new file mode 100644 -index 0000000..694780e ---- /dev/null -+++ b/cpu/arm925t/u-boot.lds -@@ -0,0 +1,59 @@ -+/* -+ * (C) Copyright 2004 -+ * Wolfgang Denk, DENX Software Engineering, -+ * -+ * (C) Copyright 2002 -+ * Gary Jennejohn, DENX Software Engineering, -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -+OUTPUT_ARCH(arm) -+ENTRY(_start) -+SECTIONS -+{ -+ . = 0x00000000; -+ -+ . = ALIGN(4); -+ .text : -+ { -+ cpu/arm925t/start.o (.text) -+ *(.text) -+ } -+ -+ . = ALIGN(4); -+ .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -+ -+ . = ALIGN(4); -+ .data : { *(.data) } -+ -+ . = ALIGN(4); -+ .got : { *(.got) } -+ -+ . = .; -+ __u_boot_cmd_start = .; -+ .u_boot_cmd : { *(.u_boot_cmd) } -+ __u_boot_cmd_end = .; -+ -+ . = ALIGN(4); -+ __bss_start = .; -+ .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -+ _end = .; -+} -diff --git a/cpu/arm926ejs/Makefile b/cpu/arm926ejs/Makefile -index d5ac7d3..7701b03 100644 ---- a/cpu/arm926ejs/Makefile -+++ b/cpu/arm926ejs/Makefile -@@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk - LIB = $(obj)lib$(CPU).a - - START = start.o --COBJS = interrupts.o cpu.o -+COBJS = cpu.o - - SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) - OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) -diff --git a/cpu/arm926ejs/at91/Makefile b/cpu/arm926ejs/at91/Makefile -index e300d97..66eec76 100644 ---- a/cpu/arm926ejs/at91/Makefile -+++ b/cpu/arm926ejs/at91/Makefile -@@ -25,38 +25,16 @@ include $(TOPDIR)/config.mk - - LIB = $(obj)lib$(SOC).a - --ifdef CONFIG_AT91CAP9 --COBJS-$(CONFIG_MACB) += at91cap9_macb.o --COBJS-y += at91cap9_serial.o --COBJS-$(CONFIG_HAS_DATAFLASH) += at91cap9_spi.o --endif --ifdef CONFIG_AT91SAM9260 --COBJS-$(CONFIG_MACB) += at91sam9260_macb.o --COBJS-y += at91sam9260_serial.o --COBJS-$(CONFIG_HAS_DATAFLASH) += at91sam9260_spi.o --endif --ifdef CONFIG_AT91SAM9G20 --COBJS-$(CONFIG_MACB) += at91sam9260_macb.o --COBJS-y += at91sam9260_serial.o --COBJS-$(CONFIG_HAS_DATAFLASH) += at91sam9260_spi.o --endif --ifdef CONFIG_AT91SAM9261 --COBJS-y += at91sam9261_serial.o --COBJS-$(CONFIG_HAS_DATAFLASH) += at91sam9261_spi.o --endif --ifdef CONFIG_AT91SAM9263 --COBJS-$(CONFIG_MACB) += at91sam9263_macb.o --COBJS-y += at91sam9263_serial.o --COBJS-$(CONFIG_HAS_DATAFLASH) += at91sam9263_spi.o --COBJS-$(CONFIG_USB_OHCI_NEW) += at91sam9263_usb.o --endif --ifdef CONFIG_AT91SAM9RL --COBJS-y += at91sam9rl_serial.o --COBJS-$(CONFIG_HAS_DATAFLASH) += at91sam9rl_spi.o --endif -+COBJS-$(CONFIG_AT91CAP9) += at91cap9_devices.o -+COBJS-$(CONFIG_AT91SAM9260) += at91sam9260_devices.o -+COBJS-$(CONFIG_AT91SAM9G20) += at91sam9260_devices.o -+COBJS-$(CONFIG_AT91SAM9261) += at91sam9261_devices.o -+COBJS-$(CONFIG_AT91SAM9263) += at91sam9263_devices.o -+COBJS-$(CONFIG_AT91SAM9RL) += at91sam9rl_devices.o - COBJS-$(CONFIG_AT91_LED) += led.o - COBJS-y += clock.o - COBJS-y += cpu.o -+COBJS-y += reset.o - COBJS-y += timer.o - - SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) -diff --git a/cpu/arm926ejs/at91/at91cap9_devices.c b/cpu/arm926ejs/at91/at91cap9_devices.c -new file mode 100644 -index 0000000..c0024ac ---- /dev/null -+++ b/cpu/arm926ejs/at91/at91cap9_devices.c -@@ -0,0 +1,176 @@ -+/* -+ * (C) Copyright 2007-2008 -+ * Stelian Pop -+ * Lead Tech Design -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+void at91_serial0_hw_init(void) -+{ -+ at91_set_A_periph(AT91_PIN_PA22, 1); /* TXD0 */ -+ at91_set_A_periph(AT91_PIN_PA23, 0); /* RXD0 */ -+ at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US0); -+} -+ -+void at91_serial1_hw_init(void) -+{ -+ at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */ -+ at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */ -+ at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US1); -+} -+ -+void at91_serial2_hw_init(void) -+{ -+ at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */ -+ at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */ -+ at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US2); -+} -+ -+void at91_serial3_hw_init(void) -+{ -+ at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */ -+ at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */ -+ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); -+} -+ -+void at91_serial_hw_init(void) -+{ -+#ifdef CONFIG_USART0 -+ at91_serial0_hw_init(); -+#endif -+ -+#ifdef CONFIG_USART1 -+ at91_serial1_hw_init(); -+#endif -+ -+#ifdef CONFIG_USART2 -+ at91_serial2_hw_init(); -+#endif -+ -+#ifdef CONFIG_USART3 /* DBGU */ -+ at91_serial3_hw_init(); -+#endif -+} -+ -+#ifdef CONFIG_HAS_DATAFLASH -+void at91_spi0_hw_init(unsigned long cs_mask) -+{ -+ at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ -+ at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ -+ at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ -+ -+ /* Enable clock */ -+ at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_SPI0); -+ -+ if (cs_mask & (1 << 0)) { -+ at91_set_B_periph(AT91_PIN_PA5, 1); -+ } -+ if (cs_mask & (1 << 1)) { -+ at91_set_B_periph(AT91_PIN_PA3, 1); -+ } -+ if (cs_mask & (1 << 2)) { -+ at91_set_B_periph(AT91_PIN_PD0, 1); -+ } -+ if (cs_mask & (1 << 3)) { -+ at91_set_B_periph(AT91_PIN_PD1, 1); -+ } -+ if (cs_mask & (1 << 4)) { -+ at91_set_gpio_output(AT91_PIN_PA5, 1); -+ } -+ if (cs_mask & (1 << 5)) { -+ at91_set_gpio_output(AT91_PIN_PA3, 1); -+ } -+ if (cs_mask & (1 << 6)) { -+ at91_set_gpio_output(AT91_PIN_PD0, 1); -+ } -+ if (cs_mask & (1 << 7)) { -+ at91_set_gpio_output(AT91_PIN_PD1, 1); -+ } -+} -+ -+void at91_spi1_hw_init(unsigned long cs_mask) -+{ -+ at91_set_A_periph(AT91_PIN_PB12, 0); /* SPI1_MISO */ -+ at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */ -+ at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */ -+ -+ /* Enable clock */ -+ at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_SPI1); -+ -+ if (cs_mask & (1 << 0)) { -+ at91_set_A_periph(AT91_PIN_PB15, 1); -+ } -+ if (cs_mask & (1 << 1)) { -+ at91_set_A_periph(AT91_PIN_PB16, 1); -+ } -+ if (cs_mask & (1 << 2)) { -+ at91_set_A_periph(AT91_PIN_PB17, 1); -+ } -+ if (cs_mask & (1 << 3)) { -+ at91_set_A_periph(AT91_PIN_PB18, 1); -+ } -+ if (cs_mask & (1 << 4)) { -+ at91_set_gpio_output(AT91_PIN_PB15, 1); -+ } -+ if (cs_mask & (1 << 5)) { -+ at91_set_gpio_output(AT91_PIN_PB16, 1); -+ } -+ if (cs_mask & (1 << 6)) { -+ at91_set_gpio_output(AT91_PIN_PB17, 1); -+ } -+ if (cs_mask & (1 << 7)) { -+ at91_set_gpio_output(AT91_PIN_PB18, 1); -+ } -+ -+} -+#endif -+ -+#ifdef CONFIG_MACB -+void at91_macb_hw_init(void) -+{ -+ at91_set_A_periph(AT91_PIN_PB21, 0); /* ETXCK_EREFCK */ -+ at91_set_A_periph(AT91_PIN_PB22, 0); /* ERXDV */ -+ at91_set_A_periph(AT91_PIN_PB25, 0); /* ERX0 */ -+ at91_set_A_periph(AT91_PIN_PB26, 0); /* ERX1 */ -+ at91_set_A_periph(AT91_PIN_PB27, 0); /* ERXER */ -+ at91_set_A_periph(AT91_PIN_PB28, 0); /* ETXEN */ -+ at91_set_A_periph(AT91_PIN_PB23, 0); /* ETX0 */ -+ at91_set_A_periph(AT91_PIN_PB24, 0); /* ETX1 */ -+ at91_set_A_periph(AT91_PIN_PB30, 0); /* EMDIO */ -+ at91_set_A_periph(AT91_PIN_PB29, 0); /* EMDC */ -+ -+#ifndef CONFIG_RMII -+ at91_set_B_periph(AT91_PIN_PC25, 0); /* ECRS */ -+ at91_set_B_periph(AT91_PIN_PC26, 0); /* ECOL */ -+ at91_set_B_periph(AT91_PIN_PC22, 0); /* ERX2 */ -+ at91_set_B_periph(AT91_PIN_PC23, 0); /* ERX3 */ -+ at91_set_B_periph(AT91_PIN_PC27, 0); /* ERXCK */ -+ at91_set_B_periph(AT91_PIN_PC20, 0); /* ETX2 */ -+ at91_set_B_periph(AT91_PIN_PC21, 0); /* ETX3 */ -+ at91_set_B_periph(AT91_PIN_PC24, 0); /* ETXER */ -+#endif -+} -+#endif -diff --git a/cpu/arm926ejs/at91/at91cap9_macb.c b/cpu/arm926ejs/at91/at91cap9_macb.c -deleted file mode 100644 -index 5095d8d..0000000 ---- a/cpu/arm926ejs/at91/at91cap9_macb.c -+++ /dev/null -@@ -1,54 +0,0 @@ --/* -- * (C) Copyright 2007-2008 -- * Stelian Pop -- * Lead Tech Design -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --#include --#include --#include --#include -- --void at91_macb_hw_init(void) --{ -- at91_set_A_periph(AT91_PIN_PB21, 0); /* ETXCK_EREFCK */ -- at91_set_A_periph(AT91_PIN_PB22, 0); /* ERXDV */ -- at91_set_A_periph(AT91_PIN_PB25, 0); /* ERX0 */ -- at91_set_A_periph(AT91_PIN_PB26, 0); /* ERX1 */ -- at91_set_A_periph(AT91_PIN_PB27, 0); /* ERXER */ -- at91_set_A_periph(AT91_PIN_PB28, 0); /* ETXEN */ -- at91_set_A_periph(AT91_PIN_PB23, 0); /* ETX0 */ -- at91_set_A_periph(AT91_PIN_PB24, 0); /* ETX1 */ -- at91_set_A_periph(AT91_PIN_PB30, 0); /* EMDIO */ -- at91_set_A_periph(AT91_PIN_PB29, 0); /* EMDC */ -- --#ifndef CONFIG_RMII -- at91_set_B_periph(AT91_PIN_PC25, 0); /* ECRS */ -- at91_set_B_periph(AT91_PIN_PC26, 0); /* ECOL */ -- at91_set_B_periph(AT91_PIN_PC22, 0); /* ERX2 */ -- at91_set_B_periph(AT91_PIN_PC23, 0); /* ERX3 */ -- at91_set_B_periph(AT91_PIN_PC27, 0); /* ERXCK */ -- at91_set_B_periph(AT91_PIN_PC20, 0); /* ETX2 */ -- at91_set_B_periph(AT91_PIN_PC21, 0); /* ETX3 */ -- at91_set_B_periph(AT91_PIN_PC24, 0); /* ETXER */ --#endif --} -diff --git a/cpu/arm926ejs/at91/at91cap9_serial.c b/cpu/arm926ejs/at91/at91cap9_serial.c -deleted file mode 100644 -index 5f41f7e..0000000 ---- a/cpu/arm926ejs/at91/at91cap9_serial.c -+++ /dev/null -@@ -1,76 +0,0 @@ --/* -- * (C) Copyright 2007-2008 -- * Stelian Pop -- * Lead Tech Design -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --#include --#include --#include --#include -- --void at91_serial0_hw_init(void) --{ -- at91_set_A_periph(AT91_PIN_PA22, 1); /* TXD0 */ -- at91_set_A_periph(AT91_PIN_PA23, 0); /* RXD0 */ -- at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US0); --} -- --void at91_serial1_hw_init(void) --{ -- at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */ -- at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */ -- at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US1); --} -- --void at91_serial2_hw_init(void) --{ -- at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */ -- at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */ -- at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US2); --} -- --void at91_serial3_hw_init(void) --{ -- at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */ -- at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */ -- at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); --} -- --void at91_serial_hw_init(void) --{ --#ifdef CONFIG_USART0 -- at91_serial0_hw_init(); --#endif -- --#ifdef CONFIG_USART1 -- at91_serial1_hw_init(); --#endif -- --#ifdef CONFIG_USART2 -- at91_serial2_hw_init(); --#endif -- --#ifdef CONFIG_USART3 /* DBGU */ -- at91_serial3_hw_init(); --#endif --} -diff --git a/cpu/arm926ejs/at91/at91cap9_spi.c b/cpu/arm926ejs/at91/at91cap9_spi.c -deleted file mode 100644 -index cd8143b..0000000 ---- a/cpu/arm926ejs/at91/at91cap9_spi.c -+++ /dev/null -@@ -1,100 +0,0 @@ --/* -- * (C) Copyright 2007-2008 -- * Stelian Pop -- * Lead Tech Design -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --#include --#include --#include --#include -- --void at91_spi0_hw_init(unsigned long cs_mask) --{ -- at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ -- at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ -- at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ -- -- /* Enable clock */ -- at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_SPI0); -- -- if (cs_mask & (1 << 0)) { -- at91_set_B_periph(AT91_PIN_PA5, 1); -- } -- if (cs_mask & (1 << 1)) { -- at91_set_B_periph(AT91_PIN_PA3, 1); -- } -- if (cs_mask & (1 << 2)) { -- at91_set_B_periph(AT91_PIN_PD0, 1); -- } -- if (cs_mask & (1 << 3)) { -- at91_set_B_periph(AT91_PIN_PD1, 1); -- } -- if (cs_mask & (1 << 4)) { -- at91_set_gpio_output(AT91_PIN_PA5, 1); -- } -- if (cs_mask & (1 << 5)) { -- at91_set_gpio_output(AT91_PIN_PA3, 1); -- } -- if (cs_mask & (1 << 6)) { -- at91_set_gpio_output(AT91_PIN_PD0, 1); -- } -- if (cs_mask & (1 << 7)) { -- at91_set_gpio_output(AT91_PIN_PD1, 1); -- } --} -- --void at91_spi1_hw_init(unsigned long cs_mask) --{ -- at91_set_A_periph(AT91_PIN_PB12, 0); /* SPI1_MISO */ -- at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */ -- at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */ -- -- /* Enable clock */ -- at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_SPI1); -- -- if (cs_mask & (1 << 0)) { -- at91_set_A_periph(AT91_PIN_PB15, 1); -- } -- if (cs_mask & (1 << 1)) { -- at91_set_A_periph(AT91_PIN_PB16, 1); -- } -- if (cs_mask & (1 << 2)) { -- at91_set_A_periph(AT91_PIN_PB17, 1); -- } -- if (cs_mask & (1 << 3)) { -- at91_set_A_periph(AT91_PIN_PB18, 1); -- } -- if (cs_mask & (1 << 4)) { -- at91_set_gpio_output(AT91_PIN_PB15, 1); -- } -- if (cs_mask & (1 << 5)) { -- at91_set_gpio_output(AT91_PIN_PB16, 1); -- } -- if (cs_mask & (1 << 6)) { -- at91_set_gpio_output(AT91_PIN_PB17, 1); -- } -- if (cs_mask & (1 << 7)) { -- at91_set_gpio_output(AT91_PIN_PB18, 1); -- } -- --} -diff --git a/cpu/arm926ejs/at91/at91sam9260_devices.c b/cpu/arm926ejs/at91/at91sam9260_devices.c -new file mode 100644 -index 0000000..5309ba2 ---- /dev/null -+++ b/cpu/arm926ejs/at91/at91sam9260_devices.c -@@ -0,0 +1,184 @@ -+/* -+ * (C) Copyright 2007-2008 -+ * Stelian Pop -+ * Lead Tech Design -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+void at91_serial0_hw_init(void) -+{ -+ at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */ -+ at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */ -+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US0); -+} -+ -+void at91_serial1_hw_init(void) -+{ -+ at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */ -+ at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */ -+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US1); -+} -+ -+void at91_serial2_hw_init(void) -+{ -+ at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */ -+ at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */ -+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US2); -+} -+ -+void at91_serial3_hw_init(void) -+{ -+ at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */ -+ at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */ -+ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); -+} -+ -+void at91_serial_hw_init(void) -+{ -+#ifdef CONFIG_USART0 -+ at91_serial0_hw_init(); -+#endif -+ -+#ifdef CONFIG_USART1 -+ at91_serial1_hw_init(); -+#endif -+ -+#ifdef CONFIG_USART2 -+ at91_serial2_hw_init(); -+#endif -+ -+#ifdef CONFIG_USART3 /* DBGU */ -+ at91_serial3_hw_init(); -+#endif -+} -+ -+#ifdef CONFIG_HAS_DATAFLASH -+void at91_spi0_hw_init(unsigned long cs_mask) -+{ -+ at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ -+ at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ -+ at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ -+ -+ /* Enable clock */ -+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI0); -+ -+ if (cs_mask & (1 << 0)) { -+ at91_set_A_periph(AT91_PIN_PA3, 1); -+ } -+ if (cs_mask & (1 << 1)) { -+ at91_set_B_periph(AT91_PIN_PC11, 1); -+ } -+ if (cs_mask & (1 << 2)) { -+ at91_set_B_periph(AT91_PIN_PC16, 1); -+ } -+ if (cs_mask & (1 << 3)) { -+ at91_set_B_periph(AT91_PIN_PC17, 1); -+ } -+ if (cs_mask & (1 << 4)) { -+ at91_set_gpio_output(AT91_PIN_PA3, 1); -+ } -+ if (cs_mask & (1 << 5)) { -+ at91_set_gpio_output(AT91_PIN_PC11, 1); -+ } -+ if (cs_mask & (1 << 6)) { -+ at91_set_gpio_output(AT91_PIN_PC16, 1); -+ } -+ if (cs_mask & (1 << 7)) { -+ at91_set_gpio_output(AT91_PIN_PC17, 1); -+ } -+} -+ -+void at91_spi1_hw_init(unsigned long cs_mask) -+{ -+ at91_set_A_periph(AT91_PIN_PB0, 0); /* SPI1_MISO */ -+ at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI1_MOSI */ -+ at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI1_SPCK */ -+ -+ /* Enable clock */ -+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI1); -+ -+ if (cs_mask & (1 << 0)) { -+ at91_set_A_periph(AT91_PIN_PB3, 1); -+ } -+ if (cs_mask & (1 << 1)) { -+ at91_set_B_periph(AT91_PIN_PC5, 1); -+ } -+ if (cs_mask & (1 << 2)) { -+ at91_set_B_periph(AT91_PIN_PC4, 1); -+ } -+ if (cs_mask & (1 << 3)) { -+ at91_set_gpio_output(AT91_PIN_PC3, 1); -+ } -+ if (cs_mask & (1 << 4)) { -+ at91_set_gpio_output(AT91_PIN_PB3, 1); -+ } -+ if (cs_mask & (1 << 5)) { -+ at91_set_gpio_output(AT91_PIN_PC5, 1); -+ } -+ if (cs_mask & (1 << 6)) { -+ at91_set_gpio_output(AT91_PIN_PC4, 1); -+ } -+ if (cs_mask & (1 << 7)) { -+ at91_set_gpio_output(AT91_PIN_PC3, 1); -+ } -+} -+#endif -+ -+#ifdef CONFIG_MACB -+void at91_macb_hw_init(void) -+{ -+ at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */ -+ at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */ -+ at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */ -+ at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */ -+ at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */ -+ at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */ -+ at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */ -+ at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */ -+ at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */ -+ at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */ -+ -+#ifndef CONFIG_RMII -+ at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */ -+ at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */ -+ at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */ -+ at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */ -+ at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */ -+#if defined(CONFIG_AT91SAM9260EK) || defined(CONFIG_AFEB9260) -+ /* -+ * use PA10, PA11 for ETX2, ETX3. -+ * PA23 and PA24 are for TWI EEPROM -+ */ -+ at91_set_B_periph(AT91_PIN_PA10, 0); /* ETX2 */ -+ at91_set_B_periph(AT91_PIN_PA11, 0); /* ETX3 */ -+#else -+ at91_set_B_periph(AT91_PIN_PA23, 0); /* ETX2 */ -+ at91_set_B_periph(AT91_PIN_PA24, 0); /* ETX3 */ -+#endif -+ at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */ -+#endif -+} -+#endif -diff --git a/cpu/arm926ejs/at91/at91sam9260_macb.c b/cpu/arm926ejs/at91/at91sam9260_macb.c -deleted file mode 100644 -index ea5e767..0000000 ---- a/cpu/arm926ejs/at91/at91sam9260_macb.c -+++ /dev/null -@@ -1,63 +0,0 @@ --/* -- * (C) Copyright 2007-2008 -- * Stelian Pop -- * Lead Tech Design -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --#include --#include --#include --#include -- --void at91_macb_hw_init(void) --{ -- at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */ -- at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */ -- at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */ -- at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */ -- at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */ -- at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */ -- at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */ -- at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */ -- at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */ -- at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */ -- --#ifndef CONFIG_RMII -- at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */ -- at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */ -- at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */ -- at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */ -- at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */ --#if defined(CONFIG_AT91SAM9260EK) || defined(CONFIG_AFEB9260) -- /* -- * use PA10, PA11 for ETX2, ETX3. -- * PA23 and PA24 are for TWI EEPROM -- */ -- at91_set_B_periph(AT91_PIN_PA10, 0); /* ETX2 */ -- at91_set_B_periph(AT91_PIN_PA11, 0); /* ETX3 */ --#else -- at91_set_B_periph(AT91_PIN_PA23, 0); /* ETX2 */ -- at91_set_B_periph(AT91_PIN_PA24, 0); /* ETX3 */ --#endif -- at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */ --#endif --} -diff --git a/cpu/arm926ejs/at91/at91sam9260_serial.c b/cpu/arm926ejs/at91/at91sam9260_serial.c -deleted file mode 100644 -index 43f1971..0000000 ---- a/cpu/arm926ejs/at91/at91sam9260_serial.c -+++ /dev/null -@@ -1,76 +0,0 @@ --/* -- * (C) Copyright 2007-2008 -- * Stelian Pop -- * Lead Tech Design -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --#include --#include --#include --#include -- --void at91_serial0_hw_init(void) --{ -- at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */ -- at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */ -- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US0); --} -- --void at91_serial1_hw_init(void) --{ -- at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */ -- at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */ -- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US1); --} -- --void at91_serial2_hw_init(void) --{ -- at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */ -- at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */ -- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US2); --} -- --void at91_serial3_hw_init(void) --{ -- at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */ -- at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */ -- at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); --} -- --void at91_serial_hw_init(void) --{ --#ifdef CONFIG_USART0 -- at91_serial0_hw_init(); --#endif -- --#ifdef CONFIG_USART1 -- at91_serial1_hw_init(); --#endif -- --#ifdef CONFIG_USART2 -- at91_serial2_hw_init(); --#endif -- --#ifdef CONFIG_USART3 /* DBGU */ -- at91_serial3_hw_init(); --#endif --} -diff --git a/cpu/arm926ejs/at91/at91sam9260_spi.c b/cpu/arm926ejs/at91/at91sam9260_spi.c -deleted file mode 100644 -index d6fd80e..0000000 ---- a/cpu/arm926ejs/at91/at91sam9260_spi.c -+++ /dev/null -@@ -1,99 +0,0 @@ --/* -- * (C) Copyright 2007-2008 -- * Stelian Pop -- * Lead Tech Design -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --#include --#include --#include --#include -- --void at91_spi0_hw_init(unsigned long cs_mask) --{ -- at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ -- at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ -- at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ -- -- /* Enable clock */ -- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI0); -- -- if (cs_mask & (1 << 0)) { -- at91_set_A_periph(AT91_PIN_PA3, 1); -- } -- if (cs_mask & (1 << 1)) { -- at91_set_B_periph(AT91_PIN_PC11, 1); -- } -- if (cs_mask & (1 << 2)) { -- at91_set_B_periph(AT91_PIN_PC16, 1); -- } -- if (cs_mask & (1 << 3)) { -- at91_set_B_periph(AT91_PIN_PC17, 1); -- } -- if (cs_mask & (1 << 4)) { -- at91_set_gpio_output(AT91_PIN_PA3, 1); -- } -- if (cs_mask & (1 << 5)) { -- at91_set_gpio_output(AT91_PIN_PC11, 1); -- } -- if (cs_mask & (1 << 6)) { -- at91_set_gpio_output(AT91_PIN_PC16, 1); -- } -- if (cs_mask & (1 << 7)) { -- at91_set_gpio_output(AT91_PIN_PC17, 1); -- } --} -- --void at91_spi1_hw_init(unsigned long cs_mask) --{ -- at91_set_A_periph(AT91_PIN_PB0, 0); /* SPI1_MISO */ -- at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI1_MOSI */ -- at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI1_SPCK */ -- -- /* Enable clock */ -- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI1); -- -- if (cs_mask & (1 << 0)) { -- at91_set_A_periph(AT91_PIN_PB3, 1); -- } -- if (cs_mask & (1 << 1)) { -- at91_set_B_periph(AT91_PIN_PC5, 1); -- } -- if (cs_mask & (1 << 2)) { -- at91_set_B_periph(AT91_PIN_PC4, 1); -- } -- if (cs_mask & (1 << 3)) { -- at91_set_gpio_output(AT91_PIN_PC3, 1); -- } -- if (cs_mask & (1 << 4)) { -- at91_set_gpio_output(AT91_PIN_PB3, 1); -- } -- if (cs_mask & (1 << 5)) { -- at91_set_gpio_output(AT91_PIN_PC5, 1); -- } -- if (cs_mask & (1 << 6)) { -- at91_set_gpio_output(AT91_PIN_PC4, 1); -- } -- if (cs_mask & (1 << 7)) { -- at91_set_gpio_output(AT91_PIN_PC3, 1); -- } --} -diff --git a/cpu/arm926ejs/at91/at91sam9261_devices.c b/cpu/arm926ejs/at91/at91sam9261_devices.c -new file mode 100644 -index 0000000..16d411f ---- /dev/null -+++ b/cpu/arm926ejs/at91/at91sam9261_devices.c -@@ -0,0 +1,148 @@ -+/* -+ * (C) Copyright 2007-2008 -+ * Stelian Pop -+ * Lead Tech Design -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+void at91_serial0_hw_init(void) -+{ -+ at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */ -+ at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */ -+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US0); -+} -+ -+void at91_serial1_hw_init(void) -+{ -+ at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */ -+ at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */ -+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US1); -+} -+ -+void at91_serial2_hw_init(void) -+{ -+ at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */ -+ at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */ -+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US2); -+} -+ -+void at91_serial3_hw_init(void) -+{ -+ at91_set_A_periph(AT91_PIN_PA9, 0); /* DRXD */ -+ at91_set_A_periph(AT91_PIN_PA10, 1); /* DTXD */ -+ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); -+} -+ -+void at91_serial_hw_init(void) -+{ -+#ifdef CONFIG_USART0 -+ at91_serial0_hw_init(); -+#endif -+ -+#ifdef CONFIG_USART1 -+ at91_serial1_hw_init(); -+#endif -+ -+#ifdef CONFIG_USART2 -+ at91_serial2_hw_init(); -+#endif -+ -+#ifdef CONFIG_USART3 /* DBGU */ -+ at91_serial3_hw_init(); -+#endif -+} -+ -+#ifdef CONFIG_HAS_DATAFLASH -+void at91_spi0_hw_init(unsigned long cs_mask) -+{ -+ at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ -+ at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ -+ at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ -+ -+ /* Enable clock */ -+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI0); -+ -+ if (cs_mask & (1 << 0)) { -+ at91_set_A_periph(AT91_PIN_PA3, 1); -+ } -+ if (cs_mask & (1 << 1)) { -+ at91_set_A_periph(AT91_PIN_PA4, 1); -+ } -+ if (cs_mask & (1 << 2)) { -+ at91_set_A_periph(AT91_PIN_PA5, 1); -+ } -+ if (cs_mask & (1 << 3)) { -+ at91_set_A_periph(AT91_PIN_PA6, 1); -+ } -+ if (cs_mask & (1 << 4)) { -+ at91_set_gpio_output(AT91_PIN_PA3, 1); -+ } -+ if (cs_mask & (1 << 5)) { -+ at91_set_gpio_output(AT91_PIN_PA4, 1); -+ } -+ if (cs_mask & (1 << 6)) { -+ at91_set_gpio_output(AT91_PIN_PA5, 1); -+ } -+ if (cs_mask & (1 << 7)) { -+ at91_set_gpio_output(AT91_PIN_PA6, 1); -+ } -+} -+ -+void at91_spi1_hw_init(unsigned long cs_mask) -+{ -+ at91_set_A_periph(AT91_PIN_PB30, 0); /* SPI1_MISO */ -+ at91_set_A_periph(AT91_PIN_PB31, 0); /* SPI1_MOSI */ -+ at91_set_A_periph(AT91_PIN_PB29, 0); /* SPI1_SPCK */ -+ -+ /* Enable clock */ -+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI1); -+ -+ if (cs_mask & (1 << 0)) { -+ at91_set_A_periph(AT91_PIN_PB28, 1); -+ } -+ if (cs_mask & (1 << 1)) { -+ at91_set_B_periph(AT91_PIN_PA24, 1); -+ } -+ if (cs_mask & (1 << 2)) { -+ at91_set_B_periph(AT91_PIN_PA25, 1); -+ } -+ if (cs_mask & (1 << 3)) { -+ at91_set_A_periph(AT91_PIN_PA26, 1); -+ } -+ if (cs_mask & (1 << 4)) { -+ at91_set_gpio_output(AT91_PIN_PB28, 1); -+ } -+ if (cs_mask & (1 << 5)) { -+ at91_set_gpio_output(AT91_PIN_PA24, 1); -+ } -+ if (cs_mask & (1 << 6)) { -+ at91_set_gpio_output(AT91_PIN_PA25, 1); -+ } -+ if (cs_mask & (1 << 7)) { -+ at91_set_gpio_output(AT91_PIN_PA26, 1); -+ } -+} -+#endif -diff --git a/cpu/arm926ejs/at91/at91sam9261_serial.c b/cpu/arm926ejs/at91/at91sam9261_serial.c -deleted file mode 100644 -index c262a92..0000000 ---- a/cpu/arm926ejs/at91/at91sam9261_serial.c -+++ /dev/null -@@ -1,76 +0,0 @@ --/* -- * (C) Copyright 2007-2008 -- * Stelian Pop -- * Lead Tech Design -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --#include --#include --#include --#include -- --void at91_serial0_hw_init(void) --{ -- at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */ -- at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */ -- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US0); --} -- --void at91_serial1_hw_init(void) --{ -- at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */ -- at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */ -- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US1); --} -- --void at91_serial2_hw_init(void) --{ -- at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */ -- at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */ -- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US2); --} -- --void at91_serial3_hw_init(void) --{ -- at91_set_A_periph(AT91_PIN_PA9, 0); /* DRXD */ -- at91_set_A_periph(AT91_PIN_PA10, 1); /* DTXD */ -- at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); --} -- --void at91_serial_hw_init(void) --{ --#ifdef CONFIG_USART0 -- at91_serial0_hw_init(); --#endif -- --#ifdef CONFIG_USART1 -- at91_serial1_hw_init(); --#endif -- --#ifdef CONFIG_USART2 -- at91_serial2_hw_init(); --#endif -- --#ifdef CONFIG_USART3 /* DBGU */ -- at91_serial3_hw_init(); --#endif --} -diff --git a/cpu/arm926ejs/at91/at91sam9261_spi.c b/cpu/arm926ejs/at91/at91sam9261_spi.c -deleted file mode 100644 -index 9383dc6..0000000 ---- a/cpu/arm926ejs/at91/at91sam9261_spi.c -+++ /dev/null -@@ -1,99 +0,0 @@ --/* -- * (C) Copyright 2007-2008 -- * Stelian Pop -- * Lead Tech Design -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --#include --#include --#include --#include -- --void at91_spi0_hw_init(unsigned long cs_mask) --{ -- at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ -- at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ -- at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ -- -- /* Enable clock */ -- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI0); -- -- if (cs_mask & (1 << 0)) { -- at91_set_A_periph(AT91_PIN_PA3, 1); -- } -- if (cs_mask & (1 << 1)) { -- at91_set_A_periph(AT91_PIN_PA4, 1); -- } -- if (cs_mask & (1 << 2)) { -- at91_set_A_periph(AT91_PIN_PA5, 1); -- } -- if (cs_mask & (1 << 3)) { -- at91_set_A_periph(AT91_PIN_PA6, 1); -- } -- if (cs_mask & (1 << 4)) { -- at91_set_gpio_output(AT91_PIN_PA3, 1); -- } -- if (cs_mask & (1 << 5)) { -- at91_set_gpio_output(AT91_PIN_PA4, 1); -- } -- if (cs_mask & (1 << 6)) { -- at91_set_gpio_output(AT91_PIN_PA5, 1); -- } -- if (cs_mask & (1 << 7)) { -- at91_set_gpio_output(AT91_PIN_PA6, 1); -- } --} -- --void at91_spi1_hw_init(unsigned long cs_mask) --{ -- at91_set_A_periph(AT91_PIN_PB30, 0); /* SPI1_MISO */ -- at91_set_A_periph(AT91_PIN_PB31, 0); /* SPI1_MOSI */ -- at91_set_A_periph(AT91_PIN_PB29, 0); /* SPI1_SPCK */ -- -- /* Enable clock */ -- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI1); -- -- if (cs_mask & (1 << 0)) { -- at91_set_A_periph(AT91_PIN_PB28, 1); -- } -- if (cs_mask & (1 << 1)) { -- at91_set_B_periph(AT91_PIN_PA24, 1); -- } -- if (cs_mask & (1 << 2)) { -- at91_set_B_periph(AT91_PIN_PA25, 1); -- } -- if (cs_mask & (1 << 3)) { -- at91_set_A_periph(AT91_PIN_PA26, 1); -- } -- if (cs_mask & (1 << 4)) { -- at91_set_gpio_output(AT91_PIN_PB28, 1); -- } -- if (cs_mask & (1 << 5)) { -- at91_set_gpio_output(AT91_PIN_PA24, 1); -- } -- if (cs_mask & (1 << 6)) { -- at91_set_gpio_output(AT91_PIN_PA25, 1); -- } -- if (cs_mask & (1 << 7)) { -- at91_set_gpio_output(AT91_PIN_PA26, 1); -- } --} -diff --git a/cpu/arm926ejs/at91/at91sam9263_devices.c b/cpu/arm926ejs/at91/at91sam9263_devices.c -new file mode 100644 -index 0000000..0f2613e ---- /dev/null -+++ b/cpu/arm926ejs/at91/at91sam9263_devices.c -@@ -0,0 +1,184 @@ -+/* -+ * (C) Copyright 2007-2008 -+ * Stelian Pop -+ * Lead Tech Design -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+void at91_serial0_hw_init(void) -+{ -+ at91_set_A_periph(AT91_PIN_PA26, 1); /* TXD0 */ -+ at91_set_A_periph(AT91_PIN_PA27, 0); /* RXD0 */ -+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_US0); -+} -+ -+void at91_serial1_hw_init(void) -+{ -+ at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */ -+ at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */ -+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_US1); -+} -+ -+void at91_serial2_hw_init(void) -+{ -+ at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */ -+ at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */ -+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_US2); -+} -+ -+void at91_serial3_hw_init(void) -+{ -+ at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */ -+ at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */ -+ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); -+} -+ -+void at91_serial_hw_init(void) -+{ -+#ifdef CONFIG_USART0 -+ at91_serial0_hw_init(); -+#endif -+ -+#ifdef CONFIG_USART1 -+ at91_serial1_hw_init(); -+#endif -+ -+#ifdef CONFIG_USART2 -+ at91_serial2_hw_init(); -+#endif -+ -+#ifdef CONFIG_USART3 /* DBGU */ -+ at91_serial3_hw_init(); -+#endif -+} -+ -+#ifdef CONFIG_HAS_DATAFLASH -+void at91_spi0_hw_init(unsigned long cs_mask) -+{ -+ at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ -+ at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ -+ at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ -+ -+ /* Enable clock */ -+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_SPI0); -+ -+ if (cs_mask & (1 << 0)) { -+ at91_set_B_periph(AT91_PIN_PA5, 1); -+ } -+ if (cs_mask & (1 << 1)) { -+ at91_set_B_periph(AT91_PIN_PA3, 1); -+ } -+ if (cs_mask & (1 << 2)) { -+ at91_set_B_periph(AT91_PIN_PA4, 1); -+ } -+ if (cs_mask & (1 << 3)) { -+ at91_set_B_periph(AT91_PIN_PB11, 1); -+ } -+ if (cs_mask & (1 << 4)) { -+ at91_set_gpio_output(AT91_PIN_PA5, 1); -+ } -+ if (cs_mask & (1 << 5)) { -+ at91_set_gpio_output(AT91_PIN_PA3, 1); -+ } -+ if (cs_mask & (1 << 6)) { -+ at91_set_gpio_output(AT91_PIN_PA4, 1); -+ } -+ if (cs_mask & (1 << 7)) { -+ at91_set_gpio_output(AT91_PIN_PB11, 1); -+ } -+} -+ -+void at91_spi1_hw_init(unsigned long cs_mask) -+{ -+ at91_set_A_periph(AT91_PIN_PB12, 0); /* SPI1_MISO */ -+ at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */ -+ at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */ -+ -+ /* Enable clock */ -+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_SPI1); -+ -+ if (cs_mask & (1 << 0)) { -+ at91_set_A_periph(AT91_PIN_PB15, 1); -+ } -+ if (cs_mask & (1 << 1)) { -+ at91_set_A_periph(AT91_PIN_PB16, 1); -+ } -+ if (cs_mask & (1 << 2)) { -+ at91_set_A_periph(AT91_PIN_PB17, 1); -+ } -+ if (cs_mask & (1 << 3)) { -+ at91_set_A_periph(AT91_PIN_PB18, 1); -+ } -+ if (cs_mask & (1 << 4)) { -+ at91_set_gpio_output(AT91_PIN_PB15, 1); -+ } -+ if (cs_mask & (1 << 5)) { -+ at91_set_gpio_output(AT91_PIN_PB16, 1); -+ } -+ if (cs_mask & (1 << 6)) { -+ at91_set_gpio_output(AT91_PIN_PB17, 1); -+ } -+ if (cs_mask & (1 << 7)) { -+ at91_set_gpio_output(AT91_PIN_PB18, 1); -+ } -+} -+#endif -+ -+#ifdef CONFIG_MACB -+void at91_macb_hw_init(void) -+{ -+ at91_set_A_periph(AT91_PIN_PE21, 0); /* ETXCK_EREFCK */ -+ at91_set_B_periph(AT91_PIN_PC25, 0); /* ERXDV */ -+ at91_set_A_periph(AT91_PIN_PE25, 0); /* ERX0 */ -+ at91_set_A_periph(AT91_PIN_PE26, 0); /* ERX1 */ -+ at91_set_A_periph(AT91_PIN_PE27, 0); /* ERXER */ -+ at91_set_A_periph(AT91_PIN_PE28, 0); /* ETXEN */ -+ at91_set_A_periph(AT91_PIN_PE23, 0); /* ETX0 */ -+ at91_set_A_periph(AT91_PIN_PE24, 0); /* ETX1 */ -+ at91_set_A_periph(AT91_PIN_PE30, 0); /* EMDIO */ -+ at91_set_A_periph(AT91_PIN_PE29, 0); /* EMDC */ -+ -+#ifndef CONFIG_RMII -+ at91_set_A_periph(AT91_PIN_PE22, 0); /* ECRS */ -+ at91_set_B_periph(AT91_PIN_PC26, 0); /* ECOL */ -+ at91_set_B_periph(AT91_PIN_PC22, 0); /* ERX2 */ -+ at91_set_B_periph(AT91_PIN_PC23, 0); /* ERX3 */ -+ at91_set_B_periph(AT91_PIN_PC27, 0); /* ERXCK */ -+ at91_set_B_periph(AT91_PIN_PC20, 0); /* ETX2 */ -+ at91_set_B_periph(AT91_PIN_PC21, 0); /* ETX3 */ -+ at91_set_B_periph(AT91_PIN_PC24, 0); /* ETXER */ -+#endif -+} -+#endif -+ -+#ifdef CONFIG_USB_OHCI_NEW -+void at91_uhp_hw_init(void) -+{ -+ /* Enable VBus on UHP ports */ -+ at91_set_gpio_output(AT91_PIN_PA21, 0); -+ at91_set_gpio_output(AT91_PIN_PA24, 0); -+} -+#endif -diff --git a/cpu/arm926ejs/at91/at91sam9263_macb.c b/cpu/arm926ejs/at91/at91sam9263_macb.c -deleted file mode 100644 -index 4223d37..0000000 ---- a/cpu/arm926ejs/at91/at91sam9263_macb.c -+++ /dev/null -@@ -1,54 +0,0 @@ --/* -- * (C) Copyright 2007-2008 -- * Stelian Pop -- * Lead Tech Design -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --#include --#include --#include --#include -- --void at91_macb_hw_init(void) --{ -- at91_set_A_periph(AT91_PIN_PE21, 0); /* ETXCK_EREFCK */ -- at91_set_B_periph(AT91_PIN_PC25, 0); /* ERXDV */ -- at91_set_A_periph(AT91_PIN_PE25, 0); /* ERX0 */ -- at91_set_A_periph(AT91_PIN_PE26, 0); /* ERX1 */ -- at91_set_A_periph(AT91_PIN_PE27, 0); /* ERXER */ -- at91_set_A_periph(AT91_PIN_PE28, 0); /* ETXEN */ -- at91_set_A_periph(AT91_PIN_PE23, 0); /* ETX0 */ -- at91_set_A_periph(AT91_PIN_PE24, 0); /* ETX1 */ -- at91_set_A_periph(AT91_PIN_PE30, 0); /* EMDIO */ -- at91_set_A_periph(AT91_PIN_PE29, 0); /* EMDC */ -- --#ifndef CONFIG_RMII -- at91_set_A_periph(AT91_PIN_PE22, 0); /* ECRS */ -- at91_set_B_periph(AT91_PIN_PC26, 0); /* ECOL */ -- at91_set_B_periph(AT91_PIN_PC22, 0); /* ERX2 */ -- at91_set_B_periph(AT91_PIN_PC23, 0); /* ERX3 */ -- at91_set_B_periph(AT91_PIN_PC27, 0); /* ERXCK */ -- at91_set_B_periph(AT91_PIN_PC20, 0); /* ETX2 */ -- at91_set_B_periph(AT91_PIN_PC21, 0); /* ETX3 */ -- at91_set_B_periph(AT91_PIN_PC24, 0); /* ETXER */ --#endif --} -diff --git a/cpu/arm926ejs/at91/at91sam9263_serial.c b/cpu/arm926ejs/at91/at91sam9263_serial.c -deleted file mode 100644 -index 1076195..0000000 ---- a/cpu/arm926ejs/at91/at91sam9263_serial.c -+++ /dev/null -@@ -1,76 +0,0 @@ --/* -- * (C) Copyright 2007-2008 -- * Stelian Pop -- * Lead Tech Design -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --#include --#include --#include --#include -- --void at91_serial0_hw_init(void) --{ -- at91_set_A_periph(AT91_PIN_PA26, 1); /* TXD0 */ -- at91_set_A_periph(AT91_PIN_PA27, 0); /* RXD0 */ -- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_US0); --} -- --void at91_serial1_hw_init(void) --{ -- at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */ -- at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */ -- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_US1); --} -- --void at91_serial2_hw_init(void) --{ -- at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */ -- at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */ -- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_US2); --} -- --void at91_serial3_hw_init(void) --{ -- at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */ -- at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */ -- at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); --} -- --void at91_serial_hw_init(void) --{ --#ifdef CONFIG_USART0 -- at91_serial0_hw_init(); --#endif -- --#ifdef CONFIG_USART1 -- at91_serial1_hw_init(); --#endif -- --#ifdef CONFIG_USART2 -- at91_serial2_hw_init(); --#endif -- --#ifdef CONFIG_USART3 /* DBGU */ -- at91_serial3_hw_init(); --#endif --} -diff --git a/cpu/arm926ejs/at91/at91sam9263_spi.c b/cpu/arm926ejs/at91/at91sam9263_spi.c -deleted file mode 100644 -index e52dd61..0000000 ---- a/cpu/arm926ejs/at91/at91sam9263_spi.c -+++ /dev/null -@@ -1,99 +0,0 @@ --/* -- * (C) Copyright 2007-2008 -- * Stelian Pop -- * Lead Tech Design -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --#include --#include --#include --#include -- --void at91_spi0_hw_init(unsigned long cs_mask) --{ -- at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ -- at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ -- at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ -- -- /* Enable clock */ -- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_SPI0); -- -- if (cs_mask & (1 << 0)) { -- at91_set_B_periph(AT91_PIN_PA5, 1); -- } -- if (cs_mask & (1 << 1)) { -- at91_set_B_periph(AT91_PIN_PA3, 1); -- } -- if (cs_mask & (1 << 2)) { -- at91_set_B_periph(AT91_PIN_PA4, 1); -- } -- if (cs_mask & (1 << 3)) { -- at91_set_B_periph(AT91_PIN_PB11, 1); -- } -- if (cs_mask & (1 << 4)) { -- at91_set_gpio_output(AT91_PIN_PA5, 1); -- } -- if (cs_mask & (1 << 5)) { -- at91_set_gpio_output(AT91_PIN_PA3, 1); -- } -- if (cs_mask & (1 << 6)) { -- at91_set_gpio_output(AT91_PIN_PA4, 1); -- } -- if (cs_mask & (1 << 7)) { -- at91_set_gpio_output(AT91_PIN_PB11, 1); -- } --} -- --void at91_spi1_hw_init(unsigned long cs_mask) --{ -- at91_set_A_periph(AT91_PIN_PB12, 0); /* SPI1_MISO */ -- at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */ -- at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */ -- -- /* Enable clock */ -- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_SPI1); -- -- if (cs_mask & (1 << 0)) { -- at91_set_A_periph(AT91_PIN_PB15, 1); -- } -- if (cs_mask & (1 << 1)) { -- at91_set_A_periph(AT91_PIN_PB16, 1); -- } -- if (cs_mask & (1 << 2)) { -- at91_set_A_periph(AT91_PIN_PB17, 1); -- } -- if (cs_mask & (1 << 3)) { -- at91_set_A_periph(AT91_PIN_PB18, 1); -- } -- if (cs_mask & (1 << 4)) { -- at91_set_gpio_output(AT91_PIN_PB15, 1); -- } -- if (cs_mask & (1 << 5)) { -- at91_set_gpio_output(AT91_PIN_PB16, 1); -- } -- if (cs_mask & (1 << 6)) { -- at91_set_gpio_output(AT91_PIN_PB17, 1); -- } -- if (cs_mask & (1 << 7)) { -- at91_set_gpio_output(AT91_PIN_PB18, 1); -- } --} -diff --git a/cpu/arm926ejs/at91/at91sam9263_usb.c b/cpu/arm926ejs/at91/at91sam9263_usb.c -deleted file mode 100644 -index ff5593b..0000000 ---- a/cpu/arm926ejs/at91/at91sam9263_usb.c -+++ /dev/null -@@ -1,35 +0,0 @@ --/* -- * (C) Copyright 2007-2008 -- * Stelian Pop -- * Lead Tech Design -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --#include --#include --#include -- --void at91_uhp_hw_init(void) --{ -- /* Enable VBus on UHP ports */ -- at91_set_gpio_output(AT91_PIN_PA21, 0); -- at91_set_gpio_output(AT91_PIN_PA24, 0); --} -diff --git a/cpu/arm926ejs/at91/at91sam9rl_devices.c b/cpu/arm926ejs/at91/at91sam9rl_devices.c -new file mode 100644 -index 0000000..ebed193 ---- /dev/null -+++ b/cpu/arm926ejs/at91/at91sam9rl_devices.c -@@ -0,0 +1,113 @@ -+/* -+ * (C) Copyright 2007-2008 -+ * Stelian Pop -+ * Lead Tech Design -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+void at91_serial0_hw_init(void) -+{ -+ at91_set_A_periph(AT91_PIN_PA6, 1); /* TXD0 */ -+ at91_set_A_periph(AT91_PIN_PA7, 0); /* RXD0 */ -+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US0); -+} -+ -+void at91_serial1_hw_init(void) -+{ -+ at91_set_A_periph(AT91_PIN_PA11, 1); /* TXD1 */ -+ at91_set_A_periph(AT91_PIN_PA12, 0); /* RXD1 */ -+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US1); -+} -+ -+void at91_serial2_hw_init(void) -+{ -+ at91_set_A_periph(AT91_PIN_PA13, 1); /* TXD2 */ -+ at91_set_A_periph(AT91_PIN_PA14, 0); /* RXD2 */ -+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US2); -+} -+ -+void at91_serial3_hw_init(void) -+{ -+ at91_set_A_periph(AT91_PIN_PA21, 0); /* DRXD */ -+ at91_set_A_periph(AT91_PIN_PA22, 1); /* DTXD */ -+ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); -+} -+ -+void at91_serial_hw_init(void) -+{ -+#ifdef CONFIG_USART0 -+ at91_serial0_hw_init(); -+#endif -+ -+#ifdef CONFIG_USART1 -+ at91_serial1_hw_init(); -+#endif -+ -+#ifdef CONFIG_USART2 -+ at91_serial2_hw_init(); -+#endif -+ -+#ifdef CONFIG_USART3 /* DBGU */ -+ at91_serial3_hw_init(); -+#endif -+} -+ -+#ifdef CONFIG_HAS_DATAFLASH -+void at91_spi0_hw_init(unsigned long cs_mask) -+{ -+ at91_set_A_periph(AT91_PIN_PA25, 0); /* SPI0_MISO */ -+ at91_set_A_periph(AT91_PIN_PA26, 0); /* SPI0_MOSI */ -+ at91_set_A_periph(AT91_PIN_PA27, 0); /* SPI0_SPCK */ -+ -+ /* Enable clock */ -+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_SPI); -+ -+ if (cs_mask & (1 << 0)) { -+ at91_set_A_periph(AT91_PIN_PA28, 1); -+ } -+ if (cs_mask & (1 << 1)) { -+ at91_set_B_periph(AT91_PIN_PB7, 1); -+ } -+ if (cs_mask & (1 << 2)) { -+ at91_set_A_periph(AT91_PIN_PD8, 1); -+ } -+ if (cs_mask & (1 << 3)) { -+ at91_set_B_periph(AT91_PIN_PD9, 1); -+ } -+ if (cs_mask & (1 << 4)) { -+ at91_set_gpio_output(AT91_PIN_PA28, 1); -+ } -+ if (cs_mask & (1 << 5)) { -+ at91_set_gpio_output(AT91_PIN_PB7, 1); -+ } -+ if (cs_mask & (1 << 6)) { -+ at91_set_gpio_output(AT91_PIN_PD8, 1); -+ } -+ if (cs_mask & (1 << 7)) { -+ at91_set_gpio_output(AT91_PIN_PD9, 1); -+ } -+} -+#endif -diff --git a/cpu/arm926ejs/at91/at91sam9rl_serial.c b/cpu/arm926ejs/at91/at91sam9rl_serial.c -deleted file mode 100644 -index 99ce418..0000000 ---- a/cpu/arm926ejs/at91/at91sam9rl_serial.c -+++ /dev/null -@@ -1,76 +0,0 @@ --/* -- * (C) Copyright 2007-2008 -- * Stelian Pop -- * Lead Tech Design -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --#include --#include --#include --#include -- --void at91_serial0_hw_init(void) --{ -- at91_set_A_periph(AT91_PIN_PA6, 1); /* TXD0 */ -- at91_set_A_periph(AT91_PIN_PA7, 0); /* RXD0 */ -- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US0); --} -- --void at91_serial1_hw_init(void) --{ -- at91_set_A_periph(AT91_PIN_PA11, 1); /* TXD1 */ -- at91_set_A_periph(AT91_PIN_PA12, 0); /* RXD1 */ -- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US1); --} -- --void at91_serial2_hw_init(void) --{ -- at91_set_A_periph(AT91_PIN_PA13, 1); /* TXD2 */ -- at91_set_A_periph(AT91_PIN_PA14, 0); /* RXD2 */ -- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US2); --} -- --void at91_serial3_hw_init(void) --{ -- at91_set_A_periph(AT91_PIN_PA21, 0); /* DRXD */ -- at91_set_A_periph(AT91_PIN_PA22, 1); /* DTXD */ -- at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); --} -- --void at91_serial_hw_init(void) --{ --#ifdef CONFIG_USART0 -- at91_serial0_hw_init(); --#endif -- --#ifdef CONFIG_USART1 -- at91_serial1_hw_init(); --#endif -- --#ifdef CONFIG_USART2 -- at91_serial2_hw_init(); --#endif -- --#ifdef CONFIG_USART3 /* DBGU */ -- at91_serial3_hw_init(); --#endif --} -diff --git a/cpu/arm926ejs/at91/at91sam9rl_spi.c b/cpu/arm926ejs/at91/at91sam9rl_spi.c -deleted file mode 100644 -index 389d6d8..0000000 ---- a/cpu/arm926ejs/at91/at91sam9rl_spi.c -+++ /dev/null -@@ -1,64 +0,0 @@ --/* -- * (C) Copyright 2007-2008 -- * Stelian Pop -- * Lead Tech Design -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --#include --#include --#include --#include -- --void at91_spi0_hw_init(unsigned long cs_mask) --{ -- at91_set_A_periph(AT91_PIN_PA25, 0); /* SPI0_MISO */ -- at91_set_A_periph(AT91_PIN_PA26, 0); /* SPI0_MOSI */ -- at91_set_A_periph(AT91_PIN_PA27, 0); /* SPI0_SPCK */ -- -- /* Enable clock */ -- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_SPI); -- -- if (cs_mask & (1 << 0)) { -- at91_set_A_periph(AT91_PIN_PA28, 1); -- } -- if (cs_mask & (1 << 1)) { -- at91_set_B_periph(AT91_PIN_PB7, 1); -- } -- if (cs_mask & (1 << 2)) { -- at91_set_A_periph(AT91_PIN_PD8, 1); -- } -- if (cs_mask & (1 << 3)) { -- at91_set_B_periph(AT91_PIN_PD9, 1); -- } -- if (cs_mask & (1 << 4)) { -- at91_set_gpio_output(AT91_PIN_PA28, 1); -- } -- if (cs_mask & (1 << 5)) { -- at91_set_gpio_output(AT91_PIN_PB7, 1); -- } -- if (cs_mask & (1 << 6)) { -- at91_set_gpio_output(AT91_PIN_PD8, 1); -- } -- if (cs_mask & (1 << 7)) { -- at91_set_gpio_output(AT91_PIN_PD9, 1); -- } --} -diff --git a/cpu/arm926ejs/at91/config.mk b/cpu/arm926ejs/at91/config.mk -index 06177e6..19296fd 100644 ---- a/cpu/arm926ejs/at91/config.mk -+++ b/cpu/arm926ejs/at91/config.mk -@@ -1,2 +1 @@ - PLATFORM_CPPFLAGS += $(call cc-option,-mtune=arm926ejs,) --LDSCRIPT := $(SRCTREE)/cpu/arm926ejs/at91/u-boot.lds -diff --git a/cpu/arm926ejs/at91/cpu.c b/cpu/arm926ejs/at91/cpu.c -index 2ae97fe..f2f7b62 100644 ---- a/cpu/arm926ejs/at91/cpu.c -+++ b/cpu/arm926ejs/at91/cpu.c -@@ -21,17 +21,34 @@ - * MA 02111-1307 USA - */ - --#include -+#include - #include - #include - #include - #include - -+#ifndef AT91_MAIN_CLOCK -+#define AT91_MAIN_CLOCK 0 -+#endif -+ - int arch_cpu_init(void) - { --#ifdef AT91_MAIN_CLOCK - return at91_clock_init(AT91_MAIN_CLOCK); --#else -- return at91_clock_init(0); --#endif - } -+ -+#if defined(CONFIG_DISPLAY_CPUINFO) -+int print_cpuinfo(void) -+{ -+ char buf[32]; -+ -+ printf("CPU: %s\n", AT91_CPU_NAME); -+ printf("Crystal frequency: %8s MHz\n", -+ strmhz(buf, get_main_clk_rate())); -+ printf("CPU clock : %8s MHz\n", -+ strmhz(buf, get_cpu_clk_rate())); -+ printf("Master clock : %8s MHz\n", -+ strmhz(buf, get_mck_clk_rate())); -+ -+ return 0; -+} -+#endif -diff --git a/cpu/arm926ejs/at91/reset.c b/cpu/arm926ejs/at91/reset.c -new file mode 100644 -index 0000000..f963e14 ---- /dev/null -+++ b/cpu/arm926ejs/at91/reset.c -@@ -0,0 +1,42 @@ -+/* -+ * (C) Copyright 2007-2008 -+ * Stelian Pop -+ * Lead Tech Design -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+#include -+#include -+#include -+ -+/* -+ * Reset the cpu by setting up the watchdog timer and let him time out. -+ */ -+void reset_cpu(ulong ignored) -+{ -+ /* this is the way Linux does it */ -+ at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | -+ AT91_RSTC_PROCRST | -+ AT91_RSTC_PERRST); -+ -+ while (1); -+ /* Never reached */ -+} -diff --git a/cpu/arm926ejs/at91/timer.c b/cpu/arm926ejs/at91/timer.c -index c84cb5e..811bb3c 100644 ---- a/cpu/arm926ejs/at91/timer.c -+++ b/cpu/arm926ejs/at91/timer.c -@@ -26,7 +26,6 @@ - #include - #include - #include --#include - #include - #include - #include -@@ -139,17 +138,3 @@ ulong get_tbclk(void) - tbclk = CONFIG_SYS_HZ; - return tbclk; - } -- --/* -- * Reset the cpu by setting up the watchdog timer and let him time out. -- */ --void reset_cpu(ulong ignored) --{ -- /* this is the way Linux does it */ -- at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | -- AT91_RSTC_PROCRST | -- AT91_RSTC_PERRST); -- -- while (1); -- /* Never reached */ --} -diff --git a/cpu/arm926ejs/at91/u-boot.lds b/cpu/arm926ejs/at91/u-boot.lds -deleted file mode 100644 -index 8518a1d..0000000 ---- a/cpu/arm926ejs/at91/u-boot.lds -+++ /dev/null -@@ -1,57 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") --/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/ --OUTPUT_ARCH(arm) --ENTRY(_start) --SECTIONS --{ -- . = 0x00000000; -- -- . = ALIGN(4); -- .text : -- { -- cpu/arm926ejs/start.o (.text) -- *(.text) -- } -- -- . = ALIGN(4); -- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -- -- . = ALIGN(4); -- .data : { *(.data) } -- -- . = ALIGN(4); -- .got : { *(.got) } -- -- . = .; -- __u_boot_cmd_start = .; -- .u_boot_cmd : { *(.u_boot_cmd) } -- __u_boot_cmd_end = .; -- -- . = ALIGN(4); -- __bss_start = .; -- .bss : { *(.bss) . = ALIGN(4); } -- _end = .; --} -diff --git a/cpu/arm926ejs/cpu.c b/cpu/arm926ejs/cpu.c -index 518c5e0..5c902df 100644 ---- a/cpu/arm926ejs/cpu.c -+++ b/cpu/arm926ejs/cpu.c -@@ -31,27 +31,10 @@ - - #include - #include --#include - #include - --#ifdef CONFIG_USE_IRQ --DECLARE_GLOBAL_DATA_PTR; --#endif -- - static void cache_flush(void); - --int cpu_init (void) --{ -- /* -- * setup up stacks if necessary -- */ --#ifdef CONFIG_USE_IRQ -- IRQ_STACK_START = _armboot_start - CONFIG_SYS_MALLOC_LEN - CONFIG_SYS_GBL_DATA_SIZE - 4; -- FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ; --#endif -- return 0; --} -- - int cleanup_before_linux (void) - { - /* -diff --git a/cpu/arm926ejs/davinci/Makefile b/cpu/arm926ejs/davinci/Makefile -index ed24e65..6eaa89c 100644 ---- a/cpu/arm926ejs/davinci/Makefile -+++ b/cpu/arm926ejs/davinci/Makefile -@@ -27,11 +27,19 @@ include $(TOPDIR)/config.mk - - LIB = $(obj)lib$(SOC).a - --COBJS = timer.o ether.o lxt972.o dp83848.o --SOBJS = lowlevel_init.o reset.o -+COBJS-y += cpu.o timer.o psc.o -+COBJS-$(CONFIG_SOC_DM355) += dm355.o -+COBJS-$(CONFIG_SOC_DM644X) += dm644x.o -+COBJS-$(CONFIG_DRIVER_TI_EMAC) += ether.o lxt972.o dp83848.o - --SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) --OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) -+SOBJS = reset.o -+ -+ifndef CONFIG_SKIP_LOWLEVEL_INIT -+SOBJS += lowlevel_init.o -+endif -+ -+SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS-y:.o=.c) -+OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS)) - START := $(addprefix $(obj),$(START)) - - all: $(obj).depend $(LIB) -diff --git a/cpu/arm926ejs/davinci/config.mk b/cpu/arm926ejs/davinci/config.mk -new file mode 100644 -index 0000000..a57d03a ---- /dev/null -+++ b/cpu/arm926ejs/davinci/config.mk -@@ -0,0 +1,35 @@ -+# -+# (C) Copyright 2002 -+# Gary Jennejohn, DENX Software Engineering, -+# -+# See file CREDITS for list of people who contributed to this -+# project. -+# -+# This program is free software; you can redistribute it and/or -+# modify it under the terms of the GNU General Public License as -+# published by the Free Software Foundation; either version 2 of -+# the License, or (at your option) any later version. -+# -+# This program is distributed in the hope that it will be useful, -+# but WITHOUT ANY WARRANTY; without even the implied warranty of -+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+# GNU General Public License for more details. -+# -+# You should have received a copy of the GNU General Public License -+# along with this program; if not, write to the Free Software -+# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+# MA 02111-1307 USA -+# -+ -+PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -ffixed-r8 \ -+ -msoft-float -+ -+PLATFORM_CPPFLAGS += -march=armv5te -+# ========================================================================= -+# -+# Supply options according to compiler version -+# -+# ========================================================================= -+PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) -+PLATFORM_CPPFLAGS +=$(call cc-option,-mno-thumb-interwork,) -+PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -diff --git a/cpu/arm926ejs/davinci/cpu.c b/cpu/arm926ejs/davinci/cpu.c -new file mode 100644 -index 0000000..29aead6 ---- /dev/null -+++ b/cpu/arm926ejs/davinci/cpu.c -@@ -0,0 +1,131 @@ -+/* -+ * Copyright (C) 2004 Texas Instruments. -+ * Copyright (C) 2009 David Brownell -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -+ */ -+ -+#include -+#include -+ -+ -+/* offsets from PLL controller base */ -+#define PLLC_PLLCTL 0x100 -+#define PLLC_PLLM 0x110 -+#define PLLC_PREDIV 0x114 -+#define PLLC_PLLDIV1 0x118 -+#define PLLC_PLLDIV2 0x11c -+#define PLLC_PLLDIV3 0x120 -+#define PLLC_POSTDIV 0x128 -+#define PLLC_BPDIV 0x12c -+#define PLLC_PLLDIV4 0x160 -+#define PLLC_PLLDIV5 0x164 -+#define PLLC_PLLDIV6 0x168 -+#define PLLC_PLLDIV8 0x170 -+#define PLLC_PLLDIV9 0x174 -+ -+#define BIT(x) (1 << (x)) -+ -+/* SOC-specific pll info */ -+#ifdef CONFIG_SOC_DM355 -+#define ARM_PLLDIV PLLC_PLLDIV1 -+#define DDR_PLLDIV PLLC_PLLDIV1 -+#endif -+ -+#ifdef CONFIG_SOC_DM644X -+#define ARM_PLLDIV PLLC_PLLDIV2 -+#define DSP_PLLDIV PLLC_PLLDIV1 -+#define DDR_PLLDIV PLLC_PLLDIV2 -+#endif -+ -+#ifdef CONFIG_SOC_DM6447 -+#define ARM_PLLDIV PLLC_PLLDIV2 -+#define DSP_PLLDIV PLLC_PLLDIV1 -+#define DDR_PLLDIV PLLC_PLLDIV1 -+#endif -+ -+ -+#ifdef CONFIG_DISPLAY_CPUINFO -+ -+static unsigned pll_div(volatile void *pllbase, unsigned offset) -+{ -+ u32 div; -+ -+ div = REG(pllbase + offset); -+ return (div & BIT(15)) ? (1 + (div & 0x1f)) : 1; -+} -+ -+static inline unsigned pll_prediv(volatile void *pllbase) -+{ -+#ifdef CONFIG_SOC_DM355 -+ /* this register read seems to fail on pll0 */ -+ if (pllbase == (volatile void *)DAVINCI_PLL_CNTRL0_BASE) -+ return 8; -+ else -+ return pll_div(pllbase, PLLC_PREDIV); -+#endif -+ return 1; -+} -+ -+static inline unsigned pll_postdiv(volatile void *pllbase) -+{ -+#ifdef CONFIG_SOC_DM355 -+ return pll_div(pllbase, PLLC_POSTDIV); -+#elif defined(CONFIG_SOC_DM6446) -+ if (pllbase == (volatile void *)DAVINCI_PLL_CNTRL0_BASE) -+ return pll_div(pllbase, PLLC_POSTDIV); -+#endif -+ return 1; -+} -+ -+static unsigned pll_sysclk_mhz(unsigned pll_addr, unsigned div) -+{ -+ volatile void *pllbase = (volatile void *) pll_addr; -+ unsigned base = CONFIG_SYS_HZ_CLOCK / 1000; -+ -+ /* the PLL might be bypassed */ -+ if (REG(pllbase + PLLC_PLLCTL) & BIT(0)) { -+ base /= pll_prediv(pllbase); -+ base *= 1 + (REG(pllbase + PLLC_PLLM) & 0x0ff); -+ base /= pll_postdiv(pllbase); -+ } -+ return DIV_ROUND_UP(base, 1000 * pll_div(pllbase, div)); -+} -+ -+int print_cpuinfo(void) -+{ -+ /* REVISIT fetch and display CPU ID and revision information -+ * too ... that will matter as more revisions appear. -+ */ -+ printf("Cores: ARM %d MHz", -+ pll_sysclk_mhz(DAVINCI_PLL_CNTRL0_BASE, ARM_PLLDIV)); -+ -+#ifdef DSP_PLLDIV -+ printf(", DSP %d MHz", -+ pll_sysclk_mhz(DAVINCI_PLL_CNTRL0_BASE, DSP_PLLDIV)); -+#endif -+ -+ printf("\nDDR: %d MHz\n", -+ /* DDR PHY uses an x2 input clock */ -+ pll_sysclk_mhz(DAVINCI_PLL_CNTRL1_BASE, DDR_PLLDIV) -+ / 2); -+ return 0; -+} -+ -+#endif -+ -diff --git a/cpu/arm926ejs/davinci/dm355.c b/cpu/arm926ejs/davinci/dm355.c -new file mode 100644 -index 0000000..bc45b67 ---- /dev/null -+++ b/cpu/arm926ejs/davinci/dm355.c -@@ -0,0 +1,45 @@ -+/* -+ * SoC-specific code for tms320dm355 and similar chips -+ * -+ * Copyright (C) 2009 David Brownell -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -+ */ -+ -+#include -+#include -+ -+ -+void davinci_enable_uart0(void) -+{ -+ lpsc_on(DAVINCI_LPSC_UART0); -+ -+ /* Bringup UART0 out of reset */ -+ REG(UART0_PWREMU_MGMT) = 0x00006001; -+} -+ -+ -+#ifdef CONFIG_DRIVER_DAVINCI_I2C -+void davinci_enable_i2c(void) -+{ -+ lpsc_on(DAVINCI_LPSC_I2C); -+ -+ /* Enable I2C pin Mux */ -+ REG(PINMUX3) |= (1 << 20) | (1 << 19); -+} -+#endif -diff --git a/cpu/arm926ejs/davinci/dm644x.c b/cpu/arm926ejs/davinci/dm644x.c -new file mode 100644 -index 0000000..bb105b5 ---- /dev/null -+++ b/cpu/arm926ejs/davinci/dm644x.c -@@ -0,0 +1,96 @@ -+/* -+ * SoC-specific code for tms320dm644x chips -+ * -+ * Copyright (C) 2007 Sergey Kubushyn -+ * Copyright (C) 2008 Lyrtech -+ * Copyright (C) 2004 Texas Instruments. -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -+ */ -+ -+#include -+#include -+ -+ -+#define PINMUX0_EMACEN (1 << 31) -+#define PINMUX0_AECS5 (1 << 11) -+#define PINMUX0_AECS4 (1 << 10) -+ -+#define PINMUX1_I2C (1 << 7) -+#define PINMUX1_UART1 (1 << 1) -+#define PINMUX1_UART0 (1 << 0) -+ -+ -+void davinci_enable_uart0(void) -+{ -+ lpsc_on(DAVINCI_LPSC_UART0); -+ -+ /* Bringup UART0 out of reset */ -+ REG(UART0_PWREMU_MGMT) = 0x00006001; -+ -+ /* Enable UART0 MUX lines */ -+ REG(PINMUX1) |= PINMUX1_UART0; -+} -+ -+#ifdef CONFIG_DRIVER_TI_EMAC -+void davinci_enable_emac(void) -+{ -+ lpsc_on(DAVINCI_LPSC_EMAC); -+ lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER); -+ lpsc_on(DAVINCI_LPSC_MDIO); -+ -+ /* Enable GIO3.3V cells used for EMAC */ -+ REG(VDD3P3V_PWDN) = 0; -+ -+ /* Enable EMAC. */ -+ REG(PINMUX0) |= PINMUX0_EMACEN; -+} -+#endif -+ -+#ifdef CONFIG_DRIVER_DAVINCI_I2C -+void davinci_enable_i2c(void) -+{ -+ lpsc_on(DAVINCI_LPSC_I2C); -+ -+ /* Enable I2C pin Mux */ -+ REG(PINMUX1) |= PINMUX1_I2C; -+} -+#endif -+ -+void davinci_errata_workarounds(void) -+{ -+ /* -+ * Workaround for TMS320DM6446 errata 1.3.22: -+ * PSC: PTSTAT Register Does Not Clear After Warm/Maximum Reset -+ * Revision(s) Affected: 1.3 and earlier -+ */ -+ REG(PSC_SILVER_BULLET) = 0; -+ -+ /* -+ * Set the PR_OLD_COUNT bits in the Bus Burst Priority Register (PBBPR) -+ * as suggested in TMS320DM6446 errata 2.1.2: -+ * -+ * On DM6446 Silicon Revision 2.1 and earlier, under certain conditions -+ * low priority modules can occupy the bus and prevent high priority -+ * modules like the VPSS from getting the required DDR2 throughput. -+ * A hex value of 0x20 should provide a good ARM (cache enabled) -+ * performance and still allow good utilization by the VPSS or other -+ * modules. -+ */ -+ REG(VBPR) = 0x20; -+} -diff --git a/cpu/arm926ejs/davinci/psc.c b/cpu/arm926ejs/davinci/psc.c -new file mode 100644 -index 0000000..5bb972f ---- /dev/null -+++ b/cpu/arm926ejs/davinci/psc.c -@@ -0,0 +1,135 @@ -+/* -+ * Power and Sleep Controller (PSC) functions. -+ * -+ * Copyright (C) 2007 Sergey Kubushyn -+ * Copyright (C) 2008 Lyrtech -+ * Copyright (C) 2004 Texas Instruments. -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -+ */ -+ -+#include -+#include -+ -+/* -+ * The PSC manages three inputs to a "module" which may be a peripheral or -+ * CPU. Those inputs are the module's: clock; reset signal; and sometimes -+ * its power domain. For our purposes, we only care whether clock and power -+ * are active, and the module is out of reset. -+ * -+ * DaVinci chips may include two separate power domains: "Always On" and "DSP". -+ * Chips without a DSP generally have only one domain. -+ * -+ * The "Always On" power domain is always on when the chip is on, and is -+ * powered by the VDD pins (on DM644X). The majority of DaVinci modules -+ * lie within the "Always On" power domain. -+ * -+ * A separate domain called the "DSP" domain houses the C64x+ and other video -+ * hardware such as VICP. In some chips, the "DSP" domain is not always on. -+ * The "DSP" power domain is powered by the CVDDDSP pins (on DM644X). -+ */ -+ -+/* Works on Always On power domain only (no PD argument) */ -+void lpsc_on(unsigned int id) -+{ -+ dv_reg_p mdstat, mdctl; -+ -+ if (id >= DAVINCI_LPSC_GEM) -+ return; /* Don't work on DSP Power Domain */ -+ -+ mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4)); -+ mdctl = REG_P(PSC_MDCTL_BASE + (id * 4)); -+ -+ while (REG(PSC_PTSTAT) & 0x01) -+ continue; -+ -+ if ((*mdstat & 0x1f) == 0x03) -+ return; /* Already on and enabled */ -+ -+ *mdctl |= 0x03; -+ -+ switch (id) { -+#ifdef CONFIG_SOC_DM644X -+ /* Special treatment for some modules as for sprue14 p.7.4.2 */ -+ case DAVINCI_LPSC_VPSSSLV: -+ case DAVINCI_LPSC_EMAC: -+ case DAVINCI_LPSC_EMAC_WRAPPER: -+ case DAVINCI_LPSC_MDIO: -+ case DAVINCI_LPSC_USB: -+ case DAVINCI_LPSC_ATA: -+ case DAVINCI_LPSC_VLYNQ: -+ case DAVINCI_LPSC_UHPI: -+ case DAVINCI_LPSC_DDR_EMIF: -+ case DAVINCI_LPSC_AEMIF: -+ case DAVINCI_LPSC_MMC_SD: -+ case DAVINCI_LPSC_MEMSTICK: -+ case DAVINCI_LPSC_McBSP: -+ case DAVINCI_LPSC_GPIO: -+ *mdctl |= 0x200; -+ break; -+#endif -+ } -+ -+ REG(PSC_PTCMD) = 0x01; -+ -+ while (REG(PSC_PTSTAT) & 0x03) -+ continue; -+ while ((*mdstat & 0x1f) != 0x03) /* Probably an overkill... */ -+ continue; -+} -+ -+/* Not all DaVinci chips have a DSP power domain. */ -+#ifdef CONFIG_SOC_DM644X -+ -+/* If DSPLINK is used, we don't want U-Boot to power on the DSP. */ -+#if !defined(CONFIG_SYS_USE_DSPLINK) -+void dsp_on(void) -+{ -+ int i; -+ -+ if (REG(PSC_PDSTAT1) & 0x1f) -+ return; /* Already on */ -+ -+ REG(PSC_GBLCTL) |= 0x01; -+ REG(PSC_PDCTL1) |= 0x01; -+ REG(PSC_PDCTL1) &= ~0x100; -+ REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03; -+ REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff; -+ REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03; -+ REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff; -+ REG(PSC_PTCMD) = 0x02; -+ -+ for (i = 0; i < 100; i++) { -+ if (REG(PSC_EPCPR) & 0x02) -+ break; -+ } -+ -+ REG(PSC_CHP_SHRTSW) = 0x01; -+ REG(PSC_PDCTL1) |= 0x100; -+ REG(PSC_EPCCR) = 0x02; -+ -+ for (i = 0; i < 100; i++) { -+ if (!(REG(PSC_PTSTAT) & 0x02)) -+ break; -+ } -+ -+ REG(PSC_GBLCTL) &= ~0x1f; -+} -+#endif /* CONFIG_SYS_USE_DSPLINK */ -+ -+#endif /* have a DSP */ -diff --git a/cpu/arm926ejs/davinci/reset.S b/cpu/arm926ejs/davinci/reset.S -index a687d44..ba0a7c3 100644 ---- a/cpu/arm926ejs/davinci/reset.S -+++ b/cpu/arm926ejs/davinci/reset.S -@@ -50,6 +50,10 @@ reset_cpu: - str r1, [r0] - ldr r1, WDTCR_VAL2 - str r1, [r0] -+ /* Write an invalid value to the WDKEY field to trigger -+ * an immediate watchdog reset */ -+ mov r1, $0x4000 -+ str r1, [r0] - nop - nop - nop -diff --git a/cpu/arm926ejs/davinci/timer.c b/cpu/arm926ejs/davinci/timer.c -index 2604d57..80751ad 100644 ---- a/cpu/arm926ejs/davinci/timer.c -+++ b/cpu/arm926ejs/davinci/timer.c -@@ -38,7 +38,6 @@ - */ - - #include --#include - - typedef volatile struct { - u_int32_t pid12; -diff --git a/cpu/arm926ejs/interrupts.c b/cpu/arm926ejs/interrupts.c -deleted file mode 100644 -index ce979f3..0000000 ---- a/cpu/arm926ejs/interrupts.c -+++ /dev/null -@@ -1,57 +0,0 @@ --/* -- * (C) Copyright 2003 -- * Texas Instruments -- * -- * (C) Copyright 2002 -- * Sysgo Real-Time Solutions, GmbH -- * Marius Groeger -- * -- * (C) Copyright 2002 -- * Sysgo Real-Time Solutions, GmbH -- * Alex Zuepke -- * -- * (C) Copyright 2002-2004 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * (C) Copyright 2004 -- * Philippe Robin, ARM Ltd. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --#include -- --#ifdef CONFIG_INTEGRATOR -- -- /* Timer functionality supplied by Integrator board (AP or CP) */ -- --#else -- --/* nothing really to do with interrupts, just starts up a counter. */ --int interrupt_init (void) --{ -- extern void timer_init(void); -- -- timer_init(); -- -- return 0; --} -- --#endif /* CONFIG_INTEGRATOR */ -diff --git a/cpu/arm926ejs/nomadik/timer.c b/cpu/arm926ejs/nomadik/timer.c -index 960cf52..2870d24 100644 ---- a/cpu/arm926ejs/nomadik/timer.c -+++ b/cpu/arm926ejs/nomadik/timer.c -@@ -37,7 +37,6 @@ - - #include - #include --#include - - #define TIMER_LOAD_VAL 0xffffffff - -diff --git a/cpu/arm926ejs/omap/cpuinfo.c b/cpu/arm926ejs/omap/cpuinfo.c -index 35ba7db..0052dab 100644 ---- a/cpu/arm926ejs/omap/cpuinfo.c -+++ b/cpu/arm926ejs/omap/cpuinfo.c -@@ -11,7 +11,6 @@ - - #include - #include --#include - - #if defined(CONFIG_DISPLAY_CPUINFO) && defined(CONFIG_OMAP) - -diff --git a/cpu/arm926ejs/omap/timer.c b/cpu/arm926ejs/omap/timer.c -index 97f9771..392b158 100644 ---- a/cpu/arm926ejs/omap/timer.c -+++ b/cpu/arm926ejs/omap/timer.c -@@ -36,7 +36,6 @@ - */ - - #include --#include - - #define TIMER_LOAD_VAL 0xffffffff - -diff --git a/cpu/arm926ejs/u-boot.lds b/cpu/arm926ejs/u-boot.lds -new file mode 100644 -index 0000000..ee5eeb5 ---- /dev/null -+++ b/cpu/arm926ejs/u-boot.lds -@@ -0,0 +1,56 @@ -+/* -+ * (C) Copyright 2002-2004 -+ * Gary Jennejohn, DENX Software Engineering, -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -+OUTPUT_ARCH(arm) -+ENTRY(_start) -+SECTIONS -+{ -+ . = 0x00000000; -+ -+ . = ALIGN(4); -+ .text : -+ { -+ cpu/arm926ejs/start.o (.text) -+ *(.text) -+ } -+ -+ . = ALIGN(4); -+ .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -+ -+ . = ALIGN(4); -+ .data : { *(.data) } -+ -+ . = ALIGN(4); -+ .got : { *(.got) } -+ -+ . = .; -+ __u_boot_cmd_start = .; -+ .u_boot_cmd : { *(.u_boot_cmd) } -+ __u_boot_cmd_end = .; -+ -+ . = ALIGN(4); -+ __bss_start = .; -+ .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -+ _end = .; -+} -diff --git a/cpu/arm926ejs/versatile/timer.c b/cpu/arm926ejs/versatile/timer.c -index 6697672..50c1335 100755 ---- a/cpu/arm926ejs/versatile/timer.c -+++ b/cpu/arm926ejs/versatile/timer.c -@@ -36,7 +36,6 @@ - */ - - #include --#include - - #define TIMER_LOAD_VAL 0xffffffff - -diff --git a/cpu/arm946es/Makefile b/cpu/arm946es/Makefile -index d5ac7d3..e81f2da 100644 ---- a/cpu/arm946es/Makefile -+++ b/cpu/arm946es/Makefile -@@ -26,7 +26,8 @@ include $(TOPDIR)/config.mk - LIB = $(obj)lib$(CPU).a - - START = start.o --COBJS = interrupts.o cpu.o -+ -+COBJS = cpu.o - - SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) - OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) -diff --git a/cpu/arm946es/cpu.c b/cpu/arm946es/cpu.c -index 04f0515..c63c98b 100644 ---- a/cpu/arm946es/cpu.c -+++ b/cpu/arm946es/cpu.c -@@ -31,27 +31,10 @@ - - #include - #include --#include - #include - --#ifdef CONFIG_USE_IRQ --DECLARE_GLOBAL_DATA_PTR; --#endif -- - static void cache_flush(void); - --int cpu_init (void) --{ -- /* -- * setup up stacks if necessary -- */ --#ifdef CONFIG_USE_IRQ -- IRQ_STACK_START = _armboot_start - CONFIG_SYS_MALLOC_LEN - CONFIG_SYS_GBL_DATA_SIZE - 4; -- FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ; --#endif -- return 0; --} -- - int cleanup_before_linux (void) - { - /* -diff --git a/cpu/arm946es/interrupts.c b/cpu/arm946es/interrupts.c -deleted file mode 100644 -index 3a16abe..0000000 ---- a/cpu/arm946es/interrupts.c -+++ /dev/null -@@ -1,158 +0,0 @@ --/* -- * (C) Copyright 2003 -- * Texas Instruments -- * -- * (C) Copyright 2002 -- * Sysgo Real-Time Solutions, GmbH -- * Marius Groeger -- * -- * (C) Copyright 2002 -- * Sysgo Real-Time Solutions, GmbH -- * Alex Zuepke -- * -- * (C) Copyright 2002-2004 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * (C) Copyright 2004 -- * Philippe Robin, ARM Ltd. -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --#include -- --#define TIMER_LOAD_VAL 0xffffffff --extern void reset_cpu(ulong addr); -- --#ifdef CONFIG_INTEGRATOR -- /* Timer functionality supplied by Integrator board (AP or CP) */ --#else -- --static ulong timestamp; --static ulong lastdec; -- --/* nothing really to do with interrupts, just starts up a counter. */ --int interrupt_init (void) --{ -- /* init the timestamp and lastdec value */ -- reset_timer_masked(); -- -- return (0); --} -- --/* -- * timer without interrupts -- */ -- --void reset_timer (void) --{ -- reset_timer_masked (); --} -- --ulong get_timer (ulong base) --{ -- return get_timer_masked () - base; --} -- --void set_timer (ulong t) --{ -- timestamp = t; --} -- --/* delay x useconds AND perserve advance timstamp value */ --void udelay(unsigned long usec) --{ -- udelay_masked(usec); --} -- --void reset_timer_masked (void) --{ -- /* reset time */ -- lastdec = READ_TIMER; /* capure current decrementer value time */ -- timestamp = 0; /* start "advancing" time stamp from 0 */ --} -- --ulong get_timer_raw (void) --{ -- ulong now = READ_TIMER; /* current tick value */ -- -- if (lastdec >= now) { /* normal mode (non roll) */ -- /* normal mode */ -- timestamp += lastdec - now; /* move stamp fordward with absoulte diff ticks */ -- } else { /* we have overflow of the count down timer */ -- /* nts = ts + ld + (TLV - now) -- * ts=old stamp, ld=time that passed before passing through -1 -- * (TLV-now) amount of time after passing though -1 -- * nts = new "advancing time stamp"...it could also roll and cause problems. -- */ -- timestamp += lastdec + TIMER_LOAD_VAL - now; -- } -- lastdec = now; -- -- return timestamp; --} -- --ulong get_timer_masked (void) --{ -- return get_timer_raw() / TIMER_LOAD_VAL; --} -- --/* waits specified delay value and resets timestamp */ --void udelay_masked (unsigned long usec) --{ -- ulong tmo; -- -- if(usec >= 1000){ /* if "big" number, spread normalization to seconds */ -- tmo = usec / 1000; /* start to normalize for usec to ticks per sec */ -- tmo *= CONFIG_SYS_HZ_CLOCK; /* find number of "ticks" to wait to achieve target */ -- tmo /= 1000; /* finish normalize. */ -- }else{ /* else small number, don't kill it prior to HZ multiply */ -- tmo = usec * CONFIG_SYS_HZ_CLOCK; -- tmo /= (1000*1000); -- } -- -- reset_timer_masked (); /* set "advancing" timestamp to 0, set lastdec vaule */ -- -- while (get_timer_raw () < tmo) /* wait for time stamp to overtake tick number.*/ -- /*NOP*/; --} -- --/* -- * This function is derived from PowerPC code (read timebase as long long). -- * On ARM it just returns the timer value. -- */ --unsigned long long get_ticks(void) --{ -- return get_timer(0); --} -- --/* -- * This function is derived from PowerPC code (timebase clock frequency). -- * On ARM it returns the number of timer ticks per second. -- */ --ulong get_tbclk (void) --{ -- ulong tbclk; -- -- tbclk = CONFIG_SYS_HZ; -- return tbclk; --} -- --#endif /* CONFIG_INTEGRATOR */ -diff --git a/cpu/arm946es/start.S b/cpu/arm946es/start.S -index 9375c76..627e3cb 100644 ---- a/cpu/arm946es/start.S -+++ b/cpu/arm946es/start.S -@@ -133,7 +133,7 @@ reset: - * we do sys-critical inits only at reboot, - * not when booting from ram! - */ --#ifdef CONFIG_INIT_CRITICAL -+#ifndef CONFIG_SKIP_LOWLEVEL_INIT - bl cpu_init_crit - #endif - -@@ -192,6 +192,7 @@ _start_armboot: - */ - - -+#ifndef CONFIG_SKIP_LOWLEVEL_INIT - cpu_init_crit: - /* - * flush v4 I/D caches -@@ -217,6 +218,7 @@ cpu_init_crit: - bl lowlevel_init /* go setup memory */ - mov lr, ip /* restore link */ - mov pc, lr /* back to my caller */ -+#endif - /* - ************************************************************************* - * -diff --git a/cpu/arm946es/u-boot.lds b/cpu/arm946es/u-boot.lds -new file mode 100644 -index 0000000..5bd4390 ---- /dev/null -+++ b/cpu/arm946es/u-boot.lds -@@ -0,0 +1,56 @@ -+/* -+ * (C) Copyright 2002 -+ * Gary Jennejohn, DENX Software Engineering, -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -+OUTPUT_ARCH(arm) -+ENTRY(_start) -+SECTIONS -+{ -+ . = 0x00000000; -+ -+ . = ALIGN(4); -+ .text : -+ { -+ cpu/arm946es/start.o (.text) -+ *(.text) -+ } -+ -+ . = ALIGN(4); -+ .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -+ -+ . = ALIGN(4); -+ .data : { *(.data) } -+ -+ . = ALIGN(4); -+ .got : { *(.got) } -+ -+ . = .; -+ __u_boot_cmd_start = .; -+ .u_boot_cmd : { *(.u_boot_cmd) } -+ __u_boot_cmd_end = .; -+ -+ . = ALIGN(4); -+ __bss_start = .; -+ .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -+ _end = .; -+} -diff --git a/cpu/arm_cortexa8/cpu.c b/cpu/arm_cortexa8/cpu.c -index ca6bf4f..6fd07d0 100644 ---- a/cpu/arm_cortexa8/cpu.c -+++ b/cpu/arm_cortexa8/cpu.c -@@ -36,29 +36,12 @@ - #include - #include - --#ifdef CONFIG_USE_IRQ --DECLARE_GLOBAL_DATA_PTR; --#endif -- - #ifndef CONFIG_L2_OFF - void l2cache_disable(void); - #endif - - static void cache_flush(void); - --int cpu_init(void) --{ -- /* -- * setup up stacks if necessary -- */ --#ifdef CONFIG_USE_IRQ -- IRQ_STACK_START = -- _armboot_start - CONFIG_SYS_MALLOC_LEN - CONFIG_SYS_GBL_DATA_SIZE - 4; -- FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ; --#endif -- return 0; --} -- - int cleanup_before_linux(void) - { - unsigned int i; -diff --git a/cpu/arm_cortexa8/omap3/Makefile b/cpu/arm_cortexa8/omap3/Makefile -index b96b3dd..50176ee 100644 ---- a/cpu/arm_cortexa8/omap3/Makefile -+++ b/cpu/arm_cortexa8/omap3/Makefile -@@ -26,7 +26,14 @@ include $(TOPDIR)/config.mk - LIB = $(obj)lib$(SOC).a - - SOBJS := lowlevel_init.o --COBJS := sys_info.o board.o clock.o interrupts.o mem.o syslib.o -+ -+COBJS += board.o -+COBJS += clock.o -+COBJS += gpio.o -+COBJS += mem.o -+COBJS += syslib.o -+COBJS += sys_info.o -+COBJS += timer.o - - SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) - OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) -diff --git a/cpu/arm_cortexa8/omap3/board.c b/cpu/arm_cortexa8/omap3/board.c -index 51d5cf6..6e29599 100644 ---- a/cpu/arm_cortexa8/omap3/board.c -+++ b/cpu/arm_cortexa8/omap3/board.c -@@ -335,8 +335,8 @@ usage: - U_BOOT_CMD( - nandecc, 2, 1, do_switch_ecc, - "nandecc - switch OMAP3 NAND ECC calculation algorithm\n", -- "[hw/sw] - Switch between NAND hardware (hw) or software (sw) ecc algorithm\n" -- ); -+ "[hw/sw] - Switch between NAND hardware (hw) or software (sw) ecc algorithm" -+); - - #endif /* CONFIG_NAND_OMAP_GPMC */ - -diff --git a/cpu/arm_cortexa8/omap3/clock.c b/cpu/arm_cortexa8/omap3/clock.c -index d035677..0306b6c 100644 ---- a/cpu/arm_cortexa8/omap3/clock.c -+++ b/cpu/arm_cortexa8/omap3/clock.c -@@ -357,6 +357,28 @@ void per_clocks_enable(void) - sr32(&prcm_base->fclken_per, 11, 1, 0x1); - sr32(&prcm_base->iclken_per, 11, 1, 0x1); - #endif -+ -+#ifdef CONFIG_OMAP3_GPIO_2 -+ sr32(&prcm_base->fclken_per, 13, 1, 1); -+ sr32(&prcm_base->iclken_per, 13, 1, 1); -+#endif -+#ifdef CONFIG_OMAP3_GPIO_3 -+ sr32(&prcm_base->fclken_per, 14, 1, 1); -+ sr32(&prcm_base->iclken_per, 14, 1, 1); -+#endif -+#ifdef CONFIG_OMAP3_GPIO_4 -+ sr32(&prcm_base->fclken_per, 15, 1, 1); -+ sr32(&prcm_base->iclken_per, 15, 1, 1); -+#endif -+#ifdef CONFIG_OMAP3_GPIO_5 -+ sr32(&prcm_base->fclken_per, 16, 1, 1); -+ sr32(&prcm_base->iclken_per, 16, 1, 1); -+#endif -+#ifdef CONFIG_OMAP3_GPIO_6 -+ sr32(&prcm_base->fclken_per, 17, 1, 1); -+ sr32(&prcm_base->iclken_per, 17, 1, 1); -+#endif -+ - #ifdef CONFIG_DRIVER_OMAP34XX_I2C - /* Turn on all 3 I2C clocks */ - sr32(&prcm_base->fclken1_core, 15, 3, 0x7); -diff --git a/cpu/arm_cortexa8/omap3/gpio.c b/cpu/arm_cortexa8/omap3/gpio.c -new file mode 100644 -index 0000000..aeb6066 ---- /dev/null -+++ b/cpu/arm_cortexa8/omap3/gpio.c -@@ -0,0 +1,185 @@ -+/* -+ * Copyright (c) 2009 Wind River Systems, Inc. -+ * Tom Rix -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ * -+ * This work is derived from the linux 2.6.27 kernel source -+ * To fetch, use the kernel repository -+ * git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git -+ * Use the v2.6.27 tag. -+ * -+ * Below is the original's header including its copyright -+ * -+ * linux/arch/arm/plat-omap/gpio.c -+ * -+ * Support functions for OMAP GPIO -+ * -+ * Copyright (C) 2003-2005 Nokia Corporation -+ * Written by Juha Yrjölä -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include -+#include -+#include -+#include -+ -+static struct gpio_bank gpio_bank_34xx[6] = { -+ { (void *)OMAP34XX_GPIO1_BASE, METHOD_GPIO_24XX }, -+ { (void *)OMAP34XX_GPIO2_BASE, METHOD_GPIO_24XX }, -+ { (void *)OMAP34XX_GPIO3_BASE, METHOD_GPIO_24XX }, -+ { (void *)OMAP34XX_GPIO4_BASE, METHOD_GPIO_24XX }, -+ { (void *)OMAP34XX_GPIO5_BASE, METHOD_GPIO_24XX }, -+ { (void *)OMAP34XX_GPIO6_BASE, METHOD_GPIO_24XX }, -+}; -+ -+static struct gpio_bank *gpio_bank = &gpio_bank_34xx[0]; -+ -+static inline struct gpio_bank *get_gpio_bank(int gpio) -+{ -+ return &gpio_bank[gpio >> 5]; -+} -+ -+static inline int get_gpio_index(int gpio) -+{ -+ return gpio & 0x1f; -+} -+ -+static inline int gpio_valid(int gpio) -+{ -+ if (gpio < 0) -+ return -1; -+ if (gpio < 192) -+ return 0; -+ return -1; -+} -+ -+static int check_gpio(int gpio) -+{ -+ if (gpio_valid(gpio) < 0) { -+ printf("ERROR : check_gpio: invalid GPIO %d\n", gpio); -+ return -1; -+ } -+ return 0; -+} -+ -+static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input) -+{ -+ void *reg = bank->base; -+ u32 l; -+ -+ switch (bank->method) { -+ case METHOD_GPIO_24XX: -+ reg += OMAP24XX_GPIO_OE; -+ break; -+ default: -+ return; -+ } -+ l = __raw_readl(reg); -+ if (is_input) -+ l |= 1 << gpio; -+ else -+ l &= ~(1 << gpio); -+ __raw_writel(l, reg); -+} -+ -+void omap_set_gpio_direction(int gpio, int is_input) -+{ -+ struct gpio_bank *bank; -+ -+ if (check_gpio(gpio) < 0) -+ return; -+ bank = get_gpio_bank(gpio); -+ _set_gpio_direction(bank, get_gpio_index(gpio), is_input); -+} -+ -+static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable) -+{ -+ void *reg = bank->base; -+ u32 l = 0; -+ -+ switch (bank->method) { -+ case METHOD_GPIO_24XX: -+ if (enable) -+ reg += OMAP24XX_GPIO_SETDATAOUT; -+ else -+ reg += OMAP24XX_GPIO_CLEARDATAOUT; -+ l = 1 << gpio; -+ break; -+ default: -+ printf("omap3-gpio unknown bank method %s %d\n", -+ __FILE__, __LINE__); -+ return; -+ } -+ __raw_writel(l, reg); -+} -+ -+void omap_set_gpio_dataout(int gpio, int enable) -+{ -+ struct gpio_bank *bank; -+ -+ if (check_gpio(gpio) < 0) -+ return; -+ bank = get_gpio_bank(gpio); -+ _set_gpio_dataout(bank, get_gpio_index(gpio), enable); -+} -+ -+int omap_get_gpio_datain(int gpio) -+{ -+ struct gpio_bank *bank; -+ void *reg; -+ -+ if (check_gpio(gpio) < 0) -+ return -EINVAL; -+ bank = get_gpio_bank(gpio); -+ reg = bank->base; -+ switch (bank->method) { -+ case METHOD_GPIO_24XX: -+ reg += OMAP24XX_GPIO_DATAIN; -+ break; -+ default: -+ return -EINVAL; -+ } -+ return (__raw_readl(reg) -+ & (1 << get_gpio_index(gpio))) != 0; -+} -+ -+static void _reset_gpio(struct gpio_bank *bank, int gpio) -+{ -+ _set_gpio_direction(bank, get_gpio_index(gpio), 1); -+} -+ -+int omap_request_gpio(int gpio) -+{ -+ if (check_gpio(gpio) < 0) -+ return -EINVAL; -+ -+ return 0; -+} -+ -+void omap_free_gpio(int gpio) -+{ -+ struct gpio_bank *bank; -+ -+ if (check_gpio(gpio) < 0) -+ return; -+ bank = get_gpio_bank(gpio); -+ -+ _reset_gpio(bank, gpio); -+} -diff --git a/cpu/arm_cortexa8/omap3/interrupts.c b/cpu/arm_cortexa8/omap3/interrupts.c -deleted file mode 100644 -index 742fe9c..0000000 ---- a/cpu/arm_cortexa8/omap3/interrupts.c -+++ /dev/null -@@ -1,266 +0,0 @@ --/* -- * (C) Copyright 2008 -- * Texas Instruments -- * -- * Richard Woodruff -- * Syed Moahmmed Khasim -- * -- * (C) Copyright 2002 -- * Sysgo Real-Time Solutions, GmbH -- * Marius Groeger -- * Alex Zuepke -- * -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --#include --#include -- --#ifdef CONFIG_USE_IRQ --/* enable IRQ interrupts */ --void enable_interrupts(void) --{ -- unsigned long temp; -- __asm__ __volatile__("mrs %0, cpsr\n" -- "bic %0, %0, #0x80\n" "msr cpsr_c, %0":"=r"(temp) -- ::"memory"); --} -- --/* -- * disable IRQ/FIQ interrupts -- * returns true if interrupts had been enabled before we disabled them -- */ --int disable_interrupts(void) --{ -- unsigned long old, temp; -- __asm__ __volatile__("mrs %0, cpsr\n" -- "orr %1, %0, #0xc0\n" -- "msr cpsr_c, %1":"=r"(old), "=r"(temp) -- ::"memory"); -- return (old & 0x80) == 0; --} --#else --void enable_interrupts(void) --{ -- return; --} --int disable_interrupts(void) --{ -- return 0; --} --#endif -- --void bad_mode(void) --{ -- panic("Resetting CPU ...\n"); -- reset_cpu(0); --} -- --void show_regs(struct pt_regs *regs) --{ -- unsigned long flags; -- const char *processor_modes[] = { -- "USER_26", "FIQ_26", "IRQ_26", "SVC_26", -- "UK4_26", "UK5_26", "UK6_26", "UK7_26", -- "UK8_26", "UK9_26", "UK10_26", "UK11_26", -- "UK12_26", "UK13_26", "UK14_26", "UK15_26", -- "USER_32", "FIQ_32", "IRQ_32", "SVC_32", -- "UK4_32", "UK5_32", "UK6_32", "ABT_32", -- "UK8_32", "UK9_32", "UK10_32", "UND_32", -- "UK12_32", "UK13_32", "UK14_32", "SYS_32", -- }; -- -- flags = condition_codes(regs); -- -- printf("pc : [<%08lx>] lr : [<%08lx>]\n" -- "sp : %08lx ip : %08lx fp : %08lx\n", -- instruction_pointer(regs), -- regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp); -- printf("r10: %08lx r9 : %08lx r8 : %08lx\n", -- regs->ARM_r10, regs->ARM_r9, regs->ARM_r8); -- printf("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n", -- regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4); -- printf("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n", -- regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0); -- printf("Flags: %c%c%c%c", -- flags & CC_N_BIT ? 'N' : 'n', -- flags & CC_Z_BIT ? 'Z' : 'z', -- flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v'); -- printf(" IRQs %s FIQs %s Mode %s%s\n", -- interrupts_enabled(regs) ? "on" : "off", -- fast_interrupts_enabled(regs) ? "on" : "off", -- processor_modes[processor_mode(regs)], -- thumb_mode(regs) ? " (T)" : ""); --} -- --void do_undefined_instruction(struct pt_regs *pt_regs) --{ -- printf("undefined instruction\n"); -- show_regs(pt_regs); -- bad_mode(); --} -- --void do_software_interrupt(struct pt_regs *pt_regs) --{ -- printf("software interrupt\n"); -- show_regs(pt_regs); -- bad_mode(); --} -- --void do_prefetch_abort(struct pt_regs *pt_regs) --{ -- printf("prefetch abort\n"); -- show_regs(pt_regs); -- bad_mode(); --} -- --void do_data_abort(struct pt_regs *pt_regs) --{ -- printf("data abort\n"); -- show_regs(pt_regs); -- bad_mode(); --} -- --void do_not_used(struct pt_regs *pt_regs) --{ -- printf("not used\n"); -- show_regs(pt_regs); -- bad_mode(); --} -- --void do_fiq(struct pt_regs *pt_regs) --{ -- printf("fast interrupt request\n"); -- show_regs(pt_regs); -- bad_mode(); --} -- --void do_irq(struct pt_regs *pt_regs) --{ -- printf("interrupt request\n"); -- show_regs(pt_regs); -- bad_mode(); --} -- -- --static ulong timestamp; --static ulong lastinc; --static gptimer_t *timer_base = (gptimer_t *)CONFIG_SYS_TIMERBASE; -- --/* -- * Nothing really to do with interrupts, just starts up a counter. -- * We run the counter with 13MHz, divided by 8, resulting in timer -- * frequency of 1.625MHz. With 32bit counter register, counter -- * overflows in ~44min -- */ -- --/* 13MHz / 8 = 1.625MHz */ --#define TIMER_CLOCK (V_SCLK / (2 << CONFIG_SYS_PTV)) --#define TIMER_LOAD_VAL 0xffffffff -- --int interrupt_init(void) --{ -- /* start the counter ticking up, reload value on overflow */ -- writel(TIMER_LOAD_VAL, &timer_base->tldr); -- /* enable timer */ -- writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, -- &timer_base->tclr); -- -- reset_timer_masked(); /* init the timestamp and lastinc value */ -- -- return 0; --} -- --/* -- * timer without interrupts -- */ --void reset_timer(void) --{ -- reset_timer_masked(); --} -- --ulong get_timer(ulong base) --{ -- return get_timer_masked() - base; --} -- --void set_timer(ulong t) --{ -- timestamp = t; --} -- --/* delay x useconds */ --void udelay(unsigned long usec) --{ -- long tmo = usec * (TIMER_CLOCK / 1000) / 1000; -- unsigned long now, last = readl(&timer_base->tcrr); -- -- while (tmo > 0) { -- now = readl(&timer_base->tcrr); -- if (last > now) /* count up timer overflow */ -- tmo -= TIMER_LOAD_VAL - last + now; -- else -- tmo -= now - last; -- last = now; -- } --} -- --void reset_timer_masked(void) --{ -- /* reset time, capture current incrementer value time */ -- lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ); -- timestamp = 0; /* start "advancing" time stamp from 0 */ --} -- --ulong get_timer_masked(void) --{ -- /* current tick value */ -- ulong now = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ); -- -- if (now >= lastinc) /* normal mode (non roll) */ -- /* move stamp fordward with absoulte diff ticks */ -- timestamp += (now - lastinc); -- else /* we have rollover of incrementer */ -- timestamp += ((TIMER_LOAD_VAL / (TIMER_CLOCK / CONFIG_SYS_HZ)) -- - lastinc) + now; -- lastinc = now; -- return timestamp; --} -- --/* -- * This function is derived from PowerPC code (read timebase as long long). -- * On ARM it just returns the timer value. -- */ --unsigned long long get_ticks(void) --{ -- return get_timer(0); --} -- --/* -- * This function is derived from PowerPC code (timebase clock frequency). -- * On ARM it returns the number of timer ticks per second. -- */ --ulong get_tbclk(void) --{ -- return CONFIG_SYS_HZ; --} -diff --git a/cpu/arm_cortexa8/omap3/timer.c b/cpu/arm_cortexa8/omap3/timer.c -new file mode 100644 -index 0000000..05cfe76 ---- /dev/null -+++ b/cpu/arm_cortexa8/omap3/timer.c -@@ -0,0 +1,138 @@ -+/* -+ * (C) Copyright 2008 -+ * Texas Instruments -+ * -+ * Richard Woodruff -+ * Syed Moahmmed Khasim -+ * -+ * (C) Copyright 2002 -+ * Sysgo Real-Time Solutions, GmbH -+ * Marius Groeger -+ * Alex Zuepke -+ * -+ * (C) Copyright 2002 -+ * Gary Jennejohn, DENX Software Engineering, -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+#include -+ -+static ulong timestamp; -+static ulong lastinc; -+static gptimer_t *timer_base = (gptimer_t *)CONFIG_SYS_TIMERBASE; -+ -+/* -+ * Nothing really to do with interrupts, just starts up a counter. -+ * We run the counter with 13MHz, divided by 8, resulting in timer -+ * frequency of 1.625MHz. With 32bit counter register, counter -+ * overflows in ~44min -+ */ -+ -+/* 13MHz / 8 = 1.625MHz */ -+#define TIMER_CLOCK (V_SCLK / (2 << CONFIG_SYS_PTV)) -+#define TIMER_LOAD_VAL 0xffffffff -+ -+int timer_init(void) -+{ -+ /* start the counter ticking up, reload value on overflow */ -+ writel(TIMER_LOAD_VAL, &timer_base->tldr); -+ /* enable timer */ -+ writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, -+ &timer_base->tclr); -+ -+ reset_timer_masked(); /* init the timestamp and lastinc value */ -+ -+ return 0; -+} -+ -+/* -+ * timer without interrupts -+ */ -+void reset_timer(void) -+{ -+ reset_timer_masked(); -+} -+ -+ulong get_timer(ulong base) -+{ -+ return get_timer_masked() - base; -+} -+ -+void set_timer(ulong t) -+{ -+ timestamp = t; -+} -+ -+/* delay x useconds */ -+void udelay(unsigned long usec) -+{ -+ long tmo = usec * (TIMER_CLOCK / 1000) / 1000; -+ unsigned long now, last = readl(&timer_base->tcrr); -+ -+ while (tmo > 0) { -+ now = readl(&timer_base->tcrr); -+ if (last > now) /* count up timer overflow */ -+ tmo -= TIMER_LOAD_VAL - last + now; -+ else -+ tmo -= now - last; -+ last = now; -+ } -+} -+ -+void reset_timer_masked(void) -+{ -+ /* reset time, capture current incrementer value time */ -+ lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ); -+ timestamp = 0; /* start "advancing" time stamp from 0 */ -+} -+ -+ulong get_timer_masked(void) -+{ -+ /* current tick value */ -+ ulong now = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ); -+ -+ if (now >= lastinc) /* normal mode (non roll) */ -+ /* move stamp fordward with absoulte diff ticks */ -+ timestamp += (now - lastinc); -+ else /* we have rollover of incrementer */ -+ timestamp += ((TIMER_LOAD_VAL / (TIMER_CLOCK / CONFIG_SYS_HZ)) -+ - lastinc) + now; -+ lastinc = now; -+ return timestamp; -+} -+ -+/* -+ * This function is derived from PowerPC code (read timebase as long long). -+ * On ARM it just returns the timer value. -+ */ -+unsigned long long get_ticks(void) -+{ -+ return get_timer(0); -+} -+ -+/* -+ * This function is derived from PowerPC code (timebase clock frequency). -+ * On ARM it returns the number of timer ticks per second. -+ */ -+ulong get_tbclk(void) -+{ -+ return CONFIG_SYS_HZ; -+} -diff --git a/cpu/arm_cortexa8/u-boot.lds b/cpu/arm_cortexa8/u-boot.lds -new file mode 100644 -index 0000000..4f1711c ---- /dev/null -+++ b/cpu/arm_cortexa8/u-boot.lds -@@ -0,0 +1,58 @@ -+/* -+ * January 2004 - Changed to support H4 device -+ * Copyright (c) 2004-2008 Texas Instruments -+ * -+ * (C) Copyright 2002 -+ * Gary Jennejohn, DENX Software Engineering, -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -+OUTPUT_ARCH(arm) -+ENTRY(_start) -+SECTIONS -+{ -+ . = 0x00000000; -+ -+ . = ALIGN(4); -+ .text : -+ { -+ cpu/arm_cortexa8/start.o (.text) -+ *(.text) -+ } -+ -+ . = ALIGN(4); -+ .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -+ -+ . = ALIGN(4); -+ .data : { *(.data) } -+ -+ . = ALIGN(4); -+ .got : { *(.got) } -+ -+ __u_boot_cmd_start = .; -+ .u_boot_cmd : { *(.u_boot_cmd) } -+ __u_boot_cmd_end = .; -+ -+ . = ALIGN(4); -+ __bss_start = .; -+ .bss : { *(.bss) } -+ _end = .; -+} -diff --git a/cpu/arm_intcm/cpu.c b/cpu/arm_intcm/cpu.c -index b137f76..c0748e8 100644 ---- a/cpu/arm_intcm/cpu.c -+++ b/cpu/arm_intcm/cpu.c -@@ -33,22 +33,6 @@ - #include - #include - --#ifdef CONFIG_USE_IRQ --DECLARE_GLOBAL_DATA_PTR; --#endif -- --int cpu_init (void) --{ -- /* -- * setup up stacks if necessary -- */ --#ifdef CONFIG_USE_IRQ -- IRQ_STACK_START = _armboot_start - CONFIG_SYS_MALLOC_LEN - CONFIG_SYS_GBL_DATA_SIZE - 4; -- FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ; --#endif -- return 0; --} -- - int cleanup_before_linux (void) - { - /* -diff --git a/cpu/arm_intcm/start.S b/cpu/arm_intcm/start.S -index 0031461..bb1f003 100644 ---- a/cpu/arm_intcm/start.S -+++ b/cpu/arm_intcm/start.S -@@ -131,7 +131,7 @@ reset: - * we do sys-critical inits only at reboot, - * not when booting from ram! - */ --#ifdef CONFIG_INIT_CRITICAL -+#ifndef CONFIG_SKIP_LOWLEVEL_INIT - bl cpu_init_crit - #endif - -@@ -188,11 +188,13 @@ _start_armboot: - ************************************************************************* - */ - -+#ifndef CONFIG_SKIP_LOWLEVEL_INIT - cpu_init_crit: - /* arm_int_generic assumes the ARM boot monitor, or user software, - * has initialized the platform - */ - mov pc, lr /* back to my caller */ -+#endif - /* - ************************************************************************* - * -diff --git a/cpu/arm_intcm/u-boot.lds b/cpu/arm_intcm/u-boot.lds -new file mode 100644 -index 0000000..5eb87fb ---- /dev/null -+++ b/cpu/arm_intcm/u-boot.lds -@@ -0,0 +1,56 @@ -+/* -+ * (C) Copyright 2002 -+ * Gary Jennejohn, DENX Software Engineering, -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -+OUTPUT_ARCH(arm) -+ENTRY(_start) -+SECTIONS -+{ -+ . = 0x00000000; -+ -+ . = ALIGN(4); -+ .text : -+ { -+ cpu/arm_intcm/start.o (.text) -+ *(.text) -+ } -+ -+ . = ALIGN(4); -+ .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -+ -+ . = ALIGN(4); -+ .data : { *(.data) } -+ -+ . = ALIGN(4); -+ .got : { *(.got) } -+ -+ . = .; -+ __u_boot_cmd_start = .; -+ .u_boot_cmd : { *(.u_boot_cmd) } -+ __u_boot_cmd_end = .; -+ -+ . = ALIGN(4); -+ __bss_start = .; -+ .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -+ _end = .; -+} -diff --git a/cpu/blackfin/system_map.S b/cpu/blackfin/system_map.S -deleted file mode 100644 -index 286d7f3..0000000 ---- a/cpu/blackfin/system_map.S -+++ /dev/null -@@ -1,18 +0,0 @@ --/* -- * system_map.S - optional symbol lookup for debugging -- * -- * Copyright (c) 2007 Analog Devices Inc. -- * Licensed under the GPL-2 or later. -- */ -- --#include -- --#ifdef CONFIG_DEBUG_DUMP_SYMS --.data --.global _system_map --.type _system_map,@object --_system_map: --#include SYM_FILE --.asciz "" --.size _system_map,.-_system_map --#endif -diff --git a/cpu/blackfin/traps.c b/cpu/blackfin/traps.c -index 2121b0e..7e7c74c 100644 ---- a/cpu/blackfin/traps.c -+++ b/cpu/blackfin/traps.c -@@ -171,38 +171,13 @@ void trap_c(struct pt_regs *regs) - # define ENABLE_DUMP 0 - #endif - --#ifdef CONFIG_DEBUG_DUMP_SYMS --# define ENABLE_DUMP_SYMS 1 --#else --# define ENABLE_DUMP_SYMS 0 --#endif -- --static const char *symbol_lookup(unsigned long addr, unsigned long *caddr) -+#ifndef CONFIG_KALLSYMS -+const char *symbol_lookup(unsigned long addr, unsigned long *caddr) - { -- if (!ENABLE_DUMP_SYMS) -- return NULL; -- -- extern const char system_map[] __attribute__((__weak__)); -- const char *sym, *csym; -- char *esym; -- unsigned long sym_addr; -- -- sym = system_map; -- csym = NULL; -- *caddr = 0; -- -- while (*sym) { -- sym_addr = simple_strtoul(sym, &esym, 16); -- sym = esym; -- if (sym_addr > addr) -- break; -- *caddr = sym_addr; -- csym = sym; -- sym += strlen(sym) + 1; -- } -- -- return csym; -+ *caddr = addr; -+ return "N/A"; - } -+#endif - - static void decode_address(char *buf, unsigned long address) - { -diff --git a/cpu/ixp/Makefile b/cpu/ixp/Makefile -index 7e98d87..1403c4f 100644 ---- a/cpu/ixp/Makefile -+++ b/cpu/ixp/Makefile -@@ -26,11 +26,10 @@ include $(TOPDIR)/config.mk - LIB = $(obj)lib$(CPU).a - - START = start.o -+ - COBJS-y += cpu.o --COBJS-y += interrupts.o --ifndef CONFIG_USE_IRQ -+COBJS-$(CONFIG_USE_IRQ) += interrupts.o - COBJS-y += timer.o --endif - - SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) - OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y)) -diff --git a/cpu/ixp/cpu.c b/cpu/ixp/cpu.c -index 42c62f6..ce275e5 100644 ---- a/cpu/ixp/cpu.c -+++ b/cpu/ixp/cpu.c -@@ -38,10 +38,6 @@ - - ulong loops_per_jiffy; - --#ifdef CONFIG_USE_IRQ --DECLARE_GLOBAL_DATA_PTR; --#endif -- - static void cache_flush(void); - - #if defined(CONFIG_DISPLAY_CPUINFO) -@@ -79,19 +75,6 @@ int print_cpuinfo (void) - } - #endif /* CONFIG_DISPLAY_CPUINFO */ - --int cpu_init (void) --{ -- /* -- * setup up stacks if necessary -- */ --#ifdef CONFIG_USE_IRQ -- IRQ_STACK_START = _armboot_start - CONFIG_SYS_MALLOC_LEN - CONFIG_SYS_GBL_DATA_SIZE - 4; -- FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ; --#endif -- -- return 0; --} -- - int cleanup_before_linux (void) - { - /* -diff --git a/cpu/ixp/interrupts.c b/cpu/ixp/interrupts.c -index 621f31b..06a826a 100644 ---- a/cpu/ixp/interrupts.c -+++ b/cpu/ixp/interrupts.c -@@ -31,18 +31,8 @@ - - #include - #include -- --#ifdef CONFIG_USE_IRQ - #include - --/* -- * When interrupts are enabled, use timer 2 for time/delay generation... -- */ -- --#define FREQ 66666666 --#define CLOCK_TICK_RATE (((FREQ / CONFIG_SYS_HZ & ~IXP425_OST_RELOAD_MASK) + 1) * CONFIG_SYS_HZ) --#define LATCH ((CLOCK_TICK_RATE + CONFIG_SYS_HZ/2) / CONFIG_SYS_HZ) /* For divider */ -- - struct _irq_handler { - void *m_data; - void (*m_func)( void *data); -@@ -50,8 +40,6 @@ struct _irq_handler { - - static struct _irq_handler IRQ_HANDLER[N_IRQS]; - --static volatile ulong timestamp; -- - static void default_isr(void *data) - { - printf("default_isr(): called for IRQ %d, Interrupt Status=%x PR=%x\n", -@@ -63,63 +51,32 @@ static int next_irq(void) - return (((*IXP425_ICIH & 0x000000fc) >> 2) - 1); - } - --static void timer_isr(void *data) --{ -- unsigned int *pTime = (unsigned int *)data; -- -- (*pTime)++; -- -- /* -- * Reset IRQ source -- */ -- *IXP425_OSST = IXP425_OSST_TIMER_2_PEND; --} -- --ulong get_timer (ulong base) -+void do_irq (struct pt_regs *pt_regs) - { -- return timestamp - base; --} -+ int irq = next_irq(); - --void reset_timer (void) --{ -- timestamp = 0; -+ IRQ_HANDLER[irq].m_func(IRQ_HANDLER[irq].m_data); - } - --#endif /* #ifdef CONFIG_USE_IRQ */ -- --#ifdef CONFIG_USE_IRQ --void do_irq (struct pt_regs *pt_regs) -+void irq_install_handler (int irq, interrupt_handler_t handle_irq, void *data) - { -- int irq = next_irq(); -+ if (irq >= N_IRQS || !handle_irq) -+ return; - -- IRQ_HANDLER[irq].m_func(IRQ_HANDLER[irq].m_data); -+ IRQ_HANDLER[irq].m_data = data; -+ IRQ_HANDLER[irq].m_func = handle_irq; - } --#endif - --int interrupt_init (void) -+int arch_interrupt_init (void) - { --#ifdef CONFIG_USE_IRQ - int i; - - /* install default interrupt handlers */ -- for (i = 0; i < N_IRQS; i++) { -- IRQ_HANDLER[i].m_data = (void *)i; -- IRQ_HANDLER[i].m_func = default_isr; -- } -- -- /* install interrupt handler for timer */ -- IRQ_HANDLER[IXP425_TIMER_2_IRQ].m_data = (void *)×tamp; -- IRQ_HANDLER[IXP425_TIMER_2_IRQ].m_func = timer_isr; -- -- /* setup the Timer counter value */ -- *IXP425_OSRT2 = (LATCH & ~IXP425_OST_RELOAD_MASK) | IXP425_OST_ENABLE; -+ for (i = 0; i < N_IRQS; i++) -+ irq_install_handler(i, default_isr, (void *)i); - - /* configure interrupts for IRQ mode */ - *IXP425_ICLR = 0x00000000; - -- /* enable timer irq */ -- *IXP425_ICMR = (1 << IXP425_TIMER_2_IRQ); --#endif -- - return (0); - } -diff --git a/cpu/ixp/timer.c b/cpu/ixp/timer.c -index deb227a..6856149 100644 ---- a/cpu/ixp/timer.c -+++ b/cpu/ixp/timer.c -@@ -32,6 +32,54 @@ - #include - #include - -+#ifdef CONFIG_TIMER_IRQ -+ -+#define FREQ 66666666 -+#define CLOCK_TICK_RATE (((FREQ / CONFIG_SYS_HZ & ~IXP425_OST_RELOAD_MASK) + 1) * CONFIG_SYS_HZ) -+#define LATCH ((CLOCK_TICK_RATE + CONFIG_SYS_HZ/2) / CONFIG_SYS_HZ) /* For divider */ -+ -+/* -+ * When interrupts are enabled, use timer 2 for time/delay generation... -+ */ -+ -+static volatile ulong timestamp; -+ -+static void timer_isr(void *data) -+{ -+ unsigned int *pTime = (unsigned int *)data; -+ -+ (*pTime)++; -+ -+ /* -+ * Reset IRQ source -+ */ -+ *IXP425_OSST = IXP425_OSST_TIMER_2_PEND; -+} -+ -+ulong get_timer (ulong base) -+{ -+ return timestamp - base; -+} -+ -+void reset_timer (void) -+{ -+ timestamp = 0; -+} -+ -+int timer_init (void) -+{ -+ /* install interrupt handler for timer */ -+ irq_install_handler(IXP425_TIMER_2_IRQ, timer_isr, (void *)×tamp); -+ -+ /* setup the Timer counter value */ -+ *IXP425_OSRT2 = (LATCH & ~IXP425_OST_RELOAD_MASK) | IXP425_OST_ENABLE; -+ -+ /* enable timer irq */ -+ *IXP425_ICMR = (1 << IXP425_TIMER_2_IRQ); -+ -+ return 0; -+} -+#else - ulong get_timer (ulong base) - { - return get_timer_masked () - base; -@@ -79,3 +127,9 @@ ulong get_timer_masked (void) - } - return (reload_constant - current); - } -+ -+int timer_init(void) -+{ -+ return 0; -+} -+#endif -diff --git a/cpu/ixp/u-boot.lds b/cpu/ixp/u-boot.lds -new file mode 100644 -index 0000000..85209ca ---- /dev/null -+++ b/cpu/ixp/u-boot.lds -@@ -0,0 +1,56 @@ -+/* -+ * (C) Copyright 2000-2006 -+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+OUTPUT_FORMAT("elf32-bigarm", "elf32-bigarm", "elf32-bigarm") -+OUTPUT_ARCH(arm) -+ENTRY(_start) -+SECTIONS -+{ -+ . = 0x00000000; -+ -+ . = ALIGN(4); -+ .text : -+ { -+ cpu/ixp/start.o(.text) -+ *(.text) -+ } -+ -+ . = ALIGN(4); -+ .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -+ -+ . = ALIGN(4); -+ .data : { *(.data) } -+ -+ . = ALIGN(4); -+ .got : { *(.got) } -+ -+ . = .; -+ __u_boot_cmd_start = .; -+ .u_boot_cmd : { *(.u_boot_cmd) } -+ __u_boot_cmd_end = .; -+ -+ . = ALIGN(4); -+ __bss_start = .; -+ .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -+ _end = .; -+} -diff --git a/cpu/lh7a40x/Makefile b/cpu/lh7a40x/Makefile -index bac2a64..1b3f58a 100644 ---- a/cpu/lh7a40x/Makefile -+++ b/cpu/lh7a40x/Makefile -@@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk - LIB = $(obj)lib$(CPU).a - - START = start.o --COBJS = cpu.o speed.o interrupts.o serial.o -+COBJS = cpu.o speed.o timer.o - - SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) - OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) -diff --git a/cpu/lh7a40x/cpu.c b/cpu/lh7a40x/cpu.c -index 338df87..b193189 100644 ---- a/cpu/lh7a40x/cpu.c -+++ b/cpu/lh7a40x/cpu.c -@@ -31,27 +31,10 @@ - - #include - #include --#include - #include - --#ifdef CONFIG_USE_IRQ --DECLARE_GLOBAL_DATA_PTR; --#endif -- - static void cache_flush(void); - --int cpu_init (void) --{ -- /* -- * setup up stacks if necessary -- */ --#ifdef CONFIG_USE_IRQ -- IRQ_STACK_START = _armboot_start - CONFIG_SYS_MALLOC_LEN - CONFIG_SYS_GBL_DATA_SIZE - 4; -- FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ; --#endif -- return 0; --} -- - int cleanup_before_linux (void) - { - /* -diff --git a/cpu/lh7a40x/interrupts.c b/cpu/lh7a40x/interrupts.c -deleted file mode 100644 -index d39e707..0000000 ---- a/cpu/lh7a40x/interrupts.c -+++ /dev/null -@@ -1,194 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Sysgo Real-Time Solutions, GmbH -- * Marius Groeger -- * -- * (C) Copyright 2002 -- * Sysgo Real-Time Solutions, GmbH -- * Alex Zuepke -- * -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --#include --#include -- --static ulong timer_load_val = 0; -- --/* macro to read the 16 bit timer */ --static inline ulong READ_TIMER(void) --{ -- lh7a40x_timers_t* timers = LH7A40X_TIMERS_PTR; -- lh7a40x_timer_t* timer = &timers->timer1; -- -- return (timer->value & 0x0000ffff); --} -- --static ulong timestamp; --static ulong lastdec; -- --int interrupt_init (void) --{ -- lh7a40x_timers_t* timers = LH7A40X_TIMERS_PTR; -- lh7a40x_timer_t* timer = &timers->timer1; -- -- /* a periodic timer using the 508kHz source */ -- timer->control = (TIMER_PER | TIMER_CLK508K); -- -- if (timer_load_val == 0) { -- /* -- * 10ms period with 508.469kHz clock = 5084 -- */ -- timer_load_val = CONFIG_SYS_HZ/100; -- } -- -- /* load value for 10 ms timeout */ -- lastdec = timer->load = timer_load_val; -- -- /* auto load, start timer */ -- timer->control = timer->control | TIMER_EN; -- timestamp = 0; -- -- return (0); --} -- --/* -- * timer without interrupts -- */ -- --void reset_timer (void) --{ -- reset_timer_masked (); --} -- --ulong get_timer (ulong base) --{ -- return (get_timer_masked() - base); --} -- --void set_timer (ulong t) --{ -- timestamp = t; --} -- --void udelay (unsigned long usec) --{ -- ulong tmo,tmp; -- -- /* normalize */ -- if (usec >= 1000) { -- tmo = usec / 1000; -- tmo *= CONFIG_SYS_HZ; -- tmo /= 1000; -- } -- else { -- if (usec > 1) { -- tmo = usec * CONFIG_SYS_HZ; -- tmo /= (1000*1000); -- } -- else -- tmo = 1; -- } -- -- /* check for rollover during this delay */ -- tmp = get_timer (0); -- if ((tmp + tmo) < tmp ) -- reset_timer_masked(); /* timer would roll over */ -- else -- tmo += tmp; -- -- while (get_timer_masked () < tmo); --} -- --void reset_timer_masked (void) --{ -- /* reset time */ -- lastdec = READ_TIMER(); -- timestamp = 0; --} -- --ulong get_timer_masked (void) --{ -- ulong now = READ_TIMER(); -- -- if (lastdec >= now) { -- /* normal mode */ -- timestamp += (lastdec - now); -- } else { -- /* we have an overflow ... */ -- timestamp += ((lastdec + timer_load_val) - now); -- } -- lastdec = now; -- -- return timestamp; --} -- --void udelay_masked (unsigned long usec) --{ -- ulong tmo; -- ulong endtime; -- signed long diff; -- -- /* normalize */ -- if (usec >= 1000) { -- tmo = usec / 1000; -- tmo *= CONFIG_SYS_HZ; -- tmo /= 1000; -- } else { -- if (usec > 1) { -- tmo = usec * CONFIG_SYS_HZ; -- tmo /= (1000*1000); -- } else { -- tmo = 1; -- } -- } -- -- endtime = get_timer_masked () + tmo; -- -- do { -- ulong now = get_timer_masked (); -- diff = endtime - now; -- } while (diff >= 0); --} -- --/* -- * This function is derived from PowerPC code (read timebase as long long). -- * On ARM it just returns the timer value. -- */ --unsigned long long get_ticks(void) --{ -- return get_timer(0); --} -- --/* -- * This function is derived from PowerPC code (timebase clock frequency). -- * On ARM it returns the number of timer ticks per second. -- */ --ulong get_tbclk (void) --{ -- ulong tbclk; -- -- tbclk = timer_load_val * 100; -- -- return tbclk; --} -diff --git a/cpu/lh7a40x/serial.c b/cpu/lh7a40x/serial.c -deleted file mode 100644 -index 4767489..0000000 ---- a/cpu/lh7a40x/serial.c -+++ /dev/null -@@ -1,184 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Gary Jennejohn, DENX Software Engineering, -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License as published by -- * the Free Software Foundation; either version 2 of the License, or -- * (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -- * -- */ -- --#include --#include -- --DECLARE_GLOBAL_DATA_PTR; -- --#if defined(CONFIG_CONSOLE_UART1) --# define UART_CONSOLE 1 --#elif defined(CONFIG_CONSOLE_UART2) --# define UART_CONSOLE 2 --#elif defined(CONFIG_CONSOLE_UART3) --# define UART_CONSOLE 3 --#else --# error "No console configured ... " --#endif -- --void serial_setbrg (void) --{ -- lh7a40x_uart_t* uart = LH7A40X_UART_PTR(UART_CONSOLE); -- int i; -- unsigned int reg = 0; -- -- /* -- * userguide 15.1.2.4 -- * -- * BAUDDIV is (UART_REF_FREQ/(16 X BAUD))-1 -- * -- * UART_REF_FREQ = external system clock input / 2 (Hz) -- * BAUD is desired baudrate (bits/s) -- * -- * NOTE: we add (divisor/2) to numerator to round for -- * more precision -- */ -- reg = (((get_PLLCLK()/2) + ((16*gd->baudrate)/2)) / (16 * gd->baudrate)) - 1; -- uart->brcon = reg; -- -- for (i = 0; i < 100; i++); --} -- --/* -- * Initialise the serial port with the given baudrate. The settings -- * are always 8 data bits, no parity, 1 stop bit, no start bits. -- * -- */ --int serial_init (void) --{ -- lh7a40x_uart_t* uart = LH7A40X_UART_PTR(UART_CONSOLE); -- -- /* UART must be enabled before writing to any config registers */ -- uart->con |= (UART_EN); -- --#ifdef CONFIG_CONSOLE_UART1 -- /* infrared disabled */ -- uart->con |= UART_SIRD; --#endif -- /* loopback disabled */ -- uart->con &= ~(UART_LBE); -- -- /* modem lines and tx/rx polarities */ -- uart->con &= ~(UART_MXP | UART_TXP | UART_RXP); -- -- /* FIFO enable, N81 */ -- uart->fcon = (UART_WLEN_8 | UART_FEN | UART_STP2_1); -- -- /* set baudrate */ -- serial_setbrg (); -- -- /* enable rx interrupt */ -- uart->inten |= UART_RI; -- -- return (0); --} -- --/* -- * Read a single byte from the serial port. Returns 1 on success, 0 -- * otherwise. When the function is succesfull, the character read is -- * written into its argument c. -- */ --int serial_getc (void) --{ -- lh7a40x_uart_t* uart = LH7A40X_UART_PTR(UART_CONSOLE); -- -- /* wait for character to arrive */ -- while (uart->status & UART_RXFE); -- -- return(uart->data & 0xff); --} -- --#ifdef CONFIG_HWFLOW --static int hwflow = 0; /* turned off by default */ --int hwflow_onoff(int on) --{ -- switch(on) { -- case 0: -- default: -- break; /* return current */ -- case 1: -- hwflow = 1; /* turn on */ -- break; -- case -1: -- hwflow = 0; /* turn off */ -- break; -- } -- return hwflow; --} --#endif -- --#ifdef CONFIG_MODEM_SUPPORT --static int be_quiet = 0; --void disable_putc(void) --{ -- be_quiet = 1; --} -- --void enable_putc(void) --{ -- be_quiet = 0; --} --#endif -- -- --/* -- * Output a single byte to the serial port. -- */ --void serial_putc (const char c) --{ -- lh7a40x_uart_t* uart = LH7A40X_UART_PTR(UART_CONSOLE); -- --#ifdef CONFIG_MODEM_SUPPORT -- if (be_quiet) -- return; --#endif -- -- /* wait for room in the tx FIFO */ -- while (!(uart->status & UART_TXFE)); -- --#ifdef CONFIG_HWFLOW -- /* Wait for CTS up */ -- while(hwflow && !(uart->status & UART_CTS)); --#endif -- -- uart->data = c; -- -- /* If \n, also do \r */ -- if (c == '\n') -- serial_putc ('\r'); --} -- --/* -- * Test whether a character is in the RX buffer -- */ --int serial_tstc (void) --{ -- lh7a40x_uart_t* uart = LH7A40X_UART_PTR(UART_CONSOLE); -- -- return(!(uart->status & UART_RXFE)); --} -- --void --serial_puts (const char *s) --{ -- while (*s) { -- serial_putc (*s++); -- } --} -diff --git a/cpu/lh7a40x/timer.c b/cpu/lh7a40x/timer.c -new file mode 100644 -index 0000000..f9b5be0 ---- /dev/null -+++ b/cpu/lh7a40x/timer.c -@@ -0,0 +1,193 @@ -+/* -+ * (C) Copyright 2002 -+ * Sysgo Real-Time Solutions, GmbH -+ * Marius Groeger -+ * -+ * (C) Copyright 2002 -+ * Sysgo Real-Time Solutions, GmbH -+ * Alex Zuepke -+ * -+ * (C) Copyright 2002 -+ * Gary Jennejohn, DENX Software Engineering, -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+#include -+ -+static ulong timer_load_val = 0; -+ -+/* macro to read the 16 bit timer */ -+static inline ulong READ_TIMER(void) -+{ -+ lh7a40x_timers_t* timers = LH7A40X_TIMERS_PTR; -+ lh7a40x_timer_t* timer = &timers->timer1; -+ -+ return (timer->value & 0x0000ffff); -+} -+ -+static ulong timestamp; -+static ulong lastdec; -+ -+int timer_init (void) -+{ -+ lh7a40x_timers_t* timers = LH7A40X_TIMERS_PTR; -+ lh7a40x_timer_t* timer = &timers->timer1; -+ -+ /* a periodic timer using the 508kHz source */ -+ timer->control = (TIMER_PER | TIMER_CLK508K); -+ -+ if (timer_load_val == 0) { -+ /* -+ * 10ms period with 508.469kHz clock = 5084 -+ */ -+ timer_load_val = CONFIG_SYS_HZ/100; -+ } -+ -+ /* load value for 10 ms timeout */ -+ lastdec = timer->load = timer_load_val; -+ -+ /* auto load, start timer */ -+ timer->control = timer->control | TIMER_EN; -+ timestamp = 0; -+ -+ return (0); -+} -+ -+/* -+ * timer without interrupts -+ */ -+ -+void reset_timer (void) -+{ -+ reset_timer_masked (); -+} -+ -+ulong get_timer (ulong base) -+{ -+ return (get_timer_masked() - base); -+} -+ -+void set_timer (ulong t) -+{ -+ timestamp = t; -+} -+ -+void udelay (unsigned long usec) -+{ -+ ulong tmo,tmp; -+ -+ /* normalize */ -+ if (usec >= 1000) { -+ tmo = usec / 1000; -+ tmo *= CONFIG_SYS_HZ; -+ tmo /= 1000; -+ } -+ else { -+ if (usec > 1) { -+ tmo = usec * CONFIG_SYS_HZ; -+ tmo /= (1000*1000); -+ } -+ else -+ tmo = 1; -+ } -+ -+ /* check for rollover during this delay */ -+ tmp = get_timer (0); -+ if ((tmp + tmo) < tmp ) -+ reset_timer_masked(); /* timer would roll over */ -+ else -+ tmo += tmp; -+ -+ while (get_timer_masked () < tmo); -+} -+ -+void reset_timer_masked (void) -+{ -+ /* reset time */ -+ lastdec = READ_TIMER(); -+ timestamp = 0; -+} -+ -+ulong get_timer_masked (void) -+{ -+ ulong now = READ_TIMER(); -+ -+ if (lastdec >= now) { -+ /* normal mode */ -+ timestamp += (lastdec - now); -+ } else { -+ /* we have an overflow ... */ -+ timestamp += ((lastdec + timer_load_val) - now); -+ } -+ lastdec = now; -+ -+ return timestamp; -+} -+ -+void udelay_masked (unsigned long usec) -+{ -+ ulong tmo; -+ ulong endtime; -+ signed long diff; -+ -+ /* normalize */ -+ if (usec >= 1000) { -+ tmo = usec / 1000; -+ tmo *= CONFIG_SYS_HZ; -+ tmo /= 1000; -+ } else { -+ if (usec > 1) { -+ tmo = usec * CONFIG_SYS_HZ; -+ tmo /= (1000*1000); -+ } else { -+ tmo = 1; -+ } -+ } -+ -+ endtime = get_timer_masked () + tmo; -+ -+ do { -+ ulong now = get_timer_masked (); -+ diff = endtime - now; -+ } while (diff >= 0); -+} -+ -+/* -+ * This function is derived from PowerPC code (read timebase as long long). -+ * On ARM it just returns the timer value. -+ */ -+unsigned long long get_ticks(void) -+{ -+ return get_timer(0); -+} -+ -+/* -+ * This function is derived from PowerPC code (timebase clock frequency). -+ * On ARM it returns the number of timer ticks per second. -+ */ -+ulong get_tbclk (void) -+{ -+ ulong tbclk; -+ -+ tbclk = timer_load_val * 100; -+ -+ return tbclk; -+} -diff --git a/cpu/lh7a40x/u-boot.lds b/cpu/lh7a40x/u-boot.lds -new file mode 100644 -index 0000000..e7543c9 ---- /dev/null -+++ b/cpu/lh7a40x/u-boot.lds -@@ -0,0 +1,56 @@ -+/* -+ * (C) Copyright 2002 -+ * Gary Jennejohn, DENX Software Engineering, -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -+OUTPUT_ARCH(arm) -+ENTRY(_start) -+SECTIONS -+{ -+ . = 0x00000000; -+ -+ . = ALIGN(4); -+ .text : -+ { -+ cpu/lh7a40x/start.o (.text) -+ *(.text) -+ } -+ -+ . = ALIGN(4); -+ .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -+ -+ . = ALIGN(4); -+ .data : { *(.data) } -+ -+ . = ALIGN(4); -+ .got : { *(.got) } -+ -+ . = .; -+ __u_boot_cmd_start = .; -+ .u_boot_cmd : { *(.u_boot_cmd) } -+ __u_boot_cmd_end = .; -+ -+ . = ALIGN(4); -+ __bss_start = .; -+ .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -+ _end = .; -+} diff --git a/cpu/mips/Makefile b/cpu/mips/Makefile index 28a1cbb..01810c0 100644 --- a/cpu/mips/Makefile @@ -42844,6599 +8558,6 @@ index 0000000..6c3788f + .byte 0x31 + + .set reorder -diff --git a/cpu/mpc512x/Makefile b/cpu/mpc512x/Makefile -index 297d135..022c676 100644 ---- a/cpu/mpc512x/Makefile -+++ b/cpu/mpc512x/Makefile -@@ -1,5 +1,5 @@ - # --# (C) Copyright 2007 DENX Software Engineering -+# (C) Copyright 2007-2009 DENX Software Engineering - # - # See file CREDITS for list of people who contributed to this - # project. -@@ -22,14 +22,20 @@ - - include $(TOPDIR)/config.mk - -+$(shell mkdir -p $(OBJTREE)/board/freescale/common) -+ - LIB = $(obj)lib$(CPU).a - - START = start.o --COBJS = traps.o cpu.o cpu_init.o speed.o interrupts.o serial.o i2c.o iopin.o --ifdef CONFIG_IIM --COBJS += iim.o --endif -- -+COBJS-y := traps.o cpu.o cpu_init.o speed.o interrupts.o serial.o i2c.o iopin.o -+COBJS-${CONFIG_FSL_DIU_FB} += diu.o -+COBJS-${CONFIG_FSL_DIU_FB} += ../../board/freescale/common/fsl_diu_fb.o -+COBJS-${CONFIG_FSL_DIU_FB} += ../../board/freescale/common/fsl_logo_bmp.o -+COBJS-${CONFIG_CMD_IDE} += ide.o -+COBJS-${CONFIG_IIM} += iim.o -+COBJS-$(CONFIG_PCI) += pci.o -+ -+COBJS := $(COBJS-y) - SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) - OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) - START := $(addprefix $(obj),$(START)) -diff --git a/cpu/mpc512x/asm-offsets.h b/cpu/mpc512x/asm-offsets.h -new file mode 100644 -index 0000000..4b14778 ---- /dev/null -+++ b/cpu/mpc512x/asm-offsets.h -@@ -0,0 +1,15 @@ -+/* -+ * needed for cpu/mpc512x/start.S -+ * -+ * These should be auto-generated -+ */ -+#define LPCS0AW 0x0024 -+#define SRAMBAR 0x00C4 -+#define SWCRR 0x0904 -+#define LPC_OFFSET 0x10000 -+#define CS0_CONFIG 0x00000 -+#define CS_CTRL 0x00020 -+#define CS_CTRL_ME 0x01000000 /* CS Master Enable bit */ -+ -+#define EXC_OFF_SYS_RESET 0x0100 -+#define _START_OFFSET EXC_OFF_SYS_RESET -diff --git a/cpu/mpc512x/config.mk b/cpu/mpc512x/config.mk -index 5b7e1f2..6ab34b1 100644 ---- a/cpu/mpc512x/config.mk -+++ b/cpu/mpc512x/config.mk -@@ -1,5 +1,5 @@ - # --# (C) Copyright 2007 DENX Software Engineering -+# (C) Copyright 2007-2009 DENX Software Engineering - # - # See file CREDITS for list of people who contributed to this - # project. -@@ -23,3 +23,7 @@ PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi - - PLATFORM_CPPFLAGS += -DCONFIG_MPC512X -DCONFIG_E300 \ - -ffixed-r2 -msoft-float -mcpu=603e -+ -+# Use default linker script. -+# A board port can override this setting in board/*/config.mk -+LDSCRIPT := $(SRCTREE)/cpu/mpc512x/u-boot.lds -diff --git a/cpu/mpc512x/cpu.c b/cpu/mpc512x/cpu.c -index 8021bc1..42ccd81 100644 ---- a/cpu/mpc512x/cpu.c -+++ b/cpu/mpc512x/cpu.c -@@ -29,7 +29,6 @@ - - #include - #include --#include - #include - #include - #include -diff --git a/cpu/mpc512x/cpu_init.c b/cpu/mpc512x/cpu_init.c -index fa753c8..fe6beaf 100644 ---- a/cpu/mpc512x/cpu_init.c -+++ b/cpu/mpc512x/cpu_init.c -@@ -1,6 +1,6 @@ - /* - * Copyright (C) 2004-2006 Freescale Semiconductor, Inc. -- * (C) Copyright 2007 DENX Software Engineering -+ * Copyright (C) 2007-2009 DENX Software Engineering - * - * See file CREDITS for list of people who contributed to this - * project. -@@ -25,7 +25,8 @@ - */ - - #include --#include -+#include -+#include - - DECLARE_GLOBAL_DATA_PTR; - -@@ -46,30 +47,34 @@ void cpu_init_f (volatile immap_t * im) - - #ifdef CONFIG_SYS_ACR_PIPE_DEP - /* Arbiter pipeline depth */ -- im->arbiter.acr = (im->arbiter.acr & ~ACR_PIPE_DEP) | -- (CONFIG_SYS_ACR_PIPE_DEP << ACR_PIPE_DEP_SHIFT); -+ out_be32(&im->arbiter.acr, -+ (im->arbiter.acr & ~ACR_PIPE_DEP) | -+ (CONFIG_SYS_ACR_PIPE_DEP << ACR_PIPE_DEP_SHIFT) -+ ); - #endif - - #ifdef CONFIG_SYS_ACR_RPTCNT - /* Arbiter repeat count */ -- im->arbiter.acr = ((im->arbiter.acr & ~(ACR_RPTCNT)) | -- (CONFIG_SYS_ACR_RPTCNT << ACR_RPTCNT_SHIFT)); -+ out_be32(im->arbiter.acr, -+ (im->arbiter.acr & ~(ACR_RPTCNT)) | -+ (CONFIG_SYS_ACR_RPTCNT << ACR_RPTCNT_SHIFT) -+ ); - #endif - - /* RSR - Reset Status Register - clear all status */ - gd->reset_status = im->reset.rsr; -- im->reset.rsr = ~(RSR_RES); -+ out_be32(&im->reset.rsr, ~RSR_RES); - - /* - * RMR - Reset Mode Register - enable checkstop reset - */ -- im->reset.rmr = (RMR_CSRE & (1 << RMR_CSRE_SHIFT)); -+ out_be32(&im->reset.rmr, RMR_CSRE & (1 << RMR_CSRE_SHIFT)); - - /* Set IPS-CSB divider: IPS = 1/2 CSB */ -- ips_div = im->clk.scfr[0]; -+ ips_div = in_be32(&im->clk.scfr[0]); - ips_div &= ~(SCFR1_IPS_DIV_MASK); - ips_div |= SCFR1_IPS_DIV << SCFR1_IPS_DIV_SHIFT; -- im->clk.scfr[0] = ips_div; -+ out_be32(&im->clk.scfr[0], ips_div); - - /* - * Enable Time Base/Decrementer -@@ -78,7 +83,7 @@ void cpu_init_f (volatile immap_t * im) - * have udelay() working; if not enabled, usually leads to a hang, like - * during FLASH chip identification etc. - */ -- im->sysconf.spcr |= SPCR_TBEN; -+ setbits_be32(&im->sysconf.spcr, SPCR_TBEN); - } - - int cpu_init_r (void) -diff --git a/cpu/mpc512x/diu.c b/cpu/mpc512x/diu.c -new file mode 100644 -index 0000000..70849ee ---- /dev/null -+++ b/cpu/mpc512x/diu.c -@@ -0,0 +1,189 @@ -+/* -+ * Copyright 2008 Freescale Semiconductor, Inc. -+ * York Sun -+ * -+ * FSL DIU Framebuffer driver -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+#include -+#include -+ -+#include "../../board/freescale/common/pixis.h" -+#include "../../board/freescale/common/fsl_diu_fb.h" -+ -+#if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) -+#include -+#include -+#endif -+ -+#ifdef CONFIG_FSL_DIU_LOGO_BMP -+extern unsigned int FSL_Logo_BMP[]; -+#else -+#define FSL_Logo_BMP NULL -+#endif -+ -+static int xres, yres; -+ -+void diu_set_pixel_clock(unsigned int pixclock) -+{ -+ volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; -+ volatile clk512x_t *clk = &immap->clk; -+ volatile unsigned int *clkdvdr = &clk->scfr[0]; -+ unsigned long speed_ccb, temp, pixval; -+ -+ speed_ccb = get_bus_freq(0) * 4; -+ temp = 1000000000/pixclock; -+ temp *= 1000; -+ pixval = speed_ccb / temp; -+ debug("DIU pixval = %lu\n", pixval); -+ -+ /* Modify PXCLK in GUTS CLKDVDR */ -+ debug("DIU: Current value of CLKDVDR = 0x%08x\n", *clkdvdr); -+ temp = *clkdvdr & 0xFFFFFF00; -+ *clkdvdr = temp | (pixval & 0xFF); -+ debug("DIU: Modified value of CLKDVDR = 0x%08x\n", *clkdvdr); -+} -+ -+char *valid_bmp(char *addr) -+{ -+ unsigned long h_addr; -+ -+ h_addr = simple_strtoul(addr, NULL, 16); -+ if (h_addr < CONFIG_SYS_FLASH_BASE || -+ h_addr >= (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - 1)) { -+ printf("bmp addr %lx is not a valid flash address\n", h_addr); -+ return 0; -+ } else if ((*(char *)(h_addr) != 'B') || (*(char *)(h_addr+1) != 'M')) { -+ printf("bmp addr is not a bmp\n"); -+ return 0; -+ } else -+ return (char *)h_addr; -+} -+ -+int mpc5121_diu_init(void) -+{ -+ unsigned int pixel_format; -+ char *bmp = NULL; -+ char *bmp_env; -+ -+ xres = 1024; -+ yres = 768; -+ pixel_format = 0x88883316; -+ -+ debug("mpc5121_diu_init\n"); -+ bmp_env = getenv("diu_bmp_addr"); -+ if (bmp_env) { -+ bmp = valid_bmp(bmp_env); -+ } -+ if (!bmp) -+ bmp = (char *)FSL_Logo_BMP; -+ return fsl_diu_init(xres, pixel_format, 0, (unsigned char *)bmp); -+} -+ -+int mpc5121diu_init_show_bmp(cmd_tbl_t *cmdtp, -+ int flag, int argc, char *argv[]) -+{ -+ unsigned int addr; -+ -+ if (argc < 2) { -+ cmd_usage(cmdtp); -+ return 1; -+ } -+ -+ if (!strncmp(argv[1], "init", 4)) { -+#if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) -+ fsl_diu_clear_screen(); -+ drv_video_init(); -+#else -+ return mpc5121_diu_init(); -+#endif -+ } else { -+ addr = simple_strtoul(argv[1], NULL, 16); -+ fsl_diu_clear_screen(); -+ fsl_diu_display_bmp((unsigned char *)addr, 0, 0, 0); -+ } -+ -+ return 0; -+} -+ -+U_BOOT_CMD( -+ diufb, CONFIG_SYS_MAXARGS, 1, mpc5121diu_init_show_bmp, -+ "Init or Display BMP file", -+ "init\n - initialize DIU\n" -+ "addr\n - display bmp at address 'addr'" -+ ); -+ -+ -+#if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) -+ -+/* -+ * The Graphic Device -+ */ -+GraphicDevice ctfb; -+void *video_hw_init(void) -+{ -+ GraphicDevice *pGD = (GraphicDevice *) &ctfb; -+ struct fb_info *info; -+ -+ if (mpc5121_diu_init() < 0) -+ return; -+ -+ /* fill in Graphic device struct */ -+ sprintf(pGD->modeIdent, "%dx%dx%d %ldkHz %ldHz", -+ xres, yres, 32, 64, 60); -+ -+ pGD->frameAdrs = (unsigned int)fsl_fb_open(&info); -+ pGD->winSizeX = xres; -+ pGD->winSizeY = yres - info->logo_height; -+ pGD->plnSizeX = pGD->winSizeX; -+ pGD->plnSizeY = pGD->winSizeY; -+ -+ pGD->gdfBytesPP = 4; -+ pGD->gdfIndex = GDF_32BIT_X888RGB; -+ -+ pGD->isaBase = 0; -+ pGD->pciBase = 0; -+ pGD->memSize = info->screen_size - info->logo_size; -+ -+ /* Cursor Start Address */ -+ pGD->dprBase = 0; -+ pGD->vprBase = 0; -+ pGD->cprBase = 0; -+ -+ return (void *)pGD; -+} -+ -+/** -+ * Set the LUT -+ * -+ * @index: color number -+ * @r: red -+ * @b: blue -+ * @g: green -+ */ -+void video_set_lut -+ (unsigned int index, unsigned char r, unsigned char g, unsigned char b) -+{ -+ return; -+} -+ -+#endif /* defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) */ -diff --git a/cpu/mpc512x/i2c.c b/cpu/mpc512x/i2c.c -index 4f6bc86..e2d9097 100644 ---- a/cpu/mpc512x/i2c.c -+++ b/cpu/mpc512x/i2c.c -@@ -1,5 +1,5 @@ - /* -- * (C) Copyright 2003 - 2007 -+ * (C) Copyright 2003 - 2009 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this -@@ -24,18 +24,16 @@ - */ - - #include -+#include - - DECLARE_GLOBAL_DATA_PTR; - - #ifdef CONFIG_HARD_I2C - --#include - #include - --#define immr ((immap_t *)CONFIG_SYS_IMMR) -- - /* by default set I2C bus 0 active */ --static unsigned int bus_num = 0; -+static unsigned int bus_num __attribute__ ((section (".data"))) = 0; - - #define I2C_TIMEOUT 100 - #define I2C_RETRIES 3 -@@ -56,29 +54,24 @@ static int mpc_get_fdr(int); - - static int mpc_reg_in (volatile u32 *reg) - { -- int ret = *reg >> 24; -- __asm__ __volatile__ ("eieio"); -+ int ret = in_be32(reg) >> 24; -+ - return ret; - } - - static void mpc_reg_out (volatile u32 *reg, int val, int mask) - { -- int tmp; -- - if (!mask) { -- *reg = val << 24; -+ out_be32(reg, val << 24); - } else { -- tmp = mpc_reg_in (reg); -- *reg = ((tmp & ~mask) | (val & mask)) << 24; -+ clrsetbits_be32(reg, mask << 24, (val & mask) << 24); - } -- __asm__ __volatile__ ("eieio"); -- -- return; - } - - static int wait_for_bb (void) - { -- i2c512x_dev_t *regs = &immr->i2c.dev[bus_num]; -+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; -+ volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num]; - int timeout = I2C_TIMEOUT; - int status; - -@@ -101,7 +94,8 @@ static int wait_for_bb (void) - - static int wait_for_pin (int *status) - { -- i2c512x_dev_t *regs = &immr->i2c.dev[bus_num]; -+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; -+ volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num]; - int timeout = I2C_TIMEOUT; - - *status = mpc_reg_in (®s->msr); -@@ -122,7 +116,8 @@ static int wait_for_pin (int *status) - - static int do_address (uchar chip, char rdwr_flag) - { -- i2c512x_dev_t *regs = &immr->i2c.dev[bus_num]; -+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; -+ volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num]; - int status; - - chip <<= 1; -@@ -147,7 +142,8 @@ static int do_address (uchar chip, char rdwr_flag) - - static int send_bytes (uchar chip, char *buf, int len) - { -- i2c512x_dev_t *regs = &immr->i2c.dev[bus_num]; -+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; -+ volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num]; - int wrcount; - int status; - -@@ -170,7 +166,8 @@ static int send_bytes (uchar chip, char *buf, int len) - - static int receive_bytes (uchar chip, char *buf, int len) - { -- i2c512x_dev_t *regs = &immr->i2c.dev[bus_num]; -+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; -+ volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num]; - int dummy = 1; - int rdcount = 0; - int status; -@@ -208,9 +205,12 @@ static int receive_bytes (uchar chip, char *buf, int len) - - void i2c_init (int speed, int saddr) - { -+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; - int i; -- for(i = 0; i < I2C_BUS_CNT; i++){ -- i2c512x_dev_t *regs = &immr->i2c.dev[i]; -+ -+ for (i = 0; i < I2C_BUS_CNT; i++){ -+ volatile i2c512x_dev_t *regs = &im->i2c.dev[i]; -+ - mpc_reg_out (®s->mcr, 0, 0); - - /* Set clock */ -@@ -223,10 +223,10 @@ void i2c_init (int speed, int saddr) - } - - /* Disable interrupts */ -- immr->i2c.icr = 0; -+ out_be32(&im->i2c.icr, 0); -+ - /* Turn off filters */ -- immr->i2c.mifr = 0; -- return; -+ out_be32(&im->i2c.mifr, 0); - } - - static int mpc_get_fdr (int speed) -@@ -281,7 +281,8 @@ static int mpc_get_fdr (int speed) - - int i2c_probe (uchar chip) - { -- i2c512x_dev_t *regs = &immr->i2c.dev[bus_num]; -+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; -+ volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num]; - int i; - - for (i = 0; i < I2C_RETRIES; i++) { -@@ -302,8 +303,9 @@ int i2c_probe (uchar chip) - - int i2c_read (uchar chip, uint addr, int alen, uchar *buf, int len) - { -+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; -+ volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num]; - char xaddr[4]; -- i2c512x_dev_t *regs = &immr->i2c.dev[bus_num]; - int ret = -1; - - xaddr[0] = (addr >> 24) & 0xFF; -@@ -346,8 +348,9 @@ Done: - - int i2c_write (uchar chip, uint addr, int alen, uchar *buf, int len) - { -+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; -+ volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num]; - char xaddr[4]; -- i2c512x_dev_t *regs = &immr->i2c.dev[bus_num]; - int ret = -1; - - xaddr[0] = (addr >> 24) & 0xFF; -@@ -397,18 +400,4 @@ unsigned int i2c_get_bus_num (void) - return bus_num; - } - --/* TODO */ --unsigned int i2c_get_bus_speed (void) --{ -- return -1; --} -- --int i2c_set_bus_speed (unsigned int speed) --{ -- if (speed != CONFIG_SYS_I2C_SPEED) -- return -1; -- -- return 0; --} -- - #endif /* CONFIG_HARD_I2C */ -diff --git a/cpu/mpc512x/ide.c b/cpu/mpc512x/ide.c -new file mode 100644 -index 0000000..dd6b2f4 ---- /dev/null -+++ b/cpu/mpc512x/ide.c -@@ -0,0 +1,128 @@ -+/* -+ * (C) Copyright 2007-2009 DENX Software Engineering -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+ -+DECLARE_GLOBAL_DATA_PTR; -+ -+#if defined(CONFIG_IDE_RESET) -+ -+void ide_set_reset (int idereset) -+{ -+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; -+ debug ("ide_set_reset(%d)\n", idereset); -+ -+ if (idereset) { -+ out_be32(&im->pata.pata_ata_control, 0); -+ } else { -+ out_be32(&im->pata.pata_ata_control, FSL_ATA_CTRL_ATA_RST_B); -+ } -+ udelay(100); -+} -+ -+void init_ide_reset (void) -+{ -+ debug ("init_ide_reset\n"); -+ -+ /* -+ * Clear the reset bit to reset the interface -+ * cf. RefMan MPC5121EE: 28.4.1 Resetting the ATA Bus -+ */ -+ ide_set_reset(1); -+ -+ /* Assert the reset bit to enable the interface */ -+ ide_set_reset(0); -+ -+} -+ -+#define CALC_TIMING(t) (t + period - 1) / period -+ -+int ide_preinit (void) -+{ -+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; -+ long t; -+ const struct { -+ short t0; -+ short t1; -+ short t2_8; -+ short t2_16; -+ short t2i; -+ short t4; -+ short t9; -+ short tA; -+ } pio_specs = { -+ .t0 = 600, -+ .t1 = 70, -+ .t2_8 = 290, -+ .t2_16 = 165, -+ .t2i = 0, -+ .t4 = 30, -+ .t9 = 20, -+ .tA = 50, -+ }; -+ union { -+ u32 config; -+ struct { -+ u8 field1; -+ u8 field2; -+ u8 field3; -+ u8 field4; -+ }bytes; -+ } cfg; -+ -+ debug ("IDE preinit using PATA peripheral at IMMR-ADDR %08x\n", -+ (u32)&im->pata); -+ -+ /* Set the reset bit to 1 to enable the interface */ -+ ide_set_reset(0); -+ -+ /* Init timings : we use PIO mode 0 timings */ -+ t = 1000000000 / gd->ips_clk; /* period in ns */ -+ cfg.bytes.field1 = 3; -+ cfg.bytes.field2 = 3; -+ cfg.bytes.field3 = (pio_specs.t1 + t) / t; -+ cfg.bytes.field4 = (pio_specs.t2_8 + t) / t; -+ -+ out_be32(&im->pata.pata_time1, cfg.config); -+ -+ cfg.bytes.field1 = (pio_specs.t2_8 + t) / t; -+ cfg.bytes.field2 = (pio_specs.tA + t) / t + 2; -+ cfg.bytes.field3 = 1; -+ cfg.bytes.field4 = (pio_specs.t4 + t) / t; -+ -+ out_be32(&im->pata.pata_time2, cfg.config); -+ -+ cfg.config = in_be32(&im->pata.pata_time3); -+ cfg.bytes.field1 = (pio_specs.t9 + t) / t; -+ -+ out_be32(&im->pata.pata_time3, cfg.config); -+ -+ debug ("PATA preinit complete.\n"); -+ -+ return 0; -+} -+ -+#endif /* defined(CONFIG_IDE_RESET) */ -diff --git a/cpu/mpc512x/iim.c b/cpu/mpc512x/iim.c -index 6cdc422..8f2eb37 100644 ---- a/cpu/mpc512x/iim.c -+++ b/cpu/mpc512x/iim.c -@@ -389,6 +389,6 @@ U_BOOT_CMD( - " no args for entire bank\n" - "fuse prog - program fuse at row , bit <_bit>\n" - " is 0-31, is 0-7; eg. 13_2 \n" -- " WARNING - this is permanent\n" -- ); -+ " WARNING - this is permanent" -+); - #endif /* CONFIG_CMD_FUSE */ -diff --git a/cpu/mpc512x/iopin.c b/cpu/mpc512x/iopin.c -index 78f4fa1..be20947 100644 ---- a/cpu/mpc512x/iopin.c -+++ b/cpu/mpc512x/iopin.c -@@ -23,15 +23,15 @@ - - #include - #include --#include -+#include - - void iopin_initialize(iopin_t *ioregs_init, int len) - { - short i, j, p; -- u_long *reg; -+ u32 *reg; - immap_t *im = (immap_t *)CONFIG_SYS_IMMR; - -- reg = (u_long *)&(im->io_ctrl.regs[0]); -+ reg = (u32 *)&(im->io_ctrl); - - if (sizeof(ioregs_init) == 0) - return; -@@ -40,9 +40,9 @@ void iopin_initialize(iopin_t *ioregs_init, int len) - for (p = 0, j = ioregs_init[i].p_offset / sizeof(u_long); - p < ioregs_init[i].nr_pins; p++, j++) { - if (ioregs_init[i].bit_or) -- reg[j] |= ioregs_init[i].val; -+ setbits_be32(reg + j, ioregs_init[i].val); - else -- reg[j] = ioregs_init[i].val; -+ out_be32 (reg + j, ioregs_init[i].val); - } - } - return; -diff --git a/cpu/mpc512x/pci.c b/cpu/mpc512x/pci.c -new file mode 100644 -index 0000000..166a993 ---- /dev/null -+++ b/cpu/mpc512x/pci.c -@@ -0,0 +1,227 @@ -+/* -+ * Copyright (C) Freescale Semiconductor, Inc. 2006, 2007. All rights reserved. -+ * Copyright (C) 2009 DENX Software Engineering -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+ -+#include -+#include -+#include -+#include -+#if defined(CONFIG_OF_LIBFDT) -+#include -+#include -+#endif -+ -+DECLARE_GLOBAL_DATA_PTR; -+ -+/* System RAM mapped to PCI space */ -+#define CONFIG_PCI_SYS_MEM_BUS CONFIG_SYS_SDRAM_BASE -+#define CONFIG_PCI_SYS_MEM_PHYS CONFIG_SYS_SDRAM_BASE -+ -+static struct pci_controller pci_hose; -+ -+ -+/************************************************************************** -+ * pci_init_board() -+ * -+ */ -+void -+pci_init_board(void) -+{ -+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; -+ volatile law512x_t *pci_law; -+ volatile pot512x_t *pci_pot; -+ volatile pcictrl512x_t *pci_ctrl; -+ volatile pciconf512x_t *pci_conf; -+ u16 reg16; -+ u32 reg32; -+ u32 dev; -+ int i; -+ struct pci_controller *hose; -+ -+ /* Set PCI divider for 33MHz */ -+ reg32 = im->clk.scfr[0]; -+ reg32 &= ~(SCFR1_PCI_DIV_MASK); -+ reg32 |= SCFR1_PCI_DIV << SCFR1_PCI_DIV_SHIFT; -+ im->clk.scfr[0] = reg32; -+ -+ clrsetbits_be32(&im->clk.scfr[0], -+ SCFR1_PCI_DIV_MASK, -+ SCFR1_PCI_DIV << SCFR1_PCI_DIV_SHIFT -+ ); -+ -+ pci_law = im->sysconf.pcilaw; -+ pci_pot = im->ios.pot; -+ pci_ctrl = &im->pci_ctrl; -+ pci_conf = &im->pci_conf; -+ -+ hose = &pci_hose; -+ -+ /* -+ * Release PCI RST Output signal -+ */ -+ out_be32(&pci_ctrl->gcr, 0); -+ udelay(2000); -+ out_be32(&pci_ctrl->gcr, 1); -+ -+ /* We need to wait at least a 1sec based on PCI specs */ -+ for (i = 0; i < 1000; i++) -+ udelay(1000); -+ -+ /* -+ * Configure PCI Local Access Windows -+ */ -+ out_be32(&pci_law[0].bar, CONFIG_SYS_PCI_MEM_PHYS & LAWBAR_BAR); -+ out_be32(&pci_law[0].ar, LAWAR_EN | LAWAR_SIZE_512M); -+ -+ out_be32(&pci_law[1].bar, CONFIG_SYS_PCI_IO_PHYS & LAWBAR_BAR); -+ out_be32(&pci_law[1].ar, LAWAR_EN | LAWAR_SIZE_16M); -+ -+ /* -+ * Configure PCI Outbound Translation Windows -+ */ -+ -+ /* PCI mem space - prefetch */ -+ out_be32(&pci_pot[0].potar, -+ (CONFIG_SYS_PCI_MEM_BASE >> 12) & POTAR_TA_MASK); -+ out_be32(&pci_pot[0].pobar, -+ (CONFIG_SYS_PCI_MEM_PHYS >> 12) & POBAR_BA_MASK); -+ out_be32(&pci_pot[0].pocmr, -+ POCMR_EN | POCMR_PRE | POCMR_CM_256M); -+ -+ /* PCI IO space */ -+ out_be32(&pci_pot[1].potar, -+ (CONFIG_SYS_PCI_IO_BASE >> 12) & POTAR_TA_MASK); -+ out_be32(&pci_pot[1].pobar, -+ (CONFIG_SYS_PCI_IO_PHYS >> 12) & POBAR_BA_MASK); -+ out_be32(&pci_pot[1].pocmr, -+ POCMR_EN | POCMR_IO | POCMR_CM_16M); -+ -+ /* PCI mmio - non-prefetch mem space */ -+ out_be32(&pci_pot[2].potar, -+ (CONFIG_SYS_PCI_MMIO_BASE >> 12) & POTAR_TA_MASK); -+ out_be32(&pci_pot[2].pobar, -+ (CONFIG_SYS_PCI_MMIO_PHYS >> 12) & POBAR_BA_MASK); -+ out_be32(&pci_pot[2].pocmr, -+ POCMR_EN | POCMR_CM_256M); -+ -+ /* -+ * Configure PCI Inbound Translation Windows -+ */ -+ -+ /* we need RAM mapped to PCI space for the devices to -+ * access main memory */ -+ out_be32(&pci_ctrl[0].pitar1, 0x0); -+ out_be32(&pci_ctrl[0].pibar1, 0x0); -+ out_be32(&pci_ctrl[0].piebar1, 0x0); -+ out_be32(&pci_ctrl[0].piwar1, -+ PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP | -+ PIWAR_WTT_SNOOP | (__ilog2(gd->ram_size) - 1)); -+ -+ hose->first_busno = 0; -+ hose->last_busno = 0xff; -+ -+ /* PCI memory prefetch space */ -+ pci_set_region(hose->regions + 0, -+ CONFIG_SYS_PCI_MEM_BASE, -+ CONFIG_SYS_PCI_MEM_PHYS, -+ CONFIG_SYS_PCI_MEM_SIZE, -+ PCI_REGION_MEM|PCI_REGION_PREFETCH); -+ -+ /* PCI memory space */ -+ pci_set_region(hose->regions + 1, -+ CONFIG_SYS_PCI_MMIO_BASE, -+ CONFIG_SYS_PCI_MMIO_PHYS, -+ CONFIG_SYS_PCI_MMIO_SIZE, -+ PCI_REGION_MEM); -+ -+ /* PCI IO space */ -+ pci_set_region(hose->regions + 2, -+ CONFIG_SYS_PCI_IO_BASE, -+ CONFIG_SYS_PCI_IO_PHYS, -+ CONFIG_SYS_PCI_IO_SIZE, -+ PCI_REGION_IO); -+ -+ /* System memory space */ -+ pci_set_region(hose->regions + 3, -+ CONFIG_PCI_SYS_MEM_BUS, -+ CONFIG_PCI_SYS_MEM_PHYS, -+ gd->ram_size, -+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); -+ -+ hose->region_count = 4; -+ -+ pci_setup_indirect(hose, -+ (CONFIG_SYS_IMMR + 0x8300), -+ (CONFIG_SYS_IMMR + 0x8304)); -+ -+ pci_register_hose(hose); -+ -+ /* -+ * Write to Command register -+ */ -+ reg16 = 0xff; -+ dev = PCI_BDF(hose->first_busno, 0, 0); -+ pci_hose_read_config_word(hose, dev, PCI_COMMAND, ®16); -+ reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; -+ pci_hose_write_config_word(hose, dev, PCI_COMMAND, reg16); -+ -+ /* -+ * Clear non-reserved bits in status register. -+ */ -+ pci_hose_write_config_word(hose, dev, PCI_STATUS, 0xffff); -+ pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80); -+ pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, 0x08); -+ -+#ifdef CONFIG_PCI_SCAN_SHOW -+ printf("PCI: Bus Dev VenId DevId Class Int\n"); -+#endif -+ /* -+ * Hose scan. -+ */ -+ hose->last_busno = pci_hose_scan(hose); -+} -+ -+#if defined(CONFIG_OF_LIBFDT) -+void ft_pci_setup(void *blob, bd_t *bd) -+{ -+ int nodeoffset; -+ int tmp[2]; -+ const char *path; -+ -+ nodeoffset = fdt_path_offset(blob, "/aliases"); -+ if (nodeoffset >= 0) { -+ path = fdt_getprop(blob, nodeoffset, "pci", NULL); -+ if (path) { -+ tmp[0] = cpu_to_be32(pci_hose.first_busno); -+ tmp[1] = cpu_to_be32(pci_hose.last_busno); -+ do_fixup_by_path(blob, path, "bus-range", -+ &tmp, sizeof(tmp), 1); -+ -+ tmp[0] = cpu_to_be32(gd->pci_clk); -+ do_fixup_by_path(blob, path, "clock-frequency", -+ &tmp, sizeof(tmp[0]), 1); -+ } -+ } -+} -+#endif /* CONFIG_OF_LIBFDT */ -diff --git a/cpu/mpc512x/serial.c b/cpu/mpc512x/serial.c -index 7db87a8..4fc4693 100644 ---- a/cpu/mpc512x/serial.c -+++ b/cpu/mpc512x/serial.c -@@ -1,5 +1,5 @@ - /* -- * (C) Copyright 2000 - 2007 -+ * (C) Copyright 2000 - 2009 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this -@@ -30,6 +30,8 @@ - */ - - #include -+#include -+#include - - DECLARE_GLOBAL_DATA_PTR; - -@@ -40,66 +42,73 @@ static void fifo_init (volatile psc512x_t *psc) - volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; - - /* reset Rx & Tx fifo slice */ -- psc->rfcmd = PSC_FIFO_RESET_SLICE; -- psc->tfcmd = PSC_FIFO_RESET_SLICE; -+ out_be32(&psc->rfcmd, PSC_FIFO_RESET_SLICE); -+ out_be32(&psc->tfcmd, PSC_FIFO_RESET_SLICE); - - /* disable Tx & Rx FIFO interrupts */ -- psc->rfintmask = 0; -- psc->tfintmask = 0; -+ out_be32(&psc->rfintmask, 0); -+ out_be32(&psc->tfintmask, 0); - -- psc->tfsize = CONSOLE_FIFO_TX_SIZE | (CONSOLE_FIFO_TX_ADDR << 16); -- psc->rfsize = CONSOLE_FIFO_RX_SIZE | (CONSOLE_FIFO_RX_ADDR << 16); -+ out_be32(&psc->tfsize, CONSOLE_FIFO_TX_SIZE | (CONSOLE_FIFO_TX_ADDR << 16)); -+ out_be32(&psc->rfsize, CONSOLE_FIFO_RX_SIZE | (CONSOLE_FIFO_RX_ADDR << 16)); - - /* enable Tx & Rx FIFO slice */ -- psc->rfcmd = PSC_FIFO_ENABLE_SLICE; -- psc->tfcmd = PSC_FIFO_ENABLE_SLICE; -+ out_be32(&psc->rfcmd, PSC_FIFO_ENABLE_SLICE); -+ out_be32(&psc->tfcmd, PSC_FIFO_ENABLE_SLICE); - -- im->fifoc.fifoc_cmd = FIFOC_DISABLE_CLOCK_GATE; -+ out_be32(&im->fifoc.fifoc_cmd, FIFOC_DISABLE_CLOCK_GATE); - __asm__ volatile ("sync"); - } - -+void serial_setbrg(void) -+{ -+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; -+ volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE]; -+ unsigned long baseclk, div; -+ -+ /* calculate dividor for setting PSC CTUR and CTLR registers */ -+ baseclk = (gd->ips_clk + 8) / 16; -+ div = (baseclk + (gd->baudrate / 2)) / gd->baudrate; -+ -+ out_8(&psc->ctur, (div >> 8) & 0xff); -+ out_8(&psc->ctlr, div & 0xff); /* set baudrate */ -+} -+ - int serial_init(void) - { - volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; - volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE]; -- unsigned long baseclk; -- int div; - - fifo_init (psc); - - /* set MR register to point to MR1 */ -- psc->command = PSC_SEL_MODE_REG_1; -+ out_8(&psc->command, PSC_SEL_MODE_REG_1); - - /* disable Tx/Rx */ -- psc->command = PSC_TX_DISABLE | PSC_RX_DISABLE; -+ out_8(&psc->command, PSC_TX_DISABLE | PSC_RX_DISABLE); - - /* choose the prescaler by 16 for the Tx/Rx clock generation */ -- psc->psc_clock_select = 0xdd00; -+ out_be16(&psc->psc_clock_select, 0xdd00); - - /* switch to UART mode */ -- psc->sicr = 0; -+ out_be32(&psc->sicr, 0); - - /* mode register points to mr1 */ - /* configure parity, bit length and so on in mode register 1*/ -- psc->mode = PSC_MODE_8_BITS | PSC_MODE_PARNONE; -+ out_8(&psc->mode, PSC_MODE_8_BITS | PSC_MODE_PARNONE); - /* now, mode register points to mr2 */ -- psc->mode = PSC_MODE_1_STOPBIT; -- -- /* calculate dividor for setting PSC CTUR and CTLR registers */ -- baseclk = (gd->ips_clk + 8) / 16; -- div = (baseclk + (gd->baudrate / 2)) / gd->baudrate; -+ out_8(&psc->mode, PSC_MODE_1_STOPBIT); - -- psc->ctur = (div >> 8) & 0xff; - /* set baudrate */ -- psc->ctlr = div & 0xff; -+ serial_setbrg(); - - /* disable all interrupts */ -- psc->psc_imr = 0; -+ out_be16(&psc->psc_imr, 0); - - /* reset and enable Rx/Tx */ -- psc->command = PSC_RST_RX; -- psc->command = PSC_RST_TX; -- psc->command = PSC_RX_ENABLE | PSC_TX_ENABLE; -+ out_8(&psc->command, PSC_RST_RX); -+ out_8(&psc->command, PSC_RST_TX); -+ out_8(&psc->command, PSC_RX_ENABLE | PSC_TX_ENABLE); - - return 0; - } -@@ -113,7 +122,7 @@ void serial_putc (const char c) - serial_putc ('\r'); - - /* Wait for last character to go. */ -- while (!(psc->psc_status & PSC_SR_TXEMP)) -+ while (!(in_be16(&psc->psc_status) & PSC_SR_TXEMP)) - ; - - psc->tfdata_8 = c; -@@ -125,7 +134,7 @@ void serial_putc_raw (const char c) - volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE]; - - /* Wait for last character to go. */ -- while (!(psc->psc_status & PSC_SR_TXEMP)) -+ while (!(in_be16(&psc->psc_status) & PSC_SR_TXEMP)) - ; - - psc->tfdata_8 = c; -@@ -145,7 +154,7 @@ int serial_getc (void) - volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE]; - - /* Wait for a character to arrive. */ -- while (psc->rfstat & PSC_FIFO_EMPTY) -+ while (in_be32(&psc->rfstat) & PSC_FIFO_EMPTY) - ; - - return psc->rfdata_8; -@@ -156,20 +165,7 @@ int serial_tstc (void) - volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; - volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE]; - -- return !(psc->rfstat & PSC_FIFO_EMPTY); --} -- --void serial_setbrg (void) --{ -- volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; -- volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE]; -- unsigned long baseclk, div; -- -- baseclk = (gd->csb_clk + 8) / 16; -- div = (baseclk + (gd->baudrate / 2)) / gd->baudrate; -- -- psc->ctur = (div >> 8) & 0xFF; -- psc->ctlr = div & 0xff; /* set baudrate */ -+ return !(in_be32(&psc->rfstat) & PSC_FIFO_EMPTY); - } - - void serial_setrts(int s) -@@ -179,11 +175,11 @@ void serial_setrts(int s) - - if (s) { - /* Assert RTS (become LOW) */ -- psc->op1 = 0x1; -+ out_8(&psc->op1, 0x1); - } - else { - /* Negate RTS (become HIGH) */ -- psc->op0 = 0x1; -+ out_8(&psc->op0, 0x1); - } - } - -@@ -192,6 +188,6 @@ int serial_getcts(void) - volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; - volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE]; - -- return (psc->ip & 0x1) ? 0 : 1; -+ return (in_8(&psc->ip) & 0x1) ? 0 : 1; - } - #endif /* CONFIG_PSC_CONSOLE */ -diff --git a/cpu/mpc512x/speed.c b/cpu/mpc512x/speed.c -index 5992111..ce8d094 100644 ---- a/cpu/mpc512x/speed.c -+++ b/cpu/mpc512x/speed.c -@@ -1,5 +1,5 @@ - /* -- * (C) Copyright 2000-2007 -+ * (C) Copyright 2000-2009 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * Copyright (C) 2004-2006 Freescale Semiconductor, Inc. -@@ -26,8 +26,8 @@ - */ - - #include --#include - #include -+#include - #include - - DECLARE_GLOBAL_DATA_PTR; -@@ -75,29 +75,37 @@ int get_clocks (void) - u32 csb_clk; - u32 ips_clk; - u32 pci_clk; -+ u32 reg; - -- if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) -+ reg = in_be32(&im->sysconf.immrbar); -+ if ((reg & IMMRBAR_BASE_ADDR) != (u32) im) - return -1; - -- spmf = (im->clk.spmr & SPMR_SPMF) >> SPMR_SPMF_SHIFT; -+ reg = in_be32(&im->clk.spmr); -+ spmf = (reg & SPMR_SPMF) >> SPMR_SPMF_SHIFT; - spll = ref_clk * spmf_mult[spmf]; - -- sys_div = (im->clk.scfr[1] & SCFR2_SYS_DIV) >> SCFR2_SYS_DIV_SHIFT; -+ reg = in_be32(&im->clk.scfr[1]); -+ sys_div = (reg & SCFR2_SYS_DIV) >> SCFR2_SYS_DIV_SHIFT; - sys_clk = (spll * sys_dividors[sys_div][1]) / sys_dividors[sys_div][0]; - - csb_clk = sys_clk / 2; - -- cpmf = (im->clk.spmr & SPMR_CPMF) >> SPMR_CPMF_SHIFT; -+ reg = in_be32(&im->clk.spmr); -+ cpmf = (reg & SPMR_CPMF) >> SPMR_CPMF_SHIFT; - core_clk = (csb_clk * cpmf_mult[cpmf][0]) / cpmf_mult[cpmf][1]; - -- ips_div = (im->clk.scfr[0] & SCFR1_IPS_DIV_MASK) >> SCFR1_IPS_DIV_SHIFT; -+ reg = in_be32(&im->clk.scfr[0]); -+ ips_div = (reg & SCFR1_IPS_DIV_MASK) >> SCFR1_IPS_DIV_SHIFT; - if (ips_div != 0) { - ips_clk = csb_clk / ips_div; - } else { - /* in case we cannot get a sane IPS divisor, fail gracefully */ - ips_clk = 0; - } -- pci_div = (im->clk.scfr[0] & SCFR1_PCI_DIV_MASK) >> SCFR1_PCI_DIV_SHIFT; -+ -+ reg = in_be32(&im->clk.scfr[0]); -+ pci_div = (reg & SCFR1_PCI_DIV_MASK) >> SCFR1_PCI_DIV_SHIFT; - if (pci_div != 0) { - pci_clk = csb_clk / pci_div; - } else { -@@ -138,7 +146,7 @@ int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - - U_BOOT_CMD(clocks, 1, 0, do_clocks, - "print clock configuration", -- " clocks\n" -+ " clocks" - ); - - int prt_mpc512x_clks (void) -diff --git a/cpu/mpc512x/start.S b/cpu/mpc512x/start.S -index 360682d..178e5d1 100644 ---- a/cpu/mpc512x/start.S -+++ b/cpu/mpc512x/start.S -@@ -1,7 +1,7 @@ - /* - * Copyright (C) 1998 Dan Malek - * Copyright (C) 1999 Magnus Damm -- * Copyright (C) 2000, 2001, 2002, 2007 Wolfgang Denk -+ * Copyright (C) 2000-2009 Wolfgang Denk - * Copyright Freescale Semiconductor, Inc. 2004, 2006. All rights reserved. - * - * See file CREDITS for list of people who contributed to this -@@ -30,12 +30,14 @@ - */ - - #include --#include - #include - #include - - #define CONFIG_521X 1 /* needed for Linux kernel header files*/ - -+#include -+#include "asm-offsets.h" -+ - #include - #include - -diff --git a/cpu/mpc512x/u-boot.lds b/cpu/mpc512x/u-boot.lds -new file mode 100644 -index 0000000..dae3269 ---- /dev/null -+++ b/cpu/mpc512x/u-boot.lds -@@ -0,0 +1,121 @@ -+/* -+ * (C) Copyright 2007 DENX Software Engineering. -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+OUTPUT_ARCH(powerpc) -+SECTIONS -+{ -+ /* Read-only sections, merged into text segment: */ -+ . = + SIZEOF_HEADERS; -+ .interp : { *(.interp) } -+ .hash : { *(.hash) } -+ .dynsym : { *(.dynsym) } -+ .dynstr : { *(.dynstr) } -+ .rel.text : { *(.rel.text) } -+ .rela.text : { *(.rela.text) } -+ .rel.data : { *(.rel.data) } -+ .rela.data : { *(.rela.data) } -+ .rel.rodata : { *(.rel.rodata) } -+ .rela.rodata : { *(.rela.rodata) } -+ .rel.got : { *(.rel.got) } -+ .rela.got : { *(.rela.got) } -+ .rel.ctors : { *(.rel.ctors) } -+ .rela.ctors : { *(.rela.ctors) } -+ .rel.dtors : { *(.rel.dtors) } -+ .rela.dtors : { *(.rela.dtors) } -+ .rel.bss : { *(.rel.bss) } -+ .rela.bss : { *(.rela.bss) } -+ .rel.plt : { *(.rel.plt) } -+ .rela.plt : { *(.rela.plt) } -+ .init : { *(.init) } -+ .plt : { *(.plt) } -+ .text : -+ { -+ cpu/mpc512x/start.o (.text) -+ *(.text) -+ *(.fixup) -+ *(.got1) -+ . = ALIGN(16); -+ *(.eh_frame) -+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) -+ } -+ .fini : { *(.fini) } =0 -+ .ctors : { *(.ctors) } -+ .dtors : { *(.dtors) } -+ -+ /* Read-write section, merged into data segment: */ -+ . = (. + 0x0FFF) & 0xFFFFF000; -+ _erotext = .; -+ PROVIDE (erotext = .); -+ .reloc : -+ { -+ *(.got) -+ _GOT2_TABLE_ = .; -+ *(.got2) -+ _FIXUP_TABLE_ = .; -+ *(.fixup) -+ } -+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2; -+ __fixup_entries = (. - _FIXUP_TABLE_) >> 2; -+ -+ .data : -+ { -+ *(.data) -+ *(.data1) -+ *(.sdata) -+ *(.sdata2) -+ *(.dynamic) -+ CONSTRUCTORS -+ } -+ _edata = .; -+ PROVIDE (edata = .); -+ -+ . = .; -+ __u_boot_cmd_start = .; -+ .u_boot_cmd : { *(.u_boot_cmd) } -+ __u_boot_cmd_end = .; -+ -+ -+ . = .; -+ __start___ex_table = .; -+ __ex_table : { *(__ex_table) } -+ __stop___ex_table = .; -+ -+ . = ALIGN(4096); -+ __init_begin = .; -+ .text.init : { *(.text.init) } -+ .data.init : { *(.data.init) } -+ . = ALIGN(4096); -+ __init_end = .; -+ -+ __bss_start = .; -+ .bss (NOLOAD) : -+ { -+ *(.sbss) *(.scommon) -+ *(.dynbss) -+ *(.bss) -+ *(COMMON) -+ . = ALIGN(4); -+ } -+ _end = . ; -+ PROVIDE (end = .); -+} -+ENTRY(_start) -diff --git a/cpu/mpc8260/i2c.c b/cpu/mpc8260/i2c.c -index 35cf8f1..d2bdcc2 100644 ---- a/cpu/mpc8260/i2c.c -+++ b/cpu/mpc8260/i2c.c -@@ -58,9 +58,6 @@ static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = 0; - #define CONFIG_SYS_I2C_SPEED 50000 - #endif - --#ifndef CONFIG_SYS_I2C_SLAVE --#define CONFIG_SYS_I2C_SLAVE 0xFE --#endif - /*----------------------------------------------------------------------- - */ - -@@ -783,19 +780,6 @@ int i2c_set_bus_num(unsigned int bus) - #endif - return 0; - } --/* TODO: add 100/400k switching */ --unsigned int i2c_get_bus_speed(void) --{ -- return CONFIG_SYS_I2C_SPEED; --} -- --int i2c_set_bus_speed(unsigned int speed) --{ -- if (speed != CONFIG_SYS_I2C_SPEED) -- return -1; -- -- return 0; --} - - #endif /* CONFIG_I2C_MULTI_BUS */ - #endif /* CONFIG_HARD_I2C */ -diff --git a/cpu/mpc83xx/config.mk b/cpu/mpc83xx/config.mk -index 2f0f1ce..d619426 100644 ---- a/cpu/mpc83xx/config.mk -+++ b/cpu/mpc83xx/config.mk -@@ -22,7 +22,7 @@ - - PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi - --PLATFORM_CPPFLAGS += -DCONFIG_MPC83XX -DCONFIG_E300 \ -+PLATFORM_CPPFLAGS += -DCONFIG_MPC83xx -DCONFIG_E300 \ - -ffixed-r2 -msoft-float - - # Use default linker script. Board port can override in board/*/config.mk -diff --git a/cpu/mpc83xx/cpu.c b/cpu/mpc83xx/cpu.c -index 876f5c7..c4331ae 100644 ---- a/cpu/mpc83xx/cpu.c -+++ b/cpu/mpc83xx/cpu.c -@@ -367,24 +367,10 @@ int dma_xfer(void *dest, u32 count, void *src) - */ - int cpu_eth_init(bd_t *bis) - { --#if defined(CONFIG_UEC_ETH1) -- uec_initialize(0); --#endif --#if defined(CONFIG_UEC_ETH2) -- uec_initialize(1); --#endif --#if defined(CONFIG_UEC_ETH3) -- uec_initialize(2); --#endif --#if defined(CONFIG_UEC_ETH4) -- uec_initialize(3); --#endif --#if defined(CONFIG_UEC_ETH5) -- uec_initialize(4); --#endif --#if defined(CONFIG_UEC_ETH6) -- uec_initialize(5); -+#if defined(CONFIG_UEC_ETH) -+ uec_standard_init(bis); - #endif -+ - #if defined(CONFIG_TSEC_ENET) - tsec_standard_init(bis); - #endif -diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c -index 8e9c875..414565c 100644 ---- a/cpu/mpc83xx/cpu_init.c -+++ b/cpu/mpc83xx/cpu_init.c -@@ -1,5 +1,5 @@ - /* -- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. -+ * Copyright (C) 2004-2009 Freescale Semiconductor, Inc. - * - * See file CREDITS for list of people who contributed to this - * project. -@@ -23,6 +23,10 @@ - #include - #include - #include -+#ifdef CONFIG_USB_EHCI_FSL -+#include -+#include -+#endif - - DECLARE_GLOBAL_DATA_PTR; - -@@ -185,7 +189,7 @@ void cpu_init_f (volatile immap_t * im) - - /* System General Purpose Register */ - #ifdef CONFIG_SYS_SICRH --#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC8313) -+#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC8313) - /* regarding to MPC34x manual rev.1 bits 28..29 must be preserved */ - im->sysconf.sicrh = (im->sysconf.sicrh & 0x0000000C) | CONFIG_SYS_SICRH; - #else -@@ -294,6 +298,19 @@ void cpu_init_f (volatile immap_t * im) - im->gpio[1].dat = CONFIG_SYS_GPIO2_DAT; - im->gpio[1].dir = CONFIG_SYS_GPIO2_DIR; - #endif -+#ifdef CONFIG_USB_EHCI_FSL -+ uint32_t temp; -+ struct usb_ehci *ehci = (struct usb_ehci *)CONFIG_SYS_MPC8xxx_USB_ADDR; -+ -+ /* Configure interface. */ -+ setbits_be32((void *)ehci->control, REFSEL_16MHZ | UTMI_PHY_EN); -+ -+ /* Wait for clock to stabilize */ -+ do { -+ temp = in_be32((void *)ehci->control); -+ udelay(1000); -+ } while (!(temp & PHY_CLK_VALID)); -+#endif - } - - int cpu_init_r (void) -diff --git a/cpu/mpc83xx/speed.c b/cpu/mpc83xx/speed.c -index 9b7e7b5..bde7e92 100644 ---- a/cpu/mpc83xx/speed.c -+++ b/cpu/mpc83xx/speed.c -@@ -100,23 +100,23 @@ int get_clocks(void) - u32 lcrr; - - u32 csb_clk; --#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X) -+#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x) - u32 tsec1_clk; - u32 tsec2_clk; - u32 usbdr_clk; - #endif --#ifdef CONFIG_MPC834X -+#ifdef CONFIG_MPC834x - u32 usbmph_clk; - #endif - u32 core_clk; - u32 i2c1_clk; --#if !defined(CONFIG_MPC832X) -+#if !defined(CONFIG_MPC832x) - u32 i2c2_clk; - #endif - #if defined(CONFIG_MPC8315) - u32 tdm_clk; - #endif --#if defined(CONFIG_MPC837X) -+#if defined(CONFIG_MPC837x) - u32 sdhc_clk; - #endif - u32 enc_clk; -@@ -126,17 +126,17 @@ int get_clocks(void) - #if defined(CONFIG_MPC8360) - u32 mem_sec_clk; - #endif --#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832X) -+#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832x) - u32 qepmf; - u32 qepdf; - u32 qe_clk; - u32 brg_clk; - #endif --#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC831X) -+#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC831x) - u32 pciexp1_clk; - u32 pciexp2_clk; - #endif --#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC8315) -+#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315) - u32 sata_clk; - #endif - -@@ -164,7 +164,7 @@ int get_clocks(void) - - sccr = im->clk.sccr; - --#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X) -+#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x) - switch ((sccr & SCCR_TSEC1CM) >> SCCR_TSEC1CM_SHIFT) { - case 0: - tsec1_clk = 0; -@@ -202,7 +202,7 @@ int get_clocks(void) - } - #endif - --#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC837X) || defined(CONFIG_MPC8315) -+#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315) - switch ((sccr & SCCR_TSEC2CM) >> SCCR_TSEC2CM_SHIFT) { - case 0: - tsec2_clk = 0; -@@ -229,7 +229,7 @@ int get_clocks(void) - tsec2_clk = 0; - #endif - --#if defined(CONFIG_MPC834X) -+#if defined(CONFIG_MPC834x) - switch ((sccr & SCCR_USBMPHCM) >> SCCR_USBMPHCM_SHIFT) { - case 0: - usbmph_clk = 0; -@@ -274,7 +274,7 @@ int get_clocks(void) - return -7; - } - --#if defined(CONFIG_MPC837X) -+#if defined(CONFIG_MPC837x) - switch ((sccr & SCCR_SDHCCM) >> SCCR_SDHCCM_SHIFT) { - case 0: - sdhc_clk = 0; -@@ -313,22 +313,22 @@ int get_clocks(void) - } - #endif - --#if defined(CONFIG_MPC834X) -+#if defined(CONFIG_MPC834x) - i2c1_clk = tsec2_clk; - #elif defined(CONFIG_MPC8360) - i2c1_clk = csb_clk; --#elif defined(CONFIG_MPC832X) -+#elif defined(CONFIG_MPC832x) - i2c1_clk = enc_clk; --#elif defined(CONFIG_MPC831X) -+#elif defined(CONFIG_MPC831x) - i2c1_clk = enc_clk; --#elif defined(CONFIG_MPC837X) -+#elif defined(CONFIG_MPC837x) - i2c1_clk = sdhc_clk; - #endif --#if !defined(CONFIG_MPC832X) -+#if !defined(CONFIG_MPC832x) - i2c2_clk = csb_clk; /* i2c-2 clk is equal to csb clk */ - #endif - --#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC831X) -+#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC831x) - switch ((sccr & SCCR_PCIEXP1CM) >> SCCR_PCIEXP1CM_SHIFT) { - case 0: - pciexp1_clk = 0; -@@ -366,7 +366,7 @@ int get_clocks(void) - } - #endif - --#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC8315) -+#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315) - switch ((sccr & SCCR_SATA1CM) >> SCCR_SATA1CM_SHIFT) { - case 0: - sata_clk = 0; -@@ -436,7 +436,7 @@ int get_clocks(void) - return -13; - } - --#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832X) -+#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832x) - qepmf = (im->reset.rcwl & HRCWL_CEPMF) >> HRCWL_CEPMF_SHIFT; - qepdf = (im->reset.rcwl & HRCWL_CEPDF) >> HRCWL_CEPDF_SHIFT; - qe_clk = (pci_sync_in * qepmf) / (1 + qepdf); -@@ -444,23 +444,23 @@ int get_clocks(void) - #endif - - gd->csb_clk = csb_clk; --#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X) -+#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x) - gd->tsec1_clk = tsec1_clk; - gd->tsec2_clk = tsec2_clk; - gd->usbdr_clk = usbdr_clk; - #endif --#if defined(CONFIG_MPC834X) -+#if defined(CONFIG_MPC834x) - gd->usbmph_clk = usbmph_clk; - #endif - #if defined(CONFIG_MPC8315) - gd->tdm_clk = tdm_clk; - #endif --#if defined(CONFIG_MPC837X) -+#if defined(CONFIG_MPC837x) - gd->sdhc_clk = sdhc_clk; - #endif - gd->core_clk = core_clk; - gd->i2c1_clk = i2c1_clk; --#if !defined(CONFIG_MPC832X) -+#if !defined(CONFIG_MPC832x) - gd->i2c2_clk = i2c2_clk; - #endif - gd->enc_clk = enc_clk; -@@ -470,15 +470,15 @@ int get_clocks(void) - #if defined(CONFIG_MPC8360) - gd->mem_sec_clk = mem_sec_clk; - #endif --#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832X) -+#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832x) - gd->qe_clk = qe_clk; - gd->brg_clk = brg_clk; - #endif --#if defined(CONFIG_MPC837X) -+#if defined(CONFIG_MPC837x) - gd->pciexp1_clk = pciexp1_clk; - gd->pciexp2_clk = pciexp2_clk; - #endif --#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC8315) -+#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315) - gd->sata_clk = sata_clk; - #endif - gd->pci_clk = pci_sync_in; -@@ -504,7 +504,7 @@ int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - printf("Clock configuration:\n"); - printf(" Core: %-4s MHz\n", strmhz(buf, gd->core_clk)); - printf(" Coherent System Bus: %-4s MHz\n", strmhz(buf, gd->csb_clk)); --#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832X) -+#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832x) - printf(" QE: %-4s MHz\n", strmhz(buf, gd->qe_clk)); - printf(" BRG: %-4s MHz\n", strmhz(buf, gd->brg_clk)); - #endif -@@ -516,28 +516,28 @@ int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - #endif - printf(" SEC: %-4s MHz\n", strmhz(buf, gd->enc_clk)); - printf(" I2C1: %-4s MHz\n", strmhz(buf, gd->i2c1_clk)); --#if !defined(CONFIG_MPC832X) -+#if !defined(CONFIG_MPC832x) - printf(" I2C2: %-4s MHz\n", strmhz(buf, gd->i2c2_clk)); - #endif - #if defined(CONFIG_MPC8315) - printf(" TDM: %-4s MHz\n", strmhz(buf, gd->tdm_clk)); - #endif --#if defined(CONFIG_MPC837X) -+#if defined(CONFIG_MPC837x) - printf(" SDHC: %-4s MHz\n", strmhz(buf, gd->sdhc_clk)); - #endif --#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X) -+#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x) - printf(" TSEC1: %-4s MHz\n", strmhz(buf, gd->tsec1_clk)); - printf(" TSEC2: %-4s MHz\n", strmhz(buf, gd->tsec2_clk)); - printf(" USB DR: %-4s MHz\n", strmhz(buf, gd->usbdr_clk)); - #endif --#if defined(CONFIG_MPC834X) -+#if defined(CONFIG_MPC834x) - printf(" USB MPH: %-4s MHz\n", strmhz(buf, gd->usbmph_clk)); - #endif --#if defined(CONFIG_MPC837X) -+#if defined(CONFIG_MPC837x) - printf(" PCIEXP1: %-4s MHz\n", strmhz(buf, gd->pciexp1_clk)); - printf(" PCIEXP2: %-4s MHz\n", strmhz(buf, gd->pciexp2_clk)); - #endif --#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC8315) -+#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315) - printf(" SATA: %-4s MHz\n", strmhz(buf, gd->sata_clk)); - #endif - return 0; -@@ -545,5 +545,5 @@ int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) - - U_BOOT_CMD(clocks, 1, 0, do_clocks, - "print clock configuration", -- " clocks\n" -+ " clocks" - ); -diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c -index ef976a4..d88c564 100644 ---- a/cpu/mpc85xx/cpu.c -+++ b/cpu/mpc85xx/cpu.c -@@ -40,6 +40,8 @@ DECLARE_GLOBAL_DATA_PTR; - struct cpu_type cpu_type_list [] = { - CPU_TYPE_ENTRY(8533, 8533), - CPU_TYPE_ENTRY(8533, 8533_E), -+ CPU_TYPE_ENTRY(8535, 8535), -+ CPU_TYPE_ENTRY(8535, 8535_E), - CPU_TYPE_ENTRY(8536, 8536), - CPU_TYPE_ENTRY(8536, 8536_E), - CPU_TYPE_ENTRY(8540, 8540), -@@ -184,6 +186,10 @@ int checkcpu (void) - printf("CPM: %s MHz\n", strmhz(buf1, sysinfo.freqSystemBus)); - #endif - -+#ifdef CONFIG_QE -+ printf(" QE:%-4s MHz\n", strmhz(buf1, sysinfo.freqQE)); -+#endif -+ - puts("L1: D-cache 32 kB enabled\n I-cache 32 kB enabled\n"); - - return 0; -@@ -260,26 +266,28 @@ reset_85xx_watchdog(void) - - #if defined(CONFIG_DDR_ECC) - void dma_init(void) { -- volatile ccsr_dma_t *dma = (void *)(CONFIG_SYS_MPC85xx_DMA_ADDR); -+ volatile ccsr_dma_t *dma_base = (void *)(CONFIG_SYS_MPC85xx_DMA_ADDR); -+ volatile fsl_dma_t *dma = &dma_base->dma[0]; - -- dma->satr0 = 0x02c40000; -- dma->datr0 = 0x02c40000; -- dma->sr0 = 0xfffffff; /* clear any errors */ -+ dma->satr = 0x00040000; -+ dma->datr = 0x00040000; -+ dma->sr = 0xffffffff; /* clear any errors */ - asm("sync; isync; msync"); - return; - } - - uint dma_check(void) { -- volatile ccsr_dma_t *dma = (void *)(CONFIG_SYS_MPC85xx_DMA_ADDR); -- volatile uint status = dma->sr0; -+ volatile ccsr_dma_t *dma_base = (void *)(CONFIG_SYS_MPC85xx_DMA_ADDR); -+ volatile fsl_dma_t *dma = &dma_base->dma[0]; -+ volatile uint status = dma->sr; - - /* While the channel is busy, spin */ - while((status & 4) == 4) { -- status = dma->sr0; -+ status = dma->sr; - } - -- /* clear MR0[CS] channel start bit */ -- dma->mr0 &= 0x00000001; -+ /* clear MR[CS] channel start bit */ -+ dma->mr &= 0x00000001; - asm("sync;isync;msync"); - - if (status != 0) { -@@ -289,14 +297,15 @@ uint dma_check(void) { - } - - int dma_xfer(void *dest, uint count, void *src) { -- volatile ccsr_dma_t *dma = (void *)(CONFIG_SYS_MPC85xx_DMA_ADDR); -+ volatile ccsr_dma_t *dma_base = (void *)(CONFIG_SYS_MPC85xx_DMA_ADDR); -+ volatile fsl_dma_t *dma = &dma_base->dma[0]; - -- dma->dar0 = (uint) dest; -- dma->sar0 = (uint) src; -- dma->bcr0 = count; -- dma->mr0 = 0xf000004; -+ dma->dar = (uint) dest; -+ dma->sar = (uint) src; -+ dma->bcr = count; -+ dma->mr = 0xf000004; - asm("sync;isync;msync"); -- dma->mr0 = 0xf000005; -+ dma->mr = 0xf000005; - asm("sync;isync;msync"); - return dma_check(); - } -@@ -377,24 +386,11 @@ int cpu_eth_init(bd_t *bis) - #if defined(CONFIG_ETHER_ON_FCC) - fec_initialize(bis); - #endif --#if defined(CONFIG_UEC_ETH1) -- uec_initialize(0); --#endif --#if defined(CONFIG_UEC_ETH2) -- uec_initialize(1); --#endif --#if defined(CONFIG_UEC_ETH3) -- uec_initialize(2); --#endif --#if defined(CONFIG_UEC_ETH4) -- uec_initialize(3); --#endif --#if defined(CONFIG_UEC_ETH5) -- uec_initialize(4); --#endif --#if defined(CONFIG_UEC_ETH6) -- uec_initialize(5); -+ -+#if defined(CONFIG_UEC_ETH) -+ uec_standard_init(bis); - #endif -+ - #if defined(CONFIG_TSEC_ENET) || defined(CONFIG_MPC85XX_FEC) - tsec_standard_init(bis); - #endif -diff --git a/cpu/mpc85xx/fdt.c b/cpu/mpc85xx/fdt.c -index 26a8f48..a692529 100644 ---- a/cpu/mpc85xx/fdt.c -+++ b/cpu/mpc85xx/fdt.c -@@ -278,12 +278,9 @@ void ft_cpu_setup(void *blob, bd_t *bd) - if (!IS_E_PROCESSOR(get_svr())) - fdt_fixup_crypto_node(blob, 0); - --#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\ -- defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3) - fdt_fixup_ethernet(blob); - - fdt_add_enet_stashing(blob); --#endif - - do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, - "timebase-frequency", bd->bi_busfreq / 8, 1); -diff --git a/cpu/mpc85xx/speed.c b/cpu/mpc85xx/speed.c -index b0f47e0..286b6b2 100644 ---- a/cpu/mpc85xx/speed.c -+++ b/cpu/mpc85xx/speed.c -@@ -1,5 +1,5 @@ - /* -- * Copyright 2004 Freescale Semiconductor. -+ * Copyright 2004, 2007-2009 Freescale Semiconductor Inc. - * (C) Copyright 2003 Motorola Inc. - * Xianghua Xiao, (X.Xiao@motorola.com) - * -@@ -40,6 +40,9 @@ void get_sys_info (sys_info_t * sysInfo) - uint plat_ratio,e500_ratio,half_freqSystemBus; - uint lcrr_div; - int i; -+#ifdef CONFIG_QE -+ u32 qe_ratio; -+#endif - - plat_ratio = (gur->porpllsr) & 0x0000003e; - plat_ratio >>= 1; -@@ -65,6 +68,12 @@ void get_sys_info (sys_info_t * sysInfo) - } - #endif - -+#ifdef CONFIG_QE -+ qe_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_QE_RATIO) -+ >> MPC85xx_PORPLLSR_QE_RATIO_SHIFT; -+ sysInfo->freqQE = qe_ratio * CONFIG_SYS_CLK_FREQ; -+#endif -+ - #if defined(CONFIG_SYS_LBC_LCRR) - /* We will program LCRR to this value later */ - lcrr_div = CONFIG_SYS_LBC_LCRR & LCRR_CLKDIV; -@@ -112,6 +121,10 @@ int get_clocks (void) - gd->mem_clk = sys_info.freqDDRBus; - gd->lbc_clk = sys_info.freqLocalBus; - -+#ifdef CONFIG_QE -+ gd->qe_clk = sys_info.freqQE; -+ gd->brg_clk = gd->qe_clk / 2; -+#endif - /* - * The base clock for I2C depends on the actual SOC. Unfortunately, - * there is no pattern that can be used to determine the frequency, so -diff --git a/cpu/mpc86xx/cpu.c b/cpu/mpc86xx/cpu.c -index 653a137..d47cc5e 100644 ---- a/cpu/mpc86xx/cpu.c -+++ b/cpu/mpc86xx/cpu.c -@@ -182,26 +182,31 @@ watchdog_reset(void) - void - dma_init(void) - { -- volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; -- volatile ccsr_dma_t *dma = &immap->im_dma; -+ volatile ccsr_dma_t *dma_base = (void *)(CONFIG_SYS_MPC86xx_DMA_ADDR); -+ volatile fsl_dma_t *dma = &dma_base->dma[0]; - -- dma->satr0 = 0x00040000; -- dma->datr0 = 0x00040000; -+ dma->satr = 0x00040000; -+ dma->datr = 0x00040000; -+ dma->sr = 0xffffffff; /* clear any errors */ - asm("sync; isync"); - } - - uint - dma_check(void) - { -- volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; -- volatile ccsr_dma_t *dma = &immap->im_dma; -- volatile uint status = dma->sr0; -+ volatile ccsr_dma_t *dma_base = (void *)(CONFIG_SYS_MPC86xx_DMA_ADDR); -+ volatile fsl_dma_t *dma = &dma_base->dma[0]; -+ volatile uint status = dma->sr; - - /* While the channel is busy, spin */ - while ((status & 4) == 4) { -- status = dma->sr0; -+ status = dma->sr; - } - -+ /* clear MR[CS] channel start bit */ -+ dma->mr &= 0x00000001; -+ asm("sync;isync"); -+ - if (status != 0) { - printf("DMA Error: status = %x\n", status); - } -@@ -211,15 +216,15 @@ dma_check(void) - int - dma_xfer(void *dest, uint count, void *src) - { -- volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; -- volatile ccsr_dma_t *dma = &immap->im_dma; -+ volatile ccsr_dma_t *dma_base = (void *)(CONFIG_SYS_MPC86xx_DMA_ADDR); -+ volatile fsl_dma_t *dma = &dma_base->dma[0]; - -- dma->dar0 = (uint) dest; -- dma->sar0 = (uint) src; -- dma->bcr0 = count; -- dma->mr0 = 0xf000004; -+ dma->dar = (uint) dest; -+ dma->sar = (uint) src; -+ dma->bcr = count; -+ dma->mr = 0xf000004; - asm("sync;isync"); -- dma->mr0 = 0xf000005; -+ dma->mr = 0xf000005; - asm("sync;isync"); - return dma_check(); - } -diff --git a/cpu/nios/asmi.c b/cpu/nios/asmi.c -index 2c2e838..33553b7 100644 ---- a/cpu/nios/asmi.c -+++ b/cpu/nios/asmi.c -@@ -48,7 +48,7 @@ - "asmi write addr offset count\n"\ - " - write count bytes to offset from addr.\n"\ - "asmi verify addr offset count\n"\ -- " - verify count bytes at offset from addr.\n" -+ " - verify count bytes at offset from addr." - - - /*-----------------------------------------------------------------------*/ -diff --git a/cpu/nios2/epcs.c b/cpu/nios2/epcs.c -index 968b50f..483b249 100644 ---- a/cpu/nios2/epcs.c -+++ b/cpu/nios2/epcs.c -@@ -47,7 +47,7 @@ - "epcs write addr offset count\n"\ - " - write count bytes to offset from addr.\n"\ - "epcs verify addr offset count\n"\ -- " - verify count bytes at offset from addr.\n" -+ " - verify count bytes at offset from addr." - - - /*-----------------------------------------------------------------------*/ -diff --git a/cpu/nios2/sysid.c b/cpu/nios2/sysid.c -index 251204b..77bc8b5 100644 ---- a/cpu/nios2/sysid.c -+++ b/cpu/nios2/sysid.c -@@ -53,6 +53,6 @@ int do_sysid (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) - U_BOOT_CMD( - sysid, 1, 1, do_sysid, - "display Nios-II system id", -- "\n - display Nios-II system id\n" -+ "" - ); - #endif /* CONFIG_SYS_NIOS_SYSID_BASE */ -diff --git a/cpu/ppc4xx/40x_spd_sdram.c b/cpu/ppc4xx/40x_spd_sdram.c -index 57861b3..75bd70d 100644 ---- a/cpu/ppc4xx/40x_spd_sdram.c -+++ b/cpu/ppc4xx/40x_spd_sdram.c -@@ -56,10 +56,6 @@ - #define CONFIG_SYS_I2C_SPEED 50000 - #endif - --#ifndef CONFIG_SYS_I2C_SLAVE --#define CONFIG_SYS_I2C_SLAVE 0xFE --#endif -- - #define ONE_BILLION 1000000000 - - #define SDRAM0_CFG_DCE 0x80000000 -diff --git a/cpu/ppc4xx/44x_spd_ddr.c b/cpu/ppc4xx/44x_spd_ddr.c -index 153391e..f26fcda 100644 ---- a/cpu/ppc4xx/44x_spd_ddr.c -+++ b/cpu/ppc4xx/44x_spd_ddr.c -@@ -66,10 +66,6 @@ - #define CONFIG_SYS_I2C_SPEED 50000 - #endif - --#ifndef CONFIG_SYS_I2C_SLAVE --#define CONFIG_SYS_I2C_SLAVE 0xFE --#endif -- - #define ONE_BILLION 1000000000 - - /* -diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c -index 9a6a8d7..06f44ad 100644 ---- a/cpu/ppc4xx/cpu.c -+++ b/cpu/ppc4xx/cpu.c -@@ -597,7 +597,7 @@ int checkcpu (void) - printf (" Internal PCI arbiter %sabled", pci_arbiter_enabled() ? "en" : "dis"); - #endif - --#if defined(PCI_ASYNC) -+#if defined(CONFIG_PCI) && defined(PCI_ASYNC) - if (pci_async_enabled()) { - printf (", PCI async ext clock used"); - } else { -diff --git a/cpu/ppc4xx/i2c.c b/cpu/ppc4xx/i2c.c -index 9d416ca..e3e1bab 100644 ---- a/cpu/ppc4xx/i2c.c -+++ b/cpu/ppc4xx/i2c.c -@@ -438,18 +438,4 @@ int i2c_set_bus_num(unsigned int bus) - return 0; - } - #endif /* CONFIG_I2C_MULTI_BUS */ -- --/* TODO: add 100/400k switching */ --unsigned int i2c_get_bus_speed(void) --{ -- return CONFIG_SYS_I2C_SPEED; --} -- --int i2c_set_bus_speed(unsigned int speed) --{ -- if (speed != CONFIG_SYS_I2C_SPEED) -- return -1; -- -- return 0; --} - #endif /* CONFIG_HARD_I2C */ -diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S -index f2b8908..ac96fc2 100644 ---- a/cpu/ppc4xx/start.S -+++ b/cpu/ppc4xx/start.S -@@ -257,6 +257,14 @@ - bl board_init_f - #endif - -+#if defined(CONFIG_SYS_RAMBOOT) -+ /* -+ * 4xx RAM-booting U-Boot image is started from offset 0 -+ */ -+ .text -+ bl _start_440 -+#endif -+ - /* - * 440 Startup -- on reset only the top 4k of the effective - * address space is mapped in by an entry in the instruction -@@ -444,10 +452,17 @@ skip_debug_init: - addis r0,0,0x0000 - li r1,0x003f /* 64 TLB entries */ - mtctr r1 --rsttlb: tlbwe r0,r1,0x0000 /* Invalidate all entries (V=0)*/ -- tlbwe r0,r1,0x0001 -- tlbwe r0,r1,0x0002 -- subi r1,r1,0x0001 -+ li r4,0 /* Start with TLB #0 */ -+rsttlb: -+#ifdef CONFIG_SYS_RAMBOOT -+ tlbre r3,r4,0 /* Read contents from TLB word #0 to get EPN */ -+ rlwinm. r3,r3,0,0xfffffc00 /* Mask EPN */ -+ beq tlbnxt /* Skip EPN=0 TLB, this is the SDRAM TLB */ -+#endif -+ tlbwe r0,r4,0 /* Invalidate all entries (V=0)*/ -+ tlbwe r0,r4,1 -+ tlbwe r0,r4,2 -+tlbnxt: addi r4,r4,1 /* Next TLB */ - bdnz rsttlb - - /*----------------------------------------------------------------*/ -@@ -476,7 +491,13 @@ rsttlb: tlbwe r0,r1,0x0000 /* Invalidate all entries (V=0)*/ - li r4,0 /* TLB # */ - - addi r5,r5,-4 --1: lwzu r0,4(r5) -+1: -+#ifdef CONFIG_SYS_RAMBOOT -+ tlbre r3,r4,0 /* Read contents from TLB word #0 */ -+ rlwinm. r3,r3,0,0x00000200 /* Mask V (valid) bit */ -+ bne tlbnx2 /* Skip V=1 TLB, this is the SDRAM TLB */ -+#endif -+ lwzu r0,4(r5) - cmpwi r0,0 - beq 2f /* 0 marks end */ - lwzu r1,4(r5) -@@ -484,7 +505,7 @@ rsttlb: tlbwe r0,r1,0x0000 /* Invalidate all entries (V=0)*/ - tlbwe r0,r4,0 /* TLB Word 0 */ - tlbwe r1,r4,1 /* TLB Word 1 */ - tlbwe r2,r4,2 /* TLB Word 2 */ -- addi r4,r4,1 /* Next TLB */ -+tlbnx2: addi r4,r4,1 /* Next TLB */ - bdnz 1b - - /*----------------------------------------------------------------*/ -diff --git a/cpu/pxa/Makefile b/cpu/pxa/Makefile -index 42903b2..07a151a 100644 ---- a/cpu/pxa/Makefile -+++ b/cpu/pxa/Makefile -@@ -26,7 +26,12 @@ include $(TOPDIR)/config.mk - LIB = $(obj)lib$(CPU).a - - START = start.o --COBJS = serial.o interrupts.o cpu.o i2c.o pxafb.o usb.o -+ -+COBJS += cpu.o -+COBJS += i2c.o -+COBJS += pxafb.o -+COBJS += timer.o -+COBJS += usb.o - - SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) - OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) -diff --git a/cpu/pxa/cpu.c b/cpu/pxa/cpu.c -index 3a1be57..800d120 100644 ---- a/cpu/pxa/cpu.c -+++ b/cpu/pxa/cpu.c -@@ -35,24 +35,8 @@ - #include - #include - --#ifdef CONFIG_USE_IRQ --DECLARE_GLOBAL_DATA_PTR; --#endif -- - static void cache_flush(void); - --int cpu_init (void) --{ -- /* -- * setup up stacks if necessary -- */ --#ifdef CONFIG_USE_IRQ -- IRQ_STACK_START = _armboot_start - CONFIG_SYS_MALLOC_LEN - CONFIG_SYS_GBL_DATA_SIZE - 4; -- FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ; --#endif -- return 0; --} -- - int cleanup_before_linux (void) - { - /* -diff --git a/cpu/pxa/interrupts.c b/cpu/pxa/interrupts.c -deleted file mode 100644 -index 2bc5c50..0000000 ---- a/cpu/pxa/interrupts.c -+++ /dev/null -@@ -1,127 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Sysgo Real-Time Solutions, GmbH -- * Marius Groeger -- * -- * (C) Copyright 2002 -- * Sysgo Real-Time Solutions, GmbH -- * Alex Zuepke -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --#include --#include -- --#ifdef CONFIG_USE_IRQ --#error: interrupts not implemented yet --#endif -- --#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS) --#define TIMER_FREQ_HZ 3250000 --#elif defined(CONFIG_PXA250) --#define TIMER_FREQ_HZ 3686400 --#else --#error "Timer frequency unknown - please config PXA CPU type" --#endif -- --static inline unsigned long long tick_to_time(unsigned long long tick) --{ -- tick *= CONFIG_SYS_HZ; -- do_div(tick, TIMER_FREQ_HZ); -- return tick; --} -- --static inline unsigned long long us_to_tick(unsigned long long us) --{ -- us = us * TIMER_FREQ_HZ + 999999; -- do_div(us, 1000000); -- return us; --} -- --int interrupt_init (void) --{ -- /* nothing happens here - we don't setup any IRQs */ -- return (0); --} -- --void reset_timer (void) --{ -- reset_timer_masked (); --} -- --ulong get_timer (ulong base) --{ -- return get_timer_masked () - base; --} -- --void set_timer (ulong t) --{ -- /* nop */ --} -- --void udelay (unsigned long usec) --{ -- udelay_masked (usec); --} -- -- --void reset_timer_masked (void) --{ -- OSCR = 0; --} -- --ulong get_timer_masked (void) --{ -- return tick_to_time(get_ticks()); --} -- --void udelay_masked (unsigned long usec) --{ -- unsigned long long tmp; -- ulong tmo; -- -- tmo = us_to_tick(usec); -- tmp = get_ticks() + tmo; /* get current timestamp */ -- -- while (get_ticks() < tmp) /* loop till event */ -- /*NOP*/; -- --} -- --/* -- * This function is derived from PowerPC code (read timebase as long long). -- * On ARM it just returns the timer value. -- */ --unsigned long long get_ticks(void) --{ -- return OSCR; --} -- --/* -- * This function is derived from PowerPC code (timebase clock frequency). -- * On ARM it returns the number of timer ticks per second. -- */ --ulong get_tbclk (void) --{ -- ulong tbclk; -- tbclk = TIMER_FREQ_HZ; -- return tbclk; --} -diff --git a/cpu/pxa/serial.c b/cpu/pxa/serial.c -deleted file mode 100644 -index 9ba457e..0000000 ---- a/cpu/pxa/serial.c -+++ /dev/null -@@ -1,385 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Wolfgang Denk, DENX Software Engineering, -- * -- * (C) Copyright 2002 -- * Sysgo Real-Time Solutions, GmbH -- * Marius Groeger -- * -- * (C) Copyright 2002 -- * Sysgo Real-Time Solutions, GmbH -- * Alex Zuepke -- * -- * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License as published by -- * the Free Software Foundation; either version 2 of the License, or -- * (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -- * -- */ -- --#include --#include --#include --#include -- --DECLARE_GLOBAL_DATA_PTR; -- --#define FFUART_INDEX 0 --#define BTUART_INDEX 1 --#define STUART_INDEX 2 -- --#ifndef CONFIG_SERIAL_MULTI --#if defined (CONFIG_FFUART) --#define UART_INDEX FFUART_INDEX --#elif defined (CONFIG_BTUART) --#define UART_INDEX BTUART_INDEX --#elif defined (CONFIG_STUART) --#define UART_INDEX STUART_INDEX --#else --#error "Bad: you didn't configure serial ..." --#endif --#endif -- --void pxa_setbrg_dev (unsigned int uart_index) --{ -- unsigned int quot = 0; -- -- if (gd->baudrate == 1200) -- quot = 768; -- else if (gd->baudrate == 9600) -- quot = 96; -- else if (gd->baudrate == 19200) -- quot = 48; -- else if (gd->baudrate == 38400) -- quot = 24; -- else if (gd->baudrate == 57600) -- quot = 16; -- else if (gd->baudrate == 115200) -- quot = 8; -- else -- hang (); -- -- switch (uart_index) { -- case FFUART_INDEX: --#ifdef CONFIG_CPU_MONAHANS -- CKENA |= CKENA_22_FFUART; --#else -- CKEN |= CKEN6_FFUART; --#endif /* CONFIG_CPU_MONAHANS */ -- -- FFIER = 0; /* Disable for now */ -- FFFCR = 0; /* No fifos enabled */ -- -- /* set baud rate */ -- FFLCR = LCR_WLS0 | LCR_WLS1 | LCR_DLAB; -- FFDLL = quot & 0xff; -- FFDLH = quot >> 8; -- FFLCR = LCR_WLS0 | LCR_WLS1; -- -- FFIER = IER_UUE; /* Enable FFUART */ -- break; -- -- case BTUART_INDEX: --#ifdef CONFIG_CPU_MONAHANS -- CKENA |= CKENA_21_BTUART; --#else -- CKEN |= CKEN7_BTUART; --#endif /* CONFIG_CPU_MONAHANS */ -- -- BTIER = 0; -- BTFCR = 0; -- -- /* set baud rate */ -- BTLCR = LCR_DLAB; -- BTDLL = quot & 0xff; -- BTDLH = quot >> 8; -- BTLCR = LCR_WLS0 | LCR_WLS1; -- -- BTIER = IER_UUE; /* Enable BFUART */ -- -- break; -- -- case STUART_INDEX: --#ifdef CONFIG_CPU_MONAHANS -- CKENA |= CKENA_23_STUART; --#else -- CKEN |= CKEN5_STUART; --#endif /* CONFIG_CPU_MONAHANS */ -- -- STIER = 0; -- STFCR = 0; -- -- /* set baud rate */ -- STLCR = LCR_DLAB; -- STDLL = quot & 0xff; -- STDLH = quot >> 8; -- STLCR = LCR_WLS0 | LCR_WLS1; -- -- STIER = IER_UUE; /* Enable STUART */ -- break; -- -- default: -- hang(); -- } --} -- -- --/* -- * Initialise the serial port with the given baudrate. The settings -- * are always 8 data bits, no parity, 1 stop bit, no start bits. -- * -- */ --int pxa_init_dev (unsigned int uart_index) --{ -- pxa_setbrg_dev (uart_index); -- -- return (0); --} -- -- --/* -- * Output a single byte to the serial port. -- */ --void pxa_putc_dev (unsigned int uart_index,const char c) --{ -- switch (uart_index) { -- case FFUART_INDEX: -- /* wait for room in the tx FIFO on FFUART */ -- while ((FFLSR & LSR_TEMT) == 0) -- WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ -- FFTHR = c; -- break; -- -- case BTUART_INDEX: -- while ((BTLSR & LSR_TEMT ) == 0 ) -- WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ -- BTTHR = c; -- break; -- -- case STUART_INDEX: -- while ((STLSR & LSR_TEMT ) == 0 ) -- WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ -- STTHR = c; -- break; -- } -- -- /* If \n, also do \r */ -- if (c == '\n') -- pxa_putc_dev (uart_index,'\r'); --} -- --/* -- * Read a single byte from the serial port. Returns 1 on success, 0 -- * otherwise. When the function is succesfull, the character read is -- * written into its argument c. -- */ --int pxa_tstc_dev (unsigned int uart_index) --{ -- switch (uart_index) { -- case FFUART_INDEX: -- return FFLSR & LSR_DR; -- case BTUART_INDEX: -- return BTLSR & LSR_DR; -- case STUART_INDEX: -- return STLSR & LSR_DR; -- } -- return -1; --} -- --/* -- * Read a single byte from the serial port. Returns 1 on success, 0 -- * otherwise. When the function is succesfull, the character read is -- * written into its argument c. -- */ --int pxa_getc_dev (unsigned int uart_index) --{ -- switch (uart_index) { -- case FFUART_INDEX: -- while (!(FFLSR & LSR_DR)) -- WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ -- return (char) FFRBR & 0xff; -- -- case BTUART_INDEX: -- while (!(BTLSR & LSR_DR)) -- WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ -- return (char) BTRBR & 0xff; -- case STUART_INDEX: -- while (!(STLSR & LSR_DR)) -- WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ -- return (char) STRBR & 0xff; -- } -- return -1; --} -- --void --pxa_puts_dev (unsigned int uart_index,const char *s) --{ -- while (*s) { -- pxa_putc_dev (uart_index,*s++); -- } --} -- --#if defined (CONFIG_FFUART) --static int ffuart_init(void) --{ -- return pxa_init_dev(FFUART_INDEX); --} -- --static void ffuart_setbrg(void) --{ -- return pxa_setbrg_dev(FFUART_INDEX); --} -- --static void ffuart_putc(const char c) --{ -- return pxa_putc_dev(FFUART_INDEX,c); --} -- --static void ffuart_puts(const char *s) --{ -- return pxa_puts_dev(FFUART_INDEX,s); --} -- --static int ffuart_getc(void) --{ -- return pxa_getc_dev(FFUART_INDEX); --} -- --static int ffuart_tstc(void) --{ -- return pxa_tstc_dev(FFUART_INDEX); --} -- --struct serial_device serial_ffuart_device = --{ -- "serial_ffuart", -- "PXA", -- ffuart_init, -- ffuart_setbrg, -- ffuart_getc, -- ffuart_tstc, -- ffuart_putc, -- ffuart_puts, --}; --#endif -- --#if defined (CONFIG_BTUART) --static int btuart_init(void) --{ -- return pxa_init_dev(BTUART_INDEX); --} -- --static void btuart_setbrg(void) --{ -- return pxa_setbrg_dev(BTUART_INDEX); --} -- --static void btuart_putc(const char c) --{ -- return pxa_putc_dev(BTUART_INDEX,c); --} -- --static void btuart_puts(const char *s) --{ -- return pxa_puts_dev(BTUART_INDEX,s); --} -- --static int btuart_getc(void) --{ -- return pxa_getc_dev(BTUART_INDEX); --} -- --static int btuart_tstc(void) --{ -- return pxa_tstc_dev(BTUART_INDEX); --} -- --struct serial_device serial_btuart_device = --{ -- "serial_btuart", -- "PXA", -- btuart_init, -- btuart_setbrg, -- btuart_getc, -- btuart_tstc, -- btuart_putc, -- btuart_puts, --}; --#endif -- --#if defined (CONFIG_STUART) --static int stuart_init(void) --{ -- return pxa_init_dev(STUART_INDEX); --} -- --static void stuart_setbrg(void) --{ -- return pxa_setbrg_dev(STUART_INDEX); --} -- --static void stuart_putc(const char c) --{ -- return pxa_putc_dev(STUART_INDEX,c); --} -- --static void stuart_puts(const char *s) --{ -- return pxa_puts_dev(STUART_INDEX,s); --} -- --static int stuart_getc(void) --{ -- return pxa_getc_dev(STUART_INDEX); --} -- --static int stuart_tstc(void) --{ -- return pxa_tstc_dev(STUART_INDEX); --} -- --struct serial_device serial_stuart_device = --{ -- "serial_stuart", -- "PXA", -- stuart_init, -- stuart_setbrg, -- stuart_getc, -- stuart_tstc, -- stuart_putc, -- stuart_puts, --}; --#endif -- -- --#ifndef CONFIG_SERIAL_MULTI --inline int serial_init(void) { -- return (pxa_init_dev(UART_INDEX)); --} --void serial_setbrg(void) { -- pxa_setbrg_dev(UART_INDEX); --} --int serial_getc(void) { -- return(pxa_getc_dev(UART_INDEX)); --} --int serial_tstc(void) { -- return(pxa_tstc_dev(UART_INDEX)); --} --void serial_putc(const char c) { -- pxa_putc_dev(UART_INDEX,c); --} --void serial_puts(const char *s) { -- pxa_puts_dev(UART_INDEX,s); --} --#endif /* CONFIG_SERIAL_MULTI */ -diff --git a/cpu/pxa/timer.c b/cpu/pxa/timer.c -new file mode 100644 -index 0000000..e2df3a5 ---- /dev/null -+++ b/cpu/pxa/timer.c -@@ -0,0 +1,128 @@ -+/* -+ * (C) Copyright 2002 -+ * Sysgo Real-Time Solutions, GmbH -+ * Marius Groeger -+ * -+ * (C) Copyright 2002 -+ * Sysgo Real-Time Solutions, GmbH -+ * Alex Zuepke -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+#include -+#include -+ -+#ifdef CONFIG_USE_IRQ -+#error: interrupts not implemented yet -+#endif -+ -+#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS) -+#define TIMER_FREQ_HZ 3250000 -+#elif defined(CONFIG_PXA250) -+#define TIMER_FREQ_HZ 3686400 -+#else -+#error "Timer frequency unknown - please config PXA CPU type" -+#endif -+ -+static inline unsigned long long tick_to_time(unsigned long long tick) -+{ -+ tick *= CONFIG_SYS_HZ; -+ do_div(tick, TIMER_FREQ_HZ); -+ return tick; -+} -+ -+static inline unsigned long long us_to_tick(unsigned long long us) -+{ -+ us = us * TIMER_FREQ_HZ + 999999; -+ do_div(us, 1000000); -+ return us; -+} -+ -+int timer_init (void) -+{ -+ reset_timer(); -+ -+ return 0; -+} -+ -+void reset_timer (void) -+{ -+ reset_timer_masked (); -+} -+ -+ulong get_timer (ulong base) -+{ -+ return get_timer_masked () - base; -+} -+ -+void set_timer (ulong t) -+{ -+ /* nop */ -+} -+ -+void udelay (unsigned long usec) -+{ -+ udelay_masked (usec); -+} -+ -+ -+void reset_timer_masked (void) -+{ -+ OSCR = 0; -+} -+ -+ulong get_timer_masked (void) -+{ -+ return tick_to_time(get_ticks()); -+} -+ -+void udelay_masked (unsigned long usec) -+{ -+ unsigned long long tmp; -+ ulong tmo; -+ -+ tmo = us_to_tick(usec); -+ tmp = get_ticks() + tmo; /* get current timestamp */ -+ -+ while (get_ticks() < tmp) /* loop till event */ -+ /*NOP*/; -+ -+} -+ -+/* -+ * This function is derived from PowerPC code (read timebase as long long). -+ * On ARM it just returns the timer value. -+ */ -+unsigned long long get_ticks(void) -+{ -+ return OSCR; -+} -+ -+/* -+ * This function is derived from PowerPC code (timebase clock frequency). -+ * On ARM it returns the number of timer ticks per second. -+ */ -+ulong get_tbclk (void) -+{ -+ ulong tbclk; -+ tbclk = TIMER_FREQ_HZ; -+ return tbclk; -+} -diff --git a/cpu/pxa/u-boot.lds b/cpu/pxa/u-boot.lds -new file mode 100644 -index 0000000..77ab3c9 ---- /dev/null -+++ b/cpu/pxa/u-boot.lds -@@ -0,0 +1,56 @@ -+/* -+ * (C) Copyright 2000-2005 -+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -+OUTPUT_ARCH(arm) -+ENTRY(_start) -+SECTIONS -+{ -+ . = 0x00000000; -+ -+ . = ALIGN(4); -+ .text : -+ { -+ cpu/pxa/start.o (.text) -+ *(.text) -+ } -+ -+ . = ALIGN(4); -+ .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -+ -+ . = ALIGN(4); -+ .data : { *(.data) } -+ -+ . = ALIGN(4); -+ .got : { *(.got) } -+ -+ . = .; -+ __u_boot_cmd_start = .; -+ .u_boot_cmd : { *(.u_boot_cmd) } -+ __u_boot_cmd_end = .; -+ -+ . = ALIGN(4); -+ __bss_start = .; -+ .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -+ _end = .; -+} -diff --git a/cpu/s3c44b0/Makefile b/cpu/s3c44b0/Makefile -index ae909a6..6da2016 100644 ---- a/cpu/s3c44b0/Makefile -+++ b/cpu/s3c44b0/Makefile -@@ -26,7 +26,10 @@ include $(TOPDIR)/config.mk - LIB = $(obj)lib$(CPU).a - - START = start.o --COBJS = cache.o cpu.o interrupts.o -+ -+COBJS += cache.o -+COBJS += cpu.o -+COBJS += timer.o - - SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) - OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) -diff --git a/cpu/s3c44b0/cpu.c b/cpu/s3c44b0/cpu.c -index 7ef4a1f..bca38f8 100644 ---- a/cpu/s3c44b0/cpu.c -+++ b/cpu/s3c44b0/cpu.c -@@ -32,7 +32,7 @@ - #include - #include - --int cpu_init (void) -+int arch_cpu_init (void) - { - icache_enable(); - -diff --git a/cpu/s3c44b0/interrupts.c b/cpu/s3c44b0/interrupts.c -deleted file mode 100644 -index eb23e6a..0000000 ---- a/cpu/s3c44b0/interrupts.c -+++ /dev/null -@@ -1,136 +0,0 @@ --/* -- * (C) Copyright 2004 -- * DAVE Srl -- * http://www.dave-tech.it -- * http://www.wawnet.biz -- * mailto:info@wawnet.biz -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --#include -- --/* we always count down the max. */ --#define TIMER_LOAD_VAL 0xffff -- --/* macro to read the 16 bit timer */ --#define READ_TIMER (TCNTO1 & 0xffff) -- --#ifdef CONFIG_USE_IRQ --#error CONFIG_USE_IRQ NOT supported --#endif -- --static ulong timestamp; --static ulong lastdec; -- --int interrupt_init (void) --{ -- TCFG0 = 0x000000E9; -- TCFG1 = 0x00000004; -- TCON = 0x00000900; -- TCNTB1 = TIMER_LOAD_VAL; -- TCMPB1 = 0; -- TCON = 0x00000B00; -- TCON = 0x00000900; -- -- -- lastdec = TCNTB1 = TIMER_LOAD_VAL; -- timestamp = 0; -- return 0; --} -- --/* -- * timer without interrupts -- */ -- --void reset_timer (void) --{ -- reset_timer_masked (); --} -- --ulong get_timer (ulong base) --{ -- return get_timer_masked () - base; --} -- --void set_timer (ulong t) --{ -- timestamp = t; --} -- --void udelay (unsigned long usec) --{ -- ulong tmo; -- -- tmo = usec / 1000; -- tmo *= CONFIG_SYS_HZ; -- tmo /= 8; -- -- tmo += get_timer (0); -- -- while (get_timer_masked () < tmo) -- /*NOP*/; --} -- --void reset_timer_masked (void) --{ -- /* reset time */ -- lastdec = READ_TIMER; -- timestamp = 0; --} -- --ulong get_timer_masked (void) --{ -- ulong now = READ_TIMER; -- -- if (lastdec >= now) { -- /* normal mode */ -- timestamp += lastdec - now; -- } else { -- /* we have an overflow ... */ -- timestamp += lastdec + TIMER_LOAD_VAL - now; -- } -- lastdec = now; -- -- return timestamp; --} -- --void udelay_masked (unsigned long usec) --{ -- ulong tmo; -- ulong endtime; -- signed long diff; -- -- if (usec >= 1000) { -- tmo = usec / 1000; -- tmo *= CONFIG_SYS_HZ; -- tmo /= 8; -- } else { -- tmo = usec * CONFIG_SYS_HZ; -- tmo /= (1000*8); -- } -- -- endtime = get_timer(0) + tmo; -- -- do { -- ulong now = get_timer_masked (); -- diff = endtime - now; -- } while (diff >= 0); --} -diff --git a/cpu/s3c44b0/timer.c b/cpu/s3c44b0/timer.c -new file mode 100644 -index 0000000..34184ab ---- /dev/null -+++ b/cpu/s3c44b0/timer.c -@@ -0,0 +1,136 @@ -+/* -+ * (C) Copyright 2004 -+ * DAVE Srl -+ * http://www.dave-tech.it -+ * http://www.wawnet.biz -+ * mailto:info@wawnet.biz -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+#include -+ -+/* we always count down the max. */ -+#define TIMER_LOAD_VAL 0xffff -+ -+/* macro to read the 16 bit timer */ -+#define READ_TIMER (TCNTO1 & 0xffff) -+ -+#ifdef CONFIG_USE_IRQ -+#error CONFIG_USE_IRQ NOT supported -+#endif -+ -+static ulong timestamp; -+static ulong lastdec; -+ -+int timer_init (void) -+{ -+ TCFG0 = 0x000000E9; -+ TCFG1 = 0x00000004; -+ TCON = 0x00000900; -+ TCNTB1 = TIMER_LOAD_VAL; -+ TCMPB1 = 0; -+ TCON = 0x00000B00; -+ TCON = 0x00000900; -+ -+ -+ lastdec = TCNTB1 = TIMER_LOAD_VAL; -+ timestamp = 0; -+ return 0; -+} -+ -+/* -+ * timer without interrupts -+ */ -+ -+void reset_timer (void) -+{ -+ reset_timer_masked (); -+} -+ -+ulong get_timer (ulong base) -+{ -+ return get_timer_masked () - base; -+} -+ -+void set_timer (ulong t) -+{ -+ timestamp = t; -+} -+ -+void udelay (unsigned long usec) -+{ -+ ulong tmo; -+ -+ tmo = usec / 1000; -+ tmo *= CONFIG_SYS_HZ; -+ tmo /= 8; -+ -+ tmo += get_timer (0); -+ -+ while (get_timer_masked () < tmo) -+ /*NOP*/; -+} -+ -+void reset_timer_masked (void) -+{ -+ /* reset time */ -+ lastdec = READ_TIMER; -+ timestamp = 0; -+} -+ -+ulong get_timer_masked (void) -+{ -+ ulong now = READ_TIMER; -+ -+ if (lastdec >= now) { -+ /* normal mode */ -+ timestamp += lastdec - now; -+ } else { -+ /* we have an overflow ... */ -+ timestamp += lastdec + TIMER_LOAD_VAL - now; -+ } -+ lastdec = now; -+ -+ return timestamp; -+} -+ -+void udelay_masked (unsigned long usec) -+{ -+ ulong tmo; -+ ulong endtime; -+ signed long diff; -+ -+ if (usec >= 1000) { -+ tmo = usec / 1000; -+ tmo *= CONFIG_SYS_HZ; -+ tmo /= 8; -+ } else { -+ tmo = usec * CONFIG_SYS_HZ; -+ tmo /= (1000*8); -+ } -+ -+ endtime = get_timer(0) + tmo; -+ -+ do { -+ ulong now = get_timer_masked (); -+ diff = endtime - now; -+ } while (diff >= 0); -+} -diff --git a/cpu/s3c44b0/u-boot.lds b/cpu/s3c44b0/u-boot.lds -new file mode 100644 -index 0000000..41ca3b4 ---- /dev/null -+++ b/cpu/s3c44b0/u-boot.lds -@@ -0,0 +1,56 @@ -+/* -+ * (C) Copyright 2000-2004 -+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -+OUTPUT_ARCH(arm) -+ENTRY(_start) -+SECTIONS -+{ -+ . = 0x00000000; -+ -+ . = ALIGN(4); -+ .text : -+ { -+ cpu/s3c44b0/start.o (.text) -+ *(.text) -+ } -+ -+ . = ALIGN(4); -+ .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -+ -+ . = ALIGN(4); -+ .data : { *(.data) } -+ -+ . = ALIGN(4); -+ .got : { *(.got) } -+ -+ . = .; -+ __u_boot_cmd_start = .; -+ .u_boot_cmd : { *(.u_boot_cmd) } -+ __u_boot_cmd_end = .; -+ -+ . = ALIGN(4); -+ __bss_start = .; -+ .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -+ _end = .; -+} -diff --git a/cpu/sa1100/Makefile b/cpu/sa1100/Makefile -index fd696f7..28b6682 100644 ---- a/cpu/sa1100/Makefile -+++ b/cpu/sa1100/Makefile -@@ -26,7 +26,9 @@ include $(TOPDIR)/config.mk - LIB = $(obj)lib$(CPU).a - - START = start.o --COBJS = interrupts.o cpu.o -+ -+COBJS += cpu.o -+COBJS += timer.o - - SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) - OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) -diff --git a/cpu/sa1100/cpu.c b/cpu/sa1100/cpu.c -index ed1a6f7..58e90dc 100644 ---- a/cpu/sa1100/cpu.c -+++ b/cpu/sa1100/cpu.c -@@ -40,18 +40,6 @@ DECLARE_GLOBAL_DATA_PTR; - - static void cache_flush(void); - --int cpu_init (void) --{ -- /* -- * setup up stacks if necessary -- */ --#ifdef CONFIG_USE_IRQ -- IRQ_STACK_START = _armboot_start - CONFIG_SYS_MALLOC_LEN - CONFIG_SYS_GBL_DATA_SIZE - 4; -- FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ; --#endif -- return 0; --} -- - int cleanup_before_linux (void) - { - /* -diff --git a/cpu/sa1100/interrupts.c b/cpu/sa1100/interrupts.c -deleted file mode 100644 -index 2eff045..0000000 ---- a/cpu/sa1100/interrupts.c -+++ /dev/null -@@ -1,111 +0,0 @@ --/* -- * (C) Copyright 2002 -- * Sysgo Real-Time Solutions, GmbH -- * Marius Groeger -- * -- * (C) Copyright 2002 -- * Sysgo Real-Time Solutions, GmbH -- * Alex Zuepke -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#include --#include -- --int interrupt_init (void) --{ -- /* nothing happens here - we don't setup any IRQs */ -- return (0); --} -- --void reset_timer (void) --{ -- reset_timer_masked (); --} -- --ulong get_timer (ulong base) --{ -- return get_timer_masked (); --} -- --void set_timer (ulong t) --{ -- /* nop */ --} -- --void udelay (unsigned long usec) --{ -- udelay_masked (usec); --} -- -- --void reset_timer_masked (void) --{ -- OSCR = 0; --} -- --ulong get_timer_masked (void) --{ -- return OSCR; --} -- --void udelay_masked (unsigned long usec) --{ -- ulong tmo; -- ulong endtime; -- signed long diff; -- -- if (usec >= 1000) { -- tmo = usec / 1000; -- tmo *= CONFIG_SYS_HZ; -- tmo /= 1000; -- } else { -- tmo = usec * CONFIG_SYS_HZ; -- tmo /= (1000*1000); -- } -- -- endtime = get_timer_masked () + tmo; -- -- do { -- ulong now = get_timer_masked (); -- diff = endtime - now; -- } while (diff >= 0); --} -- --/* -- * This function is derived from PowerPC code (read timebase as long long). -- * On ARM it just returns the timer value. -- */ --unsigned long long get_ticks(void) --{ -- return get_timer(0); --} -- --/* -- * This function is derived from PowerPC code (timebase clock frequency). -- * On ARM it returns the number of timer ticks per second. -- */ --ulong get_tbclk (void) --{ -- ulong tbclk; -- -- tbclk = CONFIG_SYS_HZ; -- return tbclk; --} -diff --git a/cpu/sa1100/timer.c b/cpu/sa1100/timer.c -new file mode 100644 -index 0000000..3f77e81 ---- /dev/null -+++ b/cpu/sa1100/timer.c -@@ -0,0 +1,110 @@ -+/* -+ * (C) Copyright 2002 -+ * Sysgo Real-Time Solutions, GmbH -+ * Marius Groeger -+ * -+ * (C) Copyright 2002 -+ * Sysgo Real-Time Solutions, GmbH -+ * Alex Zuepke -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include -+#include -+ -+int timer_init (void) -+{ -+ return 0; -+} -+ -+void reset_timer (void) -+{ -+ reset_timer_masked (); -+} -+ -+ulong get_timer (ulong base) -+{ -+ return get_timer_masked (); -+} -+ -+void set_timer (ulong t) -+{ -+ /* nop */ -+} -+ -+void udelay (unsigned long usec) -+{ -+ udelay_masked (usec); -+} -+ -+ -+void reset_timer_masked (void) -+{ -+ OSCR = 0; -+} -+ -+ulong get_timer_masked (void) -+{ -+ return OSCR; -+} -+ -+void udelay_masked (unsigned long usec) -+{ -+ ulong tmo; -+ ulong endtime; -+ signed long diff; -+ -+ if (usec >= 1000) { -+ tmo = usec / 1000; -+ tmo *= CONFIG_SYS_HZ; -+ tmo /= 1000; -+ } else { -+ tmo = usec * CONFIG_SYS_HZ; -+ tmo /= (1000*1000); -+ } -+ -+ endtime = get_timer_masked () + tmo; -+ -+ do { -+ ulong now = get_timer_masked (); -+ diff = endtime - now; -+ } while (diff >= 0); -+} -+ -+/* -+ * This function is derived from PowerPC code (read timebase as long long). -+ * On ARM it just returns the timer value. -+ */ -+unsigned long long get_ticks(void) -+{ -+ return get_timer(0); -+} -+ -+/* -+ * This function is derived from PowerPC code (timebase clock frequency). -+ * On ARM it returns the number of timer ticks per second. -+ */ -+ulong get_tbclk (void) -+{ -+ ulong tbclk; -+ -+ tbclk = CONFIG_SYS_HZ; -+ return tbclk; -+} -diff --git a/cpu/sa1100/u-boot.lds b/cpu/sa1100/u-boot.lds -new file mode 100644 -index 0000000..0c02e76 ---- /dev/null -+++ b/cpu/sa1100/u-boot.lds -@@ -0,0 +1,59 @@ -+/* -+ * (C) Copyright 2003-2004 -+ * MontaVista Software, Inc. -+ * -+ * (C) Copyright 2000-2004 -+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -+OUTPUT_ARCH(arm) -+ENTRY(_start) -+SECTIONS -+{ -+ . = 0x00000000; -+ -+ . = ALIGN(4); -+ .text : -+ { -+ cpu/sa1100/start.o (.text) -+ *(.text) -+ } -+ -+ . = ALIGN(4); -+ .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } -+ -+ . = ALIGN(4); -+ .data : { *(.data) } -+ -+ . = ALIGN(4); -+ .got : { *(.got) } -+ -+ . = .; -+ __u_boot_cmd_start = .; -+ .u_boot_cmd : { *(.u_boot_cmd) } -+ __u_boot_cmd_end = .; -+ -+ . = ALIGN(4); -+ __bss_start = .; -+ .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } -+ _end = .; -+} -diff --git a/doc/README.LED b/doc/README.LED -new file mode 100644 -index 0000000..1221177 ---- /dev/null -+++ b/doc/README.LED -@@ -0,0 +1,78 @@ -+Status LED -+======================================== -+ -+This README describes the status LED API. -+ -+The API is defined by the include file include/status_led.h -+ -+The first step is to define CONFIG_STATUS_LED in the board config file. -+ -+If the LED support is only for a single board, define CONFIG_BOARD_SPECIFIC_LED -+in the board config file. -+ -+At a minimum, these macros must be defined at -+STATUS_LED_BIT -+STATUS_LED_STATE -+STATUS_LED_PERIOD -+ -+If there are multiple status LED's define -+STATUS_LED_BIT -+STATUS_LED_STATE -+STATUS_LED_PERIOD -+ -+Where can a integer 1 through 3. -+ -+STATUS_LED_BIT is passed into the __led_* functions to identify which LED is -+being acted on. As such, the value choose must be unique with with respect to -+the other STATUS_LED_BIT's. Mapping the value to a physical LED is the -+reponsiblity of the __led_* function. -+ -+STATUS_LED_STATE is the initial state of the LED. It should be set to one of -+these values: STATUS_LED_OFF or STATUS_LED_ON. -+ -+STATUS_LED_PERIOD is how long is the LED blink period. This usually set to -+(CONFIG_SYS_HZ / ) where is the frequency of the blink. Typical values -+range from 2 to 10. -+ -+Some other LED macros -+ -+STATUS_LED_BOOT is the LED to light when the board is booting. This must be a -+valid STATUS_LED_BIT value. -+ -+STATUS_LED_RED is the red LED. It is used signal errors. This must be a valid -+STATUS_LED_BIT value. Other similar color LED's are STATUS_LED_YELLOW and -+STATUS_LED_BLUE. -+ -+These board must define these functions -+ -+__led_init is called once to initialize the LED to STATUS_LED_STATE. One time -+start up code should be placed here. -+ -+__led_set is called to change the state of the LED. -+ -+__led_toggle is called to toggle the current state of the LED. -+ -+Colour LED -+======================================== -+ -+Colour LED's are at present only used by ARM. -+ -+The functions names explain their purpose. -+ -+coloured_LED_init -+red_LED_on -+red_LED_off -+green_LED_on -+green_LED_off -+yellow_LED_on -+yellow_LED_off -+blue_LED_on -+blue_LED_off -+ -+These are weakly defined in lib_arm/board.c to noops. Where applicable, define -+these functions in the board specific source. -+ -+TBD : Describe older board dependent macros similar to what is done for -+CONFIG_TQM8xxL. -+ -+TBD : Describe general support via asm/status_led.h -diff --git a/doc/README.ebony b/doc/README.ebony -index a395a49..a8479a4 100644 ---- a/doc/README.ebony -+++ b/doc/README.ebony -@@ -31,17 +31,17 @@ J42: open - All others are factory default. - - --I2C iprobe -+I2C probe - ===================== - - The i2c utilities have been tested on both Rev B. and Rev C. and - look good. The CONFIG_SYS_I2C_NOPROBES macro is defined to prevent - probing the CDCV850 clock controller at address 0x69 (since reading - it causes the i2c implementation to misbehave. The output of --iprobe should look like this (assuming you are only using a single -+'i2c probe' should look like this (assuming you are only using a single - SO-DIMM: - --=> iprobe -+=> i2c probe - Valid chip addresses: 50 53 54 - Excluded chip addresses: 69 - -@@ -63,13 +63,13 @@ J42 - strapped - - This will select the default sys0 and sys1 settings (the serial - eeproms are not used). Then power up the board and fix the serial --eeprom using the imm command. Here are the values I currently -+eeprom using the 'i2c mm' command. Here are the values I currently - use: - --=> imd 50 0 10 -+=> i2c md 50 0 10 - 0000: bf a2 04 01 ae 94 11 00 00 00 00 00 00 00 00 00 ................ - --=> imd 54 0 10 -+=> i2c md 54 0 10 - 0000: 8f b3 24 01 4d 14 11 00 00 00 00 00 00 00 00 00 ..$.M........... - - Once you have the eeproms set correctly change the -@@ -83,8 +83,8 @@ the SPD to initialize the DDR SDRAM control registers. So if the SPD - eeprom is corrupted, U-Boot will never get into ram. Here's how I got - out of this situation: - --0. First, _before_ playing with the i2c utilities, do an iprobe, then --use imd to capture the various device contents to a file. Some day -+0. First, _before_ playing with the i2c utilities, do an 'i2c probe', then -+use 'i2c md' to capture the various device contents to a file. Some day - you may be glad you did this ... trust me :-). Otherwise try the - following: - -@@ -100,12 +100,12 @@ settings without using the SPD eeprom. - - 3. Load the new U-Boot image and reboot ebony. - --4. Repair the SPD eeprom using the imm command. Here's the eeprom -+4. Repair the SPD eeprom using the 'i2c mm' command. Here's the eeprom - contents that work with the default SO-DIMM that comes with the - ebony board (micron 8VDDT164AG-265A1). Note: these are probably - _not_ the factory settings ... but they work. - --=> imd 53 0 10 80 -+=> i2c md 53 0 10 80 - 0000: 80 08 07 0c 0a 01 40 00 04 75 75 00 80 08 00 01 ......@..uu..... - 0010: 0e 04 0c 01 02 20 00 a0 75 00 00 50 3c 50 2d 20 ..... ..u..P imd 50 0 10 -+=> i2c md 50 0 10 - - 0000: 85 7d 42 06 07 80 11 00 00 00 00 00 00 00 00 00 .}B............. - -diff --git a/doc/feature-removal-schedule.txt b/doc/feature-removal-schedule.txt -index b1f0582..9bbdc0a 100644 ---- a/doc/feature-removal-schedule.txt -+++ b/doc/feature-removal-schedule.txt -@@ -59,18 +59,6 @@ Who: Wolfgang Denk and board maintainers - - --------------------------- - --What: Individual I2C commands --When: April 2009 --Why: Per the U-Boot README, individual I2C commands such as "imd", "imm", -- "imw", etc are deprecated. The single "i2c" command which is -- currently enabled via CONFIG_I2C_CMD_TREE contains the same -- functionality as the individual I2C commands. The individual -- I2C commands should be removed as well as any references to -- CONFIG_I2C_CMD_TREE. --Who: Peter Tyser -- ----------------------------- -- - What: Legacy NAND code - When: April 2009 - Why: Legacy NAND code is deprecated. Similar functionality exists in -diff --git a/drivers/gpio/pca953x.c b/drivers/gpio/pca953x.c -index 1c5e314..e8273ee 100644 ---- a/drivers/gpio/pca953x.c -+++ b/drivers/gpio/pca953x.c -@@ -221,7 +221,7 @@ U_BOOT_CMD( - "pca953x invert pin 0|1\n" - " - disable/enable polarity inversion for reads\n" - "pca953x intput pin\n" -- " - set pin as input and read value\n" -+ " - set pin as input and read value" - ); - - #endif /* CONFIG_CMD_PCA953X */ -diff --git a/drivers/i2c/soft_i2c.c b/drivers/i2c/soft_i2c.c -index 185634d..59883a5 100644 ---- a/drivers/i2c/soft_i2c.c -+++ b/drivers/i2c/soft_i2c.c -@@ -244,20 +244,6 @@ int i2c_set_bus_num(unsigned int bus) - } - #endif - --/* TODO: add 100/400k switching */ --unsigned int i2c_get_bus_speed(void) --{ -- return CONFIG_SYS_I2C_SPEED; --} -- --int i2c_set_bus_speed(unsigned int speed) --{ -- if (speed != CONFIG_SYS_I2C_SPEED) -- return -1; -- -- return 0; --} -- - /*----------------------------------------------------------------------- - * if ack == I2C_ACK, ACK the byte so can continue reading, else - * send I2C_NOACK to end the read. -diff --git a/drivers/i2c/tsi108_i2c.c b/drivers/i2c/tsi108_i2c.c -index fda822c..defbba4 100644 ---- a/drivers/i2c/tsi108_i2c.c -+++ b/drivers/i2c/tsi108_i2c.c -@@ -41,6 +41,15 @@ - /* All functions assume that Tsi108 I2C block is the only master on the bus */ - /* I2C read helper function */ - -+void i2c_init(int speed, int slaveaddr) -+{ -+ /* -+ * The TSI108 has a fixed I2C clock rate and doesn't support slave -+ * operation. This function only exists as a stub to fit into the -+ * U-Boot I2C API. -+ */ -+} -+ - static int i2c_read_byte ( - uint i2c_chan, /* I2C channel number: 0 - main, 1 - SDC SPD */ - uchar chip_addr,/* I2C device address on the bus */ -@@ -120,7 +129,7 @@ static int i2c_read_byte ( - * chip_addr: I2C chip address, range 0..127 - * (to read from SPD channel EEPROM use (0xD0 ... 0xD7) - * NOTE: The bit 7 in the chip_addr serves as a channel select. -- * This hack is for enabling "isdram" command on Tsi108 boards -+ * This hack is for enabling "i2c sdram" command on Tsi108 boards - * without changes to common code. Used for I2C reads only. - * byte_addr: Memory or register address within the chip - * alen: Number of bytes to use for addr (typically 1, 2 for larger -diff --git a/drivers/misc/ds4510.c b/drivers/misc/ds4510.c -index 8b5fbbc..f2510a3 100644 ---- a/drivers/misc/ds4510.c -+++ b/drivers/misc/ds4510.c -@@ -404,12 +404,14 @@ U_BOOT_CMD( - "ds4510 pullup pin 0|1\n" - " - disable/enable pullup on specified pin\n" - "ds4510 nv 0|1\n" -- " - make gpio and seeprom writes volatile/non-volatile\n" -+ " - make gpio and seeprom writes volatile/non-volatile" - #ifdef CONFIG_CMD_DS4510_RST -+ "\n" - "ds4510 rstdelay 0-3\n" -- " - set reset output delay\n" -+ " - set reset output delay" - #endif - #ifdef CONFIG_CMD_DS4510_MEM -+ "\n" - "ds4510 eeprom read addr off cnt\n" - "ds4510 eeprom write addr off cnt\n" - " - read/write 'cnt' bytes at EEPROM offset 'off'\n" -@@ -418,7 +420,7 @@ U_BOOT_CMD( - " - read/write 'cnt' bytes at SRAM-shadowed EEPROM offset 'off'\n" - "ds4510 sram read addr off cnt\n" - "ds4510 sram write addr off cnt\n" -- " - read/write 'cnt' bytes at SRAM offset 'off'\n" -+ " - read/write 'cnt' bytes at SRAM offset 'off'" - #endif - ); - #endif /* CONFIG_CMD_DS4510 */ -diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile -index ed3f91e..754d648 100644 ---- a/drivers/mtd/Makefile -+++ b/drivers/mtd/Makefile -@@ -25,7 +25,9 @@ include $(TOPDIR)/config.mk - - LIB := $(obj)libmtd.a - --COBJS-$(CONFIG_MTD_PARTITIONS) += mtdcore.o mtdpart.o -+COBJS-$(CONFIG_MTD_DEVICE) += mtdcore.o -+COBJS-$(CONFIG_MTD_PARTITIONS) += mtdpart.o -+COBJS-$(CONFIG_MTD_CONCAT) += mtdconcat.o - COBJS-$(CONFIG_HAS_DATAFLASH) += at45.o - COBJS-$(CONFIG_FLASH_CFI_DRIVER) += cfi_flash.o - COBJS-$(CONFIG_FLASH_CFI_MTD) += cfi_mtd.o -diff --git a/drivers/mtd/cfi_mtd.c b/drivers/mtd/cfi_mtd.c -index 4a76917..c7e357b 100644 ---- a/drivers/mtd/cfi_mtd.c -+++ b/drivers/mtd/cfi_mtd.c -@@ -25,14 +25,19 @@ - - #include - #include -+#include - - #include - #include -+#include - - extern flash_info_t flash_info[]; - - static struct mtd_info cfi_mtd_info[CONFIG_SYS_MAX_FLASH_BANKS]; - static char cfi_mtd_names[CONFIG_SYS_MAX_FLASH_BANKS][16]; -+#ifdef CONFIG_MTD_CONCAT -+static char c_mtd_name[16]; -+#endif - - static int cfi_mtd_erase(struct mtd_info *mtd, struct erase_info *instr) - { -@@ -118,7 +123,7 @@ static void cfi_mtd_sync(struct mtd_info *mtd) - */ - } - --static int cfi_mtd_lock(struct mtd_info *mtd, loff_t ofs, size_t len) -+static int cfi_mtd_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len) - { - flash_info_t *fi = mtd->priv; - -@@ -130,7 +135,7 @@ static int cfi_mtd_lock(struct mtd_info *mtd, loff_t ofs, size_t len) - return 0; - } - --static int cfi_mtd_unlock(struct mtd_info *mtd, loff_t ofs, size_t len) -+static int cfi_mtd_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len) - { - flash_info_t *fi = mtd->priv; - -@@ -145,16 +150,68 @@ static int cfi_mtd_unlock(struct mtd_info *mtd, loff_t ofs, size_t len) - static int cfi_mtd_set_erasesize(struct mtd_info *mtd, flash_info_t *fi) - { - int sect_size = 0; -+ int sect_size_old = 0; - int sect; -+ int regions = 0; -+ int numblocks = 0; -+ ulong offset = 0; -+ ulong base_addr = fi->start[0]; - - /* -- * Select the largest sector size as erasesize (e.g. for UBI) -+ * First detect the number of eraseregions so that we can allocate -+ * the array of eraseregions correctly - */ - for (sect = 0; sect < fi->sector_count; sect++) { -+ if (sect_size_old != flash_sector_size(fi, sect)) -+ regions++; -+ sect_size_old = flash_sector_size(fi, sect); -+ } -+ -+ mtd->eraseregions = malloc(sizeof(struct mtd_erase_region_info) * regions); -+ -+ /* -+ * Now detect the largest sector and fill the eraseregions -+ */ -+ sect_size_old = 0; -+ regions = 0; -+ for (sect = 0; sect < fi->sector_count; sect++) { -+ if ((sect_size_old != flash_sector_size(fi, sect)) && -+ (sect_size_old != 0)) { -+ mtd->eraseregions[regions].offset = offset - base_addr; -+ mtd->eraseregions[regions].erasesize = sect_size_old; -+ mtd->eraseregions[regions].numblocks = numblocks; -+ -+ /* Now start counting the next eraseregions */ -+ numblocks = 0; -+ regions++; -+ } else { -+ numblocks++; -+ } -+ -+ if (sect_size_old != flash_sector_size(fi, sect)) -+ offset = fi->start[sect]; -+ -+ /* -+ * Select the largest sector size as erasesize (e.g. for UBI) -+ */ - if (flash_sector_size(fi, sect) > sect_size) - sect_size = flash_sector_size(fi, sect); -+ -+ sect_size_old = flash_sector_size(fi, sect); - } - -+ /* -+ * Set the last region -+ */ -+ mtd->eraseregions[regions].offset = offset - base_addr; -+ mtd->eraseregions[regions].erasesize = sect_size_old; -+ mtd->eraseregions[regions].numblocks = numblocks + 1; -+ -+ if (regions) -+ mtd->numeraseregions = regions + 1; -+ else -+ mtd->numeraseregions = 0; -+ - mtd->erasesize = sect_size; - - return 0; -@@ -165,6 +222,8 @@ int cfi_mtd_init(void) - struct mtd_info *mtd; - flash_info_t *fi; - int error, i; -+ int devices_found = 0; -+ struct mtd_info *mtd_list[CONFIG_SYS_MAX_FLASH_BANKS]; - - for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { - fi = &flash_info[i]; -@@ -193,7 +252,25 @@ int cfi_mtd_init(void) - - if (add_mtd_device(mtd)) - return -ENOMEM; -+ -+ mtd_list[devices_found++] = mtd; -+ } -+ -+#ifdef CONFIG_MTD_CONCAT -+ if (devices_found > 1) { -+ /* -+ * We detected multiple devices. Concatenate them together. -+ */ -+ sprintf(c_mtd_name, "nor%d", devices_found); -+ mtd = mtd_concat_create(mtd_list, devices_found, c_mtd_name); -+ -+ if (mtd == NULL) -+ return -ENXIO; -+ -+ if (add_mtd_device(mtd)) -+ return -ENOMEM; - } -+#endif /* CONFIG_MTD_CONCAT */ - - return 0; - } -diff --git a/drivers/mtd/mtdconcat.c b/drivers/mtd/mtdconcat.c -new file mode 100644 -index 0000000..fc22701 ---- /dev/null -+++ b/drivers/mtd/mtdconcat.c -@@ -0,0 +1,807 @@ -+/* -+ * MTD device concatenation layer -+ * -+ * (C) 2002 Robert Kaiser -+ * -+ * NAND support by Christian Gan -+ * -+ * This code is GPL -+ */ -+ -+#include -+#include -+#include -+#include -+ -+/* -+ * Our storage structure: -+ * Subdev points to an array of pointers to struct mtd_info objects -+ * which is allocated along with this structure -+ * -+ */ -+struct mtd_concat { -+ struct mtd_info mtd; -+ int num_subdev; -+ struct mtd_info **subdev; -+}; -+ -+/* -+ * how to calculate the size required for the above structure, -+ * including the pointer array subdev points to: -+ */ -+#define SIZEOF_STRUCT_MTD_CONCAT(num_subdev) \ -+ ((sizeof(struct mtd_concat) + (num_subdev) * sizeof(struct mtd_info *))) -+ -+/* -+ * Given a pointer to the MTD object in the mtd_concat structure, -+ * we can retrieve the pointer to that structure with this macro. -+ */ -+#define CONCAT(x) ((struct mtd_concat *)(x)) -+ -+/* -+ * MTD methods which look up the relevant subdevice, translate the -+ * effective address and pass through to the subdevice. -+ */ -+ -+static int -+concat_read(struct mtd_info *mtd, loff_t from, size_t len, -+ size_t * retlen, u_char * buf) -+{ -+ struct mtd_concat *concat = CONCAT(mtd); -+ int ret = 0, err; -+ int i; -+ -+ *retlen = 0; -+ -+ for (i = 0; i < concat->num_subdev; i++) { -+ struct mtd_info *subdev = concat->subdev[i]; -+ size_t size, retsize; -+ -+ if (from >= subdev->size) { -+ /* Not destined for this subdev */ -+ size = 0; -+ from -= subdev->size; -+ continue; -+ } -+ if (from + len > subdev->size) -+ /* First part goes into this subdev */ -+ size = subdev->size - from; -+ else -+ /* Entire transaction goes into this subdev */ -+ size = len; -+ -+ err = subdev->read(subdev, from, size, &retsize, buf); -+ -+ /* Save information about bitflips! */ -+ if (unlikely(err)) { -+ if (err == -EBADMSG) { -+ mtd->ecc_stats.failed++; -+ ret = err; -+ } else if (err == -EUCLEAN) { -+ mtd->ecc_stats.corrected++; -+ /* Do not overwrite -EBADMSG !! */ -+ if (!ret) -+ ret = err; -+ } else -+ return err; -+ } -+ -+ *retlen += retsize; -+ len -= size; -+ if (len == 0) -+ return ret; -+ -+ buf += size; -+ from = 0; -+ } -+ return -EINVAL; -+} -+ -+static int -+concat_write(struct mtd_info *mtd, loff_t to, size_t len, -+ size_t * retlen, const u_char * buf) -+{ -+ struct mtd_concat *concat = CONCAT(mtd); -+ int err = -EINVAL; -+ int i; -+ -+ if (!(mtd->flags & MTD_WRITEABLE)) -+ return -EROFS; -+ -+ *retlen = 0; -+ -+ for (i = 0; i < concat->num_subdev; i++) { -+ struct mtd_info *subdev = concat->subdev[i]; -+ size_t size, retsize; -+ -+ if (to >= subdev->size) { -+ size = 0; -+ to -= subdev->size; -+ continue; -+ } -+ if (to + len > subdev->size) -+ size = subdev->size - to; -+ else -+ size = len; -+ -+ if (!(subdev->flags & MTD_WRITEABLE)) -+ err = -EROFS; -+ else -+ err = subdev->write(subdev, to, size, &retsize, buf); -+ -+ if (err) -+ break; -+ -+ *retlen += retsize; -+ len -= size; -+ if (len == 0) -+ break; -+ -+ err = -EINVAL; -+ buf += size; -+ to = 0; -+ } -+ return err; -+} -+ -+static int -+concat_read_oob(struct mtd_info *mtd, loff_t from, struct mtd_oob_ops *ops) -+{ -+ struct mtd_concat *concat = CONCAT(mtd); -+ struct mtd_oob_ops devops = *ops; -+ int i, err, ret = 0; -+ -+ ops->retlen = ops->oobretlen = 0; -+ -+ for (i = 0; i < concat->num_subdev; i++) { -+ struct mtd_info *subdev = concat->subdev[i]; -+ -+ if (from >= subdev->size) { -+ from -= subdev->size; -+ continue; -+ } -+ -+ /* partial read ? */ -+ if (from + devops.len > subdev->size) -+ devops.len = subdev->size - from; -+ -+ err = subdev->read_oob(subdev, from, &devops); -+ ops->retlen += devops.retlen; -+ ops->oobretlen += devops.oobretlen; -+ -+ /* Save information about bitflips! */ -+ if (unlikely(err)) { -+ if (err == -EBADMSG) { -+ mtd->ecc_stats.failed++; -+ ret = err; -+ } else if (err == -EUCLEAN) { -+ mtd->ecc_stats.corrected++; -+ /* Do not overwrite -EBADMSG !! */ -+ if (!ret) -+ ret = err; -+ } else -+ return err; -+ } -+ -+ if (devops.datbuf) { -+ devops.len = ops->len - ops->retlen; -+ if (!devops.len) -+ return ret; -+ devops.datbuf += devops.retlen; -+ } -+ if (devops.oobbuf) { -+ devops.ooblen = ops->ooblen - ops->oobretlen; -+ if (!devops.ooblen) -+ return ret; -+ devops.oobbuf += ops->oobretlen; -+ } -+ -+ from = 0; -+ } -+ return -EINVAL; -+} -+ -+static int -+concat_write_oob(struct mtd_info *mtd, loff_t to, struct mtd_oob_ops *ops) -+{ -+ struct mtd_concat *concat = CONCAT(mtd); -+ struct mtd_oob_ops devops = *ops; -+ int i, err; -+ -+ if (!(mtd->flags & MTD_WRITEABLE)) -+ return -EROFS; -+ -+ ops->retlen = 0; -+ -+ for (i = 0; i < concat->num_subdev; i++) { -+ struct mtd_info *subdev = concat->subdev[i]; -+ -+ if (to >= subdev->size) { -+ to -= subdev->size; -+ continue; -+ } -+ -+ /* partial write ? */ -+ if (to + devops.len > subdev->size) -+ devops.len = subdev->size - to; -+ -+ err = subdev->write_oob(subdev, to, &devops); -+ ops->retlen += devops.retlen; -+ if (err) -+ return err; -+ -+ if (devops.datbuf) { -+ devops.len = ops->len - ops->retlen; -+ if (!devops.len) -+ return 0; -+ devops.datbuf += devops.retlen; -+ } -+ if (devops.oobbuf) { -+ devops.ooblen = ops->ooblen - ops->oobretlen; -+ if (!devops.ooblen) -+ return 0; -+ devops.oobbuf += devops.oobretlen; -+ } -+ to = 0; -+ } -+ return -EINVAL; -+} -+ -+static void concat_erase_callback(struct erase_info *instr) -+{ -+ /* Nothing to do here in U-Boot */ -+} -+ -+static int concat_dev_erase(struct mtd_info *mtd, struct erase_info *erase) -+{ -+ int err; -+ wait_queue_head_t waitq; -+ DECLARE_WAITQUEUE(wait, current); -+ -+ /* -+ * This code was stol^H^H^H^Hinspired by mtdchar.c -+ */ -+ init_waitqueue_head(&waitq); -+ -+ erase->mtd = mtd; -+ erase->callback = concat_erase_callback; -+ erase->priv = (unsigned long) &waitq; -+ -+ /* -+ * FIXME: Allow INTERRUPTIBLE. Which means -+ * not having the wait_queue head on the stack. -+ */ -+ err = mtd->erase(mtd, erase); -+ if (!err) { -+ set_current_state(TASK_UNINTERRUPTIBLE); -+ add_wait_queue(&waitq, &wait); -+ if (erase->state != MTD_ERASE_DONE -+ && erase->state != MTD_ERASE_FAILED) -+ schedule(); -+ remove_wait_queue(&waitq, &wait); -+ set_current_state(TASK_RUNNING); -+ -+ err = (erase->state == MTD_ERASE_FAILED) ? -EIO : 0; -+ } -+ return err; -+} -+ -+static int concat_erase(struct mtd_info *mtd, struct erase_info *instr) -+{ -+ struct mtd_concat *concat = CONCAT(mtd); -+ struct mtd_info *subdev; -+ int i, err; -+ uint64_t length, offset = 0; -+ struct erase_info *erase; -+ -+ if (!(mtd->flags & MTD_WRITEABLE)) -+ return -EROFS; -+ -+ if (instr->addr > concat->mtd.size) -+ return -EINVAL; -+ -+ if (instr->len + instr->addr > concat->mtd.size) -+ return -EINVAL; -+ -+ /* -+ * Check for proper erase block alignment of the to-be-erased area. -+ * It is easier to do this based on the super device's erase -+ * region info rather than looking at each particular sub-device -+ * in turn. -+ */ -+ if (!concat->mtd.numeraseregions) { -+ /* the easy case: device has uniform erase block size */ -+ if (instr->addr & (concat->mtd.erasesize - 1)) -+ return -EINVAL; -+ if (instr->len & (concat->mtd.erasesize - 1)) -+ return -EINVAL; -+ } else { -+ /* device has variable erase size */ -+ struct mtd_erase_region_info *erase_regions = -+ concat->mtd.eraseregions; -+ -+ /* -+ * Find the erase region where the to-be-erased area begins: -+ */ -+ for (i = 0; i < concat->mtd.numeraseregions && -+ instr->addr >= erase_regions[i].offset; i++) ; -+ --i; -+ -+ /* -+ * Now erase_regions[i] is the region in which the -+ * to-be-erased area begins. Verify that the starting -+ * offset is aligned to this region's erase size: -+ */ -+ if (instr->addr & (erase_regions[i].erasesize - 1)) -+ return -EINVAL; -+ -+ /* -+ * now find the erase region where the to-be-erased area ends: -+ */ -+ for (; i < concat->mtd.numeraseregions && -+ (instr->addr + instr->len) >= erase_regions[i].offset; -+ ++i) ; -+ --i; -+ /* -+ * check if the ending offset is aligned to this region's erase size -+ */ -+ if ((instr->addr + instr->len) & (erase_regions[i].erasesize - -+ 1)) -+ return -EINVAL; -+ } -+ -+ instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN; -+ -+ /* make a local copy of instr to avoid modifying the caller's struct */ -+ erase = kmalloc(sizeof (struct erase_info), GFP_KERNEL); -+ -+ if (!erase) -+ return -ENOMEM; -+ -+ *erase = *instr; -+ length = instr->len; -+ -+ /* -+ * find the subdevice where the to-be-erased area begins, adjust -+ * starting offset to be relative to the subdevice start -+ */ -+ for (i = 0; i < concat->num_subdev; i++) { -+ subdev = concat->subdev[i]; -+ if (subdev->size <= erase->addr) { -+ erase->addr -= subdev->size; -+ offset += subdev->size; -+ } else { -+ break; -+ } -+ } -+ -+ /* must never happen since size limit has been verified above */ -+ BUG_ON(i >= concat->num_subdev); -+ -+ /* now do the erase: */ -+ err = 0; -+ for (; length > 0; i++) { -+ /* loop for all subdevices affected by this request */ -+ subdev = concat->subdev[i]; /* get current subdevice */ -+ -+ /* limit length to subdevice's size: */ -+ if (erase->addr + length > subdev->size) -+ erase->len = subdev->size - erase->addr; -+ else -+ erase->len = length; -+ -+ if (!(subdev->flags & MTD_WRITEABLE)) { -+ err = -EROFS; -+ break; -+ } -+ length -= erase->len; -+ if ((err = concat_dev_erase(subdev, erase))) { -+ /* sanity check: should never happen since -+ * block alignment has been checked above */ -+ BUG_ON(err == -EINVAL); -+ if (erase->fail_addr != MTD_FAIL_ADDR_UNKNOWN) -+ instr->fail_addr = erase->fail_addr + offset; -+ break; -+ } -+ /* -+ * erase->addr specifies the offset of the area to be -+ * erased *within the current subdevice*. It can be -+ * non-zero only the first time through this loop, i.e. -+ * for the first subdevice where blocks need to be erased. -+ * All the following erases must begin at the start of the -+ * current subdevice, i.e. at offset zero. -+ */ -+ erase->addr = 0; -+ offset += subdev->size; -+ } -+ instr->state = erase->state; -+ kfree(erase); -+ if (err) -+ return err; -+ -+ if (instr->callback) -+ instr->callback(instr); -+ return 0; -+} -+ -+static int concat_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len) -+{ -+ struct mtd_concat *concat = CONCAT(mtd); -+ int i, err = -EINVAL; -+ -+ if ((len + ofs) > mtd->size) -+ return -EINVAL; -+ -+ for (i = 0; i < concat->num_subdev; i++) { -+ struct mtd_info *subdev = concat->subdev[i]; -+ uint64_t size; -+ -+ if (ofs >= subdev->size) { -+ size = 0; -+ ofs -= subdev->size; -+ continue; -+ } -+ if (ofs + len > subdev->size) -+ size = subdev->size - ofs; -+ else -+ size = len; -+ -+ err = subdev->lock(subdev, ofs, size); -+ -+ if (err) -+ break; -+ -+ len -= size; -+ if (len == 0) -+ break; -+ -+ err = -EINVAL; -+ ofs = 0; -+ } -+ -+ return err; -+} -+ -+static int concat_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len) -+{ -+ struct mtd_concat *concat = CONCAT(mtd); -+ int i, err = 0; -+ -+ if ((len + ofs) > mtd->size) -+ return -EINVAL; -+ -+ for (i = 0; i < concat->num_subdev; i++) { -+ struct mtd_info *subdev = concat->subdev[i]; -+ uint64_t size; -+ -+ if (ofs >= subdev->size) { -+ size = 0; -+ ofs -= subdev->size; -+ continue; -+ } -+ if (ofs + len > subdev->size) -+ size = subdev->size - ofs; -+ else -+ size = len; -+ -+ err = subdev->unlock(subdev, ofs, size); -+ -+ if (err) -+ break; -+ -+ len -= size; -+ if (len == 0) -+ break; -+ -+ err = -EINVAL; -+ ofs = 0; -+ } -+ -+ return err; -+} -+ -+static void concat_sync(struct mtd_info *mtd) -+{ -+ struct mtd_concat *concat = CONCAT(mtd); -+ int i; -+ -+ for (i = 0; i < concat->num_subdev; i++) { -+ struct mtd_info *subdev = concat->subdev[i]; -+ subdev->sync(subdev); -+ } -+} -+ -+static int concat_block_isbad(struct mtd_info *mtd, loff_t ofs) -+{ -+ struct mtd_concat *concat = CONCAT(mtd); -+ int i, res = 0; -+ -+ if (!concat->subdev[0]->block_isbad) -+ return res; -+ -+ if (ofs > mtd->size) -+ return -EINVAL; -+ -+ for (i = 0; i < concat->num_subdev; i++) { -+ struct mtd_info *subdev = concat->subdev[i]; -+ -+ if (ofs >= subdev->size) { -+ ofs -= subdev->size; -+ continue; -+ } -+ -+ res = subdev->block_isbad(subdev, ofs); -+ break; -+ } -+ -+ return res; -+} -+ -+static int concat_block_markbad(struct mtd_info *mtd, loff_t ofs) -+{ -+ struct mtd_concat *concat = CONCAT(mtd); -+ int i, err = -EINVAL; -+ -+ if (!concat->subdev[0]->block_markbad) -+ return 0; -+ -+ if (ofs > mtd->size) -+ return -EINVAL; -+ -+ for (i = 0; i < concat->num_subdev; i++) { -+ struct mtd_info *subdev = concat->subdev[i]; -+ -+ if (ofs >= subdev->size) { -+ ofs -= subdev->size; -+ continue; -+ } -+ -+ err = subdev->block_markbad(subdev, ofs); -+ if (!err) -+ mtd->ecc_stats.badblocks++; -+ break; -+ } -+ -+ return err; -+} -+ -+/* -+ * This function constructs a virtual MTD device by concatenating -+ * num_devs MTD devices. A pointer to the new device object is -+ * stored to *new_dev upon success. This function does _not_ -+ * register any devices: this is the caller's responsibility. -+ */ -+struct mtd_info *mtd_concat_create(struct mtd_info *subdev[], /* subdevices to concatenate */ -+ int num_devs, /* number of subdevices */ -+ const char *name) -+{ /* name for the new device */ -+ int i; -+ size_t size; -+ struct mtd_concat *concat; -+ uint32_t max_erasesize, curr_erasesize; -+ int num_erase_region; -+ -+ debug("Concatenating MTD devices:\n"); -+ for (i = 0; i < num_devs; i++) -+ debug("(%d): \"%s\"\n", i, subdev[i]->name); -+ debug("into device \"%s\"\n", name); -+ -+ /* allocate the device structure */ -+ size = SIZEOF_STRUCT_MTD_CONCAT(num_devs); -+ concat = kzalloc(size, GFP_KERNEL); -+ if (!concat) { -+ printk -+ ("memory allocation error while creating concatenated device \"%s\"\n", -+ name); -+ return NULL; -+ } -+ concat->subdev = (struct mtd_info **) (concat + 1); -+ -+ /* -+ * Set up the new "super" device's MTD object structure, check for -+ * incompatibilites between the subdevices. -+ */ -+ concat->mtd.type = subdev[0]->type; -+ concat->mtd.flags = subdev[0]->flags; -+ concat->mtd.size = subdev[0]->size; -+ concat->mtd.erasesize = subdev[0]->erasesize; -+ concat->mtd.writesize = subdev[0]->writesize; -+ concat->mtd.subpage_sft = subdev[0]->subpage_sft; -+ concat->mtd.oobsize = subdev[0]->oobsize; -+ concat->mtd.oobavail = subdev[0]->oobavail; -+ if (subdev[0]->read_oob) -+ concat->mtd.read_oob = concat_read_oob; -+ if (subdev[0]->write_oob) -+ concat->mtd.write_oob = concat_write_oob; -+ if (subdev[0]->block_isbad) -+ concat->mtd.block_isbad = concat_block_isbad; -+ if (subdev[0]->block_markbad) -+ concat->mtd.block_markbad = concat_block_markbad; -+ -+ concat->mtd.ecc_stats.badblocks = subdev[0]->ecc_stats.badblocks; -+ -+ concat->subdev[0] = subdev[0]; -+ -+ for (i = 1; i < num_devs; i++) { -+ if (concat->mtd.type != subdev[i]->type) { -+ kfree(concat); -+ printk("Incompatible device type on \"%s\"\n", -+ subdev[i]->name); -+ return NULL; -+ } -+ if (concat->mtd.flags != subdev[i]->flags) { -+ /* -+ * Expect all flags except MTD_WRITEABLE to be -+ * equal on all subdevices. -+ */ -+ if ((concat->mtd.flags ^ subdev[i]-> -+ flags) & ~MTD_WRITEABLE) { -+ kfree(concat); -+ printk("Incompatible device flags on \"%s\"\n", -+ subdev[i]->name); -+ return NULL; -+ } else -+ /* if writeable attribute differs, -+ make super device writeable */ -+ concat->mtd.flags |= -+ subdev[i]->flags & MTD_WRITEABLE; -+ } -+ -+ concat->mtd.size += subdev[i]->size; -+ concat->mtd.ecc_stats.badblocks += -+ subdev[i]->ecc_stats.badblocks; -+ if (concat->mtd.writesize != subdev[i]->writesize || -+ concat->mtd.subpage_sft != subdev[i]->subpage_sft || -+ concat->mtd.oobsize != subdev[i]->oobsize || -+ !concat->mtd.read_oob != !subdev[i]->read_oob || -+ !concat->mtd.write_oob != !subdev[i]->write_oob) { -+ kfree(concat); -+ printk("Incompatible OOB or ECC data on \"%s\"\n", -+ subdev[i]->name); -+ return NULL; -+ } -+ concat->subdev[i] = subdev[i]; -+ -+ } -+ -+ concat->mtd.ecclayout = subdev[0]->ecclayout; -+ -+ concat->num_subdev = num_devs; -+ concat->mtd.name = name; -+ -+ concat->mtd.erase = concat_erase; -+ concat->mtd.read = concat_read; -+ concat->mtd.write = concat_write; -+ concat->mtd.sync = concat_sync; -+ concat->mtd.lock = concat_lock; -+ concat->mtd.unlock = concat_unlock; -+ -+ /* -+ * Combine the erase block size info of the subdevices: -+ * -+ * first, walk the map of the new device and see how -+ * many changes in erase size we have -+ */ -+ max_erasesize = curr_erasesize = subdev[0]->erasesize; -+ num_erase_region = 1; -+ for (i = 0; i < num_devs; i++) { -+ if (subdev[i]->numeraseregions == 0) { -+ /* current subdevice has uniform erase size */ -+ if (subdev[i]->erasesize != curr_erasesize) { -+ /* if it differs from the last subdevice's erase size, count it */ -+ ++num_erase_region; -+ curr_erasesize = subdev[i]->erasesize; -+ if (curr_erasesize > max_erasesize) -+ max_erasesize = curr_erasesize; -+ } -+ } else { -+ /* current subdevice has variable erase size */ -+ int j; -+ for (j = 0; j < subdev[i]->numeraseregions; j++) { -+ -+ /* walk the list of erase regions, count any changes */ -+ if (subdev[i]->eraseregions[j].erasesize != -+ curr_erasesize) { -+ ++num_erase_region; -+ curr_erasesize = -+ subdev[i]->eraseregions[j]. -+ erasesize; -+ if (curr_erasesize > max_erasesize) -+ max_erasesize = curr_erasesize; -+ } -+ } -+ } -+ } -+ -+ if (num_erase_region == 1) { -+ /* -+ * All subdevices have the same uniform erase size. -+ * This is easy: -+ */ -+ concat->mtd.erasesize = curr_erasesize; -+ concat->mtd.numeraseregions = 0; -+ } else { -+ uint64_t tmp64; -+ -+ /* -+ * erase block size varies across the subdevices: allocate -+ * space to store the data describing the variable erase regions -+ */ -+ struct mtd_erase_region_info *erase_region_p; -+ uint64_t begin, position; -+ -+ concat->mtd.erasesize = max_erasesize; -+ concat->mtd.numeraseregions = num_erase_region; -+ concat->mtd.eraseregions = erase_region_p = -+ kmalloc(num_erase_region * -+ sizeof (struct mtd_erase_region_info), GFP_KERNEL); -+ if (!erase_region_p) { -+ kfree(concat); -+ printk -+ ("memory allocation error while creating erase region list" -+ " for device \"%s\"\n", name); -+ return NULL; -+ } -+ -+ /* -+ * walk the map of the new device once more and fill in -+ * in erase region info: -+ */ -+ curr_erasesize = subdev[0]->erasesize; -+ begin = position = 0; -+ for (i = 0; i < num_devs; i++) { -+ if (subdev[i]->numeraseregions == 0) { -+ /* current subdevice has uniform erase size */ -+ if (subdev[i]->erasesize != curr_erasesize) { -+ /* -+ * fill in an mtd_erase_region_info structure for the area -+ * we have walked so far: -+ */ -+ erase_region_p->offset = begin; -+ erase_region_p->erasesize = -+ curr_erasesize; -+ tmp64 = position - begin; -+ do_div(tmp64, curr_erasesize); -+ erase_region_p->numblocks = tmp64; -+ begin = position; -+ -+ curr_erasesize = subdev[i]->erasesize; -+ ++erase_region_p; -+ } -+ position += subdev[i]->size; -+ } else { -+ /* current subdevice has variable erase size */ -+ int j; -+ for (j = 0; j < subdev[i]->numeraseregions; j++) { -+ /* walk the list of erase regions, count any changes */ -+ if (subdev[i]->eraseregions[j]. -+ erasesize != curr_erasesize) { -+ erase_region_p->offset = begin; -+ erase_region_p->erasesize = -+ curr_erasesize; -+ tmp64 = position - begin; -+ do_div(tmp64, curr_erasesize); -+ erase_region_p->numblocks = tmp64; -+ begin = position; -+ -+ curr_erasesize = -+ subdev[i]->eraseregions[j]. -+ erasesize; -+ ++erase_region_p; -+ } -+ position += -+ subdev[i]->eraseregions[j]. -+ numblocks * (uint64_t)curr_erasesize; -+ } -+ } -+ } -+ /* Now write the final entry */ -+ erase_region_p->offset = begin; -+ erase_region_p->erasesize = curr_erasesize; -+ tmp64 = position - begin; -+ do_div(tmp64, curr_erasesize); -+ erase_region_p->numblocks = tmp64; -+ } -+ -+ return &concat->mtd; -+} -diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c -index f010f5e..e2e43ea 100644 ---- a/drivers/mtd/mtdpart.c -+++ b/drivers/mtd/mtdpart.c -@@ -26,7 +26,7 @@ struct list_head mtd_partitions; - struct mtd_part { - struct mtd_info mtd; - struct mtd_info *master; -- u_int32_t offset; -+ uint64_t offset; - int index; - struct list_head list; - int registered; -@@ -44,50 +44,32 @@ struct mtd_part { - * to the _real_ device. - */ - --static int part_read (struct mtd_info *mtd, loff_t from, size_t len, -- size_t *retlen, u_char *buf) -+static int part_read(struct mtd_info *mtd, loff_t from, size_t len, -+ size_t *retlen, u_char *buf) - { - struct mtd_part *part = PART(mtd); -+ struct mtd_ecc_stats stats; - int res; - -+ stats = part->master->ecc_stats; -+ - if (from >= mtd->size) - len = 0; - else if (from + len > mtd->size) - len = mtd->size - from; -- res = part->master->read (part->master, from + part->offset, -+ res = part->master->read(part->master, from + part->offset, - len, retlen, buf); - if (unlikely(res)) { - if (res == -EUCLEAN) -- mtd->ecc_stats.corrected++; -+ mtd->ecc_stats.corrected += part->master->ecc_stats.corrected - stats.corrected; - if (res == -EBADMSG) -- mtd->ecc_stats.failed++; -+ mtd->ecc_stats.failed += part->master->ecc_stats.failed - stats.failed; - } - return res; - } - --#ifdef MTD_LINUX --static int part_point (struct mtd_info *mtd, loff_t from, size_t len, -- size_t *retlen, void **virt, resource_size_t *phys) --{ -- struct mtd_part *part = PART(mtd); -- if (from >= mtd->size) -- len = 0; -- else if (from + len > mtd->size) -- len = mtd->size - from; -- return part->master->point (part->master, from + part->offset, -- len, retlen, virt, phys); --} -- --static void part_unpoint(struct mtd_info *mtd, loff_t from, size_t len) --{ -- struct mtd_part *part = PART(mtd); -- -- part->master->unpoint(part->master, from + part->offset, len); --} --#endif -- - static int part_read_oob(struct mtd_info *mtd, loff_t from, -- struct mtd_oob_ops *ops) -+ struct mtd_oob_ops *ops) - { - struct mtd_part *part = PART(mtd); - int res; -@@ -107,38 +89,38 @@ static int part_read_oob(struct mtd_info *mtd, loff_t from, - return res; - } - --static int part_read_user_prot_reg (struct mtd_info *mtd, loff_t from, size_t len, -- size_t *retlen, u_char *buf) -+static int part_read_user_prot_reg(struct mtd_info *mtd, loff_t from, -+ size_t len, size_t *retlen, u_char *buf) - { - struct mtd_part *part = PART(mtd); -- return part->master->read_user_prot_reg (part->master, from, -+ return part->master->read_user_prot_reg(part->master, from, - len, retlen, buf); - } - --static int part_get_user_prot_info (struct mtd_info *mtd, -- struct otp_info *buf, size_t len) -+static int part_get_user_prot_info(struct mtd_info *mtd, -+ struct otp_info *buf, size_t len) - { - struct mtd_part *part = PART(mtd); -- return part->master->get_user_prot_info (part->master, buf, len); -+ return part->master->get_user_prot_info(part->master, buf, len); - } - --static int part_read_fact_prot_reg (struct mtd_info *mtd, loff_t from, size_t len, -- size_t *retlen, u_char *buf) -+static int part_read_fact_prot_reg(struct mtd_info *mtd, loff_t from, -+ size_t len, size_t *retlen, u_char *buf) - { - struct mtd_part *part = PART(mtd); -- return part->master->read_fact_prot_reg (part->master, from, -+ return part->master->read_fact_prot_reg(part->master, from, - len, retlen, buf); - } - --static int part_get_fact_prot_info (struct mtd_info *mtd, -- struct otp_info *buf, size_t len) -+static int part_get_fact_prot_info(struct mtd_info *mtd, struct otp_info *buf, -+ size_t len) - { - struct mtd_part *part = PART(mtd); -- return part->master->get_fact_prot_info (part->master, buf, len); -+ return part->master->get_fact_prot_info(part->master, buf, len); - } - --static int part_write (struct mtd_info *mtd, loff_t to, size_t len, -- size_t *retlen, const u_char *buf) -+static int part_write(struct mtd_info *mtd, loff_t to, size_t len, -+ size_t *retlen, const u_char *buf) - { - struct mtd_part *part = PART(mtd); - if (!(mtd->flags & MTD_WRITEABLE)) -@@ -147,13 +129,12 @@ static int part_write (struct mtd_info *mtd, loff_t to, size_t len, - len = 0; - else if (to + len > mtd->size) - len = mtd->size - to; -- return part->master->write (part->master, to + part->offset, -+ return part->master->write(part->master, to + part->offset, - len, retlen, buf); - } - --#ifdef MTD_LINUX --static int part_panic_write (struct mtd_info *mtd, loff_t to, size_t len, -- size_t *retlen, const u_char *buf) -+static int part_panic_write(struct mtd_info *mtd, loff_t to, size_t len, -+ size_t *retlen, const u_char *buf) - { - struct mtd_part *part = PART(mtd); - if (!(mtd->flags & MTD_WRITEABLE)) -@@ -162,13 +143,12 @@ static int part_panic_write (struct mtd_info *mtd, loff_t to, size_t len, - len = 0; - else if (to + len > mtd->size) - len = mtd->size - to; -- return part->master->panic_write (part->master, to + part->offset, -+ return part->master->panic_write(part->master, to + part->offset, - len, retlen, buf); - } --#endif - - static int part_write_oob(struct mtd_info *mtd, loff_t to, -- struct mtd_oob_ops *ops) -+ struct mtd_oob_ops *ops) - { - struct mtd_part *part = PART(mtd); - -@@ -182,33 +162,22 @@ static int part_write_oob(struct mtd_info *mtd, loff_t to, - return part->master->write_oob(part->master, to + part->offset, ops); - } - --static int part_write_user_prot_reg (struct mtd_info *mtd, loff_t from, size_t len, -- size_t *retlen, u_char *buf) -+static int part_write_user_prot_reg(struct mtd_info *mtd, loff_t from, -+ size_t len, size_t *retlen, u_char *buf) - { - struct mtd_part *part = PART(mtd); -- return part->master->write_user_prot_reg (part->master, from, -+ return part->master->write_user_prot_reg(part->master, from, - len, retlen, buf); - } - --static int part_lock_user_prot_reg (struct mtd_info *mtd, loff_t from, size_t len) --{ -- struct mtd_part *part = PART(mtd); -- return part->master->lock_user_prot_reg (part->master, from, len); --} -- --#ifdef MTD_LINUX --static int part_writev (struct mtd_info *mtd, const struct kvec *vecs, -- unsigned long count, loff_t to, size_t *retlen) -+static int part_lock_user_prot_reg(struct mtd_info *mtd, loff_t from, -+ size_t len) - { - struct mtd_part *part = PART(mtd); -- if (!(mtd->flags & MTD_WRITEABLE)) -- return -EROFS; -- return part->master->writev (part->master, vecs, count, -- to + part->offset, retlen); -+ return part->master->lock_user_prot_reg(part->master, from, len); - } --#endif - --static int part_erase (struct mtd_info *mtd, struct erase_info *instr) -+static int part_erase(struct mtd_info *mtd, struct erase_info *instr) - { - struct mtd_part *part = PART(mtd); - int ret; -@@ -219,7 +188,7 @@ static int part_erase (struct mtd_info *mtd, struct erase_info *instr) - instr->addr += part->offset; - ret = part->master->erase(part->master, instr); - if (ret) { -- if (instr->fail_addr != 0xffffffff) -+ if (instr->fail_addr != MTD_FAIL_ADDR_UNKNOWN) - instr->fail_addr -= part->offset; - instr->addr -= part->offset; - } -@@ -231,19 +200,15 @@ void mtd_erase_callback(struct erase_info *instr) - if (instr->mtd->erase == part_erase) { - struct mtd_part *part = PART(instr->mtd); - -- if (instr->fail_addr != 0xffffffff) -+ if (instr->fail_addr != MTD_FAIL_ADDR_UNKNOWN) - instr->fail_addr -= part->offset; - instr->addr -= part->offset; - } - if (instr->callback) - instr->callback(instr); - } --#ifdef MTD_LINUX --EXPORT_SYMBOL_GPL(mtd_erase_callback); --#endif - --#ifdef MTD_LINUX --static int part_lock (struct mtd_info *mtd, loff_t ofs, size_t len) -+static int part_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len) - { - struct mtd_part *part = PART(mtd); - if ((len + ofs) > mtd->size) -@@ -251,14 +216,13 @@ static int part_lock (struct mtd_info *mtd, loff_t ofs, size_t len) - return part->master->lock(part->master, ofs + part->offset, len); - } - --static int part_unlock (struct mtd_info *mtd, loff_t ofs, size_t len) -+static int part_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len) - { - struct mtd_part *part = PART(mtd); - if ((len + ofs) > mtd->size) - return -EINVAL; - return part->master->unlock(part->master, ofs + part->offset, len); - } --#endif - - static void part_sync(struct mtd_info *mtd) - { -@@ -266,7 +230,6 @@ static void part_sync(struct mtd_info *mtd) - part->master->sync(part->master); - } - --#ifdef MTD_LINUX - static int part_suspend(struct mtd_info *mtd) - { - struct mtd_part *part = PART(mtd); -@@ -278,9 +241,8 @@ static void part_resume(struct mtd_info *mtd) - struct mtd_part *part = PART(mtd); - part->master->resume(part->master); - } --#endif - --static int part_block_isbad (struct mtd_info *mtd, loff_t ofs) -+static int part_block_isbad(struct mtd_info *mtd, loff_t ofs) - { - struct mtd_part *part = PART(mtd); - if (ofs >= mtd->size) -@@ -289,7 +251,7 @@ static int part_block_isbad (struct mtd_info *mtd, loff_t ofs) - return part->master->block_isbad(part->master, ofs); - } - --static int part_block_markbad (struct mtd_info *mtd, loff_t ofs) -+static int part_block_markbad(struct mtd_info *mtd, loff_t ofs) - { - struct mtd_part *part = PART(mtd); - int res; -@@ -300,10 +262,8 @@ static int part_block_markbad (struct mtd_info *mtd, loff_t ofs) - return -EINVAL; - ofs += part->offset; - res = part->master->block_markbad(part->master, ofs); --#ifdef MTD_LINUX - if (!res) - mtd->ecc_stats.badblocks++; --#endif - return res; - } - -@@ -314,31 +274,193 @@ static int part_block_markbad (struct mtd_info *mtd, loff_t ofs) - - int del_mtd_partitions(struct mtd_info *master) - { -- struct list_head *node; -- struct mtd_part *slave; -+ struct mtd_part *slave, *next; - -- for (node = mtd_partitions.next; -- node != &mtd_partitions; -- node = node->next) { -- slave = list_entry(node, struct mtd_part, list); -+ list_for_each_entry_safe(slave, next, &mtd_partitions, list) - if (slave->master == master) { -- struct list_head *prev = node->prev; -- __list_del(prev, node->next); -- if(slave->registered) -+ list_del(&slave->list); -+ if (slave->registered) - del_mtd_device(&slave->mtd); - kfree(slave); -- node = prev; - } -- } - - return 0; - } - -+static struct mtd_part *add_one_partition(struct mtd_info *master, -+ const struct mtd_partition *part, int partno, -+ uint64_t cur_offset) -+{ -+ struct mtd_part *slave; -+ -+ /* allocate the partition structure */ -+ slave = kzalloc(sizeof(*slave), GFP_KERNEL); -+ if (!slave) { -+ printk(KERN_ERR"memory allocation error while creating partitions for \"%s\"\n", -+ master->name); -+ del_mtd_partitions(master); -+ return NULL; -+ } -+ list_add(&slave->list, &mtd_partitions); -+ -+ /* set up the MTD object for this partition */ -+ slave->mtd.type = master->type; -+ slave->mtd.flags = master->flags & ~part->mask_flags; -+ slave->mtd.size = part->size; -+ slave->mtd.writesize = master->writesize; -+ slave->mtd.oobsize = master->oobsize; -+ slave->mtd.oobavail = master->oobavail; -+ slave->mtd.subpage_sft = master->subpage_sft; -+ -+ slave->mtd.name = part->name; -+ slave->mtd.owner = master->owner; -+ -+ slave->mtd.read = part_read; -+ slave->mtd.write = part_write; -+ -+ if (master->panic_write) -+ slave->mtd.panic_write = part_panic_write; -+ -+ if (master->read_oob) -+ slave->mtd.read_oob = part_read_oob; -+ if (master->write_oob) -+ slave->mtd.write_oob = part_write_oob; -+ if (master->read_user_prot_reg) -+ slave->mtd.read_user_prot_reg = part_read_user_prot_reg; -+ if (master->read_fact_prot_reg) -+ slave->mtd.read_fact_prot_reg = part_read_fact_prot_reg; -+ if (master->write_user_prot_reg) -+ slave->mtd.write_user_prot_reg = part_write_user_prot_reg; -+ if (master->lock_user_prot_reg) -+ slave->mtd.lock_user_prot_reg = part_lock_user_prot_reg; -+ if (master->get_user_prot_info) -+ slave->mtd.get_user_prot_info = part_get_user_prot_info; -+ if (master->get_fact_prot_info) -+ slave->mtd.get_fact_prot_info = part_get_fact_prot_info; -+ if (master->sync) -+ slave->mtd.sync = part_sync; -+ if (!partno && master->suspend && master->resume) { -+ slave->mtd.suspend = part_suspend; -+ slave->mtd.resume = part_resume; -+ } -+ if (master->lock) -+ slave->mtd.lock = part_lock; -+ if (master->unlock) -+ slave->mtd.unlock = part_unlock; -+ if (master->block_isbad) -+ slave->mtd.block_isbad = part_block_isbad; -+ if (master->block_markbad) -+ slave->mtd.block_markbad = part_block_markbad; -+ slave->mtd.erase = part_erase; -+ slave->master = master; -+ slave->offset = part->offset; -+ slave->index = partno; -+ -+ if (slave->offset == MTDPART_OFS_APPEND) -+ slave->offset = cur_offset; -+ if (slave->offset == MTDPART_OFS_NXTBLK) { -+ slave->offset = cur_offset; -+ if (mtd_mod_by_eb(cur_offset, master) != 0) { -+ /* Round up to next erasesize */ -+ slave->offset = (mtd_div_by_eb(cur_offset, master) + 1) * master->erasesize; -+ printk(KERN_NOTICE "Moving partition %d: " -+ "0x%012llx -> 0x%012llx\n", partno, -+ (unsigned long long)cur_offset, (unsigned long long)slave->offset); -+ } -+ } -+ if (slave->mtd.size == MTDPART_SIZ_FULL) -+ slave->mtd.size = master->size - slave->offset; -+ -+ printk(KERN_NOTICE "0x%012llx-0x%012llx : \"%s\"\n", (unsigned long long)slave->offset, -+ (unsigned long long)(slave->offset + slave->mtd.size), slave->mtd.name); -+ -+ /* let's do some sanity checks */ -+ if (slave->offset >= master->size) { -+ /* let's register it anyway to preserve ordering */ -+ slave->offset = 0; -+ slave->mtd.size = 0; -+ printk(KERN_ERR"mtd: partition \"%s\" is out of reach -- disabled\n", -+ part->name); -+ goto out_register; -+ } -+ if (slave->offset + slave->mtd.size > master->size) { -+ slave->mtd.size = master->size - slave->offset; -+ printk(KERN_WARNING"mtd: partition \"%s\" extends beyond the end of device \"%s\" -- size truncated to %#llx\n", -+ part->name, master->name, (unsigned long long)slave->mtd.size); -+ } -+ if (master->numeraseregions > 1) { -+ /* Deal with variable erase size stuff */ -+ int i, max = master->numeraseregions; -+ u64 end = slave->offset + slave->mtd.size; -+ struct mtd_erase_region_info *regions = master->eraseregions; -+ -+ /* Find the first erase regions which is part of this -+ * partition. */ -+ for (i = 0; i < max && regions[i].offset <= slave->offset; i++) -+ ; -+ /* The loop searched for the region _behind_ the first one */ -+ i--; -+ -+ /* Pick biggest erasesize */ -+ for (; i < max && regions[i].offset < end; i++) { -+ if (slave->mtd.erasesize < regions[i].erasesize) { -+ slave->mtd.erasesize = regions[i].erasesize; -+ } -+ } -+ BUG_ON(slave->mtd.erasesize == 0); -+ } else { -+ /* Single erase size */ -+ slave->mtd.erasesize = master->erasesize; -+ } -+ -+ if ((slave->mtd.flags & MTD_WRITEABLE) && -+ mtd_mod_by_eb(slave->offset, &slave->mtd)) { -+ /* Doesn't start on a boundary of major erase size */ -+ /* FIXME: Let it be writable if it is on a boundary of -+ * _minor_ erase size though */ -+ slave->mtd.flags &= ~MTD_WRITEABLE; -+ printk(KERN_WARNING"mtd: partition \"%s\" doesn't start on an erase block boundary -- force read-only\n", -+ part->name); -+ } -+ if ((slave->mtd.flags & MTD_WRITEABLE) && -+ mtd_mod_by_eb(slave->mtd.size, &slave->mtd)) { -+ slave->mtd.flags &= ~MTD_WRITEABLE; -+ printk(KERN_WARNING"mtd: partition \"%s\" doesn't end on an erase block -- force read-only\n", -+ part->name); -+ } -+ -+ slave->mtd.ecclayout = master->ecclayout; -+ if (master->block_isbad) { -+ uint64_t offs = 0; -+ -+ while (offs < slave->mtd.size) { -+ if (master->block_isbad(master, -+ offs + slave->offset)) -+ slave->mtd.ecc_stats.badblocks++; -+ offs += slave->mtd.erasesize; -+ } -+ } -+ -+out_register: -+ if (part->mtdp) { -+ /* store the object pointer (caller may or may not register it*/ -+ *part->mtdp = &slave->mtd; -+ slave->registered = 0; -+ } else { -+ /* register our partition */ -+ add_mtd_device(&slave->mtd); -+ slave->registered = 1; -+ } -+ return slave; -+} -+ - /* - * This function, given a master MTD object and a partition table, creates - * and registers slave MTD objects which are bound to the master according to - * the partition definitions. -- * (Q: should we register the master MTD object as well?) -+ * -+ * We don't register the master, or expect the caller to have done so, -+ * for reasons of data integrity. - */ - - int add_mtd_partitions(struct mtd_info *master, -@@ -346,7 +468,7 @@ int add_mtd_partitions(struct mtd_info *master, - int nbparts) - { - struct mtd_part *slave; -- u_int32_t cur_offset = 0; -+ uint64_t cur_offset = 0; - int i; - - /* -@@ -357,184 +479,14 @@ int add_mtd_partitions(struct mtd_info *master, - if (mtd_partitions.next == NULL) - INIT_LIST_HEAD(&mtd_partitions); - -- printk (KERN_NOTICE "Creating %d MTD partitions on \"%s\":\n", nbparts, master->name); -+ printk(KERN_NOTICE "Creating %d MTD partitions on \"%s\":\n", nbparts, master->name); - - for (i = 0; i < nbparts; i++) { -- -- /* allocate the partition structure */ -- slave = kzalloc (sizeof(*slave), GFP_KERNEL); -- if (!slave) { -- printk ("memory allocation error while creating partitions for \"%s\"\n", -- master->name); -- del_mtd_partitions(master); -+ slave = add_one_partition(master, parts + i, i, cur_offset); -+ if (!slave) - return -ENOMEM; -- } -- list_add(&slave->list, &mtd_partitions); -- -- /* set up the MTD object for this partition */ -- slave->mtd.type = master->type; -- slave->mtd.flags = master->flags & ~parts[i].mask_flags; -- slave->mtd.size = parts[i].size; -- slave->mtd.writesize = master->writesize; -- slave->mtd.oobsize = master->oobsize; -- slave->mtd.oobavail = master->oobavail; -- slave->mtd.subpage_sft = master->subpage_sft; -- -- slave->mtd.name = parts[i].name; -- slave->mtd.owner = master->owner; -- -- slave->mtd.read = part_read; -- slave->mtd.write = part_write; -- --#ifdef MTD_LINUX -- if (master->panic_write) -- slave->mtd.panic_write = part_panic_write; -- -- if(master->point && master->unpoint){ -- slave->mtd.point = part_point; -- slave->mtd.unpoint = part_unpoint; -- } --#endif -- -- if (master->read_oob) -- slave->mtd.read_oob = part_read_oob; -- if (master->write_oob) -- slave->mtd.write_oob = part_write_oob; -- if(master->read_user_prot_reg) -- slave->mtd.read_user_prot_reg = part_read_user_prot_reg; -- if(master->read_fact_prot_reg) -- slave->mtd.read_fact_prot_reg = part_read_fact_prot_reg; -- if(master->write_user_prot_reg) -- slave->mtd.write_user_prot_reg = part_write_user_prot_reg; -- if(master->lock_user_prot_reg) -- slave->mtd.lock_user_prot_reg = part_lock_user_prot_reg; -- if(master->get_user_prot_info) -- slave->mtd.get_user_prot_info = part_get_user_prot_info; -- if(master->get_fact_prot_info) -- slave->mtd.get_fact_prot_info = part_get_fact_prot_info; -- if (master->sync) -- slave->mtd.sync = part_sync; --#ifdef MTD_LINUX -- if (!i && master->suspend && master->resume) { -- slave->mtd.suspend = part_suspend; -- slave->mtd.resume = part_resume; -- } -- if (master->writev) -- slave->mtd.writev = part_writev; -- if (master->lock) -- slave->mtd.lock = part_lock; -- if (master->unlock) -- slave->mtd.unlock = part_unlock; --#endif -- if (master->block_isbad) -- slave->mtd.block_isbad = part_block_isbad; -- if (master->block_markbad) -- slave->mtd.block_markbad = part_block_markbad; -- slave->mtd.erase = part_erase; -- slave->master = master; -- slave->offset = parts[i].offset; -- slave->index = i; -- -- if (slave->offset == MTDPART_OFS_APPEND) -- slave->offset = cur_offset; -- if (slave->offset == MTDPART_OFS_NXTBLK) { -- slave->offset = cur_offset; -- if ((cur_offset % master->erasesize) != 0) { -- /* Round up to next erasesize */ -- slave->offset = ((cur_offset / master->erasesize) + 1) * master->erasesize; -- printk(KERN_NOTICE "Moving partition %d: " -- "0x%08x -> 0x%08x\n", i, -- cur_offset, slave->offset); -- } -- } -- if (slave->mtd.size == MTDPART_SIZ_FULL) -- slave->mtd.size = master->size - slave->offset; - cur_offset = slave->offset + slave->mtd.size; -- -- printk (KERN_NOTICE "0x%08x-0x%08x : \"%s\"\n", slave->offset, -- slave->offset + slave->mtd.size, slave->mtd.name); -- -- /* let's do some sanity checks */ -- if (slave->offset >= master->size) { -- /* let's register it anyway to preserve ordering */ -- slave->offset = 0; -- slave->mtd.size = 0; -- printk ("mtd: partition \"%s\" is out of reach -- disabled\n", -- parts[i].name); -- } -- if (slave->offset + slave->mtd.size > master->size) { -- slave->mtd.size = master->size - slave->offset; -- printk ("mtd: partition \"%s\" extends beyond the end of device \"%s\" -- size truncated to %#x\n", -- parts[i].name, master->name, slave->mtd.size); -- } -- if (master->numeraseregions>1) { -- /* Deal with variable erase size stuff */ -- int i; -- struct mtd_erase_region_info *regions = master->eraseregions; -- -- /* Find the first erase regions which is part of this partition. */ -- for (i=0; i < master->numeraseregions && slave->offset >= regions[i].offset; i++) -- ; -- -- for (i--; i < master->numeraseregions && slave->offset + slave->mtd.size > regions[i].offset; i++) { -- if (slave->mtd.erasesize < regions[i].erasesize) { -- slave->mtd.erasesize = regions[i].erasesize; -- } -- } -- } else { -- /* Single erase size */ -- slave->mtd.erasesize = master->erasesize; -- } -- -- if ((slave->mtd.flags & MTD_WRITEABLE) && -- (slave->offset % slave->mtd.erasesize)) { -- /* Doesn't start on a boundary of major erase size */ -- /* FIXME: Let it be writable if it is on a boundary of _minor_ erase size though */ -- slave->mtd.flags &= ~MTD_WRITEABLE; -- printk ("mtd: partition \"%s\" doesn't start on an erase block boundary -- force read-only\n", -- parts[i].name); -- } -- if ((slave->mtd.flags & MTD_WRITEABLE) && -- (slave->mtd.size % slave->mtd.erasesize)) { -- slave->mtd.flags &= ~MTD_WRITEABLE; -- printk ("mtd: partition \"%s\" doesn't end on an erase block -- force read-only\n", -- parts[i].name); -- } -- -- slave->mtd.ecclayout = master->ecclayout; -- if (master->block_isbad) { -- uint32_t offs = 0; -- -- while(offs < slave->mtd.size) { -- if (master->block_isbad(master, -- offs + slave->offset)) -- slave->mtd.ecc_stats.badblocks++; -- offs += slave->mtd.erasesize; -- } -- } -- --#ifdef MTD_LINUX -- if (parts[i].mtdp) { -- /* store the object pointer -- * (caller may or may not register it */ -- *parts[i].mtdp = &slave->mtd; -- slave->registered = 0; -- } else { -- /* register our partition */ -- add_mtd_device(&slave->mtd); -- slave->registered = 1; -- } --#else -- /* register our partition */ -- add_mtd_device(&slave->mtd); -- slave->registered = 1; --#endif - } - - return 0; - } -- --#ifdef MTD_LINUX --EXPORT_SYMBOL(add_mtd_partitions); --EXPORT_SYMBOL(del_mtd_partitions); --#endif -diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile -index 471cd6b..71dd5b9 100644 ---- a/drivers/mtd/nand/Makefile -+++ b/drivers/mtd/nand/Makefile -@@ -40,6 +40,7 @@ COBJS-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o - COBJS-$(CONFIG_NAND_DAVINCI) += davinci_nand.o - COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o - COBJS-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o -+COBJS-$(CONFIG_NAND_MPC5121_NFC) += mpc5121_nfc.o - COBJS-$(CONFIG_NAND_NOMADIK) += nomadik.o - COBJS-$(CONFIG_NAND_S3C2410) += s3c2410_nand.c - COBJS-$(CONFIG_NAND_S3C64XX) += s3c64xx.o -diff --git a/drivers/mtd/nand/mpc5121_nfc.c b/drivers/mtd/nand/mpc5121_nfc.c -new file mode 100644 -index 0000000..856cb36 ---- /dev/null -+++ b/drivers/mtd/nand/mpc5121_nfc.c -@@ -0,0 +1,692 @@ -+/* -+ * Copyright 2004-2008 Freescale Semiconductor, Inc. -+ * Copyright 2009 Semihalf. -+ * (C) Copyright 2009 Stefan Roese -+ * -+ * Based on original driver from Freescale Semiconductor -+ * written by John Rigby on basis -+ * of drivers/mtd/nand/mxc_nand.c. Reworked and extended -+ * Piotr Ziecik . -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * as published by the Free Software Foundation; either version 2 -+ * of the License, or (at your option) any later version. -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, -+ * MA 02110-1301, USA. -+ */ -+ -+#include -+#include -+ -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+ -+#define DRV_NAME "mpc5121_nfc" -+ -+/* Timeouts */ -+#define NFC_RESET_TIMEOUT 1000 /* 1 ms */ -+#define NFC_TIMEOUT 2000 /* 2000 us */ -+ -+/* Addresses for NFC MAIN RAM BUFFER areas */ -+#define NFC_MAIN_AREA(n) ((n) * 0x200) -+ -+/* Addresses for NFC SPARE BUFFER areas */ -+#define NFC_SPARE_BUFFERS 8 -+#define NFC_SPARE_LEN 0x40 -+#define NFC_SPARE_AREA(n) (0x1000 + ((n) * NFC_SPARE_LEN)) -+ -+/* MPC5121 NFC registers */ -+#define NFC_BUF_ADDR 0x1E04 -+#define NFC_FLASH_ADDR 0x1E06 -+#define NFC_FLASH_CMD 0x1E08 -+#define NFC_CONFIG 0x1E0A -+#define NFC_ECC_STATUS1 0x1E0C -+#define NFC_ECC_STATUS2 0x1E0E -+#define NFC_SPAS 0x1E10 -+#define NFC_WRPROT 0x1E12 -+#define NFC_NF_WRPRST 0x1E18 -+#define NFC_CONFIG1 0x1E1A -+#define NFC_CONFIG2 0x1E1C -+#define NFC_UNLOCKSTART_BLK0 0x1E20 -+#define NFC_UNLOCKEND_BLK0 0x1E22 -+#define NFC_UNLOCKSTART_BLK1 0x1E24 -+#define NFC_UNLOCKEND_BLK1 0x1E26 -+#define NFC_UNLOCKSTART_BLK2 0x1E28 -+#define NFC_UNLOCKEND_BLK2 0x1E2A -+#define NFC_UNLOCKSTART_BLK3 0x1E2C -+#define NFC_UNLOCKEND_BLK3 0x1E2E -+ -+/* Bit Definitions: NFC_BUF_ADDR */ -+#define NFC_RBA_MASK (7 << 0) -+#define NFC_ACTIVE_CS_SHIFT 5 -+#define NFC_ACTIVE_CS_MASK (3 << NFC_ACTIVE_CS_SHIFT) -+ -+/* Bit Definitions: NFC_CONFIG */ -+#define NFC_BLS_UNLOCKED (1 << 1) -+ -+/* Bit Definitions: NFC_CONFIG1 */ -+#define NFC_ECC_4BIT (1 << 0) -+#define NFC_FULL_PAGE_DMA (1 << 1) -+#define NFC_SPARE_ONLY (1 << 2) -+#define NFC_ECC_ENABLE (1 << 3) -+#define NFC_INT_MASK (1 << 4) -+#define NFC_BIG_ENDIAN (1 << 5) -+#define NFC_RESET (1 << 6) -+#define NFC_CE (1 << 7) -+#define NFC_ONE_CYCLE (1 << 8) -+#define NFC_PPB_32 (0 << 9) -+#define NFC_PPB_64 (1 << 9) -+#define NFC_PPB_128 (2 << 9) -+#define NFC_PPB_256 (3 << 9) -+#define NFC_PPB_MASK (3 << 9) -+#define NFC_FULL_PAGE_INT (1 << 11) -+ -+/* Bit Definitions: NFC_CONFIG2 */ -+#define NFC_COMMAND (1 << 0) -+#define NFC_ADDRESS (1 << 1) -+#define NFC_INPUT (1 << 2) -+#define NFC_OUTPUT (1 << 3) -+#define NFC_ID (1 << 4) -+#define NFC_STATUS (1 << 5) -+#define NFC_CMD_FAIL (1 << 15) -+#define NFC_INT (1 << 15) -+ -+/* Bit Definitions: NFC_WRPROT */ -+#define NFC_WPC_LOCK_TIGHT (1 << 0) -+#define NFC_WPC_LOCK (1 << 1) -+#define NFC_WPC_UNLOCK (1 << 2) -+ -+struct mpc5121_nfc_prv { -+ struct mtd_info mtd; -+ struct nand_chip chip; -+ int irq; -+ void __iomem *regs; -+ struct clk *clk; -+ uint column; -+ int spareonly; -+ int chipsel; -+}; -+ -+int mpc5121_nfc_chip = 0; -+ -+static void mpc5121_nfc_done(struct mtd_info *mtd); -+ -+/* Read NFC register */ -+static inline u16 nfc_read(struct mtd_info *mtd, uint reg) -+{ -+ struct nand_chip *chip = mtd->priv; -+ struct mpc5121_nfc_prv *prv = chip->priv; -+ -+ return in_be16(prv->regs + reg); -+} -+ -+/* Write NFC register */ -+static inline void nfc_write(struct mtd_info *mtd, uint reg, u16 val) -+{ -+ struct nand_chip *chip = mtd->priv; -+ struct mpc5121_nfc_prv *prv = chip->priv; -+ -+ out_be16(prv->regs + reg, val); -+} -+ -+/* Set bits in NFC register */ -+static inline void nfc_set(struct mtd_info *mtd, uint reg, u16 bits) -+{ -+ nfc_write(mtd, reg, nfc_read(mtd, reg) | bits); -+} -+ -+/* Clear bits in NFC register */ -+static inline void nfc_clear(struct mtd_info *mtd, uint reg, u16 bits) -+{ -+ nfc_write(mtd, reg, nfc_read(mtd, reg) & ~bits); -+} -+ -+/* Invoke address cycle */ -+static inline void mpc5121_nfc_send_addr(struct mtd_info *mtd, u16 addr) -+{ -+ nfc_write(mtd, NFC_FLASH_ADDR, addr); -+ nfc_write(mtd, NFC_CONFIG2, NFC_ADDRESS); -+ mpc5121_nfc_done(mtd); -+} -+ -+/* Invoke command cycle */ -+static inline void mpc5121_nfc_send_cmd(struct mtd_info *mtd, u16 cmd) -+{ -+ nfc_write(mtd, NFC_FLASH_CMD, cmd); -+ nfc_write(mtd, NFC_CONFIG2, NFC_COMMAND); -+ mpc5121_nfc_done(mtd); -+} -+ -+/* Send data from NFC buffers to NAND flash */ -+static inline void mpc5121_nfc_send_prog_page(struct mtd_info *mtd) -+{ -+ nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK); -+ nfc_write(mtd, NFC_CONFIG2, NFC_INPUT); -+ mpc5121_nfc_done(mtd); -+} -+ -+/* Receive data from NAND flash */ -+static inline void mpc5121_nfc_send_read_page(struct mtd_info *mtd) -+{ -+ nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK); -+ nfc_write(mtd, NFC_CONFIG2, NFC_OUTPUT); -+ mpc5121_nfc_done(mtd); -+} -+ -+/* Receive ID from NAND flash */ -+static inline void mpc5121_nfc_send_read_id(struct mtd_info *mtd) -+{ -+ nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK); -+ nfc_write(mtd, NFC_CONFIG2, NFC_ID); -+ mpc5121_nfc_done(mtd); -+} -+ -+/* Receive status from NAND flash */ -+static inline void mpc5121_nfc_send_read_status(struct mtd_info *mtd) -+{ -+ nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK); -+ nfc_write(mtd, NFC_CONFIG2, NFC_STATUS); -+ mpc5121_nfc_done(mtd); -+} -+ -+static void mpc5121_nfc_done(struct mtd_info *mtd) -+{ -+ int max_retries = NFC_TIMEOUT; -+ -+ while (1) { -+ max_retries--; -+ if (nfc_read(mtd, NFC_CONFIG2) & NFC_INT) -+ break; -+ udelay(1); -+ } -+ -+ if (max_retries <= 0) -+ printk(KERN_WARNING DRV_NAME -+ ": Timeout while waiting for completion.\n"); -+} -+ -+/* Do address cycle(s) */ -+static void mpc5121_nfc_addr_cycle(struct mtd_info *mtd, int column, int page) -+{ -+ struct nand_chip *chip = mtd->priv; -+ u32 pagemask = chip->pagemask; -+ -+ if (column != -1) { -+ mpc5121_nfc_send_addr(mtd, column); -+ if (mtd->writesize > 512) -+ mpc5121_nfc_send_addr(mtd, column >> 8); -+ } -+ -+ if (page != -1) { -+ do { -+ mpc5121_nfc_send_addr(mtd, page & 0xFF); -+ page >>= 8; -+ pagemask >>= 8; -+ } while (pagemask); -+ } -+} -+ -+/* Control chip select signals */ -+ -+/* -+ * Selecting the active device: -+ * -+ * This is different than the linux version. Switching between chips -+ * is done via board_nand_select_device(). The Linux select_chip -+ * function used here in U-Boot has only 2 valid chip numbers: -+ * 0 select -+ * -1 deselect -+ */ -+ -+/* -+ * Implement it as a weak default, so that boards with a specific -+ * chip-select routine can use their own function. -+ */ -+void __mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip) -+{ -+ if (chip < 0) { -+ nfc_clear(mtd, NFC_CONFIG1, NFC_CE); -+ return; -+ } -+ -+ nfc_clear(mtd, NFC_BUF_ADDR, NFC_ACTIVE_CS_MASK); -+ nfc_set(mtd, NFC_BUF_ADDR, (chip << NFC_ACTIVE_CS_SHIFT) & -+ NFC_ACTIVE_CS_MASK); -+ nfc_set(mtd, NFC_CONFIG1, NFC_CE); -+} -+void mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip) -+ __attribute__((weak, alias("__mpc5121_nfc_select_chip"))); -+ -+void board_nand_select_device(struct nand_chip *nand, int chip) -+{ -+ /* -+ * Only save this chip number in global variable here. This -+ * will be used later in mpc5121_nfc_select_chip(). -+ */ -+ mpc5121_nfc_chip = chip; -+} -+ -+/* Read NAND Ready/Busy signal */ -+static int mpc5121_nfc_dev_ready(struct mtd_info *mtd) -+{ -+ /* -+ * NFC handles ready/busy signal internally. Therefore, this function -+ * always returns status as ready. -+ */ -+ return 1; -+} -+ -+/* Write command to NAND flash */ -+static void mpc5121_nfc_command(struct mtd_info *mtd, unsigned command, -+ int column, int page) -+{ -+ struct nand_chip *chip = mtd->priv; -+ struct mpc5121_nfc_prv *prv = chip->priv; -+ -+ prv->column = (column >= 0) ? column : 0; -+ prv->spareonly = 0; -+ -+ switch (command) { -+ case NAND_CMD_PAGEPROG: -+ mpc5121_nfc_send_prog_page(mtd); -+ break; -+ /* -+ * NFC does not support sub-page reads and writes, -+ * so emulate them using full page transfers. -+ */ -+ case NAND_CMD_READ0: -+ column = 0; -+ break; -+ -+ case NAND_CMD_READ1: -+ prv->column += 256; -+ command = NAND_CMD_READ0; -+ column = 0; -+ break; -+ -+ case NAND_CMD_READOOB: -+ prv->spareonly = 1; -+ command = NAND_CMD_READ0; -+ column = 0; -+ break; -+ -+ case NAND_CMD_SEQIN: -+ mpc5121_nfc_command(mtd, NAND_CMD_READ0, column, page); -+ column = 0; -+ break; -+ -+ case NAND_CMD_ERASE1: -+ case NAND_CMD_ERASE2: -+ case NAND_CMD_READID: -+ case NAND_CMD_STATUS: -+ break; -+ -+ default: -+ return; -+ } -+ -+ mpc5121_nfc_send_cmd(mtd, command); -+ mpc5121_nfc_addr_cycle(mtd, column, page); -+ -+ switch (command) { -+ case NAND_CMD_READ0: -+ if (mtd->writesize > 512) -+ mpc5121_nfc_send_cmd(mtd, NAND_CMD_READSTART); -+ mpc5121_nfc_send_read_page(mtd); -+ break; -+ -+ case NAND_CMD_READID: -+ mpc5121_nfc_send_read_id(mtd); -+ break; -+ -+ case NAND_CMD_STATUS: -+ mpc5121_nfc_send_read_status(mtd); -+ if (chip->options & NAND_BUSWIDTH_16) -+ prv->column = 1; -+ else -+ prv->column = 0; -+ break; -+ } -+} -+ -+/* Copy data from/to NFC spare buffers. */ -+static void mpc5121_nfc_copy_spare(struct mtd_info *mtd, uint offset, -+ u8 * buffer, uint size, int wr) -+{ -+ struct nand_chip *nand = mtd->priv; -+ struct mpc5121_nfc_prv *prv = nand->priv; -+ uint o, s, sbsize, blksize; -+ -+ /* -+ * NAND spare area is available through NFC spare buffers. -+ * The NFC divides spare area into (page_size / 512) chunks. -+ * Each chunk is placed into separate spare memory area, using -+ * first (spare_size / num_of_chunks) bytes of the buffer. -+ * -+ * For NAND device in which the spare area is not divided fully -+ * by the number of chunks, number of used bytes in each spare -+ * buffer is rounded down to the nearest even number of bytes, -+ * and all remaining bytes are added to the last used spare area. -+ * -+ * For more information read section 26.6.10 of MPC5121e -+ * Microcontroller Reference Manual, Rev. 3. -+ */ -+ -+ /* Calculate number of valid bytes in each spare buffer */ -+ sbsize = (mtd->oobsize / (mtd->writesize / 512)) & ~1; -+ -+ while (size) { -+ /* Calculate spare buffer number */ -+ s = offset / sbsize; -+ if (s > NFC_SPARE_BUFFERS - 1) -+ s = NFC_SPARE_BUFFERS - 1; -+ -+ /* -+ * Calculate offset to requested data block in selected spare -+ * buffer and its size. -+ */ -+ o = offset - (s * sbsize); -+ blksize = min(sbsize - o, size); -+ -+ if (wr) -+ memcpy_toio(prv->regs + NFC_SPARE_AREA(s) + o, -+ buffer, blksize); -+ else -+ memcpy_fromio(buffer, -+ prv->regs + NFC_SPARE_AREA(s) + o, -+ blksize); -+ -+ buffer += blksize; -+ offset += blksize; -+ size -= blksize; -+ }; -+} -+ -+/* Copy data from/to NFC main and spare buffers */ -+static void mpc5121_nfc_buf_copy(struct mtd_info *mtd, u_char * buf, int len, -+ int wr) -+{ -+ struct nand_chip *chip = mtd->priv; -+ struct mpc5121_nfc_prv *prv = chip->priv; -+ uint c = prv->column; -+ uint l; -+ -+ /* Handle spare area access */ -+ if (prv->spareonly || c >= mtd->writesize) { -+ /* Calculate offset from beginning of spare area */ -+ if (c >= mtd->writesize) -+ c -= mtd->writesize; -+ -+ prv->column += len; -+ mpc5121_nfc_copy_spare(mtd, c, buf, len, wr); -+ return; -+ } -+ -+ /* -+ * Handle main area access - limit copy length to prevent -+ * crossing main/spare boundary. -+ */ -+ l = min((uint) len, mtd->writesize - c); -+ prv->column += l; -+ -+ if (wr) -+ memcpy_toio(prv->regs + NFC_MAIN_AREA(0) + c, buf, l); -+ else -+ memcpy_fromio(buf, prv->regs + NFC_MAIN_AREA(0) + c, l); -+ -+ /* Handle crossing main/spare boundary */ -+ if (l != len) { -+ buf += l; -+ len -= l; -+ mpc5121_nfc_buf_copy(mtd, buf, len, wr); -+ } -+} -+ -+/* Read data from NFC buffers */ -+static void mpc5121_nfc_read_buf(struct mtd_info *mtd, u_char * buf, int len) -+{ -+ mpc5121_nfc_buf_copy(mtd, buf, len, 0); -+} -+ -+/* Write data to NFC buffers */ -+static void mpc5121_nfc_write_buf(struct mtd_info *mtd, -+ const u_char * buf, int len) -+{ -+ mpc5121_nfc_buf_copy(mtd, (u_char *) buf, len, 1); -+} -+ -+/* Compare buffer with NAND flash */ -+static int mpc5121_nfc_verify_buf(struct mtd_info *mtd, -+ const u_char * buf, int len) -+{ -+ u_char tmp[256]; -+ uint bsize; -+ -+ while (len) { -+ bsize = min(len, 256); -+ mpc5121_nfc_read_buf(mtd, tmp, bsize); -+ -+ if (memcmp(buf, tmp, bsize)) -+ return 1; -+ -+ buf += bsize; -+ len -= bsize; -+ } -+ -+ return 0; -+} -+ -+/* Read byte from NFC buffers */ -+static u8 mpc5121_nfc_read_byte(struct mtd_info *mtd) -+{ -+ u8 tmp; -+ -+ mpc5121_nfc_read_buf(mtd, &tmp, sizeof(tmp)); -+ -+ return tmp; -+} -+ -+/* Read word from NFC buffers */ -+static u16 mpc5121_nfc_read_word(struct mtd_info *mtd) -+{ -+ u16 tmp; -+ -+ mpc5121_nfc_read_buf(mtd, (u_char *) & tmp, sizeof(tmp)); -+ -+ return tmp; -+} -+ -+/* -+ * Read NFC configuration from Reset Config Word -+ * -+ * NFC is configured during reset in basis of information stored -+ * in Reset Config Word. There is no other way to set NAND block -+ * size, spare size and bus width. -+ */ -+static int mpc5121_nfc_read_hw_config(struct mtd_info *mtd) -+{ -+ immap_t *im = (immap_t *)CONFIG_SYS_IMMR; -+ struct nand_chip *chip = mtd->priv; -+ uint rcw_pagesize = 0; -+ uint rcw_sparesize = 0; -+ uint rcw_width; -+ uint rcwh; -+ uint romloc, ps; -+ -+ rcwh = in_be32(&(im->reset.rcwh)); -+ -+ /* Bit 6: NFC bus width */ -+ rcw_width = ((rcwh >> 6) & 0x1) ? 2 : 1; -+ -+ /* Bit 7: NFC Page/Spare size */ -+ ps = (rcwh >> 7) & 0x1; -+ -+ /* Bits [22:21]: ROM Location */ -+ romloc = (rcwh >> 21) & 0x3; -+ -+ /* Decode RCW bits */ -+ switch ((ps << 2) | romloc) { -+ case 0x00: -+ case 0x01: -+ rcw_pagesize = 512; -+ rcw_sparesize = 16; -+ break; -+ case 0x02: -+ case 0x03: -+ rcw_pagesize = 4096; -+ rcw_sparesize = 128; -+ break; -+ case 0x04: -+ case 0x05: -+ rcw_pagesize = 2048; -+ rcw_sparesize = 64; -+ break; -+ case 0x06: -+ case 0x07: -+ rcw_pagesize = 4096; -+ rcw_sparesize = 218; -+ break; -+ } -+ -+ mtd->writesize = rcw_pagesize; -+ mtd->oobsize = rcw_sparesize; -+ if (rcw_width == 2) -+ chip->options |= NAND_BUSWIDTH_16; -+ -+ debug(KERN_NOTICE DRV_NAME ": Configured for " -+ "%u-bit NAND, page size %u with %u spare.\n", -+ rcw_width * 8, rcw_pagesize, rcw_sparesize); -+ return 0; -+} -+ -+int board_nand_init(struct nand_chip *chip) -+{ -+ struct mpc5121_nfc_prv *prv; -+ struct mtd_info *mtd; -+ int resettime = 0; -+ int retval = 0; -+ int rev; -+ static int chip_nr = 0; -+ -+ /* -+ * Check SoC revision. This driver supports only NFC -+ * in MPC5121 revision 2. -+ */ -+ rev = (mfspr(SPRN_SVR) >> 4) & 0xF; -+ if (rev != 2) { -+ printk(KERN_ERR DRV_NAME -+ ": SoC revision %u is not supported!\n", rev); -+ return -ENXIO; -+ } -+ -+ prv = malloc(sizeof(*prv)); -+ if (!prv) { -+ printk(KERN_ERR DRV_NAME ": Memory exhausted!\n"); -+ return -ENOMEM; -+ } -+ -+ mtd = &nand_info[chip_nr++]; -+ mtd->priv = chip; -+ chip->priv = prv; -+ -+ /* Read NFC configuration from Reset Config Word */ -+ retval = mpc5121_nfc_read_hw_config(mtd); -+ if (retval) { -+ printk(KERN_ERR DRV_NAME ": Unable to read NFC config!\n"); -+ return retval; -+ } -+ -+ prv->regs = (void __iomem *)CONFIG_SYS_NAND_BASE; -+ chip->dev_ready = mpc5121_nfc_dev_ready; -+ chip->cmdfunc = mpc5121_nfc_command; -+ chip->read_byte = mpc5121_nfc_read_byte; -+ chip->read_word = mpc5121_nfc_read_word; -+ chip->read_buf = mpc5121_nfc_read_buf; -+ chip->write_buf = mpc5121_nfc_write_buf; -+ chip->verify_buf = mpc5121_nfc_verify_buf; -+ chip->select_chip = mpc5121_nfc_select_chip; -+ chip->options = NAND_NO_AUTOINCR | NAND_USE_FLASH_BBT; -+ chip->ecc.mode = NAND_ECC_SOFT; -+ -+ /* Reset NAND Flash controller */ -+ nfc_set(mtd, NFC_CONFIG1, NFC_RESET); -+ while (nfc_read(mtd, NFC_CONFIG1) & NFC_RESET) { -+ if (resettime++ >= NFC_RESET_TIMEOUT) { -+ printk(KERN_ERR DRV_NAME -+ ": Timeout while resetting NFC!\n"); -+ retval = -EINVAL; -+ goto error; -+ } -+ -+ udelay(1); -+ } -+ -+ /* Enable write to NFC memory */ -+ nfc_write(mtd, NFC_CONFIG, NFC_BLS_UNLOCKED); -+ -+ /* Enable write to all NAND pages */ -+ nfc_write(mtd, NFC_UNLOCKSTART_BLK0, 0x0000); -+ nfc_write(mtd, NFC_UNLOCKEND_BLK0, 0xFFFF); -+ nfc_write(mtd, NFC_WRPROT, NFC_WPC_UNLOCK); -+ -+ /* -+ * Setup NFC: -+ * - Big Endian transfers, -+ * - Interrupt after full page read/write. -+ */ -+ nfc_write(mtd, NFC_CONFIG1, NFC_BIG_ENDIAN | NFC_INT_MASK | -+ NFC_FULL_PAGE_INT); -+ -+ /* Set spare area size */ -+ nfc_write(mtd, NFC_SPAS, mtd->oobsize >> 1); -+ -+ /* Detect NAND chips */ -+ if (nand_scan(mtd, 1)) { -+ printk(KERN_ERR DRV_NAME ": NAND Flash not found !\n"); -+ retval = -ENXIO; -+ goto error; -+ } -+ -+ /* Set erase block size */ -+ switch (mtd->erasesize / mtd->writesize) { -+ case 32: -+ nfc_set(mtd, NFC_CONFIG1, NFC_PPB_32); -+ break; -+ -+ case 64: -+ nfc_set(mtd, NFC_CONFIG1, NFC_PPB_64); -+ break; -+ -+ case 128: -+ nfc_set(mtd, NFC_CONFIG1, NFC_PPB_128); -+ break; -+ -+ case 256: -+ nfc_set(mtd, NFC_CONFIG1, NFC_PPB_256); -+ break; -+ -+ default: -+ printk(KERN_ERR DRV_NAME ": Unsupported NAND flash!\n"); -+ retval = -ENXIO; -+ goto error; -+ } -+ -+ return 0; -+error: -+ return retval; -+} -diff --git a/drivers/mtd/nand/nand.c b/drivers/mtd/nand/nand.c -index d369115..9065fa9 100644 ---- a/drivers/mtd/nand/nand.c -+++ b/drivers/mtd/nand/nand.c -@@ -57,7 +57,7 @@ static void nand_init_chip(struct mtd_info *mtd, struct nand_chip *nand, - else - mtd->name += gd->reloc_off; - --#ifdef CONFIG_MTD_PARTITIONS -+#ifdef CONFIG_MTD_DEVICE - /* - * Add MTD device so that we can reference it later - * via the mtdcore infrastructure (e.g. ubi). diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 360b070..88717e9 100644 --- a/drivers/mtd/nand/nand_base.c @@ -49565,2943 +8686,6 @@ index 360b070..88717e9 100644 if (!chip->ecc.write_page) chip->ecc.write_page = nand_write_page_hwecc; if (!chip->ecc.read_oob) -diff --git a/drivers/mtd/nand/nand_util.c b/drivers/mtd/nand/nand_util.c -index 6ba52b3..88206d0 100644 ---- a/drivers/mtd/nand/nand_util.c -+++ b/drivers/mtd/nand/nand_util.c -@@ -36,12 +36,15 @@ - #include - #include - -- - #include - #include - #include - #include - -+#if !defined(CONFIG_SYS_64BIT_VSPRINTF) -+#warning Please define CONFIG_SYS_64BIT_VSPRINTF for correct output! -+#endif -+ - typedef struct erase_info erase_info_t; - typedef struct mtd_info mtd_info_t; - -@@ -127,7 +130,7 @@ int nand_erase_opts(nand_info_t *meminfo, const nand_erase_options_t *opts) - if (ret > 0) { - if (!opts->quiet) - printf("\rSkipping bad block at " -- "0x%08x " -+ "0x%08llx " - " \n", - erase.addr); - continue; -@@ -181,11 +184,11 @@ int nand_erase_opts(nand_info_t *meminfo, const nand_erase_options_t *opts) - if (percent != percent_complete) { - percent_complete = percent; - -- printf("\rErasing at 0x%x -- %3d%% complete.", -+ printf("\rErasing at 0x%llx -- %3d%% complete.", - erase.addr, percent); - - if (opts->jffs2 && result == 0) -- printf(" Cleanmarker written at 0x%x.", -+ printf(" Cleanmarker written at 0x%llx.", - erase.addr); - } - } -diff --git a/drivers/mtd/onenand/onenand_uboot.c b/drivers/mtd/onenand/onenand_uboot.c -index a95b922..9823b5b 100644 ---- a/drivers/mtd/onenand/onenand_uboot.c -+++ b/drivers/mtd/onenand/onenand_uboot.c -@@ -43,7 +43,7 @@ void onenand_init(void) - puts("OneNAND: "); - print_size(onenand_mtd.size, "\n"); - --#ifdef CONFIG_MTD_PARTITIONS -+#ifdef CONFIG_MTD_DEVICE - /* - * Add MTD device so that we can reference it later - * via the mtdcore infrastructure (e.g. ubi). -diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile -index a71b16e..27dcbff 100644 ---- a/drivers/mtd/spi/Makefile -+++ b/drivers/mtd/spi/Makefile -@@ -27,6 +27,7 @@ LIB := $(obj)libspi_flash.a - - COBJS-$(CONFIG_SPI_FLASH) += spi_flash.o - COBJS-$(CONFIG_SPI_FLASH_ATMEL) += atmel.o -+COBJS-$(CONFIG_SPI_FLASH_MACRONIX) += macronix.o - COBJS-$(CONFIG_SPI_FLASH_SPANSION) += spansion.o - COBJS-$(CONFIG_SPI_FLASH_SST) += sst.o - COBJS-$(CONFIG_SPI_FLASH_STMICRO) += stmicro.o -diff --git a/drivers/mtd/spi/atmel.c b/drivers/mtd/spi/atmel.c -index c3b936f..3bc2dff 100644 ---- a/drivers/mtd/spi/atmel.c -+++ b/drivers/mtd/spi/atmel.c -@@ -196,6 +196,75 @@ static int dataflash_read_fast_at45(struct spi_flash *flash, - return spi_flash_read_common(flash, cmd, sizeof(cmd), buf, len); - } - -+/* -+ * TODO: the two write funcs (_p2/_at45) should get unified ... -+ */ -+static int dataflash_write_p2(struct spi_flash *flash, -+ u32 offset, size_t len, const void *buf) -+{ -+ struct atmel_spi_flash *asf = to_atmel_spi_flash(flash); -+ unsigned long page_size; -+ u32 addr = offset; -+ size_t chunk_len; -+ size_t actual; -+ int ret; -+ u8 cmd[4]; -+ -+ /* -+ * TODO: This function currently uses only page buffer #1. We can -+ * speed this up by using both buffers and loading one buffer while -+ * the other is being programmed into main memory. -+ */ -+ -+ page_size = (1 << asf->params->l2_page_size); -+ -+ ret = spi_claim_bus(flash->spi); -+ if (ret) { -+ debug("SF: Unable to claim SPI bus\n"); -+ return ret; -+ } -+ -+ for (actual = 0; actual < len; actual += chunk_len) { -+ chunk_len = min(len - actual, page_size - (addr % page_size)); -+ -+ /* Use the same address bits for both commands */ -+ cmd[0] = CMD_AT45_LOAD_BUF1; -+ cmd[1] = addr >> 16; -+ cmd[2] = addr >> 8; -+ cmd[3] = addr; -+ -+ ret = spi_flash_cmd_write(flash->spi, cmd, 4, -+ buf + actual, chunk_len); -+ if (ret < 0) { -+ debug("SF: Loading AT45 buffer failed\n"); -+ goto out; -+ } -+ -+ cmd[0] = CMD_AT45_PROG_BUF1; -+ ret = spi_flash_cmd_write(flash->spi, cmd, 4, NULL, 0); -+ if (ret < 0) { -+ debug("SF: AT45 page programming failed\n"); -+ goto out; -+ } -+ -+ ret = at45_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT); -+ if (ret < 0) { -+ debug("SF: AT45 page programming timed out\n"); -+ goto out; -+ } -+ -+ addr += chunk_len; -+ } -+ -+ debug("SF: AT45: Successfully programmed %zu bytes @ 0x%x\n", -+ len, offset); -+ ret = 0; -+ -+out: -+ spi_release_bus(flash->spi); -+ return ret; -+} -+ - static int dataflash_write_at45(struct spi_flash *flash, - u32 offset, size_t len, const void *buf) - { -@@ -209,6 +278,12 @@ static int dataflash_write_at45(struct spi_flash *flash, - int ret; - u8 cmd[4]; - -+ /* -+ * TODO: This function currently uses only page buffer #1. We can -+ * speed this up by using both buffers and loading one buffer while -+ * the other is being programmed into main memory. -+ */ -+ - page_shift = asf->params->l2_page_size; - page_size = (1 << page_shift) + (1 << (page_shift - 5)); - page_shift++; -@@ -263,6 +338,68 @@ out: - return ret; - } - -+/* -+ * TODO: the two erase funcs (_p2/_at45) should get unified ... -+ */ -+int dataflash_erase_p2(struct spi_flash *flash, u32 offset, size_t len) -+{ -+ struct atmel_spi_flash *asf = to_atmel_spi_flash(flash); -+ unsigned long page_size; -+ -+ size_t actual; -+ int ret; -+ u8 cmd[4]; -+ -+ /* -+ * TODO: This function currently uses page erase only. We can -+ * probably speed things up by using block and/or sector erase -+ * when possible. -+ */ -+ -+ page_size = (1 << asf->params->l2_page_size); -+ -+ if (offset % page_size || len % page_size) { -+ debug("SF: Erase offset/length not multiple of page size\n"); -+ return -1; -+ } -+ -+ cmd[0] = CMD_AT45_ERASE_PAGE; -+ cmd[3] = 0x00; -+ -+ ret = spi_claim_bus(flash->spi); -+ if (ret) { -+ debug("SF: Unable to claim SPI bus\n"); -+ return ret; -+ } -+ -+ for (actual = 0; actual < len; actual += page_size) { -+ cmd[1] = offset >> 16; -+ cmd[2] = offset >> 8; -+ -+ ret = spi_flash_cmd_write(flash->spi, cmd, 4, NULL, 0); -+ if (ret < 0) { -+ debug("SF: AT45 page erase failed\n"); -+ goto out; -+ } -+ -+ ret = at45_wait_ready(flash, SPI_FLASH_PAGE_ERASE_TIMEOUT); -+ if (ret < 0) { -+ debug("SF: AT45 page erase timed out\n"); -+ goto out; -+ } -+ -+ offset += page_size; -+ } -+ -+ debug("SF: AT45: Successfully erased %zu bytes @ 0x%x\n", -+ len, offset); -+ ret = 0; -+ -+out: -+ spi_release_bus(flash->spi); -+ return ret; -+} -+ - int dataflash_erase_at45(struct spi_flash *flash, u32 offset, size_t len) - { - struct atmel_spi_flash *asf = to_atmel_spi_flash(flash); -@@ -382,6 +519,8 @@ struct spi_flash *spi_flash_probe_atmel(struct spi_slave *spi, u8 *idcode) - page_size += 1 << (params->l2_page_size - 5); - } else { - asf->flash.read = dataflash_read_fast_p2; -+ asf->flash.write = dataflash_write_p2; -+ asf->flash.erase = dataflash_erase_p2; - } - - break; -diff --git a/drivers/mtd/spi/macronix.c b/drivers/mtd/spi/macronix.c -new file mode 100644 -index 0000000..9464c84 ---- /dev/null -+++ b/drivers/mtd/spi/macronix.c -@@ -0,0 +1,312 @@ -+/* -+ * Copyright 2009(C) Marvell International Ltd. and its affiliates -+ * Prafulla Wadaskar -+ * -+ * Based on drivers/mtd/spi/stmicro.c -+ * -+ * Copyright 2008, Network Appliance Inc. -+ * Jason McMullan -+ * -+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. -+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com) -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, -+ * MA 02110-1301 USA -+ */ -+ -+#include -+#include -+#include -+ -+#include "spi_flash_internal.h" -+ -+/* MX25xx-specific commands */ -+#define CMD_MX25XX_WREN 0x06 /* Write Enable */ -+#define CMD_MX25XX_WRDI 0x04 /* Write Disable */ -+#define CMD_MX25XX_RDSR 0x05 /* Read Status Register */ -+#define CMD_MX25XX_WRSR 0x01 /* Write Status Register */ -+#define CMD_MX25XX_READ 0x03 /* Read Data Bytes */ -+#define CMD_MX25XX_FAST_READ 0x0b /* Read Data Bytes at Higher Speed */ -+#define CMD_MX25XX_PP 0x02 /* Page Program */ -+#define CMD_MX25XX_SE 0x20 /* Sector Erase */ -+#define CMD_MX25XX_BE 0xD8 /* Block Erase */ -+#define CMD_MX25XX_CE 0xc7 /* Chip Erase */ -+#define CMD_MX25XX_DP 0xb9 /* Deep Power-down */ -+#define CMD_MX25XX_RES 0xab /* Release from DP, and Read Signature */ -+ -+#define MXIC_ID_MX2516 0x15 -+#define MXIC_ID_MX2520 0x12 -+#define MXIC_ID_MX2532 0x16 -+#define MXIC_ID_MX2540 0x13 -+#define MXIC_ID_MX2564 0x17 -+#define MXIC_ID_MX2580 0x14 -+#define MXIC_ID_MX25128 0x18 -+ -+#define MACRONIX_SR_WIP (1 << 0) /* Write-in-Progress */ -+ -+struct macronix_spi_flash_params { -+ u8 idcode1; -+ u16 page_size; -+ u16 pages_per_sector; -+ u16 sectors_per_block; -+ u16 nr_blocks; -+ const char *name; -+}; -+ -+struct macronix_spi_flash { -+ struct spi_flash flash; -+ const struct macronix_spi_flash_params *params; -+}; -+ -+static inline struct macronix_spi_flash *to_macronix_spi_flash(struct spi_flash -+ *flash) -+{ -+ return container_of(flash, struct macronix_spi_flash, flash); -+} -+ -+static const struct macronix_spi_flash_params macronix_spi_flash_table[] = { -+ { -+ .idcode1 = MXIC_ID_MX25128, -+ .page_size = 256, -+ .pages_per_sector = 16, -+ .sectors_per_block = 16, -+ .nr_blocks = 256, -+ .name = "MX25L12805D", -+ }, -+}; -+ -+static int macronix_wait_ready(struct spi_flash *flash, unsigned long timeout) -+{ -+ struct spi_slave *spi = flash->spi; -+ unsigned long timebase; -+ int ret; -+ u8 status; -+ u8 cmd = CMD_MX25XX_RDSR; -+ -+ ret = spi_xfer(spi, 8, &cmd, NULL, SPI_XFER_BEGIN); -+ if (ret) { -+ debug("SF: Failed to send command %02x: %d\n", cmd, ret); -+ return ret; -+ } -+ -+ timebase = get_timer(0); -+ do { -+ ret = spi_xfer(spi, 8, NULL, &status, 0); -+ if (ret) -+ return -1; -+ -+ if ((status & MACRONIX_SR_WIP) == 0) -+ break; -+ -+ } while (get_timer(timebase) < timeout); -+ -+ spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END); -+ -+ if ((status & MACRONIX_SR_WIP) == 0) -+ return 0; -+ -+ /* Timed out */ -+ return -1; -+} -+ -+static int macronix_read_fast(struct spi_flash *flash, -+ u32 offset, size_t len, void *buf) -+{ -+ struct macronix_spi_flash *mcx = to_macronix_spi_flash(flash); -+ unsigned long page_addr; -+ unsigned long page_size; -+ u8 cmd[5]; -+ -+ page_size = mcx->params->page_size; -+ page_addr = offset / page_size; -+ -+ cmd[0] = CMD_READ_ARRAY_FAST; -+ cmd[1] = page_addr >> 8; -+ cmd[2] = page_addr; -+ cmd[3] = offset % page_size; -+ cmd[4] = 0x00; -+ -+ return spi_flash_read_common(flash, cmd, sizeof(cmd), buf, len); -+} -+ -+static int macronix_write(struct spi_flash *flash, -+ u32 offset, size_t len, const void *buf) -+{ -+ struct macronix_spi_flash *mcx = to_macronix_spi_flash(flash); -+ unsigned long page_addr; -+ unsigned long byte_addr; -+ unsigned long page_size; -+ size_t chunk_len; -+ size_t actual; -+ int ret; -+ u8 cmd[4]; -+ -+ page_size = mcx->params->page_size; -+ page_addr = offset / page_size; -+ byte_addr = offset % page_size; -+ -+ ret = spi_claim_bus(flash->spi); -+ if (ret) { -+ debug("SF: Unable to claim SPI bus\n"); -+ return ret; -+ } -+ -+ ret = 0; -+ for (actual = 0; actual < len; actual += chunk_len) { -+ chunk_len = min(len - actual, page_size - byte_addr); -+ -+ cmd[0] = CMD_MX25XX_PP; -+ cmd[1] = page_addr >> 8; -+ cmd[2] = page_addr; -+ cmd[3] = byte_addr; -+ -+ debug -+ ("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %d\n", -+ buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len); -+ -+ ret = spi_flash_cmd(flash->spi, CMD_MX25XX_WREN, NULL, 0); -+ if (ret < 0) { -+ debug("SF: Enabling Write failed\n"); -+ break; -+ } -+ -+ ret = spi_flash_cmd_write(flash->spi, cmd, 4, -+ buf + actual, chunk_len); -+ if (ret < 0) { -+ debug("SF: Macronix Page Program failed\n"); -+ break; -+ } -+ -+ ret = macronix_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT); -+ if (ret < 0) { -+ debug("SF: Macronix page programming timed out\n"); -+ break; -+ } -+ -+ page_addr++; -+ byte_addr = 0; -+ } -+ -+ debug("SF: Macronix: Successfully programmed %u bytes @ 0x%x\n", -+ len, offset); -+ -+ spi_release_bus(flash->spi); -+ return ret; -+} -+ -+int macronix_erase(struct spi_flash *flash, u32 offset, size_t len) -+{ -+ struct macronix_spi_flash *mcx = to_macronix_spi_flash(flash); -+ unsigned long sector_size; -+ size_t actual; -+ int ret; -+ u8 cmd[4]; -+ -+ /* -+ * This function currently uses sector erase only. -+ * probably speed things up by using bulk erase -+ * when possible. -+ */ -+ -+ sector_size = mcx->params->page_size * mcx->params->pages_per_sector -+ * mcx->params->sectors_per_block; -+ -+ if (offset % sector_size || len % sector_size) { -+ debug("SF: Erase offset/length not multiple of sector size\n"); -+ return -1; -+ } -+ -+ len /= sector_size; -+ cmd[0] = CMD_MX25XX_BE; -+ cmd[2] = 0x00; -+ cmd[3] = 0x00; -+ -+ ret = spi_claim_bus(flash->spi); -+ if (ret) { -+ debug("SF: Unable to claim SPI bus\n"); -+ return ret; -+ } -+ -+ ret = 0; -+ for (actual = 0; actual < len; actual++) { -+ cmd[1] = (offset / sector_size) + actual; -+ -+ ret = spi_flash_cmd(flash->spi, CMD_MX25XX_WREN, NULL, 0); -+ if (ret < 0) { -+ debug("SF: Enabling Write failed\n"); -+ break; -+ } -+ -+ ret = spi_flash_cmd_write(flash->spi, cmd, 4, NULL, 0); -+ if (ret < 0) { -+ debug("SF: Macronix page erase failed\n"); -+ break; -+ } -+ -+ ret = macronix_wait_ready(flash, SPI_FLASH_PAGE_ERASE_TIMEOUT); -+ if (ret < 0) { -+ debug("SF: Macronix page erase timed out\n"); -+ break; -+ } -+ } -+ -+ debug("SF: Macronix: Successfully erased %u bytes @ 0x%x\n", -+ len * sector_size, offset); -+ -+ spi_release_bus(flash->spi); -+ return ret; -+} -+ -+struct spi_flash *spi_flash_probe_macronix(struct spi_slave *spi, u8 *idcode) -+{ -+ const struct macronix_spi_flash_params *params; -+ struct macronix_spi_flash *mcx; -+ unsigned int i; -+ -+ for (i = 0; i < ARRAY_SIZE(macronix_spi_flash_table); i++) { -+ params = ¯onix_spi_flash_table[i]; -+ if (params->idcode1 == idcode[2]) -+ break; -+ } -+ -+ if (i == ARRAY_SIZE(macronix_spi_flash_table)) { -+ debug("SF: Unsupported Macronix ID %02x\n", idcode[1]); -+ return NULL; -+ } -+ -+ mcx = malloc(sizeof(*mcx)); -+ if (!mcx) { -+ debug("SF: Failed to allocate memory\n"); -+ return NULL; -+ } -+ -+ mcx->params = params; -+ mcx->flash.spi = spi; -+ mcx->flash.name = params->name; -+ -+ mcx->flash.write = macronix_write; -+ mcx->flash.erase = macronix_erase; -+ mcx->flash.read = macronix_read_fast; -+ mcx->flash.size = params->page_size * params->pages_per_sector -+ * params->sectors_per_block * params->nr_blocks; -+ -+ printf("SF: Detected %s with page size %u, total %u bytes\n", -+ params->name, params->page_size, mcx->flash.size); -+ -+ return &mcx->flash; -+} -diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c -index 274895a..0c83231 100644 ---- a/drivers/mtd/spi/spi_flash.c -+++ b/drivers/mtd/spi/spi_flash.c -@@ -134,6 +134,11 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, - flash = spi_flash_probe_atmel(spi, idcode); - break; - #endif -+#ifdef CONFIG_SPI_FLASH_MACRONIX -+ case 0xc2: -+ flash = spi_flash_probe_macronix(spi, idcode); -+ break; -+#endif - #ifdef CONFIG_SPI_FLASH_STMICRO - case 0x20: - flash = spi_flash_probe_stmicro(spi, idcode); -diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h -index 5d1e395..0612383 100644 ---- a/drivers/mtd/spi/spi_flash_internal.h -+++ b/drivers/mtd/spi/spi_flash_internal.h -@@ -46,5 +46,6 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, - /* Manufacturer-specific probe functions */ - struct spi_flash *spi_flash_probe_spansion(struct spi_slave *spi, u8 *idcode); - struct spi_flash *spi_flash_probe_atmel(struct spi_slave *spi, u8 *idcode); -+struct spi_flash *spi_flash_probe_macronix(struct spi_slave *spi, u8 *idcode); - struct spi_flash *spi_flash_probe_sst(struct spi_slave *spi, u8 *idcode); - struct spi_flash *spi_flash_probe_stmicro(struct spi_slave *spi, u8 *idcode); -diff --git a/drivers/mtd/ubi/build.c b/drivers/mtd/ubi/build.c -index f4b01a9..4f50b2d 100644 ---- a/drivers/mtd/ubi/build.c -+++ b/drivers/mtd/ubi/build.c -@@ -46,6 +46,10 @@ - #include - #include "ubi.h" - -+#if (CONFIG_SYS_MALLOC_LEN < (512 << 10)) -+#error Malloc area too small for UBI, increase CONFIG_SYS_MALLOC_LEN to >= 512k -+#endif -+ - /* Maximum length of the 'mtd=' parameter */ - #define MTD_PARAM_LEN_MAX 64 - -diff --git a/drivers/net/mpc512x_fec.c b/drivers/net/mpc512x_fec.c -index 7078c4e..fb2c19a 100644 ---- a/drivers/net/mpc512x_fec.c -+++ b/drivers/net/mpc512x_fec.c -@@ -1,5 +1,5 @@ - /* -- * (C) Copyright 2003-2007 -+ * (C) Copyright 2003-2009 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * Derived from the MPC8xx FEC driver. -@@ -7,11 +7,11 @@ - */ - - #include --#include - #include - #include - #include - #include -+#include - #include "mpc512x_fec.h" - - DECLARE_GLOBAL_DATA_PTR; -@@ -26,11 +26,11 @@ DECLARE_GLOBAL_DATA_PTR; - #endif - - #if (DEBUG & 0x40) --static uint32 local_crc32(char *string, unsigned int crc_value, int len); -+static u32 local_crc32(char *string, unsigned int crc_value, int len); - #endif - --int fec512x_miiphy_read(char *devname, uint8 phyAddr, uint8 regAddr, uint16 * retVal); --int fec512x_miiphy_write(char *devname, uint8 phyAddr, uint8 regAddr, uint16 data); -+int fec512x_miiphy_read(char *devname, u8 phyAddr, u8 regAddr, u16 * retVal); -+int fec512x_miiphy_write(char *devname, u8 phyAddr, u8 regAddr, u16 data); - int mpc512x_fec_init_phy(struct eth_device *dev, bd_t * bis); - - static uchar rx_buff[FEC_BUFFER_SIZE]; -@@ -40,9 +40,9 @@ static int rx_buff_idx = 0; - #if (DEBUG & 0x2) - static void mpc512x_fec_phydump (char *devname) - { -- uint16 phyStatus, i; -- uint8 phyAddr = CONFIG_PHY_ADDR; -- uint8 reg_mask[] = { -+ u16 phyStatus, i; -+ u8 phyAddr = CONFIG_PHY_ADDR; -+ u8 reg_mask[] = { - /* regs to print: 0...8, 21,27,31 */ - 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, -@@ -66,7 +66,8 @@ static int mpc512x_fec_bd_init (mpc512x_fec_priv *fec) - * Receive BDs init - */ - for (ix = 0; ix < FEC_RBD_NUM; ix++) { -- fec->bdBase->rbd[ix].dataPointer = (uint32)&fec->bdBase->recv_frames[ix]; -+ fec->bdBase->rbd[ix].dataPointer = -+ (u32)&fec->bdBase->recv_frames[ix]; - fec->bdBase->rbd[ix].status = FEC_RBD_EMPTY; - fec->bdBase->rbd[ix].dataLength = 0; - } -@@ -119,8 +120,9 @@ static void mpc512x_fec_rbd_clean (mpc512x_fec_priv *fec, volatile FEC_RBD * pRb - - /* - * Now, we have an empty RxBD, notify FEC -+ * Set Descriptor polling active - */ -- fec->eth->r_des_active = 0x01000000; /* Descriptor polling active */ -+ out_be32(&fec->eth->r_des_active, 0x01000000); - } - - /********************************************************************/ -@@ -164,10 +166,10 @@ static void mpc512x_fec_tbd_scrub (mpc512x_fec_priv *fec) - /********************************************************************/ - static void mpc512x_fec_set_hwaddr (mpc512x_fec_priv *fec, char *mac) - { -- uint8 currByte; /* byte for which to compute the CRC */ -+ u8 currByte; /* byte for which to compute the CRC */ - int byte; /* loop - counter */ - int bit; /* loop - counter */ -- uint32 crc = 0xffffffff; /* initial value */ -+ u32 crc = 0xffffffff; /* initial value */ - - /* - * The algorithm used is the following: -@@ -203,18 +205,20 @@ static void mpc512x_fec_set_hwaddr (mpc512x_fec_priv *fec, char *mac) - * Set individual hash table register - */ - if (crc >= 32) { -- fec->eth->iaddr1 = (1 << (crc - 32)); -- fec->eth->iaddr2 = 0; -+ out_be32(&fec->eth->iaddr1, (1 << (crc - 32))); -+ out_be32(&fec->eth->iaddr2, 0); - } else { -- fec->eth->iaddr1 = 0; -- fec->eth->iaddr2 = (1 << crc); -+ out_be32(&fec->eth->iaddr1, 0); -+ out_be32(&fec->eth->iaddr2, (1 << crc)); - } - - /* - * Set physical address - */ -- fec->eth->paddr1 = (mac[0] << 24) + (mac[1] << 16) + (mac[2] << 8) + mac[3]; -- fec->eth->paddr2 = (mac[4] << 24) + (mac[5] << 16) + 0x8808; -+ out_be32(&fec->eth->paddr1, (mac[0] << 24) + (mac[1] << 16) + -+ (mac[2] << 8) + mac[3]); -+ out_be32(&fec->eth->paddr2, (mac[4] << 24) + (mac[5] << 16) + -+ 0x8808); - } - - /********************************************************************/ -@@ -227,45 +231,45 @@ static int mpc512x_fec_init (struct eth_device *dev, bd_t * bis) - #endif - - /* Set interrupt mask register */ -- fec->eth->imask = 0x00000000; -+ out_be32(&fec->eth->imask, 0x00000000); - - /* Clear FEC-Lite interrupt event register(IEVENT) */ -- fec->eth->ievent = 0xffffffff; -+ out_be32(&fec->eth->ievent, 0xffffffff); - - /* Set transmit fifo watermark register(X_WMRK), default = 64 */ -- fec->eth->x_wmrk = 0x0; -+ out_be32(&fec->eth->x_wmrk, 0x0); - - /* Set Opcode/Pause Duration Register */ -- fec->eth->op_pause = 0x00010020; -+ out_be32(&fec->eth->op_pause, 0x00010020); - - /* Frame length=1522; MII mode */ -- fec->eth->r_cntrl = (FEC_MAX_FRAME_LEN << 16) | 0x24; -+ out_be32(&fec->eth->r_cntrl, (FEC_MAX_FRAME_LEN << 16) | 0x24); - - /* Half-duplex, heartbeat disabled */ -- fec->eth->x_cntrl = 0x00000000; -+ out_be32(&fec->eth->x_cntrl, 0x00000000); - - /* Enable MIB counters */ -- fec->eth->mib_control = 0x0; -+ out_be32(&fec->eth->mib_control, 0x0); - - /* Setup recv fifo start and buff size */ -- fec->eth->r_fstart = 0x500; -- fec->eth->r_buff_size = FEC_BUFFER_SIZE; -+ out_be32(&fec->eth->r_fstart, 0x500); -+ out_be32(&fec->eth->r_buff_size, FEC_BUFFER_SIZE); - - /* Setup BD base addresses */ -- fec->eth->r_des_start = (uint32)fec->bdBase->rbd; -- fec->eth->x_des_start = (uint32)fec->bdBase->tbd; -+ out_be32(&fec->eth->r_des_start, (u32)fec->bdBase->rbd); -+ out_be32(&fec->eth->x_des_start, (u32)fec->bdBase->tbd); - - /* DMA Control */ -- fec->eth->dma_control = 0xc0000000; -+ out_be32(&fec->eth->dma_control, 0xc0000000); - - /* Enable FEC */ -- fec->eth->ecntrl |= 0x00000006; -+ setbits_be32(&fec->eth->ecntrl, 0x00000006); - - /* Initilize addresses and status words of BDs */ - mpc512x_fec_bd_init (fec); - - /* Descriptor polling active */ -- fec->eth->r_des_active = 0x01000000; -+ out_be32(&fec->eth->r_des_active, 0x01000000); - - #if (DEBUG & 0x1) - printf("mpc512x_fec_init... Done \n"); -@@ -277,9 +281,9 @@ static int mpc512x_fec_init (struct eth_device *dev, bd_t * bis) - int mpc512x_fec_init_phy (struct eth_device *dev, bd_t * bis) - { - mpc512x_fec_priv *fec = (mpc512x_fec_priv *)dev->priv; -- const uint8 phyAddr = CONFIG_PHY_ADDR; /* Only one PHY */ -+ const u8 phyAddr = CONFIG_PHY_ADDR; /* Only one PHY */ - int timeout = 1; -- uint16 phyStatus; -+ u16 phyStatus; - - #if (DEBUG & 0x1) - printf ("mpc512x_fec_init_phy... Begin\n"); -@@ -288,19 +292,20 @@ int mpc512x_fec_init_phy (struct eth_device *dev, bd_t * bis) - /* - * Clear FEC-Lite interrupt event register(IEVENT) - */ -- fec->eth->ievent = 0xffffffff; -+ out_be32(&fec->eth->ievent, 0xffffffff); - - /* - * Set interrupt mask register - */ -- fec->eth->imask = 0x00000000; -+ out_be32(&fec->eth->imask, 0x00000000); - - if (fec->xcv_type != SEVENWIRE) { - /* - * Set MII_SPEED = (1/(mii_speed * 2)) * System Clock - * and do not drop the Preamble. - */ -- fec->eth->mii_speed = (((gd->ips_clk / 1000000) / 5) + 1) << 1; -+ out_be32(&fec->eth->mii_speed, -+ (((gd->ips_clk / 1000000) / 5) + 1) << 1); - - /* - * Reset PHY, then delay 300ns -@@ -414,27 +419,28 @@ static void mpc512x_fec_halt (struct eth_device *dev) - /* - * mask FEC chip interrupts - */ -- fec->eth->imask = 0; -+ out_be32(&fec->eth->imask, 0); - - /* - * issue graceful stop command to the FEC transmitter if necessary - */ -- fec->eth->x_cntrl |= 0x00000001; -+ setbits_be32(&fec->eth->x_cntrl, 0x00000001); - - /* - * wait for graceful stop to register - */ -- while ((counter--) && (!(fec->eth->ievent & 0x10000000))) ; -+ while ((counter--) && (!(in_be32(&fec->eth->ievent) & 0x10000000))) -+ ; - - /* - * Disable the Ethernet Controller - */ -- fec->eth->ecntrl &= 0xfffffffd; -+ clrbits_be32(&fec->eth->ecntrl, 0x00000002); - - /* - * Issue a reset command to the FEC chip - */ -- fec->eth->ecntrl |= 0x1; -+ setbits_be32(&fec->eth->ecntrl, 0x1); - - /* - * wait at least 16 clock cycles -@@ -488,12 +494,12 @@ static int mpc512x_fec_send (struct eth_device *dev, volatile void *eth_data, - */ - pTbd = &fec->bdBase->tbd[fec->tbdIndex]; - pTbd->dataLength = data_length; -- pTbd->dataPointer = (uint32)eth_data; -+ pTbd->dataPointer = (u32)eth_data; - pTbd->status |= FEC_TBD_LAST | FEC_TBD_TC | FEC_TBD_READY; - fec->tbdIndex = (fec->tbdIndex + 1) % FEC_TBD_NUM; - - /* Activate transmit Buffer Descriptor polling */ -- fec->eth->x_des_active = 0x01000000; /* Descriptor polling active */ -+ out_be32(&fec->eth->x_des_active, 0x01000000); - - #if (DEBUG & 0x8) - printf ( "+" ); -@@ -536,8 +542,8 @@ static int mpc512x_fec_recv (struct eth_device *dev) - /* - * Check if any critical events have happened - */ -- ievent = fec->eth->ievent; -- fec->eth->ievent = ievent; -+ ievent = in_be32(&fec->eth->ievent); -+ out_be32(&fec->eth->ievent, ievent); - if (ievent & 0x20060000) { - /* BABT, Rx/Tx FIFO errors */ - mpc512x_fec_halt (dev); -@@ -546,13 +552,13 @@ static int mpc512x_fec_recv (struct eth_device *dev) - } - if (ievent & 0x80000000) { - /* Heartbeat error */ -- fec->eth->x_cntrl |= 0x00000001; -+ setbits_be32(&fec->eth->x_cntrl, 0x00000001); - } - if (ievent & 0x10000000) { - /* Graceful stop complete */ -- if (fec->eth->x_cntrl & 0x00000001) { -+ if (in_be32(&fec->eth->x_cntrl) & 0x00000001) { - mpc512x_fec_halt (dev); -- fec->eth->x_cntrl &= ~0x00000001; -+ clrbits_be32(&fec->eth->x_cntrl, 0x00000001);; - mpc512x_fec_init (dev, NULL); - } - } -@@ -574,7 +580,7 @@ static int mpc512x_fec_recv (struct eth_device *dev) - printf ("recv data length 0x%08x data hdr: ", - pRbd->dataLength); - for (i = 0; i < 14; i++) -- printf ("%x ", *((uint8*)pRbd->dataPointer + i)); -+ printf ("%x ", *((u8*)pRbd->dataPointer + i)); - printf("\n"); - } - #endif -@@ -598,13 +604,15 @@ static int mpc512x_fec_recv (struct eth_device *dev) - } - - /* Try to fill Buffer Descriptors */ -- fec->eth->r_des_active = 0x01000000; /* Descriptor polling active */ -+ out_be32(&fec->eth->r_des_active, 0x01000000); -+ - return frame_length; - } - - /********************************************************************/ - int mpc512x_fec_initialize (bd_t * bis) - { -+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; - mpc512x_fec_priv *fec; - struct eth_device *dev; - int i; -@@ -615,7 +623,7 @@ int mpc512x_fec_initialize (bd_t * bis) - dev = (struct eth_device *) malloc (sizeof(*dev)); - memset (dev, 0, sizeof *dev); - -- fec->eth = (ethernet_regs *) MPC512X_FEC; -+ fec->eth = &im->fec; - - # ifndef CONFIG_FEC_10MBIT - fec->xcv_type = MII100; -@@ -623,7 +631,7 @@ int mpc512x_fec_initialize (bd_t * bis) - fec->xcv_type = MII10; - # endif - dev->priv = (void *)fec; -- dev->iobase = MPC512X_FEC; -+ dev->iobase = (int)&im->fec; - dev->init = mpc512x_fec_init; - dev->halt = mpc512x_fec_halt; - dev->send = mpc512x_fec_send; -@@ -638,25 +646,26 @@ int mpc512x_fec_initialize (bd_t * bis) - #endif - - /* Clean up space FEC's MIB and FIFO RAM ...*/ -- memset ((void *) MPC512X_FEC + 0x200, 0x00, 0x400); -+ memset ((void *)&im->fec.mib, 0x00, sizeof(im->fec.mib)); -+ memset ((void *)&im->fec.fifo, 0x00, sizeof(im->fec.fifo)); - - /* - * Malloc space for BDs (must be quad word-aligned) - * this pointer is lost, so cannot be freed - */ - bd = malloc (sizeof(mpc512x_buff_descs) + 0x1f); -- fec->bdBase = (mpc512x_buff_descs*)((uint32)bd & 0xfffffff0); -+ fec->bdBase = (mpc512x_buff_descs*)((u32)bd & 0xfffffff0); - memset ((void *) bd, 0x00, sizeof(mpc512x_buff_descs) + 0x1f); - - /* - * Set interrupt mask register - */ -- fec->eth->imask = 0x00000000; -+ out_be32(&fec->eth->imask, 0x00000000); - - /* - * Clear FEC-Lite interrupt event register(IEVENT) - */ -- fec->eth->ievent = 0xffffffff; -+ out_be32(&fec->eth->ievent, 0xffffffff); - - /* - * Try to set the mac address now. The fec mac address is -@@ -671,8 +680,8 @@ int mpc512x_fec_initialize (bd_t * bis) - tmp = (*end) ? end+1 : end; - } - mpc512x_fec_set_hwaddr (fec, env_enetaddr); -- fec->eth->gaddr1 = 0x00000000; -- fec->eth->gaddr2 = 0x00000000; -+ out_be32(&fec->eth->gaddr1, 0x00000000); -+ out_be32(&fec->eth->gaddr2, 0x00000000); - } - - mpc512x_fec_init_phy (dev, bis); -@@ -682,11 +691,12 @@ int mpc512x_fec_initialize (bd_t * bis) - - /* MII-interface related functions */ - /********************************************************************/ --int fec512x_miiphy_read (char *devname, uint8 phyAddr, uint8 regAddr, uint16 * retVal) -+int fec512x_miiphy_read (char *devname, u8 phyAddr, u8 regAddr, u16 * retVal) - { -- ethernet_regs *eth = (ethernet_regs *) MPC512X_FEC; -- uint32 reg; /* convenient holder for the PHY register */ -- uint32 phy; /* convenient holder for the PHY */ -+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; -+ volatile fec512x_t *eth = &im->fec; -+ u32 reg; /* convenient holder for the PHY register */ -+ u32 phy; /* convenient holder for the PHY */ - int timeout = 0xffff; - - /* -@@ -696,12 +706,16 @@ int fec512x_miiphy_read (char *devname, uint8 phyAddr, uint8 regAddr, uint16 * r - reg = regAddr << FEC_MII_DATA_RA_SHIFT; - phy = phyAddr << FEC_MII_DATA_PA_SHIFT; - -- eth->mii_data = (FEC_MII_DATA_ST | FEC_MII_DATA_OP_RD | FEC_MII_DATA_TA | phy | reg); -+ out_be32(ð->mii_data, FEC_MII_DATA_ST | -+ FEC_MII_DATA_OP_RD | -+ FEC_MII_DATA_TA | -+ phy | reg); - - /* - * wait for the related interrupt - */ -- while ((timeout--) && (!(eth->ievent & 0x00800000))) ; -+ while ((timeout--) && (!(in_be32(ð->ievent) & 0x00800000))) -+ ; - - if (timeout == 0) { - #if (DEBUG & 0x2) -@@ -713,34 +727,38 @@ int fec512x_miiphy_read (char *devname, uint8 phyAddr, uint8 regAddr, uint16 * r - /* - * clear mii interrupt bit - */ -- eth->ievent = 0x00800000; -+ out_be32(ð->ievent, 0x00800000); - - /* - * it's now safe to read the PHY's register - */ -- *retVal = (uint16) eth->mii_data; -+ *retVal = (u16) in_be32(ð->mii_data); - - return 0; - } - - /********************************************************************/ --int fec512x_miiphy_write (char *devname, uint8 phyAddr, uint8 regAddr, uint16 data) -+int fec512x_miiphy_write (char *devname, u8 phyAddr, u8 regAddr, u16 data) - { -- ethernet_regs *eth = (ethernet_regs *) MPC512X_FEC; -- uint32 reg; /* convenient holder for the PHY register */ -- uint32 phy; /* convenient holder for the PHY */ -+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; -+ volatile fec512x_t *eth = &im->fec; -+ u32 reg; /* convenient holder for the PHY register */ -+ u32 phy; /* convenient holder for the PHY */ - int timeout = 0xffff; - - reg = regAddr << FEC_MII_DATA_RA_SHIFT; - phy = phyAddr << FEC_MII_DATA_PA_SHIFT; - -- eth->mii_data = (FEC_MII_DATA_ST | FEC_MII_DATA_OP_WR | -- FEC_MII_DATA_TA | phy | reg | data); -+ out_be32(ð->mii_data, FEC_MII_DATA_ST | -+ FEC_MII_DATA_OP_WR | -+ FEC_MII_DATA_TA | -+ phy | reg | data); - - /* - * wait for the MII interrupt - */ -- while ((timeout--) && (!(eth->ievent & 0x00800000))) ; -+ while ((timeout--) && (!(in_be32(ð->ievent) & 0x00800000))) -+ ; - - if (timeout == 0) { - #if (DEBUG & 0x2) -@@ -752,13 +770,13 @@ int fec512x_miiphy_write (char *devname, uint8 phyAddr, uint8 regAddr, uint16 da - /* - * clear MII interrupt bit - */ -- eth->ievent = 0x00800000; -+ out_be32(ð->ievent, 0x00800000); - - return 0; - } - - #if (DEBUG & 0x40) --static uint32 local_crc32 (char *string, unsigned int crc_value, int len) -+static u32 local_crc32 (char *string, unsigned int crc_value, int len) - { - int i; - char c; -diff --git a/drivers/net/mpc512x_fec.h b/drivers/net/mpc512x_fec.h -index 9c38502..a083cca 100644 ---- a/drivers/net/mpc512x_fec.h -+++ b/drivers/net/mpc512x_fec.h -@@ -1,5 +1,5 @@ - /* -- * (C) Copyright 2003 - 2007 -+ * (C) Copyright 2003 - 2009 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * Derived from the MPC8xx driver's header file. -@@ -9,147 +9,18 @@ - #define __MPC512X_FEC_H - - #include --#include -- --typedef unsigned long uint32; --typedef unsigned short uint16; --typedef unsigned char uint8; -- --typedef struct ethernet_register_set { -- --/* [10:2]addr = 00 */ -- --/* Control and status Registers (offset 000-1FF) */ -- -- volatile uint32 fec_id; /* MBAR_ETH + 0x000 */ -- volatile uint32 ievent; /* MBAR_ETH + 0x004 */ -- volatile uint32 imask; /* MBAR_ETH + 0x008 */ -- -- volatile uint32 RES0[1]; /* MBAR_ETH + 0x00C */ -- volatile uint32 r_des_active; /* MBAR_ETH + 0x010 */ -- volatile uint32 x_des_active; /* MBAR_ETH + 0x014 */ -- -- volatile uint32 RES1[3]; /* MBAR_ETH + 0x018-020 */ -- volatile uint32 ecntrl; /* MBAR_ETH + 0x024 */ -- -- volatile uint32 RES2[6]; /* MBAR_ETH + 0x028-03C */ -- volatile uint32 mii_data; /* MBAR_ETH + 0x040 */ -- volatile uint32 mii_speed; /* MBAR_ETH + 0x044 */ -- -- volatile uint32 RES3[7]; /* MBAR_ETH + 0x048-060 */ -- volatile uint32 mib_control; /* MBAR_ETH + 0x064 */ -- -- volatile uint32 RES4[7]; /* MBAR_ETH + 0x068-80 */ -- volatile uint32 r_cntrl; /* MBAR_ETH + 0x084 */ -- volatile uint32 r_hash; /* MBAR_ETH + 0x088 */ -- -- volatile uint32 RES5[14]; /* MBAR_ETH + 0x08c-0C0 */ -- volatile uint32 x_cntrl; /* MBAR_ETH + 0x0C4 */ -- -- volatile uint32 RES6[7]; /* MBAR_ETH + 0x0C8-0E0 */ -- volatile uint32 paddr1; /* MBAR_ETH + 0x0E4 */ -- volatile uint32 paddr2; /* MBAR_ETH + 0x0E8 */ -- volatile uint32 op_pause; /* MBAR_ETH + 0x0EC */ -- -- volatile uint32 RES7[10]; /* MBAR_ETH + 0x0F0-114 */ -- volatile uint32 iaddr1; /* MBAR_ETH + 0x118 */ -- volatile uint32 iaddr2; /* MBAR_ETH + 0x11C */ -- volatile uint32 gaddr1; /* MBAR_ETH + 0x120 */ -- volatile uint32 gaddr2; /* MBAR_ETH + 0x124 */ -- -- volatile uint32 RES8[6]; /* MBAR_ETH + 0x128-13C */ -- volatile uint32 fifo_id; /* MBAR_ETH + 0x140 */ -- volatile uint32 x_wmrk; /* MBAR_ETH + 0x144 */ -- volatile uint32 RES9[1]; /* MBAR_ETH + 0x148 */ -- volatile uint32 r_bound; /* MBAR_ETH + 0x14C */ -- volatile uint32 r_fstart; /* MBAR_ETH + 0x150 */ -- -- volatile uint32 RES10[11]; /* MBAR_ETH + 0x154-17C */ -- volatile uint32 r_des_start; /* MBAR_ETH + 0x180 */ -- volatile uint32 x_des_start; /* MBAR_ETH + 0x184 */ -- volatile uint32 r_buff_size; /* MBAR_ETH + 0x188 */ -- volatile uint32 RES11[26]; /* MBAR_ETH + 0x18C-1F0 */ -- volatile uint32 dma_control; /* MBAR_ETH + 0x1F4 */ -- volatile uint32 RES12[2]; /* MBAR_ETH + 0x1F8-1FC */ -- --/* MIB COUNTERS (Offset 200-2FF) */ -- -- volatile uint32 rmon_t_drop; /* MBAR_ETH + 0x200 */ -- volatile uint32 rmon_t_packets; /* MBAR_ETH + 0x204 */ -- volatile uint32 rmon_t_bc_pkt; /* MBAR_ETH + 0x208 */ -- volatile uint32 rmon_t_mc_pkt; /* MBAR_ETH + 0x20C */ -- volatile uint32 rmon_t_crc_align; /* MBAR_ETH + 0x210 */ -- volatile uint32 rmon_t_undersize; /* MBAR_ETH + 0x214 */ -- volatile uint32 rmon_t_oversize; /* MBAR_ETH + 0x218 */ -- volatile uint32 rmon_t_frag; /* MBAR_ETH + 0x21C */ -- volatile uint32 rmon_t_jab; /* MBAR_ETH + 0x220 */ -- volatile uint32 rmon_t_col; /* MBAR_ETH + 0x224 */ -- volatile uint32 rmon_t_p64; /* MBAR_ETH + 0x228 */ -- volatile uint32 rmon_t_p65to127; /* MBAR_ETH + 0x22C */ -- volatile uint32 rmon_t_p128to255; /* MBAR_ETH + 0x230 */ -- volatile uint32 rmon_t_p256to511; /* MBAR_ETH + 0x234 */ -- volatile uint32 rmon_t_p512to1023; /* MBAR_ETH + 0x238 */ -- volatile uint32 rmon_t_p1024to2047; /* MBAR_ETH + 0x23C */ -- volatile uint32 rmon_t_p_gte2048; /* MBAR_ETH + 0x240 */ -- volatile uint32 rmon_t_octets; /* MBAR_ETH + 0x244 */ -- volatile uint32 ieee_t_drop; /* MBAR_ETH + 0x248 */ -- volatile uint32 ieee_t_frame_ok; /* MBAR_ETH + 0x24C */ -- volatile uint32 ieee_t_1col; /* MBAR_ETH + 0x250 */ -- volatile uint32 ieee_t_mcol; /* MBAR_ETH + 0x254 */ -- volatile uint32 ieee_t_def; /* MBAR_ETH + 0x258 */ -- volatile uint32 ieee_t_lcol; /* MBAR_ETH + 0x25C */ -- volatile uint32 ieee_t_excol; /* MBAR_ETH + 0x260 */ -- volatile uint32 ieee_t_macerr; /* MBAR_ETH + 0x264 */ -- volatile uint32 ieee_t_cserr; /* MBAR_ETH + 0x268 */ -- volatile uint32 ieee_t_sqe; /* MBAR_ETH + 0x26C */ -- volatile uint32 t_fdxfc; /* MBAR_ETH + 0x270 */ -- volatile uint32 ieee_t_octets_ok; /* MBAR_ETH + 0x274 */ -- -- volatile uint32 RES13[2]; /* MBAR_ETH + 0x278-27C */ -- volatile uint32 rmon_r_drop; /* MBAR_ETH + 0x280 */ -- volatile uint32 rmon_r_packets; /* MBAR_ETH + 0x284 */ -- volatile uint32 rmon_r_bc_pkt; /* MBAR_ETH + 0x288 */ -- volatile uint32 rmon_r_mc_pkt; /* MBAR_ETH + 0x28C */ -- volatile uint32 rmon_r_crc_align; /* MBAR_ETH + 0x290 */ -- volatile uint32 rmon_r_undersize; /* MBAR_ETH + 0x294 */ -- volatile uint32 rmon_r_oversize; /* MBAR_ETH + 0x298 */ -- volatile uint32 rmon_r_frag; /* MBAR_ETH + 0x29C */ -- volatile uint32 rmon_r_jab; /* MBAR_ETH + 0x2A0 */ -- -- volatile uint32 rmon_r_resvd_0; /* MBAR_ETH + 0x2A4 */ -- -- volatile uint32 rmon_r_p64; /* MBAR_ETH + 0x2A8 */ -- volatile uint32 rmon_r_p65to127; /* MBAR_ETH + 0x2AC */ -- volatile uint32 rmon_r_p128to255; /* MBAR_ETH + 0x2B0 */ -- volatile uint32 rmon_r_p256to511; /* MBAR_ETH + 0x2B4 */ -- volatile uint32 rmon_r_p512to1023; /* MBAR_ETH + 0x2B8 */ -- volatile uint32 rmon_r_p1024to2047; /* MBAR_ETH + 0x2BC */ -- volatile uint32 rmon_r_p_gte2048; /* MBAR_ETH + 0x2C0 */ -- volatile uint32 rmon_r_octets; /* MBAR_ETH + 0x2C4 */ -- volatile uint32 ieee_r_drop; /* MBAR_ETH + 0x2C8 */ -- volatile uint32 ieee_r_frame_ok; /* MBAR_ETH + 0x2CC */ -- volatile uint32 ieee_r_crc; /* MBAR_ETH + 0x2D0 */ -- volatile uint32 ieee_r_align; /* MBAR_ETH + 0x2D4 */ -- volatile uint32 r_macerr; /* MBAR_ETH + 0x2D8 */ -- volatile uint32 r_fdxfc; /* MBAR_ETH + 0x2DC */ -- volatile uint32 ieee_r_octets_ok; /* MBAR_ETH + 0x2E0 */ -- -- volatile uint32 RES14[6]; /* MBAR_ETH + 0x2E4-2FC */ -- -- volatile uint32 RES15[64]; /* MBAR_ETH + 0x300-3FF */ --} ethernet_regs; - - /* Receive & Transmit Buffer Descriptor definitions */ - typedef struct BufferDescriptor { -- uint16 status; -- uint16 dataLength; -- uint32 dataPointer; -+ u16 status; -+ u16 dataLength; -+ u32 dataPointer; - } FEC_RBD; - - typedef struct { -- uint16 status; -- uint16 dataLength; -- uint32 dataPointer; -+ u16 status; -+ u16 dataLength; -+ u32 dataPointer; - } FEC_TBD; - - /* private structure */ -@@ -170,7 +41,7 @@ typedef enum { - #define FEC_BUFFER_SIZE ((FEC_MAX_FRAME_LEN + 0x10) & (~0xf)) - - typedef struct { -- uint8 frame[FEC_BUFFER_SIZE]; -+ u8 frame[FEC_BUFFER_SIZE]; - } mpc512x_frame; - - typedef struct { -@@ -180,13 +51,13 @@ typedef struct { - } mpc512x_buff_descs; - - typedef struct { -- ethernet_regs *eth; -+ volatile fec512x_t *eth; - xceiver_type xcv_type; /* transceiver type */ - mpc512x_buff_descs *bdBase; /* BD rings and recv buffer */ -- uint16 rbdIndex; /* next receive BD to read */ -- uint16 tbdIndex; /* next transmit BD to send */ -- uint16 usedTbdIndex; /* next transmit BD to clean */ -- uint16 cleanTbdNum; /* the number of available transmit BDs */ -+ u16 rbdIndex; /* next receive BD to read */ -+ u16 tbdIndex; /* next transmit BD to send */ -+ u16 usedTbdIndex; /* next transmit BD to clean */ -+ u16 cleanTbdNum; /* the number of available transmit BDs */ - } mpc512x_fec_priv; - - /* RBD bits definitions */ -diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c -index c20b981..35c82b9 100644 ---- a/drivers/pci/pci_auto.c -+++ b/drivers/pci/pci_auto.c -@@ -403,7 +403,7 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev) - PCI_DEV(dev)); - break; - #endif --#ifdef CONFIG_MPC834X -+#ifdef CONFIG_MPC834x - case PCI_CLASS_BRIDGE_OTHER: - /* - * The host/PCI bridge 1 seems broken in 8349 - it presents -diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c -index f114fe0..8882c4f 100644 ---- a/drivers/qe/qe.c -+++ b/drivers/qe/qe.c -@@ -1,5 +1,5 @@ - /* -- * Copyright (C) 2006 Freescale Semiconductor, Inc. -+ * Copyright (C) 2006-2009 Freescale Semiconductor, Inc. - * - * Dave Liu - * based on source code of Shlomi Gridish -@@ -108,14 +108,23 @@ static void qe_sdma_init(void) - out_be32(&p->sdmr, QE_SDMR_GLB_1_MSK | (0x3 << QE_SDMR_CEN_SHIFT)); - } - --static u8 thread_snum[QE_NUM_OF_SNUM] = { -+/* This table is a list of the serial numbers of the Threads, taken from the -+ * "SNUM Table" chart in the QE Reference Manual. The order is not important, -+ * we just need to know what the SNUMs are for the threads. -+ */ -+static u8 thread_snum[] = { - 0x04, 0x05, 0x0c, 0x0d, - 0x14, 0x15, 0x1c, 0x1d, - 0x24, 0x25, 0x2c, 0x2d, - 0x34, 0x35, 0x88, 0x89, - 0x98, 0x99, 0xa8, 0xa9, - 0xb8, 0xb9, 0xc8, 0xc9, -- 0xd8, 0xd9, 0xe8, 0xe9 -+ 0xd8, 0xd9, 0xe8, 0xe9, -+ 0x08, 0x09, 0x18, 0x19, -+ 0x28, 0x29, 0x38, 0x39, -+ 0x48, 0x49, 0x58, 0x59, -+ 0x68, 0x69, 0x78, 0x79, -+ 0x80, 0x81 - }; - - static void qe_snums_init(void) -@@ -258,9 +267,6 @@ int qe_set_mii_clk_src(int ucc_num) - return 0; - } - --/* The maximum number of RISCs we support */ --#define MAX_QE_RISC 2 -- - /* Firmware information stored here for qe_get_firmware_info() */ - static struct qe_firmware_info qe_firmware_info; - -@@ -473,5 +479,6 @@ U_BOOT_CMD( - qe, 4, 0, qe_cmd, - "QUICC Engine commands", - "fw [] - Upload firmware binary at address to " -- "the QE,\n\twith optional length verification.\n" -- ); -+ "the QE,\n" -+ "\twith optional length verification." -+); -diff --git a/drivers/qe/qe.h b/drivers/qe/qe.h -index d78edba..faad43c 100644 ---- a/drivers/qe/qe.h -+++ b/drivers/qe/qe.h -@@ -1,5 +1,5 @@ - /* -- * Copyright (C) 2006 Freescale Semiconductor, Inc. -+ * Copyright (C) 2006-2009 Freescale Semiconductor, Inc. - * - * Dave Liu - * based on source code of Shlomi Gridish -@@ -25,7 +25,6 @@ - - #include "common.h" - --#define QE_NUM_OF_SNUM 28 - #define QE_NUM_OF_BRGS 16 - #define UCC_MAX_NUM 8 - -@@ -46,11 +45,16 @@ typedef struct qe_snum { - - /* QE RISC allocation - */ --typedef enum qe_risc_allocation { -- QE_RISC_ALLOCATION_RISC1 = 1, /* RISC 1 */ -- QE_RISC_ALLOCATION_RISC2 = 2, /* RISC 2 */ -- QE_RISC_ALLOCATION_RISC1_AND_RISC2 = 3 /* RISC 1 or RISC 2 */ --} qe_risc_allocation_e; -+#define QE_RISC_ALLOCATION_RISC1 0x1 /* RISC 1 */ -+#define QE_RISC_ALLOCATION_RISC2 0x2 /* RISC 2 */ -+#define QE_RISC_ALLOCATION_RISC3 0x4 /* RISC 3 */ -+#define QE_RISC_ALLOCATION_RISC4 0x8 /* RISC 4 */ -+#define QE_RISC_ALLOCATION_RISC1_AND_RISC2 (QE_RISC_ALLOCATION_RISC1 | \ -+ QE_RISC_ALLOCATION_RISC2) -+#define QE_RISC_ALLOCATION_FOUR_RISCS (QE_RISC_ALLOCATION_RISC1 | \ -+ QE_RISC_ALLOCATION_RISC2 | \ -+ QE_RISC_ALLOCATION_RISC3 | \ -+ QE_RISC_ALLOCATION_RISC4) - - /* QE CECR commands for UCC fast. - */ -diff --git a/drivers/qe/uec.c b/drivers/qe/uec.c -index bba3ef2..3686575 100644 ---- a/drivers/qe/uec.c -+++ b/drivers/qe/uec.c -@@ -1,5 +1,5 @@ - /* -- * Copyright (C) 2006 Freescale Semiconductor, Inc. -+ * Copyright (C) 2006-2009 Freescale Semiconductor, Inc. - * - * Dave Liu - * -@@ -31,146 +31,34 @@ - #include "uec_phy.h" - #include "miiphy.h" - -+static uec_info_t uec_info[] = { - #ifdef CONFIG_UEC_ETH1 --static uec_info_t eth1_uec_info = { -- .uf_info = { -- .ucc_num = CONFIG_SYS_UEC1_UCC_NUM, -- .rx_clock = CONFIG_SYS_UEC1_RX_CLK, -- .tx_clock = CONFIG_SYS_UEC1_TX_CLK, -- .eth_type = CONFIG_SYS_UEC1_ETH_TYPE, -- }, --#if (CONFIG_SYS_UEC1_ETH_TYPE == FAST_ETH) -- .num_threads_tx = UEC_NUM_OF_THREADS_1, -- .num_threads_rx = UEC_NUM_OF_THREADS_1, --#else -- .num_threads_tx = UEC_NUM_OF_THREADS_4, -- .num_threads_rx = UEC_NUM_OF_THREADS_4, --#endif -- .riscTx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, -- .riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, -- .tx_bd_ring_len = 16, -- .rx_bd_ring_len = 16, -- .phy_address = CONFIG_SYS_UEC1_PHY_ADDR, -- .enet_interface = CONFIG_SYS_UEC1_INTERFACE_MODE, --}; -+ STD_UEC_INFO(1), /* UEC1 */ - #endif - #ifdef CONFIG_UEC_ETH2 --static uec_info_t eth2_uec_info = { -- .uf_info = { -- .ucc_num = CONFIG_SYS_UEC2_UCC_NUM, -- .rx_clock = CONFIG_SYS_UEC2_RX_CLK, -- .tx_clock = CONFIG_SYS_UEC2_TX_CLK, -- .eth_type = CONFIG_SYS_UEC2_ETH_TYPE, -- }, --#if (CONFIG_SYS_UEC2_ETH_TYPE == FAST_ETH) -- .num_threads_tx = UEC_NUM_OF_THREADS_1, -- .num_threads_rx = UEC_NUM_OF_THREADS_1, --#else -- .num_threads_tx = UEC_NUM_OF_THREADS_4, -- .num_threads_rx = UEC_NUM_OF_THREADS_4, --#endif -- .riscTx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, -- .riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, -- .tx_bd_ring_len = 16, -- .rx_bd_ring_len = 16, -- .phy_address = CONFIG_SYS_UEC2_PHY_ADDR, -- .enet_interface = CONFIG_SYS_UEC2_INTERFACE_MODE, --}; -+ STD_UEC_INFO(2), /* UEC2 */ - #endif - #ifdef CONFIG_UEC_ETH3 --static uec_info_t eth3_uec_info = { -- .uf_info = { -- .ucc_num = CONFIG_SYS_UEC3_UCC_NUM, -- .rx_clock = CONFIG_SYS_UEC3_RX_CLK, -- .tx_clock = CONFIG_SYS_UEC3_TX_CLK, -- .eth_type = CONFIG_SYS_UEC3_ETH_TYPE, -- }, --#if (CONFIG_SYS_UEC3_ETH_TYPE == FAST_ETH) -- .num_threads_tx = UEC_NUM_OF_THREADS_1, -- .num_threads_rx = UEC_NUM_OF_THREADS_1, --#else -- .num_threads_tx = UEC_NUM_OF_THREADS_4, -- .num_threads_rx = UEC_NUM_OF_THREADS_4, --#endif -- .riscTx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, -- .riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, -- .tx_bd_ring_len = 16, -- .rx_bd_ring_len = 16, -- .phy_address = CONFIG_SYS_UEC3_PHY_ADDR, -- .enet_interface = CONFIG_SYS_UEC3_INTERFACE_MODE, --}; -+ STD_UEC_INFO(3), /* UEC3 */ - #endif - #ifdef CONFIG_UEC_ETH4 --static uec_info_t eth4_uec_info = { -- .uf_info = { -- .ucc_num = CONFIG_SYS_UEC4_UCC_NUM, -- .rx_clock = CONFIG_SYS_UEC4_RX_CLK, -- .tx_clock = CONFIG_SYS_UEC4_TX_CLK, -- .eth_type = CONFIG_SYS_UEC4_ETH_TYPE, -- }, --#if (CONFIG_SYS_UEC4_ETH_TYPE == FAST_ETH) -- .num_threads_tx = UEC_NUM_OF_THREADS_1, -- .num_threads_rx = UEC_NUM_OF_THREADS_1, --#else -- .num_threads_tx = UEC_NUM_OF_THREADS_4, -- .num_threads_rx = UEC_NUM_OF_THREADS_4, --#endif -- .riscTx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, -- .riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, -- .tx_bd_ring_len = 16, -- .rx_bd_ring_len = 16, -- .phy_address = CONFIG_SYS_UEC4_PHY_ADDR, -- .enet_interface = CONFIG_SYS_UEC4_INTERFACE_MODE, --}; -+ STD_UEC_INFO(4), /* UEC4 */ - #endif - #ifdef CONFIG_UEC_ETH5 --static uec_info_t eth5_uec_info = { -- .uf_info = { -- .ucc_num = CONFIG_SYS_UEC5_UCC_NUM, -- .rx_clock = CONFIG_SYS_UEC5_RX_CLK, -- .tx_clock = CONFIG_SYS_UEC5_TX_CLK, -- .eth_type = CONFIG_SYS_UEC5_ETH_TYPE, -- }, --#if (CONFIG_SYS_UEC5_ETH_TYPE == FAST_ETH) -- .num_threads_tx = UEC_NUM_OF_THREADS_1, -- .num_threads_rx = UEC_NUM_OF_THREADS_1, --#else -- .num_threads_tx = UEC_NUM_OF_THREADS_4, -- .num_threads_rx = UEC_NUM_OF_THREADS_4, --#endif -- .riscTx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, -- .riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, -- .tx_bd_ring_len = 16, -- .rx_bd_ring_len = 16, -- .phy_address = CONFIG_SYS_UEC5_PHY_ADDR, -- .enet_interface = CONFIG_SYS_UEC5_INTERFACE_MODE, --}; -+ STD_UEC_INFO(5), /* UEC5 */ - #endif - #ifdef CONFIG_UEC_ETH6 --static uec_info_t eth6_uec_info = { -- .uf_info = { -- .ucc_num = CONFIG_SYS_UEC6_UCC_NUM, -- .rx_clock = CONFIG_SYS_UEC6_RX_CLK, -- .tx_clock = CONFIG_SYS_UEC6_TX_CLK, -- .eth_type = CONFIG_SYS_UEC6_ETH_TYPE, -- }, --#if (CONFIG_SYS_UEC6_ETH_TYPE == FAST_ETH) -- .num_threads_tx = UEC_NUM_OF_THREADS_1, -- .num_threads_rx = UEC_NUM_OF_THREADS_1, --#else -- .num_threads_tx = UEC_NUM_OF_THREADS_4, -- .num_threads_rx = UEC_NUM_OF_THREADS_4, -+ STD_UEC_INFO(6), /* UEC6 */ - #endif -- .riscTx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, -- .riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, -- .tx_bd_ring_len = 16, -- .rx_bd_ring_len = 16, -- .phy_address = CONFIG_SYS_UEC6_PHY_ADDR, -- .enet_interface = CONFIG_SYS_UEC6_INTERFACE_MODE, --}; -+#ifdef CONFIG_UEC_ETH7 -+ STD_UEC_INFO(7), /* UEC7 */ - #endif -+#ifdef CONFIG_UEC_ETH8 -+ STD_UEC_INFO(8), /* UEC8 */ -+#endif -+}; - --#define MAXCONTROLLERS (6) -+#define MAXCONTROLLERS (8) - - static struct eth_device *devlist[MAXCONTROLLERS]; - -@@ -491,6 +379,10 @@ static int uec_set_mac_if_mode(uec_private_t *uec, enet_interface_e if_mode) - maccfg2 |= MACCFG2_INTERFACE_MODE_NIBBLE; - upsmr |= (UPSMR_R10M | UPSMR_RMM); - break; -+ case ENET_1000_SGMII: -+ maccfg2 |= MACCFG2_INTERFACE_MODE_BYTE; -+ upsmr |= UPSMR_SGMM; -+ break; - default: - return -EINVAL; - break; -@@ -1020,7 +912,7 @@ static int uec_issue_init_enet_rxtx_cmd(uec_private_t *uec, - - /* Init Rx global parameter pointer */ - p_init_enet_param->rgftgfrxglobal |= uec->rx_glbl_pram_offset | -- (u32)uec_info->riscRx; -+ (u32)uec_info->risc_rx; - - /* Init Rx threads */ - for (i = 0; i < (thread_rx + 1); i++) { -@@ -1038,13 +930,13 @@ static int uec_issue_init_enet_rxtx_cmd(uec_private_t *uec, - } - - entry_val = ((u32)snum << ENET_INIT_PARAM_SNUM_SHIFT) | -- init_enet_offset | (u32)uec_info->riscRx; -+ init_enet_offset | (u32)uec_info->risc_rx; - p_init_enet_param->rxthread[i] = entry_val; - } - - /* Init Tx global parameter pointer */ - p_init_enet_param->txglobal = uec->tx_glbl_pram_offset | -- (u32)uec_info->riscTx; -+ (u32)uec_info->risc_tx; - - /* Init Tx threads */ - for (i = 0; i < thread_tx; i++) { -@@ -1057,7 +949,7 @@ static int uec_issue_init_enet_rxtx_cmd(uec_private_t *uec, - UEC_THREAD_TX_PRAM_ALIGNMENT); - - entry_val = ((u32)snum << ENET_INIT_PARAM_SNUM_SHIFT) | -- init_enet_offset | (u32)uec_info->riscTx; -+ init_enet_offset | (u32)uec_info->risc_tx; - p_init_enet_param->txthread[i] = entry_val; - } - -@@ -1190,6 +1082,18 @@ static int uec_startup(uec_private_t *uec) - - out_be32(&uec_regs->utbipar, utbipar); - -+ /* Configure the TBI for SGMII operation */ -+ if (uec->uec_info->enet_interface == ENET_1000_SGMII) { -+ uec_write_phy_reg(uec->dev, uec_regs->utbipar, -+ ENET_TBI_MII_ANA, TBIANA_SETTINGS); -+ -+ uec_write_phy_reg(uec->dev, uec_regs->utbipar, -+ ENET_TBI_MII_TBICON, TBICON_CLK_SELECT); -+ -+ uec_write_phy_reg(uec->dev, uec_regs->utbipar, -+ ENET_TBI_MII_CR, TBICR_SETTINGS); -+ } -+ - /* Allocate Tx BDs */ - length = ((uec_info->tx_bd_ring_len * SIZEOFBD) / - UEC_TX_BD_RING_SIZE_MEMORY_ALIGNMENT) * -@@ -1417,12 +1321,11 @@ static int uec_recv(struct eth_device* dev) - return 1; - } - --int uec_initialize(int index) -+int uec_initialize(bd_t *bis, uec_info_t *uec_info) - { - struct eth_device *dev; - int i; - uec_private_t *uec; -- uec_info_t *uec_info; - int err; - - dev = (struct eth_device *)malloc(sizeof(struct eth_device)); -@@ -1437,42 +1340,18 @@ int uec_initialize(int index) - } - memset(uec, 0, sizeof(uec_private_t)); - -- /* Init UEC private struct, they come from board.h */ -- uec_info = NULL; -- if (index == 0) { --#ifdef CONFIG_UEC_ETH1 -- uec_info = ð1_uec_info; --#endif -- } else if (index == 1) { --#ifdef CONFIG_UEC_ETH2 -- uec_info = ð2_uec_info; --#endif -- } else if (index == 2) { --#ifdef CONFIG_UEC_ETH3 -- uec_info = ð3_uec_info; --#endif -- } else if (index == 3) { --#ifdef CONFIG_UEC_ETH4 -- uec_info = ð4_uec_info; -+ /* Adjust uec_info */ -+#if (MAX_QE_RISC == 4) -+ uec_info->risc_tx = QE_RISC_ALLOCATION_FOUR_RISCS; -+ uec_info->risc_rx = QE_RISC_ALLOCATION_FOUR_RISCS; - #endif -- } else if (index == 4) { --#ifdef CONFIG_UEC_ETH5 -- uec_info = ð5_uec_info; --#endif -- } else if (index == 5) { --#ifdef CONFIG_UEC_ETH6 -- uec_info = ð6_uec_info; --#endif -- } else { -- printf("%s: index is illegal.\n", __FUNCTION__); -- return -EINVAL; -- } - -- devlist[index] = dev; -+ devlist[uec_info->uf_info.ucc_num] = dev; - - uec->uec_info = uec_info; -+ uec->dev = dev; - -- sprintf(dev->name, "FSL UEC%d", index); -+ sprintf(dev->name, "FSL UEC%d", uec_info->uf_info.ucc_num); - dev->iobase = 0; - dev->priv = (void *)uec; - dev->init = uec_init; -@@ -1499,3 +1378,20 @@ int uec_initialize(int index) - - return 1; - } -+ -+int uec_eth_init(bd_t *bis, uec_info_t *uecs, int num) -+{ -+ int i; -+ -+ for (i = 0; i < num; i++) -+ uec_initialize(bis, &uecs[i]); -+ -+ return 0; -+} -+ -+int uec_standard_init(bd_t *bis) -+{ -+ return uec_eth_init(bis, uec_info, ARRAY_SIZE(uec_info)); -+} -+ -+ -diff --git a/drivers/qe/uec.h b/drivers/qe/uec.h -index 0b64499..1568310 100644 ---- a/drivers/qe/uec.h -+++ b/drivers/qe/uec.h -@@ -1,5 +1,5 @@ - /* -- * Copyright (C) 2006 Freescale Semiconductor, Inc. -+ * Copyright (C) 2006-2009 Freescale Semiconductor, Inc. - * - * Dave Liu - * based on source code of Shlomi Gridish -@@ -47,6 +47,7 @@ - #define UPSMR_CAM 0x00000400 /* CAM Address Matching */ - #define UPSMR_BRO 0x00000200 /* Broadcast Address */ - #define UPSMR_RES1 0x00002000 /* Reserved feild - must be 1 */ -+#define UPSMR_SGMM 0x00000020 /* SGMII mode */ - - #define UPSMR_INIT_VALUE (UPSMR_HSE | UPSMR_RES1) - -@@ -621,6 +622,31 @@ typedef enum enet_tbi_mii_reg { - ENET_TBI_MII_TBICON = 0x11 - } enet_tbi_mii_reg_e; - -+/* TBI MDIO register bit fields*/ -+#define TBICON_CLK_SELECT 0x0020 -+#define TBIANA_ASYMMETRIC_PAUSE 0x0100 -+#define TBIANA_SYMMETRIC_PAUSE 0x0080 -+#define TBIANA_HALF_DUPLEX 0x0040 -+#define TBIANA_FULL_DUPLEX 0x0020 -+#define TBICR_PHY_RESET 0x8000 -+#define TBICR_ANEG_ENABLE 0x1000 -+#define TBICR_RESTART_ANEG 0x0200 -+#define TBICR_FULL_DUPLEX 0x0100 -+#define TBICR_SPEED1_SET 0x0040 -+ -+#define TBIANA_SETTINGS ( \ -+ TBIANA_ASYMMETRIC_PAUSE \ -+ | TBIANA_SYMMETRIC_PAUSE \ -+ | TBIANA_FULL_DUPLEX \ -+ ) -+ -+#define TBICR_SETTINGS ( \ -+ TBICR_PHY_RESET \ -+ | TBICR_ANEG_ENABLE \ -+ | TBICR_FULL_DUPLEX \ -+ | TBICR_SPEED1_SET \ -+ ) -+ - /* UEC number of threads - */ - typedef enum uec_num_of_threads { -@@ -645,17 +671,36 @@ typedef enum enet_interface { - ENET_1000_RGMII_ID, - ENET_1000_RGMII_RXID, - ENET_1000_TBI, -- ENET_1000_RTBI -+ ENET_1000_RTBI, -+ ENET_1000_SGMII - } enet_interface_e; - - /* UEC initialization info struct - */ -+#define STD_UEC_INFO(num) \ -+{ \ -+ .uf_info = { \ -+ .ucc_num = CONFIG_SYS_UEC##num##_UCC_NUM,\ -+ .rx_clock = CONFIG_SYS_UEC##num##_RX_CLK, \ -+ .tx_clock = CONFIG_SYS_UEC##num##_TX_CLK, \ -+ .eth_type = CONFIG_SYS_UEC##num##_ETH_TYPE,\ -+ }, \ -+ .num_threads_tx = UEC_NUM_OF_THREADS_1, \ -+ .num_threads_rx = UEC_NUM_OF_THREADS_1, \ -+ .risc_tx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, \ -+ .risc_rx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, \ -+ .tx_bd_ring_len = 16, \ -+ .rx_bd_ring_len = 16, \ -+ .phy_address = CONFIG_SYS_UEC##num##_PHY_ADDR, \ -+ .enet_interface = CONFIG_SYS_UEC##num##_INTERFACE_MODE, \ -+} -+ - typedef struct uec_info { - ucc_fast_info_t uf_info; - uec_num_of_threads_e num_threads_tx; - uec_num_of_threads_e num_threads_rx; -- qe_risc_allocation_e riscTx; -- qe_risc_allocation_e riscRx; -+ unsigned int risc_tx; -+ unsigned int risc_rx; - u16 rx_bd_ring_len; - u16 tx_bd_ring_len; - u8 phy_address; -@@ -716,4 +761,7 @@ typedef struct uec_private { - int oldlink; - } uec_private_t; - -+int uec_initialize(bd_t *bis, uec_info_t *uec_info); -+int uec_eth_init(bd_t *bis, uec_info_t *uecs, int num); -+int uec_standard_init(bd_t *bis); - #endif /* __UEC_H__ */ -diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile -index 14c818d..ab5d565 100644 ---- a/drivers/serial/Makefile -+++ b/drivers/serial/Makefile -@@ -39,11 +39,13 @@ COBJS-$(CONFIG_IMX_SERIAL) += serial_imx.o - COBJS-$(CONFIG_IXP_SERIAL) += serial_ixp.o - COBJS-$(CONFIG_KS8695_SERIAL) += serial_ks8695.o - COBJS-$(CONFIG_LPC2292_SERIAL) += serial_lpc2292.o -+COBJS-$(CONFIG_LH7A40X_SERIAL) += serial_lh7a40x.o - COBJS-$(CONFIG_MAX3100_SERIAL) += serial_max3100.o - COBJS-$(CONFIG_MX31_UART) += serial_mx31.o - COBJS-$(CONFIG_NETARM_SERIAL) += serial_netarm.o - COBJS-$(CONFIG_PL010_SERIAL) += serial_pl01x.o - COBJS-$(CONFIG_PL011_SERIAL) += serial_pl01x.o -+COBJS-$(CONFIG_PXA_SERIAL) += serial_pxa.o - COBJS-$(CONFIG_SA1100_SERIAL) += serial_sa1100.o - COBJS-$(CONFIG_S3C24X0_SERIAL) += serial_s3c24x0.o - COBJS-$(CONFIG_S3C44B0_SERIAL) += serial_s3c44b0.o -diff --git a/drivers/serial/arm_dcc.c b/drivers/serial/arm_dcc.c -index 5a7fb6b..dca73b9 100644 ---- a/drivers/serial/arm_dcc.c -+++ b/drivers/serial/arm_dcc.c -@@ -29,69 +29,66 @@ - #include - #include - --#define DCC_ARM9_RBIT (1 << 0) --#define DCC_ARM9_WBIT (1 << 1) --#define DCC_ARM11_RBIT (1 << 30) --#define DCC_ARM11_WBIT (1 << 29) -- --#define read_core_id(x) do { \ -- __asm__ ("mrc p15, 0, %0, c0, c0, 0\n" : "=r" (x)); \ -- x = (x >> 4) & 0xFFF; \ -- } while (0); -- -+#if defined(CONFIG_CPU_V6) - /* -- * ARM9 -+ * ARMV6 - */ --#define write_arm9_dcc(x) \ -- __asm__ volatile ("mcr p14, 0, %0, c1, c0, 0\n" : : "r" (x)) -- --#define read_arm9_dcc(x) \ -- __asm__ volatile ("mrc p14, 0, %0, c1, c0, 0\n" : "=r" (x)) -+#define DCC_RBIT (1 << 30) -+#define DCC_WBIT (1 << 29) - --#define status_arm9_dcc(x) \ -- __asm__ volatile ("mrc p14, 0, %0, c0, c0, 0\n" : "=r" (x)) -+#define write_dcc(x) \ -+ __asm__ volatile ("mcr p14, 0, %0, c0, c5, 0\n" : : "r" (x)) - --#define can_read_arm9_dcc(x) do { \ -- status_arm9_dcc(x); \ -- x &= DCC_ARM9_RBIT; \ -- } while (0); -+#define read_dcc(x) \ -+ __asm__ volatile ("mrc p14, 0, %0, c0, c5, 0\n" : "=r" (x)) - --#define can_write_arm9_dcc(x) do { \ -- status_arm9_dcc(x); \ -- x &= DCC_ARM9_WBIT; \ -- x = (x == 0); \ -- } while (0); -+#define status_dcc(x) \ -+ __asm__ volatile ("mrc p14, 0, %0, c0, c1, 0\n" : "=r" (x)) - -+#elif defined(CONFIG_CPU_XSCALE) - /* -- * ARM11 -+ * XSCALE - */ --#define write_arm11_dcc(x) \ -- __asm__ volatile ("mcr p14, 0, %0, c0, c5, 0\n" : : "r" (x)) -+#define DCC_RBIT (1 << 31) -+#define DCC_WBIT (1 << 28) - --#define read_arm11_dcc(x) \ -- __asm__ volatile ("mrc p14, 0, %0, c0, c5, 0\n" : "=r" (x)) -+#define write_dcc(x) \ -+ __asm__ volatile ("mcr p14, 0, %0, c8, c0, 0\n" : : "r" (x)) - --#define status_arm11_dcc(x) \ -- __asm__ volatile ("mrc p14, 0, %0, c0, c1, 0\n" : "=r" (x)) -+#define read_dcc(x) \ -+ __asm__ volatile ("mrc p14, 0, %0, c9, c0, 0\n" : "=r" (x)) -+ -+#define status_dcc(x) \ -+ __asm__ volatile ("mrc p14, 0, %0, c14, c0, 0\n" : "=r" (x)) -+ -+#else -+#define DCC_RBIT (1 << 0) -+#define DCC_WBIT (1 << 1) -+ -+#define write_dcc(x) \ -+ __asm__ volatile ("mcr p14, 0, %0, c1, c0, 0\n" : : "r" (x)) - --#define can_read_arm11_dcc(x) do { \ -- status_arm11_dcc(x); \ -- x &= DCC_ARM11_RBIT; \ -+#define read_dcc(x) \ -+ __asm__ volatile ("mrc p14, 0, %0, c1, c0, 0\n" : "=r" (x)) -+ -+#define status_dcc(x) \ -+ __asm__ volatile ("mrc p14, 0, %0, c0, c0, 0\n" : "=r" (x)) -+ -+#endif -+ -+#define can_read_dcc(x) do { \ -+ status_dcc(x); \ -+ x &= DCC_RBIT; \ - } while (0); - --#define can_write_arm11_dcc(x) do { \ -- status_arm11_dcc(x); \ -- x &= DCC_ARM11_WBIT; \ -- x = (x == 0); \ -+#define can_write_dcc(x) do { \ -+ status_dcc(x); \ -+ x &= DCC_WBIT; \ -+ x = (x == 0); \ - } while (0); - - #define TIMEOUT_COUNT 0x4000000 - --static enum { -- arm9_and_earlier, -- arm11_and_later --} arm_type = arm9_and_earlier; -- - #ifndef CONFIG_ARM_DCC_MULTI - #define arm_dcc_init serial_init - void serial_setbrg(void) {} -@@ -103,15 +100,6 @@ void serial_setbrg(void) {} - - int arm_dcc_init(void) - { -- register unsigned int id; -- -- read_core_id(id); -- -- if (id >= 0xb00) -- arm_type = arm11_and_later; -- else -- arm_type = arm9_and_earlier; -- - return 0; - } - -@@ -120,22 +108,10 @@ int arm_dcc_getc(void) - int ch; - register unsigned int reg; - -- switch (arm_type) { -- case arm11_and_later: -- do { -- can_read_arm11_dcc(reg); -- } while (!reg); -- read_arm11_dcc(ch); -- break; -- -- case arm9_and_earlier: -- default: -- do { -- can_read_arm9_dcc(reg); -- } while (!reg); -- read_arm9_dcc(ch); -- break; -- } -+ do { -+ can_read_dcc(reg); -+ } while (!reg); -+ read_dcc(ch); - - return ch; - } -@@ -145,32 +121,15 @@ void arm_dcc_putc(char ch) - register unsigned int reg; - unsigned int timeout_count = TIMEOUT_COUNT; - -- switch (arm_type) { -- case arm11_and_later: -- while (--timeout_count) { -- can_write_arm11_dcc(reg); -- if (reg) -- break; -- } -- if (timeout_count == 0) -- return; -- else -- write_arm11_dcc(ch); -- break; -- -- case arm9_and_earlier: -- default: -- while (--timeout_count) { -- can_write_arm9_dcc(reg); -- if (reg) -- break; -- } -- if (timeout_count == 0) -- return; -- else -- write_arm9_dcc(ch); -- break; -+ while (--timeout_count) { -+ can_write_dcc(reg); -+ if (reg) -+ break; - } -+ if (timeout_count == 0) -+ return; -+ else -+ write_dcc(ch); - } - - void arm_dcc_puts(const char *s) -@@ -183,15 +142,7 @@ int arm_dcc_tstc(void) - { - register unsigned int reg; - -- switch (arm_type) { -- case arm11_and_later: -- can_read_arm11_dcc(reg); -- break; -- case arm9_and_earlier: -- default: -- can_read_arm9_dcc(reg); -- break; -- } -+ can_read_dcc(reg); - - return reg; - } -@@ -214,13 +165,6 @@ int drv_arm_dcc_init(void) - arm_dcc_dev.putc = arm_dcc_putc; /* 'putc' function */ - arm_dcc_dev.puts = arm_dcc_puts; /* 'puts' function */ - -- rc = device_register(&arm_dcc_dev); -- -- if (rc == 0) { -- arm_dcc_init(); -- return 1; -- } -- -- return 0; -+ return device_register(&arm_dcc_dev); - } - #endif -diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c -index 657c9da..2fcc8c3 100644 ---- a/drivers/serial/ns16550.c -+++ b/drivers/serial/ns16550.c -@@ -17,7 +17,7 @@ - void NS16550_init (NS16550_t com_port, int baud_divisor) - { - com_port->ier = 0x00; --#ifdef CONFIG_OMAP -+#if defined(CONFIG_OMAP) && !defined(CONFIG_OMAP3_ZOOM2) - com_port->mdr1 = 0x7; /* mode select reset TL16C750*/ - #endif - com_port->lcr = UART_LCR_BKSE | UART_LCRVAL; -@@ -30,7 +30,7 @@ void NS16550_init (NS16550_t com_port, int baud_divisor) - com_port->dll = baud_divisor & 0xff; - com_port->dlm = (baud_divisor >> 8) & 0xff; - com_port->lcr = UART_LCRVAL; --#if defined(CONFIG_OMAP) -+#if defined(CONFIG_OMAP) && !defined(CONFIG_OMAP3_ZOOM2) - #if defined(CONFIG_APTIX) - com_port->mdr1 = 3; /* /13 mode so Aptix 6MHz can hit 115200 */ - #else -diff --git a/drivers/serial/serial_lh7a40x.c b/drivers/serial/serial_lh7a40x.c -new file mode 100644 -index 0000000..4767489 ---- /dev/null -+++ b/drivers/serial/serial_lh7a40x.c -@@ -0,0 +1,184 @@ -+/* -+ * (C) Copyright 2002 -+ * Gary Jennejohn, DENX Software Engineering, -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -+ * -+ */ -+ -+#include -+#include -+ -+DECLARE_GLOBAL_DATA_PTR; -+ -+#if defined(CONFIG_CONSOLE_UART1) -+# define UART_CONSOLE 1 -+#elif defined(CONFIG_CONSOLE_UART2) -+# define UART_CONSOLE 2 -+#elif defined(CONFIG_CONSOLE_UART3) -+# define UART_CONSOLE 3 -+#else -+# error "No console configured ... " -+#endif -+ -+void serial_setbrg (void) -+{ -+ lh7a40x_uart_t* uart = LH7A40X_UART_PTR(UART_CONSOLE); -+ int i; -+ unsigned int reg = 0; -+ -+ /* -+ * userguide 15.1.2.4 -+ * -+ * BAUDDIV is (UART_REF_FREQ/(16 X BAUD))-1 -+ * -+ * UART_REF_FREQ = external system clock input / 2 (Hz) -+ * BAUD is desired baudrate (bits/s) -+ * -+ * NOTE: we add (divisor/2) to numerator to round for -+ * more precision -+ */ -+ reg = (((get_PLLCLK()/2) + ((16*gd->baudrate)/2)) / (16 * gd->baudrate)) - 1; -+ uart->brcon = reg; -+ -+ for (i = 0; i < 100; i++); -+} -+ -+/* -+ * Initialise the serial port with the given baudrate. The settings -+ * are always 8 data bits, no parity, 1 stop bit, no start bits. -+ * -+ */ -+int serial_init (void) -+{ -+ lh7a40x_uart_t* uart = LH7A40X_UART_PTR(UART_CONSOLE); -+ -+ /* UART must be enabled before writing to any config registers */ -+ uart->con |= (UART_EN); -+ -+#ifdef CONFIG_CONSOLE_UART1 -+ /* infrared disabled */ -+ uart->con |= UART_SIRD; -+#endif -+ /* loopback disabled */ -+ uart->con &= ~(UART_LBE); -+ -+ /* modem lines and tx/rx polarities */ -+ uart->con &= ~(UART_MXP | UART_TXP | UART_RXP); -+ -+ /* FIFO enable, N81 */ -+ uart->fcon = (UART_WLEN_8 | UART_FEN | UART_STP2_1); -+ -+ /* set baudrate */ -+ serial_setbrg (); -+ -+ /* enable rx interrupt */ -+ uart->inten |= UART_RI; -+ -+ return (0); -+} -+ -+/* -+ * Read a single byte from the serial port. Returns 1 on success, 0 -+ * otherwise. When the function is succesfull, the character read is -+ * written into its argument c. -+ */ -+int serial_getc (void) -+{ -+ lh7a40x_uart_t* uart = LH7A40X_UART_PTR(UART_CONSOLE); -+ -+ /* wait for character to arrive */ -+ while (uart->status & UART_RXFE); -+ -+ return(uart->data & 0xff); -+} -+ -+#ifdef CONFIG_HWFLOW -+static int hwflow = 0; /* turned off by default */ -+int hwflow_onoff(int on) -+{ -+ switch(on) { -+ case 0: -+ default: -+ break; /* return current */ -+ case 1: -+ hwflow = 1; /* turn on */ -+ break; -+ case -1: -+ hwflow = 0; /* turn off */ -+ break; -+ } -+ return hwflow; -+} -+#endif -+ -+#ifdef CONFIG_MODEM_SUPPORT -+static int be_quiet = 0; -+void disable_putc(void) -+{ -+ be_quiet = 1; -+} -+ -+void enable_putc(void) -+{ -+ be_quiet = 0; -+} -+#endif -+ -+ -+/* -+ * Output a single byte to the serial port. -+ */ -+void serial_putc (const char c) -+{ -+ lh7a40x_uart_t* uart = LH7A40X_UART_PTR(UART_CONSOLE); -+ -+#ifdef CONFIG_MODEM_SUPPORT -+ if (be_quiet) -+ return; -+#endif -+ -+ /* wait for room in the tx FIFO */ -+ while (!(uart->status & UART_TXFE)); -+ -+#ifdef CONFIG_HWFLOW -+ /* Wait for CTS up */ -+ while(hwflow && !(uart->status & UART_CTS)); -+#endif -+ -+ uart->data = c; -+ -+ /* If \n, also do \r */ -+ if (c == '\n') -+ serial_putc ('\r'); -+} -+ -+/* -+ * Test whether a character is in the RX buffer -+ */ -+int serial_tstc (void) -+{ -+ lh7a40x_uart_t* uart = LH7A40X_UART_PTR(UART_CONSOLE); -+ -+ return(!(uart->status & UART_RXFE)); -+} -+ -+void -+serial_puts (const char *s) -+{ -+ while (*s) { -+ serial_putc (*s++); -+ } -+} -diff --git a/drivers/serial/serial_pxa.c b/drivers/serial/serial_pxa.c -new file mode 100644 -index 0000000..9ba457e ---- /dev/null -+++ b/drivers/serial/serial_pxa.c -@@ -0,0 +1,385 @@ -+/* -+ * (C) Copyright 2002 -+ * Wolfgang Denk, DENX Software Engineering, -+ * -+ * (C) Copyright 2002 -+ * Sysgo Real-Time Solutions, GmbH -+ * Marius Groeger -+ * -+ * (C) Copyright 2002 -+ * Sysgo Real-Time Solutions, GmbH -+ * Alex Zuepke -+ * -+ * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+ -+DECLARE_GLOBAL_DATA_PTR; -+ -+#define FFUART_INDEX 0 -+#define BTUART_INDEX 1 -+#define STUART_INDEX 2 -+ -+#ifndef CONFIG_SERIAL_MULTI -+#if defined (CONFIG_FFUART) -+#define UART_INDEX FFUART_INDEX -+#elif defined (CONFIG_BTUART) -+#define UART_INDEX BTUART_INDEX -+#elif defined (CONFIG_STUART) -+#define UART_INDEX STUART_INDEX -+#else -+#error "Bad: you didn't configure serial ..." -+#endif -+#endif -+ -+void pxa_setbrg_dev (unsigned int uart_index) -+{ -+ unsigned int quot = 0; -+ -+ if (gd->baudrate == 1200) -+ quot = 768; -+ else if (gd->baudrate == 9600) -+ quot = 96; -+ else if (gd->baudrate == 19200) -+ quot = 48; -+ else if (gd->baudrate == 38400) -+ quot = 24; -+ else if (gd->baudrate == 57600) -+ quot = 16; -+ else if (gd->baudrate == 115200) -+ quot = 8; -+ else -+ hang (); -+ -+ switch (uart_index) { -+ case FFUART_INDEX: -+#ifdef CONFIG_CPU_MONAHANS -+ CKENA |= CKENA_22_FFUART; -+#else -+ CKEN |= CKEN6_FFUART; -+#endif /* CONFIG_CPU_MONAHANS */ -+ -+ FFIER = 0; /* Disable for now */ -+ FFFCR = 0; /* No fifos enabled */ -+ -+ /* set baud rate */ -+ FFLCR = LCR_WLS0 | LCR_WLS1 | LCR_DLAB; -+ FFDLL = quot & 0xff; -+ FFDLH = quot >> 8; -+ FFLCR = LCR_WLS0 | LCR_WLS1; -+ -+ FFIER = IER_UUE; /* Enable FFUART */ -+ break; -+ -+ case BTUART_INDEX: -+#ifdef CONFIG_CPU_MONAHANS -+ CKENA |= CKENA_21_BTUART; -+#else -+ CKEN |= CKEN7_BTUART; -+#endif /* CONFIG_CPU_MONAHANS */ -+ -+ BTIER = 0; -+ BTFCR = 0; -+ -+ /* set baud rate */ -+ BTLCR = LCR_DLAB; -+ BTDLL = quot & 0xff; -+ BTDLH = quot >> 8; -+ BTLCR = LCR_WLS0 | LCR_WLS1; -+ -+ BTIER = IER_UUE; /* Enable BFUART */ -+ -+ break; -+ -+ case STUART_INDEX: -+#ifdef CONFIG_CPU_MONAHANS -+ CKENA |= CKENA_23_STUART; -+#else -+ CKEN |= CKEN5_STUART; -+#endif /* CONFIG_CPU_MONAHANS */ -+ -+ STIER = 0; -+ STFCR = 0; -+ -+ /* set baud rate */ -+ STLCR = LCR_DLAB; -+ STDLL = quot & 0xff; -+ STDLH = quot >> 8; -+ STLCR = LCR_WLS0 | LCR_WLS1; -+ -+ STIER = IER_UUE; /* Enable STUART */ -+ break; -+ -+ default: -+ hang(); -+ } -+} -+ -+ -+/* -+ * Initialise the serial port with the given baudrate. The settings -+ * are always 8 data bits, no parity, 1 stop bit, no start bits. -+ * -+ */ -+int pxa_init_dev (unsigned int uart_index) -+{ -+ pxa_setbrg_dev (uart_index); -+ -+ return (0); -+} -+ -+ -+/* -+ * Output a single byte to the serial port. -+ */ -+void pxa_putc_dev (unsigned int uart_index,const char c) -+{ -+ switch (uart_index) { -+ case FFUART_INDEX: -+ /* wait for room in the tx FIFO on FFUART */ -+ while ((FFLSR & LSR_TEMT) == 0) -+ WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ -+ FFTHR = c; -+ break; -+ -+ case BTUART_INDEX: -+ while ((BTLSR & LSR_TEMT ) == 0 ) -+ WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ -+ BTTHR = c; -+ break; -+ -+ case STUART_INDEX: -+ while ((STLSR & LSR_TEMT ) == 0 ) -+ WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ -+ STTHR = c; -+ break; -+ } -+ -+ /* If \n, also do \r */ -+ if (c == '\n') -+ pxa_putc_dev (uart_index,'\r'); -+} -+ -+/* -+ * Read a single byte from the serial port. Returns 1 on success, 0 -+ * otherwise. When the function is succesfull, the character read is -+ * written into its argument c. -+ */ -+int pxa_tstc_dev (unsigned int uart_index) -+{ -+ switch (uart_index) { -+ case FFUART_INDEX: -+ return FFLSR & LSR_DR; -+ case BTUART_INDEX: -+ return BTLSR & LSR_DR; -+ case STUART_INDEX: -+ return STLSR & LSR_DR; -+ } -+ return -1; -+} -+ -+/* -+ * Read a single byte from the serial port. Returns 1 on success, 0 -+ * otherwise. When the function is succesfull, the character read is -+ * written into its argument c. -+ */ -+int pxa_getc_dev (unsigned int uart_index) -+{ -+ switch (uart_index) { -+ case FFUART_INDEX: -+ while (!(FFLSR & LSR_DR)) -+ WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ -+ return (char) FFRBR & 0xff; -+ -+ case BTUART_INDEX: -+ while (!(BTLSR & LSR_DR)) -+ WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ -+ return (char) BTRBR & 0xff; -+ case STUART_INDEX: -+ while (!(STLSR & LSR_DR)) -+ WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ -+ return (char) STRBR & 0xff; -+ } -+ return -1; -+} -+ -+void -+pxa_puts_dev (unsigned int uart_index,const char *s) -+{ -+ while (*s) { -+ pxa_putc_dev (uart_index,*s++); -+ } -+} -+ -+#if defined (CONFIG_FFUART) -+static int ffuart_init(void) -+{ -+ return pxa_init_dev(FFUART_INDEX); -+} -+ -+static void ffuart_setbrg(void) -+{ -+ return pxa_setbrg_dev(FFUART_INDEX); -+} -+ -+static void ffuart_putc(const char c) -+{ -+ return pxa_putc_dev(FFUART_INDEX,c); -+} -+ -+static void ffuart_puts(const char *s) -+{ -+ return pxa_puts_dev(FFUART_INDEX,s); -+} -+ -+static int ffuart_getc(void) -+{ -+ return pxa_getc_dev(FFUART_INDEX); -+} -+ -+static int ffuart_tstc(void) -+{ -+ return pxa_tstc_dev(FFUART_INDEX); -+} -+ -+struct serial_device serial_ffuart_device = -+{ -+ "serial_ffuart", -+ "PXA", -+ ffuart_init, -+ ffuart_setbrg, -+ ffuart_getc, -+ ffuart_tstc, -+ ffuart_putc, -+ ffuart_puts, -+}; -+#endif -+ -+#if defined (CONFIG_BTUART) -+static int btuart_init(void) -+{ -+ return pxa_init_dev(BTUART_INDEX); -+} -+ -+static void btuart_setbrg(void) -+{ -+ return pxa_setbrg_dev(BTUART_INDEX); -+} -+ -+static void btuart_putc(const char c) -+{ -+ return pxa_putc_dev(BTUART_INDEX,c); -+} -+ -+static void btuart_puts(const char *s) -+{ -+ return pxa_puts_dev(BTUART_INDEX,s); -+} -+ -+static int btuart_getc(void) -+{ -+ return pxa_getc_dev(BTUART_INDEX); -+} -+ -+static int btuart_tstc(void) -+{ -+ return pxa_tstc_dev(BTUART_INDEX); -+} -+ -+struct serial_device serial_btuart_device = -+{ -+ "serial_btuart", -+ "PXA", -+ btuart_init, -+ btuart_setbrg, -+ btuart_getc, -+ btuart_tstc, -+ btuart_putc, -+ btuart_puts, -+}; -+#endif -+ -+#if defined (CONFIG_STUART) -+static int stuart_init(void) -+{ -+ return pxa_init_dev(STUART_INDEX); -+} -+ -+static void stuart_setbrg(void) -+{ -+ return pxa_setbrg_dev(STUART_INDEX); -+} -+ -+static void stuart_putc(const char c) -+{ -+ return pxa_putc_dev(STUART_INDEX,c); -+} -+ -+static void stuart_puts(const char *s) -+{ -+ return pxa_puts_dev(STUART_INDEX,s); -+} -+ -+static int stuart_getc(void) -+{ -+ return pxa_getc_dev(STUART_INDEX); -+} -+ -+static int stuart_tstc(void) -+{ -+ return pxa_tstc_dev(STUART_INDEX); -+} -+ -+struct serial_device serial_stuart_device = -+{ -+ "serial_stuart", -+ "PXA", -+ stuart_init, -+ stuart_setbrg, -+ stuart_getc, -+ stuart_tstc, -+ stuart_putc, -+ stuart_puts, -+}; -+#endif -+ -+ -+#ifndef CONFIG_SERIAL_MULTI -+inline int serial_init(void) { -+ return (pxa_init_dev(UART_INDEX)); -+} -+void serial_setbrg(void) { -+ pxa_setbrg_dev(UART_INDEX); -+} -+int serial_getc(void) { -+ return(pxa_getc_dev(UART_INDEX)); -+} -+int serial_tstc(void) { -+ return(pxa_tstc_dev(UART_INDEX)); -+} -+void serial_putc(const char c) { -+ pxa_putc_dev(UART_INDEX,c); -+} -+void serial_puts(const char *s) { -+ pxa_puts_dev(UART_INDEX,s); -+} -+#endif /* CONFIG_SERIAL_MULTI */ -diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c -index 86ee1d5..bf148c4 100644 ---- a/drivers/usb/host/ehci-fsl.c -+++ b/drivers/usb/host/ehci-fsl.c -@@ -1,4 +1,6 @@ - /* -+ * (C) Copyright 2009 Freescale Semiconductor, Inc. -+ * - * (C) Copyright 2008, Excito Elektronik i Sk=E5ne AB - * - * Author: Tor Krill tor@excito.com -@@ -22,12 +24,10 @@ - #include - #include - #include --#include - #include --#include -+#include - - #include "ehci.h" --#include "ehci-fsl.h" - #include "ehci-core.h" - - /* -@@ -38,54 +38,33 @@ - */ - int ehci_hcd_init(void) - { -- volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; -- uint32_t addr, temp; -+ struct usb_ehci *ehci; - -- addr = (uint32_t)&(im->usb[0]); -- hccr = (struct ehci_hccr *)(addr + FSL_SKIP_PCI); -+ ehci = (struct usb_ehci *)CONFIG_SYS_MPC8xxx_USB_ADDR; -+ hccr = (struct ehci_hccr *)((uint32_t)ehci->caplength); - hcor = (struct ehci_hcor *)((uint32_t) hccr + - HC_LENGTH(ehci_readl(&hccr->cr_capbase))); - -- /* Configure clock */ -- clrsetbits_be32(&(im->clk.sccr), MPC83XX_SCCR_USB_MASK, -- MPC83XX_SCCR_USB_DRCM_11); -- -- /* Confgure interface. */ -- temp = in_be32((void *)(addr + FSL_SOC_USB_CTRL)); -- out_be32((void *)(addr + FSL_SOC_USB_CTRL), temp -- | REFSEL_16MHZ | UTMI_PHY_EN); -- -- /* Wait for clock to stabilize */ -- do { -- temp = in_be32((void *)(addr + FSL_SOC_USB_CTRL)); -- udelay(1000); -- } while (!(temp & PHY_CLK_VALID)); -- - /* Set to Host mode */ -- temp = in_le32((void *)(addr + FSL_SOC_USB_USBMODE)); -- out_le32((void *)(addr + FSL_SOC_USB_USBMODE), temp | CM_HOST); -+ setbits_le32((void *)ehci->usbmode, CM_HOST); - -- out_be32((void *)(addr + FSL_SOC_USB_SNOOP1), SNOOP_SIZE_2GB); -- out_be32((void *)(addr + FSL_SOC_USB_SNOOP2), -- 0x80000000 | SNOOP_SIZE_2GB); -+ out_be32((void *)ehci->snoop1, SNOOP_SIZE_2GB); -+ out_be32((void *)ehci->snoop2, 0x80000000 | SNOOP_SIZE_2GB); - - /* Init phy */ -- /* TODO: handle different phys? */ -- out_le32(&(hcor->or_portsc[0]), PORT_PTS_UTMI); -+ if (!strcmp(getenv("usb_phy_type"), "utmi")) -+ out_le32(&(hcor->or_portsc[0]), PORT_PTS_UTMI); -+ else -+ out_le32(&(hcor->or_portsc[0]), PORT_PTS_ULPI); - - /* Enable interface. */ -- temp = in_be32((void *)(addr + FSL_SOC_USB_CTRL)); -- out_be32((void *)(addr + FSL_SOC_USB_CTRL), temp | USB_EN); -- -- out_be32((void *)(addr + FSL_SOC_USB_PRICTRL), 0x0000000c); -- out_be32((void *)(addr + FSL_SOC_USB_AGECNTTHRSH), 0x00000040); -- out_be32((void *)(addr + FSL_SOC_USB_SICTRL), 0x00000001); -+ setbits_be32((void *)ehci->control, USB_EN); - -- /* Enable interface. */ -- temp = in_be32((void *)(addr + FSL_SOC_USB_CTRL)); -- out_be32((void *)(addr + FSL_SOC_USB_CTRL), temp | USB_EN); -+ out_be32((void *)ehci->prictrl, 0x0000000c); -+ out_be32((void *)ehci->age_cnt_limit, 0x00000040); -+ out_be32((void *)ehci->sictrl, 0x00000001); - -- temp = in_le32((void *)(addr + FSL_SOC_USB_USBMODE)); -+ in_le32((void *)ehci->usbmode); - - return 0; - } -diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h -deleted file mode 100644 -index c429af1..0000000 ---- a/drivers/usb/host/ehci-fsl.h -+++ /dev/null -@@ -1,86 +0,0 @@ --/* -- * Copyright (c) 2005 freescale semiconductor -- * Copyright (c) 2005 MontaVista Software -- * Copyright (c) 2008 Excito Elektronik i Sk=E5ne AB -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --#ifndef _EHCI_FSL_H --#define _EHCI_FSL_H -- --/* Global offsets */ --#define FSL_SKIP_PCI 0x100 -- --/* offsets for the non-ehci registers in the FSL SOC USB controller */ --#define FSL_SOC_USB_ULPIVP 0x170 --#define FSL_SOC_USB_PORTSC1 0x184 --#define PORT_PTS_MSK (3 << 30) --#define PORT_PTS_UTMI (0 << 30) --#define PORT_PTS_ULPI (2 << 30) --#define PORT_PTS_SERIAL (3 << 30) --#define PORT_PTS_PTW (1 << 28) -- --/* USBMODE Register bits */ --#define CM_IDLE (0 << 0) --#define CM_RESERVED (1 << 0) --#define CM_DEVICE (2 << 0) --#define CM_HOST (3 << 0) --#define USBMODE_RESERVED_2 (0 << 2) --#define SLOM (1 << 3) --#define SDIS (1 << 4) -- --/* CONTROL Register bits */ --#define ULPI_INT_EN (1 << 0) --#define WU_INT_EN (1 << 1) --#define USB_EN (1 << 2) --#define LSF_EN (1 << 3) --#define KEEP_OTG_ON (1 << 4) --#define OTG_PORT (1 << 5) --#define REFSEL_12MHZ (0 << 6) --#define REFSEL_16MHZ (1 << 6) --#define REFSEL_48MHZ (2 << 6) --#define PLL_RESET (1 << 8) --#define UTMI_PHY_EN (1 << 9) --#define PHY_CLK_SEL_UTMI (0 << 10) --#define PHY_CLK_SEL_ULPI (1 << 10) --#define CLKIN_SEL_USB_CLK (0 << 11) --#define CLKIN_SEL_USB_CLK2 (1 << 11) --#define CLKIN_SEL_SYS_CLK (2 << 11) --#define CLKIN_SEL_SYS_CLK2 (3 << 11) --#define RESERVED_18 (0 << 13) --#define RESERVED_17 (0 << 14) --#define RESERVED_16 (0 << 15) --#define WU_INT (1 << 16) --#define PHY_CLK_VALID (1 << 17) -- --#define FSL_SOC_USB_PORTSC2 0x188 --#define FSL_SOC_USB_USBMODE 0x1a8 --#define FSL_SOC_USB_SNOOP1 0x400 /* NOTE: big-endian */ --#define FSL_SOC_USB_SNOOP2 0x404 /* NOTE: big-endian */ --#define FSL_SOC_USB_AGECNTTHRSH 0x408 /* NOTE: big-endian */ --#define FSL_SOC_USB_PRICTRL 0x40c /* NOTE: big-endian */ --#define FSL_SOC_USB_SICTRL 0x410 /* NOTE: big-endian */ --#define FSL_SOC_USB_CTRL 0x500 /* NOTE: big-endian */ --#define SNOOP_SIZE_2GB 0x1e -- --/* System Clock Control Register */ --#define MPC83XX_SCCR_USB_MASK 0x00f00000 --#define MPC83XX_SCCR_USB_DRCM_11 0x00300000 --#define MPC83XX_SCCR_USB_DRCM_01 0x00100000 --#define MPC83XX_SCCR_USB_DRCM_10 0x00200000 -- --#endif /* _EHCI_FSL_H */ -diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c -index 5ee2314..bcafb27 100644 ---- a/drivers/video/cfb_console.c -+++ b/drivers/video/cfb_console.c -@@ -1330,53 +1330,57 @@ static int video_init (void) - - /*****************************************************************************/ - -+/* -+ * Implement a weak default function for boards that optionally -+ * need to skip the video initialization. -+ */ -+int __board_video_skip(void) -+{ -+ /* As default, don't skip test */ -+ return 0; -+} -+int board_video_skip(void) __attribute__((weak, alias("__board_video_skip"))); -+ - int drv_video_init (void) - { - int skip_dev_init; - device_t console_dev; - -- skip_dev_init = 0; -+ /* Check if video initialization should be skipped */ -+ if (board_video_skip()) -+ return 0; - - /* Init video chip - returns with framebuffer cleared */ -- if (video_init () == -1) -- skip_dev_init = 1; -+ skip_dev_init = (video_init () == -1); - --#ifdef CONFIG_VGA_AS_SINGLE_DEVICE -- /* Devices VGA and Keyboard will be assigned seperately */ -- /* Init vga device */ -- if (!skip_dev_init) { -- memset (&console_dev, 0, sizeof (console_dev)); -- strcpy (console_dev.name, "vga"); -- console_dev.ext = DEV_EXT_VIDEO; /* Video extensions */ -- console_dev.flags = DEV_FLAGS_OUTPUT | DEV_FLAGS_SYSTEM; -- console_dev.putc = video_putc; /* 'putc' function */ -- console_dev.puts = video_puts; /* 'puts' function */ -- console_dev.tstc = NULL; /* 'tstc' function */ -- console_dev.getc = NULL; /* 'getc' function */ -- -- if (device_register (&console_dev) == 0) -- return 1; -- } --#else -+#if !defined(CONFIG_VGA_AS_SINGLE_DEVICE) - PRINTD ("KBD: Keyboard init ...\n"); -- if (VIDEO_KBD_INIT_FCT == -1) -- skip_dev_init = 1; -- -- /* Init console device */ -- if (!skip_dev_init) { -- memset (&console_dev, 0, sizeof (console_dev)); -- strcpy (console_dev.name, "vga"); -- console_dev.ext = DEV_EXT_VIDEO; /* Video extensions */ -- console_dev.flags = DEV_FLAGS_OUTPUT | DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM; -- console_dev.putc = video_putc; /* 'putc' function */ -- console_dev.puts = video_puts; /* 'puts' function */ -- console_dev.tstc = VIDEO_TSTC_FCT; /* 'tstc' function */ -- console_dev.getc = VIDEO_GETC_FCT; /* 'getc' function */ -- -- if (device_register (&console_dev) == 0) -- return 1; -- } -+ skip_dev_init |= (VIDEO_KBD_INIT_FCT == -1); -+#endif -+ -+ if (skip_dev_init) -+ return 0; -+ -+ /* Init vga device */ -+ memset (&console_dev, 0, sizeof (console_dev)); -+ strcpy (console_dev.name, "vga"); -+ console_dev.ext = DEV_EXT_VIDEO; /* Video extensions */ -+ console_dev.flags = DEV_FLAGS_OUTPUT | DEV_FLAGS_SYSTEM; -+ console_dev.putc = video_putc; /* 'putc' function */ -+ console_dev.puts = video_puts; /* 'puts' function */ -+ console_dev.tstc = NULL; /* 'tstc' function */ -+ console_dev.getc = NULL; /* 'getc' function */ -+ -+#if !defined(CONFIG_VGA_AS_SINGLE_DEVICE) -+ /* Also init console device */ -+ console_dev.flags |= DEV_FLAGS_INPUT; -+ console_dev.tstc = VIDEO_TSTC_FCT; /* 'tstc' function */ -+ console_dev.getc = VIDEO_GETC_FCT; /* 'getc' function */ - #endif /* CONFIG_VGA_AS_SINGLE_DEVICE */ -- /* No console dev available */ -- return 0; -+ -+ if (device_register (&console_dev) != 0) -+ return 0; -+ -+ /* Return success */ -+ return 1; - } diff --git a/examples/mips.lds b/examples/mips.lds index 717b201..22478c6 100644 --- a/examples/mips.lds @@ -52517,2190 +8701,6 @@ index 717b201..22478c6 100644 OUTPUT_ARCH(mips) SECTIONS { -diff --git a/fs/fat/fat.c b/fs/fat/fat.c -index 602edae..2445f1e 100644 ---- a/fs/fat/fat.c -+++ b/fs/fat/fat.c -@@ -140,28 +140,6 @@ dirdelim(char *str) - return -1; - } - -- --/* -- * Match volume_info fs_type strings. -- * Return 0 on match, -1 otherwise. -- */ --static int --compare_sign(char *str1, char *str2) --{ -- char *end = str1+SIGNLEN; -- -- while (str1 != end) { -- if (*str1 != *str2) { -- return -1; -- } -- str1++; -- str2++; -- } -- -- return 0; --} -- -- - /* - * Extract zero terminated short name from a directory entry. - */ -@@ -673,7 +651,6 @@ read_bootsectandvi(boot_sector *bs, volume_info *volinfo, int *fatsize) - { - __u8 block[FS_BLOCK_SIZE]; - volume_info *vistart; -- char *fstype; - - if (disk_read(0, 1, block) < 0) { - FAT_DPRINT("Error: reading block\n"); -@@ -706,23 +683,16 @@ read_bootsectandvi(boot_sector *bs, volume_info *volinfo, int *fatsize) - } - memcpy(volinfo, vistart, sizeof(volume_info)); - -- /* -- * Terminate fs_type string. Writing past the end of vistart -- * is ok - it's just the buffer. -- */ -- fstype = vistart->fs_type; -- fstype[8] = '\0'; -- - if (*fatsize == 32) { -- if (compare_sign(FAT32_SIGN, vistart->fs_type) == 0) { -+ if (strncmp(FAT32_SIGN, vistart->fs_type, SIGNLEN) == 0) { - return 0; - } - } else { -- if (compare_sign(FAT12_SIGN, vistart->fs_type) == 0) { -+ if (strncmp(FAT12_SIGN, vistart->fs_type, SIGNLEN) == 0) { - *fatsize = 12; - return 0; - } -- if (compare_sign(FAT16_SIGN, vistart->fs_type) == 0) { -+ if (strncmp(FAT16_SIGN, vistart->fs_type, SIGNLEN) == 0) { - *fatsize = 16; - return 0; - } -diff --git a/include/arm920t.h b/include/arm920t.h -deleted file mode 100644 -index 95f3323..0000000 ---- a/include/arm920t.h -+++ /dev/null -@@ -1,12 +0,0 @@ --/************************************************ -- * NAME : arm920t.h -- * Version : 30 April 2002 * -- * -- * empty for now -- ************************************************/ -- --#ifndef __ARM920T_H__ --#define __ARM920T_H__ -- -- --#endif /*__ARM920T_H__*/ -diff --git a/include/arm926ejs.h b/include/arm926ejs.h -deleted file mode 100644 -index c660265..0000000 ---- a/include/arm926ejs.h -+++ /dev/null -@@ -1,8 +0,0 @@ --/************************************************ -- * NAME arm926ejs.h * -- * Version : 23 June 2003 * -- ************************************************/ --/* Currently empty */ --#ifndef __ARM926EJS_H__ --#define __ARM926EJS_H__ --#endif /*__ARM926EJS_H__*/ -diff --git a/include/arm946es.h b/include/arm946es.h -deleted file mode 100644 -index c23f3e7..0000000 ---- a/include/arm946es.h -+++ /dev/null -@@ -1,8 +0,0 @@ --/************************************************ -- * NAME arm946es.h * -- * $Version$ * -- ************************************************/ --/* Currently empty */ --#ifndef __ARM946ES_H__ --#define __ARM946ES_H__ --#endif /*__ARM946ES_H__*/ -diff --git a/include/asm-arm/arch-at91/at91cap9.h b/include/asm-arm/arch-at91/at91cap9.h -index 0b52228..b128ac5 100644 ---- a/include/asm-arm/arch-at91/at91cap9.h -+++ b/include/asm-arm/arch-at91/at91cap9.h -@@ -134,4 +134,9 @@ - - #define CONFIG_DRAM_BASE AT91_CHIPSELECT_6 - -+/* -+ * Cpu Name -+ */ -+#define AT91_CPU_NAME "AT91CAP9" -+ - #endif -diff --git a/include/asm-arm/arch-at91/at91sam9260.h b/include/asm-arm/arch-at91/at91sam9260.h -index 920a7f3..73975f4 100644 ---- a/include/asm-arm/arch-at91/at91sam9260.h -+++ b/include/asm-arm/arch-at91/at91sam9260.h -@@ -121,4 +121,13 @@ - #define AT91SAM9XE_FLASH_BASE 0x00200000 /* Internal FLASH base address */ - #define AT91SAM9XE_SRAM_BASE 0x00300000 /* Internal SRAM base address */ - -+/* -+ * Cpu Name -+ */ -+#if defined(CONFIG_AT91SAM9260) -+#define AT91_CPU_NAME "AT91SAM9260" -+#elif defined(CONFIG_AT91SAM9G20) -+#define AT91_CPU_NAME "AT91SAM9G20" -+#endif -+ - #endif -diff --git a/include/asm-arm/arch-at91/at91sam9261.h b/include/asm-arm/arch-at91/at91sam9261.h -index 752d81d..b303e07 100644 ---- a/include/asm-arm/arch-at91/at91sam9261.h -+++ b/include/asm-arm/arch-at91/at91sam9261.h -@@ -101,5 +101,9 @@ - #define AT91SAM9261_UHP_BASE 0x00500000 /* USB Host controller */ - #define AT91SAM9261_LCDC_BASE 0x00600000 /* LDC controller */ - -+/* -+ * Cpu Name -+ */ -+#define AT91_CPU_NAME "AT91SAM9261" - - #endif -diff --git a/include/asm-arm/arch-at91/at91sam9263.h b/include/asm-arm/arch-at91/at91sam9263.h -index 07b265f..966a683 100644 ---- a/include/asm-arm/arch-at91/at91sam9263.h -+++ b/include/asm-arm/arch-at91/at91sam9263.h -@@ -124,5 +124,9 @@ - #define AT91SAM9263_DMAC_BASE 0x00800000 /* DMA Controller */ - #define AT91SAM9263_UHP_BASE 0x00a00000 /* USB Host controller */ - -+/* -+ * Cpu Name -+ */ -+#define AT91_CPU_NAME "AT91SAM9263" - - #endif -diff --git a/include/asm-arm/arch-at91/at91sam9rl.h b/include/asm-arm/arch-at91/at91sam9rl.h -index 215bbc8..4dd8037 100644 ---- a/include/asm-arm/arch-at91/at91sam9rl.h -+++ b/include/asm-arm/arch-at91/at91sam9rl.h -@@ -112,4 +112,9 @@ - #define AT91SAM9RL_LCDC_BASE 0x00500000 /* LCD Controller */ - #define AT91SAM9RL_UDPHS_BASE 0x00600000 /* USB Device HS controller */ - -+/* -+ * Cpu Name -+ */ -+#define AT91_CPU_NAME "AT91SAM9RL" -+ - #endif -diff --git a/include/asm-arm/arch-davinci/hardware.h b/include/asm-arm/arch-davinci/hardware.h -index ebcdcfe..313b3f3 100644 ---- a/include/asm-arm/arch-davinci/hardware.h -+++ b/include/asm-arm/arch-davinci/hardware.h -@@ -44,13 +44,16 @@ typedef volatile unsigned int * dv_reg_p; - - /* - * Base register addresses -+ * -+ * NOTE: some of these DM6446-specific addresses DO NOT WORK -+ * on other DaVinci chips. Double check them before you try -+ * using the addresses ... or PSC module identifiers, etc. - */ - #define DAVINCI_DMA_3PCC_BASE (0x01c00000) - #define DAVINCI_DMA_3PTC0_BASE (0x01c10000) - #define DAVINCI_DMA_3PTC1_BASE (0x01c10400) - #define DAVINCI_UART0_BASE (0x01c20000) - #define DAVINCI_UART1_BASE (0x01c20400) --#define DAVINCI_UART2_BASE (0x01c20800) - #define DAVINCI_I2C_BASE (0x01c21000) - #define DAVINCI_TIMER0_BASE (0x01c21400) - #define DAVINCI_TIMER1_BASE (0x01c21800) -@@ -62,30 +65,47 @@ typedef volatile unsigned int * dv_reg_p; - #define DAVINCI_PLL_CNTRL0_BASE (0x01c40800) - #define DAVINCI_PLL_CNTRL1_BASE (0x01c40c00) - #define DAVINCI_PWR_SLEEP_CNTRL_BASE (0x01c41000) --#define DAVINCI_SYSTEM_DFT_BASE (0x01c42000) - #define DAVINCI_ARM_INTC_BASE (0x01c48000) --#define DAVINCI_IEEE1394_BASE (0x01c60000) - #define DAVINCI_USB_OTG_BASE (0x01c64000) - #define DAVINCI_CFC_ATA_BASE (0x01c66000) - #define DAVINCI_SPI_BASE (0x01c66800) - #define DAVINCI_GPIO_BASE (0x01c67000) --#define DAVINCI_UHPI_BASE (0x01c67800) - #define DAVINCI_VPSS_REGS_BASE (0x01c70000) --#define DAVINCI_EMAC_CNTRL_REGS_BASE (0x01c80000) --#define DAVINCI_EMAC_WRAPPER_CNTRL_REGS_BASE (0x01c81000) --#define DAVINCI_EMAC_WRAPPER_RAM_BASE (0x01c82000) --#define DAVINCI_MDIO_CNTRL_REGS_BASE (0x01c84000) --#define DAVINCI_IMCOP_BASE (0x01cc0000) --#define DAVINCI_ASYNC_EMIF_CNTRL_BASE (0x01e00000) --#define DAVINCI_VLYNQ_BASE (0x01e01000) --#define DAVINCI_MCBSP_BASE (0x01e02000) --#define DAVINCI_MMC_SD_BASE (0x01e10000) --#define DAVINCI_MS_BASE (0x01e20000) - #define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE (0x02000000) - #define DAVINCI_ASYNC_EMIF_DATA_CE1_BASE (0x04000000) - #define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE (0x06000000) - #define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE (0x08000000) --#define DAVINCI_VLYNQ_REMOTE_BASE (0x0c000000) -+#define DAVINCI_DDR_BASE (0x80000000) -+ -+#ifdef CONFIG_SOC_DM644X -+#define DAVINCI_UART2_BASE 0x01c20800 -+#define DAVINCI_UHPI_BASE 0x01c67800 -+#define DAVINCI_EMAC_CNTRL_REGS_BASE 0x01c80000 -+#define DAVINCI_EMAC_WRAPPER_CNTRL_REGS_BASE 0x01c81000 -+#define DAVINCI_EMAC_WRAPPER_RAM_BASE 0x01c82000 -+#define DAVINCI_MDIO_CNTRL_REGS_BASE 0x01c84000 -+#define DAVINCI_IMCOP_BASE 0x01cc0000 -+#define DAVINCI_ASYNC_EMIF_CNTRL_BASE 0x01e00000 -+#define DAVINCI_VLYNQ_BASE 0x01e01000 -+#define DAVINCI_ASP_BASE 0x01e02000 -+#define DAVINCI_MMC_SD_BASE 0x01e10000 -+#define DAVINCI_MS_BASE 0x01e20000 -+#define DAVINCI_VLYNQ_REMOTE_BASE 0x0c000000 -+ -+#elif defined(CONFIG_SOC_DM355) -+#define DAVINCI_MMC_SD1_BASE 0x01e00000 -+#define DAVINCI_ASP0_BASE 0x01e02000 -+#define DAVINCI_ASP1_BASE 0x01e04000 -+#define DAVINCI_UART2_BASE 0x01e06000 -+#define DAVINCI_ASYNC_EMIF_CNTRL_BASE 0x01e10000 -+#define DAVINCI_MMC_SD0_BASE 0x01e11000 -+ -+#elif defined(CONFIG_SOC_DM365) -+#define DAVINCI_MMC_SD1_BASE 0x01d00000 -+#define DAVINCI_ASYNC_EMIF_CNTRL_BASE 0x01d10000 -+#define DAVINCI_MMC_SD0_BASE 0x01d11000 -+ -+#endif - - /* Power and Sleep Controller (PSC) Domains */ - #define DAVINCI_GPSC_ARMDOMAIN 0 -@@ -133,6 +153,14 @@ typedef volatile unsigned int * dv_reg_p; - #define DAVINCI_LPSC_GEM 39 - #define DAVINCI_LPSC_IMCOP 40 - -+void lpsc_on(unsigned int id); -+void dsp_on(void); -+ -+void davinci_enable_uart0(void); -+void davinci_enable_emac(void); -+void davinci_enable_i2c(void); -+void davinci_errata_workarounds(void); -+ - /* Some PSC defines */ - #define PSC_CHP_SHRTSW (0x01c40038) - #define PSC_GBLCTL (0x01c41010) -@@ -153,14 +181,16 @@ typedef volatile unsigned int * dv_reg_p; - - #define PSC_SILVER_BULLET (0x01c41a20) - --/* Some PLL defines */ --#define PLL1_PLLM (0x01c40910) --#define PLL2_PLLM (0x01c40d10) --#define PLL2_DIV2 (0x01c40d1c) -- - /* Miscellania... */ - #define VBPR (0x20000020) --#define PINMUX0 (0x01c40000) --#define PINMUX1 (0x01c40004) -+ -+/* NOTE: system control modules are *highly* chip-specific, both -+ * as to register content (e.g. for muxing) and which registers exist. -+ */ -+#define PINMUX0 0x01c40000 -+#define PINMUX1 0x01c40004 -+#define PINMUX2 0x01c40008 -+#define PINMUX3 0x01c4000c -+#define PINMUX4 0x01c40010 - - #endif /* __ASM_ARCH_HARDWARE_H */ -diff --git a/include/asm-arm/arch-omap3/gpio.h b/include/asm-arm/arch-omap3/gpio.h -new file mode 100644 -index 0000000..30f633c ---- /dev/null -+++ b/include/asm-arm/arch-omap3/gpio.h -@@ -0,0 +1,86 @@ -+/* -+ * Copyright (c) 2009 Wind River Systems, Inc. -+ * Tom Rix -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ * -+ * This work is derived from the linux 2.6.27 kernel source -+ * To fetch, use the kernel repository -+ * git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git -+ * Use the v2.6.27 tag. -+ * -+ * Below is the original's header including its copyright -+ * -+ * linux/arch/arm/plat-omap/gpio.c -+ * -+ * Support functions for OMAP GPIO -+ * -+ * Copyright (C) 2003-2005 Nokia Corporation -+ * Written by Juha Yrjölä -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef _GPIO_H -+#define _GPIO_H -+ -+#define OMAP24XX_GPIO_REVISION 0x0000 -+#define OMAP24XX_GPIO_SYSCONFIG 0x0010 -+#define OMAP24XX_GPIO_SYSSTATUS 0x0014 -+#define OMAP24XX_GPIO_IRQSTATUS1 0x0018 -+#define OMAP24XX_GPIO_IRQSTATUS2 0x0028 -+#define OMAP24XX_GPIO_IRQENABLE2 0x002c -+#define OMAP24XX_GPIO_IRQENABLE1 0x001c -+#define OMAP24XX_GPIO_WAKE_EN 0x0020 -+#define OMAP24XX_GPIO_CTRL 0x0030 -+#define OMAP24XX_GPIO_OE 0x0034 -+#define OMAP24XX_GPIO_DATAIN 0x0038 -+#define OMAP24XX_GPIO_DATAOUT 0x003c -+#define OMAP24XX_GPIO_LEVELDETECT0 0x0040 -+#define OMAP24XX_GPIO_LEVELDETECT1 0x0044 -+#define OMAP24XX_GPIO_RISINGDETECT 0x0048 -+#define OMAP24XX_GPIO_FALLINGDETECT 0x004c -+#define OMAP24XX_GPIO_DEBOUNCE_EN 0x0050 -+#define OMAP24XX_GPIO_DEBOUNCE_VAL 0x0054 -+#define OMAP24XX_GPIO_CLEARIRQENABLE1 0x0060 -+#define OMAP24XX_GPIO_SETIRQENABLE1 0x0064 -+#define OMAP24XX_GPIO_CLEARWKUENA 0x0080 -+#define OMAP24XX_GPIO_SETWKUENA 0x0084 -+#define OMAP24XX_GPIO_CLEARDATAOUT 0x0090 -+#define OMAP24XX_GPIO_SETDATAOUT 0x0094 -+ -+struct gpio_bank { -+ void *base; -+ int method; -+}; -+ -+#define METHOD_GPIO_24XX 4 -+ -+/* This is the interface */ -+ -+/* Request a gpio before using it */ -+int omap_request_gpio(int gpio); -+/* Reset and free a gpio after using it */ -+void omap_free_gpio(int gpio); -+/* Sets the gpio as input or output */ -+void omap_set_gpio_direction(int gpio, int is_input); -+/* Set or clear a gpio output */ -+void omap_set_gpio_dataout(int gpio, int enable); -+/* Get the value of a gpio input */ -+int omap_get_gpio_datain(int gpio); -+ -+#endif /* _GPIO_H_ */ -diff --git a/include/asm-arm/mach-types.h b/include/asm-arm/mach-types.h -index 2c1e69b..9b8485d 100644 ---- a/include/asm-arm/mach-types.h -+++ b/include/asm-arm/mach-types.h -@@ -1807,7 +1807,7 @@ extern unsigned int __machine_arch_type; - #define MACH_TYPE_JADE 1821 - #define MACH_TYPE_KS8695_SOFTPLC 1822 - #define MACH_TYPE_GPRISC3 1823 --#define MACH_TYPE_STAMP9260 1824 -+#define MACH_TYPE_STAMP9G20 1824 - #define MACH_TYPE_SMDK6430 1825 - #define MACH_TYPE_SMDKC100 1826 - #define MACH_TYPE_TAVOREVB 1827 -@@ -1990,6 +1990,136 @@ extern unsigned int __machine_arch_type; - #define MACH_TYPE_BLAZE 2004 - #define MACH_TYPE_LINKSTATION_LS_HGL 2005 - #define MACH_TYPE_HTCVENUS 2006 -+#define MACH_TYPE_SONY_PRS505 2007 -+#define MACH_TYPE_HANLIN_V3 2008 -+#define MACH_TYPE_SAPPHIRA 2009 -+#define MACH_TYPE_DACK_SDA_01 2010 -+#define MACH_TYPE_ARMBOX 2011 -+#define MACH_TYPE_HARRIS_RVP 2012 -+#define MACH_TYPE_RIBALDO 2013 -+#define MACH_TYPE_AGORA 2014 -+#define MACH_TYPE_OMAP3_MINI 2015 -+#define MACH_TYPE_A9SAM6432_B 2016 -+#define MACH_TYPE_USG2410 2017 -+#define MACH_TYPE_PC72052_I10_REVB 2018 -+#define MACH_TYPE_MX35_EXM32 2019 -+#define MACH_TYPE_TOPAS910 2020 -+#define MACH_TYPE_HYENA 2021 -+#define MACH_TYPE_POSPAX 2022 -+#define MACH_TYPE_HDL_GX 2023 -+#define MACH_TYPE_CTERA_4BAY 2024 -+#define MACH_TYPE_CTERA_PLUG_C 2025 -+#define MACH_TYPE_CRWEA_PLUG_I 2026 -+#define MACH_TYPE_EGAUGE2 2027 -+#define MACH_TYPE_DIDJ 2028 -+#define MACH_TYPE_MEISTER 2029 -+#define MACH_TYPE_HTCBLACKSTONE 2030 -+#define MACH_TYPE_CPUAT9G20 2031 -+#define MACH_TYPE_SMDK6440 2032 -+#define MACH_TYPE_OMAP_35XX_MVP 2033 -+#define MACH_TYPE_CTERA_PLUG_I 2034 -+#define MACH_TYPE_PVG610 2035 -+#define MACH_TYPE_HPRW6815 2036 -+#define MACH_TYPE_OMAP3_OSWALD 2037 -+#define MACH_TYPE_NAS4220B 2038 -+#define MACH_TYPE_HTCRAPHAEL_CDMA 2039 -+#define MACH_TYPE_HTCDIAMOND_CDMA 2040 -+#define MACH_TYPE_SCALER 2041 -+#define MACH_TYPE_ZYLONITE2 2042 -+#define MACH_TYPE_ASPENITE 2043 -+#define MACH_TYPE_TETON 2044 -+#define MACH_TYPE_TTC_DKB 2045 -+#define MACH_TYPE_BISHOP2 2046 -+#define MACH_TYPE_IPPV5 2047 -+#define MACH_TYPE_FARM926 2048 -+#define MACH_TYPE_MMCCPU 2049 -+#define MACH_TYPE_SGMSFL 2050 -+#define MACH_TYPE_TT8000 2051 -+#define MACH_TYPE_ZRN4300LP 2052 -+#define MACH_TYPE_MPTC 2053 -+#define MACH_TYPE_H6051 2054 -+#define MACH_TYPE_PVG610_101 2055 -+#define MACH_TYPE_STAMP9261_PC_EVB 2056 -+#define MACH_TYPE_PELCO_ODYSSEUS 2057 -+#define MACH_TYPE_TNY_A9260 2058 -+#define MACH_TYPE_TNY_A9G20 2059 -+#define MACH_TYPE_AESOP_MP2530F 2060 -+#define MACH_TYPE_DX900 2061 -+#define MACH_TYPE_CPODC2 2062 -+#define MACH_TYPE_TILT_8925 2063 -+#define MACH_TYPE_DAVINCI_DM357_EVM 2064 -+#define MACH_TYPE_SWORDFISH 2065 -+#define MACH_TYPE_CORVUS 2066 -+#define MACH_TYPE_TAURUS 2067 -+#define MACH_TYPE_AXM 2068 -+#define MACH_TYPE_AXC 2069 -+#define MACH_TYPE_BABY 2070 -+#define MACH_TYPE_MP200 2071 -+#define MACH_TYPE_PCM043 2072 -+#define MACH_TYPE_HANLIN_V3C 2073 -+#define MACH_TYPE_KBK9G20 2074 -+#define MACH_TYPE_ADSTURBOG5 2075 -+#define MACH_TYPE_AVENGER_LITE1 2076 -+#define MACH_TYPE_SUC 2077 -+#define MACH_TYPE_AT91SAM7S256 2078 -+#define MACH_TYPE_MENDOZA 2079 -+#define MACH_TYPE_KIRA 2080 -+#define MACH_TYPE_MX1HBM 2081 -+#define MACH_TYPE_QUATRO43XX 2082 -+#define MACH_TYPE_QUATRO4230 2083 -+#define MACH_TYPE_NSB400 2084 -+#define MACH_TYPE_DRP255 2085 -+#define MACH_TYPE_THOTH 2086 -+#define MACH_TYPE_FIRESTONE 2087 -+#define MACH_TYPE_ASUSP750 2088 -+#define MACH_TYPE_CTERA_DL 2089 -+#define MACH_TYPE_SOCR 2090 -+#define MACH_TYPE_HTCOXYGEN 2091 -+#define MACH_TYPE_HEROC 2092 -+#define MACH_TYPE_ZENO6800 2093 -+#define MACH_TYPE_SC2MCS 2094 -+#define MACH_TYPE_GENE100 2095 -+#define MACH_TYPE_AS353X 2096 -+#define MACH_TYPE_SHEEVAPLUG 2097 -+#define MACH_TYPE_AT91SAM9G20 2098 -+#define MACH_TYPE_MV88F6192GTW_FE 2099 -+#define MACH_TYPE_CC9200 2100 -+#define MACH_TYPE_SM9200 2101 -+#define MACH_TYPE_TP9200 2102 -+#define MACH_TYPE_SNAPPERDV 2103 -+#define MACH_TYPE_AVENGERS_LITE 2104 -+#define MACH_TYPE_AVENGERS_LITE1 2105 -+#define MACH_TYPE_OMAP3AXON 2106 -+#define MACH_TYPE_MA8XX 2107 -+#define MACH_TYPE_MP201EK 2108 -+#define MACH_TYPE_DAVINCI_TUX 2109 -+#define MACH_TYPE_MPA1600 2110 -+#define MACH_TYPE_PELCO_TROY 2111 -+#define MACH_TYPE_NSB667 2112 -+#define MACH_TYPE_ROVERS5_4MPIX 2113 -+#define MACH_TYPE_TWOCOM 2114 -+#define MACH_TYPE_UBISYS_P9_RCU3R2 2115 -+#define MACH_TYPE_HERO_ESPRESSO 2116 -+#define MACH_TYPE_AFEUSB 2117 -+#define MACH_TYPE_T830 2118 -+#define MACH_TYPE_SPD8020_CC 2119 -+#define MACH_TYPE_OM_3D7K 2120 -+#define MACH_TYPE_PICOCOM2 2121 -+#define MACH_TYPE_UWG4MX27 2122 -+#define MACH_TYPE_UWG4MX31 2123 -+#define MACH_TYPE_CHERRY 2124 -+#define MACH_TYPE_MX51_BABBAGE 2125 -+#define MACH_TYPE_S3C2440TURKIYE 2126 -+#define MACH_TYPE_TX37 2127 -+#define MACH_TYPE_SBC2800_9G20 2128 -+#define MACH_TYPE_BENZGLB 2129 -+#define MACH_TYPE_BENZTD 2130 -+#define MACH_TYPE_CARTESIO_PLUS 2131 -+#define MACH_TYPE_SOLRAD_G20 2132 -+#define MACH_TYPE_MX27WALLACE 2133 -+#define MACH_TYPE_FMZWEBMODUL 2134 -+#define MACH_TYPE_RD78X00_MASA 2135 -+#define MACH_TYPE_SMALLOGGER 2136 - - #ifdef CONFIG_ARCH_EBSA110 - # ifdef machine_arch_type -@@ -23531,16 +23661,16 @@ extern unsigned int __machine_arch_type; - # define machine_is_gprisc3() (0) - #endif - --#ifdef CONFIG_MACH_STAMP9260 -+#ifdef CONFIG_MACH_STAMP9G20 - # ifdef machine_arch_type - # undef machine_arch_type - # define machine_arch_type __machine_arch_type - # else --# define machine_arch_type MACH_TYPE_STAMP9260 -+# define machine_arch_type MACH_TYPE_STAMP9G20 - # endif --# define machine_is_stamp9260() (machine_arch_type == MACH_TYPE_STAMP9260) -+# define machine_is_stamp9g20() (machine_arch_type == MACH_TYPE_STAMP9G20) - #else --# define machine_is_stamp9260() (0) -+# define machine_is_stamp9g20() (0) - #endif - - #ifdef CONFIG_MACH_SMDK6430 -@@ -25722,9 +25852,1569 @@ extern unsigned int __machine_arch_type; - # else - # define machine_arch_type MACH_TYPE_HTCVENUS - # endif --# define machine_is_htcvenus() (machine_arch_type == MACH_TYPE_HTCVENUS) -+# define machine_is_htckovsky() (machine_arch_type == MACH_TYPE_HTCVENUS) - #else --# define machine_is_htcvenus() (0) -+# define machine_is_htckovsky() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SONY_PRS505 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SONY_PRS505 -+# endif -+# define machine_is_sony_prs505() (machine_arch_type == MACH_TYPE_SONY_PRS505) -+#else -+# define machine_is_sony_prs505() (0) -+#endif -+ -+#ifdef CONFIG_MACH_HANLIN_V3 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_HANLIN_V3 -+# endif -+# define machine_is_hanlin_v3() (machine_arch_type == MACH_TYPE_HANLIN_V3) -+#else -+# define machine_is_hanlin_v3() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SAPPHIRA -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SAPPHIRA -+# endif -+# define machine_is_sapphira() (machine_arch_type == MACH_TYPE_SAPPHIRA) -+#else -+# define machine_is_sapphira() (0) -+#endif -+ -+#ifdef CONFIG_MACH_DACK_SDA_01 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_DACK_SDA_01 -+# endif -+# define machine_is_dack_sda_01() (machine_arch_type == MACH_TYPE_DACK_SDA_01) -+#else -+# define machine_is_dack_sda_01() (0) -+#endif -+ -+#ifdef CONFIG_MACH_ARMBOX -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_ARMBOX -+# endif -+# define machine_is_armbox() (machine_arch_type == MACH_TYPE_ARMBOX) -+#else -+# define machine_is_armbox() (0) -+#endif -+ -+#ifdef CONFIG_MACH_HARRIS_RVP -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_HARRIS_RVP -+# endif -+# define machine_is_harris_rvp() (machine_arch_type == MACH_TYPE_HARRIS_RVP) -+#else -+# define machine_is_harris_rvp() (0) -+#endif -+ -+#ifdef CONFIG_MACH_RIBALDO -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_RIBALDO -+# endif -+# define machine_is_ribaldo() (machine_arch_type == MACH_TYPE_RIBALDO) -+#else -+# define machine_is_ribaldo() (0) -+#endif -+ -+#ifdef CONFIG_MACH_AGORA -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_AGORA -+# endif -+# define machine_is_agora() (machine_arch_type == MACH_TYPE_AGORA) -+#else -+# define machine_is_agora() (0) -+#endif -+ -+#ifdef CONFIG_MACH_OMAP3_MINI -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_OMAP3_MINI -+# endif -+# define machine_is_omap3_mini() (machine_arch_type == MACH_TYPE_OMAP3_MINI) -+#else -+# define machine_is_omap3_mini() (0) -+#endif -+ -+#ifdef CONFIG_MACH_A9SAM6432_B -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_A9SAM6432_B -+# endif -+# define machine_is_a9sam6432_b() (machine_arch_type == MACH_TYPE_A9SAM6432_B) -+#else -+# define machine_is_a9sam6432_b() (0) -+#endif -+ -+#ifdef CONFIG_MACH_USG2410 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_USG2410 -+# endif -+# define machine_is_usg2410() (machine_arch_type == MACH_TYPE_USG2410) -+#else -+# define machine_is_usg2410() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PC72052_I10_REVB -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PC72052_I10_REVB -+# endif -+# define machine_is_pc72052_i10_revb() (machine_arch_type == MACH_TYPE_PC72052_I10_REVB) -+#else -+# define machine_is_pc72052_i10_revb() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MX35_EXM32 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MX35_EXM32 -+# endif -+# define machine_is_mx35_exm32() (machine_arch_type == MACH_TYPE_MX35_EXM32) -+#else -+# define machine_is_mx35_exm32() (0) -+#endif -+ -+#ifdef CONFIG_MACH_TOPAS910 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_TOPAS910 -+# endif -+# define machine_is_topas910() (machine_arch_type == MACH_TYPE_TOPAS910) -+#else -+# define machine_is_topas910() (0) -+#endif -+ -+#ifdef CONFIG_MACH_HYENA -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_HYENA -+# endif -+# define machine_is_hyena() (machine_arch_type == MACH_TYPE_HYENA) -+#else -+# define machine_is_hyena() (0) -+#endif -+ -+#ifdef CONFIG_MACH_POSPAX -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_POSPAX -+# endif -+# define machine_is_pospax() (machine_arch_type == MACH_TYPE_POSPAX) -+#else -+# define machine_is_pospax() (0) -+#endif -+ -+#ifdef CONFIG_MACH_HDL_GX -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_HDL_GX -+# endif -+# define machine_is_hdl_gx() (machine_arch_type == MACH_TYPE_HDL_GX) -+#else -+# define machine_is_hdl_gx() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CTERA_4BAY -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CTERA_4BAY -+# endif -+# define machine_is_ctera_4bay() (machine_arch_type == MACH_TYPE_CTERA_4BAY) -+#else -+# define machine_is_ctera_4bay() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CTERA_PLUG_C -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CTERA_PLUG_C -+# endif -+# define machine_is_ctera_plug_c() (machine_arch_type == MACH_TYPE_CTERA_PLUG_C) -+#else -+# define machine_is_ctera_plug_c() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CRWEA_PLUG_I -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CRWEA_PLUG_I -+# endif -+# define machine_is_crwea_plug_i() (machine_arch_type == MACH_TYPE_CRWEA_PLUG_I) -+#else -+# define machine_is_crwea_plug_i() (0) -+#endif -+ -+#ifdef CONFIG_MACH_EGAUGE2 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_EGAUGE2 -+# endif -+# define machine_is_egauge2() (machine_arch_type == MACH_TYPE_EGAUGE2) -+#else -+# define machine_is_egauge2() (0) -+#endif -+ -+#ifdef CONFIG_MACH_DIDJ -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_DIDJ -+# endif -+# define machine_is_didj() (machine_arch_type == MACH_TYPE_DIDJ) -+#else -+# define machine_is_didj() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MEISTER -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MEISTER -+# endif -+# define machine_is_m_s3c2443() (machine_arch_type == MACH_TYPE_MEISTER) -+#else -+# define machine_is_m_s3c2443() (0) -+#endif -+ -+#ifdef CONFIG_MACH_HTCBLACKSTONE -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_HTCBLACKSTONE -+# endif -+# define machine_is_htcblackstone() (machine_arch_type == MACH_TYPE_HTCBLACKSTONE) -+#else -+# define machine_is_htcblackstone() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CPUAT9G20 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CPUAT9G20 -+# endif -+# define machine_is_cpuat9g20() (machine_arch_type == MACH_TYPE_CPUAT9G20) -+#else -+# define machine_is_cpuat9g20() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SMDK6440 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SMDK6440 -+# endif -+# define machine_is_smdk6440() (machine_arch_type == MACH_TYPE_SMDK6440) -+#else -+# define machine_is_smdk6440() (0) -+#endif -+ -+#ifdef CONFIG_MACH_OMAP_35XX_MVP -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_OMAP_35XX_MVP -+# endif -+# define machine_is_omap_35xx_mvp() (machine_arch_type == MACH_TYPE_OMAP_35XX_MVP) -+#else -+# define machine_is_omap_35xx_mvp() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CTERA_PLUG_I -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CTERA_PLUG_I -+# endif -+# define machine_is_ctera_plug_i() (machine_arch_type == MACH_TYPE_CTERA_PLUG_I) -+#else -+# define machine_is_ctera_plug_i() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PVG610 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PVG610 -+# endif -+# define machine_is_pvg610_100() (machine_arch_type == MACH_TYPE_PVG610) -+#else -+# define machine_is_pvg610_100() (0) -+#endif -+ -+#ifdef CONFIG_MACH_HPRW6815 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_HPRW6815 -+# endif -+# define machine_is_hprw6815() (machine_arch_type == MACH_TYPE_HPRW6815) -+#else -+# define machine_is_hprw6815() (0) -+#endif -+ -+#ifdef CONFIG_MACH_OMAP3_OSWALD -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_OMAP3_OSWALD -+# endif -+# define machine_is_omap3_oswald() (machine_arch_type == MACH_TYPE_OMAP3_OSWALD) -+#else -+# define machine_is_omap3_oswald() (0) -+#endif -+ -+#ifdef CONFIG_MACH_NAS4220B -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_NAS4220B -+# endif -+# define machine_is_nas4220b() (machine_arch_type == MACH_TYPE_NAS4220B) -+#else -+# define machine_is_nas4220b() (0) -+#endif -+ -+#ifdef CONFIG_MACH_HTCRAPHAEL_CDMA -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_HTCRAPHAEL_CDMA -+# endif -+# define machine_is_htcraphael_cdma() (machine_arch_type == MACH_TYPE_HTCRAPHAEL_CDMA) -+#else -+# define machine_is_htcraphael_cdma() (0) -+#endif -+ -+#ifdef CONFIG_MACH_HTCDIAMOND_CDMA -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_HTCDIAMOND_CDMA -+# endif -+# define machine_is_htcdiamond_cdma() (machine_arch_type == MACH_TYPE_HTCDIAMOND_CDMA) -+#else -+# define machine_is_htcdiamond_cdma() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SCALER -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SCALER -+# endif -+# define machine_is_scaler() (machine_arch_type == MACH_TYPE_SCALER) -+#else -+# define machine_is_scaler() (0) -+#endif -+ -+#ifdef CONFIG_MACH_ZYLONITE2 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_ZYLONITE2 -+# endif -+# define machine_is_zylonite2() (machine_arch_type == MACH_TYPE_ZYLONITE2) -+#else -+# define machine_is_zylonite2() (0) -+#endif -+ -+#ifdef CONFIG_MACH_ASPENITE -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_ASPENITE -+# endif -+# define machine_is_aspenite() (machine_arch_type == MACH_TYPE_ASPENITE) -+#else -+# define machine_is_aspenite() (0) -+#endif -+ -+#ifdef CONFIG_MACH_TETON -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_TETON -+# endif -+# define machine_is_teton() (machine_arch_type == MACH_TYPE_TETON) -+#else -+# define machine_is_teton() (0) -+#endif -+ -+#ifdef CONFIG_MACH_TTC_DKB -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_TTC_DKB -+# endif -+# define machine_is_ttc_dkb() (machine_arch_type == MACH_TYPE_TTC_DKB) -+#else -+# define machine_is_ttc_dkb() (0) -+#endif -+ -+#ifdef CONFIG_MACH_BISHOP2 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_BISHOP2 -+# endif -+# define machine_is_bishop2() (machine_arch_type == MACH_TYPE_BISHOP2) -+#else -+# define machine_is_bishop2() (0) -+#endif -+ -+#ifdef CONFIG_MACH_IPPV5 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_IPPV5 -+# endif -+# define machine_is_ippv5() (machine_arch_type == MACH_TYPE_IPPV5) -+#else -+# define machine_is_ippv5() (0) -+#endif -+ -+#ifdef CONFIG_MACH_FARM926 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_FARM926 -+# endif -+# define machine_is_farm926() (machine_arch_type == MACH_TYPE_FARM926) -+#else -+# define machine_is_farm926() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MMCCPU -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MMCCPU -+# endif -+# define machine_is_mmccpu() (machine_arch_type == MACH_TYPE_MMCCPU) -+#else -+# define machine_is_mmccpu() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SGMSFL -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SGMSFL -+# endif -+# define machine_is_sgmsfl() (machine_arch_type == MACH_TYPE_SGMSFL) -+#else -+# define machine_is_sgmsfl() (0) -+#endif -+ -+#ifdef CONFIG_MACH_TT8000 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_TT8000 -+# endif -+# define machine_is_tt8000() (machine_arch_type == MACH_TYPE_TT8000) -+#else -+# define machine_is_tt8000() (0) -+#endif -+ -+#ifdef CONFIG_MACH_ZRN4300LP -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_ZRN4300LP -+# endif -+# define machine_is_zrn4300lp() (machine_arch_type == MACH_TYPE_ZRN4300LP) -+#else -+# define machine_is_zrn4300lp() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MPTC -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MPTC -+# endif -+# define machine_is_mptc() (machine_arch_type == MACH_TYPE_MPTC) -+#else -+# define machine_is_mptc() (0) -+#endif -+ -+#ifdef CONFIG_MACH_H6051 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_H6051 -+# endif -+# define machine_is_h6051() (machine_arch_type == MACH_TYPE_H6051) -+#else -+# define machine_is_h6051() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PVG610_101 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PVG610_101 -+# endif -+# define machine_is_pvg610_101() (machine_arch_type == MACH_TYPE_PVG610_101) -+#else -+# define machine_is_pvg610_101() (0) -+#endif -+ -+#ifdef CONFIG_MACH_STAMP9261_PC_EVB -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_STAMP9261_PC_EVB -+# endif -+# define machine_is_stamp9261_pc_evb() (machine_arch_type == MACH_TYPE_STAMP9261_PC_EVB) -+#else -+# define machine_is_stamp9261_pc_evb() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PELCO_ODYSSEUS -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PELCO_ODYSSEUS -+# endif -+# define machine_is_pelco_odysseus() (machine_arch_type == MACH_TYPE_PELCO_ODYSSEUS) -+#else -+# define machine_is_pelco_odysseus() (0) -+#endif -+ -+#ifdef CONFIG_MACH_TNY_A9260 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_TNY_A9260 -+# endif -+# define machine_is_tny_a9260() (machine_arch_type == MACH_TYPE_TNY_A9260) -+#else -+# define machine_is_tny_a9260() (0) -+#endif -+ -+#ifdef CONFIG_MACH_TNY_A9G20 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_TNY_A9G20 -+# endif -+# define machine_is_tny_a9g20() (machine_arch_type == MACH_TYPE_TNY_A9G20) -+#else -+# define machine_is_tny_a9g20() (0) -+#endif -+ -+#ifdef CONFIG_MACH_AESOP_MP2530F -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_AESOP_MP2530F -+# endif -+# define machine_is_aesop_mp2530f() (machine_arch_type == MACH_TYPE_AESOP_MP2530F) -+#else -+# define machine_is_aesop_mp2530f() (0) -+#endif -+ -+#ifdef CONFIG_MACH_DX900 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_DX900 -+# endif -+# define machine_is_dx900() (machine_arch_type == MACH_TYPE_DX900) -+#else -+# define machine_is_dx900() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CPODC2 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CPODC2 -+# endif -+# define machine_is_cpodc2() (machine_arch_type == MACH_TYPE_CPODC2) -+#else -+# define machine_is_cpodc2() (0) -+#endif -+ -+#ifdef CONFIG_MACH_TILT_8925 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_TILT_8925 -+# endif -+# define machine_is_tilt_8925() (machine_arch_type == MACH_TYPE_TILT_8925) -+#else -+# define machine_is_tilt_8925() (0) -+#endif -+ -+#ifdef CONFIG_MACH_DAVINCI_DM357_EVM -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_DAVINCI_DM357_EVM -+# endif -+# define machine_is_davinci_dm357_evm() (machine_arch_type == MACH_TYPE_DAVINCI_DM357_EVM) -+#else -+# define machine_is_davinci_dm357_evm() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SWORDFISH -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SWORDFISH -+# endif -+# define machine_is_swordfish() (machine_arch_type == MACH_TYPE_SWORDFISH) -+#else -+# define machine_is_swordfish() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CORVUS -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CORVUS -+# endif -+# define machine_is_corvus() (machine_arch_type == MACH_TYPE_CORVUS) -+#else -+# define machine_is_corvus() (0) -+#endif -+ -+#ifdef CONFIG_MACH_TAURUS -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_TAURUS -+# endif -+# define machine_is_taurus() (machine_arch_type == MACH_TYPE_TAURUS) -+#else -+# define machine_is_taurus() (0) -+#endif -+ -+#ifdef CONFIG_MACH_AXM -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_AXM -+# endif -+# define machine_is_axm() (machine_arch_type == MACH_TYPE_AXM) -+#else -+# define machine_is_axm() (0) -+#endif -+ -+#ifdef CONFIG_MACH_AXC -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_AXC -+# endif -+# define machine_is_axc() (machine_arch_type == MACH_TYPE_AXC) -+#else -+# define machine_is_axc() (0) -+#endif -+ -+#ifdef CONFIG_MACH_BABY -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_BABY -+# endif -+# define machine_is_baby() (machine_arch_type == MACH_TYPE_BABY) -+#else -+# define machine_is_baby() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MP200 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MP200 -+# endif -+# define machine_is_mp200() (machine_arch_type == MACH_TYPE_MP200) -+#else -+# define machine_is_mp200() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PCM043 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PCM043 -+# endif -+# define machine_is_pcm043() (machine_arch_type == MACH_TYPE_PCM043) -+#else -+# define machine_is_pcm043() (0) -+#endif -+ -+#ifdef CONFIG_MACH_HANLIN_V3C -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_HANLIN_V3C -+# endif -+# define machine_is_hanlin_v3c() (machine_arch_type == MACH_TYPE_HANLIN_V3C) -+#else -+# define machine_is_hanlin_v3c() (0) -+#endif -+ -+#ifdef CONFIG_MACH_KBK9G20 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_KBK9G20 -+# endif -+# define machine_is_kbk9g20() (machine_arch_type == MACH_TYPE_KBK9G20) -+#else -+# define machine_is_kbk9g20() (0) -+#endif -+ -+#ifdef CONFIG_MACH_ADSTURBOG5 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_ADSTURBOG5 -+# endif -+# define machine_is_adsturbog5() (machine_arch_type == MACH_TYPE_ADSTURBOG5) -+#else -+# define machine_is_adsturbog5() (0) -+#endif -+ -+#ifdef CONFIG_MACH_AVENGER_LITE1 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_AVENGER_LITE1 -+# endif -+# define machine_is_avenger_lite1() (machine_arch_type == MACH_TYPE_AVENGER_LITE1) -+#else -+# define machine_is_avenger_lite1() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SUC -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SUC -+# endif -+# define machine_is_suc82x() (machine_arch_type == MACH_TYPE_SUC) -+#else -+# define machine_is_suc82x() (0) -+#endif -+ -+#ifdef CONFIG_MACH_AT91SAM7S256 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_AT91SAM7S256 -+# endif -+# define machine_is_at91sam7s256() (machine_arch_type == MACH_TYPE_AT91SAM7S256) -+#else -+# define machine_is_at91sam7s256() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MENDOZA -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MENDOZA -+# endif -+# define machine_is_mendoza() (machine_arch_type == MACH_TYPE_MENDOZA) -+#else -+# define machine_is_mendoza() (0) -+#endif -+ -+#ifdef CONFIG_MACH_KIRA -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_KIRA -+# endif -+# define machine_is_kira() (machine_arch_type == MACH_TYPE_KIRA) -+#else -+# define machine_is_kira() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MX1HBM -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MX1HBM -+# endif -+# define machine_is_mx1hbm() (machine_arch_type == MACH_TYPE_MX1HBM) -+#else -+# define machine_is_mx1hbm() (0) -+#endif -+ -+#ifdef CONFIG_MACH_QUATRO43XX -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_QUATRO43XX -+# endif -+# define machine_is_quatro43xx() (machine_arch_type == MACH_TYPE_QUATRO43XX) -+#else -+# define machine_is_quatro43xx() (0) -+#endif -+ -+#ifdef CONFIG_MACH_QUATRO4230 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_QUATRO4230 -+# endif -+# define machine_is_quatro4230() (machine_arch_type == MACH_TYPE_QUATRO4230) -+#else -+# define machine_is_quatro4230() (0) -+#endif -+ -+#ifdef CONFIG_MACH_NSB400 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_NSB400 -+# endif -+# define machine_is_nsb400() (machine_arch_type == MACH_TYPE_NSB400) -+#else -+# define machine_is_nsb400() (0) -+#endif -+ -+#ifdef CONFIG_MACH_DRP255 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_DRP255 -+# endif -+# define machine_is_drp255() (machine_arch_type == MACH_TYPE_DRP255) -+#else -+# define machine_is_drp255() (0) -+#endif -+ -+#ifdef CONFIG_MACH_THOTH -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_THOTH -+# endif -+# define machine_is_thoth() (machine_arch_type == MACH_TYPE_THOTH) -+#else -+# define machine_is_thoth() (0) -+#endif -+ -+#ifdef CONFIG_MACH_FIRESTONE -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_FIRESTONE -+# endif -+# define machine_is_firestone() (machine_arch_type == MACH_TYPE_FIRESTONE) -+#else -+# define machine_is_firestone() (0) -+#endif -+ -+#ifdef CONFIG_MACH_ASUSP750 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_ASUSP750 -+# endif -+# define machine_is_asusp750() (machine_arch_type == MACH_TYPE_ASUSP750) -+#else -+# define machine_is_asusp750() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CTERA_DL -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CTERA_DL -+# endif -+# define machine_is_ctera_dl() (machine_arch_type == MACH_TYPE_CTERA_DL) -+#else -+# define machine_is_ctera_dl() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SOCR -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SOCR -+# endif -+# define machine_is_socr() (machine_arch_type == MACH_TYPE_SOCR) -+#else -+# define machine_is_socr() (0) -+#endif -+ -+#ifdef CONFIG_MACH_HTCOXYGEN -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_HTCOXYGEN -+# endif -+# define machine_is_htcoxygen() (machine_arch_type == MACH_TYPE_HTCOXYGEN) -+#else -+# define machine_is_htcoxygen() (0) -+#endif -+ -+#ifdef CONFIG_MACH_HEROC -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_HEROC -+# endif -+# define machine_is_heroc() (machine_arch_type == MACH_TYPE_HEROC) -+#else -+# define machine_is_heroc() (0) -+#endif -+ -+#ifdef CONFIG_MACH_ZENO6800 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_ZENO6800 -+# endif -+# define machine_is_zeno6800() (machine_arch_type == MACH_TYPE_ZENO6800) -+#else -+# define machine_is_zeno6800() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SC2MCS -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SC2MCS -+# endif -+# define machine_is_sc2mcs() (machine_arch_type == MACH_TYPE_SC2MCS) -+#else -+# define machine_is_sc2mcs() (0) -+#endif -+ -+#ifdef CONFIG_MACH_GENE100 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_GENE100 -+# endif -+# define machine_is_gene100() (machine_arch_type == MACH_TYPE_GENE100) -+#else -+# define machine_is_gene100() (0) -+#endif -+ -+#ifdef CONFIG_MACH_AS353X -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_AS353X -+# endif -+# define machine_is_as353x() (machine_arch_type == MACH_TYPE_AS353X) -+#else -+# define machine_is_as353x() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SHEEVAPLUG -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SHEEVAPLUG -+# endif -+# define machine_is_sheevaplug() (machine_arch_type == MACH_TYPE_SHEEVAPLUG) -+#else -+# define machine_is_sheevaplug() (0) -+#endif -+ -+#ifdef CONFIG_MACH_AT91SAM9G20 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_AT91SAM9G20 -+# endif -+# define machine_is_at91sam9g20() (machine_arch_type == MACH_TYPE_AT91SAM9G20) -+#else -+# define machine_is_at91sam9g20() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MV88F6192GTW_FE -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MV88F6192GTW_FE -+# endif -+# define machine_is_mv88f6192gtw_fe() (machine_arch_type == MACH_TYPE_MV88F6192GTW_FE) -+#else -+# define machine_is_mv88f6192gtw_fe() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CC9200 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CC9200 -+# endif -+# define machine_is_cc9200() (machine_arch_type == MACH_TYPE_CC9200) -+#else -+# define machine_is_cc9200() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SM9200 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SM9200 -+# endif -+# define machine_is_sm9200() (machine_arch_type == MACH_TYPE_SM9200) -+#else -+# define machine_is_sm9200() (0) -+#endif -+ -+#ifdef CONFIG_MACH_TP9200 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_TP9200 -+# endif -+# define machine_is_tp9200() (machine_arch_type == MACH_TYPE_TP9200) -+#else -+# define machine_is_tp9200() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SNAPPERDV -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SNAPPERDV -+# endif -+# define machine_is_snapperdv() (machine_arch_type == MACH_TYPE_SNAPPERDV) -+#else -+# define machine_is_snapperdv() (0) -+#endif -+ -+#ifdef CONFIG_MACH_AVENGERS_LITE -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_AVENGERS_LITE -+# endif -+# define machine_is_avengers_lite() (machine_arch_type == MACH_TYPE_AVENGERS_LITE) -+#else -+# define machine_is_avengers_lite() (0) -+#endif -+ -+#ifdef CONFIG_MACH_AVENGERS_LITE1 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_AVENGERS_LITE1 -+# endif -+# define machine_is_avengers_lite1() (machine_arch_type == MACH_TYPE_AVENGERS_LITE1) -+#else -+# define machine_is_avengers_lite1() (0) -+#endif -+ -+#ifdef CONFIG_MACH_OMAP3AXON -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_OMAP3AXON -+# endif -+# define machine_is_omap3axon() (machine_arch_type == MACH_TYPE_OMAP3AXON) -+#else -+# define machine_is_omap3axon() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MA8XX -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MA8XX -+# endif -+# define machine_is_ma8xx() (machine_arch_type == MACH_TYPE_MA8XX) -+#else -+# define machine_is_ma8xx() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MP201EK -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MP201EK -+# endif -+# define machine_is_mp201ek() (machine_arch_type == MACH_TYPE_MP201EK) -+#else -+# define machine_is_mp201ek() (0) -+#endif -+ -+#ifdef CONFIG_MACH_DAVINCI_TUX -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_DAVINCI_TUX -+# endif -+# define machine_is_davinci_tux() (machine_arch_type == MACH_TYPE_DAVINCI_TUX) -+#else -+# define machine_is_davinci_tux() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MPA1600 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MPA1600 -+# endif -+# define machine_is_mpa1600() (machine_arch_type == MACH_TYPE_MPA1600) -+#else -+# define machine_is_mpa1600() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PELCO_TROY -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PELCO_TROY -+# endif -+# define machine_is_pelco_troy() (machine_arch_type == MACH_TYPE_PELCO_TROY) -+#else -+# define machine_is_pelco_troy() (0) -+#endif -+ -+#ifdef CONFIG_MACH_NSB667 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_NSB667 -+# endif -+# define machine_is_nsb667() (machine_arch_type == MACH_TYPE_NSB667) -+#else -+# define machine_is_nsb667() (0) -+#endif -+ -+#ifdef CONFIG_MACH_ROVERS5_4MPIX -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_ROVERS5_4MPIX -+# endif -+# define machine_is_rovers5_4mpix() (machine_arch_type == MACH_TYPE_ROVERS5_4MPIX) -+#else -+# define machine_is_rovers5_4mpix() (0) -+#endif -+ -+#ifdef CONFIG_MACH_TWOCOM -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_TWOCOM -+# endif -+# define machine_is_twocom() (machine_arch_type == MACH_TYPE_TWOCOM) -+#else -+# define machine_is_twocom() (0) -+#endif -+ -+#ifdef CONFIG_MACH_UBISYS_P9_RCU3R2 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_UBISYS_P9_RCU3R2 -+# endif -+# define machine_is_ubisys_p9_rcu3r2() (machine_arch_type == MACH_TYPE_UBISYS_P9_RCU3R2) -+#else -+# define machine_is_ubisys_p9_rcu3r2() (0) -+#endif -+ -+#ifdef CONFIG_MACH_HERO_ESPRESSO -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_HERO_ESPRESSO -+# endif -+# define machine_is_hero_espresso() (machine_arch_type == MACH_TYPE_HERO_ESPRESSO) -+#else -+# define machine_is_hero_espresso() (0) -+#endif -+ -+#ifdef CONFIG_MACH_AFEUSB -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_AFEUSB -+# endif -+# define machine_is_afeusb() (machine_arch_type == MACH_TYPE_AFEUSB) -+#else -+# define machine_is_afeusb() (0) -+#endif -+ -+#ifdef CONFIG_MACH_T830 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_T830 -+# endif -+# define machine_is_t830() (machine_arch_type == MACH_TYPE_T830) -+#else -+# define machine_is_t830() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SPD8020_CC -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SPD8020_CC -+# endif -+# define machine_is_spd8020_cc() (machine_arch_type == MACH_TYPE_SPD8020_CC) -+#else -+# define machine_is_spd8020_cc() (0) -+#endif -+ -+#ifdef CONFIG_MACH_OM_3D7K -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_OM_3D7K -+# endif -+# define machine_is_om_3d7k() (machine_arch_type == MACH_TYPE_OM_3D7K) -+#else -+# define machine_is_om_3d7k() (0) -+#endif -+ -+#ifdef CONFIG_MACH_PICOCOM2 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_PICOCOM2 -+# endif -+# define machine_is_picocom2() (machine_arch_type == MACH_TYPE_PICOCOM2) -+#else -+# define machine_is_picocom2() (0) -+#endif -+ -+#ifdef CONFIG_MACH_UWG4MX27 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_UWG4MX27 -+# endif -+# define machine_is_uwg4mx27() (machine_arch_type == MACH_TYPE_UWG4MX27) -+#else -+# define machine_is_uwg4mx27() (0) -+#endif -+ -+#ifdef CONFIG_MACH_UWG4MX31 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_UWG4MX31 -+# endif -+# define machine_is_uwg4mx31() (machine_arch_type == MACH_TYPE_UWG4MX31) -+#else -+# define machine_is_uwg4mx31() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CHERRY -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CHERRY -+# endif -+# define machine_is_cherry() (machine_arch_type == MACH_TYPE_CHERRY) -+#else -+# define machine_is_cherry() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MX51_BABBAGE -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MX51_BABBAGE -+# endif -+# define machine_is_mx51_babbage() (machine_arch_type == MACH_TYPE_MX51_BABBAGE) -+#else -+# define machine_is_mx51_babbage() (0) -+#endif -+ -+#ifdef CONFIG_MACH_S3C2440TURKIYE -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_S3C2440TURKIYE -+# endif -+# define machine_is_s3c2440turkiye() (machine_arch_type == MACH_TYPE_S3C2440TURKIYE) -+#else -+# define machine_is_s3c2440turkiye() (0) -+#endif -+ -+#ifdef CONFIG_MACH_TX37 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_TX37 -+# endif -+# define machine_is_tx37() (machine_arch_type == MACH_TYPE_TX37) -+#else -+# define machine_is_tx37() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SBC2800_9G20 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SBC2800_9G20 -+# endif -+# define machine_is_sbc2800_9g20() (machine_arch_type == MACH_TYPE_SBC2800_9G20) -+#else -+# define machine_is_sbc2800_9g20() (0) -+#endif -+ -+#ifdef CONFIG_MACH_BENZGLB -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_BENZGLB -+# endif -+# define machine_is_benzglb() (machine_arch_type == MACH_TYPE_BENZGLB) -+#else -+# define machine_is_benzglb() (0) -+#endif -+ -+#ifdef CONFIG_MACH_BENZTD -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_BENZTD -+# endif -+# define machine_is_benztd() (machine_arch_type == MACH_TYPE_BENZTD) -+#else -+# define machine_is_benztd() (0) -+#endif -+ -+#ifdef CONFIG_MACH_CARTESIO_PLUS -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_CARTESIO_PLUS -+# endif -+# define machine_is_cartesio_plus() (machine_arch_type == MACH_TYPE_CARTESIO_PLUS) -+#else -+# define machine_is_cartesio_plus() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SOLRAD_G20 -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SOLRAD_G20 -+# endif -+# define machine_is_solrad_g20() (machine_arch_type == MACH_TYPE_SOLRAD_G20) -+#else -+# define machine_is_solrad_g20() (0) -+#endif -+ -+#ifdef CONFIG_MACH_MX27WALLACE -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_MX27WALLACE -+# endif -+# define machine_is_mx27wallace() (machine_arch_type == MACH_TYPE_MX27WALLACE) -+#else -+# define machine_is_mx27wallace() (0) -+#endif -+ -+#ifdef CONFIG_MACH_FMZWEBMODUL -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_FMZWEBMODUL -+# endif -+# define machine_is_fmzwebmodul() (machine_arch_type == MACH_TYPE_FMZWEBMODUL) -+#else -+# define machine_is_fmzwebmodul() (0) -+#endif -+ -+#ifdef CONFIG_MACH_RD78X00_MASA -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_RD78X00_MASA -+# endif -+# define machine_is_rd78x00_masa() (machine_arch_type == MACH_TYPE_RD78X00_MASA) -+#else -+# define machine_is_rd78x00_masa() (0) -+#endif -+ -+#ifdef CONFIG_MACH_SMALLOGGER -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_SMALLOGGER -+# endif -+# define machine_is_smallogger() (machine_arch_type == MACH_TYPE_SMALLOGGER) -+#else -+# define machine_is_smallogger() (0) - #endif - - /* -diff --git a/include/asm-arm/u-boot-arm.h b/include/asm-arm/u-boot-arm.h -index e7d58fe..6d2f8bc 100644 ---- a/include/asm-arm/u-boot-arm.h -+++ b/include/asm-arm/u-boot-arm.h -@@ -42,6 +42,7 @@ int cleanup_before_linux(void); - - /* cpu/.../arch/cpu.c */ - int arch_cpu_init(void); -+int arch_misc_init(void); - - /* board/.../... */ - int board_init(void); -@@ -58,8 +59,12 @@ void setup_revision_tag (struct tag **params); - int setenv (char *, char *); - - /* cpu/.../interrupt.c */ -+int arch_interrupt_init (void); - void reset_timer_masked (void); - ulong get_timer_masked (void); - void udelay_masked (unsigned long usec); - -+/* cpu/.../timer.c */ -+int timer_init (void); -+ - #endif /* _U_BOOT_ARM_H_ */ -diff --git a/include/asm-m68k/immap.h b/include/asm-m68k/immap.h -index 93f730f..6a3ef03 100644 ---- a/include/asm-m68k/immap.h -+++ b/include/asm-m68k/immap.h -@@ -149,7 +149,7 @@ - #define CONFIG_SYS_TMRINTR_NO (INT0_LO_DTMR3) - #define CONFIG_SYS_TMRINTR_MASK (INTC_IPRL_INT22) - #define CONFIG_SYS_TMRINTR_PEND (CONFIG_SYS_TMRINTR_MASK) --#define CONFIG_SYS_TMRINTR_PRI (0) /* Level must include inorder to work */ -+#define CONFIG_SYS_TMRINTR_PRI (0x1E) /* Interrupt level 3, priority 6 */ - #define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) - #endif - diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h index 3a1e6d6..2ee6920 100644 --- a/include/asm-mips/addrspace.h @@ -59620,6817 +13620,6 @@ index 0000000..2840bc0 +#endif /* !__ASSEMBLY__ */ + +#endif /* __JZ4740_H__ */ -diff --git a/include/asm-ppc/fsl_dma.h b/include/asm-ppc/fsl_dma.h -new file mode 100644 -index 0000000..aab8720 ---- /dev/null -+++ b/include/asm-ppc/fsl_dma.h -@@ -0,0 +1,51 @@ -+/* -+ * Freescale DMA Controller -+ * -+ * Copyright 2006 Freescale Semiconductor, Inc. -+ * -+ * This software may be used and distributed according to the -+ * terms of the GNU Public License, Version 2, incorporated -+ * herein by reference. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * Version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#ifndef _ASM_FSL_DMA_H_ -+#define _ASM_FSL_DMA_H_ -+ -+#include -+ -+typedef struct fsl_dma { -+ uint mr; /* DMA mode register */ -+ uint sr; /* DMA status register */ -+ char res0[4]; -+ uint clndar; /* DMA current link descriptor address register */ -+ uint satr; /* DMA source attributes register */ -+ uint sar; /* DMA source address register */ -+ uint datr; /* DMA destination attributes register */ -+ uint dar; /* DMA destination address register */ -+ uint bcr; /* DMA byte count register */ -+ char res1[4]; -+ uint nlndar; /* DMA next link descriptor address register */ -+ char res2[8]; -+ uint clabdar; /* DMA current List - alternate base descriptor address Register */ -+ char res3[4]; -+ uint nlsdar; /* DMA next list descriptor address register */ -+ uint ssr; /* DMA source stride register */ -+ uint dsr; /* DMA destination stride register */ -+ char res4[56]; -+} fsl_dma_t; -+ -+#endif /* _ASM_DMA_H_ */ -diff --git a/include/asm-ppc/fsl_lbc.h b/include/asm-ppc/fsl_lbc.h -index bc1ebe6..a28082e 100644 ---- a/include/asm-ppc/fsl_lbc.h -+++ b/include/asm-ppc/fsl_lbc.h -@@ -54,7 +54,7 @@ - #define BR_MS_UPMA 0x00000080 /* UPMA */ - #define BR_MS_UPMB 0x000000A0 /* UPMB */ - #define BR_MS_UPMC 0x000000C0 /* UPMC */ --#if !defined(CONFIG_MPC834X) -+#if !defined(CONFIG_MPC834x) - #define BR_ATOM 0x0000000C - #define BR_ATOM_SHIFT 2 - #endif -@@ -65,7 +65,7 @@ - #define UPMB 1 - #define UPMC 2 - --#if defined(CONFIG_MPC834X) -+#if defined(CONFIG_MPC834x) - #define BR_RES ~(BR_BA | BR_PS | BR_DECC | BR_WP | BR_MSEL | BR_V) - #else - #define BR_RES ~(BR_BA | BR_PS | BR_DECC | BR_WP | BR_MSEL | BR_ATOM | BR_V) -diff --git a/include/asm-ppc/global_data.h b/include/asm-ppc/global_data.h -index e5a3b2c..244c161 100644 ---- a/include/asm-ppc/global_data.h -+++ b/include/asm-ppc/global_data.h -@@ -56,17 +56,17 @@ typedef struct global_data { - #endif - #endif - unsigned long mem_clk; --#if defined(CONFIG_MPC83XX) -+#if defined(CONFIG_MPC83xx) - /* There are other clocks in the MPC83XX */ - u32 csb_clk; --#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X) -+#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x) - u32 tsec1_clk; - u32 tsec2_clk; - u32 usbdr_clk; - #endif --#if defined (CONFIG_MPC834X) -+#if defined (CONFIG_MPC834x) - u32 usbmph_clk; --#endif /* CONFIG_MPC834X */ -+#endif /* CONFIG_MPC834x */ - #if defined(CONFIG_MPC8315) - u32 tdm_clk; - #endif -@@ -75,24 +75,24 @@ typedef struct global_data { - u32 lbiu_clk; - u32 lclk_clk; - u32 pci_clk; --#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC831X) -+#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC831x) - u32 pciexp1_clk; - u32 pciexp2_clk; - #endif --#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC8315) -+#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315) - u32 sata_clk; - #endif - #if defined(CONFIG_MPC8360) - u32 mem_sec_clk; - #endif /* CONFIG_MPC8360 */ - #endif --#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC8536) -+#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8536) - u32 sdhc_clk; - #endif - #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) - u32 lbc_clk; - #endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */ --#if defined(CONFIG_MPC83XX) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) -+#if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) - u32 i2c1_clk; - u32 i2c2_clk; - #endif -@@ -125,7 +125,7 @@ typedef struct global_data { - phys_size_t ram_size; /* RAM size */ - unsigned long reloc_off; /* Relocation Offset */ - unsigned long reset_status; /* reset status register at boot */ --#if defined(CONFIG_MPC83XX) -+#if defined(CONFIG_MPC83xx) - unsigned long arbiter_event_attributes; - unsigned long arbiter_event_address; - #endif -diff --git a/include/asm-ppc/immap_512x.h b/include/asm-ppc/immap_512x.h -index 8087869..3648a05 100644 ---- a/include/asm-ppc/immap_512x.h -+++ b/include/asm-ppc/immap_512x.h -@@ -1,5 +1,5 @@ - /* -- * (C) Copyright 2007 DENX Software Engineering -+ * (C) Copyright 2007-2009 DENX Software Engineering - * - * MPC512x Internal Memory Map - * -@@ -25,7 +25,28 @@ - #define __IMMAP_512x__ - - #include -+#if defined(CONFIG_E300) -+#include -+#endif - -+/* -+ * System reset offset (PowerPC standard) -+ */ -+#define EXC_OFF_SYS_RESET 0x0100 -+#define _START_OFFSET EXC_OFF_SYS_RESET -+ -+#define SPR_5121E 0x80180000 -+ -+/* -+ * IMMRBAR - Internal Memory Register Base Address -+ */ -+#define CONFIG_DEFAULT_IMMR 0xFF400000 /* Default IMMR base address */ -+#define IMMRBAR 0x0000 /* Register offset to immr */ -+#define IMMRBAR_BASE_ADDR 0xFFF00000 /* Base address mask */ -+#define IMMRBAR_RES ~(IMMRBAR_BASE_ADDR) -+ -+ -+#ifndef __ASSEMBLY__ - typedef struct law512x { - u32 bar; /* Base Addr Register */ - u32 ar; /* Attributes Register */ -@@ -60,6 +81,8 @@ typedef struct sysconf512x { - u8 res5[0xf8]; - } sysconf512x_t; - -+#define LAWBAR_BAR 0xFFFFF000 /* Base address mask */ -+ - /* - * Watch Dog Timer (WDT) Registers - */ -@@ -124,6 +147,34 @@ typedef struct reset512x { - u8 res1[0xDC]; - } reset512x_t; - -+/* RSR - Reset Status Register */ -+#define RSR_SWSR 0x00002000 /* software soft reset */ -+#define RSR_SWHR 0x00001000 /* software hard reset */ -+#define RSR_JHRS 0x00000200 /* jtag hreset */ -+#define RSR_JSRS 0x00000100 /* jtag sreset status */ -+#define RSR_CSHR 0x00000010 /* checkstop reset status */ -+#define RSR_SWRS 0x00000008 /* software watchdog reset status */ -+#define RSR_BMRS 0x00000004 /* bus monitop reset status */ -+#define RSR_SRS 0x00000002 /* soft reset status */ -+#define RSR_HRS 0x00000001 /* hard reset status */ -+#define RSR_RES ~(RSR_SWSR | RSR_SWHR |\ -+ RSR_JHRS | RSR_JSRS | RSR_CSHR | RSR_SWRS |\ -+ RSR_BMRS | RSR_SRS | RSR_HRS) -+ -+/* RMR - Reset Mode Register */ -+#define RMR_CSRE 0x00000001 /* checkstop reset enable */ -+#define RMR_CSRE_SHIFT 0 -+#define RMR_RES (~(RMR_CSRE)) -+ -+/* RCR - Reset Control Register */ -+#define RCR_SWHR 0x00000002 /* software hard reset */ -+#define RCR_SWSR 0x00000001 /* software soft reset */ -+#define RCR_RES (~(RCR_SWHR | RCR_SWSR)) -+ -+/* RCER - Reset Control Enable Register */ -+#define RCER_CRE 0x00000001 /* software hard reset */ -+#define RCER_RES (~(RCER_CRE)) -+ - /* - * Clock Module - */ -@@ -140,6 +191,59 @@ typedef struct clk512x { - u8 res1[0xa8]; - } clk512x_t; - -+/* SPMR - System PLL Mode Register */ -+#define SPMR_SPMF 0x0F000000 -+#define SPMR_SPMF_SHIFT 24 -+#define SPMR_CPMF 0x000F0000 -+#define SPMR_CPMF_SHIFT 16 -+ -+/* System Clock Control Register 1 commands */ -+#define CLOCK_SCCR1_CFG_EN 0x80000000 -+#define CLOCK_SCCR1_LPC_EN 0x40000000 -+#define CLOCK_SCCR1_NFC_EN 0x20000000 -+#define CLOCK_SCCR1_PATA_EN 0x10000000 -+#define CLOCK_SCCR1_PSC_EN(cn) (0x08000000 >> (cn)) -+#define CLOCK_SCCR1_PSCFIFO_EN 0x00008000 -+#define CLOCK_SCCR1_SATA_EN 0x00004000 -+#define CLOCK_SCCR1_FEC_EN 0x00002000 -+#define CLOCK_SCCR1_TPR_EN 0x00001000 -+#define CLOCK_SCCR1_PCI_EN 0x00000800 -+#define CLOCK_SCCR1_DDR_EN 0x00000400 -+ -+/* System Clock Control Register 2 commands */ -+#define CLOCK_SCCR2_DIU_EN 0x80000000 -+#define CLOCK_SCCR2_AXE_EN 0x40000000 -+#define CLOCK_SCCR2_MEM_EN 0x20000000 -+#define CLOCK_SCCR2_USB2_EN 0x10000000 -+#define CLOCK_SCCR2_USB1_EN 0x08000000 -+#define CLOCK_SCCR2_I2C_EN 0x04000000 -+#define CLOCK_SCCR2_BDLC_EN 0x02000000 -+#define CLOCK_SCCR2_SDHC_EN 0x01000000 -+#define CLOCK_SCCR2_SPDIF_EN 0x00800000 -+#define CLOCK_SCCR2_MBX_BUS_EN 0x00400000 -+#define CLOCK_SCCR2_MBX_EN 0x00200000 -+#define CLOCK_SCCR2_MBX_3D_EN 0x00100000 -+#define CLOCK_SCCR2_IIM_EN 0x00080000 -+ -+/* SCFR1 System Clock Frequency Register 1 */ -+#define SCFR1_IPS_DIV 0x3 -+#define SCFR1_IPS_DIV_MASK 0x03800000 -+#define SCFR1_IPS_DIV_SHIFT 23 -+ -+#define SCFR1_PCI_DIV 0x6 -+#define SCFR1_PCI_DIV_MASK 0x00700000 -+#define SCFR1_PCI_DIV_SHIFT 20 -+ -+#define SCFR1_LPC_DIV_MASK 0x00003800 -+#define SCFR1_LPC_DIV_SHIFT 11 -+ -+/* SCFR2 System Clock Frequency Register 2 */ -+#define SCFR2_SYS_DIV 0xFC000000 -+#define SCFR2_SYS_DIV_SHIFT 26 -+ -+/* SPCR - System Priority Configuration Register */ -+#define SPCR_TBEN 0x00400000 /* E300 core time base unit enable */ -+ - /* - * Power Management Control Module - */ -@@ -151,7 +255,14 @@ typedef struct pmc512x { - * General purpose I/O module - */ - typedef struct gpio512x { -- u8 fixme[0x100]; -+ u32 gpdir; -+ u32 gpodr; -+ u32 gpdat; -+ u32 gpier; -+ u32 gpimr; -+ u32 gpicr1; -+ u32 gpicr2; -+ u8 res0[0xE4]; - } gpio512x_t; - - /* -@@ -259,6 +370,40 @@ typedef struct pci_outbound_window { - u8 res2[4]; - } pot512x_t; - -+/* POTAR - PCI Outbound Translation Address Register */ -+#define POTAR_TA_MASK 0x000fffff -+ -+/* POBAR - PCI Outbound Base Address Register */ -+#define POBAR_BA_MASK 0x000fffff -+ -+/* POCMR - PCI Outbound Comparision Mask Register */ -+#define POCMR_EN 0x80000000 -+#define POCMR_IO 0x40000000 /* 0-memory space 1-I/O space */ -+#define POCMR_PRE 0x20000000 /* prefetch enable */ -+#define POCMR_SBS 0x00100000 /* special byte swap enable */ -+#define POCMR_CM_MASK 0x000fffff -+#define POCMR_CM_4G 0x00000000 -+#define POCMR_CM_2G 0x00080000 -+#define POCMR_CM_1G 0x000C0000 -+#define POCMR_CM_512M 0x000E0000 -+#define POCMR_CM_256M 0x000F0000 -+#define POCMR_CM_128M 0x000F8000 -+#define POCMR_CM_64M 0x000FC000 -+#define POCMR_CM_32M 0x000FE000 -+#define POCMR_CM_16M 0x000FF000 -+#define POCMR_CM_8M 0x000FF800 -+#define POCMR_CM_4M 0x000FFC00 -+#define POCMR_CM_2M 0x000FFE00 -+#define POCMR_CM_1M 0x000FFF00 -+#define POCMR_CM_512K 0x000FFF80 -+#define POCMR_CM_256K 0x000FFFC0 -+#define POCMR_CM_128K 0x000FFFE0 -+#define POCMR_CM_64K 0x000FFFF0 -+#define POCMR_CM_32K 0x000FFFF8 -+#define POCMR_CM_16K 0x000FFFFC -+#define POCMR_CM_8K 0x000FFFFE -+#define POCMR_CM_4K 0x000FFFFF -+ - /* - * Sequencer - */ -@@ -308,6 +453,27 @@ typedef struct pcictrl512x { - } pcictrl512x_t; - - -+/* PITAR - PCI Inbound Translation Address Register -+ */ -+#define PITAR_TA_MASK 0x000fffff -+ -+/* PIBAR - PCI Inbound Base/Extended Address Register -+ */ -+#define PIBAR_MASK 0xffffffff -+#define PIEBAR_EBA_MASK 0x000fffff -+ -+/* PIWAR - PCI Inbound Windows Attributes Register -+ */ -+#define PIWAR_EN 0x80000000 -+#define PIWAR_SBS 0x40000000 -+#define PIWAR_PF 0x20000000 -+#define PIWAR_RTT_MASK 0x000f0000 -+#define PIWAR_RTT_NO_SNOOP 0x00040000 -+#define PIWAR_RTT_SNOOP 0x00050000 -+#define PIWAR_WTT_MASK 0x0000f000 -+#define PIWAR_WTT_NO_SNOOP 0x00004000 -+#define PIWAR_WTT_SNOOP 0x00005000 -+ - /* - * MSCAN - */ -@@ -348,13 +514,34 @@ typedef struct i2c512x_dev { - u8 res0[0x0C]; - } i2c512x_dev_t; - -+/* Number of I2C buses */ -+#define I2C_BUS_CNT 3 -+ - typedef struct i2c512x { -- i2c512x_dev_t dev[3]; -+ i2c512x_dev_t dev[I2C_BUS_CNT]; - volatile u32 icr; - volatile u32 mifr; - u8 res0[0x98]; - } i2c512x_t; - -+/* I2Cn control register bits */ -+#define I2C_EN 0x80 -+#define I2C_IEN 0x40 -+#define I2C_STA 0x20 -+#define I2C_TX 0x10 -+#define I2C_TXAK 0x08 -+#define I2C_RSTA 0x04 -+#define I2C_INIT_MASK (I2C_EN | I2C_STA | I2C_TX | I2C_RSTA) -+ -+/* I2Cn status register bits */ -+#define I2C_CF 0x80 -+#define I2C_AAS 0x40 -+#define I2C_BB 0x20 -+#define I2C_AL 0x10 -+#define I2C_SRW 0x04 -+#define I2C_IF 0x02 -+#define I2C_RXAK 0x01 -+ - /* - * AXE - */ -@@ -380,7 +567,49 @@ typedef struct cfm512x { - * FEC - */ - typedef struct fec512x { -- u8 fixme[0x800]; -+ u32 fec_id; /* FEC_ID register */ -+ u32 ievent; /* Interrupt event register */ -+ u32 imask; /* Interrupt mask register */ -+ u32 reserved_01; -+ u32 r_des_active; /* Receive ring updated flag */ -+ u32 x_des_active; /* Transmit ring updated flag */ -+ u32 reserved_02[3]; -+ u32 ecntrl; /* Ethernet control register */ -+ u32 reserved_03[6]; -+ u32 mii_data; /* MII data register */ -+ u32 mii_speed; /* MII speed register */ -+ u32 reserved_04[7]; -+ u32 mib_control; /* MIB control/status register */ -+ u32 reserved_05[7]; -+ u32 r_cntrl; /* Receive control register */ -+ u32 r_hash; /* Receive hash */ -+ u32 reserved_06[14]; -+ u32 x_cntrl; /* Transmit control register */ -+ u32 reserved_07[7]; -+ u32 paddr1; /* Physical address low */ -+ u32 paddr2; /* Physical address high + type field */ -+ u32 op_pause; /* Opcode + pause duration */ -+ u32 reserved_08[10]; -+ u32 iaddr1; /* Upper 32 bits of individual hash table */ -+ u32 iaddr2; /* Lower 32 bits of individual hash table */ -+ u32 gaddr1; /* Upper 32 bits of group hash table */ -+ u32 gaddr2; /* Lower 32 bits of group hash table */ -+ u32 reserved_09[7]; -+ u32 x_wmrk; /* Transmit FIFO watermark */ -+ u32 reserved_10; -+ u32 r_bound; /* End of RAM */ -+ u32 r_fstart; /* Receive FIFO start address */ -+ u32 reserved_11[11]; -+ u32 r_des_start; /* Beginning of receive descriptor ring */ -+ u32 x_des_start; /* Pointer to beginning of transmit descriptor ring */ -+ u32 r_buff_size; /* Receive buffer size */ -+ u32 reserved_12[26]; -+ u32 dma_control; /* DMA control for IP bus, AMBA IF + DMA revision */ -+ u32 reserved_13[2]; -+ -+ u32 mib[128]; /* MIB Block Counters */ -+ -+ u32 fifo[256]; /* used by FEC, can only be accessed by DMA */ - } fec512x_t; - - /* -@@ -408,9 +637,223 @@ typedef struct pcidma512x { - * IO Control - */ - typedef struct ioctrl512x { -- u32 regs[0x400]; -+ u32 io_control_mem; /* MEM pad ctrl reg */ -+ u32 io_control_gp; /* GP pad ctrl reg */ -+ u32 io_control_lpc_clk; /* LPC_CLK pad ctrl reg */ -+ u32 io_control_lpc_oe; /* LPC_OE pad ctrl reg */ -+ u32 io_control_lpc_rw; /* LPC_R/W pad ctrl reg */ -+ u32 io_control_lpc_ack; /* LPC_ACK pad ctrl reg */ -+ u32 io_control_lpc_cs0; /* LPC_CS0 pad ctrl reg */ -+ u32 io_control_nfc_ce0; /* NFC_CE0 pad ctrl reg */ -+ u32 io_control_lpc_cs1; /* LPC_CS1 pad ctrl reg */ -+ u32 io_control_lpc_cs2; /* LPC_CS2 pad ctrl reg */ -+ u32 io_control_lpc_ax03; /* LPC_AX03 pad ctrl reg */ -+ u32 io_control_emb_ax02; /* EMB_AX02 pad ctrl reg */ -+ u32 io_control_emb_ax01; /* EMB_AX01 pad ctrl reg */ -+ u32 io_control_emb_ax00; /* EMB_AX00 pad ctrl reg */ -+ u32 io_control_emb_ad31; /* EMB_AD31 pad ctrl reg */ -+ u32 io_control_emb_ad30; /* EMB_AD30 pad ctrl reg */ -+ u32 io_control_emb_ad29; /* EMB_AD29 pad ctrl reg */ -+ u32 io_control_emb_ad28; /* EMB_AD28 pad ctrl reg */ -+ u32 io_control_emb_ad27; /* EMB_AD27 pad ctrl reg */ -+ u32 io_control_emb_ad26; /* EMB_AD26 pad ctrl reg */ -+ u32 io_control_emb_ad25; /* EMB_AD25 pad ctrl reg */ -+ u32 io_control_emb_ad24; /* EMB_AD24 pad ctrl reg */ -+ u32 io_control_emb_ad23; /* EMB_AD23 pad ctrl reg */ -+ u32 io_control_emb_ad22; /* EMB_AD22 pad ctrl reg */ -+ u32 io_control_emb_ad21; /* EMB_AD21 pad ctrl reg */ -+ u32 io_control_emb_ad20; /* EMB_AD20 pad ctrl reg */ -+ u32 io_control_emb_ad19; /* EMB_AD19 pad ctrl reg */ -+ u32 io_control_emb_ad18; /* EMB_AD18 pad ctrl reg */ -+ u32 io_control_emb_ad17; /* EMB_AD17 pad ctrl reg */ -+ u32 io_control_emb_ad16; /* EMB_AD16 pad ctrl reg */ -+ u32 io_control_emb_ad15; /* EMB_AD15 pad ctrl reg */ -+ u32 io_control_emb_ad14; /* EMB_AD14 pad ctrl reg */ -+ u32 io_control_emb_ad13; /* EMB_AD13 pad ctrl reg */ -+ u32 io_control_emb_ad12; /* EMB_AD12 pad ctrl reg */ -+ u32 io_control_emb_ad11; /* EMB_AD11 pad ctrl reg */ -+ u32 io_control_emb_ad10; /* EMB_AD10 pad ctrl reg */ -+ u32 io_control_emb_ad09; /* EMB_AD09 pad ctrl reg */ -+ u32 io_control_emb_ad08; /* EMB_AD08 pad ctrl reg */ -+ u32 io_control_emb_ad07; /* EMB_AD07 pad ctrl reg */ -+ u32 io_control_emb_ad06; /* EMB_AD06 pad ctrl reg */ -+ u32 io_control_emb_ad05; /* EMB_AD05 pad ctrl reg */ -+ u32 io_control_emb_ad04; /* EMB_AD04 pad ctrl reg */ -+ u32 io_control_emb_ad03; /* EMB_AD03 pad ctrl reg */ -+ u32 io_control_emb_ad02; /* EMB_AD02 pad ctrl reg */ -+ u32 io_control_emb_ad01; /* EMB_AD01 pad ctrl reg */ -+ u32 io_control_emb_ad00; /* EMB_AD00 pad ctrl reg */ -+ u32 io_control_pata_ce1; /* PATA_CE1 pad ctrl reg */ -+ u32 io_control_pata_ce2; /* PATA_CE2 pad ctrl reg */ -+ u32 io_control_pata_isolate; /* PATA_ISOLATE pad ctrl reg */ -+ u32 io_control_pata_ior; /* PATA_IOR pad ctrl reg */ -+ u32 io_control_pata_iow; /* PATA_IOW pad ctrl reg */ -+ u32 io_control_pata_iochrdy; /* PATA_IOCHRDY pad ctrl reg */ -+ u32 io_control_pata_intrq; /* PATA_INTRQ pad ctrl reg */ -+ u32 io_control_pata_drq; /* PATA_DRQ pad ctrl reg */ -+ u32 io_control_pata_dack; /* PATA_DACK pad ctrl reg */ -+ u32 io_control_nfc_wp; /* NFC_WP pad ctrl reg */ -+ u32 io_control_nfc_rb; /* NFC_RB pad ctrl reg */ -+ u32 io_control_nfc_ale; /* NFC_ALE pad ctrl reg */ -+ u32 io_control_nfc_cle; /* NFC_CLE pad ctrl reg */ -+ u32 io_control_nfc_we; /* NFC_WE pad ctrl reg */ -+ u32 io_control_nfc_re; /* NFC_RE pad ctrl reg */ -+ u32 io_control_pci_ad31; /* PCI_AD31 pad ctrl reg */ -+ u32 io_control_pci_ad30; /* PCI_AD30 pad ctrl reg */ -+ u32 io_control_pci_ad29; /* PCI_AD29 pad ctrl reg */ -+ u32 io_control_pci_ad28; /* PCI_AD28 pad ctrl reg */ -+ u32 io_control_pci_ad27; /* PCI_AD27 pad ctrl reg */ -+ u32 io_control_pci_ad26; /* PCI_AD26 pad ctrl reg */ -+ u32 io_control_pci_ad25; /* PCI_AD25 pad ctrl reg */ -+ u32 io_control_pci_ad24; /* PCI_AD24 pad ctrl reg */ -+ u32 io_control_pci_ad23; /* PCI_AD23 pad ctrl reg */ -+ u32 io_control_pci_ad22; /* PCI_AD22 pad ctrl reg */ -+ u32 io_control_pci_ad21; /* PCI_AD21 pad ctrl reg */ -+ u32 io_control_pci_ad20; /* PCI_AD20 pad ctrl reg */ -+ u32 io_control_pci_ad19; /* PCI_AD19 pad ctrl reg */ -+ u32 io_control_pci_ad18; /* PCI_AD18 pad ctrl reg */ -+ u32 io_control_pci_ad17; /* PCI_AD17 pad ctrl reg */ -+ u32 io_control_pci_ad16; /* PCI_AD16 pad ctrl reg */ -+ u32 io_control_pci_ad15; /* PCI_AD15 pad ctrl reg */ -+ u32 io_control_pci_ad14; /* PCI_AD14 pad ctrl reg */ -+ u32 io_control_pci_ad13; /* PCI_AD13 pad ctrl reg */ -+ u32 io_control_pci_ad12; /* PCI_AD12 pad ctrl reg */ -+ u32 io_control_pci_ad11; /* PCI_AD11 pad ctrl reg */ -+ u32 io_control_pci_ad10; /* PCI_AD10 pad ctrl reg */ -+ u32 io_control_pci_ad09; /* PCI_AD09 pad ctrl reg */ -+ u32 io_control_pci_ad08; /* PCI_AD08 pad ctrl reg */ -+ u32 io_control_pci_ad07; /* PCI_AD07 pad ctrl reg */ -+ u32 io_control_pci_ad06; /* PCI_AD06 pad ctrl reg */ -+ u32 io_control_pci_ad05; /* PCI_AD05 pad ctrl reg */ -+ u32 io_control_pci_ad04; /* PCI_AD04 pad ctrl reg */ -+ u32 io_control_pci_ad03; /* PCI_AD03 pad ctrl reg */ -+ u32 io_control_pci_ad02; /* PCI_AD02 pad ctrl reg */ -+ u32 io_control_pci_ad01; /* PCI_AD01 pad ctrl reg */ -+ u32 io_control_pci_ad00; /* PCI_AD00 pad ctrl reg */ -+ u32 io_control_pci_cbe0; /* PCI_CBE0 pad ctrl reg */ -+ u32 io_control_pci_cbe1; /* PCI_CBE1 pad ctrl reg */ -+ u32 io_control_pci_cbe2; /* PCI_CBE2 pad ctrl reg */ -+ u32 io_control_pci_cbe3; /* PCI_CBE3 pad ctrl reg */ -+ u32 io_control_pci_grant2; /* PCI_GRANT2 pad ctrl reg */ -+ u32 io_control_pci_req2; /* PCI_REQ2 pad ctrl reg */ -+ u32 io_control_pci_grant1; /* PCI_GRANT1 pad ctrl reg */ -+ u32 io_control_pci_req1; /* PCI_REQ1 pad ctrl reg */ -+ u32 io_control_pci_grant0; /* PCI_GRANT0 pad ctrl reg */ -+ u32 io_control_pci_req0; /* PCI_REQ0 pad ctrl reg */ -+ u32 io_control_pci_inta; /* PCI_INTA pad ctrl reg */ -+ u32 io_control_pci_clk; /* PCI_CLK pad ctrl reg */ -+ u32 io_control_pci_rst; /* PCI_RST- pad ctrl reg */ -+ u32 io_control_pci_frame; /* PCI_FRAME pad ctrl reg */ -+ u32 io_control_pci_idsel; /* PCI_IDSEL pad ctrl reg */ -+ u32 io_control_pci_devsel; /* PCI_DEVSEL pad ctrl reg */ -+ u32 io_control_pci_irdy; /* PCI_IRDY pad ctrl reg */ -+ u32 io_control_pci_trdy; /* PCI_TRDY pad ctrl reg */ -+ u32 io_control_pci_stop; /* PCI_STOP pad ctrl reg */ -+ u32 io_control_pci_par; /* PCI_PAR pad ctrl reg */ -+ u32 io_control_pci_perr; /* PCI_PERR pad ctrl reg */ -+ u32 io_control_pci_serr; /* PCI_SERR pad ctrl reg */ -+ u32 io_control_spdif_txclk; /* SPDIF_TXCLK pad ctrl reg */ -+ u32 io_control_spdif_tx; /* SPDIF_TX pad ctrl reg */ -+ u32 io_control_spdif_rx; /* SPDIF_RX pad ctrl reg */ -+ u32 io_control_i2c0_scl; /* I2C0_SCL pad ctrl reg */ -+ u32 io_control_i2c0_sda; /* I2C0_SDA pad ctrl reg */ -+ u32 io_control_i2c1_scl; /* I2C1_SCL pad ctrl reg */ -+ u32 io_control_i2c1_sda; /* I2C1_SDA pad ctrl reg */ -+ u32 io_control_i2c2_scl; /* I2C2_SCL pad ctrl reg */ -+ u32 io_control_i2c2_sda; /* I2C2_SDA pad ctrl reg */ -+ u32 io_control_irq0; /* IRQ0 pad ctrl reg */ -+ u32 io_control_irq1; /* IRQ1 pad ctrl reg */ -+ u32 io_control_can1_tx; /* CAN1_TX pad ctrl reg */ -+ u32 io_control_can2_tx; /* CAN2_TX pad ctrl reg */ -+ u32 io_control_j1850_tx; /* J1850_TX pad ctrl reg */ -+ u32 io_control_j1850_rx; /* J1850_RX pad ctrl reg */ -+ u32 io_control_psc_mclk_in; /* PSC_MCLK_IN pad ctrl reg */ -+ u32 io_control_psc0_0; /* PSC0_0 pad ctrl reg */ -+ u32 io_control_psc0_1; /* PSC0_1 pad ctrl reg */ -+ u32 io_control_psc0_2; /* PSC0_2 pad ctrl reg */ -+ u32 io_control_psc0_3; /* PSC0_3 pad ctrl reg */ -+ u32 io_control_psc0_4; /* PSC0_4 pad ctrl reg */ -+ u32 io_control_psc1_0; /* PSC1_0 pad ctrl reg */ -+ u32 io_control_psc1_1; /* PSC1_1 pad ctrl reg */ -+ u32 io_control_psc1_2; /* PSC1_2 pad ctrl reg */ -+ u32 io_control_psc1_3; /* PSC1_3 pad ctrl reg */ -+ u32 io_control_psc1_4; /* PSC1_4 pad ctrl reg */ -+ u32 io_control_psc2_0; /* PSC2_0 pad ctrl reg */ -+ u32 io_control_psc2_1; /* PSC2_1 pad ctrl reg */ -+ u32 io_control_psc2_2; /* PSC2_2 pad ctrl reg */ -+ u32 io_control_psc2_3; /* PSC2_3 pad ctrl reg */ -+ u32 io_control_psc2_4; /* PSC2_4 pad ctrl reg */ -+ u32 io_control_psc3_0; /* PSC3_0 pad ctrl reg */ -+ u32 io_control_psc3_1; /* PSC3_1 pad ctrl reg */ -+ u32 io_control_psc3_2; /* PSC3_2 pad ctrl reg */ -+ u32 io_control_psc3_3; /* PSC3_3 pad ctrl reg */ -+ u32 io_control_psc3_4; /* PSC3_4 pad ctrl reg */ -+ u32 io_control_psc4_0; /* PSC4_0 pad ctrl reg */ -+ u32 io_control_psc4_1; /* PSC4_1 pad ctrl reg */ -+ u32 io_control_psc4_2; /* PSC4_2 pad ctrl reg */ -+ u32 io_control_psc4_3; /* PSC4_3 pad ctrl reg */ -+ u32 io_control_psc4_4; /* PSC4_4 pad ctrl reg */ -+ u32 io_control_psc5_0; /* PSC5_0 pad ctrl reg */ -+ u32 io_control_psc5_1; /* PSC5_1 pad ctrl reg */ -+ u32 io_control_psc5_2; /* PSC5_2 pad ctrl reg */ -+ u32 io_control_psc5_3; /* PSC5_3 pad ctrl reg */ -+ u32 io_control_psc5_4; /* PSC5_4 pad ctrl reg */ -+ u32 io_control_psc6_0; /* PSC6_0 pad ctrl reg */ -+ u32 io_control_psc6_1; /* PSC6_1 pad ctrl reg */ -+ u32 io_control_psc6_2; /* PSC6_2 pad ctrl reg */ -+ u32 io_control_psc6_3; /* PSC6_3 pad ctrl reg */ -+ u32 io_control_psc6_4; /* PSC6_4 pad ctrl reg */ -+ u32 io_control_psc7_0; /* PSC7_0 pad ctrl reg */ -+ u32 io_control_psc7_1; /* PSC7_1 pad ctrl reg */ -+ u32 io_control_psc7_2; /* PSC7_2 pad ctrl reg */ -+ u32 io_control_psc7_3; /* PSC7_3 pad ctrl reg */ -+ u32 io_control_psc7_4; /* PSC7_4 pad ctrl reg */ -+ u32 io_control_psc8_0; /* PSC8_0 pad ctrl reg */ -+ u32 io_control_psc8_1; /* PSC8_1 pad ctrl reg */ -+ u32 io_control_psc8_2; /* PSC8_2 pad ctrl reg */ -+ u32 io_control_psc8_3; /* PSC8_3 pad ctrl reg */ -+ u32 io_control_psc8_4; /* PSC8_4 pad ctrl reg */ -+ u32 io_control_psc9_0; /* PSC9_0 pad ctrl reg */ -+ u32 io_control_psc9_1; /* PSC9_1 pad ctrl reg */ -+ u32 io_control_psc9_2; /* PSC9_2 pad ctrl reg */ -+ u32 io_control_psc9_3; /* PSC9_3 pad ctrl reg */ -+ u32 io_control_psc9_4; /* PSC9_4 pad ctrl reg */ -+ u32 io_control_psc10_0; /* PSC10_0 pad ctrl reg */ -+ u32 io_control_psc10_1; /* PSC10_1 pad ctrl reg */ -+ u32 io_control_psc10_2; /* PSC10_2 pad ctrl reg */ -+ u32 io_control_psc10_3; /* PSC10_3 pad ctrl reg */ -+ u32 io_control_psc10_4; /* PSC10_4 pad ctrl reg */ -+ u32 io_control_psc11_0; /* PSC11_0 pad ctrl reg */ -+ u32 io_control_psc11_1; /* PSC11_1 pad ctrl reg */ -+ u32 io_control_psc11_2; /* PSC11_2 pad ctrl reg */ -+ u32 io_control_psc11_3; /* PSC11_3 pad ctrl reg */ -+ u32 io_control_psc11_4; /* PSC11_4 pad ctrl reg */ -+ u32 io_control_ckstp_out; /* CKSTP_OUT pad ctrl reg */ -+ u32 io_control_usb_phy_drvvbus; /* USB2_DRVVBUS pad ctrl reg */ -+ u8 reserved[0x0cfc]; /* fill to 4096 bytes size */ - } ioctrl512x_t; - -+/* Indexes in regs array */ -+/* Set for DDR */ -+#define IOCTRL_MUX_DDR 0x00000036 -+ -+/* IO pin fields */ -+#define IO_PIN_FMUX(v) ((v) << 7) /* pin function */ -+#define IO_PIN_HOLD(v) ((v) << 5) /* hold time, pci only */ -+#define IO_PIN_PUD(v) ((v) << 4) /* if PUE, 0=pull-down, 1=pull-up */ -+#define IO_PIN_PUE(v) ((v) << 3) /* pull up/down enable */ -+#define IO_PIN_ST(v) ((v) << 2) /* schmitt trigger */ -+#define IO_PIN_DS(v) ((v)) /* slew rate */ -+ -+typedef struct iopin_t { -+ int p_offset; /* offset from IOCTL_MEM_OFFSET */ -+ int nr_pins; /* number of pins to set this way */ -+ int bit_or; /* or in the value instead of overwrite */ -+ u_long val; /* value to write or or */ -+}iopin_t; -+ -+void iopin_initialize(iopin_t *,int); -+ - /* - * IIM - */ -@@ -447,7 +890,8 @@ typedef struct lpc512x { - u32 cs_bcr; /* Chip Select Burst Control Register */ - u32 cs_dccr; /* Chip Select Deadcycle Control Register */ - u32 cs_hccr; /* Chip Select Holdcycle Control Register */ -- u8 res0[0xcc]; -+ u32 altr; /* Address Latch Timing Register */ -+ u8 res0[0xc8]; - u32 sclpc_psr; /* SCLPC Packet Size Register */ - u32 sclpc_sar; /* SCLPC Start Address Register */ - u32 sclpc_cr; /* SCLPC Control Register */ -@@ -591,6 +1035,51 @@ typedef struct psc512x { - #define rfdata_32 rfdata_buffer.buffer_32 - } psc512x_t; - -+/* PSC FIFO Command values */ -+#define PSC_FIFO_RESET_SLICE 0x80 -+#define PSC_FIFO_ENABLE_SLICE 0x01 -+ -+/* PSC FIFO Controller Command values */ -+#define FIFOC_ENABLE_CLOCK_GATE 0x01 -+#define FIFOC_DISABLE_CLOCK_GATE 0x00 -+ -+/* PSC FIFO status */ -+#define PSC_FIFO_EMPTY 0x01 -+ -+/* PSC Command values */ -+#define PSC_RX_ENABLE 0x01 -+#define PSC_RX_DISABLE 0x02 -+#define PSC_TX_ENABLE 0x04 -+#define PSC_TX_DISABLE 0x08 -+#define PSC_SEL_MODE_REG_1 0x10 -+#define PSC_RST_RX 0x20 -+#define PSC_RST_TX 0x30 -+#define PSC_RST_ERR_STAT 0x40 -+#define PSC_RST_BRK_CHG_INT 0x50 -+#define PSC_START_BRK 0x60 -+#define PSC_STOP_BRK 0x70 -+ -+/* PSC status register bits */ -+#define PSC_SR_CDE 0x0080 -+#define PSC_SR_TXEMP 0x0800 -+#define PSC_SR_OE 0x1000 -+#define PSC_SR_PE 0x2000 -+#define PSC_SR_FE 0x4000 -+#define PSC_SR_RB 0x8000 -+ -+/* PSC mode fields */ -+#define PSC_MODE_5_BITS 0x00 -+#define PSC_MODE_6_BITS 0x01 -+#define PSC_MODE_7_BITS 0x02 -+#define PSC_MODE_8_BITS 0x03 -+#define PSC_MODE_PAREVEN 0x00 -+#define PSC_MODE_PARODD 0x04 -+#define PSC_MODE_PARFORCE 0x08 -+#define PSC_MODE_PARNONE 0x10 -+#define PSC_MODE_ENTIMEOUT 0x20 -+#define PSC_MODE_RXRTS 0x80 -+#define PSC_MODE_1_STOPBIT 0x07 -+ - /* - * FIFOC - */ -@@ -604,6 +1093,76 @@ typedef struct fifoc512x { - } fifoc512x_t; - - /* -+ * Centralized FIFO Controller has internal memory for all 12 PSCs FIFOs -+ * -+ * NOTE: individual PSC units are free to use whatever area (and size) of the -+ * FIFOC internal memory, so make sure memory areas for FIFO slices used by -+ * different PSCs do not overlap! -+ * -+ * Overall size of FIFOC memory is not documented in the MPC5121e RM, but -+ * tests indicate that it is 1024 words total. -+ */ -+#define FIFOC_PSC0_TX_SIZE 0x0 /* number of 4-byte words for FIFO slice */ -+#define FIFOC_PSC0_TX_ADDR 0x0 -+#define FIFOC_PSC0_RX_SIZE 0x0 -+#define FIFOC_PSC0_RX_ADDR 0x0 -+ -+#define FIFOC_PSC1_TX_SIZE 0x0 -+#define FIFOC_PSC1_TX_ADDR 0x0 -+#define FIFOC_PSC1_RX_SIZE 0x0 -+#define FIFOC_PSC1_RX_ADDR 0x0 -+ -+#define FIFOC_PSC2_TX_SIZE 0x0 -+#define FIFOC_PSC2_TX_ADDR 0x0 -+#define FIFOC_PSC2_RX_SIZE 0x0 -+#define FIFOC_PSC2_RX_ADDR 0x0 -+ -+#define FIFOC_PSC3_TX_SIZE 0x04 -+#define FIFOC_PSC3_TX_ADDR 0x0 -+#define FIFOC_PSC3_RX_SIZE 0x04 -+#define FIFOC_PSC3_RX_ADDR 0x10 -+ -+#define FIFOC_PSC4_TX_SIZE 0x0 -+#define FIFOC_PSC4_TX_ADDR 0x0 -+#define FIFOC_PSC4_RX_SIZE 0x0 -+#define FIFOC_PSC4_RX_ADDR 0x0 -+ -+#define FIFOC_PSC5_TX_SIZE 0x0 -+#define FIFOC_PSC5_TX_ADDR 0x0 -+#define FIFOC_PSC5_RX_SIZE 0x0 -+#define FIFOC_PSC5_RX_ADDR 0x0 -+ -+#define FIFOC_PSC6_TX_SIZE 0x0 -+#define FIFOC_PSC6_TX_ADDR 0x0 -+#define FIFOC_PSC6_RX_SIZE 0x0 -+#define FIFOC_PSC6_RX_ADDR 0x0 -+ -+#define FIFOC_PSC7_TX_SIZE 0x0 -+#define FIFOC_PSC7_TX_ADDR 0x0 -+#define FIFOC_PSC7_RX_SIZE 0x0 -+#define FIFOC_PSC7_RX_ADDR 0x0 -+ -+#define FIFOC_PSC8_TX_SIZE 0x0 -+#define FIFOC_PSC8_TX_ADDR 0x0 -+#define FIFOC_PSC8_RX_SIZE 0x0 -+#define FIFOC_PSC8_RX_ADDR 0x0 -+ -+#define FIFOC_PSC9_TX_SIZE 0x0 -+#define FIFOC_PSC9_TX_ADDR 0x0 -+#define FIFOC_PSC9_RX_SIZE 0x0 -+#define FIFOC_PSC9_RX_ADDR 0x0 -+ -+#define FIFOC_PSC10_TX_SIZE 0x0 -+#define FIFOC_PSC10_TX_ADDR 0x0 -+#define FIFOC_PSC10_RX_SIZE 0x0 -+#define FIFOC_PSC10_RX_ADDR 0x0 -+ -+#define FIFOC_PSC11_TX_SIZE 0x0 -+#define FIFOC_PSC11_TX_ADDR 0x0 -+#define FIFOC_PSC11_RX_SIZE 0x0 -+#define FIFOC_PSC11_RX_ADDR 0x0 -+ -+/* - * SATA - */ - typedef struct sata512x { -@@ -660,4 +1219,13 @@ typedef struct immap { - sata512x_t sata; /* Serial ATA */ - u8 res13[0xde000]; - } immap_t; -+ -+/* provide interface to get PATA base address */ -+static inline u32 get_pata_base (void) -+{ -+ volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; -+ return (u32)(&im->pata); -+} -+#endif /* __ASSEMBLY__ */ -+ - #endif /* __IMMAP_512x__ */ -diff --git a/include/asm-ppc/immap_83xx.h b/include/asm-ppc/immap_83xx.h -index 7b847f8..8f945a1 100644 ---- a/include/asm-ppc/immap_83xx.h -+++ b/include/asm-ppc/immap_83xx.h -@@ -1,5 +1,5 @@ - /* -- * (C) Copyright 2004-2007 Freescale Semiconductor, Inc. -+ * (C) Copyright 2004-2009 Freescale Semiconductor, Inc. - * - * MPC83xx Internal Memory Map - * -@@ -656,7 +656,7 @@ typedef struct tdmdmac83xx { - u8 fixme[0x2000]; - } tdmdmac83xx_t; - --#if defined(CONFIG_MPC834X) -+#if defined(CONFIG_MPC834x) - typedef struct immap { - sysconf83xx_t sysconf; /* System configuration */ - wdt83xx_t wdt; /* Watch Dog Timer (WDT) Registers */ -@@ -773,7 +773,7 @@ typedef struct immap { - u8 res12[0x1CF00]; - } immap_t; - --#elif defined(CONFIG_MPC837X) -+#elif defined(CONFIG_MPC837x) - typedef struct immap { - sysconf83xx_t sysconf; /* System configuration */ - wdt83xx_t wdt; /* Watch Dog Timer (WDT) Registers */ -@@ -857,7 +857,7 @@ typedef struct immap { - u8 qe[0x100000]; /* QE block */ - } immap_t; - --#elif defined(CONFIG_MPC832X) -+#elif defined(CONFIG_MPC832x) - typedef struct immap { - sysconf83xx_t sysconf; /* System configuration */ - wdt83xx_t wdt; /* Watch Dog Timer (WDT) Registers */ -@@ -897,4 +897,7 @@ typedef struct immap { - - #define CONFIG_SYS_MPC83xx_ESDHC_OFFSET (0x2e000) - #define CONFIG_SYS_MPC83xx_ESDHC_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_ESDHC_OFFSET) -+#define CONFIG_SYS_MPC83xx_USB_OFFSET 0x23000 -+#define CONFIG_SYS_MPC83xx_USB_ADDR \ -+ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_USB_OFFSET) - #endif /* __IMMAP_83xx__ */ -diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h -index d3c6b86..db2bdf0 100644 ---- a/include/asm-ppc/immap_85xx.h -+++ b/include/asm-ppc/immap_85xx.h -@@ -1,7 +1,7 @@ - /* - * MPC85xx Internal Memory Map - * -- * Copyright 2007 Freescale Semiconductor. -+ * Copyright 2007-2009 Freescale Semiconductor, Inc. - * - * Copyright(c) 2002,2003 Motorola Inc. - * Xianghua Xiao (x.xiao@motorola.com) -@@ -12,6 +12,7 @@ - #define __IMMAP_85xx__ - - #include -+#include - #include - #include - -@@ -406,80 +407,9 @@ typedef struct ccsr_l2cache { - */ - typedef struct ccsr_dma { - char res1[256]; -- uint mr0; /* 0x21100 - DMA 0 Mode Register */ -- uint sr0; /* 0x21104 - DMA 0 Status Register */ -- char res2[4]; -- uint clndar0; /* 0x2110c - DMA 0 Current Link Descriptor Address Register */ -- uint satr0; /* 0x21110 - DMA 0 Source Attributes Register */ -- uint sar0; /* 0x21114 - DMA 0 Source Address Register */ -- uint datr0; /* 0x21118 - DMA 0 Destination Attributes Register */ -- uint dar0; /* 0x2111c - DMA 0 Destination Address Register */ -- uint bcr0; /* 0x21120 - DMA 0 Byte Count Register */ -- char res3[4]; -- uint nlndar0; /* 0x21128 - DMA 0 Next Link Descriptor Address Register */ -- char res4[8]; -- uint clabdar0; /* 0x21134 - DMA 0 Current List - Alternate Base Descriptor Address Register */ -- char res5[4]; -- uint nlsdar0; /* 0x2113c - DMA 0 Next List Descriptor Address Register */ -- uint ssr0; /* 0x21140 - DMA 0 Source Stride Register */ -- uint dsr0; /* 0x21144 - DMA 0 Destination Stride Register */ -- char res6[56]; -- uint mr1; /* 0x21180 - DMA 1 Mode Register */ -- uint sr1; /* 0x21184 - DMA 1 Status Register */ -- char res7[4]; -- uint clndar1; /* 0x2118c - DMA 1 Current Link Descriptor Address Register */ -- uint satr1; /* 0x21190 - DMA 1 Source Attributes Register */ -- uint sar1; /* 0x21194 - DMA 1 Source Address Register */ -- uint datr1; /* 0x21198 - DMA 1 Destination Attributes Register */ -- uint dar1; /* 0x2119c - DMA 1 Destination Address Register */ -- uint bcr1; /* 0x211a0 - DMA 1 Byte Count Register */ -- char res8[4]; -- uint nlndar1; /* 0x211a8 - DMA 1 Next Link Descriptor Address Register */ -- char res9[8]; -- uint clabdar1; /* 0x211b4 - DMA 1 Current List - Alternate Base Descriptor Address Register */ -- char res10[4]; -- uint nlsdar1; /* 0x211bc - DMA 1 Next List Descriptor Address Register */ -- uint ssr1; /* 0x211c0 - DMA 1 Source Stride Register */ -- uint dsr1; /* 0x211c4 - DMA 1 Destination Stride Register */ -- char res11[56]; -- uint mr2; /* 0x21200 - DMA 2 Mode Register */ -- uint sr2; /* 0x21204 - DMA 2 Status Register */ -- char res12[4]; -- uint clndar2; /* 0x2120c - DMA 2 Current Link Descriptor Address Register */ -- uint satr2; /* 0x21210 - DMA 2 Source Attributes Register */ -- uint sar2; /* 0x21214 - DMA 2 Source Address Register */ -- uint datr2; /* 0x21218 - DMA 2 Destination Attributes Register */ -- uint dar2; /* 0x2121c - DMA 2 Destination Address Register */ -- uint bcr2; /* 0x21220 - DMA 2 Byte Count Register */ -- char res13[4]; -- uint nlndar2; /* 0x21228 - DMA 2 Next Link Descriptor Address Register */ -- char res14[8]; -- uint clabdar2; /* 0x21234 - DMA 2 Current List - Alternate Base Descriptor Address Register */ -- char res15[4]; -- uint nlsdar2; /* 0x2123c - DMA 2 Next List Descriptor Address Register */ -- uint ssr2; /* 0x21240 - DMA 2 Source Stride Register */ -- uint dsr2; /* 0x21244 - DMA 2 Destination Stride Register */ -- char res16[56]; -- uint mr3; /* 0x21280 - DMA 3 Mode Register */ -- uint sr3; /* 0x21284 - DMA 3 Status Register */ -- char res17[4]; -- uint clndar3; /* 0x2128c - DMA 3 Current Link Descriptor Address Register */ -- uint satr3; /* 0x21290 - DMA 3 Source Attributes Register */ -- uint sar3; /* 0x21294 - DMA 3 Source Address Register */ -- uint datr3; /* 0x21298 - DMA 3 Destination Attributes Register */ -- uint dar3; /* 0x2129c - DMA 3 Destination Address Register */ -- uint bcr3; /* 0x212a0 - DMA 3 Byte Count Register */ -- char res18[4]; -- uint nlndar3; /* 0x212a8 - DMA 3 Next Link Descriptor Address Register */ -- char res19[8]; -- uint clabdar3; /* 0x212b4 - DMA 3 Current List - Alternate Base Descriptor Address Register */ -- char res20[4]; -- uint nlsdar3; /* 0x212bc - DMA 3 Next List Descriptor Address Register */ -- uint ssr3; /* 0x212c0 - DMA 3 Source Stride Register */ -- uint dsr3; /* 0x212c4 - DMA 3 Destination Stride Register */ -- char res21[56]; -+ struct fsl_dma dma[4]; - uint dgsr; /* 0x21300 - DMA General Status Register */ -- char res22[11516]; -+ char res2[11516]; - } ccsr_dma_t; - - /* -@@ -1596,8 +1526,11 @@ typedef struct ccsr_gur { - #define MPC85xx_PORPLLSR_DDR_RATIO 0x00003e00 - #define MPC85xx_PORPLLSR_DDR_RATIO_SHIFT 9 - #endif -+#define MPC85xx_PORPLLSR_QE_RATIO 0x3e000000 -+#define MPC85xx_PORPLLSR_QE_RATIO_SHIFT 25 - uint porbmsr; /* 0xe0004 - POR boot mode status register */ - #define MPC85xx_PORBMSR_HA 0x00070000 -+#define MPC85xx_PORBMSR_HA_SHIFT 16 - uint porimpscr; /* 0xe0008 - POR I/O impedance status and control register */ - uint pordevsr; /* 0xe000c - POR I/O device status regsiter */ - #define MPC85xx_PORDEVSR_SGMII1_DIS 0x20000000 -@@ -1607,6 +1540,7 @@ typedef struct ccsr_gur { - #define MPC85xx_PORDEVSR_SRDS2_IO_SEL 0x38000000 - #define MPC85xx_PORDEVSR_PCI1 0x00800000 - #define MPC85xx_PORDEVSR_IO_SEL 0x00780000 -+#define MPC85xx_PORDEVSR_IO_SEL_SHIFT 19 - #define MPC85xx_PORDEVSR_PCI2_ARB 0x00040000 - #define MPC85xx_PORDEVSR_PCI1_ARB 0x00020000 - #define MPC85xx_PORDEVSR_PCI1_PCI32 0x00010000 -@@ -1732,5 +1666,8 @@ typedef struct ccsr_gur { - #define CONFIG_SYS_MPC85xx_SERDES1_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_SERDES2_OFFSET) - #define CONFIG_SYS_MPC85xx_SERDES2_OFFSET (0xE3100) - #define CONFIG_SYS_MPC85xx_SERDES2_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_SERDES2_OFFSET) -+#define CONFIG_SYS_MPC85xx_USB_OFFSET 0x22000 -+#define CONFIG_SYS_MPC85xx_USB_ADDR \ -+ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB_OFFSET) - - #endif /*__IMMAP_85xx__*/ -diff --git a/include/asm-ppc/immap_86xx.h b/include/asm-ppc/immap_86xx.h -index 470385f..a839834 100644 ---- a/include/asm-ppc/immap_86xx.h -+++ b/include/asm-ppc/immap_86xx.h -@@ -11,6 +11,7 @@ - #define __IMMAP_86xx__ - - #include -+#include - #include - - /* Local-Access Registers and MCM Registers(0x0000-0x2000) */ -@@ -386,80 +387,9 @@ typedef struct ccsr_ht { - /* DMA Registers(0x2_1000-0x2_2000) */ - typedef struct ccsr_dma { - char res1[256]; -- uint mr0; /* 0x21100 - DMA 0 Mode Register */ -- uint sr0; /* 0x21104 - DMA 0 Status Register */ -- char res2[4]; -- uint clndar0; /* 0x2110c - DMA 0 Current Link Descriptor Address Register */ -- uint satr0; /* 0x21110 - DMA 0 Source Attributes Register */ -- uint sar0; /* 0x21114 - DMA 0 Source Address Register */ -- uint datr0; /* 0x21118 - DMA 0 Destination Attributes Register */ -- uint dar0; /* 0x2111c - DMA 0 Destination Address Register */ -- uint bcr0; /* 0x21120 - DMA 0 Byte Count Register */ -- char res3[4]; -- uint nlndar0; /* 0x21128 - DMA 0 Next Link Descriptor Address Register */ -- char res4[8]; -- uint clabdar0; /* 0x21134 - DMA 0 Current List - Alternate Base Descriptor Address Register */ -- char res5[4]; -- uint nlsdar0; /* 0x2113c - DMA 0 Next List Descriptor Address Register */ -- uint ssr0; /* 0x21140 - DMA 0 Source Stride Register */ -- uint dsr0; /* 0x21144 - DMA 0 Destination Stride Register */ -- char res6[56]; -- uint mr1; /* 0x21180 - DMA 1 Mode Register */ -- uint sr1; /* 0x21184 - DMA 1 Status Register */ -- char res7[4]; -- uint clndar1; /* 0x2118c - DMA 1 Current Link Descriptor Address Register */ -- uint satr1; /* 0x21190 - DMA 1 Source Attributes Register */ -- uint sar1; /* 0x21194 - DMA 1 Source Address Register */ -- uint datr1; /* 0x21198 - DMA 1 Destination Attributes Register */ -- uint dar1; /* 0x2119c - DMA 1 Destination Address Register */ -- uint bcr1; /* 0x211a0 - DMA 1 Byte Count Register */ -- char res8[4]; -- uint nlndar1; /* 0x211a8 - DMA 1 Next Link Descriptor Address Register */ -- char res9[8]; -- uint clabdar1; /* 0x211b4 - DMA 1 Current List - Alternate Base Descriptor Address Register */ -- char res10[4]; -- uint nlsdar1; /* 0x211bc - DMA 1 Next List Descriptor Address Register */ -- uint ssr1; /* 0x211c0 - DMA 1 Source Stride Register */ -- uint dsr1; /* 0x211c4 - DMA 1 Destination Stride Register */ -- char res11[56]; -- uint mr2; /* 0x21200 - DMA 2 Mode Register */ -- uint sr2; /* 0x21204 - DMA 2 Status Register */ -- char res12[4]; -- uint clndar2; /* 0x2120c - DMA 2 Current Link Descriptor Address Register */ -- uint satr2; /* 0x21210 - DMA 2 Source Attributes Register */ -- uint sar2; /* 0x21214 - DMA 2 Source Address Register */ -- uint datr2; /* 0x21218 - DMA 2 Destination Attributes Register */ -- uint dar2; /* 0x2121c - DMA 2 Destination Address Register */ -- uint bcr2; /* 0x21220 - DMA 2 Byte Count Register */ -- char res13[4]; -- uint nlndar2; /* 0x21228 - DMA 2 Next Link Descriptor Address Register */ -- char res14[8]; -- uint clabdar2; /* 0x21234 - DMA 2 Current List - Alternate Base Descriptor Address Register */ -- char res15[4]; -- uint nlsdar2; /* 0x2123c - DMA 2 Next List Descriptor Address Register */ -- uint ssr2; /* 0x21240 - DMA 2 Source Stride Register */ -- uint dsr2; /* 0x21244 - DMA 2 Destination Stride Register */ -- char res16[56]; -- uint mr3; /* 0x21280 - DMA 3 Mode Register */ -- uint sr3; /* 0x21284 - DMA 3 Status Register */ -- char res17[4]; -- uint clndar3; /* 0x2128c - DMA 3 Current Link Descriptor Address Register */ -- uint satr3; /* 0x21290 - DMA 3 Source Attributes Register */ -- uint sar3; /* 0x21294 - DMA 3 Source Address Register */ -- uint datr3; /* 0x21298 - DMA 3 Destination Attributes Register */ -- uint dar3; /* 0x2129c - DMA 3 Destination Address Register */ -- uint bcr3; /* 0x212a0 - DMA 3 Byte Count Register */ -- char res18[4]; -- uint nlndar3; /* 0x212a8 - DMA 3 Next Link Descriptor Address Register */ -- char res19[8]; -- uint clabdar3; /* 0x212b4 - DMA 3 Current List - Alternate Base Descriptor Address Register */ -- char res20[4]; -- uint nlsdar3; /* 0x212bc - DMA 3 Next List Descriptor Address Register */ -- uint ssr3; /* 0x212c0 - DMA 3 Source Stride Register */ -- uint dsr3; /* 0x212c4 - DMA 3 Destination Stride Register */ -- char res21[56]; -+ struct fsl_dma dma[4]; - uint dgsr; /* 0x21300 - DMA General Status Register */ -- char res22[3324]; -+ char res2[3324]; - } ccsr_dma_t; - - /* tsec1-4: 24000-28000 */ -@@ -1365,5 +1295,7 @@ extern immap_t *immr; - #define CONFIG_SYS_MPC86xx_DDR_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC86xx_DDR_OFFSET) - #define CONFIG_SYS_MPC86xx_DDR2_OFFSET (0x6000) - #define CONFIG_SYS_MPC86xx_DDR2_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC86xx_DDR2_OFFSET) -+#define CONFIG_SYS_MPC86xx_DMA_OFFSET (0x21000) -+#define CONFIG_SYS_MPC86xx_DMA_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC86xx_DMA_OFFSET) - - #endif /*__IMMAP_86xx__*/ -diff --git a/include/asm-ppc/immap_qe.h b/include/asm-ppc/immap_qe.h -index 55667ca..531cfc8 100644 ---- a/include/asm-ppc/immap_qe.h -+++ b/include/asm-ppc/immap_qe.h -@@ -3,7 +3,7 @@ - * The Internal Memory Map for devices with QE on them. This - * is the superset of all QE devices (8360, etc.). - * -- * Copyright (c) 2006 Freescale Semiconductor, Inc. -+ * Copyright (c) 2006-2009 Freescale Semiconductor, Inc. - * Author: Shlomi Gridih - * - * This program is free software; you can redistribute it and/or modify it -@@ -603,8 +603,19 @@ extern qe_map_t *qe_immr; - #define QE_MURAM_SIZE 0x20000UL - #elif defined(CONFIG_MPC8360) - #define QE_MURAM_SIZE 0xc000UL --#elif defined(CONFIG_MPC832X) -+#elif defined(CONFIG_MPC832x) - #define QE_MURAM_SIZE 0x4000UL - #endif - -+#if defined(CONFIG_MPC8323) -+#define MAX_QE_RISC 1 -+#define QE_NUM_OF_SNUM 28 -+#elif defined(CONFIG_MPC8569) -+#define MAX_QE_RISC 4 -+#define QE_NUM_OF_SNUM 46 -+#else -+#define MAX_QE_RISC 2 -+#define QE_NUM_OF_SNUM 28 -+#endif -+ - #endif /* __IMMAP_QE_H__ */ -diff --git a/include/asm-ppc/mpc8xxx_spi.h b/include/asm-ppc/mpc8xxx_spi.h -index 48b15e4..41737d3 100644 ---- a/include/asm-ppc/mpc8xxx_spi.h -+++ b/include/asm-ppc/mpc8xxx_spi.h -@@ -27,10 +27,10 @@ - - #include - --#if defined(CONFIG_MPC834X) || \ -+#if defined(CONFIG_MPC834x) || \ - defined(CONFIG_MPC8313) || \ - defined(CONFIG_MPC8315) || \ -- defined(CONFIG_MPC837X) -+ defined(CONFIG_MPC837x) - - typedef struct spi8xxx { - u8 res0[0x20]; /* 0x0-0x01f reserved */ -diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h -index 83e3581..e7db1c6 100644 ---- a/include/asm-ppc/processor.h -+++ b/include/asm-ppc/processor.h -@@ -923,7 +923,7 @@ - #if defined(CONFIG_MPC85xx) - #define IS_E_PROCESSOR(svr) (svr & 0x80000) - #else --#if defined(CONFIG_MPC83XX) -+#if defined(CONFIG_MPC83xx) - #define IS_E_PROCESSOR(spridr) (!(spridr & 0x00010000)) - #endif - #endif -@@ -934,6 +934,8 @@ - - #define SVR_8533 0x803400 - #define SVR_8533_E 0x803C00 -+#define SVR_8535 0x803701 -+#define SVR_8535_E 0x803F01 - #define SVR_8536 0x803700 - #define SVR_8536_E 0x803F00 - #define SVR_8540 0x803000 -@@ -1023,7 +1025,7 @@ struct cpu_type *identify_cpu(u32 ver); - #define CPU_TYPE_ENTRY(n, v) \ - { .name = #n, .soc_ver = SVR_##v, } - #else --#if defined(CONFIG_MPC83XX) -+#if defined(CONFIG_MPC83xx) - #define CPU_TYPE_ENTRY(x) {#x, SPR_##x} - #endif - #endif -diff --git a/include/asm-ppc/u-boot.h b/include/asm-ppc/u-boot.h -index e6c56e9..ea2d22d 100644 ---- a/include/asm-ppc/u-boot.h -+++ b/include/asm-ppc/u-boot.h -@@ -51,7 +51,7 @@ typedef struct bd_info { - #if defined(CONFIG_MPC5xxx) - unsigned long bi_mbar_base; /* base of internal registers */ - #endif --#if defined(CONFIG_MPC83XX) -+#if defined(CONFIG_MPC83xx) - unsigned long bi_immrbar; - #endif - #if defined(CONFIG_MPC8220) -diff --git a/include/command.h b/include/command.h -index bd47853..55caa6e 100644 ---- a/include/command.h -+++ b/include/command.h -@@ -71,7 +71,7 @@ int _do_help (cmd_tbl_t *cmd_start, int cmd_items, cmd_tbl_t * cmdtp, int - cmd_tbl_t *find_cmd(const char *cmd); - cmd_tbl_t *find_cmd_tbl (const char *cmd, cmd_tbl_t *table, int table_len); - --extern void cmd_usage(cmd_tbl_t *cmdtp); -+extern int cmd_usage(cmd_tbl_t *cmdtp); - - #ifdef CONFIG_AUTO_COMPLETE - extern void install_auto_complete(void); -diff --git a/include/common.h b/include/common.h -index 30fff7d..ff4f821 100644 ---- a/include/common.h -+++ b/include/common.h -@@ -1,5 +1,5 @@ - /* -- * (C) Copyright 2000-2007 -+ * (C) Copyright 2000-2009 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this -@@ -66,7 +66,6 @@ typedef volatile unsigned char vu_char; - #elif defined(CONFIG_MPC5xxx) - #include - #elif defined(CONFIG_MPC512X) --#include - #include - #elif defined(CONFIG_MPC8220) - #include -@@ -90,7 +89,7 @@ typedef volatile unsigned char vu_char; - #include - #include - #endif --#ifdef CONFIG_MPC83XX -+#ifdef CONFIG_MPC83xx - #include - #include - #endif -@@ -300,6 +299,9 @@ int misc_init_r (void); - /* common/exports.c */ - void jumptable_init(void); - -+/* common/kallsysm.c */ -+const char *symbol_lookup(unsigned long addr, unsigned long *caddr); -+ - /* api/api.c */ - void api_init (void); - -@@ -410,7 +412,7 @@ void trap_init (ulong); - defined (CONFIG_MPC8220) || \ - defined (CONFIG_MPC85xx) || \ - defined (CONFIG_MPC86xx) || \ -- defined (CONFIG_MPC83XX) -+ defined (CONFIG_MPC83xx) - unsigned char in8(unsigned int); - void out8(unsigned int, unsigned char); - unsigned short in16(unsigned int); -@@ -431,7 +433,7 @@ unsigned short in16(unsigned int); - void out16(unsigned int, unsigned short value); - #endif - --#if defined (CONFIG_MPC83XX) -+#if defined (CONFIG_MPC83xx) - void ppcDWload(unsigned int *addr, unsigned int *ret); - void ppcDWstore(unsigned int *addr, unsigned int *value); - #endif -@@ -548,7 +550,7 @@ void cpu_init_f (void); - int cpu_init_r (void); - #if defined(CONFIG_8260) - int prt_8260_rsr (void); --#elif defined(CONFIG_MPC83XX) -+#elif defined(CONFIG_MPC83xx) - int prt_83xx_rsr (void); - #endif - -diff --git a/include/configs/AR405.h b/include/configs/AR405.h -index 9f19269..73e34bd 100644 ---- a/include/configs/AR405.h -+++ b/include/configs/AR405.h -@@ -71,6 +71,7 @@ - #define CONFIG_MII 1 /* MII PHY management */ - #define CONFIG_PHY_ADDR 0 /* PHY address */ - #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ -+#define CONFIG_NET_MULTI - - - /* -diff --git a/include/configs/B2.h b/include/configs/B2.h -index 35fad5c..e5439f3 100644 ---- a/include/configs/B2.h -+++ b/include/configs/B2.h -@@ -39,6 +39,7 @@ - #define CONFIG_ARM_THUMB 1 /* this is an ARM7TDMI */ - #undef CONFIG_ARM7_REVD /* disable ARM720 REV.D Workarounds */ - #define CONFIG_SYS_NO_CP15_CACHE -+#define CONFIG_ARCH_CPU_INIT - - #define CONFIG_S3C44B0_CLOCK_SPEED 75 /* we have a 75Mhz S3C44B0*/ - -diff --git a/include/configs/BC3450.h b/include/configs/BC3450.h -index 9934f29..8c5a742 100644 ---- a/include/configs/BC3450.h -+++ b/include/configs/BC3450.h -@@ -347,6 +347,8 @@ - - /* Dynamic MTD partition support */ - #define CONFIG_CMD_MTDPARTS -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -+#define CONFIG_FLASH_CFI_MTD - #define MTDIDS_DEFAULT "nor0=TQM5200-0" - #define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \ - "1408k(kernel)," \ -diff --git a/include/configs/CMS700.h b/include/configs/CMS700.h -index 40fef88..ae8494d 100644 ---- a/include/configs/CMS700.h -+++ b/include/configs/CMS700.h -@@ -80,8 +80,6 @@ - - #define CONFIG_CMD_DHCP - #define CONFIG_CMD_BSP --#define CONFIG_CMD_PCI --#define CONFIG_CMD_IRQ - #define CONFIG_CMD_ELF - #define CONFIG_CMD_NAND - #define CONFIG_CMD_I2C -@@ -167,31 +165,6 @@ - #define CONFIG_SYS_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ - #define CONFIG_SYS_NAND_QUIET 1 - --/*----------------------------------------------------------------------- -- * PCI stuff -- *----------------------------------------------------------------------- -- */ --#define PCI_HOST_ADAPTER 0 /* configure as pci adapter */ --#define PCI_HOST_FORCE 1 /* configure as pci host */ --#define PCI_HOST_AUTO 2 /* detected via arbiter enable */ -- --#define CONFIG_PCI /* include pci support */ --#define CONFIG_PCI_HOST PCI_HOST_HOST /* select pci host function */ --#undef CONFIG_PCI_PNP /* do pci plug-and-play */ -- /* resource configuration */ -- --#undef CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */ -- --#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x12FE /* PCI Vendor ID: esd gmbh */ --#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x0405 /* PCI Device ID: CPCI-405 */ --#define CONFIG_SYS_PCI_CLASSCODE 0x0b20 /* PCI Class Code: Processor/PPC*/ --#define CONFIG_SYS_PCI_PTM1LA 0x00000000 /* point to sdram */ --#define CONFIG_SYS_PCI_PTM1MS 0xfc000001 /* 64MB, enable hard-wired to 1 */ --#define CONFIG_SYS_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */ --#define CONFIG_SYS_PCI_PTM2LA 0xffc00000 /* point to flash */ --#define CONFIG_SYS_PCI_PTM2MS 0xffc00001 /* 4MB, enable */ --#define CONFIG_SYS_PCI_PTM2PCI 0x04000000 /* Host: use this pci address */ -- - /* - * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is -@@ -222,21 +195,16 @@ - - #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ - --#if 0 /* test-only */ --#define CONFIG_SYS_JFFS2_FIRST_BANK 0 /* use for JFFS2 */ --#define CONFIG_SYS_JFFS2_NUM_BANKS 1 /* ! second bank contains U-Boot */ --#endif -- - /*----------------------------------------------------------------------- - * Start addresses for the final memory configuration - * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 - */ - #define CONFIG_SYS_SDRAM_BASE 0x00000000 --#define CONFIG_SYS_FLASH_BASE 0xFFFC0000 --#define CONFIG_SYS_MONITOR_BASE TEXT_BASE --#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Monitor */ --#define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */ -+#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE -+#define CONFIG_SYS_MONITOR_BASE TEXT_BASE -+#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1) -+#define CONFIG_SYS_MALLOC_LEN (256 * 1024) - - #if (CONFIG_SYS_MONITOR_BASE < FLASH_BASE0_PRELIM) - # define CONFIG_SYS_RAMBOOT 1 -@@ -291,8 +259,7 @@ - /*----------------------------------------------------------------------- - * FPGA stuff - */ --#define CONFIG_SYS_FPGA_XC95XL 1 /* using Xilinx XC95XL CPLD */ --#define CONFIG_SYS_FPGA_MAX_SIZE 32*1024 /* 32kByte is enough for CPLD */ -+#define CONFIG_SYS_XSVF_DEFAULT_ADDR 0xfffc0000 - - /* FPGA program pin configuration */ - #define CONFIG_SYS_FPGA_PRG 0x04000000 /* JTAG TMS pin (ppc output) */ -@@ -356,17 +323,7 @@ - * Default speed selection (cpu_plb_opb_ebc) in mhz. - * This value will be set if iic boot eprom is disabled. - */ --#if 0 --#define PLLMR0_DEFAULT PLLMR0_266_133_66_33 --#define PLLMR1_DEFAULT PLLMR1_266_133_66_33 --#endif --#if 0 --#define PLLMR0_DEFAULT PLLMR0_200_100_50_33 --#define PLLMR1_DEFAULT PLLMR1_200_100_50_33 --#endif --#if 1 - #define PLLMR0_DEFAULT PLLMR0_133_66_66_33 - #define PLLMR1_DEFAULT PLLMR1_133_66_66_33 --#endif - - #endif /* __CONFIG_H */ -diff --git a/include/configs/CPCI750.h b/include/configs/CPCI750.h -index 8494faa..d516c3c 100644 ---- a/include/configs/CPCI750.h -+++ b/include/configs/CPCI750.h -@@ -76,7 +76,8 @@ - - #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " - --#define CONFIG_AUTO_COMPLETE 1 -+#define CONFIG_CMDLINE_EDITING /* add command line history */ -+#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ - - /* Define which ETH port will be used for connecting the network */ - #define CONFIG_SYS_ETH_PORT ETH_0 -@@ -626,4 +627,6 @@ - - #define CONFIG_SYS_BOARD_ASM_INIT 1 - -+#define CPCI750_SLAVE_TEST (((in8(0xf0300000) & 0x80) == 0) ? 0 : 1) -+ - #endif /* __CONFIG_H */ -diff --git a/include/configs/CPCIISER4.h b/include/configs/CPCIISER4.h -index 3263712..b2679e5 100644 ---- a/include/configs/CPCIISER4.h -+++ b/include/configs/CPCIISER4.h -@@ -54,6 +54,7 @@ - #define CONFIG_MII 1 /* MII PHY management */ - #define CONFIG_PHY_ADDR 0 /* PHY address */ - #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ -+#define CONFIG_NET_MULTI - - - /* -diff --git a/include/configs/CRAYL1.h b/include/configs/CRAYL1.h -index 150bd29..96bf161 100644 ---- a/include/configs/CRAYL1.h -+++ b/include/configs/CRAYL1.h -@@ -45,6 +45,7 @@ - #define CONFIG_PHY_ADDR 1 /* PHY address; handling of ENET */ - #define CONFIG_BOARD_EARLY_INIT_F 1 /* early setup for 405gp */ - #define CONFIG_MISC_INIT_R 1 /* so that a misc_init_r() is called */ -+#define CONFIG_NET_MULTI - - /* set PRAM to keep U-Boot out, mem= to keep linux out, and initrd_hi to - * keep possible initrd ramdisk decompression out. This is in k (1024 bytes) -diff --git a/include/configs/DP405.h b/include/configs/DP405.h -index 187547d..49ecb6f 100644 ---- a/include/configs/DP405.h -+++ b/include/configs/DP405.h -@@ -52,39 +52,20 @@ - - #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ - --#define CONFIG_PPC4xx_EMAC --#define CONFIG_MII 1 /* MII PHY management */ --#define CONFIG_PHY_ADDR 0 /* PHY address */ -- -- --/* -- * BOOTP options -- */ --#define CONFIG_BOOTP_BOOTFILESIZE --#define CONFIG_BOOTP_BOOTPATH --#define CONFIG_BOOTP_GATEWAY --#define CONFIG_BOOTP_HOSTNAME -- -- - /* - * Command line configuration. - */ - #include - - #define CONFIG_CMD_BSP --#define CONFIG_CMD_DHCP --#define CONFIG_CMD_IRQ - #define CONFIG_CMD_ELF --#define CONFIG_CMD_DATE - #define CONFIG_CMD_I2C - #define CONFIG_CMD_EEPROM - -+#undef CONFIG_CMD_NET - - #undef CONFIG_WATCHDOG /* watchdog disabled */ - --#define CONFIG_RTC_MC146818 /* DS1685 is MC146818 compatible*/ --#define CONFIG_SYS_RTC_REG_BASE_ADDR 0xF0000500 /* RTC Base Address */ -- - #define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */ - - #define CONFIG_PRAM 2 /* reserve 2 kB "protected RAM" */ -@@ -134,33 +115,6 @@ - - #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */ - --#define CONFIG_SYS_RX_ETH_BUFFER 16 /* use 16 rx buffer on 405 emac */ -- --/*----------------------------------------------------------------------- -- * PCI stuff -- *----------------------------------------------------------------------- -- */ --#define PCI_HOST_ADAPTER 0 /* configure as pci adapter */ --#define PCI_HOST_FORCE 1 /* configure as pci host */ --#define PCI_HOST_AUTO 2 /* detected via arbiter enable */ -- --#define CONFIG_PCI /* include pci support */ --#define CONFIG_PCI_HOST PCI_HOST_HOST /* select pci host function */ --#undef CONFIG_PCI_PNP /* do pci plug-and-play */ -- /* resource configuration */ -- --#undef CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */ -- --#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x12FE /* PCI Vendor ID: esd gmbh */ --#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x0405 /* PCI Device ID: CPCI-405 */ --#define CONFIG_SYS_PCI_CLASSCODE 0x0b20 /* PCI Class Code: Processor/PPC*/ --#define CONFIG_SYS_PCI_PTM1LA 0x00000000 /* point to sdram */ --#define CONFIG_SYS_PCI_PTM1MS 0xfc000001 /* 64MB, enable hard-wired to 1 */ --#define CONFIG_SYS_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */ --#define CONFIG_SYS_PCI_PTM2LA 0xffc00000 /* point to flash */ --#define CONFIG_SYS_PCI_PTM2MS 0xffc00001 /* 4MB, enable */ --#define CONFIG_SYS_PCI_PTM2PCI 0x04000000 /* Host: use this pci address */ -- - /* - * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is -@@ -191,21 +145,16 @@ - - #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ - --#if 0 /* test-only */ --#define CONFIG_SYS_JFFS2_FIRST_BANK 0 /* use for JFFS2 */ --#define CONFIG_SYS_JFFS2_NUM_BANKS 1 /* ! second bank contains U-Boot */ --#endif -- - /*----------------------------------------------------------------------- - * Start addresses for the final memory configuration - * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 - */ - #define CONFIG_SYS_SDRAM_BASE 0x00000000 --#define CONFIG_SYS_FLASH_BASE 0xFFFC0000 --#define CONFIG_SYS_MONITOR_BASE TEXT_BASE --#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Monitor */ --#define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */ -+#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE -+#define CONFIG_SYS_MONITOR_BASE TEXT_BASE -+#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1) -+#define CONFIG_SYS_MALLOC_LEN (256 * 1024) - - #if (CONFIG_SYS_MONITOR_BASE < FLASH_BASE0_PRELIM) - # define CONFIG_SYS_RAMBOOT 1 -@@ -221,9 +170,6 @@ - #define CONFIG_ENV_SIZE 0x700 /* 2048 bytes may be used for env vars*/ - /* total size of a CAT24WC16 is 2048 bytes */ - --#define CONFIG_SYS_NVRAM_BASE_ADDR 0xF0000500 /* NVRAM base address */ --#define CONFIG_SYS_NVRAM_SIZE 242 /* NVRAM size */ -- - /*----------------------------------------------------------------------- - * I2C EEPROM (CAT24WC16) for environment - */ -@@ -245,18 +191,11 @@ - */ - - #define CAN_BA 0xF0000000 /* CAN Base Address */ --#define RTC_BA 0xF0000500 /* RTC Base Address */ - - /* Memory Bank 0 (Flash Bank 0, NOR-FLASH) initialization */ - #define CONFIG_SYS_EBC_PB0AP 0x92015480 - #define CONFIG_SYS_EBC_PB0CR 0xFFC5A000 /* BAS=0xFFC,BS=4MB,BU=R/W,BW=16bit */ - --#if 0 /* test-only */ --/* Memory Bank 1 (Flash Bank 1, NAND-FLASH) initialization */ --#define CONFIG_SYS_EBC_PB1AP 0x92015480 --#define CONFIG_SYS_EBC_PB1CR 0xF4018000 /* BAS=0xF40,BS=1MB,BU=R/W,BW=8bit */ --#endif -- - /* Memory Bank 2 (8 Bit Peripheral: CAN, UART, RTC) initialization */ - #define CONFIG_SYS_EBC_PB2AP 0x010053C0 /* BWT=2,WBN=1,WBF=1,TH=1,RE=1,SOR=1,BEM=1 */ - #define CONFIG_SYS_EBC_PB2CR 0xF0018000 /* BAS=0xF00,BS=1MB,BU=R/W,BW=8bit */ -@@ -264,9 +203,6 @@ - /*----------------------------------------------------------------------- - * FPGA stuff - */ --#define CONFIG_SYS_FPGA_XC95XL 1 /* using Xilinx XC95XL CPLD */ --#define CONFIG_SYS_FPGA_MAX_SIZE 32*1024 /* 32kByte is enough for CPLD */ -- - /* FPGA program pin configuration */ - #define CONFIG_SYS_FPGA_PRG 0x04000000 /* JTAG TMS pin (ppc output) */ - #define CONFIG_SYS_FPGA_CLK 0x02000000 /* JTAG TCK pin (ppc output) */ -@@ -312,7 +248,7 @@ - #define CONFIG_SYS_GPIO0_ISR1L 0x14000045 /* 16 ... 31 */ - #define CONFIG_SYS_GPIO0_TSRH 0x00000000 /* 0 ... 15 */ - #define CONFIG_SYS_GPIO0_TSRL 0x00000000 /* 16 ... 31 */ --#define CONFIG_SYS_GPIO0_TCR 0xF7FE0014 /* 0 ... 31 */ -+#define CONFIG_SYS_GPIO0_TCR 0xB7FE0014 /* 0 ... 31 */ - - /* - * Internal Definitions -@@ -326,17 +262,7 @@ - * Default speed selection (cpu_plb_opb_ebc) in mhz. - * This value will be set if iic boot eprom is disabled. - */ --#if 0 --#define PLLMR0_DEFAULT PLLMR0_266_133_66_33 --#define PLLMR1_DEFAULT PLLMR1_266_133_66_33 --#endif --#if 0 --#define PLLMR0_DEFAULT PLLMR0_200_100_50_33 --#define PLLMR1_DEFAULT PLLMR1_200_100_50_33 --#endif --#if 1 - #define PLLMR0_DEFAULT PLLMR0_133_66_66_33 - #define PLLMR1_DEFAULT PLLMR1_133_66_66_33 --#endif - - #endif /* __CONFIG_H */ -diff --git a/include/configs/DU405.h b/include/configs/DU405.h -index d1edd24..cfb3023 100644 ---- a/include/configs/DU405.h -+++ b/include/configs/DU405.h -@@ -211,7 +211,6 @@ - /*----------------------------------------------------------------------- - * I2C EEPROM (CAT24WC08) for environment - */ --#define CONFIG_I2C_CMD_TREE 1 - #define CONFIG_HARD_I2C /* I2c with hardware support */ - #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ - #define CONFIG_SYS_I2C_SLAVE 0x7F -diff --git a/include/configs/DU440.h b/include/configs/DU440.h -index e6abbdc..e9ea1bf 100644 ---- a/include/configs/DU440.h -+++ b/include/configs/DU440.h -@@ -170,7 +170,6 @@ - #undef CONFIG_SOFT_I2C /* I2C bit-banged */ - #define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ - #define CONFIG_SYS_I2C_SLAVE 0x7F --#define CONFIG_I2C_CMD_TREE 1 - #define CONFIG_I2C_MULTI_BUS 1 - - #define CONFIG_SYS_SPD_BUS_NUM 0 -diff --git a/include/configs/ERIC.h b/include/configs/ERIC.h -index 201e62a..023f33e 100644 ---- a/include/configs/ERIC.h -+++ b/include/configs/ERIC.h -@@ -96,6 +96,7 @@ - #define CONFIG_PPC4xx_EMAC - #define CONFIG_MII 1 /* MII PHY management */ - #define CONFIG_PHY_ADDR 1 /* PHY address */ -+#define CONFIG_NET_MULTI - - - /* -diff --git a/include/configs/EXBITGEN.h b/include/configs/EXBITGEN.h -index 4729464..4d08243 100644 ---- a/include/configs/EXBITGEN.h -+++ b/include/configs/EXBITGEN.h -@@ -81,6 +81,7 @@ - - #define CONFIG_MII 1 /* MII PHY management */ - #define CONFIG_PHY_ADDR 0 /* PHY address */ -+#define CONFIG_NET_MULTI - - - /* -diff --git a/include/configs/FPS850L.h b/include/configs/FPS850L.h -index f152230..aceecd8 100644 ---- a/include/configs/FPS850L.h -+++ b/include/configs/FPS850L.h -@@ -217,6 +217,8 @@ - * Dynamic MTD partition support - */ - #define CONFIG_CMD_MTDPARTS -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -+#define CONFIG_FLASH_CFI_MTD - #define MTDIDS_DEFAULT "nor0=TQM8xxL-0" - - #define MTDPARTS_DEFAULT "mtdparts=TQM8xxL-0:256k(u-boot)," \ -diff --git a/include/configs/FPS860L.h b/include/configs/FPS860L.h -index 5eaed84..4a61d7c 100644 ---- a/include/configs/FPS860L.h -+++ b/include/configs/FPS860L.h -@@ -217,6 +217,8 @@ - * Dynamic MTD partition support - */ - #define CONFIG_CMD_MTDPARTS -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -+#define CONFIG_FLASH_CFI_MTD - #define MTDIDS_DEFAULT "nor0=TQM8xxL-0" - - #define MTDPARTS_DEFAULT "mtdparts=TQM8xxL-0:256k(u-boot)," \ -diff --git a/include/configs/HUB405.h b/include/configs/HUB405.h -index 0e7d2c0..ea502d4 100644 ---- a/include/configs/HUB405.h -+++ b/include/configs/HUB405.h -@@ -60,6 +60,7 @@ - #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ - - #define CONFIG_PHY_CLK_FREQ EMAC_STACR_CLK_66MHZ /* 66 MHz OPB clock*/ -+#define CONFIG_NET_MULTI - - - /* -diff --git a/include/configs/JSE.h b/include/configs/JSE.h -index 8aca1f9..80c70e4 100644 ---- a/include/configs/JSE.h -+++ b/include/configs/JSE.h -@@ -135,6 +135,7 @@ - #define CONFIG_PPC4xx_EMAC - #define CONFIG_MII 1 /* MII PHY management */ - #define CONFIG_PHY_ADDR 1 /* PHY address */ -+#define CONFIG_NET_MULTI - - - /* -diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h -index a3869c8..8315cfe 100644 ---- a/include/configs/MIP405.h -+++ b/include/configs/MIP405.h -@@ -341,6 +341,7 @@ - #define CONFIG_PHY_ADDR 1 /* PHY address */ - #define CONFIG_PHY_RESET_DELAY 300 /* Intel LXT971A needs this */ - #define CONFIG_PHY_CMD_DELAY 40 /* Intel LXT971A needs this */ -+#define CONFIG_NET_MULTI - /************************************************************ - * RTC - ***********************************************************/ -diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h -index 21aedee..2308568 100644 ---- a/include/configs/MPC8313ERDB.h -+++ b/include/configs/MPC8313ERDB.h -@@ -30,8 +30,8 @@ - * High Level Configuration Options - */ - #define CONFIG_E300 1 --#define CONFIG_MPC83XX 1 --#define CONFIG_MPC831X 1 -+#define CONFIG_MPC83xx 1 -+#define CONFIG_MPC831x 1 - #define CONFIG_MPC8313 1 - #define CONFIG_MPC8313ERDB 1 - -@@ -321,7 +321,6 @@ - #define CONFIG_HARD_I2C /* I2C with hardware support*/ - #define CONFIG_FSL_I2C - #define CONFIG_I2C_MULTI_BUS --#define CONFIG_I2C_CMD_TREE - #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ - #define CONFIG_SYS_I2C_SLAVE 0x7F - #define CONFIG_SYS_I2C_NOPROBES {{0,0x69}} /* Don't probe these addrs */ -diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h -index 9fa91f4..e03a107 100644 ---- a/include/configs/MPC8315ERDB.h -+++ b/include/configs/MPC8315ERDB.h -@@ -1,5 +1,5 @@ - /* -- * Copyright (C) 2007 Freescale Semiconductor, Inc. -+ * Copyright (C) 2007-2009 Freescale Semiconductor, Inc. - * - * Dave Liu - * -@@ -29,8 +29,8 @@ - * High Level Configuration Options - */ - #define CONFIG_E300 1 /* E300 family */ --#define CONFIG_MPC83XX 1 /* MPC83xx family */ --#define CONFIG_MPC831X 1 /* MPC831x CPU family */ -+#define CONFIG_MPC83xx 1 /* MPC83xx family */ -+#define CONFIG_MPC831x 1 /* MPC831x CPU family */ - #define CONFIG_MPC8315 1 /* MPC8315 CPU specific */ - #define CONFIG_MPC8315ERDB 1 /* MPC8315ERDB board specific */ - -@@ -345,6 +345,14 @@ - #endif - - #define CONFIG_HAS_FSL_DR_USB -+#define CONFIG_SYS_SCCR_USBDRCM 3 -+ -+#define CONFIG_CMD_USB -+#define CONFIG_USB_STORAGE -+#define CONFIG_USB_EHCI -+#define CONFIG_USB_EHCI_FSL -+#define CONFIG_USB_PHY_TYPE "utmi" -+#define CONFIG_EHCI_HCD_INIT_AFTER_RESET - - /* - * TSEC -@@ -569,6 +577,7 @@ - "ramdiskfile=ramfs.83xx\0" \ - "fdtaddr=400000\0" \ - "fdtfile=mpc8315erdb.dtb\0" \ -+ "usb_phy_type=utmi\0" \ - "" - - #define CONFIG_NFSBOOTCOMMAND \ -diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h -index 9b8b033..24f37e7 100644 ---- a/include/configs/MPC8323ERDB.h -+++ b/include/configs/MPC8323ERDB.h -@@ -14,8 +14,8 @@ - */ - #define CONFIG_E300 1 /* E300 family */ - #define CONFIG_QE 1 /* Has QE */ --#define CONFIG_MPC83XX 1 /* MPC83xx family */ --#define CONFIG_MPC832X 1 /* MPC832x CPU specific */ -+#define CONFIG_MPC83xx 1 /* MPC83xx family */ -+#define CONFIG_MPC832x 1 /* MPC832x CPU specific */ - - #define CONFIG_PCI 1 - #define CONFIG_83XX_GENERIC_PCI 1 -diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h -index c82cda2..669577e 100644 ---- a/include/configs/MPC832XEMDS.h -+++ b/include/configs/MPC832XEMDS.h -@@ -25,8 +25,8 @@ - */ - #define CONFIG_E300 1 /* E300 family */ - #define CONFIG_QE 1 /* Has QE */ --#define CONFIG_MPC83XX 1 /* MPC83xx family */ --#define CONFIG_MPC832X 1 /* MPC832x CPU specific */ -+#define CONFIG_MPC83xx 1 /* MPC83xx family */ -+#define CONFIG_MPC832x 1 /* MPC832x CPU specific */ - #define CONFIG_MPC832XEMDS 1 /* MPC832XEMDS board specific */ - #undef CONFIG_PQ_MDS_PIB /* POWERQUICC MDS Platform IO Board */ - #undef CONFIG_PQ_MDS_PIB_ATM /* QOC3 ATM card */ -diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h -index 2d2799e..ea5fbff 100644 ---- a/include/configs/MPC8349EMDS.h -+++ b/include/configs/MPC8349EMDS.h -@@ -33,8 +33,8 @@ - * High Level Configuration Options - */ - #define CONFIG_E300 1 /* E300 Family */ --#define CONFIG_MPC83XX 1 /* MPC83XX family */ --#define CONFIG_MPC834X 1 /* MPC834X family */ -+#define CONFIG_MPC83xx 1 /* MPC83xx family */ -+#define CONFIG_MPC834x 1 /* MPC834x family */ - #define CONFIG_MPC8349 1 /* MPC8349 specific */ - #define CONFIG_MPC8349EMDS 1 /* MPC8349EMDS board specific */ - -@@ -315,7 +315,6 @@ - #undef CONFIG_SOFT_I2C /* I2C bit-banged */ - #define CONFIG_FSL_I2C - #define CONFIG_I2C_MULTI_BUS --#define CONFIG_I2C_CMD_TREE - #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ - #define CONFIG_SYS_I2C_SLAVE 0x7F - #define CONFIG_SYS_I2C_NOPROBES {{0,0x69}} /* Don't probe these addrs */ -diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h -index ab6fe55..f2e574b 100644 ---- a/include/configs/MPC8349ITX.h -+++ b/include/configs/MPC8349ITX.h -@@ -63,7 +63,7 @@ - /* - * High Level Configuration Options - */ --#define CONFIG_MPC834X /* MPC834x family (8343, 8347, 8349) */ -+#define CONFIG_MPC834x /* MPC834x family (8343, 8347, 8349) */ - #define CONFIG_MPC8349 /* MPC8349 specific */ - - #define CONFIG_SYS_IMMR 0xE0000000 /* The IMMR is relocated to here */ -@@ -95,7 +95,6 @@ - - #define CONFIG_FSL_I2C - #define CONFIG_I2C_MULTI_BUS --#define CONFIG_I2C_CMD_TREE - #define CONFIG_SYS_I2C_OFFSET 0x3000 - #define CONFIG_SYS_I2C2_OFFSET 0x3100 - #define CONFIG_SYS_SPD_BUS_NUM 1 /* The I2C bus for SPD */ -diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h -index 4b09de1..3497ba0 100644 ---- a/include/configs/MPC8360EMDS.h -+++ b/include/configs/MPC8360EMDS.h -@@ -27,7 +27,7 @@ - */ - #define CONFIG_E300 1 /* E300 family */ - #define CONFIG_QE 1 /* Has QE */ --#define CONFIG_MPC83XX 1 /* MPC83XX family */ -+#define CONFIG_MPC83xx 1 /* MPC83xx family */ - #define CONFIG_MPC8360 1 /* MPC8360 CPU specific */ - #define CONFIG_MPC8360EMDS 1 /* MPC8360EMDS board specific */ - #undef CONFIG_PQ_MDS_PIB /* POWERQUICC MDS Platform IO Board */ -diff --git a/include/configs/MPC8360ERDK.h b/include/configs/MPC8360ERDK.h -index 477a1c5..f584435 100644 ---- a/include/configs/MPC8360ERDK.h -+++ b/include/configs/MPC8360ERDK.h -@@ -22,7 +22,7 @@ - */ - #define CONFIG_E300 1 /* E300 family */ - #define CONFIG_QE 1 /* Has QE */ --#define CONFIG_MPC83XX 1 /* MPC83XX family */ -+#define CONFIG_MPC83xx 1 /* MPC83xx family */ - #define CONFIG_MPC8360 1 /* MPC8360 CPU specific */ - #define CONFIG_MPC8360ERDK 1 /* MPC8360ERDK board specific */ - -@@ -265,7 +265,6 @@ - #undef CONFIG_SOFT_I2C /* I2C bit-banged */ - #define CONFIG_FSL_I2C - #define CONFIG_I2C_MULTI_BUS --#define CONFIG_I2C_CMD_TREE - #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ - #define CONFIG_SYS_I2C_SLAVE 0x7F - #define CONFIG_SYS_I2C_NOPROBES {{0x52}} /* Don't probe these addrs */ -diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h -index a62d805..4befcab 100644 ---- a/include/configs/MPC837XEMDS.h -+++ b/include/configs/MPC837XEMDS.h -@@ -25,8 +25,8 @@ - * High Level Configuration Options - */ - #define CONFIG_E300 1 /* E300 family */ --#define CONFIG_MPC83XX 1 /* MPC83XX family */ --#define CONFIG_MPC837X 1 /* MPC837X CPU specific */ -+#define CONFIG_MPC83xx 1 /* MPC83xx family */ -+#define CONFIG_MPC837x 1 /* MPC837x CPU specific */ - #define CONFIG_MPC837XEMDS 1 /* MPC837XEMDS board specific */ - - /* -diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h -index 8d0c93b..2b7d629 100644 ---- a/include/configs/MPC837XERDB.h -+++ b/include/configs/MPC837XERDB.h -@@ -26,8 +26,8 @@ - * High Level Configuration Options - */ - #define CONFIG_E300 1 /* E300 family */ --#define CONFIG_MPC83XX 1 /* MPC83XX family */ --#define CONFIG_MPC837X 1 /* MPC837X CPU specific */ -+#define CONFIG_MPC83xx 1 /* MPC83xx family */ -+#define CONFIG_MPC837x 1 /* MPC837x CPU specific */ - #define CONFIG_MPC837XERDB 1 - - #define CONFIG_PCI 1 -diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h -index bbb448d..9e00b89 100644 ---- a/include/configs/MPC8536DS.h -+++ b/include/configs/MPC8536DS.h -@@ -1,5 +1,5 @@ - /* -- * Copyright 2008 Freescale Semiconductor, Inc. -+ * Copyright 2008-2009 Freescale Semiconductor, Inc. - * - * See file CREDITS for list of people who contributed to this - * project. -@@ -337,7 +337,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); - #define CONFIG_HARD_I2C /* I2C with hardware support */ - #undef CONFIG_SOFT_I2C /* I2C bit-banged */ - #define CONFIG_I2C_MULTI_BUS --#define CONFIG_I2C_CMD_TREE - #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ - #define CONFIG_SYS_I2C_SLAVE 0x7F - #define CONFIG_SYS_I2C_NOPROBES {{0, 0x29}} /* Don't probe these addrs */ -@@ -463,6 +462,15 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); - #define CONFIG_CMD_EXT2 - #endif - -+/* -+ * USB -+ */ -+#define CONFIG_CMD_USB -+#define CONFIG_USB_STORAGE -+#define CONFIG_USB_EHCI -+#define CONFIG_USB_EHCI_FSL -+#define CONFIG_EHCI_HCD_INIT_AFTER_RESET -+ - #if defined(CONFIG_TSEC_ENET) - - #ifndef CONFIG_NET_MULTI -@@ -628,7 +636,8 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); - "ramdiskfile=8536ds/ramdisk.uboot\0" \ - "fdtaddr=c00000\0" \ - "fdtfile=8536ds/mpc8536ds.dtb\0" \ -- "bdev=sda3\0" -+ "bdev=sda3\0" \ -+ "usb_phy_type=ulpi\0" - - #define CONFIG_HDBOOT \ - "setenv bootargs root=/dev/$bdev rw " \ -diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h -index 77224d9..ac34047 100644 ---- a/include/configs/MPC8568MDS.h -+++ b/include/configs/MPC8568MDS.h -@@ -287,7 +287,6 @@ extern unsigned long get_clock_freq(void); - #define CONFIG_HARD_I2C /* I2C with hardware support*/ - #undef CONFIG_SOFT_I2C /* I2C bit-banged */ - #define CONFIG_I2C_MULTI_BUS --#define CONFIG_I2C_CMD_TREE - #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ - #define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 - #define CONFIG_SYS_I2C_SLAVE 0x7F -diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h -index 0ee40c6..27044f7 100644 ---- a/include/configs/MPC8569MDS.h -+++ b/include/configs/MPC8569MDS.h -@@ -239,7 +239,6 @@ extern unsigned long get_clock_freq(void); - #define CONFIG_HARD_I2C /* I2C with hardware support*/ - #undef CONFIG_SOFT_I2C /* I2C bit-banged */ - #define CONFIG_I2C_MULTI_BUS --#define CONFIG_I2C_CMD_TREE - #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ - #define CONFIG_SYS_I2C_SLAVE 0x7F - #define CONFIG_SYS_I2C_NOPROBES {{0,0x69}} /* Don't probe these addrs */ -@@ -283,6 +282,8 @@ extern unsigned long get_clock_freq(void); - /* - * QE UEC ethernet configuration - */ -+#define CONFIG_SYS_UCC_RGMII_MODE /* Set UCC work at RGMII by default */ -+#undef CONFIG_SYS_UCC_RMII_MODE /* Set UCC work at RMII mode */ - - #define CONFIG_MIIM_ADDRESS (CONFIG_SYS_CCSRBAR + 0x82120) - #define CONFIG_UEC_ETH -@@ -295,11 +296,18 @@ extern unsigned long get_clock_freq(void); - #ifdef CONFIG_UEC_ETH1 - #define CONFIG_SYS_UEC1_UCC_NUM 0 /* UCC1 */ - #define CONFIG_SYS_UEC1_RX_CLK QE_CLK_NONE -+#if defined(CONFIG_SYS_UCC_RGMII_MODE) - #define CONFIG_SYS_UEC1_TX_CLK QE_CLK12 - #define CONFIG_SYS_UEC1_ETH_TYPE GIGA_ETH - #define CONFIG_SYS_UEC1_PHY_ADDR 7 - #define CONFIG_SYS_UEC1_INTERFACE_MODE ENET_1000_RGMII_ID --#endif -+#elif defined(CONFIG_SYS_UCC_RMII_MODE) -+#define CONFIG_SYS_UEC1_TX_CLK QE_CLK16 /* CLK16 for RMII */ -+#define CONFIG_SYS_UEC1_ETH_TYPE FAST_ETH -+#define CONFIG_SYS_UEC1_PHY_ADDR 8 /* 0x8 for RMII */ -+#define CONFIG_SYS_UEC1_INTERFACE_MODE ENET_100_RMII -+#endif /* CONFIG_SYS_UCC_RGMII_MODE */ -+#endif /* CONFIG_UEC_ETH1 */ - - #define CONFIG_UEC_ETH2 /* GETH2 */ - #define CONFIG_HAS_ETH1 -@@ -307,11 +315,80 @@ extern unsigned long get_clock_freq(void); - #ifdef CONFIG_UEC_ETH2 - #define CONFIG_SYS_UEC2_UCC_NUM 1 /* UCC2 */ - #define CONFIG_SYS_UEC2_RX_CLK QE_CLK_NONE -+#if defined(CONFIG_SYS_UCC_RGMII_MODE) - #define CONFIG_SYS_UEC2_TX_CLK QE_CLK17 - #define CONFIG_SYS_UEC2_ETH_TYPE GIGA_ETH - #define CONFIG_SYS_UEC2_PHY_ADDR 1 - #define CONFIG_SYS_UEC2_INTERFACE_MODE ENET_1000_RGMII_ID --#endif -+#elif defined(CONFIG_SYS_UCC_RMII_MODE) -+#define CONFIG_SYS_UEC2_TX_CLK QE_CLK16 /* CLK 16 for RMII */ -+#define CONFIG_SYS_UEC2_ETH_TYPE FAST_ETH -+#define CONFIG_SYS_UEC2_PHY_ADDR 0x9 /* 0x9 for RMII */ -+#define CONFIG_SYS_UEC2_INTERFACE_MODE ENET_100_RMII -+#endif /* CONFIG_SYS_UCC_RGMII_MODE */ -+#endif /* CONFIG_UEC_ETH2 */ -+ -+#define CONFIG_UEC_ETH3 /* GETH3 */ -+#define CONFIG_HAS_ETH2 -+ -+#ifdef CONFIG_UEC_ETH3 -+#define CONFIG_SYS_UEC3_UCC_NUM 2 /* UCC3 */ -+#define CONFIG_SYS_UEC3_RX_CLK QE_CLK_NONE -+#if defined(CONFIG_SYS_UCC_RGMII_MODE) -+#define CONFIG_SYS_UEC3_TX_CLK QE_CLK12 -+#define CONFIG_SYS_UEC3_ETH_TYPE GIGA_ETH -+#define CONFIG_SYS_UEC3_PHY_ADDR 2 -+#define CONFIG_SYS_UEC3_INTERFACE_MODE ENET_1000_RGMII_ID -+#elif defined(CONFIG_SYS_UCC_RMII_MODE) -+#define CONFIG_SYS_UEC3_TX_CLK QE_CLK16 /* CLK_16 for RMII */ -+#define CONFIG_SYS_UEC3_ETH_TYPE FAST_ETH -+#define CONFIG_SYS_UEC3_PHY_ADDR 0xA /* 0xA for RMII */ -+#define CONFIG_SYS_UEC3_INTERFACE_MODE ENET_100_RMII -+#endif /* CONFIG_SYS_UCC_RGMII_MODE */ -+#endif /* CONFIG_UEC_ETH3 */ -+ -+#define CONFIG_UEC_ETH4 /* GETH4 */ -+#define CONFIG_HAS_ETH3 -+ -+#ifdef CONFIG_UEC_ETH4 -+#define CONFIG_SYS_UEC4_UCC_NUM 3 /* UCC4 */ -+#define CONFIG_SYS_UEC4_RX_CLK QE_CLK_NONE -+#if defined(CONFIG_SYS_UCC_RGMII_MODE) -+#define CONFIG_SYS_UEC4_TX_CLK QE_CLK17 -+#define CONFIG_SYS_UEC4_ETH_TYPE GIGA_ETH -+#define CONFIG_SYS_UEC4_PHY_ADDR 3 -+#define CONFIG_SYS_UEC4_INTERFACE_MODE ENET_1000_RGMII_ID -+#elif defined(CONFIG_SYS_UCC_RMII_MODE) -+#define CONFIG_SYS_UEC4_TX_CLK QE_CLK16 /* CLK16 for RMII */ -+#define CONFIG_SYS_UEC4_ETH_TYPE FAST_ETH -+#define CONFIG_SYS_UEC4_PHY_ADDR 0xB /* 0xB for RMII */ -+#define CONFIG_SYS_UEC4_INTERFACE_MODE ENET_100_RMII -+#endif /* CONFIG_SYS_UCC_RGMII_MODE */ -+#endif /* CONFIG_UEC_ETH4 */ -+ -+#undef CONFIG_UEC_ETH6 /* GETH6 */ -+#define CONFIG_HAS_ETH5 -+ -+#ifdef CONFIG_UEC_ETH6 -+#define CONFIG_SYS_UEC6_UCC_NUM 5 /* UCC6 */ -+#define CONFIG_SYS_UEC6_RX_CLK QE_CLK_NONE -+#define CONFIG_SYS_UEC6_TX_CLK QE_CLK_NONE -+#define CONFIG_SYS_UEC6_ETH_TYPE GIGA_ETH -+#define CONFIG_SYS_UEC6_PHY_ADDR 4 -+#define CONFIG_SYS_UEC6_INTERFACE_MODE ENET_1000_SGMII -+#endif /* CONFIG_UEC_ETH6 */ -+ -+#undef CONFIG_UEC_ETH8 /* GETH8 */ -+#define CONFIG_HAS_ETH7 -+ -+#ifdef CONFIG_UEC_ETH8 -+#define CONFIG_SYS_UEC8_UCC_NUM 7 /* UCC8 */ -+#define CONFIG_SYS_UEC8_RX_CLK QE_CLK_NONE -+#define CONFIG_SYS_UEC8_TX_CLK QE_CLK_NONE -+#define CONFIG_SYS_UEC8_ETH_TYPE GIGA_ETH -+#define CONFIG_SYS_UEC8_PHY_ADDR 6 -+#define CONFIG_SYS_UEC8_INTERFACE_MODE ENET_1000_SGMII -+#endif /* CONFIG_UEC_ETH8 */ - - #endif /* CONFIG_QE */ - -diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h -index b60b364..2aba689 100644 ---- a/include/configs/MPC8572DS.h -+++ b/include/configs/MPC8572DS.h -@@ -378,7 +378,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); - #define CONFIG_HARD_I2C /* I2C with hardware support */ - #undef CONFIG_SOFT_I2C /* I2C bit-banged */ - #define CONFIG_I2C_MULTI_BUS --#define CONFIG_I2C_CMD_TREE - #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ - #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 - #define CONFIG_SYS_I2C_SLAVE 0x7F -diff --git a/include/configs/MVBLM7.h b/include/configs/MVBLM7.h -index 8f741f5..9675205 100644 ---- a/include/configs/MVBLM7.h -+++ b/include/configs/MVBLM7.h -@@ -33,8 +33,8 @@ - * High Level Configuration Options - */ - #define CONFIG_E300 1 --#define CONFIG_MPC83XX 1 --#define CONFIG_MPC834X 1 -+#define CONFIG_MPC83xx 1 -+#define CONFIG_MPC834x 1 - #define CONFIG_MPC8343 1 - - #define CONFIG_SYS_IMMR 0xE0000000 -@@ -53,7 +53,6 @@ - - #define CONFIG_FSL_I2C - #define CONFIG_I2C_MULTI_BUS --#define CONFIG_I2C_CMD_TREE - #define CONFIG_SYS_I2C_OFFSET 0x3000 - #define CONFIG_SYS_I2C2_OFFSET 0x3100 - -diff --git a/include/configs/OCRTC.h b/include/configs/OCRTC.h -index 2591f1d..860ec52 100644 ---- a/include/configs/OCRTC.h -+++ b/include/configs/OCRTC.h -@@ -54,6 +54,7 @@ - #define CONFIG_MII 1 /* MII PHY management */ - #define CONFIG_PHY_ADDR 0 /* PHY address */ - #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ -+#define CONFIG_NET_MULTI - - - /* -diff --git a/include/configs/ORSG.h b/include/configs/ORSG.h -index 13d6e04..b2e2d41 100644 ---- a/include/configs/ORSG.h -+++ b/include/configs/ORSG.h -@@ -54,6 +54,7 @@ - #define CONFIG_MII 1 /* MII PHY management */ - #define CONFIG_PHY_ADDR 0 /* PHY address */ - #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ -+#define CONFIG_NET_MULTI - - - /* -diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h -new file mode 100644 -index 0000000..a39ff26 ---- /dev/null -+++ b/include/configs/P2020DS.h -@@ -0,0 +1,741 @@ -+/* -+ * Copyright 2007-2009 Freescale Semiconductor, Inc. -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+/* -+ * p2020ds board configuration file -+ * -+ */ -+#ifndef __CONFIG_H -+#define __CONFIG_H -+ -+/* High Level Configuration Options */ -+#define CONFIG_BOOKE 1 /* BOOKE */ -+#define CONFIG_E500 1 /* BOOKE e500 family */ -+#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48 */ -+#define CONFIG_P2020 1 -+#define CONFIG_P2020DS 1 -+#define CONFIG_MP 1 /* support multiple processors */ -+#define CONFIG_NUM_CPUS 2 /* Number of CPUs in the system */ -+ -+#define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */ -+#define CONFIG_PCI 1 /* Enable PCI/PCIE */ -+#define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ -+#define CONFIG_PCIE2 1 /* PCIE controler 2 (slot 2) */ -+#define CONFIG_PCIE3 1 /* PCIE controler 3 (ULI bridge) */ -+#define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ -+#define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ -+#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ -+ -+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */ -+ -+#define CONFIG_TSEC_ENET /* tsec ethernet support */ -+#define CONFIG_ENV_OVERWRITE -+ -+/* -+ * When initializing flash, if we cannot find the manufacturer ID, -+ * assume this is the AMD flash associated with the CDS board. -+ * This allows booting from a promjet. -+ */ -+#define CONFIG_ASSUME_AMD_FLASH -+ -+#ifndef __ASSEMBLY__ -+extern unsigned long calculate_board_sys_clk(unsigned long dummy); -+extern unsigned long calculate_board_ddr_clk(unsigned long dummy); -+/* extern unsigned long get_board_sys_clk(unsigned long dummy); */ -+/* extern unsigned long get_board_ddr_clk(unsigned long dummy); */ -+#endif -+#define CONFIG_SYS_CLK_FREQ calculate_board_sys_clk(0) /* sysclk for MPC85xx */ -+#define CONFIG_DDR_CLK_FREQ calculate_board_ddr_clk(0) /* ddrclk for MPC85xx */ -+#define CONFIG_ICS307_REFCLK_HZ 33333000 /* ICS307 clock chip ref freq */ -+#define CONFIG_GET_CLK_FROM_ICS307 /* decode sysclk and ddrclk freq -+ from ICS307 instead of switches */ -+ -+/* -+ * These can be toggled for performance analysis, otherwise use default. -+ */ -+#define CONFIG_L2_CACHE /* toggle L2 cache */ -+#define CONFIG_BTB /* toggle branch predition */ -+ -+#define CONFIG_ENABLE_36BIT_PHYS 1 -+ -+#ifdef CONFIG_PHYS_64BIT -+#define CONFIG_ADDR_MAP 1 -+#define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */ -+#endif -+ -+#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest works on */ -+#define CONFIG_SYS_MEMTEST_END 0x7fffffff -+#define CONFIG_PANIC_HANG /* do not reset board on panic */ -+ -+/* -+ * Base addresses -- Note these are effective addresses where the -+ * actual resources get mapped (not physical addresses) -+ */ -+#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */ -+#define CONFIG_SYS_CCSRBAR 0xffe00000 /* relocated CCSRBAR */ -+#ifdef CONFIG_PHYS_64BIT -+#define CONFIG_SYS_CCSRBAR_PHYS 0xfffe00000ull /* physical addr of CCSRBAR */ -+#else -+#define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR /* physical addr of CCSRBAR */ -+#endif -+#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR /* PQII uses CONFIG_SYS_IMMR */ -+ -+#define CONFIG_SYS_PCIE3_ADDR (CONFIG_SYS_CCSRBAR+0x8000) -+#define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_CCSRBAR+0x9000) -+#define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_CCSRBAR+0xa000) -+ -+/* DDR Setup */ -+#define CONFIG_SYS_DDR_TLB_START 9 -+#define CONFIG_VERY_BIG_RAM -+#define CONFIG_FSL_DDR3 1 -+#undef CONFIG_FSL_DDR_INTERACTIVE -+ -+// #define CONFIG_DDR_ECC /* ECC will be enabled based on perf_mode environment variable */ -+#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER -+#define CONFIG_MEM_INIT_VALUE 0xDeadBeef -+ -+#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -+#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -+ -+#define CONFIG_NUM_DDR_CONTROLLERS 1 -+#define CONFIG_DIMM_SLOTS_PER_CTLR 1 -+#define CONFIG_CHIP_SELECTS_PER_CTRL 2 -+ -+/* I2C addresses of SPD EEPROMs */ -+#define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD EEPROM located on I2C bus 0 */ -+#define SPD_EEPROM_ADDRESS1 0x51 /* CTLR 0 DIMM 0 */ -+ -+/* These are used when DDR doesn't use SPD. */ -+//#define CONFIG_SYS_SDRAM_SIZE 512 /* DDR is 512MB */ -+#define CONFIG_SYS_SDRAM_SIZE 1024 /* DDR is 1GB */ -+ -+/* Default settings for "stable" mode */ -+#define CONFIG_SYS_DDR_CS0_BNDS 0x0000003F -+#define CONFIG_SYS_DDR_CS1_BNDS 0x00000000 -+#define CONFIG_SYS_DDR_CS0_CONFIG 0x80014202 -+#define CONFIG_SYS_DDR_CS1_CONFIG 0x00000000 -+#define CONFIG_SYS_DDR_TIMING_3 0x00020000 -+#define CONFIG_SYS_DDR_TIMING_0 0x00330804 -+#define CONFIG_SYS_DDR_TIMING_1 0x6f6b4846 -+#define CONFIG_SYS_DDR_TIMING_2 0x0fa890d4 -+#define CONFIG_SYS_DDR_MODE_1 0x00421422 -+#define CONFIG_SYS_DDR_MODE_2 0x00000000 -+#define CONFIG_SYS_DDR_MODE_CTRL 0x00000000 -+#define CONFIG_SYS_DDR_INTERVAL 0x61800100 -+#define CONFIG_SYS_DDR_DATA_INIT 0xdeadbeef -+#define CONFIG_SYS_DDR_CLK_CTRL 0x02000000 -+#define CONFIG_SYS_DDR_TIMING_4 0x00220001 -+#define CONFIG_SYS_DDR_TIMING_5 0x03402400 -+#define CONFIG_SYS_DDR_ZQ_CNTL 0x89080600 -+#define CONFIG_SYS_DDR_WRLVL_CNTL 0x8655A608 -+#define CONFIG_SYS_DDR_CONTROL 0xE7000000 /* Type = DDR3: ECC enabled, No Interleaving */ -+#define CONFIG_SYS_DDR_CONTROL2 0x24400011 -+#define CONFIG_SYS_DDR_CDR1 0x00040000 -+#define CONFIG_SYS_DDR_CDR2 0x00000000 -+ -+#define CONFIG_SYS_DDR_ERR_INT_EN 0x0000000d -+#define CONFIG_SYS_DDR_ERR_DIS 0x00000000 -+#define CONFIG_SYS_DDR_SBE 0x00010000 -+ -+/* Settings that differ for "performance" mode */ -+#define CONFIG_SYS_DDR_CS0_BNDS_PERF 0x0000007F /* Interleaving Enabled */ -+#define CONFIG_SYS_DDR_CS1_BNDS_PERF 0x00000000 /* Interleaving Enabled */ -+#define CONFIG_SYS_DDR_CS1_CONFIG_PERF 0x80014202 -+#define CONFIG_SYS_DDR_TIMING_1_PERF 0x5d5b4543 -+#define CONFIG_SYS_DDR_TIMING_2_PERF 0x0fa890ce -+#define CONFIG_SYS_DDR_CONTROL_PERF 0xC7004000 /* Type = DDR3: ECC disabled, cs0-cs1 interleaving */ -+ -+/* -+ * The following set of values were tested for DDR2 -+ * with a DDR3 to DDR2 interposer -+ * -+#define CONFIG_SYS_DDR_TIMING_3 0x00000000 -+#define CONFIG_SYS_DDR_TIMING_0 0x00260802 -+#define CONFIG_SYS_DDR_TIMING_1 0x3935d322 -+#define CONFIG_SYS_DDR_TIMING_2 0x14904cc8 -+#define CONFIG_SYS_DDR_MODE_1 0x00480432 -+#define CONFIG_SYS_DDR_MODE_2 0x00000000 -+#define CONFIG_SYS_DDR_INTERVAL 0x06180100 -+#define CONFIG_SYS_DDR_DATA_INIT 0xdeadbeef -+#define CONFIG_SYS_DDR_CLK_CTRL 0x03800000 -+#define CONFIG_SYS_DDR_OCD_CTRL 0x00000000 -+#define CONFIG_SYS_DDR_OCD_STATUS 0x00000000 -+#define CONFIG_SYS_DDR_CONTROL 0xC3008000 -+#define CONFIG_SYS_DDR_CONTROL2 0x04400010 -+ * -+ */ -+ -+#undef CONFIG_CLOCKS_IN_MHZ -+ -+/* -+ * Memory map -+ * -+ * 0x0000_0000 0x7fff_ffff DDR 2G Cacheable -+ * 0x8000_0000 0xbfff_ffff PCI Express Mem 1G non-cacheable -+ * 0xc000_0000 0xdfff_ffff PCI 512M non-cacheable -+ * 0xe100_0000 0xe3ff_ffff PCI IO range 4M non-cacheable -+ * -+ * Localbus cacheable (TBD) -+ * 0xXXXX_XXXX 0xXXXX_XXXX SRAM YZ M Cacheable -+ * -+ * Localbus non-cacheable -+ * 0xe000_0000 0xe80f_ffff Promjet/free 128M non-cacheable -+ * 0xe800_0000 0xefff_ffff FLASH 128M non-cacheable -+ * 0xffa0_0000 0xffaf_ffff NAND 1M non-cacheable -+ * 0xffdf_0000 0xffdf_7fff PIXIS 32K non-cacheable TLB0 -+ * 0xffd0_0000 0xffd0_3fff L1 for stack 16K Cacheable TLB0 -+ * 0xffe0_0000 0xffef_ffff CCSR 1M non-cacheable -+ */ -+ -+/* -+ * Local Bus Definitions -+ */ -+#define CONFIG_SYS_FLASH_BASE 0xe0000000 /* start of FLASH 128M */ -+#ifdef CONFIG_PHYS_64BIT -+#define CONFIG_SYS_FLASH_BASE_PHYS 0xfe0000000ull -+#else -+#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE -+#endif -+ -+#define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR((CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000)) | BR_PS_16 | BR_V) -+#define CONFIG_FLASH_OR_PRELIM 0xf8000ff7 -+ -+#define CONFIG_SYS_BR1_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | BR_PS_16 | BR_V) -+#define CONFIG_SYS_OR1_PRELIM 0xf8000ff7 -+ -+#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000, CONFIG_SYS_FLASH_BASE_PHYS} -+#define CONFIG_SYS_FLASH_QUIET_TEST -+#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ -+ -+#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */ -+#define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ -+#undef CONFIG_SYS_FLASH_CHECKSUM -+#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ -+#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -+ -+#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ -+ -+#define CONFIG_FLASH_CFI_DRIVER -+#define CONFIG_SYS_FLASH_CFI -+#define CONFIG_SYS_FLASH_EMPTY_INFO -+#define CONFIG_SYS_FLASH_AMD_CHECK_DQ7 -+ -+#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */ -+ -+#define CONFIG_FSL_PIXIS 1 /* use common PIXIS code */ -+#define PIXIS_BASE 0xffdf0000 /* PIXIS registers */ -+#ifdef CONFIG_PHYS_64BIT -+#define PIXIS_BASE_PHYS 0xfffdf0000ull -+#else -+#define PIXIS_BASE_PHYS PIXIS_BASE -+#endif -+ -+#define CONFIG_SYS_BR3_PRELIM (BR_PHYS_ADDR(PIXIS_BASE_PHYS) | BR_PS_8 | BR_V) -+#define CONFIG_SYS_OR3_PRELIM 0xffffeff7 /* 32KB but only 4k mapped */ -+ -+#define PIXIS_ID 0x0 /* Board ID at offset 0 */ -+#define PIXIS_VER 0x1 /* Board version at offset 1 */ -+#define PIXIS_PVER 0x2 /* PIXIS FPGA version at offset 2 */ -+#define PIXIS_CSR 0x3 /* PIXIS General control/status register */ -+#define PIXIS_RST 0x4 /* PIXIS Reset Control register */ -+#define PIXIS_PWR 0x5 /* PIXIS Power status register */ -+#define PIXIS_AUX 0x6 /* Auxiliary 1 register */ -+#define PIXIS_SPD 0x7 /* Register for SYSCLK speed */ -+#define PIXIS_AUX2 0x8 /* Auxiliary 2 register */ -+#define PIXIS_VCTL 0x10 /* VELA Control Register */ -+#define PIXIS_VSTAT 0x11 /* VELA Status Register */ -+#define PIXIS_VCFGEN0 0x12 /* VELA Config Enable 0 */ -+#define PIXIS_VCFGEN1 0x13 /* VELA Config Enable 1 */ -+#define PIXIS_VCORE0 0x14 /* VELA VCORE0 Register */ -+#define PIXIS_VBOOT 0x16 /* VELA VBOOT Register */ -+#define PIXIS_VSPEED0 0x17 /* VELA VSpeed 0 */ -+#define PIXIS_VSPEED1 0x18 /* VELA VSpeed 1 */ -+#define PIXIS_VSPEED2 0x19 /* VELA VSpeed 2 */ -+#define PIXIS_VSYSCLK0 0x19 /* VELA SYSCLK0 Register */ -+#define PIXIS_VSYSCLK1 0x1A /* VELA SYSCLK1 Register */ -+#define PIXIS_VSYSCLK2 0x1B /* VELA SYSCLK2 Register */ -+#define PIXIS_VDDRCLK0 0x1C /* VELA DDRCLK0 Register */ -+#define PIXIS_VDDRCLK1 0x1D /* VELA DDRCLK1 Register */ -+#define PIXIS_VDDRCLK2 0x1E /* VELA DDRCLK2 Register */ -+ -+#define PIXIS_VWATCH 0x24 /* Watchdog Register */ -+#define PIXIS_LED 0x25 /* LED Register */ -+ -+/* old pixis referenced names */ -+#define PIXIS_VCLKH 0x19 /* VELA VCLKH register */ -+#define PIXIS_VCLKL 0x1A /* VELA VCLKL register */ -+#define CONFIG_SYS_PIXIS_VBOOT_MASK 0xc0 -+#define PIXIS_VSPEED2_TSEC1SER 0x8 -+#define PIXIS_VSPEED2_TSEC2SER 0x4 -+#define PIXIS_VSPEED2_TSEC3SER 0x2 -+#define PIXIS_VSPEED2_TSEC4SER 0x1 -+#define PIXIS_VCFGEN1_TSEC1SER 0x20 -+#define PIXIS_VCFGEN1_TSEC2SER 0x20 -+#define PIXIS_VCFGEN1_TSEC3SER 0x20 -+#define PIXIS_VCFGEN1_TSEC4SER 0x20 -+#define PIXIS_VSPEED2_MASK (PIXIS_VSPEED2_TSEC1SER \ -+ | PIXIS_VSPEED2_TSEC2SER \ -+ | PIXIS_VSPEED2_TSEC3SER \ -+ | PIXIS_VSPEED2_TSEC4SER) -+#define PIXIS_VCFGEN1_MASK (PIXIS_VCFGEN1_TSEC1SER \ -+ | PIXIS_VCFGEN1_TSEC2SER \ -+ | PIXIS_VCFGEN1_TSEC3SER \ -+ | PIXIS_VCFGEN1_TSEC4SER) -+ -+#define CONFIG_SYS_INIT_RAM_LOCK 1 -+#define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */ -+#define CONFIG_SYS_INIT_RAM_END 0x00004000 /* End of used area in RAM */ -+ -+#define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */ -+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -+#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -+ -+#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */ -+#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */ -+ -+#define CONFIG_SYS_NAND_BASE 0xffa00000 -+#ifdef CONFIG_PHYS_64BIT -+#define CONFIG_SYS_NAND_BASE_PHYS 0xfffa00000ull -+#else -+#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE -+#endif -+#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE,\ -+ CONFIG_SYS_NAND_BASE + 0x40000, \ -+ CONFIG_SYS_NAND_BASE + 0x80000,\ -+ CONFIG_SYS_NAND_BASE + 0xC0000} -+#define CONFIG_SYS_MAX_NAND_DEVICE 4 -+#define CONFIG_MTD_NAND_VERIFY_WRITE -+#define CONFIG_CMD_NAND 1 -+#define CONFIG_NAND_FSL_ELBC 1 -+#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) -+ -+/* NAND flash config */ -+#define CONFIG_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ -+ | (2< " -+#endif -+ -+/* -+ * Pass open firmware flat tree -+ */ -+#define CONFIG_OF_LIBFDT 1 -+#define CONFIG_OF_BOARD_SETUP 1 -+#define CONFIG_OF_STDOUT_VIA_ALIAS 1 -+ -+#define CONFIG_SYS_64BIT_VSPRINTF 1 -+#define CONFIG_SYS_64BIT_STRTOUL 1 -+ -+/* new uImage format support */ -+#define CONFIG_FIT 1 -+#define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */ -+ -+/* I2C */ -+#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -+#define CONFIG_HARD_I2C /* I2C with hardware support */ -+#undef CONFIG_SOFT_I2C /* I2C bit-banged */ -+#define CONFIG_I2C_MULTI_BUS -+#define CONFIG_I2C_CMD_TREE -+#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 -+#define CONFIG_SYS_I2C_SLAVE 0x7F -+#define CONFIG_SYS_I2C_NOPROBES {{0,0x29}}/* Don't probe these addrs */ -+#define CONFIG_SYS_I2C_OFFSET 0x3000 -+#define CONFIG_SYS_I2C2_OFFSET 0x3100 -+ -+/* -+ * I2C2 EEPROM -+ */ -+#define CONFIG_ID_EEPROM -+#ifdef CONFIG_ID_EEPROM -+#define CONFIG_SYS_I2C_EEPROM_NXID -+#endif -+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 -+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 -+#define CONFIG_SYS_EEPROM_BUS_NUM 0 -+ -+/* -+ * General PCI -+ * Memory space is mapped 1-1, but I/O space must start from 0. -+ */ -+ -+/* controller 3, Slot 1, tgtid 3, Base address b000 */ -+#define CONFIG_SYS_PCIE3_MEM_VIRT 0x80000000 -+#ifdef CONFIG_PHYS_64BIT -+#define CONFIG_SYS_PCIE3_MEM_BUS 0xc0000000 -+#define CONFIG_SYS_PCIE3_MEM_PHYS 0xc00000000ull -+#else -+#define CONFIG_SYS_PCIE3_MEM_BUS 0x80000000 -+#define CONFIG_SYS_PCIE3_MEM_PHYS 0x80000000 -+#endif -+#define CONFIG_SYS_PCIE3_MEM_SIZE 0x20000000 /* 512M */ -+#define CONFIG_SYS_PCIE3_IO_VIRT 0xffc00000 -+#define CONFIG_SYS_PCIE3_IO_BUS 0x00000000 -+#ifdef CONFIG_PHYS_64BIT -+#define CONFIG_SYS_PCIE3_IO_PHYS 0xfffc00000ull -+#else -+#define CONFIG_SYS_PCIE3_IO_PHYS 0xffc00000 -+#endif -+#define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ -+ -+/* controller 2, direct to uli, tgtid 2, Base address 9000 */ -+#define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 -+#ifdef CONFIG_PHYS_64BIT -+#define CONFIG_SYS_PCIE2_MEM_BUS 0xc0000000 -+#define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull -+#else -+#define CONFIG_SYS_PCIE2_MEM_BUS 0xa0000000 -+#define CONFIG_SYS_PCIE2_MEM_PHYS 0xa0000000 -+#endif -+#define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */ -+#define CONFIG_SYS_PCIE2_IO_VIRT 0xffc10000 -+#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 -+#ifdef CONFIG_PHYS_64BIT -+#define CONFIG_SYS_PCIE2_IO_PHYS 0xfffc10000ull -+#else -+#define CONFIG_SYS_PCIE2_IO_PHYS 0xffc10000 -+#endif -+#define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ -+ -+/* controller 1, Slot 2, tgtid 1, Base address a000 */ -+#define CONFIG_SYS_PCIE1_MEM_VIRT 0xc0000000 -+#ifdef CONFIG_PHYS_64BIT -+#define CONFIG_SYS_PCIE1_MEM_BUS 0xc0000000 -+#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc40000000ull -+#else -+#define CONFIG_SYS_PCIE1_MEM_BUS 0xc0000000 -+#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc0000000 -+#endif -+#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ -+#define CONFIG_SYS_PCIE1_IO_VIRT 0xffc20000 -+#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 -+#ifdef CONFIG_PHYS_64BIT -+#define CONFIG_SYS_PCIE1_IO_PHYS 0xfffc20000ull -+#else -+#define CONFIG_SYS_PCIE1_IO_PHYS 0xffc20000 -+#endif -+#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ -+ -+#if defined(CONFIG_PCI) -+ -+/*PCIE video card used*/ -+#define VIDEO_IO_OFFSET CONFIG_SYS_PCIE1_IO_VIRT -+ -+/* video */ -+#define CONFIG_VIDEO -+ -+#if defined(CONFIG_VIDEO) -+#define CONFIG_BIOSEMU -+#define CONFIG_CFB_CONSOLE -+#define CONFIG_VIDEO_SW_CURSOR -+#define CONFIG_VGA_AS_SINGLE_DEVICE -+#define CONFIG_ATI_RADEON_FB -+#define CONFIG_VIDEO_LOGO -+/*#define CONFIG_CONSOLE_CURSOR*/ -+#define CONFIG_SYS_ISA_IO_BASE_ADDRESS VIDEO_IO_OFFSET -+#endif -+ -+#define CONFIG_NET_MULTI -+#define CONFIG_PCI_PNP /* do pci plug-and-play */ -+ -+#undef CONFIG_EEPRO100 -+#undef CONFIG_TULIP -+#define CONFIG_RTL8139 -+ -+#ifdef CONFIG_RTL8139 -+/* This macro is used by RTL8139 but not defined in PPC architecture */ -+#define KSEG1ADDR(x) (x) -+#define _IO_BASE 0x00000000 -+#endif -+ -+#ifndef CONFIG_PCI_PNP -+ #define PCI_ENET0_IOADDR CONFIG_SYS_PCIE3_IO_BUS -+ #define PCI_ENET0_MEMADDR CONFIG_SYS_PCIE3_IO_BUS -+ #define PCI_IDSEL_NUMBER 0x11 /* IDSEL = AD11 */ -+#endif -+ -+#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -+#define CONFIG_DOS_PARTITION -+#define CONFIG_SCSI_AHCI -+ -+#ifdef CONFIG_SCSI_AHCI -+#define CONFIG_SATA_ULI5288 -+#define CONFIG_SYS_SCSI_MAX_SCSI_ID 4 -+#define CONFIG_SYS_SCSI_MAX_LUN 1 -+#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * CONFIG_SYS_SCSI_MAX_LUN) -+#define CONFIG_SYS_SCSI_MAXDEVICE CONFIG_SYS_SCSI_MAX_DEVICE -+#endif /* SCSI */ -+ -+#endif /* CONFIG_PCI */ -+ -+ -+#if defined(CONFIG_TSEC_ENET) -+ -+#ifndef CONFIG_NET_MULTI -+#define CONFIG_NET_MULTI 1 -+#endif -+ -+#define CONFIG_MII 1 /* MII PHY management */ -+#define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ -+#define CONFIG_TSEC1 1 -+#define CONFIG_TSEC1_NAME "eTSEC1" -+#define CONFIG_TSEC2 1 -+#define CONFIG_TSEC2_NAME "eTSEC2" -+#define CONFIG_TSEC3 1 -+#define CONFIG_TSEC3_NAME "eTSEC3" -+ -+#define CONFIG_PIXIS_SGMII_CMD -+#define CONFIG_FSL_SGMII_RISER 1 -+#define SGMII_RISER_PHY_OFFSET 0x1b -+ -+#ifdef CONFIG_FSL_SGMII_RISER -+#define CONFIG_SYS_TBIPA_VALUE 0x10 /* avoid conflict with eTSEC4 paddr */ -+#endif -+ -+#define TSEC1_PHY_ADDR 0 -+#define TSEC2_PHY_ADDR 1 -+#define TSEC3_PHY_ADDR 2 -+ -+#define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) -+#define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) -+#define TSEC3_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) -+ -+#define TSEC1_PHYIDX 0 -+#define TSEC2_PHYIDX 0 -+#define TSEC3_PHYIDX 0 -+ -+#define CONFIG_ETHPRIME "eTSEC1" -+ -+#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ -+#endif /* CONFIG_TSEC_ENET */ -+ -+/* -+ * Environment -+ */ -+#define CONFIG_ENV_IS_IN_FLASH 1 -+#if CONFIG_SYS_MONITOR_BASE > 0xfff80000 -+#define CONFIG_ENV_ADDR 0xfff80000 -+#else -+#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) -+#endif -+#define CONFIG_ENV_SIZE 0x2000 -+#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ -+ -+#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ -+#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ -+ -+/* -+ * Command line configuration. -+ */ -+#include -+ -+#define CONFIG_CMD_IRQ -+#define CONFIG_CMD_PING -+#define CONFIG_CMD_I2C -+#define CONFIG_CMD_MII -+#define CONFIG_CMD_ELF -+#define CONFIG_CMD_IRQ -+#define CONFIG_CMD_SETEXPR -+ -+#if defined(CONFIG_PCI) -+#define CONFIG_CMD_PCI -+#define CONFIG_CMD_BEDBUG -+#define CONFIG_CMD_NET -+#define CONFIG_CMD_SCSI -+#define CONFIG_CMD_EXT2 -+#endif -+ -+#undef CONFIG_WATCHDOG /* watchdog disabled */ -+ -+/* -+ * Miscellaneous configurable options -+ */ -+#define CONFIG_SYS_LONGHELP /* undef to save memory */ -+#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -+#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ -+#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ -+#if defined(CONFIG_CMD_KGDB) -+#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -+#else -+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -+#endif -+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ -+#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */ -+ -+/* -+ * For booting Linux, the board info and command line data -+ * have to be in the first 8 MB of memory, since this is -+ * the maximum mapped by the Linux kernel during initialization. -+ */ -+#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ -+ -+/* -+ * Internal Definitions -+ * -+ * Boot Flags -+ */ -+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -+#define BOOTFLAG_WARM 0x02 /* Software reboot */ -+ -+#if defined(CONFIG_CMD_KGDB) -+#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ -+#endif -+ -+/* -+ * Environment Configuration -+ */ -+ -+/* The mac addresses for all ethernet interface */ -+#if defined(CONFIG_TSEC_ENET) -+#define CONFIG_HAS_ETH0 -+#define CONFIG_ETHADDR 00:E0:0C:02:00:FD -+#define CONFIG_HAS_ETH1 -+#define CONFIG_ETH1ADDR 00:E0:0C:02:01:FD -+#define CONFIG_HAS_ETH2 -+#define CONFIG_ETH2ADDR 00:E0:0C:02:02:FD -+#define CONFIG_HAS_ETH3 -+#define CONFIG_ETH3ADDR 00:E0:0C:02:03:FD -+#endif -+ -+#define CONFIG_IPADDR 192.168.1.254 -+ -+#define CONFIG_HOSTNAME unknown -+#define CONFIG_ROOTPATH /opt/nfsroot -+#define CONFIG_BOOTFILE uImage -+#define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */ -+ -+#define CONFIG_SERVERIP 192.168.1.1 -+#define CONFIG_GATEWAYIP 192.168.1.1 -+#define CONFIG_NETMASK 255.255.255.0 -+ -+/* default location for tftp and bootm */ -+#define CONFIG_LOADADDR 1000000 -+ -+#define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */ -+#undef CONFIG_BOOTARGS /* the boot command will set bootargs */ -+ -+#define CONFIG_BAUDRATE 115200 -+ -+#define CONFIG_EXTRA_ENV_SETTINGS \ -+ "perf_mode=stable\0" \ -+ "memctl_intlv_ctl=2\0" \ -+ "netdev=eth0\0" \ -+ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ -+ "tftpflash=tftpboot $loadaddr $uboot; " \ -+ "protect off " MK_STR(TEXT_BASE) " +$filesize; " \ -+ "erase " MK_STR(TEXT_BASE) " +$filesize; " \ -+ "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \ -+ "protect on " MK_STR(TEXT_BASE) " +$filesize; " \ -+ "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \ -+ "consoledev=ttyS0\0" \ -+ "ramdiskaddr=2000000\0" \ -+ "ramdiskfile=p2020ds/ramdisk.uboot\0" \ -+ "fdtaddr=c00000\0" \ -+ "fdtfile=p2020ds/p2020ds.dtb\0" \ -+ "bdev=sda3\0" -+ -+#define CONFIG_HDBOOT \ -+ "setenv bootargs root=/dev/$bdev rw " \ -+ "console=$consoledev,$baudrate $othbootargs;" \ -+ "tftp $loadaddr $bootfile;" \ -+ "tftp $fdtaddr $fdtfile;" \ -+ "bootm $loadaddr - $fdtaddr" -+ -+#define CONFIG_NFSBOOTCOMMAND \ -+ "setenv bootargs root=/dev/nfs rw " \ -+ "nfsroot=$serverip:$rootpath " \ -+ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ -+ "console=$consoledev,$baudrate $othbootargs;" \ -+ "tftp $loadaddr $bootfile;" \ -+ "tftp $fdtaddr $fdtfile;" \ -+ "bootm $loadaddr - $fdtaddr" -+ -+#define CONFIG_RAMBOOTCOMMAND \ -+ "setenv bootargs root=/dev/ram rw " \ -+ "console=$consoledev,$baudrate $othbootargs;" \ -+ "tftp $ramdiskaddr $ramdiskfile;" \ -+ "tftp $loadaddr $bootfile;" \ -+ "tftp $fdtaddr $fdtfile;" \ -+ "bootm $loadaddr $ramdiskaddr $fdtaddr" -+ -+#define CONFIG_BOOTCOMMAND CONFIG_HDBOOT -+ -+#endif /* __CONFIG_H */ -diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h -index 5c4d69b..e214d70 100644 ---- a/include/configs/PIP405.h -+++ b/include/configs/PIP405.h -@@ -281,6 +281,7 @@ - #define CONFIG_PPC4xx_EMAC - #define CONFIG_MII 1 /* MII PHY management */ - #define CONFIG_PHY_ADDR 1 /* PHY address */ -+#define CONFIG_NET_MULTI - /************************************************************ - * RTC - ***********************************************************/ -diff --git a/include/configs/PMC405.h b/include/configs/PMC405.h -index c598d00..a9e7134 100644 ---- a/include/configs/PMC405.h -+++ b/include/configs/PMC405.h -@@ -282,9 +282,6 @@ - /* - * FPGA stuff - */ --#define CONFIG_SYS_FPGA_XC95XL 1 /* using Xilinx XC95XL CPLD */ --#define CONFIG_SYS_FPGA_MAX_SIZE (32 * 1024) /* 32kByte for CPLD */ -- - /* FPGA program pin configuration */ - #define CONFIG_SYS_FPGA_PRG 0x04000000 /* JTAG TMS pin (output) */ - #define CONFIG_SYS_FPGA_CLK 0x02000000 /* JTAG TCK pin (output) */ -diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h -index fc48bc1..012ae79 100644 ---- a/include/configs/PMC440.h -+++ b/include/configs/PMC440.h -@@ -230,7 +230,6 @@ - #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ - #define CONFIG_SYS_I2C_SLAVE 0x7F - --#define CONFIG_I2C_CMD_TREE 1 - #define CONFIG_I2C_MULTI_BUS 1 - - #define CONFIG_SYS_I2C_MULTI_EEPROMS -diff --git a/include/configs/SIMPC8313.h b/include/configs/SIMPC8313.h -index 79582e1..72fe115 100644 ---- a/include/configs/SIMPC8313.h -+++ b/include/configs/SIMPC8313.h -@@ -32,8 +32,8 @@ - #define CONFIG_NAND_U_BOOT - - #define CONFIG_E300 1 --#define CONFIG_MPC83XX 1 --#define CONFIG_MPC831X 1 -+#define CONFIG_MPC83xx 1 -+#define CONFIG_MPC831x 1 - #define CONFIG_MPC8313 1 - - #define CONFIG_PCI -@@ -190,6 +190,7 @@ - - /* mtdparts command line support */ - #define CONFIG_CMD_MTDPARTS -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ - #define MTDIDS_DEFAULT "nand0=nand0" - #define MTDPARTS_DEFAULT "mtdparts=nand0:2M(u-boot),6M(kernel),-(jffs2)" - -@@ -223,7 +224,6 @@ - #define CONFIG_HARD_I2C /* I2C with hardware support*/ - #define CONFIG_FSL_I2C - #define CONFIG_I2C_MULTI_BUS --#define CONFIG_I2C_CMD_TREE - #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ - #define CONFIG_SYS_I2C_SLAVE 0x7F - #define CONFIG_SYS_I2C_NOPROBES {{0,0x69}} /* Don't probe these addrs */ -diff --git a/include/configs/SMN42.h b/include/configs/SMN42.h -index 05f6d9f..adb6ac5 100644 ---- a/include/configs/SMN42.h -+++ b/include/configs/SMN42.h -@@ -30,8 +30,6 @@ - * If we are developing, we might want to start u-boot from ram - * so we MUST NOT initialize critical regs like mem-timing ... - */ --#undef CONFIG_INIT_CRITICAL /* undef for developing */ -- - #undef CONFIG_SKIP_LOWLEVEL_INIT - #undef CONFIG_SKIP_RELOCATE_UBOOT - -diff --git a/include/configs/TB5200.h b/include/configs/TB5200.h -index 92b4fa5..3438aba 100644 ---- a/include/configs/TB5200.h -+++ b/include/configs/TB5200.h -@@ -276,6 +276,8 @@ - - /* Dynamic MTD partition support */ - #define CONFIG_CMD_MTDPARTS -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -+#define CONFIG_FLASH_CFI_MTD - #define MTDIDS_DEFAULT "nor0=TQM5200-0" - #if defined(CONFIG_TQM5200_B) - #define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:768k(firmware)," \ -diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h -index fe1d102..a4336a7 100644 ---- a/include/configs/TQM5200.h -+++ b/include/configs/TQM5200.h -@@ -408,6 +408,8 @@ - - /* Dynamic MTD partition support */ - #define CONFIG_CMD_MTDPARTS -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -+#define CONFIG_FLASH_CFI_MTD - #define MTDIDS_DEFAULT "nor0=TQM5200-0" - - #ifdef CONFIG_STK52XX -diff --git a/include/configs/TQM823L.h b/include/configs/TQM823L.h -index 87e5a65..1f816f3 100644 ---- a/include/configs/TQM823L.h -+++ b/include/configs/TQM823L.h -@@ -232,6 +232,8 @@ - * Dynamic MTD partition support - */ - #define CONFIG_CMD_MTDPARTS -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -+#define CONFIG_FLASH_CFI_MTD - #define MTDIDS_DEFAULT "nor0=TQM8xxL-0" - - #define MTDPARTS_DEFAULT "mtdparts=TQM8xxL-0:256k(u-boot)," \ -diff --git a/include/configs/TQM823M.h b/include/configs/TQM823M.h -index f666443..42dcbfc 100644 ---- a/include/configs/TQM823M.h -+++ b/include/configs/TQM823M.h -@@ -228,6 +228,8 @@ - * Dynamic MTD partition support - */ - #define CONFIG_CMD_MTDPARTS -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -+#define CONFIG_FLASH_CFI_MTD - #define MTDIDS_DEFAULT "nor0=TQM8xxM-0" - - #define MTDPARTS_DEFAULT "mtdparts=TQM8xxM-0:512k(u-boot)," \ -diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h -index 5510730..efade69 100644 ---- a/include/configs/TQM834x.h -+++ b/include/configs/TQM834x.h -@@ -32,8 +32,8 @@ - * High Level Configuration Options - */ - #define CONFIG_E300 1 /* E300 Family */ --#define CONFIG_MPC83XX 1 /* MPC83XX family */ --#define CONFIG_MPC834X 1 /* MPC834X specific */ -+#define CONFIG_MPC83xx 1 /* MPC83xx family */ -+#define CONFIG_MPC834x 1 /* MPC834x specific */ - #define CONFIG_MPC8349 1 /* MPC8349 specific */ - #define CONFIG_TQM834X 1 /* TQM834X board specific */ - -@@ -78,13 +78,12 @@ - * FLASH on the Local Bus - */ - #define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ --#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ -+#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ - #undef CONFIG_SYS_FLASH_CHECKSUM - #define CONFIG_SYS_FLASH_BASE 0x80000000 /* start of FLASH */ - #define CONFIG_SYS_FLASH_SIZE 8 /* FLASH size in MB */ -- --/* buffered writes in the AMD chip set is not supported yet */ --#undef CONFIG_SYS_FLASH_USE_BUFFER_WRITE -+#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sectors */ -+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE - - /* - * FLASH bank number detection -@@ -146,9 +145,9 @@ extern int tqm834x_num_flash_banks; - #define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ - - #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) --#define CONFIG_SYS_RAMBOOT -+# define CONFIG_SYS_RAMBOOT - #else --#undef CONFIG_SYS_RAMBOOT -+# undef CONFIG_SYS_RAMBOOT - #endif - - #define CONFIG_SYS_INIT_RAM_LOCK 1 -@@ -159,8 +158,8 @@ extern int tqm834x_num_flash_banks; - #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) - #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - --#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */ --#define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc */ -+#define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384 kB = 3 sect. for Mon */ -+#define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserve 512 kB for malloc */ - - /* - * Serial Port -@@ -275,22 +274,15 @@ extern int tqm834x_num_flash_banks; - /* - * Environment - */ --#define CONFIG_ENV_OVERWRITE -- --#ifndef CONFIG_SYS_RAMBOOT -- #define CONFIG_ENV_IS_IN_FLASH 1 -- #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + 0x40000) -- #define CONFIG_ENV_SECT_SIZE 0x40000 /* 256K(one sector) for env */ -- #define CONFIG_ENV_SIZE 0x2000 --#else -- #define CONFIG_SYS_NO_FLASH 1 /* Flash is not usable now */ -- #define CONFIG_ENV_IS_NOWHERE 1 /* Store ENV in memory only */ -- #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000) -- #define CONFIG_ENV_SIZE 0x2000 --#endif -+#define CONFIG_ENV_IS_IN_FLASH 1 -+#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) -+#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) for env */ -+#define CONFIG_ENV_SIZE 0x8000 /* 32K max size */ -+#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) -+#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) - - #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ --#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ -+#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ - - /* - * BOOTP options -@@ -306,14 +298,18 @@ extern int tqm834x_num_flash_banks; - */ - #include - -+#define CONFIG_CMD_ASKENV - #define CONFIG_CMD_DATE -+#define CONFIG_CMD_DHCP - #define CONFIG_CMD_DTT - #define CONFIG_CMD_EEPROM - #define CONFIG_CMD_I2C -+#define CONFIG_CMD_NFS - #define CONFIG_CMD_JFFS2 - #define CONFIG_CMD_MII - #define CONFIG_CMD_PING --#define CONFIG_CMD_DHCP -+#define CONFIG_CMD_REGINFO -+#define CONFIG_CMD_SNTP - - #if defined(CONFIG_PCI) - #define CONFIG_CMD_PCI -@@ -350,6 +346,11 @@ extern int tqm834x_num_flash_banks; - - #undef CONFIG_WATCHDOG /* watchdog disabled */ - -+/* pass open firmware flat tree */ -+#define CONFIG_OF_LIBFDT 1 -+#define CONFIG_OF_BOARD_SETUP 1 -+#define CONFIG_OF_STDOUT_VIA_ALIAS 1 -+ - /* - * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is -@@ -494,20 +495,35 @@ extern int tqm834x_num_flash_banks; - "addip=setenv bootargs ${bootargs} " \ - "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ - ":${hostname}:${netdev}:off panic=1\0" \ -- "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\ -- "flash_nfs=run nfsargs addip addtty;" \ -+ "addcons=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\ -+ "flash_nfs_old=run nfsargs addip addcons;" \ - "bootm ${kernel_addr}\0" \ -- "flash_self=run ramargs addip addtty;" \ -+ "flash_nfs=run nfsargs addip addcons;" \ -+ "bootm ${kernel_addr} - ${fdt_addr}\0" \ -+ "flash_self_old=run ramargs addip addcons;" \ - "bootm ${kernel_addr} ${ramdisk_addr}\0" \ -- "net_nfs=tftp 400000 ${bootfile};run nfsargs addip addtty;" \ -- "bootm\0" \ -+ "flash_self=run ramargs addip addcons;" \ -+ "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ -+ "net_nfs_old=tftp 400000 ${bootfile};" \ -+ "run nfsargs addip addcons;bootm\0" \ -+ "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ -+ "tftp ${fdt_addr_r} ${fdt_file}; " \ -+ "run nfsargs addip addcons; " \ -+ "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ - "rootpath=/opt/eldk/ppc_6xx\0" \ -- "bootfile=/tftpboot/tqm834x/uImage\0" \ -- "kernel_addr=80060000\0" \ -- "ramdisk_addr=80160000\0" \ -- "load=tftp 100000 /tftpboot/tqm834x/u-boot.bin\0" \ -- "update=protect off 80000000 8003ffff; " \ -- "era 80000000 8003ffff; cp.b 100000 80000000 40000\0" \ -+ "bootfile=tqm834x/uImage\0" \ -+ "fdtfile=tqm834x/tqm834x.dtb\0" \ -+ "kernel_addr_r=400000\0" \ -+ "fdt_addr_r=600000\0" \ -+ "ramdisk_addr_r=800000\0" \ -+ "kernel_addr=800C0000\0" \ -+ "fdt_addr=800A0000\0" \ -+ "ramdisk_addr=80300000\0" \ -+ "u-boot=tqm834x/u-boot.bin\0" \ -+ "load=tftp 200000 ${u-boot}\0" \ -+ "update=protect off 80000000 +${filesize};" \ -+ "era 80000000 +${filesize};" \ -+ "cp.b 200000 80000000 ${filesize}\0" \ - "upd=run load update\0" \ - "" - -@@ -518,6 +534,8 @@ extern int tqm834x_num_flash_banks; - */ - /* mtdparts command line support */ - #define CONFIG_CMD_MTDPARTS -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -+#define CONFIG_FLASH_CFI_MTD - #define MTDIDS_DEFAULT "nor0=TQM834x-0" - - /* default mtd partition table */ -diff --git a/include/configs/TQM850L.h b/include/configs/TQM850L.h -index dc80b47..290e211 100644 ---- a/include/configs/TQM850L.h -+++ b/include/configs/TQM850L.h -@@ -217,6 +217,8 @@ - * Dynamic MTD partition support - */ - #define CONFIG_CMD_MTDPARTS -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -+#define CONFIG_FLASH_CFI_MTD - #define MTDIDS_DEFAULT "nor0=TQM8xxL-0" - - #define MTDPARTS_DEFAULT "mtdparts=TQM8xxL-0:256k(u-boot)," \ -diff --git a/include/configs/TQM850M.h b/include/configs/TQM850M.h -index 2289443..2170df5 100644 ---- a/include/configs/TQM850M.h -+++ b/include/configs/TQM850M.h -@@ -217,6 +217,8 @@ - * Dynamic MTD partition support - */ - #define CONFIG_CMD_MTDPARTS -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -+#define CONFIG_FLASH_CFI_MTD - #define MTDIDS_DEFAULT "nor0=TQM8xxM-0" - - #define MTDPARTS_DEFAULT "mtdparts=TQM8xxM-0:512k(u-boot)," \ -diff --git a/include/configs/TQM855L.h b/include/configs/TQM855L.h -index 999bdaa..3d7dc42 100644 ---- a/include/configs/TQM855L.h -+++ b/include/configs/TQM855L.h -@@ -222,6 +222,8 @@ - * Dynamic MTD partition support - */ - #define CONFIG_CMD_MTDPARTS -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -+#define CONFIG_FLASH_CFI_MTD - #define MTDIDS_DEFAULT "nor0=TQM8xxL-0" - - #define MTDPARTS_DEFAULT "mtdparts=TQM8xxL-0:256k(u-boot)," \ -diff --git a/include/configs/TQM855M.h b/include/configs/TQM855M.h -index b54967d..35cfa08 100644 ---- a/include/configs/TQM855M.h -+++ b/include/configs/TQM855M.h -@@ -257,6 +257,8 @@ - * Dynamic MTD partition support - */ - #define CONFIG_CMD_MTDPARTS -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -+#define CONFIG_FLASH_CFI_MTD - #define MTDIDS_DEFAULT "nor0=TQM8xxM-0" - - #define MTDPARTS_DEFAULT "mtdparts=TQM8xxM-0:512k(u-boot)," \ -diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h -index 0846501..6f13c63 100644 ---- a/include/configs/TQM85xx.h -+++ b/include/configs/TQM85xx.h -@@ -567,6 +567,8 @@ - #define CONFIG_JFFS2_NAND 1 - - #ifdef CONFIG_CMD_MTDPARTS -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -+#define CONFIG_FLASH_CFI_MTD - #define MTDIDS_DEFAULT "nand0=TQM85xx-nand" - #define MTDPARTS_DEFAULT "mtdparts=TQM85xx-nand:-" - #else -diff --git a/include/configs/TQM860L.h b/include/configs/TQM860L.h -index 2e2a165..4ac485d 100644 ---- a/include/configs/TQM860L.h -+++ b/include/configs/TQM860L.h -@@ -221,6 +221,8 @@ - * Dynamic MTD partition support - */ - #define CONFIG_CMD_MTDPARTS -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -+#define CONFIG_FLASH_CFI_MTD - #define MTDIDS_DEFAULT "nor0=TQM8xxL-0" - - #define MTDPARTS_DEFAULT "mtdparts=TQM8xxL-0:256k(u-boot)," \ -diff --git a/include/configs/TQM860M.h b/include/configs/TQM860M.h -index 1148f2e..39da0bb 100644 ---- a/include/configs/TQM860M.h -+++ b/include/configs/TQM860M.h -@@ -222,6 +222,8 @@ - * Dynamic MTD partition support - */ - #define CONFIG_CMD_MTDPARTS -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -+#define CONFIG_FLASH_CFI_MTD - #define MTDIDS_DEFAULT "nor0=TQM8xxM-0" - - #define MTDPARTS_DEFAULT "mtdparts=TQM8xxM-0:512k(u-boot)," \ -diff --git a/include/configs/TQM862L.h b/include/configs/TQM862L.h -index 577f982..1f79b17 100644 ---- a/include/configs/TQM862L.h -+++ b/include/configs/TQM862L.h -@@ -225,6 +225,8 @@ - * Dynamic MTD partition support - */ - #define CONFIG_CMD_MTDPARTS -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -+#define CONFIG_FLASH_CFI_MTD - #define MTDIDS_DEFAULT "nor0=TQM8xxL-0" - - #define MTDPARTS_DEFAULT "mtdparts=TQM8xxL-0:256k(u-boot)," \ -diff --git a/include/configs/TQM862M.h b/include/configs/TQM862M.h -index 69070e6..86d5b01 100644 ---- a/include/configs/TQM862M.h -+++ b/include/configs/TQM862M.h -@@ -226,6 +226,8 @@ - * Dynamic MTD partition support - */ - #define CONFIG_CMD_MTDPARTS -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -+#define CONFIG_FLASH_CFI_MTD - #define MTDIDS_DEFAULT "nor0=TQM8xxM-0" - - #define MTDPARTS_DEFAULT "mtdparts=TQM8xxM-0:512k(u-boot)," \ -diff --git a/include/configs/TQM866M.h b/include/configs/TQM866M.h -index bb68614..04f538c 100644 ---- a/include/configs/TQM866M.h -+++ b/include/configs/TQM866M.h -@@ -266,6 +266,8 @@ - * Dynamic MTD partition support - */ - #define CONFIG_CMD_MTDPARTS -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -+#define CONFIG_FLASH_CFI_MTD - #define MTDIDS_DEFAULT "nor0=TQM8xxM-0" - - #define MTDPARTS_DEFAULT "mtdparts=TQM8xxM-0:512k(u-boot)," \ -diff --git a/include/configs/VOM405.h b/include/configs/VOM405.h -index db00c65..4717869 100644 ---- a/include/configs/VOM405.h -+++ b/include/configs/VOM405.h -@@ -177,10 +177,10 @@ - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 - */ - #define CONFIG_SYS_SDRAM_BASE 0x00000000 --#define CONFIG_SYS_FLASH_BASE 0xFFFC0000 --#define CONFIG_SYS_MONITOR_BASE TEXT_BASE --#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Monitor */ --#define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */ -+#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE -+#define CONFIG_SYS_MONITOR_BASE TEXT_BASE -+#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1) -+#define CONFIG_SYS_MALLOC_LEN (256 * 1024) - - #if (CONFIG_SYS_MONITOR_BASE < FLASH_BASE0_PRELIM) - # define CONFIG_SYS_RAMBOOT 1 -@@ -231,8 +231,7 @@ - /* - * FPGA stuff - */ --#define CONFIG_SYS_FPGA_XC95XL 1 /* using Xilinx XC95XL CPLD */ --#define CONFIG_SYS_FPGA_MAX_SIZE 32*1024 /* 32kByte is enough for CPLD */ -+#define CONFIG_SYS_XSVF_DEFAULT_ADDR 0xfffc0000 - - /* FPGA program pin configuration */ - #define CONFIG_SYS_FPGA_PRG 0x04000000 /* JTAG TMS pin (ppc output) */ -@@ -293,17 +292,7 @@ - * Default speed selection (cpu_plb_opb_ebc) in mhz. - * This value will be set if iic boot eprom is disabled. - */ --#if 0 --#define PLLMR0_DEFAULT PLLMR0_266_133_66_33 --#define PLLMR1_DEFAULT PLLMR1_266_133_66_33 --#endif --#if 0 --#define PLLMR0_DEFAULT PLLMR0_200_100_50_33 --#define PLLMR1_DEFAULT PLLMR1_200_100_50_33 --#endif --#if 1 - #define PLLMR0_DEFAULT PLLMR0_133_66_66_33 - #define PLLMR1_DEFAULT PLLMR1_133_66_66_33 --#endif - - #endif /* __CONFIG_H */ -diff --git a/include/configs/W7OLMC.h b/include/configs/W7OLMC.h -index ceef76e..553845d 100644 ---- a/include/configs/W7OLMC.h -+++ b/include/configs/W7OLMC.h -@@ -68,6 +68,7 @@ - #define CONFIG_PPC4xx_EMAC - #define CONFIG_MII 1 /* MII PHY management */ - #define CONFIG_PHY_ADDR 0 /* PHY address */ -+#define CONFIG_NET_MULTI - - #define CONFIG_RTC_M48T35A 1 /* ST Electronics M48 timekeeper */ - -diff --git a/include/configs/W7OLMG.h b/include/configs/W7OLMG.h -index 11e0630..73d6d24 100644 ---- a/include/configs/W7OLMG.h -+++ b/include/configs/W7OLMG.h -@@ -68,6 +68,7 @@ - #define CONFIG_PPC4xx_EMAC - #define CONFIG_MII 1 /* MII PHY management */ - #define CONFIG_PHY_ADDR 0 /* PHY address */ -+#define CONFIG_NET_MULTI - - #define CONFIG_RTC_M48T35A 1 /* ST Electronics M48 timekeeper */ - #define CONFIG_DTT_LM75 1 /* ON Semi's LM75 */ -diff --git a/include/configs/WUH405.h b/include/configs/WUH405.h -index 99188bc..5c281a1 100644 ---- a/include/configs/WUH405.h -+++ b/include/configs/WUH405.h -@@ -58,6 +58,7 @@ - #define CONFIG_MII 1 /* MII PHY management */ - #define CONFIG_PHY_ADDR 0 /* PHY address */ - #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ -+#define CONFIG_NET_MULTI - - #define CONFIG_PHY_CLK_FREQ EMAC_STACR_CLK_66MHZ /* 66 MHz OPB clock*/ - -diff --git a/include/configs/XPEDITE5200.h b/include/configs/XPEDITE5200.h -index 370aae1..89ab692 100644 ---- a/include/configs/XPEDITE5200.h -+++ b/include/configs/XPEDITE5200.h -@@ -226,7 +226,6 @@ - #define CONFIG_SYS_I2C_OFFSET 0x3000 - #define CONFIG_SYS_I2C2_OFFSET 0x3100 - #define CONFIG_I2C_MULTI_BUS --#define CONFIG_I2C_CMD_TREE - - /* I2C EEPROM */ - #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 -diff --git a/include/configs/XPEDITE5370.h b/include/configs/XPEDITE5370.h -index a353a14..536e063 100644 ---- a/include/configs/XPEDITE5370.h -+++ b/include/configs/XPEDITE5370.h -@@ -244,7 +244,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); - #define CONFIG_SYS_I2C_OFFSET 0x3000 - #define CONFIG_SYS_I2C2_OFFSET 0x3100 - #define CONFIG_I2C_MULTI_BUS --#define CONFIG_I2C_CMD_TREE - - /* PEX8518 slave I2C interface */ - #define CONFIG_SYS_I2C_PEX8518_ADDR 0x70 -diff --git a/include/configs/ads5121.h b/include/configs/ads5121.h -deleted file mode 100644 -index d879024..0000000 ---- a/include/configs/ads5121.h -+++ /dev/null -@@ -1,551 +0,0 @@ --/* -- * (C) Copyright 2007, 2008 DENX Software Engineering -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * You should have received a copy of the GNU General Public License -- * along with this program; if not, write to the Free Software -- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -- * MA 02111-1307 USA -- */ -- --/* -- * ADS5121 board configuration file -- */ -- --#ifndef __CONFIG_H --#define __CONFIG_H -- --#define CONFIG_ADS5121 1 --/* -- * Memory map for the ADS5121 board: -- * -- * 0x0000_0000 - 0x0FFF_FFFF DDR RAM (256 MB) -- * 0x3000_0000 - 0x3001_FFFF SRAM (128 KB) -- * 0x8000_0000 - 0x803F_FFFF IMMR (4 MB) -- * 0x8200_0000 - 0x8200_001F CPLD (32 B) -- * 0x8400_0000 - 0x82FF_FFFF PCI I/O space (16 MB) -- * 0xA000_0000 - 0xAFFF_FFFF PCI memory space (256 MB) -- * 0xB000_0000 - 0xBFFF_FFFF PCI memory mapped I/O space (256 MB) -- * 0xFC00_0000 - 0xFFFF_FFFF NOR Boot FLASH (64 MB) -- */ -- --/* -- * High Level Configuration Options -- */ --#define CONFIG_E300 1 /* E300 Family */ --#define CONFIG_MPC512X 1 /* MPC512X family */ --#define CONFIG_FSL_DIU_FB 1 /* FSL DIU */ --#undef CONFIG_FSL_DIU_LOGO_BMP /* Don't include FSL DIU binary bmp */ -- --/* video */ --#undef CONFIG_VIDEO -- --#if defined(CONFIG_VIDEO) --#define CONFIG_CFB_CONSOLE --#define CONFIG_VGA_AS_SINGLE_DEVICE --#endif -- --/* CONFIG_PCI is defined at config time */ -- --#ifdef CONFIG_ADS5121_REV2 --#define CONFIG_SYS_MPC512X_CLKIN 66000000 /* in Hz */ --#else --#define CONFIG_SYS_MPC512X_CLKIN 33333333 /* in Hz */ --#define CONFIG_PCI --#endif -- --#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */ --#define CONFIG_MISC_INIT_R -- --#define CONFIG_SYS_IMMR 0x80000000 --#define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_IMMR+0x2100) -- --#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */ --#define CONFIG_SYS_MEMTEST_END 0x00400000 -- --/* -- * DDR Setup - manually set all parameters as there's no SPD etc. -- */ --#ifdef CONFIG_ADS5121_REV2 --#define CONFIG_SYS_DDR_SIZE 256 /* MB */ --#else --#define CONFIG_SYS_DDR_SIZE 512 /* MB */ --#endif --#define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is system memory*/ --#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE -- --/* DDR Controller Configuration -- * -- * SYS_CFG: -- * [31:31] MDDRC Soft Reset: Diabled -- * [30:30] DRAM CKE pin: Enabled -- * [29:29] DRAM CLK: Enabled -- * [28:28] Command Mode: Enabled (For initialization only) -- * [27:25] DRAM Row Select: dram_row[15:0] = magenta_address[25:10] -- * [24:21] DRAM Bank Select: dram_bank[1:0] = magenta_address[11:10] -- * [20:19] Read Test: DON'T USE -- * [18:18] Self Refresh: Enabled -- * [17:17] 16bit Mode: Disabled -- * [16:13] Ready Delay: 2 -- * [12:12] Half DQS Delay: Disabled -- * [11:11] Quarter DQS Delay: Disabled -- * [10:08] Write Delay: 2 -- * [07:07] Early ODT: Disabled -- * [06:06] On DIE Termination: Disabled -- * [05:05] FIFO Overflow Clear: DON'T USE here -- * [04:04] FIFO Underflow Clear: DON'T USE here -- * [03:03] FIFO Overflow Pending: DON'T USE here -- * [02:02] FIFO Underlfow Pending: DON'T USE here -- * [01:01] FIFO Overlfow Enabled: Enabled -- * [00:00] FIFO Underflow Enabled: Enabled -- * TIME_CFG0 -- * [31:16] DRAM Refresh Time: 0 CSB clocks -- * [15:8] DRAM Command Time: 0 CSB clocks -- * [07:00] DRAM Precharge Time: 0 CSB clocks -- * TIME_CFG1 -- * [31:26] DRAM tRFC: -- * [25:21] DRAM tWR1: -- * [20:17] DRAM tWRT1: -- * [16:11] DRAM tDRR: -- * [10:05] DRAM tRC: -- * [04:00] DRAM tRAS: -- * TIME_CFG2 -- * [31:28] DRAM tRCD: -- * [27:23] DRAM tFAW: -- * [22:19] DRAM tRTW1: -- * [18:15] DRAM tCCD: -- * [14:10] DRAM tRTP: -- * [09:05] DRAM tRP: -- * [04:00] DRAM tRPA -- */ --#ifdef CONFIG_ADS5121_REV2 --#define CONFIG_SYS_MDDRC_SYS_CFG 0xF8604A00 --#define CONFIG_SYS_MDDRC_SYS_CFG_RUN 0xE8604A00 --#define CONFIG_SYS_MDDRC_TIME_CFG1 0x54EC1168 --#define CONFIG_SYS_MDDRC_TIME_CFG2 0x35210864 --#else --#define CONFIG_SYS_MDDRC_SYS_CFG 0xFA804A00 --#define CONFIG_SYS_MDDRC_SYS_CFG_RUN 0xEA804A00 --#define CONFIG_SYS_MDDRC_TIME_CFG1 0x68EC1168 --#define CONFIG_SYS_MDDRC_TIME_CFG2 0x34310864 --#endif --#define CONFIG_SYS_MDDRC_SYS_CFG_EN 0xF0000000 --#define CONFIG_SYS_MDDRC_TIME_CFG0 0x00003D2E --#define CONFIG_SYS_MDDRC_TIME_CFG0_RUN 0x06183D2E -- --#define CONFIG_SYS_MICRON_NOP 0x01380000 --#define CONFIG_SYS_MICRON_PCHG_ALL 0x01100400 --#define CONFIG_SYS_MICRON_EM2 0x01020000 --#define CONFIG_SYS_MICRON_EM3 0x01030000 --#define CONFIG_SYS_MICRON_EN_DLL 0x01010000 --#define CONFIG_SYS_MICRON_RFSH 0x01080000 --#define CONFIG_SYS_MICRON_INIT_DEV_OP 0x01000432 --#define CONFIG_SYS_MICRON_OCD_DEFAULT 0x01010780 -- --/* DDR Priority Manager Configuration */ --#define CONFIG_SYS_MDDRCGRP_PM_CFG1 0x00077777 --#define CONFIG_SYS_MDDRCGRP_PM_CFG2 0x00000000 --#define CONFIG_SYS_MDDRCGRP_HIPRIO_CFG 0x00000001 --#define CONFIG_SYS_MDDRCGRP_LUT0_MU 0xFFEEDDCC --#define CONFIG_SYS_MDDRCGRP_LUT0_ML 0xBBAAAAAA --#define CONFIG_SYS_MDDRCGRP_LUT1_MU 0x66666666 --#define CONFIG_SYS_MDDRCGRP_LUT1_ML 0x55555555 --#define CONFIG_SYS_MDDRCGRP_LUT2_MU 0x44444444 --#define CONFIG_SYS_MDDRCGRP_LUT2_ML 0x44444444 --#define CONFIG_SYS_MDDRCGRP_LUT3_MU 0x55555555 --#define CONFIG_SYS_MDDRCGRP_LUT3_ML 0x55555558 --#define CONFIG_SYS_MDDRCGRP_LUT4_MU 0x11111111 --#define CONFIG_SYS_MDDRCGRP_LUT4_ML 0x11111122 --#define CONFIG_SYS_MDDRCGRP_LUT0_AU 0xaaaaaaaa --#define CONFIG_SYS_MDDRCGRP_LUT0_AL 0xaaaaaaaa --#define CONFIG_SYS_MDDRCGRP_LUT1_AU 0x66666666 --#define CONFIG_SYS_MDDRCGRP_LUT1_AL 0x66666666 --#define CONFIG_SYS_MDDRCGRP_LUT2_AU 0x11111111 --#define CONFIG_SYS_MDDRCGRP_LUT2_AL 0x11111111 --#define CONFIG_SYS_MDDRCGRP_LUT3_AU 0x11111111 --#define CONFIG_SYS_MDDRCGRP_LUT3_AL 0x11111111 --#define CONFIG_SYS_MDDRCGRP_LUT4_AU 0x11111111 --#define CONFIG_SYS_MDDRCGRP_LUT4_AL 0x11111111 -- --/* -- * NOR FLASH on the Local Bus -- */ --#undef CONFIG_BKUP_FLASH --#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ --#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ --#ifdef CONFIG_BKUP_FLASH --#define CONFIG_SYS_FLASH_BASE 0xFF800000 /* start of FLASH */ --#define CONFIG_SYS_FLASH_SIZE 0x00800000 /* max flash size in bytes */ --#else --#define CONFIG_SYS_FLASH_BASE 0xFC000000 /* start of FLASH */ --#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* max flash size in bytes */ --#endif --#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE --#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ --#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE} --#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max sectors per device */ -- --#undef CONFIG_SYS_FLASH_CHECKSUM -- --/* -- * CPLD registers area is really only 32 bytes in size, but the smallest possible LP -- * window is 64KB -- */ --#define CONFIG_SYS_CPLD_BASE 0x82000000 --#define CONFIG_SYS_CPLD_SIZE 0x00010000 /* 64 KB */ -- --#define CONFIG_SYS_SRAM_BASE 0x30000000 --#define CONFIG_SYS_SRAM_SIZE 0x00020000 /* 128 KB */ -- --#define CONFIG_SYS_CS0_CFG 0x05059310 /* ALE active low, data size 4bytes */ --#define CONFIG_SYS_CS2_CFG 0x05059010 /* ALE active low, data size 1byte */ --#define CONFIG_SYS_CS_ALETIMING 0x00000005 /* Use alternative CS timing for CS0 and CS2 */ -- --/* Use SRAM for initial stack */ --#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SRAM_BASE /* Initial RAM address */ --#define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_SRAM_SIZE /* End of used area in RAM */ -- --#define CONFIG_SYS_GBL_DATA_SIZE 0x100 /* num bytes initial data */ --#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) --#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -- --#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of monitor */ --#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */ --#ifdef CONFIG_FSL_DIU_FB --#define CONFIG_SYS_MALLOC_LEN (6 * 1024 * 1024) /* Reserved for malloc */ --#else --#define CONFIG_SYS_MALLOC_LEN (512 * 1024) --#endif -- --/* -- * Serial Port -- */ --#define CONFIG_CONS_INDEX 1 --#undef CONFIG_SERIAL_SOFTWARE_FIFO -- --/* -- * Serial console configuration -- */ --#define CONFIG_PSC_CONSOLE 3 /* console is on PSC3 */ --#if CONFIG_PSC_CONSOLE != 3 --#error CONFIG_PSC_CONSOLE must be 3 --#endif --#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */ --#define CONFIG_SYS_BAUDRATE_TABLE \ -- {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200} -- --#define CONSOLE_FIFO_TX_SIZE FIFOC_PSC3_TX_SIZE --#define CONSOLE_FIFO_TX_ADDR FIFOC_PSC3_TX_ADDR --#define CONSOLE_FIFO_RX_SIZE FIFOC_PSC3_RX_SIZE --#define CONSOLE_FIFO_RX_ADDR FIFOC_PSC3_RX_ADDR -- --#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ --/* Use the HUSH parser */ --#define CONFIG_SYS_HUSH_PARSER --#ifdef CONFIG_SYS_HUSH_PARSER --#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " --#endif -- --/* -- * PCI -- */ --#ifdef CONFIG_PCI -- --/* -- * General PCI -- */ --#define CONFIG_SYS_PCI_MEM_BASE 0xA0000000 --#define CONFIG_SYS_PCI_MEM_PHYS CONFIG_SYS_PCI_MEM_BASE --#define CONFIG_SYS_PCI_MEM_SIZE 0x10000000 /* 256M */ --#define CONFIG_SYS_PCI_MMIO_BASE (CONFIG_SYS_PCI_MEM_BASE + CONFIG_SYS_PCI_MEM_SIZE) --#define CONFIG_SYS_PCI_MMIO_PHYS CONFIG_SYS_PCI_MMIO_BASE --#define CONFIG_SYS_PCI_MMIO_SIZE 0x10000000 /* 256M */ --#define CONFIG_SYS_PCI_IO_BASE 0x00000000 --#define CONFIG_SYS_PCI_IO_PHYS 0x84000000 --#define CONFIG_SYS_PCI_IO_SIZE 0x01000000 /* 16M */ -- -- --#define CONFIG_PCI_PNP /* do pci plug-and-play */ -- --#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -- --#endif -- --/* I2C */ --#define CONFIG_HARD_I2C /* I2C with hardware support */ --#undef CONFIG_SOFT_I2C /* so disable bit-banged I2C */ --#define CONFIG_I2C_MULTI_BUS --#define CONFIG_I2C_CMD_TREE --#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ --#define CONFIG_SYS_I2C_SLAVE 0x7F --#if 0 --#define CONFIG_SYS_I2C_NOPROBES {{0,0x69}} /* Don't probe these addrs */ --#endif -- --/* -- * IIM - IC Identification Module -- */ --#undef CONFIG_IIM -- --/* -- * EEPROM configuration -- */ --#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* 16-bit EEPROM address */ --#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Atmel: AT24C32A-10TQ-2.7 */ --#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10ms of delay */ --#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* 32-Byte Page Write Mode */ -- --/* -- * Ethernet configuration -- */ --#define CONFIG_MPC512x_FEC 1 --#define CONFIG_NET_MULTI --#define CONFIG_PHY_ADDR 0x1 --#define CONFIG_MII 1 /* MII PHY management */ --#define CONFIG_FEC_AN_TIMEOUT 1 --#define CONFIG_HAS_ETH0 -- --/* -- * Configure on-board RTC -- */ --#define CONFIG_RTC_M41T62 /* use M41T62 rtc via i2 */ --#define CONFIG_SYS_I2C_RTC_ADDR 0x68 /* at address 0x68 */ -- --/* -- * Environment -- */ --#define CONFIG_ENV_IS_IN_FLASH 1 --/* This has to be a multiple of the Flash sector size */ --#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) --#define CONFIG_ENV_SIZE 0x2000 --#ifdef CONFIG_BKUP_FLASH --#define CONFIG_ENV_SECT_SIZE 0x20000 /* one sector (256K) for env */ --#else --#define CONFIG_ENV_SECT_SIZE 0x40000 /* one sector (256K) for env */ --#endif -- --/* Address and size of Redundant Environment Sector */ --#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) --#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) -- --#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ --#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ -- --#include -- --#define CONFIG_CMD_ASKENV --#define CONFIG_CMD_DHCP --#define CONFIG_CMD_I2C --#define CONFIG_CMD_MII --#define CONFIG_CMD_NFS --#define CONFIG_CMD_PING --#define CONFIG_CMD_REGINFO --#define CONFIG_CMD_EEPROM --#define CONFIG_CMD_DATE --#undef CONFIG_CMD_FUSE --#define CONFIG_CMD_IDE --#define CONFIG_CMD_EXT2 -- --#if defined(CONFIG_PCI) --#define CONFIG_CMD_PCI --#endif -- --#if defined(CONFIG_CMD_IDE) --#define CONFIG_DOS_PARTITION --#define CONFIG_MAC_PARTITION --#define CONFIG_ISO_PARTITION --#endif /* defined(CONFIG_CMD_IDE) */ -- --/* -- * Watchdog timeout = CONFIG_SYS_WATCHDOG_VALUE * 65536 / IPS clock. -- * For example, when IPS is set to 66MHz and CONFIG_SYS_WATCHDOG_VALUE is set -- * to 0xFFFF, watchdog timeouts after about 64s. For details refer -- * to chapter 36 of the MPC5121e Reference Manual. -- */ --/* #define CONFIG_WATCHDOG */ /* enable watchdog */ --#define CONFIG_SYS_WATCHDOG_VALUE 0xFFFF -- -- /* -- * Miscellaneous configurable options -- */ --#define CONFIG_SYS_LONGHELP /* undef to save memory */ --#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ --#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ -- --#ifdef CONFIG_CMD_KGDB -- #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ --#else -- #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ --#endif -- -- --#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buffer Size */ --#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ --#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ --#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */ -- --/* -- * For booting Linux, the board info and command line data -- * have to be in the first 8 MB of memory, since this is -- * the maximum mapped by the Linux kernel during initialization. -- */ --#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ -- --/* Cache Configuration */ --#define CONFIG_SYS_DCACHE_SIZE 32768 --#define CONFIG_SYS_CACHELINE_SIZE 32 --#ifdef CONFIG_CMD_KGDB --#define CONFIG_SYS_CACHELINE_SHIFT 5 /*log base 2 of the above value*/ --#endif -- --#define CONFIG_SYS_HID0_INIT 0x000000000 --#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | HID0_ICE) --#define CONFIG_SYS_HID2 HID2_HBE -- --#define CONFIG_HIGH_BATS 1 /* High BATs supported */ -- --/* -- * Internal Definitions -- * -- * Boot Flags -- */ --#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ --#define BOOTFLAG_WARM 0x02 /* Software reboot */ -- --#ifdef CONFIG_CMD_KGDB --#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ --#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ --#endif -- --/* -- * Environment Configuration -- */ --#define CONFIG_TIMESTAMP -- --#define CONFIG_HOSTNAME ads5121 --#define CONFIG_BOOTFILE ads5121/uImage --#define CONFIG_ROOTPATH /opt/eldk/ppc_6xx -- --#define CONFIG_LOADADDR 400000 /* default location for tftp and bootm */ -- --#define CONFIG_BOOTDELAY 5 /* -1 disables auto-boot */ --#undef CONFIG_BOOTARGS /* the boot command will set bootargs */ -- --#define CONFIG_BAUDRATE 115200 -- --#define CONFIG_PREBOOT "echo;" \ -- "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \ -- "echo" -- --#define CONFIG_EXTRA_ENV_SETTINGS \ -- "u-boot_addr_r=200000\0" \ -- "kernel_addr_r=600000\0" \ -- "fdt_addr_r=880000\0" \ -- "ramdisk_addr_r=900000\0" \ -- "u-boot_addr=FFF00000\0" \ -- "kernel_addr=FFC40000\0" \ -- "fdt_addr=FFEC0000\0" \ -- "ramdisk_addr=FC040000\0" \ -- "ramdiskfile=ads5121/uRamdisk\0" \ -- "u-boot=ads5121/u-boot.bin\0" \ -- "bootfile=ads5121/uImage\0" \ -- "fdtfile=ads5121/ads5121.dtb\0" \ -- "rootpath=/opt/eldk/ppc_6xx\n" \ -- "netdev=eth0\0" \ -- "consdev=ttyPSC0\0" \ -- "nfsargs=setenv bootargs root=/dev/nfs rw " \ -- "nfsroot=${serverip}:${rootpath}\0" \ -- "ramargs=setenv bootargs root=/dev/ram rw\0" \ -- "addip=setenv bootargs ${bootargs} " \ -- "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ -- ":${hostname}:${netdev}:off panic=1\0" \ -- "addtty=setenv bootargs ${bootargs} " \ -- "console=${consdev},${baudrate}\0" \ -- "flash_nfs=run nfsargs addip addtty;" \ -- "bootm ${kernel_addr} - ${fdt_addr}\0" \ -- "flash_self=run ramargs addip addtty;" \ -- "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ -- "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \ -- "tftp ${fdt_addr_r} ${fdtfile};" \ -- "run nfsargs addip addtty;" \ -- "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ -- "net_self=tftp ${kernel_addr_r} ${bootfile};" \ -- "tftp ${ramdisk_addr_r} ${ramdiskfile};" \ -- "tftp ${fdt_addr_r} ${fdtfile};" \ -- "run ramargs addip addtty;" \ -- "bootm ${kernel_addr_r} ${ramdisk_addr_r} ${fdt_addr_r}\0"\ -- "load=tftp ${u-boot_addr_r} ${u-boot}\0" \ -- "update=protect off ${u-boot_addr} +${filesize};" \ -- "era ${u-boot_addr} +${filesize};" \ -- "cp.b ${u-boot_addr_r} ${u-boot_addr} ${filesize}\0" \ -- "upd=run load update\0" \ -- "" -- --#define CONFIG_BOOTCOMMAND "run flash_self" -- --#define CONFIG_OF_LIBFDT 1 --#define CONFIG_OF_BOARD_SETUP 1 --#define CONFIG_OF_SUPPORT_OLD_DEVICE_TREES 1 -- --#define OF_CPU "PowerPC,5121@0" --#define OF_SOC_COMPAT "fsl,mpc5121-immr" --#define OF_TBCLK (bd->bi_busfreq / 4) --#define OF_STDOUT_PATH "/soc@80000000/serial@11300" -- --/*----------------------------------------------------------------------- -- * IDE/ATA stuff -- *----------------------------------------------------------------------- -- */ -- --#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */ --#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ --#undef CONFIG_IDE_LED /* LED for IDE not supported */ -- --#define CONFIG_IDE_RESET /* reset for IDE supported */ --#define CONFIG_IDE_PREINIT -- --#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */ --#define CONFIG_SYS_IDE_MAXDEVICE 2 /* max. 1 drive per IDE bus */ -- --#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000 --#define CONFIG_SYS_ATA_BASE_ADDR MPC512X_PATA -- --/* Offset for data I/O RefMan MPC5121EE Table 28-10 */ --#define CONFIG_SYS_ATA_DATA_OFFSET (0x00A0) -- --/* Offset for normal register accesses */ --#define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET) -- --/* Offset for alternate registers RefMan MPC5121EE Table 28-23 */ --#define CONFIG_SYS_ATA_ALT_OFFSET (0x00D8) -- --/* Interval between registers */ --#define CONFIG_SYS_ATA_STRIDE 4 -- --#define ATA_BASE_ADDR MPC512X_PATA -- --/* -- * Control register bit definitions -- */ --#define FSL_ATA_CTRL_FIFO_RST_B 0x80000000 --#define FSL_ATA_CTRL_ATA_RST_B 0x40000000 --#define FSL_ATA_CTRL_FIFO_TX_EN 0x20000000 --#define FSL_ATA_CTRL_FIFO_RCV_EN 0x10000000 --#define FSL_ATA_CTRL_DMA_PENDING 0x08000000 --#define FSL_ATA_CTRL_DMA_ULTRA 0x04000000 --#define FSL_ATA_CTRL_DMA_WRITE 0x02000000 --#define FSL_ATA_CTRL_IORDY_EN 0x01000000 -- --#endif /* __CONFIG_H */ -diff --git a/include/configs/amcc-common.h b/include/configs/amcc-common.h -index d3dc3e5..3b733c0 100644 ---- a/include/configs/amcc-common.h -+++ b/include/configs/amcc-common.h -@@ -76,6 +76,17 @@ - #define CONFIG_CMD_PING - #define CONFIG_CMD_REGINFO - -+#if defined(CONFIG_SYS_RAMBOOT) -+/* -+ * Disable NOR FLASH commands on RAM-booting version. One main reason for this -+ * RAM-booting version is boards with NAND and without NOR. This image can -+ * be used for initial NAND programming. -+ */ -+#define CONFIG_SYS_NO_FLASH -+#undef CONFIG_CMD_FLASH -+#undef CONFIG_CMD_IMLS -+#endif -+ - /* - * Miscellaneous configurable options - */ -diff --git a/include/configs/apollon.h b/include/configs/apollon.h -index 925079d..fa5a7a9 100644 ---- a/include/configs/apollon.h -+++ b/include/configs/apollon.h -@@ -124,6 +124,7 @@ - #define CONFIG_CMD_JFFS2 - #define CONFIG_CMD_UBI - #define CONFIG_RBTREE -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ - #define CONFIG_MTD_PARTITIONS - #endif - -diff --git a/include/configs/aria.h b/include/configs/aria.h -new file mode 100644 -index 0000000..58f67a4 ---- /dev/null -+++ b/include/configs/aria.h -@@ -0,0 +1,554 @@ -+/* -+ * (C) Copyright 2009 Wolfgang Denk -+ * (C) Copyright 2009, DAVE Srl -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+/* -+ * Aria board configuration file -+ */ -+ -+#ifndef __CONFIG_H -+#define __CONFIG_H -+ -+#define CONFIG_ARIA 1 -+/* -+ * Memory map for the ARIA board: -+ * -+ * 0x0000_0000-0x0FFF_FFFF DDR RAM (256 MB) -+ * 0x3000_0000-0x3001_FFFF On Chip SRAM (128 KB) -+ * 0x3010_0000-0x3011_FFFF On Board SRAM (128 KB) - CS6 -+ * 0x3020_0000-0x3021_FFFF FPGA (128 KB) - CS2 -+ * 0x8000_0000-0x803F_FFFF IMMR (4 MB) -+ * 0x8400_0000-0x82FF_FFFF PCI I/O space (16 MB) -+ * 0xA000_0000-0xAFFF_FFFF PCI memory space (256 MB) -+ * 0xB000_0000-0xBFFF_FFFF PCI memory mapped I/O space (256 MB) -+ * 0xFC00_0000-0xFFFF_FFFF NOR Boot FLASH (64 MB) -+ */ -+ -+/* -+ * High Level Configuration Options -+ */ -+#define CONFIG_E300 1 /* E300 Family */ -+#define CONFIG_MPC512X 1 /* MPC512X family */ -+#define CONFIG_FSL_DIU_FB 1 /* FSL DIU */ -+#define CONFIG_FSL_DIU_LOGO_BMP 1 /* Don't include FSL DIU binary bmp */ -+ -+/* video */ -+#undef CONFIG_VIDEO -+ -+#if defined(CONFIG_VIDEO) -+#define CONFIG_CFB_CONSOLE -+#define CONFIG_VGA_AS_SINGLE_DEVICE -+#endif -+ -+/* CONFIG_PCI is defined at config time */ -+ -+#define CONFIG_SYS_MPC512X_CLKIN 33000000 /* in Hz */ -+ -+#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */ -+#define CONFIG_MISC_INIT_R -+ -+#define CONFIG_SYS_IMMR 0x80000000 -+#define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_IMMR+0x2100) -+ -+#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */ -+#define CONFIG_SYS_MEMTEST_END 0x00400000 -+ -+/* -+ * DDR Setup - manually set all parameters as there's no SPD etc. -+ */ -+#define CONFIG_SYS_DDR_SIZE 256 /* MB */ -+#define CONFIG_SYS_DDR_BASE 0x00000000 -+#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE -+ -+/* DDR Controller Configuration -+ * -+ * SYS_CFG: -+ * [31:31] MDDRC Soft Reset: Diabled -+ * [30:30] DRAM CKE pin: Enabled -+ * [29:29] DRAM CLK: Enabled -+ * [28:28] Command Mode: Enabled (For initialization only) -+ * [27:25] DRAM Row Select: dram_row[15:0] = magenta_address[25:10] -+ * [24:21] DRAM Bank Select: dram_bank[1:0] = magenta_address[11:10] -+ * [20:19] Read Test: DON'T USE -+ * [18:18] Self Refresh: Enabled -+ * [17:17] 16bit Mode: Disabled -+ * [16:13] Ready Delay: 2 -+ * [12:12] Half DQS Delay: Disabled -+ * [11:11] Quarter DQS Delay: Disabled -+ * [10:08] Write Delay: 2 -+ * [07:07] Early ODT: Disabled -+ * [06:06] On DIE Termination: Disabled -+ * [05:05] FIFO Overflow Clear: DON'T USE here -+ * [04:04] FIFO Underflow Clear: DON'T USE here -+ * [03:03] FIFO Overflow Pending: DON'T USE here -+ * [02:02] FIFO Underlfow Pending: DON'T USE here -+ * [01:01] FIFO Overlfow Enabled: Enabled -+ * [00:00] FIFO Underflow Enabled: Enabled -+ * TIME_CFG0 -+ * [31:16] DRAM Refresh Time: 0 CSB clocks -+ * [15:8] DRAM Command Time: 0 CSB clocks -+ * [07:00] DRAM Precharge Time: 0 CSB clocks -+ * TIME_CFG1 -+ * [31:26] DRAM tRFC: -+ * [25:21] DRAM tWR1: -+ * [20:17] DRAM tWRT1: -+ * [16:11] DRAM tDRR: -+ * [10:05] DRAM tRC: -+ * [04:00] DRAM tRAS: -+ * TIME_CFG2 -+ * [31:28] DRAM tRCD: -+ * [27:23] DRAM tFAW: -+ * [22:19] DRAM tRTW1: -+ * [18:15] DRAM tCCD: -+ * [14:10] DRAM tRTP: -+ * [09:05] DRAM tRP: -+ * [04:00] DRAM tRPA -+ */ -+#define CONFIG_SYS_MDDRC_SYS_CFG 0xF8604A00 -+#define CONFIG_SYS_MDDRC_SYS_CFG_RUN 0xE8604A00 -+/*#define CONFIG_SYS_MDDRC_TIME_CFG1 0x54EC1168 */ -+ #define CONFIG_SYS_MDDRC_TIME_CFG1 0x55D81189 -+/*#define CONFIG_SYS_MDDRC_TIME_CFG2 0x35210864 */ -+ #define CONFIG_SYS_MDDRC_TIME_CFG2 0x34790863 -+ -+#define CONFIG_SYS_MDDRC_SYS_CFG_EN 0xF0000000 -+#define CONFIG_SYS_MDDRC_TIME_CFG0 0x00003D2E -+/*#define CONFIG_SYS_MDDRC_TIME_CFG0_RUN 0x06183D2E */ -+#define CONFIG_SYS_MDDRC_TIME_CFG0_RUN 0x030C3D2E -+ -+#define CONFIG_SYS_MICRON_NOP 0x01380000 -+#define CONFIG_SYS_MICRON_PCHG_ALL 0x01100400 -+#define CONFIG_SYS_MICRON_EM2 0x01020000 -+#define CONFIG_SYS_MICRON_EM3 0x01030000 -+#define CONFIG_SYS_MICRON_EN_DLL 0x01010000 -+#define CONFIG_SYS_MICRON_RFSH 0x01080000 -+#define CONFIG_SYS_MICRON_INIT_DEV_OP 0x01000432 -+#define CONFIG_SYS_MICRON_OCD_DEFAULT 0x01010780 -+ -+/* DDR Priority Manager Configuration */ -+#define CONFIG_SYS_MDDRCGRP_PM_CFG1 0x00077777 -+#define CONFIG_SYS_MDDRCGRP_PM_CFG2 0x00000000 -+#define CONFIG_SYS_MDDRCGRP_HIPRIO_CFG 0x00000001 -+#define CONFIG_SYS_MDDRCGRP_LUT0_MU 0xFFEEDDCC -+#define CONFIG_SYS_MDDRCGRP_LUT0_ML 0xBBAAAAAA -+#define CONFIG_SYS_MDDRCGRP_LUT1_MU 0x66666666 -+#define CONFIG_SYS_MDDRCGRP_LUT1_ML 0x55555555 -+#define CONFIG_SYS_MDDRCGRP_LUT2_MU 0x44444444 -+#define CONFIG_SYS_MDDRCGRP_LUT2_ML 0x44444444 -+#define CONFIG_SYS_MDDRCGRP_LUT3_MU 0x55555555 -+#define CONFIG_SYS_MDDRCGRP_LUT3_ML 0x55555558 -+#define CONFIG_SYS_MDDRCGRP_LUT4_MU 0x11111111 -+#define CONFIG_SYS_MDDRCGRP_LUT4_ML 0x11111122 -+#define CONFIG_SYS_MDDRCGRP_LUT0_AU 0xaaaaaaaa -+#define CONFIG_SYS_MDDRCGRP_LUT0_AL 0xaaaaaaaa -+#define CONFIG_SYS_MDDRCGRP_LUT1_AU 0x66666666 -+#define CONFIG_SYS_MDDRCGRP_LUT1_AL 0x66666666 -+#define CONFIG_SYS_MDDRCGRP_LUT2_AU 0x11111111 -+#define CONFIG_SYS_MDDRCGRP_LUT2_AL 0x11111111 -+#define CONFIG_SYS_MDDRCGRP_LUT3_AU 0x11111111 -+#define CONFIG_SYS_MDDRCGRP_LUT3_AL 0x11111111 -+#define CONFIG_SYS_MDDRCGRP_LUT4_AU 0x11111111 -+#define CONFIG_SYS_MDDRCGRP_LUT4_AL 0x11111111 -+ -+/* -+ * NOR FLASH on the Local Bus -+ */ -+#define CONFIG_SYS_FLASH_CFI /* use the CFI code */ -+#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ -+#define CONFIG_SYS_FLASH_BASE 0xF8000000 /* start of FLASH */ -+#define CONFIG_SYS_FLASH_SIZE 0x08000000 /* max flash size */ -+ -+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -+#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ -+#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE} -+#define CONFIG_SYS_MAX_FLASH_SECT 1024 /* max sectors */ -+ -+#undef CONFIG_SYS_FLASH_CHECKSUM -+ -+#define CONFIG_SYS_SRAM_BASE 0x30000000 -+#define CONFIG_SYS_SRAM_SIZE 0x00020000 /* 128 KB */ -+ -+#define CONFIG_SYS_ARIA_SRAM_BASE 0x30020000 -+#define CONFIG_SYS_ARIA_SRAM_SIZE 0x20000 /* 128 KB */ -+ -+#define CONFIG_SYS_ARIA_FPGA_BASE (CONFIG_SYS_ARIA_SRAM_BASE + \ -+ CONFIG_SYS_ARIA_SRAM_SIZE) -+#define CONFIG_SYS_ARIA_FPGA_SIZE 0x20000 /* 128 KB */ -+ -+#define CONFIG_SYS_CS0_CFG 0x05059150 -+#define CONFIG_SYS_CS2_CFG ( (5 << 24) | \ -+ (5 << 16) | \ -+ (1 << 15) | \ -+ (0 << 14) | \ -+ (0 << 13) | \ -+ (1 << 12) | \ -+ (0 << 10) | \ -+ (3 << 8) | /* 32 bit */ \ -+ (0 << 7) | \ -+ (1 << 6) | \ -+ (1 << 4) | \ -+ (0 << 3) | \ -+ (0 << 2) | \ -+ (0 << 1) | \ -+ (0 << 0) \ -+ ) -+#define CONFIG_SYS_CS6_CFG 0x05059150 -+ -+/* Use alternative CS timing for CS0 and CS2 */ -+#define CONFIG_SYS_CS_ALETIMING 0x00000005 -+ -+/* Use SRAM for initial stack */ -+#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SRAM_BASE -+#define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_SRAM_SIZE -+ -+#define CONFIG_SYS_GBL_DATA_SIZE 0x100 -+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - \ -+ CONFIG_SYS_GBL_DATA_SIZE) -+#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -+ -+#define CONFIG_SYS_MONITOR_BASE TEXT_BASE -+#define CONFIG_SYS_MONITOR_LEN (256 * 1024) -+ -+#ifdef CONFIG_FSL_DIU_FB -+#define CONFIG_SYS_MALLOC_LEN (6 * 1024 * 1024) -+#else -+#define CONFIG_SYS_MALLOC_LEN (512 * 1024) -+#endif -+ -+/* FPGA */ -+#define CONFIG_ARIA_FPGA 1 -+ -+/* -+ * Serial Port -+ */ -+#define CONFIG_CONS_INDEX 1 -+#undef CONFIG_SERIAL_SOFTWARE_FIFO -+ -+/* -+ * Serial console configuration -+ */ -+#define CONFIG_PSC_CONSOLE 3 /* console on PSC3 */ -+#if CONFIG_PSC_CONSOLE != 3 -+#error CONFIG_PSC_CONSOLE must be 3 -+#endif -+ -+#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */ -+#define CONFIG_SYS_BAUDRATE_TABLE \ -+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200} -+ -+#define CONSOLE_FIFO_TX_SIZE FIFOC_PSC3_TX_SIZE -+#define CONSOLE_FIFO_TX_ADDR FIFOC_PSC3_TX_ADDR -+#define CONSOLE_FIFO_RX_SIZE FIFOC_PSC3_RX_SIZE -+#define CONSOLE_FIFO_RX_ADDR FIFOC_PSC3_RX_ADDR -+ -+#define CONFIG_CMDLINE_EDITING 1 /* command line history */ -+/* Use the HUSH parser */ -+#define CONFIG_SYS_HUSH_PARSER -+#ifdef CONFIG_SYS_HUSH_PARSER -+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -+#endif -+ -+/* -+ * PCI -+ */ -+#ifdef CONFIG_PCI -+ -+#define CONFIG_SYS_PCI_MEM_BASE 0xA0000000 -+#define CONFIG_SYS_PCI_MEM_PHYS CONFIG_SYS_PCI_MEM_BASE -+#define CONFIG_SYS_PCI_MEM_SIZE 0x10000000 /* 256M */ -+#define CONFIG_SYS_PCI_MMIO_BASE (CONFIG_SYS_PCI_MEM_BASE + \ -+ CONFIG_SYS_PCI_MEM_SIZE) -+#define CONFIG_SYS_PCI_MMIO_PHYS CONFIG_SYS_PCI_MMIO_BASE -+#define CONFIG_SYS_PCI_MMIO_SIZE 0x10000000 /* 256M */ -+#define CONFIG_SYS_PCI_IO_BASE 0x00000000 -+#define CONFIG_SYS_PCI_IO_PHYS 0x84000000 -+#define CONFIG_SYS_PCI_IO_SIZE 0x01000000 /* 16M */ -+ -+#define CONFIG_PCI_PNP /* do pci plug-and-play */ -+ -+#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -+ -+#endif -+ -+/* I2C */ -+#define CONFIG_HARD_I2C /* I2C with hardware support */ -+#undef CONFIG_SOFT_I2C /* so disable bit-banged I2C */ -+#define CONFIG_I2C_MULTI_BUS -+#define CONFIG_I2C_CMD_TREE -+ -+/* I2C speed and slave address */ -+#define CONFIG_SYS_I2C_SPEED 100000 -+#define CONFIG_SYS_I2C_SLAVE 0x7F -+#if 0 -+#define CONFIG_SYS_I2C_NOPROBES {{0,0x69}} /* Don't probe these addrs */ -+#endif -+ -+/* -+ * IIM - IC Identification Module -+ */ -+#undef CONFIG_IIM -+ -+/* -+ * EEPROM configuration for Atmel AT24C32A-10TQ-2.7: -+ * 16-bit addresses, 10ms write delay, 32-Byte Page Write Mode -+ */ -+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 -+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 -+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 -+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 -+ -+/* -+ * Ethernet configuration -+ */ -+#define CONFIG_MPC512x_FEC 1 -+#define CONFIG_NET_MULTI -+#define CONFIG_PHY_ADDR 0x17 -+#define CONFIG_MII 1 /* MII PHY management */ -+#define CONFIG_FEC_AN_TIMEOUT 1 -+#define CONFIG_HAS_ETH0 -+ -+/* -+ * Environment -+ */ -+#define CONFIG_ENV_IS_IN_FLASH 1 -+/* This has to be a multiple of the flash sector size */ -+#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ -+ CONFIG_SYS_MONITOR_LEN) -+#define CONFIG_ENV_SIZE 0x2000 -+#define CONFIG_ENV_SECT_SIZE 0x20000 /* one sector (256K) */ -+ -+/* Address and size of Redundant Environment Sector */ -+#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + \ -+ CONFIG_ENV_SECT_SIZE) -+#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) -+ -+#define CONFIG_LOADS_ECHO 1 -+#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 -+ -+#include -+ -+#define CONFIG_CMD_ASKENV -+#define CONFIG_CMD_DHCP -+#define CONFIG_CMD_EEPROM -+#undef CONFIG_CMD_FUSE -+#define CONFIG_CMD_I2C -+#undef CONFIG_CMD_IDE -+#define CONFIG_CMD_MII -+#define CONFIG_CMD_NFS -+#define CONFIG_CMD_PING -+#define CONFIG_CMD_REGINFO -+ -+#if defined(CONFIG_PCI) -+#define CONFIG_CMD_PCI -+#endif -+ -+#if defined(CONFIG_CMD_IDE) -+#define CONFIG_DOS_PARTITION -+#define CONFIG_MAC_PARTITION -+#define CONFIG_ISO_PARTITION -+#endif /* defined(CONFIG_CMD_IDE) */ -+ -+/* -+ * Watchdog timeout = CONFIG_SYS_WATCHDOG_VALUE * 65536 / IPS clock. -+ * For example, when IPS is set to 66MHz and CONFIG_SYS_WATCHDOG_VALUE -+ * is set to 0xFFFF, watchdog timeouts after about 64s. For details -+ * refer to chapter 36 of the MPC5121e Reference Manual. -+ */ -+/* #define CONFIG_WATCHDOG */ /* enable watchdog */ -+#define CONFIG_SYS_WATCHDOG_VALUE 0xFFFF -+ -+ /* -+ * Miscellaneous configurable options -+ */ -+#define CONFIG_SYS_LONGHELP /* undef to save memory */ -+#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ -+#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ -+ -+#ifdef CONFIG_CMD_KGDB -+# define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -+#else -+# define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -+#endif -+ -+/* Print Buffer Size */ -+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ -+ sizeof(CONFIG_SYS_PROMPT) + 16) -+/* max number of command args */ -+#define CONFIG_SYS_MAXARGS 32 -+/* Boot Argument Buffer Size */ -+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -+ -+#define CONFIG_SYS_HZ 1000 -+ -+/* -+ * For booting Linux, the board info and command line data -+ * have to be in the first 8 MB of memory, since this is -+ * the maximum mapped by the Linux kernel during initialization. -+ */ -+#define CONFIG_SYS_BOOTMAPSZ (8 << 20) -+ -+/* Cache Configuration */ -+#define CONFIG_SYS_DCACHE_SIZE 32768 -+#define CONFIG_SYS_CACHELINE_SIZE 32 -+#ifdef CONFIG_CMD_KGDB -+#define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of 32 */ -+#endif -+ -+#define CONFIG_SYS_HID0_INIT 0x000000000 -+#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ -+ HID0_ICE) -+#define CONFIG_SYS_HID2 HID2_HBE -+ -+#define CONFIG_HIGH_BATS 1 /* High BATs supported */ -+ -+/* -+ * Internal Definitions -+ * -+ * Boot Flags -+ */ -+#define BOOTFLAG_COLD 0x01 -+#define BOOTFLAG_WARM 0x02 -+ -+#ifdef CONFIG_CMD_KGDB -+#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ -+#endif -+ -+/* -+ * Environment Configuration -+ */ -+#define CONFIG_ENV_OVERWRITE -+#define CONFIG_TIMESTAMP -+ -+#define CONFIG_HOSTNAME aria -+#define CONFIG_BOOTFILE aria/uImage -+#define CONFIG_ROOTPATH /opt/eldk/ppc_6xx -+ -+#define CONFIG_LOADADDR 400000 /* default load addr */ -+ -+#define CONFIG_BOOTDELAY 5 /* -1 disables auto-boot */ -+#undef CONFIG_BOOTARGS /* the boot command will set bootargs */ -+ -+#define CONFIG_BAUDRATE 115200 -+ -+#define CONFIG_PREBOOT "echo;" \ -+ "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \ -+ "echo" -+ -+#define CONFIG_EXTRA_ENV_SETTINGS \ -+ "u-boot_addr_r=200000\0" \ -+ "kernel_addr_r=600000\0" \ -+ "fdt_addr_r=880000\0" \ -+ "ramdisk_addr_r=900000\0" \ -+ "u-boot_addr=FFF00000\0" \ -+ "kernel_addr=FFC40000\0" \ -+ "fdt_addr=FFEC0000\0" \ -+ "ramdisk_addr=FC040000\0" \ -+ "ramdiskfile=aria/uRamdisk\0" \ -+ "u-boot=aria/u-boot.bin\0" \ -+ "fdtfile=aria/aria.dtb\0" \ -+ "netdev=eth0\0" \ -+ "consdev=ttyPSC0\0" \ -+ "nfsargs=setenv bootargs root=/dev/nfs rw " \ -+ "nfsroot=${serverip}:${rootpath}\0" \ -+ "ramargs=setenv bootargs root=/dev/ram rw\0" \ -+ "addip=setenv bootargs ${bootargs} " \ -+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ -+ ":${hostname}:${netdev}:off panic=1\0" \ -+ "addtty=setenv bootargs ${bootargs} " \ -+ "console=${consdev},${baudrate}\0" \ -+ "flash_nfs=run nfsargs addip addtty;" \ -+ "bootm ${kernel_addr} - ${fdt_addr}\0" \ -+ "flash_self=run ramargs addip addtty;" \ -+ "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ -+ "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \ -+ "tftp ${fdt_addr_r} ${fdtfile};" \ -+ "run nfsargs addip addtty;" \ -+ "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ -+ "net_self=tftp ${kernel_addr_r} ${bootfile};" \ -+ "tftp ${ramdisk_addr_r} ${ramdiskfile};" \ -+ "tftp ${fdt_addr_r} ${fdtfile};" \ -+ "run ramargs addip addtty;" \ -+ "bootm ${kernel_addr_r} ${ramdisk_addr_r} ${fdt_addr_r}\0"\ -+ "load=tftp ${u-boot_addr_r} ${u-boot}\0" \ -+ "update=protect off ${u-boot_addr} +${filesize};" \ -+ "era ${u-boot_addr} +${filesize};" \ -+ "cp.b ${u-boot_addr_r} ${u-boot_addr} ${filesize}\0" \ -+ "upd=run load update\0" \ -+ "" -+ -+#define CONFIG_BOOTCOMMAND "run flash_self" -+ -+#define CONFIG_OF_LIBFDT 1 -+#define CONFIG_OF_BOARD_SETUP 1 -+#define CONFIG_OF_SUPPORT_OLD_DEVICE_TREES 1 -+ -+#define OF_CPU "PowerPC,5121@0" -+#define OF_SOC_COMPAT "fsl,mpc5121-immr" -+#define OF_TBCLK (bd->bi_busfreq / 4) -+#define OF_STDOUT_PATH "/soc@80000000/serial@11300" -+ -+/*----------------------------------------------------------------------- -+ * IDE/ATA stuff -+ *----------------------------------------------------------------------- -+ */ -+ -+#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */ -+#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ -+#undef CONFIG_IDE_LED /* LED for IDE not supported */ -+ -+#define CONFIG_IDE_RESET /* reset for IDE supported */ -+#define CONFIG_IDE_PREINIT -+ -+#define CONFIG_SYS_IDE_MAXBUS 1 /* 1 IDE bus */ -+#define CONFIG_SYS_IDE_MAXDEVICE 2 /* 1 drive per IDE bus */ -+ -+#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000 -+#define CONFIG_SYS_ATA_BASE_ADDR get_pata_base() -+ -+/* Offset for data I/O RefMan MPC5121EE Table 28-10 */ -+#define CONFIG_SYS_ATA_DATA_OFFSET (0x00A0) -+ -+/* Offset for normal register accesses */ -+#define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET) -+ -+/* Offset for alternate registers RefMan MPC5121EE Table 28-23 */ -+#define CONFIG_SYS_ATA_ALT_OFFSET (0x00D8) -+ -+/* Interval between registers */ -+#define CONFIG_SYS_ATA_STRIDE 4 -+ -+#define ATA_BASE_ADDR get_pata_base() -+ -+/* -+ * Control register bit definitions -+ */ -+#define FSL_ATA_CTRL_FIFO_RST_B 0x80000000 -+#define FSL_ATA_CTRL_ATA_RST_B 0x40000000 -+#define FSL_ATA_CTRL_FIFO_TX_EN 0x20000000 -+#define FSL_ATA_CTRL_FIFO_RCV_EN 0x10000000 -+#define FSL_ATA_CTRL_DMA_PENDING 0x08000000 -+#define FSL_ATA_CTRL_DMA_ULTRA 0x04000000 -+#define FSL_ATA_CTRL_DMA_WRITE 0x02000000 -+#define FSL_ATA_CTRL_IORDY_EN 0x01000000 -+ -+#endif /* __CONFIG_H */ -diff --git a/include/configs/armadillo.h b/include/configs/armadillo.h -index 7ba5e17..f7eec27 100644 ---- a/include/configs/armadillo.h -+++ b/include/configs/armadillo.h -@@ -34,7 +34,7 @@ - * If we are developing, we might want to start armboot from ram - * so we MUST NOT initialize critical regs like mem-timing ... - */ --/*#define CONFIG_INIT_CRITICAL*/ /* undef for developing */ -+#undef CONFIG_SKIP_LOWLEVEL_INIT - - /* - * High Level Configuration Options -diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h -index b2e6d7d..526cd60 100644 ---- a/include/configs/at91cap9adk.h -+++ b/include/configs/at91cap9adk.h -@@ -28,7 +28,6 @@ - #define __CONFIG_H - - /* ARM asynchronous clock */ --#define AT91_CPU_NAME "AT91CAP9" - #define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ - #define CONFIG_SYS_HZ 1000 - -diff --git a/include/configs/at91rm9200ek.h b/include/configs/at91rm9200ek.h -index a018873..c898c73 100644 ---- a/include/configs/at91rm9200ek.h -+++ b/include/configs/at91rm9200ek.h -@@ -266,7 +266,6 @@ - - #ifdef CONFIG_HARD_I2C - #define CONFIG_CMD_I2C --#define CONFIG_I2C_CMD_TREE - #define CONFIG_SYS_I2C_SPEED 0 /* not used */ - #define CONFIG_SYS_I2C_SLAVE 0 /* not used */ - #endif -diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h -index e46c9d6..1828c63 100644 ---- a/include/configs/at91sam9260ek.h -+++ b/include/configs/at91sam9260ek.h -@@ -34,10 +34,8 @@ - #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ - - #ifdef CONFIG_AT91SAM9G20EK --#define AT91_CPU_NAME "AT91SAM9G20" - #define CONFIG_AT91SAM9G20 1 /* It's an Atmel AT91SAM9G20 SoC*/ - #else --#define AT91_CPU_NAME "AT91SAM9260" - #define CONFIG_AT91SAM9260 1 /* It's an Atmel AT91SAM9260 SoC*/ - #endif - -diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h -index 9621b7c..4f6b640 100644 ---- a/include/configs/at91sam9261ek.h -+++ b/include/configs/at91sam9261ek.h -@@ -28,7 +28,6 @@ - #define __CONFIG_H - - /* ARM asynchronous clock */ --#define AT91_CPU_NAME "AT91SAM9261" - #define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ - #define CONFIG_SYS_HZ 1000 - -diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h -index d03ecee..c212d11 100644 ---- a/include/configs/at91sam9263ek.h -+++ b/include/configs/at91sam9263ek.h -@@ -28,7 +28,6 @@ - #define __CONFIG_H - - /* ARM asynchronous clock */ --#define AT91_CPU_NAME "AT91SAM9263" - #define AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */ - #define CONFIG_SYS_HZ 1000 - -diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h -index 846d165..c466823 100644 ---- a/include/configs/at91sam9rlek.h -+++ b/include/configs/at91sam9rlek.h -@@ -28,7 +28,6 @@ - #define __CONFIG_H - - /* ARM asynchronous clock */ --#define AT91_CPU_NAME "AT91SAM9RL" - #define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ - #define CONFIG_SYS_HZ 1000 - -diff --git a/include/configs/bfin_adi_common.h b/include/configs/bfin_adi_common.h -index bfe5376..e0be07b 100644 ---- a/include/configs/bfin_adi_common.h -+++ b/include/configs/bfin_adi_common.h -@@ -91,7 +91,7 @@ - */ - #define CONFIG_ENV_OVERWRITE 1 - #define CONFIG_DEBUG_DUMP 1 --#define CONFIG_DEBUG_DUMP_SYMS 1 -+#define CONFIG_KALLSYMS 1 - #define CONFIG_PANIC_HANG 1 - - /* -diff --git a/include/configs/bubinga.h b/include/configs/bubinga.h -index dcf5b6d..627060a 100644 ---- a/include/configs/bubinga.h -+++ b/include/configs/bubinga.h -@@ -134,7 +134,7 @@ - */ - #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ - --#define CONFIG_SYS_I2C_NOPROBES { 0x69 } /* avoid iprobe hangup (why?) */ -+#define CONFIG_SYS_I2C_NOPROBES { 0x69 } /* avoid i2c probe hangup (why?) */ - #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 6 /* 24C02 requires 5ms delay */ - - #if defined(CONFIG_CMD_EEPROM) -diff --git a/include/configs/cerf250.h b/include/configs/cerf250.h -index 82d1401..b924758 100644 ---- a/include/configs/cerf250.h -+++ b/include/configs/cerf250.h -@@ -60,6 +60,7 @@ - /* - * select serial console configuration - */ -+#define CONFIG_PXA_SERIAL - #define CONFIG_FFUART 1 /* we use FFUART on CERF PXA */ - - /* allow to overwrite serial and ethaddr */ -diff --git a/include/configs/cm5200.h b/include/configs/cm5200.h -index 54cf40d..72cf941 100644 ---- a/include/configs/cm5200.h -+++ b/include/configs/cm5200.h -@@ -223,6 +223,8 @@ - * MTD configuration - */ - #define CONFIG_CMD_MTDPARTS 1 -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -+#define CONFIG_FLASH_CFI_MTD - #define MTDIDS_DEFAULT "nor0=cm5200-0" - #define MTDPARTS_DEFAULT "mtdparts=cm5200-0:" \ - "384k(uboot),128k(env)," \ -diff --git a/include/configs/cradle.h b/include/configs/cradle.h -index 75c5f9b..b150c22 100644 ---- a/include/configs/cradle.h -+++ b/include/configs/cradle.h -@@ -57,6 +57,7 @@ - /* - * select serial console configuration - */ -+#define CONFIG_PXA_SERIAL - #define CONFIG_FFUART 1 /* we use FFUART on LUBBOCK */ - - /* allow to overwrite serial and ethaddr */ -diff --git a/include/configs/csb226.h b/include/configs/csb226.h -index ed18450..12bab47 100644 ---- a/include/configs/csb226.h -+++ b/include/configs/csb226.h -@@ -53,6 +53,7 @@ - /* - * select serial console configuration - */ -+#define CONFIG_PXA_SERIAL - #define CONFIG_FFUART 1 /* we use FFUART on CSB226 */ - - /* allow to overwrite serial and ethaddr */ -diff --git a/include/configs/csb272.h b/include/configs/csb272.h -index 204aea0..aed6f50 100644 ---- a/include/configs/csb272.h -+++ b/include/configs/csb272.h -@@ -184,6 +184,7 @@ - #define CONFIG_PHY_CMD_DELAY 40 /* PHY COMMAND delay */ - /* 32usec min. for LXT971A */ - #define CONFIG_PHY_RESET_DELAY 300 /* PHY RESET recovery delay */ -+#define CONFIG_NET_MULTI - - /* - * RTC configuration -diff --git a/include/configs/csb472.h b/include/configs/csb472.h -index 9b3a11c..24b961f 100644 ---- a/include/configs/csb472.h -+++ b/include/configs/csb472.h -@@ -183,6 +183,7 @@ - #define CONFIG_PHY_CMD_DELAY 40 /* PHY COMMAND delay */ - /* 32usec min. for LXT971A */ - #define CONFIG_PHY_RESET_DELAY 300 /* PHY RESET recovery delay */ -+#define CONFIG_NET_MULTI - - /* - * RTC configuration -diff --git a/include/configs/davinci_dm355evm.h b/include/configs/davinci_dm355evm.h -new file mode 100644 -index 0000000..9a7df08 ---- /dev/null -+++ b/include/configs/davinci_dm355evm.h -@@ -0,0 +1,190 @@ -+/* -+ * Copyright (C) 2009 David Brownell -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#ifndef __CONFIG_H -+#define __CONFIG_H -+#include -+ -+/* Spectrum Digital TMS320DM355 EVM board */ -+#define DAVINCI_DM355EVM -+ -+#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 3rd stage loader */ -+#define CONFIG_SKIP_RELOCATE_UBOOT -+#define CONFIG_SYS_NO_FLASH /* that is, no *NOR* flash */ -+#define CONFIG_SYS_CONSOLE_INFO_QUIET -+#define CONFIG_DISPLAY_CPUINFO -+ -+/* SoC Configuration */ -+#define CONFIG_ARM926EJS /* arm926ejs CPU */ -+#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */ -+#define CONFIG_SYS_HZ_CLOCK 24000000 /* timer0 freq */ -+#define CONFIG_SYS_HZ 1000 -+#define CONFIG_SOC_DM355 -+ -+/* Memory Info */ -+#define CONFIG_NR_DRAM_BANKS 1 -+#define PHYS_SDRAM_1 0x80000000 -+#define PHYS_SDRAM_1_SIZE SZ_128M -+ -+/* Serial Driver info: UART0 for console */ -+#define CONFIG_SYS_NS16550 -+#define CONFIG_SYS_NS16550_SERIAL -+#define CONFIG_SYS_NS16550_REG_SIZE -4 -+#define CONFIG_SYS_NS16550_COM1 0x01c20000 -+#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK -+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } -+#define CONFIG_CONS_INDEX 1 -+#define CONFIG_BAUDRATE 115200 -+ -+/* Ethernet: external DM9000 */ -+#define CONFIG_DRIVER_DM9000 1 -+#define CONFIG_DM9000_BASE 0x04014000 -+#define DM9000_IO CONFIG_DM9000_BASE -+#define DM9000_DATA (CONFIG_DM9000_BASE + 2) -+ -+/* I2C */ -+#define CONFIG_HARD_I2C -+#define CONFIG_DRIVER_DAVINCI_I2C -+#define CONFIG_SYS_I2C_SPEED 400000 -+#define CONFIG_SYS_I2C_SLAVE 0x10 /* SMBus host address */ -+ -+/* NAND: socketed, two chipselects, normally 2 GBytes */ -+/* NYET -- #define CONFIG_NAND_DAVINCI */ -+#define CONFIG_SYS_NAND_HW_ECC -+#define CONFIG_SYS_NAND_USE_FLASH_BBT -+ -+#define CONFIG_SYS_NAND_LARGEPAGE -+#define CONFIG_SYS_NAND_BASE_LIST { 0x02000000, } -+/* socket has two chipselects, nCE0 gated by address BIT(14) */ -+#define CONFIG_SYS_MAX_NAND_DEVICE 1 -+#define CONFIG_SYS_NAND_MAX_CHIPS 2 -+ -+/* USB: OTG connector */ -+/* NYET -- #define CONFIG_USB_DAVINCI */ -+ -+/* U-Boot command configuration */ -+#include -+ -+#undef CONFIG_CMD_BDI -+#undef CONFIG_CMD_FLASH -+#undef CONFIG_CMD_FPGA -+#undef CONFIG_CMD_SETGETDCR -+ -+#define CONFIG_CMD_ASKENV -+#define CONFIG_CMD_DHCP -+#define CONFIG_CMD_I2C -+#define CONFIG_CMD_PING -+#define CONFIG_CMD_SAVES -+ -+#ifdef CONFIG_NAND_DAVINCI -+#define CONFIG_CMD_MTDPARTS -+#define CONFIG_MTD_PARTITIONS -+#define CONFIG_CMD_NAND -+#define CONFIG_CMD_UBI -+#define CONFIG_RBTREE -+#endif -+ -+/* TEMPORARY -- no safe place to save env, yet */ -+#define CONFIG_ENV_IS_NOWHERE -+#undef CONFIG_CMD_SAVEENV -+ -+#ifdef CONFIG_USB_DAVINCI -+#define CONFIG_MUSB_HCD -+#define CONFIG_CMD_USB -+#define CONFIG_USB_STORAGE -+#else -+#undef CONFIG_MUSB_HCD -+#undef CONFIG_CMD_USB -+#undef CONFIG_USB_STORAGE -+#endif -+ -+#define CONFIG_CRC32_VERIFY -+#define CONFIG_MX_CYCLIC -+ -+/* U-Boot general configuration */ -+#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ -+#define CONFIG_BOOTFILE "uImage" /* Boot file name */ -+#define CONFIG_SYS_PROMPT "DM355 EVM # " /* Monitor Command Prompt */ -+#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -+#define CONFIG_SYS_PBSIZE /* Print buffer size */ \ -+ (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -+#define CONFIG_SYS_HUSH_PARSER -+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -+#define CONFIG_SYS_LONGHELP -+ -+#define CONFIG_ENV_SIZE SZ_16K -+ -+/* NYET -- #define CONFIG_BOOTDELAY 5 */ -+#define CONFIG_BOOTCOMMAND \ -+ "dhcp;bootm" -+#define CONFIG_BOOTARGS \ -+ "console=ttyS0,115200n8 " \ -+ "root=/dev/mmcblk0p1 rootwait rootfstype=ext3 ro" -+ -+#define CONFIG_CMDLINE_EDITING -+#define CONFIG_VERSION_VARIABLE -+#define CONFIG_TIMESTAMP -+ -+#define CONFIG_NET_RETRY_COUNT 10 -+ -+/* U-Boot memory configuration */ -+#define CONFIG_STACKSIZE SZ_256K /* regular stack */ -+#define CONFIG_SYS_MALLOC_LEN SZ_512K /* malloc() arena */ -+#define CONFIG_SYS_GBL_DATA_SIZE 128 /* for initial data */ -+#define CONFIG_SYS_MEMTEST_START 0x87000000 /* physical address */ -+#define CONFIG_SYS_MEMTEST_END 0x88000000 /* test 16MB RAM */ -+ -+/* Linux interfacing */ -+#define CONFIG_CMDLINE_TAG -+#define CONFIG_SETUP_MEMORY_TAGS -+#define CONFIG_SYS_BARGSIZE 1024 /* bootarg Size */ -+#define CONFIG_SYS_LOAD_ADDR 0x80700000 /* kernel address */ -+ -+ -+/* NAND configuration ... socketed with two chipselects. It normally comes -+ * with a 2GByte SLC part with 2KB pages (and 128KB erase blocks); other -+ * 2GByte parts may have 4KB pages, 256KB erase blocks, and use MLC. (MLC -+ * pretty much demands the 4-bit ECC support.) You can of course swap in -+ * other parts, including small page ones. -+ * -+ * This presents a single read-only partition for all bootloader stuff. -+ * UBL (1+ block), U-Boot (256KB+), U-Boot environment (one block), and -+ * some extra space to help cope with bad blocks in that data. Linux -+ * shouldn't care about its detailed layout, and will probably want to use -+ * UBI/UBFS for the rest (except maybe on smallpage chips). It's easy to -+ * override this default partitioning using MTDPARTS and cmdlinepart. -+ */ -+#define MTDIDS_DEFAULT "nand0=davinci_nand.0" -+ -+#ifdef CONFIG_SYS_NAND_LARGEPAGE -+/* Use same layout for 128K/256K blocks; allow some bad blocks */ -+#define PART_BOOT "2m(bootloader)ro," -+#else -+/* Assume 16K erase blocks; allow a few bad ones. */ -+#define PART_BOOT "512k(bootloader)ro," -+#endif -+ -+#define PART_KERNEL "4m(kernel)," /* kernel + initramfs */ -+#define PART_REST "-(filesystem)" -+ -+#define MTDPARTS_DEFAULT \ -+ "mtdparts=davinci_nand.0:" PART_BOOT PART_KERNEL PART_REST -+ -+#endif /* __CONFIG_H */ -diff --git a/include/configs/davinci_dvevm.h b/include/configs/davinci_dvevm.h -index 9fe4072..6c5d065 100644 ---- a/include/configs/davinci_dvevm.h -+++ b/include/configs/davinci_dvevm.h -@@ -52,6 +52,7 @@ - #define DV_EVM - #define CONFIG_SYS_NAND_SMALLPAGE - #define CONFIG_SYS_USE_NOR -+#define CONFIG_DISPLAY_CPUINFO - /*===================*/ - /* SoC Configuration */ - /*===================*/ -@@ -59,6 +60,7 @@ - #define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */ - #define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */ - #define CONFIG_SYS_HZ 1000 -+#define CONFIG_SOC_DM644X - /*====================================================*/ - /* EEPROM definitions for Atmel 24C256BN SEEPROM chip */ - /* on Sonata/DV_EVM board. No EEPROM on schmoogie. */ -@@ -118,6 +120,12 @@ - #ifdef CONFIG_SYS_NAND_SMALLPAGE - #define CONFIG_ENV_SECT_SIZE 512 /* Env sector Size */ - #define CONFIG_ENV_SIZE SZ_16K -+#define CONFIG_MTD_PARTITIONS -+#define CONFIG_CMD_MTDPARTS -+#define MTDIDS_DEFAULT \ -+ "nand0=davinci_nand.0" -+#define MTDPARTS_DEFAULT \ -+ "mtdparts=davinci_nand.0:384k(bootloader)ro,4m(kernel),-(filesystem)" - #else - #define CONFIG_ENV_SECT_SIZE 2048 /* Env sector Size */ - #define CONFIG_ENV_SIZE SZ_128K -@@ -125,6 +133,7 @@ - #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */ - #define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */ - #define CONFIG_SYS_NAND_BASE 0x02000000 -+#define CONFIG_SYS_NAND_USE_FLASH_BBT - #define CONFIG_SYS_NAND_HW_ECC - #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ - #define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ -diff --git a/include/configs/davinci_schmoogie.h b/include/configs/davinci_schmoogie.h -index a16ac39..6612cb3 100644 ---- a/include/configs/davinci_schmoogie.h -+++ b/include/configs/davinci_schmoogie.h -@@ -27,6 +27,7 @@ - #define SCHMOOGIE - #define CONFIG_SYS_NAND_LARGEPAGE - #define CONFIG_SYS_USE_NAND -+#define CONFIG_DISPLAY_CPUINFO - /*===================*/ - /* SoC Configuration */ - /*===================*/ -@@ -34,6 +35,7 @@ - #define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */ - #define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */ - #define CONFIG_SYS_HZ 1000 -+#define CONFIG_SOC_DM644X - /*=============*/ - /* Memory Info */ - /*=============*/ -diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h -index c2ebd97..6c1dc11 100644 ---- a/include/configs/davinci_sffsdr.h -+++ b/include/configs/davinci_sffsdr.h -@@ -28,13 +28,14 @@ - #define SFFSDR - #define CONFIG_SYS_NAND_LARGEPAGE - #define CONFIG_SYS_USE_NAND --#define CONFIG_SYS_USE_DSPLINK /* This is to prevent U-Boot from -- * powering ON the DSP. */ -+#define CONFIG_SYS_USE_DSPLINK /* don't power up the DSP. */ -+#define CONFIG_DISPLAY_CPUINFO - /* SoC Configuration */ - #define CONFIG_ARM926EJS /* arm926ejs CPU core */ - #define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */ - #define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */ - #define CONFIG_SYS_HZ 1000 -+#define CONFIG_SOC_DM644X - /* EEPROM definitions for Atmel 24LC64 EEPROM chip */ - #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 - #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 -diff --git a/include/configs/davinci_sonata.h b/include/configs/davinci_sonata.h -index 0fc6012..893729c 100644 ---- a/include/configs/davinci_sonata.h -+++ b/include/configs/davinci_sonata.h -@@ -52,6 +52,7 @@ - #define SONATA_BOARD - #define CONFIG_SYS_NAND_SMALLPAGE - #define CONFIG_SYS_USE_NOR -+#define CONFIG_DISPLAY_CPUINFO - /*===================*/ - /* SoC Configuration */ - /*===================*/ -@@ -59,6 +60,7 @@ - #define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */ - #define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */ - #define CONFIG_SYS_HZ 1000 -+#define CONFIG_SOC_DM644X - /*====================================================*/ - /* EEPROM definitions for Atmel 24C256BN SEEPROM chip */ - /* on Sonata/DV_EVM board. No EEPROM on schmoogie. */ -diff --git a/include/configs/delta.h b/include/configs/delta.h -index bacbd90..e7186e8 100644 ---- a/include/configs/delta.h -+++ b/include/configs/delta.h -@@ -82,6 +82,7 @@ - /* - * select serial console configuration - */ -+#define CONFIG_PXA_SERIAL - #define CONFIG_FFUART 1 - - /* allow to overwrite serial and ethaddr */ -diff --git a/include/configs/fx12mm.h b/include/configs/fx12mm.h -index 27c6e7d..e825c21 100644 ---- a/include/configs/fx12mm.h -+++ b/include/configs/fx12mm.h -@@ -38,6 +38,8 @@ - /* cmd config */ - #define CONFIG_CMD_JFFS2 - #define CONFIG_CMD_MTDPARTS -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -+#define CONFIG_FLASH_CFI_MTD - #undef CONFIG_CMD_NET - - /* sdram */ -diff --git a/include/configs/gcplus.h b/include/configs/gcplus.h -index b2fbca2..85db4f5 100644 ---- a/include/configs/gcplus.h -+++ b/include/configs/gcplus.h -@@ -36,7 +36,7 @@ - * e.g. bootp/tftp download of the kernel is a far more convenient - * when testing new kernels on this target. However the ADS GCPlus Linux - * boot ROM leaves the MMU enabled when it passes control to U-Boot. So -- * we use lowlevel_init (CONFIG_INIT_CRITICAL) to remedy that problem. -+ * we use lowlevel_init (!CONFIG_SKIP_LOWLEVEL_INIT) to remedy that problem. - */ - #undef CONFIG_SKIP_LOWLEVEL_INIT - #define CONFIG_SKIP_RELOCATE_UBOOT 1 -diff --git a/include/configs/idmr.h b/include/configs/idmr.h -index 944d06f..841affb 100644 ---- a/include/configs/idmr.h -+++ b/include/configs/idmr.h -@@ -230,6 +230,8 @@ - - /* Dynamic MTD partition support */ - #define CONFIG_CMD_MTDPARTS -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -+#define CONFIG_FLASH_CFI_MTD - #define MTDIDS_DEFAULT "nor0=idmr-0" - - #define MTDPARTS_DEFAULT "mtdparts=idmr-0:128k(u-boot)," \ -diff --git a/include/configs/innokom.h b/include/configs/innokom.h -index 69654c7..ed03ad3 100644 ---- a/include/configs/innokom.h -+++ b/include/configs/innokom.h -@@ -50,6 +50,7 @@ - /* - * select serial console configuration - */ -+#define CONFIG_PXA_SERIAL - #define CONFIG_FFUART 1 /* we use FFUART on CSB226 */ - - /* allow to overwrite serial and ethaddr */ -diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h -index 38c0249..09270ff 100644 ---- a/include/configs/integratorap.h -+++ b/include/configs/integratorap.h -@@ -44,7 +44,7 @@ - #define CONFIG_SETUP_MEMORY_TAGS 1 - #define CONFIG_MISC_INIT_R 1 /* call misc_init_r during start up */ - --#undef CONFIG_INIT_CRITICAL -+#define CONFIG_SKIP_LOWLEVEL_INIT - #define CONFIG_CM_INIT 1 - #define CONFIG_CM_REMAP 1 - #undef CONFIG_CM_SPD_DETECT -diff --git a/include/configs/ixdpg425.h b/include/configs/ixdpg425.h -index 75707e5..0c09234 100644 ---- a/include/configs/ixdpg425.h -+++ b/include/configs/ixdpg425.h -@@ -55,6 +55,7 @@ - */ - #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ - #define CONFIG_USE_IRQ 1 /* we need IRQ stuff for timer */ -+#define CONFIG_TIMER_IRQ - - #define CONFIG_BOOTCOUNT_LIMIT /* support for bootcount limit */ - #define CONFIG_SYS_BOOTCOUNT_ADDR 0x60003000 /* inside qmrg sram */ -diff --git a/include/configs/katmai.h b/include/configs/katmai.h -index 0d89594..3840267 100644 ---- a/include/configs/katmai.h -+++ b/include/configs/katmai.h -@@ -129,7 +129,6 @@ - #define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ - - #define CONFIG_I2C_MULTI_BUS --#define CONFIG_I2C_CMD_TREE - #define CONFIG_SYS_SPD_BUS_NUM 0 /* The I2C bus for SPD */ - - #define IIC0_BOOTPROM_ADDR 0x50 -diff --git a/include/configs/keymile-common.h b/include/configs/keymile-common.h -index b2e37ec..0fcf692 100644 ---- a/include/configs/keymile-common.h -+++ b/include/configs/keymile-common.h -@@ -97,7 +97,6 @@ - #define CONFIG_SYS_SLOT_ID_MASK (0x3f) /* mask for slot ID bits */ - - #define CONFIG_I2C_MULTI_BUS 1 --#define CONFIG_I2C_CMD_TREE 1 - #define CONFIG_SYS_MAX_I2C_BUS 2 - #define CONFIG_SYS_I2C_INIT_BOARD 1 - #define CONFIG_I2C_MUX 1 -diff --git a/include/configs/kmeter1.h b/include/configs/kmeter1.h -index f7fc6c5..19da133 100644 ---- a/include/configs/kmeter1.h -+++ b/include/configs/kmeter1.h -@@ -25,7 +25,7 @@ - */ - #define CONFIG_E300 1 /* E300 family */ - #define CONFIG_QE 1 /* Has QE */ --#define CONFIG_MPC83XX 1 /* MPC83XX family */ -+#define CONFIG_MPC83xx 1 /* MPC83xx family */ - #define CONFIG_MPC8360 1 /* MPC8360 CPU specific */ - #define CONFIG_KMETER1 1 /* KMETER1 board specific */ - #define CONFIG_HOSTNAME kmeter1 -@@ -314,7 +314,6 @@ - #define CONFIG_SYS_I2C_SLAVE 0x7F - #define CONFIG_SYS_I2C_OFFSET 0x3000 - #define CONFIG_I2C_MULTI_BUS 1 --#define CONFIG_I2C_CMD_TREE 1 - #define CONFIG_SYS_MAX_I2C_BUS 2 - #define CONFIG_I2C_MUX 1 - -diff --git a/include/configs/korat.h b/include/configs/korat.h -index eb2c1d4..ea6ba89 100644 ---- a/include/configs/korat.h -+++ b/include/configs/korat.h -@@ -282,7 +282,6 @@ - #define CONFIG_CMD_ELF - #define CONFIG_CMD_FAT - #define CONFIG_CMD_I2C --#define CONFIG_I2C_CMD_TREE - #define CONFIG_CMD_IRQ - #define CONFIG_CMD_MII - #define CONFIG_CMD_NET -diff --git a/include/configs/logodl.h b/include/configs/logodl.h -index 889a9a3..5b903f0 100644 ---- a/include/configs/logodl.h -+++ b/include/configs/logodl.h -@@ -50,6 +50,7 @@ - /* - * select serial console configuration - */ -+#define CONFIG_PXA_SERIAL - #define CONFIG_FFUART 1 /* we use FFUART */ - - /* allow to overwrite serial and ethaddr */ -diff --git a/include/configs/lpc2292sodimm.h b/include/configs/lpc2292sodimm.h -index 1515038..7ce8d6d 100644 ---- a/include/configs/lpc2292sodimm.h -+++ b/include/configs/lpc2292sodimm.h -@@ -30,8 +30,6 @@ - * If we are developing, we might want to start u-boot from ram - * so we MUST NOT initialize critical regs like mem-timing ... - */ --#undef CONFIG_INIT_CRITICAL /* undef for developing */ -- - #undef CONFIG_SKIP_LOWLEVEL_INIT - #undef CONFIG_SKIP_RELOCATE_UBOOT - -diff --git a/include/configs/lpd7a400.h b/include/configs/lpd7a400.h -index b1bd74f..bf4a57d 100644 ---- a/include/configs/lpd7a400.h -+++ b/include/configs/lpd7a400.h -@@ -43,6 +43,7 @@ - /* - * select serial console configuration - */ -+#define CONFIG_LH7A40X_SERIAL - #define CONFIG_CONSOLE_UART2 /* UART2 LH7A40x for console */ - - /* allow to overwrite serial and ethaddr */ -diff --git a/include/configs/lpd7a404.h b/include/configs/lpd7a404.h -index b197674..102c0af 100644 ---- a/include/configs/lpd7a404.h -+++ b/include/configs/lpd7a404.h -@@ -43,6 +43,7 @@ - /* - * select serial console configuration - */ -+#define CONFIG_LH7A40X_SERIAL - #define CONFIG_CONSOLE_UART2 /* UART2 LH7A40x for console */ - - /* allow to overwrite serial and ethaddr */ -diff --git a/include/configs/lubbock.h b/include/configs/lubbock.h -index 2cf9c02..43913ca 100644 ---- a/include/configs/lubbock.h -+++ b/include/configs/lubbock.h -@@ -64,6 +64,7 @@ - /* - * select serial console configuration - */ -+#define CONFIG_PXA_SERIAL - #define CONFIG_FFUART 1 /* we use FFUART on LUBBOCK */ - - /* allow to overwrite serial and ethaddr */ -diff --git a/include/configs/mecp5123.h b/include/configs/mecp5123.h -new file mode 100644 -index 0000000..0831843 ---- /dev/null -+++ b/include/configs/mecp5123.h -@@ -0,0 +1,458 @@ -+/* -+ * (C) Copyright 2009 Wolfgang Denk -+ * (C) Copyright 2009, DAVE Srl -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ * -+ * modifications for the MECP5123 by reinhard.arlt@esd-electronics.com -+ * -+ */ -+ -+/* -+ * MECP5123 board configuration file -+ */ -+ -+#ifndef __CONFIG_H -+#define __CONFIG_H -+ -+#define CONFIG_MECP5123 1 -+/* -+ * Memory map for the MECP5123 board: -+ * -+ * 0x0000_0000 - 0x1FFF_FFFF DDR RAM (512 MB) -+ * 0x3000_0000 - 0x3001_FFFF SRAM (128 KB) -+ * 0x8000_0000 - 0x803F_FFFF IMMR (4 MB) -+ * 0x8200_0000 - 0x8200_FFFF VPC-3 (64 KB) -+ * 0xFFC0_0000 - 0xFFFF_FFFF NOR Boot FLASH (64 MB) -+ */ -+ -+/* -+ * High Level Configuration Options -+ */ -+#define CONFIG_E300 1 /* E300 Family */ -+#define CONFIG_MPC512X 1 /* MPC512X family */ -+ -+#define CONFIG_SYS_MPC512X_CLKIN 33333333 /* in Hz */ -+ -+#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */ -+#define CONFIG_MISC_INIT_R -+ -+#define CONFIG_SYS_IMMR 0x80000000 -+#define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_IMMR+0x2100) -+ -+#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */ -+#define CONFIG_SYS_MEMTEST_END 0x00400000 -+ -+/* -+ * DDR Setup - manually set all parameters as there's no SPD etc. -+ */ -+#define CONFIG_SYS_DDR_SIZE 512 /* MB */ -+ -+#define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is sys memory*/ -+#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE -+ -+/* DDR Controller Configuration -+ * -+ * SYS_CFG: -+ * [31:31] MDDRC Soft Reset: Diabled -+ * [30:30] DRAM CKE pin: Enabled -+ * [29:29] DRAM CLK: Enabled -+ * [28:28] Command Mode: Enabled (For initialization only) -+ * [27:25] DRAM Row Select: dram_row[15:0] = magenta_address[25:10] -+ * [24:21] DRAM Bank Select: dram_bank[1:0] = magenta_address[11:10] -+ * [20:19] Read Test: DON'T USE -+ * [18:18] Self Refresh: Enabled -+ * [17:17] 16bit Mode: Disabled -+ * [16:13] Ready Delay: 2 -+ * [12:12] Half DQS Delay: Disabled -+ * [11:11] Quarter DQS Delay: Disabled -+ * [10:08] Write Delay: 2 -+ * [07:07] Early ODT: Disabled -+ * [06:06] On DIE Termination: Disabled -+ * [05:05] FIFO Overflow Clear: DON'T USE here -+ * [04:04] FIFO Underflow Clear: DON'T USE here -+ * [03:03] FIFO Overflow Pending: DON'T USE here -+ * [02:02] FIFO Underlfow Pending: DON'T USE here -+ * [01:01] FIFO Overlfow Enabled: Enabled -+ * [00:00] FIFO Underflow Enabled: Enabled -+ * TIME_CFG0 -+ * [31:16] DRAM Refresh Time: 0 CSB clocks -+ * [15:8] DRAM Command Time: 0 CSB clocks -+ * [07:00] DRAM Precharge Time: 0 CSB clocks -+ * TIME_CFG1 -+ * [31:26] DRAM tRFC: -+ * [25:21] DRAM tWR1: -+ * [20:17] DRAM tWRT1: -+ * [16:11] DRAM tDRR: -+ * [10:05] DRAM tRC: -+ * [04:00] DRAM tRAS: -+ * TIME_CFG2 -+ * [31:28] DRAM tRCD: -+ * [27:23] DRAM tFAW: -+ * [22:19] DRAM tRTW1: -+ * [18:15] DRAM tCCD: -+ * [14:10] DRAM tRTP: -+ * [09:05] DRAM tRP: -+ * [04:00] DRAM tRPA -+ */ -+#ifdef CONFIG_ADS5121_REV2 -+#define CONFIG_SYS_MDDRC_SYS_CFG 0xF8604A00 -+#define CONFIG_SYS_MDDRC_SYS_CFG_RUN 0xE8604A00 -+#define CONFIG_SYS_MDDRC_TIME_CFG1 0x54EC1168 -+#define CONFIG_SYS_MDDRC_TIME_CFG2 0x35210864 -+#else -+#define CONFIG_SYS_MDDRC_SYS_CFG 0xFA804A00 -+#define CONFIG_SYS_MDDRC_SYS_CFG_RUN 0xEA804A00 -+#define CONFIG_SYS_MDDRC_TIME_CFG1 0x68EC1168 -+#define CONFIG_SYS_MDDRC_TIME_CFG2 0x34310864 -+#endif -+#define CONFIG_SYS_MDDRC_SYS_CFG_EN 0xF0000000 -+#define CONFIG_SYS_MDDRC_TIME_CFG0 0x00003D2E -+#define CONFIG_SYS_MDDRC_TIME_CFG0_RUN 0x06183D2E -+ -+#define CONFIG_SYS_MICRON_NOP 0x01380000 -+#define CONFIG_SYS_MICRON_PCHG_ALL 0x01100400 -+#define CONFIG_SYS_MICRON_EM2 0x01020000 -+#define CONFIG_SYS_MICRON_EM3 0x01030000 -+#define CONFIG_SYS_MICRON_EN_DLL 0x01010000 -+#define CONFIG_SYS_MICRON_RFSH 0x01080000 -+#define CONFIG_SYS_MICRON_INIT_DEV_OP 0x01000432 -+#define CONFIG_SYS_MICRON_OCD_DEFAULT 0x01010780 -+ -+/* DDR Priority Manager Configuration */ -+#define CONFIG_SYS_MDDRCGRP_PM_CFG1 0x00077777 -+#define CONFIG_SYS_MDDRCGRP_PM_CFG2 0x00000000 -+#define CONFIG_SYS_MDDRCGRP_HIPRIO_CFG 0x00000001 -+#define CONFIG_SYS_MDDRCGRP_LUT0_MU 0xFFEEDDCC -+#define CONFIG_SYS_MDDRCGRP_LUT0_ML 0xBBAAAAAA -+#define CONFIG_SYS_MDDRCGRP_LUT1_MU 0x66666666 -+#define CONFIG_SYS_MDDRCGRP_LUT1_ML 0x55555555 -+#define CONFIG_SYS_MDDRCGRP_LUT2_MU 0x44444444 -+#define CONFIG_SYS_MDDRCGRP_LUT2_ML 0x44444444 -+#define CONFIG_SYS_MDDRCGRP_LUT3_MU 0x55555555 -+#define CONFIG_SYS_MDDRCGRP_LUT3_ML 0x55555558 -+#define CONFIG_SYS_MDDRCGRP_LUT4_MU 0x11111111 -+#define CONFIG_SYS_MDDRCGRP_LUT4_ML 0x11111122 -+#define CONFIG_SYS_MDDRCGRP_LUT0_AU 0xaaaaaaaa -+#define CONFIG_SYS_MDDRCGRP_LUT0_AL 0xaaaaaaaa -+#define CONFIG_SYS_MDDRCGRP_LUT1_AU 0x66666666 -+#define CONFIG_SYS_MDDRCGRP_LUT1_AL 0x66666666 -+#define CONFIG_SYS_MDDRCGRP_LUT2_AU 0x11111111 -+#define CONFIG_SYS_MDDRCGRP_LUT2_AL 0x11111111 -+#define CONFIG_SYS_MDDRCGRP_LUT3_AU 0x11111111 -+#define CONFIG_SYS_MDDRCGRP_LUT3_AL 0x11111111 -+#define CONFIG_SYS_MDDRCGRP_LUT4_AU 0x11111111 -+#define CONFIG_SYS_MDDRCGRP_LUT4_AL 0x11111111 -+ -+/* -+ * NOR FLASH on the Local Bus -+ */ -+#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -+#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ -+ -+#define CONFIG_SYS_FLASH_BASE 0xFFC00000 /* start of FLASH */ -+#define CONFIG_SYS_FLASH_SIZE 0x00400000 /* max flash size */ -+ -+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -+#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ -+#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE} -+#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max sectors per device */ -+ -+#undef CONFIG_SYS_FLASH_CHECKSUM -+ -+/* -+ * NAND FLASH -+ * drivers/mtd/nand/mpc5121_mpc.c (rev 2 silicon only) -+ */ -+#define CONFIG_CMD_NAND -+#define CONFIG_NAND_MPC5121_NFC -+#define CONFIG_SYS_NAND_BASE 0x40000000 -+ -+#define CONFIG_SYS_MAX_NAND_DEVICE 1 -+#define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE -+ -+/* -+ * Configuration parameters for MPC5121 NAND driver -+ */ -+#define CONFIG_FSL_NFC_WIDTH 1 -+#define CONFIG_FSL_NFC_WRITE_SIZE 2048 -+#define CONFIG_FSL_NFC_SPARE_SIZE 64 -+#define CONFIG_FSL_NFC_CHIPS 1 -+ -+#define CONFIG_SYS_SRAM_BASE 0x30000000 -+#define CONFIG_SYS_SRAM_SIZE 0x00020000 /* 128 KB */ -+ -+/* ALE active low, data size 4bytes */ -+#define CONFIG_SYS_CS0_CFG 0x05051150 -+ -+/* Use not alternative CS timing */ -+#define CONFIG_SYS_CS_ALETIMING 0x00000000 -+ -+/* ALE active low, data size 4bytes */ -+#define CONFIG_SYS_CS1_CFG 0x1f1f3090 -+#define CONFIG_SYS_VPC3_BASE 0x82000000 /* start of VPC3 space */ -+#define CONFIG_SYS_VPC3_SIZE 0x00010000 /* max VPC3 size */ -+ -+/* Use SRAM for initial stack */ -+#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SRAM_BASE /* Init RAM addr */ -+#define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_SRAM_SIZE -+ -+#define CONFIG_SYS_GBL_DATA_SIZE 0x100 /* num bytes initial data */ -+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -+#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -+ -+#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of monitor */ -+#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Monitor length */ -+#define CONFIG_SYS_MALLOC_LEN (6 * 1024 * 1024) /* Malloc size */ -+ -+/* -+ * Serial Port -+ */ -+#define CONFIG_CONS_INDEX 1 -+#undef CONFIG_SERIAL_SOFTWARE_FIFO -+ -+/* -+ * Serial console configuration -+ */ -+#define CONFIG_PSC_CONSOLE 3 /* console is on PSC3 */ -+#if CONFIG_PSC_CONSOLE != 3 -+#error CONFIG_PSC_CONSOLE must be 3 -+#endif -+#define CONFIG_BAUDRATE 9600 /* ... at 9600 bps */ -+#define CONFIG_SYS_BAUDRATE_TABLE \ -+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200} -+ -+#define CONSOLE_FIFO_TX_SIZE FIFOC_PSC3_TX_SIZE -+#define CONSOLE_FIFO_TX_ADDR FIFOC_PSC3_TX_ADDR -+#define CONSOLE_FIFO_RX_SIZE FIFOC_PSC3_RX_SIZE -+#define CONSOLE_FIFO_RX_ADDR FIFOC_PSC3_RX_ADDR -+ -+#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ -+/* Use the HUSH parser */ -+#define CONFIG_SYS_HUSH_PARSER -+#ifdef CONFIG_SYS_HUSH_PARSER -+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -+#endif -+ -+/* I2C */ -+#define CONFIG_HARD_I2C /* I2C with hardware support */ -+#undef CONFIG_SOFT_I2C /* so disable bit-banged I2C */ -+#define CONFIG_I2C_MULTI_BUS -+#define CONFIG_I2C_CMD_TREE -+#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed */ -+#define CONFIG_SYS_I2C_SLAVE 0x7F /* slave address */ -+ -+/* -+ * IIM - IC Identification Module -+ */ -+#undef CONFIG_IIM -+ -+/* -+ * EEPROM configuration -+ */ -+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* 16-bit EEPROM address */ -+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Atmel: AT24C32A-10TQ-2.7 */ -+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10ms of delay */ -+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* 32-Byte Page Write Mode */ -+#define CONFIG_SYS_EEPROM_WREN /* Use EEPROM write protect */ -+ -+/* -+ * Ethernet configuration -+ */ -+#define CONFIG_MPC512x_FEC 1 -+#define CONFIG_NET_MULTI -+#define CONFIG_PHY_ADDR 0x1 -+#define CONFIG_MII 1 /* MII PHY management */ -+#define CONFIG_FEC_AN_TIMEOUT 1 -+#define CONFIG_HAS_ETH0 -+ -+/* -+ * Configure on-board RTC -+ */ -+#define CONFIG_SYS_RTC_BUS_NUM 0x01 -+#define CONFIG_SYS_I2C_RTC_ADDR 0x32 -+#define CONFIG_RTC_RX8025 -+ -+/* -+ * Environment -+ */ -+#define CONFIG_ENV_IS_IN_EEPROM /* Store env in I2C EEPROM */ -+#define CONFIG_ENV_SIZE 0x1000 -+#define CONFIG_ENV_OFFSET 0x0000 /* environment starts here */ -+ -+#define CONFIG_LOADS_ECHO /* echo on for serial download */ -+#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ -+ -+#include -+ -+#define CONFIG_CMD_ASKENV -+#define CONFIG_CMD_DHCP -+#define CONFIG_CMD_I2C -+#define CONFIG_CMD_MII -+#define CONFIG_CMD_NFS -+#define CONFIG_CMD_PING -+#define CONFIG_CMD_REGINFO -+#define CONFIG_CMD_EEPROM -+#define CONFIG_CMD_DATE -+#undef CONFIG_CMD_FUSE -+#undef CONFIG_CMD_IDE -+#undef CONFIG_CMD_EXT2 -+#define CONFIG_CMD_FAT -+#define CONFIG_CMD_JFFS2 -+#define CONFIG_CMD_ELF -+#define CONFIG_DOS_PARTITION -+ -+/* -+ * Watchdog timeout = CONFIG_SYS_WATCHDOG_VALUE * 65536 / IPS clock. -+ * For example, when IPS is set to 66MHz and CONFIG_SYS_WATCHDOG_VALUE is set -+ * to 0xFFFF, watchdog timeouts after about 64s. For details refer -+ * to chapter 36 of the MPC5121e Reference Manual. -+ */ -+/* #define CONFIG_WATCHDOG */ /* enable watchdog */ -+#define CONFIG_SYS_WATCHDOG_VALUE 0xFFFF -+ -+ /* -+ * Miscellaneous configurable options -+ */ -+#define CONFIG_SYS_LONGHELP /* undef to save memory */ -+#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ -+#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ -+ -+#ifdef CONFIG_CMD_KGDB -+# define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -+#else -+# define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -+#endif -+ -+/* Print Buffer Size */ -+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ -+ sizeof(CONFIG_SYS_PROMPT) + 16) -+/* max number of command args */ -+#define CONFIG_SYS_MAXARGS 32 -+/* Boot Argument Buffer Size */ -+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -+ -+#define CONFIG_SYS_HZ 1000 -+ -+/* -+ * For booting Linux, the board info and command line data -+ * have to be in the first 8 MB of memory, since this is -+ * the maximum mapped by the Linux kernel during initialization. -+ */ -+#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Linux initial memory map */ -+ -+/* Cache Configuration */ -+#define CONFIG_SYS_DCACHE_SIZE 32768 -+#define CONFIG_SYS_CACHELINE_SIZE 32 -+#ifdef CONFIG_CMD_KGDB -+#define CONFIG_SYS_CACHELINE_SHIFT 5 -+#endif -+ -+#define CONFIG_SYS_HID0_INIT 0x000000000 -+#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK -+#define CONFIG_SYS_HID2 HID2_HBE -+ -+#define CONFIG_HIGH_BATS 1 /* High BATs supported */ -+ -+/* -+ * Internal Definitions -+ * -+ * Boot Flags -+ */ -+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -+#define BOOTFLAG_WARM 0x02 /* Software reboot */ -+ -+#ifdef CONFIG_CMD_KGDB -+#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ -+#endif -+ -+/* -+ * Environment Configuration -+ */ -+#define CONFIG_TIMESTAMP -+ -+#define CONFIG_HOSTNAME mecp512x -+#define CONFIG_BOOTFILE /tftpboot/mecp512x/uImage -+#define CONFIG_ROOTPATH /tftpboot/mecp512x/target_root -+ -+#define CONFIG_LOADADDR 400000 /* def. location for tftp and bootm */ -+ -+#define CONFIG_BOOTDELAY 5 /* -1 disables auto-boot */ -+#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/ -+ -+#define CONFIG_PREBOOT "echo;" \ -+ "echo Welcome to MECP5123" \ -+ "echo" -+ -+#define CONFIG_EXTRA_ENV_SETTINGS \ -+ "u-boot_addr_r=200000\0" \ -+ "kernel_addr_r=600000\0" \ -+ "fdt_addr_r=880000\0" \ -+ "ramdisk_addr_r=900000\0" \ -+ "u-boot_addr=FFF00000\0" \ -+ "kernel_addr=FFC40000\0" \ -+ "fdt_addr=FFEC0000\0" \ -+ "ramdisk_addr=FC040000\0" \ -+ "ramdiskfile=/tftpboot/mecp512x/uRamdisk\0" \ -+ "u-boot=/tftpboot/mecp512x/u-boot.bin\0" \ -+ "bootfile=/tftpboot/mecp512x/uImage\0" \ -+ "fdtfile=/tftpboot/mecp512x/mecp512x.dtb\0" \ -+ "rootpath=/tftpboot/mecp512x/target_root\n" \ -+ "netdev=eth0\0" \ -+ "consdev=ttyPSC0\0" \ -+ "nfsargs=setenv bootargs root=/dev/nfs rw " \ -+ "nfsroot=${serverip}:${rootpath}\0" \ -+ "ramargs=setenv bootargs root=/dev/ram rw\0" \ -+ "addip=setenv bootargs ${bootargs} " \ -+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ -+ ":${hostname}:${netdev}:off panic=1\0" \ -+ "addtty=setenv bootargs ${bootargs} " \ -+ "console=${consdev},${baudrate}\0" \ -+ "flash_nfs=run nfsargs addip addtty;" \ -+ "bootm ${kernel_addr} - ${fdt_addr}\0" \ -+ "flash_self=run ramargs addip addtty;" \ -+ "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ -+ "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \ -+ "tftp ${fdt_addr_r} ${fdtfile};" \ -+ "run nfsargs addip addtty;" \ -+ "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ -+ "net_self=tftp ${kernel_addr_r} ${bootfile};" \ -+ "tftp ${ramdisk_addr_r} ${ramdiskfile};" \ -+ "tftp ${fdt_addr_r} ${fdtfile};" \ -+ "run ramargs addip addtty;" \ -+ "bootm ${kernel_addr_r} ${ramdisk_addr_r} ${fdt_addr_r}\0"\ -+ "load=tftp ${u-boot_addr_r} ${u-boot}\0" \ -+ "update=protect off ${u-boot_addr} +${filesize};" \ -+ "era ${u-boot_addr} +${filesize};" \ -+ "cp.b ${u-boot_addr_r} ${u-boot_addr} ${filesize}\0" \ -+ "upd=run load update\0" \ -+ "" -+ -+#define CONFIG_BOOTCOMMAND "run flash_self" -+ -+#define CONFIG_OF_LIBFDT -+#define CONFIG_OF_BOARD_SETUP -+ -+#define OF_CPU "PowerPC,5121@0" -+#define OF_SOC_COMPAT "fsl,mpc5121-immr" -+#define OF_TBCLK (bd->bi_busfreq / 4) -+#define OF_STDOUT_PATH "/soc@80000000/serial@11300" -+ -+#endif /* __CONFIG_H */ -diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h -index aa117c8..72715f6 100644 ---- a/include/configs/microblaze-generic.h -+++ b/include/configs/microblaze-generic.h -@@ -260,6 +260,8 @@ - #if defined(CONFIG_CMD_JFFS2) - /* JFFS2 partitions */ - #define CONFIG_CMD_MTDPARTS /* mtdparts command line support */ -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -+#define CONFIG_FLASH_CFI_MTD - #define MTDIDS_DEFAULT "nor0=ml401-0" - - /* default mtd partition table */ -diff --git a/include/configs/motionpro.h b/include/configs/motionpro.h -index 99a02cc..fa4310b 100644 ---- a/include/configs/motionpro.h -+++ b/include/configs/motionpro.h -@@ -276,6 +276,8 @@ - * MTD configuration - */ - #define CONFIG_CMD_MTDPARTS -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -+#define CONFIG_FLASH_CFI_MTD - #define MTDIDS_DEFAULT "nor0=motionpro-0" - #define MTDPARTS_DEFAULT "mtdparts=motionpro-0:" \ - "13m(fs),2m(kernel),256k(uboot)," \ -diff --git a/include/configs/mpc5121ads.h b/include/configs/mpc5121ads.h -new file mode 100644 -index 0000000..45a004e ---- /dev/null -+++ b/include/configs/mpc5121ads.h -@@ -0,0 +1,570 @@ -+/* -+ * (C) Copyright 2007-2009 DENX Software Engineering -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+/* -+ * MPC5121ADS board configuration file -+ */ -+ -+#ifndef __CONFIG_H -+#define __CONFIG_H -+ -+#define CONFIG_MPC5121ADS 1 -+/* -+ * Memory map for the MPC5121ADS board: -+ * -+ * 0x0000_0000 - 0x0FFF_FFFF DDR RAM (256 MB) -+ * 0x3000_0000 - 0x3001_FFFF SRAM (128 KB) -+ * 0x8000_0000 - 0x803F_FFFF IMMR (4 MB) -+ * 0x8200_0000 - 0x8200_001F CPLD (32 B) -+ * 0x8400_0000 - 0x82FF_FFFF PCI I/O space (16 MB) -+ * 0xA000_0000 - 0xAFFF_FFFF PCI memory space (256 MB) -+ * 0xB000_0000 - 0xBFFF_FFFF PCI memory mapped I/O space (256 MB) -+ * 0xFC00_0000 - 0xFFFF_FFFF NOR Boot FLASH (64 MB) -+ */ -+ -+/* -+ * High Level Configuration Options -+ */ -+#define CONFIG_E300 1 /* E300 Family */ -+#define CONFIG_MPC512X 1 /* MPC512X family */ -+#define CONFIG_FSL_DIU_FB 1 /* FSL DIU */ -+#undef CONFIG_FSL_DIU_LOGO_BMP /* Don't include FSL DIU binary bmp */ -+ -+/* video */ -+#undef CONFIG_VIDEO -+ -+#if defined(CONFIG_VIDEO) -+#define CONFIG_CFB_CONSOLE -+#define CONFIG_VGA_AS_SINGLE_DEVICE -+#endif -+ -+/* CONFIG_PCI is defined at config time */ -+ -+#ifdef CONFIG_MPC5121ADS_REV2 -+#define CONFIG_SYS_MPC512X_CLKIN 66000000 /* in Hz */ -+#else -+#define CONFIG_SYS_MPC512X_CLKIN 33333333 /* in Hz */ -+#define CONFIG_PCI -+#endif -+ -+#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */ -+#define CONFIG_MISC_INIT_R -+ -+#define CONFIG_SYS_IMMR 0x80000000 -+#define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_IMMR+0x2100) -+ -+#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */ -+#define CONFIG_SYS_MEMTEST_END 0x00400000 -+ -+/* -+ * DDR Setup - manually set all parameters as there's no SPD etc. -+ */ -+#ifdef CONFIG_MPC5121ADS_REV2 -+#define CONFIG_SYS_DDR_SIZE 256 /* MB */ -+#else -+#define CONFIG_SYS_DDR_SIZE 512 /* MB */ -+#endif -+#define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is system memory*/ -+#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE -+ -+/* DDR Controller Configuration -+ * -+ * SYS_CFG: -+ * [31:31] MDDRC Soft Reset: Diabled -+ * [30:30] DRAM CKE pin: Enabled -+ * [29:29] DRAM CLK: Enabled -+ * [28:28] Command Mode: Enabled (For initialization only) -+ * [27:25] DRAM Row Select: dram_row[15:0] = magenta_address[25:10] -+ * [24:21] DRAM Bank Select: dram_bank[1:0] = magenta_address[11:10] -+ * [20:19] Read Test: DON'T USE -+ * [18:18] Self Refresh: Enabled -+ * [17:17] 16bit Mode: Disabled -+ * [16:13] Ready Delay: 2 -+ * [12:12] Half DQS Delay: Disabled -+ * [11:11] Quarter DQS Delay: Disabled -+ * [10:08] Write Delay: 2 -+ * [07:07] Early ODT: Disabled -+ * [06:06] On DIE Termination: Disabled -+ * [05:05] FIFO Overflow Clear: DON'T USE here -+ * [04:04] FIFO Underflow Clear: DON'T USE here -+ * [03:03] FIFO Overflow Pending: DON'T USE here -+ * [02:02] FIFO Underlfow Pending: DON'T USE here -+ * [01:01] FIFO Overlfow Enabled: Enabled -+ * [00:00] FIFO Underflow Enabled: Enabled -+ * TIME_CFG0 -+ * [31:16] DRAM Refresh Time: 0 CSB clocks -+ * [15:8] DRAM Command Time: 0 CSB clocks -+ * [07:00] DRAM Precharge Time: 0 CSB clocks -+ * TIME_CFG1 -+ * [31:26] DRAM tRFC: -+ * [25:21] DRAM tWR1: -+ * [20:17] DRAM tWRT1: -+ * [16:11] DRAM tDRR: -+ * [10:05] DRAM tRC: -+ * [04:00] DRAM tRAS: -+ * TIME_CFG2 -+ * [31:28] DRAM tRCD: -+ * [27:23] DRAM tFAW: -+ * [22:19] DRAM tRTW1: -+ * [18:15] DRAM tCCD: -+ * [14:10] DRAM tRTP: -+ * [09:05] DRAM tRP: -+ * [04:00] DRAM tRPA -+ */ -+#ifdef CONFIG_MPC5121ADS_REV2 -+#define CONFIG_SYS_MDDRC_SYS_CFG 0xF8604A00 -+#define CONFIG_SYS_MDDRC_SYS_CFG_RUN 0xE8604A00 -+#define CONFIG_SYS_MDDRC_TIME_CFG1 0x54EC1168 -+#define CONFIG_SYS_MDDRC_TIME_CFG2 0x35210864 -+#else -+#define CONFIG_SYS_MDDRC_SYS_CFG 0xFA804A00 -+#define CONFIG_SYS_MDDRC_SYS_CFG_RUN 0xEA804A00 -+#define CONFIG_SYS_MDDRC_TIME_CFG1 0x68EC1168 -+#define CONFIG_SYS_MDDRC_TIME_CFG2 0x34310864 -+#endif -+#define CONFIG_SYS_MDDRC_SYS_CFG_EN 0xF0000000 -+#define CONFIG_SYS_MDDRC_TIME_CFG0 0x00003D2E -+#define CONFIG_SYS_MDDRC_TIME_CFG0_RUN 0x06183D2E -+ -+#define CONFIG_SYS_MICRON_NOP 0x01380000 -+#define CONFIG_SYS_MICRON_PCHG_ALL 0x01100400 -+#define CONFIG_SYS_MICRON_EM2 0x01020000 -+#define CONFIG_SYS_MICRON_EM3 0x01030000 -+#define CONFIG_SYS_MICRON_EN_DLL 0x01010000 -+#define CONFIG_SYS_MICRON_RFSH 0x01080000 -+#define CONFIG_SYS_MICRON_INIT_DEV_OP 0x01000432 -+#define CONFIG_SYS_MICRON_OCD_DEFAULT 0x01010780 -+ -+/* DDR Priority Manager Configuration */ -+#define CONFIG_SYS_MDDRCGRP_PM_CFG1 0x00077777 -+#define CONFIG_SYS_MDDRCGRP_PM_CFG2 0x00000000 -+#define CONFIG_SYS_MDDRCGRP_HIPRIO_CFG 0x00000001 -+#define CONFIG_SYS_MDDRCGRP_LUT0_MU 0xFFEEDDCC -+#define CONFIG_SYS_MDDRCGRP_LUT0_ML 0xBBAAAAAA -+#define CONFIG_SYS_MDDRCGRP_LUT1_MU 0x66666666 -+#define CONFIG_SYS_MDDRCGRP_LUT1_ML 0x55555555 -+#define CONFIG_SYS_MDDRCGRP_LUT2_MU 0x44444444 -+#define CONFIG_SYS_MDDRCGRP_LUT2_ML 0x44444444 -+#define CONFIG_SYS_MDDRCGRP_LUT3_MU 0x55555555 -+#define CONFIG_SYS_MDDRCGRP_LUT3_ML 0x55555558 -+#define CONFIG_SYS_MDDRCGRP_LUT4_MU 0x11111111 -+#define CONFIG_SYS_MDDRCGRP_LUT4_ML 0x11111122 -+#define CONFIG_SYS_MDDRCGRP_LUT0_AU 0xaaaaaaaa -+#define CONFIG_SYS_MDDRCGRP_LUT0_AL 0xaaaaaaaa -+#define CONFIG_SYS_MDDRCGRP_LUT1_AU 0x66666666 -+#define CONFIG_SYS_MDDRCGRP_LUT1_AL 0x66666666 -+#define CONFIG_SYS_MDDRCGRP_LUT2_AU 0x11111111 -+#define CONFIG_SYS_MDDRCGRP_LUT2_AL 0x11111111 -+#define CONFIG_SYS_MDDRCGRP_LUT3_AU 0x11111111 -+#define CONFIG_SYS_MDDRCGRP_LUT3_AL 0x11111111 -+#define CONFIG_SYS_MDDRCGRP_LUT4_AU 0x11111111 -+#define CONFIG_SYS_MDDRCGRP_LUT4_AL 0x11111111 -+ -+/* -+ * NOR FLASH on the Local Bus -+ */ -+#undef CONFIG_BKUP_FLASH -+#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ -+#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ -+#ifdef CONFIG_BKUP_FLASH -+#define CONFIG_SYS_FLASH_BASE 0xFF800000 /* start of FLASH */ -+#define CONFIG_SYS_FLASH_SIZE 0x00800000 /* max flash size in bytes */ -+#else -+#define CONFIG_SYS_FLASH_BASE 0xFC000000 /* start of FLASH */ -+#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* max flash size in bytes */ -+#endif -+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -+#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ -+#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE} -+#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max sectors per device */ -+ -+#undef CONFIG_SYS_FLASH_CHECKSUM -+ -+/* -+ * NAND FLASH -+ * drivers/mtd/nand/mpc5121_mpc.c (rev 2 silicon only) -+ */ -+#define CONFIG_CMD_NAND -+#define CONFIG_NAND_MPC5121_NFC -+#define CONFIG_SYS_NAND_BASE 0x40000000 -+ -+#define CONFIG_SYS_MAX_NAND_DEVICE 2 -+#define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE -+#define CONFIG_SYS_NAND_SELECT_DEVICE /* driver supports mutipl. chips */ -+ -+/* -+ * Configuration parameters for MPC5121 NAND driver -+ */ -+#define CONFIG_FSL_NFC_WIDTH 1 -+#define CONFIG_FSL_NFC_WRITE_SIZE 2048 -+#define CONFIG_FSL_NFC_SPARE_SIZE 64 -+#define CONFIG_FSL_NFC_CHIPS CONFIG_SYS_MAX_NAND_DEVICE -+ -+/* -+ * CPLD registers area is really only 32 bytes in size, but the smallest possible LP -+ * window is 64KB -+ */ -+#define CONFIG_SYS_CPLD_BASE 0x82000000 -+#define CONFIG_SYS_CPLD_SIZE 0x00010000 /* 64 KB */ -+ -+#define CONFIG_SYS_SRAM_BASE 0x30000000 -+#define CONFIG_SYS_SRAM_SIZE 0x00020000 /* 128 KB */ -+ -+#define CONFIG_SYS_CS0_CFG 0x05059310 /* ALE active low, data size 4bytes */ -+#define CONFIG_SYS_CS2_CFG 0x05059010 /* ALE active low, data size 1byte */ -+#define CONFIG_SYS_CS_ALETIMING 0x00000005 /* Use alternative CS timing for CS0 and CS2 */ -+ -+/* Use SRAM for initial stack */ -+#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SRAM_BASE /* Initial RAM address */ -+#define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_SRAM_SIZE /* End of used area in RAM */ -+ -+#define CONFIG_SYS_GBL_DATA_SIZE 0x100 /* num bytes initial data */ -+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -+#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -+ -+#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of monitor */ -+#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */ -+#ifdef CONFIG_FSL_DIU_FB -+#define CONFIG_SYS_MALLOC_LEN (6 * 1024 * 1024) /* Reserved for malloc */ -+#else -+#define CONFIG_SYS_MALLOC_LEN (512 * 1024) -+#endif -+ -+/* -+ * Serial Port -+ */ -+#define CONFIG_CONS_INDEX 1 -+#undef CONFIG_SERIAL_SOFTWARE_FIFO -+ -+/* -+ * Serial console configuration -+ */ -+#define CONFIG_PSC_CONSOLE 3 /* console is on PSC3 */ -+#if CONFIG_PSC_CONSOLE != 3 -+#error CONFIG_PSC_CONSOLE must be 3 -+#endif -+#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */ -+#define CONFIG_SYS_BAUDRATE_TABLE \ -+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200} -+ -+#define CONSOLE_FIFO_TX_SIZE FIFOC_PSC3_TX_SIZE -+#define CONSOLE_FIFO_TX_ADDR FIFOC_PSC3_TX_ADDR -+#define CONSOLE_FIFO_RX_SIZE FIFOC_PSC3_RX_SIZE -+#define CONSOLE_FIFO_RX_ADDR FIFOC_PSC3_RX_ADDR -+ -+#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ -+/* Use the HUSH parser */ -+#define CONFIG_SYS_HUSH_PARSER -+#ifdef CONFIG_SYS_HUSH_PARSER -+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -+#endif -+ -+/* -+ * PCI -+ */ -+#ifdef CONFIG_PCI -+ -+/* -+ * General PCI -+ */ -+#define CONFIG_SYS_PCI_MEM_BASE 0xA0000000 -+#define CONFIG_SYS_PCI_MEM_PHYS CONFIG_SYS_PCI_MEM_BASE -+#define CONFIG_SYS_PCI_MEM_SIZE 0x10000000 /* 256M */ -+#define CONFIG_SYS_PCI_MMIO_BASE (CONFIG_SYS_PCI_MEM_BASE + CONFIG_SYS_PCI_MEM_SIZE) -+#define CONFIG_SYS_PCI_MMIO_PHYS CONFIG_SYS_PCI_MMIO_BASE -+#define CONFIG_SYS_PCI_MMIO_SIZE 0x10000000 /* 256M */ -+#define CONFIG_SYS_PCI_IO_BASE 0x00000000 -+#define CONFIG_SYS_PCI_IO_PHYS 0x84000000 -+#define CONFIG_SYS_PCI_IO_SIZE 0x01000000 /* 16M */ -+ -+ -+#define CONFIG_PCI_PNP /* do pci plug-and-play */ -+ -+#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -+ -+#endif -+ -+/* I2C */ -+#define CONFIG_HARD_I2C /* I2C with hardware support */ -+#undef CONFIG_SOFT_I2C /* so disable bit-banged I2C */ -+#define CONFIG_I2C_MULTI_BUS -+#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ -+#define CONFIG_SYS_I2C_SLAVE 0x7F -+#if 0 -+#define CONFIG_SYS_I2C_NOPROBES {{0,0x69}} /* Don't probe these addrs */ -+#endif -+ -+/* -+ * IIM - IC Identification Module -+ */ -+#undef CONFIG_IIM -+ -+/* -+ * EEPROM configuration -+ */ -+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* 16-bit EEPROM address */ -+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Atmel: AT24C32A-10TQ-2.7 */ -+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10ms of delay */ -+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* 32-Byte Page Write Mode */ -+ -+/* -+ * Ethernet configuration -+ */ -+#define CONFIG_MPC512x_FEC 1 -+#define CONFIG_NET_MULTI -+#define CONFIG_PHY_ADDR 0x1 -+#define CONFIG_MII 1 /* MII PHY management */ -+#define CONFIG_FEC_AN_TIMEOUT 1 -+#define CONFIG_HAS_ETH0 -+ -+/* -+ * Configure on-board RTC -+ */ -+#define CONFIG_RTC_M41T62 /* use M41T62 rtc via i2 */ -+#define CONFIG_SYS_I2C_RTC_ADDR 0x68 /* at address 0x68 */ -+ -+/* -+ * Environment -+ */ -+#define CONFIG_ENV_IS_IN_FLASH 1 -+/* This has to be a multiple of the Flash sector size */ -+#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) -+#define CONFIG_ENV_SIZE 0x2000 -+#ifdef CONFIG_BKUP_FLASH -+#define CONFIG_ENV_SECT_SIZE 0x20000 /* one sector (256K) for env */ -+#else -+#define CONFIG_ENV_SECT_SIZE 0x40000 /* one sector (256K) for env */ -+#endif -+ -+/* Address and size of Redundant Environment Sector */ -+#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) -+#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) -+ -+#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ -+#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ -+ -+#include -+ -+#define CONFIG_CMD_ASKENV -+#define CONFIG_CMD_DHCP -+#define CONFIG_CMD_I2C -+#define CONFIG_CMD_MII -+#define CONFIG_CMD_NFS -+#define CONFIG_CMD_PING -+#define CONFIG_CMD_REGINFO -+#define CONFIG_CMD_EEPROM -+#define CONFIG_CMD_DATE -+#undef CONFIG_CMD_FUSE -+#define CONFIG_CMD_IDE -+#define CONFIG_CMD_EXT2 -+ -+#if defined(CONFIG_PCI) -+#define CONFIG_CMD_PCI -+#endif -+ -+#if defined(CONFIG_CMD_IDE) -+#define CONFIG_DOS_PARTITION -+#define CONFIG_MAC_PARTITION -+#define CONFIG_ISO_PARTITION -+#endif /* defined(CONFIG_CMD_IDE) */ -+ -+/* -+ * Watchdog timeout = CONFIG_SYS_WATCHDOG_VALUE * 65536 / IPS clock. -+ * For example, when IPS is set to 66MHz and CONFIG_SYS_WATCHDOG_VALUE is set -+ * to 0xFFFF, watchdog timeouts after about 64s. For details refer -+ * to chapter 36 of the MPC5121e Reference Manual. -+ */ -+/* #define CONFIG_WATCHDOG */ /* enable watchdog */ -+#define CONFIG_SYS_WATCHDOG_VALUE 0xFFFF -+ -+ /* -+ * Miscellaneous configurable options -+ */ -+#define CONFIG_SYS_LONGHELP /* undef to save memory */ -+#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ -+#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ -+ -+#ifdef CONFIG_CMD_KGDB -+ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -+#else -+ #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -+#endif -+ -+ -+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buffer Size */ -+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ -+#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */ -+ -+/* -+ * For booting Linux, the board info and command line data -+ * have to be in the first 8 MB of memory, since this is -+ * the maximum mapped by the Linux kernel during initialization. -+ */ -+#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ -+ -+/* Cache Configuration */ -+#define CONFIG_SYS_DCACHE_SIZE 32768 -+#define CONFIG_SYS_CACHELINE_SIZE 32 -+#ifdef CONFIG_CMD_KGDB -+#define CONFIG_SYS_CACHELINE_SHIFT 5 /*log base 2 of the above value*/ -+#endif -+ -+#define CONFIG_SYS_HID0_INIT 0x000000000 -+#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | HID0_ICE) -+#define CONFIG_SYS_HID2 HID2_HBE -+ -+#define CONFIG_HIGH_BATS 1 /* High BATs supported */ -+ -+/* -+ * Internal Definitions -+ * -+ * Boot Flags -+ */ -+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -+#define BOOTFLAG_WARM 0x02 /* Software reboot */ -+ -+#ifdef CONFIG_CMD_KGDB -+#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ -+#endif -+ -+/* -+ * Environment Configuration -+ */ -+#define CONFIG_TIMESTAMP -+ -+#define CONFIG_HOSTNAME mpc5121ads -+#define CONFIG_BOOTFILE mpc5121ads/uImage -+#define CONFIG_ROOTPATH /opt/eldk/ppc_6xx -+ -+#define CONFIG_LOADADDR 400000 /* default location for tftp and bootm */ -+ -+#define CONFIG_BOOTDELAY 5 /* -1 disables auto-boot */ -+#undef CONFIG_BOOTARGS /* the boot command will set bootargs */ -+ -+#define CONFIG_BAUDRATE 115200 -+ -+#define CONFIG_PREBOOT "echo;" \ -+ "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \ -+ "echo" -+ -+#define CONFIG_EXTRA_ENV_SETTINGS \ -+ "u-boot_addr_r=200000\0" \ -+ "kernel_addr_r=600000\0" \ -+ "fdt_addr_r=880000\0" \ -+ "ramdisk_addr_r=900000\0" \ -+ "u-boot_addr=FFF00000\0" \ -+ "kernel_addr=FFC40000\0" \ -+ "fdt_addr=FFEC0000\0" \ -+ "ramdisk_addr=FC040000\0" \ -+ "ramdiskfile=mpc5121ads/uRamdisk\0" \ -+ "u-boot=mpc5121ads/u-boot.bin\0" \ -+ "bootfile=mpc5121ads/uImage\0" \ -+ "fdtfile=mpc5121ads/mpc5121ads.dtb\0" \ -+ "rootpath=/opt/eldk/ppc_6xx\n" \ -+ "netdev=eth0\0" \ -+ "consdev=ttyPSC0\0" \ -+ "nfsargs=setenv bootargs root=/dev/nfs rw " \ -+ "nfsroot=${serverip}:${rootpath}\0" \ -+ "ramargs=setenv bootargs root=/dev/ram rw\0" \ -+ "addip=setenv bootargs ${bootargs} " \ -+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ -+ ":${hostname}:${netdev}:off panic=1\0" \ -+ "addtty=setenv bootargs ${bootargs} " \ -+ "console=${consdev},${baudrate}\0" \ -+ "flash_nfs=run nfsargs addip addtty;" \ -+ "bootm ${kernel_addr} - ${fdt_addr}\0" \ -+ "flash_self=run ramargs addip addtty;" \ -+ "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ -+ "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \ -+ "tftp ${fdt_addr_r} ${fdtfile};" \ -+ "run nfsargs addip addtty;" \ -+ "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ -+ "net_self=tftp ${kernel_addr_r} ${bootfile};" \ -+ "tftp ${ramdisk_addr_r} ${ramdiskfile};" \ -+ "tftp ${fdt_addr_r} ${fdtfile};" \ -+ "run ramargs addip addtty;" \ -+ "bootm ${kernel_addr_r} ${ramdisk_addr_r} ${fdt_addr_r}\0"\ -+ "load=tftp ${u-boot_addr_r} ${u-boot}\0" \ -+ "update=protect off ${u-boot_addr} +${filesize};" \ -+ "era ${u-boot_addr} +${filesize};" \ -+ "cp.b ${u-boot_addr_r} ${u-boot_addr} ${filesize}\0" \ -+ "upd=run load update\0" \ -+ "" -+ -+#define CONFIG_BOOTCOMMAND "run flash_self" -+ -+#define CONFIG_OF_LIBFDT 1 -+#define CONFIG_OF_BOARD_SETUP 1 -+#define CONFIG_OF_SUPPORT_OLD_DEVICE_TREES 1 -+ -+#define OF_CPU "PowerPC,5121@0" -+#define OF_SOC_COMPAT "fsl,mpc5121-immr" -+#define OF_TBCLK (bd->bi_busfreq / 4) -+#define OF_STDOUT_PATH "/soc@80000000/serial@11300" -+ -+/*----------------------------------------------------------------------- -+ * IDE/ATA stuff -+ *----------------------------------------------------------------------- -+ */ -+ -+#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */ -+#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ -+#undef CONFIG_IDE_LED /* LED for IDE not supported */ -+ -+#define CONFIG_IDE_RESET /* reset for IDE supported */ -+#define CONFIG_IDE_PREINIT -+ -+#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */ -+#define CONFIG_SYS_IDE_MAXDEVICE 2 /* max. 1 drive per IDE bus */ -+ -+#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000 -+#define CONFIG_SYS_ATA_BASE_ADDR get_pata_base() -+ -+/* Offset for data I/O RefMan MPC5121EE Table 28-10 */ -+#define CONFIG_SYS_ATA_DATA_OFFSET (0x00A0) -+ -+/* Offset for normal register accesses */ -+#define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET) -+ -+/* Offset for alternate registers RefMan MPC5121EE Table 28-23 */ -+#define CONFIG_SYS_ATA_ALT_OFFSET (0x00D8) -+ -+/* Interval between registers */ -+#define CONFIG_SYS_ATA_STRIDE 4 -+ -+#define ATA_BASE_ADDR get_pata_base() -+ -+/* -+ * Control register bit definitions -+ */ -+#define FSL_ATA_CTRL_FIFO_RST_B 0x80000000 -+#define FSL_ATA_CTRL_ATA_RST_B 0x40000000 -+#define FSL_ATA_CTRL_FIFO_TX_EN 0x20000000 -+#define FSL_ATA_CTRL_FIFO_RCV_EN 0x10000000 -+#define FSL_ATA_CTRL_DMA_PENDING 0x08000000 -+#define FSL_ATA_CTRL_DMA_ULTRA 0x04000000 -+#define FSL_ATA_CTRL_DMA_WRITE 0x02000000 -+#define FSL_ATA_CTRL_IORDY_EN 0x01000000 -+ -+#endif /* __CONFIG_H */ -diff --git a/include/configs/mpc7448hpc2.h b/include/configs/mpc7448hpc2.h -index a1783b2..7d42155 100644 ---- a/include/configs/mpc7448hpc2.h -+++ b/include/configs/mpc7448hpc2.h -@@ -179,6 +179,7 @@ - */ - #define CONFIG_VERSION_VARIABLE 1 - #define CONFIG_TSI108_I2C -+#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed */ - - #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* I2C EEPROM page 1 */ - #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ -diff --git a/include/configs/mx1fs2.h b/include/configs/mx1fs2.h -index 24fa144..90a8d84 100644 ---- a/include/configs/mx1fs2.h -+++ b/include/configs/mx1fs2.h -@@ -183,6 +183,8 @@ - /* mtdparts command line support */ - /* Note: fake mtd_id used, no linux mtd map file */ - #define CONFIG_CMD_MTDPARTS -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -+#define CONFIG_FLASH_CFI_MTD - #define MTDIDS_DEFAULT "nor0=mx1fs2-0" - - #ifdef BUS32BIT_VERSION -diff --git a/include/configs/netstal-common.h b/include/configs/netstal-common.h -index 4d5c1ab..4bed7ae 100644 ---- a/include/configs/netstal-common.h -+++ b/include/configs/netstal-common.h -@@ -61,8 +61,8 @@ - #define CONFIG_PPC4xx_EMAC - #define CONFIG_MII /* MII PHY management */ - #define CONFIG_PHY_ADDR 1 /* PHY address */ --#if defined(CONFIG_440) - #define CONFIG_NET_MULTI 1 -+#if defined(CONFIG_440) - #define CONFIG_NETCONSOLE /* include NetConsole support */ - #define CONFIG_SYS_RX_ETH_BUFFER 32 /* number of eth rx buffers */ - #else -diff --git a/include/configs/netstar.h b/include/configs/netstar.h -index 5cfee66..5062cdb 100644 ---- a/include/configs/netstar.h -+++ b/include/configs/netstar.h -@@ -130,6 +130,8 @@ - * partitions (mtdparts command line support) - */ - #define CONFIG_CMD_MTDPARTS -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -+#define CONFIG_FLASH_CFI_MTD - #define MTDIDS_DEFAULT "nor0=omapflash.0,nand0=omapnand.0" - #define MTDPARTS_DEFAULT "mtdparts=" \ - "omapflash.0:8k@16k(env),8k(r_env),448k@576k(u-boot);" \ -diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h -index a3d9cf6..c2bd7e6 100644 ---- a/include/configs/omap3_beagle.h -+++ b/include/configs/omap3_beagle.h -@@ -105,6 +105,7 @@ - #define CONFIG_CMD_FAT /* FAT support */ - #define CONFIG_CMD_JFFS2 /* JFFS2 Support */ - #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ - #define MTDIDS_DEFAULT "nand0=nand" - #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ - "1920k(u-boot),128k(u-boot-env),"\ -diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h -index 549cef9..e205c01 100644 ---- a/include/configs/omap3_evm.h -+++ b/include/configs/omap3_evm.h -@@ -149,6 +149,8 @@ - /* Environment information */ - #define CONFIG_BOOTDELAY 10 - -+#define CONFIG_BOOTFILE uImage -+ - #define CONFIG_EXTRA_ENV_SETTINGS \ - "loadaddr=0x82000000\0" \ - "console=ttyS2,115200n8\0" \ -diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h -index 50c05dc..9e000ed 100644 ---- a/include/configs/omap3_zoom1.h -+++ b/include/configs/omap3_zoom1.h -@@ -138,19 +138,6 @@ - - #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ - /* devices */ --#define SECTORSIZE 512 -- --#define NAND_ALLOW_ERASE_ALL --#define ADDR_COLUMN 1 --#define ADDR_PAGE 2 --#define ADDR_COLUMN_PAGE 3 -- --#define NAND_ChipID_UNKNOWN 0x00 --#define NAND_MAX_FLOORS 1 --#define NAND_MAX_CHIPS 1 --#define NAND_NO_RB 1 --#define CONFIG_SYS_NAND_WP -- - #define CONFIG_JFFS2_NAND - /* nand device jffs2 lives on */ - #define CONFIG_JFFS2_DEV "nand0" -diff --git a/include/configs/omap3_zoom2.h b/include/configs/omap3_zoom2.h -new file mode 100644 -index 0000000..c2ad5bf ---- /dev/null -+++ b/include/configs/omap3_zoom2.h -@@ -0,0 +1,256 @@ -+/* -+ * (C) Copyright 2006-2009 -+ * Texas Instruments. -+ * Richard Woodruff -+ * Syed Mohammed Khasim -+ * Nishanth Menon -+ * Tom Rix -+ * -+ * Configuration settings for the TI OMAP3430 Zoom II board. -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#ifndef __CONFIG_H -+#define __CONFIG_H -+#include -+ -+/* -+ * High Level Configuration Options -+ */ -+#define CONFIG_ARMCORTEXA8 1 /* This is an ARM V7 CPU core */ -+#define CONFIG_OMAP 1 /* in a TI OMAP core */ -+#define CONFIG_OMAP34XX 1 /* which is a 34XX */ -+#define CONFIG_OMAP3430 1 /* which is in a 3430 */ -+#define CONFIG_OMAP3_ZOOM2 1 /* working with Zoom II */ -+ -+#include /* get chip and board defs */ -+#include -+ -+/* -+ * Display CPU and Board information -+ */ -+#define CONFIG_DISPLAY_CPUINFO 1 -+#define CONFIG_DISPLAY_BOARDINFO 1 -+ -+/* Clock Defines */ -+#define V_OSCK 26000000 /* Clock output from T2 */ -+#define V_SCLK (V_OSCK >> 1) -+ -+#undef CONFIG_USE_IRQ /* no support for IRQs */ -+#define CONFIG_MISC_INIT_R -+ -+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -+#define CONFIG_SETUP_MEMORY_TAGS 1 -+#define CONFIG_INITRD_TAG 1 -+#define CONFIG_REVISION_TAG 1 -+ -+/* -+ * Size of malloc() pool -+ */ -+#define CONFIG_ENV_SIZE SZ_128K /* Total Size Environment */ -+ /* Sector */ -+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_128K) -+#define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for */ -+ /* initial data */ -+/* -+ * Hardware drivers -+ */ -+ -+/* -+ * NS16550 Configuration -+ * Zoom2 uses the TL16CP754C on the debug board -+ */ -+#define CONFIG_SERIAL_MULTI 1 -+/* -+ * 0 - 1 : first USB with respect to the left edge of the debug board -+ * 2 - 3 : second USB with respect to the left edge of the debug board -+ */ -+#define ZOOM2_DEFAULT_SERIAL_DEVICE (&zoom2_serial_device0) -+ -+#define V_NS16550_CLK (1843200) /* 1.8432 Mhz */ -+ -+#define CONFIG_SYS_NS16550 -+#define CONFIG_SYS_NS16550_REG_SIZE (-2) -+#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK -+#define CONFIG_BAUDRATE 115200 -+#define CONFIG_SYS_BAUDRATE_TABLE {115200} -+ -+/* allow to overwrite serial and ethaddr */ -+#define CONFIG_ENV_OVERWRITE -+ -+#define CONFIG_MMC 1 -+#define CONFIG_OMAP3_MMC 1 -+#define CONFIG_DOS_PARTITION 1 -+ -+/* Status LED */ -+#define CONFIG_STATUS_LED 1 /* Status LED enabled */ -+#define CONFIG_BOARD_SPECIFIC_LED 1 -+#define STATUS_LED_BLUE 0 -+#define STATUS_LED_RED 1 -+/* Blue */ -+#define STATUS_LED_BIT STATUS_LED_BLUE -+#define STATUS_LED_STATE STATUS_LED_ON -+#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) -+/* Red */ -+#define STATUS_LED_BIT1 STATUS_LED_RED -+#define STATUS_LED_STATE1 STATUS_LED_OFF -+#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2) -+/* Optional value */ -+#define STATUS_LED_BOOT STATUS_LED_BIT -+ -+/* GPIO banks */ -+#ifdef CONFIG_STATUS_LED -+#define CONFIG_OMAP3_GPIO_2 /* ZOOM2_LED_BLUE2 */ -+#define CONFIG_OMAP3_GPIO_6 /* ZOOM2_LED_RED */ -+#endif -+#define CONFIG_OMAP3_GPIO_3 /* board revision */ -+#define CONFIG_OMAP3_GPIO_5 /* debug board detection, ZOOM2_LED_BLUE */ -+ -+/* commands to include */ -+#include -+ -+#define CONFIG_CMD_FAT /* FAT support */ -+#define CONFIG_CMD_I2C /* I2C serial bus support */ -+#define CONFIG_CMD_MMC /* MMC support */ -+#define CONFIG_CMD_NAND /* NAND support */ -+#define CONFIG_CMD_NAND_LOCK_UNLOCK /* Enable lock/unlock support */ -+ -+#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ -+#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ -+#undef CONFIG_CMD_IMI /* iminfo */ -+#undef CONFIG_CMD_IMLS /* List all found images */ -+#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ -+#undef CONFIG_CMD_NFS /* NFS support */ -+ -+#define CONFIG_SYS_NO_FLASH -+#define CONFIG_SYS_I2C_SPEED 100000 -+#define CONFIG_SYS_I2C_SLAVE 1 -+#define CONFIG_SYS_I2C_BUS 0 -+#define CONFIG_SYS_I2C_BUS_SELECT 1 -+#define CONFIG_DRIVER_OMAP34XX_I2C 1 -+ -+/* -+ * Board NAND Info. -+ */ -+#define CONFIG_NAND_OMAP_GPMC -+#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ -+ /* to access nand */ -+#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ -+ /* to access nand at */ -+ /* CS0 */ -+#define GPMC_NAND_ECC_LP_x16_LAYOUT 1 -+#define CONFIG_SYS_MAX_NAND_DEVICE 1 -+ -+/* Environment information */ -+#define CONFIG_BOOTDELAY 10 -+ -+/* -+ * Miscellaneous configurable options -+ */ -+ -+#define CONFIG_SYS_PROMPT "OMAP3 Zoom2 # " -+#define CONFIG_SYS_LONGHELP -+#define CONFIG_SYS_CBSIZE 256 -+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ -+ sizeof(CONFIG_SYS_PROMPT) + 16) -+#define CONFIG_SYS_MAXARGS 16 -+#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) -+/* Memtest from start of memory to 31MB */ -+#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) -+#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + 0x01F00000) -+/* The default load address is the start of memory */ -+#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) -+/* everything, incl board info, in Hz */ -+#undef CONFIG_SYS_CLKS_IN_HZ -+/* -+ * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by -+ * 32KHz clk, or from external sig. This rate is divided by a local divisor. -+ */ -+#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -+#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */ -+#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV)) -+ -+/*----------------------------------------------------------------------- -+ * Stack sizes -+ * -+ * The stack sizes are set up in start.S using these settings -+ */ -+#define CONFIG_STACKSIZE SZ_128K -+#ifdef CONFIG_USE_IRQ -+#define CONFIG_STACKSIZE_IRQ SZ_4K -+#define CONFIG_STACKSIZE_FIQ SZ_4K -+#endif -+ -+/*----------------------------------------------------------------------- -+ * Physical Memory Map -+ */ -+#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ -+#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 -+#define PHYS_SDRAM_1_SIZE SZ_32M /* at least 32 meg */ -+#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 -+ -+/* SDRAM Bank Allocation method */ -+#define SDRC_R_B_C 1 -+ -+/*----------------------------------------------------------------------- -+ * FLASH and environment organization -+ */ -+ -+/* **** PISMO SUPPORT *** */ -+ -+/* Configure the PISMO */ -+#define PISMO1_NAND_SIZE GPMC_SIZE_128M -+#define PISMO1_ONEN_SIZE GPMC_SIZE_128M -+ -+#define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors on */ -+ /* one chip */ -+#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */ -+#define CONFIG_SYS_MONITOR_LEN SZ_256K /* Reserve 2 sectors */ -+ -+#define CONFIG_SYS_FLASH_BASE boot_flash_base -+ -+/* Monitor at start of flash */ -+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -+ -+#define CONFIG_ENV_IS_IN_NAND 1 -+#define SMNAND_ENV_OFFSET 0x0c0000 /* environment starts here */ -+ -+#define CONFIG_SYS_ENV_SECT_SIZE boot_flash_sec -+#define CONFIG_ENV_OFFSET boot_flash_off -+#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET -+ -+/*----------------------------------------------------------------------- -+ * CFI FLASH driver setup -+ */ -+/* timeout values are in ticks */ -+#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) -+#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) -+ -+#ifndef __ASSEMBLY__ -+extern gpmc_csx_t *nand_cs_base; -+extern gpmc_t *gpmc_cfg_base; -+extern unsigned int boot_flash_base; -+extern volatile unsigned int boot_flash_env_addr; -+extern unsigned int boot_flash_off; -+extern unsigned int boot_flash_sec; -+extern unsigned int boot_flash_type; -+#endif -+ -+#endif /* __CONFIG_H */ -diff --git a/include/configs/pdnb3.h b/include/configs/pdnb3.h -index edaa81b..1255f21 100644 ---- a/include/configs/pdnb3.h -+++ b/include/configs/pdnb3.h -@@ -51,6 +51,7 @@ - * Misc configuration options - */ - #define CONFIG_USE_IRQ 1 /* we need IRQ stuff for timer */ -+#define CONFIG_TIMER_IRQ - - #define CONFIG_BOOTCOUNT_LIMIT /* support for bootcount limit */ - #define CONFIG_SYS_BOOTCOUNT_ADDR 0x60003000 /* inside qmrg sram */ -diff --git a/include/configs/pleb2.h b/include/configs/pleb2.h -index ed873fa..635ef71 100644 ---- a/include/configs/pleb2.h -+++ b/include/configs/pleb2.h -@@ -62,6 +62,7 @@ - /* - * select serial console configuration - */ -+#define CONFIG_PXA_SERIAL - #define CONFIG_FFUART 1 /* we use FFUART on PLEB 2 */ - - /* allow to overwrite serial and ethaddr */ -diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h -index 0db17b3..f0dbe81 100644 ---- a/include/configs/pm9263.h -+++ b/include/configs/pm9263.h -@@ -29,8 +29,7 @@ - #define __CONFIG_H - - /* ARM asynchronous clock */ --#define AT91_CPU_NAME "AT91SAM9263" -- -+#define CONFIG_DISPLAY_CPUINFO - #define CONFIG_DISPLAY_BOARDINFO - - #define MASTER_PLL_DIV 15 -diff --git a/include/configs/pxa255_idp.h b/include/configs/pxa255_idp.h -index 7485f72..2cae8ca 100644 ---- a/include/configs/pxa255_idp.h -+++ b/include/configs/pxa255_idp.h -@@ -100,6 +100,7 @@ - /* - * select serial console configuration - */ -+#define CONFIG_PXA_SERIAL - #define CONFIG_FFUART 1 /* we use FFUART on LUBBOCK */ - - /* allow to overwrite serial and ethaddr */ diff --git a/include/configs/qi_lb60.h b/include/configs/qi_lb60.h new file mode 100644 index 0000000..68a2e87 @@ -66662,372 +13851,6 @@ index 0000000..68a2e87 +/*#define GPIO_SD_WP 112 SD Card wirte protect */ + +#endif /* __CONFIG_H */ -diff --git a/include/configs/qong.h b/include/configs/qong.h -index a67006a..7e67185 100644 ---- a/include/configs/qong.h -+++ b/include/configs/qong.h -@@ -213,6 +213,8 @@ - * JFFS2 partitions - */ - #define CONFIG_CMD_MTDPARTS -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -+#define CONFIG_FLASH_CFI_MTD - #define MTDIDS_DEFAULT "nor0=physmap-flash.0" - #define MTDPARTS_DEFAULT \ - "mtdparts=physmap-flash.0:256k(U-Boot),128k(env1)," \ -diff --git a/include/configs/sacsng.h b/include/configs/sacsng.h -index f4e08c6..0ab6fc3 100644 ---- a/include/configs/sacsng.h -+++ b/include/configs/sacsng.h -@@ -408,9 +408,9 @@ - "echo hostname ${hostname}\0" \ - "ana=run adc ; run dac\0" \ - "adc=run adc-12 ; run adc-34\0" \ --"adc-12=echo ### ADC-12 ; imd.b e 81 e\0" \ --"adc-34=echo ### ADC-34 ; imd.b f 81 e\0" \ --"dac=echo ### DAC ; imd.b 11 81 5\0" \ -+"adc-12=echo ### ADC-12 ; i2c md e 81 e\0" \ -+"adc-34=echo ### ADC-34 ; i2c md f 81 e\0" \ -+"dac=echo ### DAC ; i2c md 11 81 5\0" \ - "boot-hook=echo\0" - - /* What should the console's baud rate be? */ -diff --git a/include/configs/sbc405.h b/include/configs/sbc405.h -index 7197aaf..242f42f 100644 ---- a/include/configs/sbc405.h -+++ b/include/configs/sbc405.h -@@ -62,6 +62,7 @@ - #define CONFIG_MII 1 /* MII PHY management */ - #define CONFIG_PHY_ADDR 0 /* PHY address */ - #define CONFIG_PHY_RESET_DELAY 300 /* Intel LXT971A needs this */ -+#define CONFIG_NET_MULTI - - #define CONFIG_EXTRA_ENV_SETTINGS \ - "bootargs=emac(0,0)host:/T221ppc/target/config/sbc405/vxWorks.st " \ -diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h -index edd928d..84a251a 100644 ---- a/include/configs/sbc8349.h -+++ b/include/configs/sbc8349.h -@@ -35,8 +35,8 @@ - * High Level Configuration Options - */ - #define CONFIG_E300 1 /* E300 Family */ --#define CONFIG_MPC83XX 1 /* MPC83XX family */ --#define CONFIG_MPC834X 1 /* MPC834X family */ -+#define CONFIG_MPC83xx 1 /* MPC83xx family */ -+#define CONFIG_MPC834x 1 /* MPC834x family */ - #define CONFIG_MPC8349 1 /* MPC8349 specific */ - #define CONFIG_SBC8349 1 /* WRS SBC8349 board specific */ - -@@ -279,7 +279,6 @@ - #define CONFIG_HARD_I2C /* I2C with hardware support*/ - #undef CONFIG_SOFT_I2C /* I2C bit-banged */ - #define CONFIG_FSL_I2C --#define CONFIG_I2C_CMD_TREE - #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ - #define CONFIG_SYS_I2C_SLAVE 0x7F - #define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */ -diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h -index fa226b2..89acacc 100644 ---- a/include/configs/sequoia.h -+++ b/include/configs/sequoia.h -@@ -112,13 +112,26 @@ - /* - * Environment - */ --#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) --#define CONFIG_ENV_IS_IN_FLASH 1 /* use FLASH for environ vars */ -+#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL) -+#define CONFIG_ENV_IS_IN_NAND /* use NAND for environ vars */ -+#define CONFIG_ENV_IS_EMBEDDED /* use embedded environment */ -+#elif defined(CONFIG_SYS_RAMBOOT) -+#define CONFIG_ENV_IS_NOWHERE /* Store env in memory only */ -+#define CONFIG_ENV_SIZE (8 << 10) -+/* -+ * In RAM-booting version, we have no environment storage. So we need to -+ * provide at least preliminary MAC addresses for the 4xx EMAC driver to -+ * register the interfaces. Those two addresses are generated via the -+ * tools/gen_eth_addr tool and should only be used in a closed laboratory -+ * environment. -+ */ -+#define CONFIG_ETHADDR 4a:56:49:22:3e:43 -+#define CONFIG_ETH1ADDR 02:93:53:d5:06:98 - #else --#define CONFIG_ENV_IS_IN_NAND 1 /* use NAND for environ vars */ --#define CONFIG_ENV_IS_EMBEDDED 1 /* use embedded environment */ -+#define CONFIG_ENV_IS_IN_FLASH /* use FLASH for environ vars */ - #endif - -+#if defined(CONFIG_CMD_FLASH) - /* - * FLASH related - */ -@@ -148,6 +161,7 @@ - #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE) - #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) - #endif -+#endif /* CONFIG_CMD_FLASH */ - - /* - * IPL (Initial Program Loader, integrated inside CPU) -@@ -211,7 +225,8 @@ - * DDR SDRAM - */ - #define CONFIG_SYS_MBYTES_SDRAM (256) /* 256MB */ --#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) -+#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) && \ -+ !defined(CONFIG_SYS_RAMBOOT) - #define CONFIG_DDR_DATA_EYE /* use DDR2 optimization */ - #endif - #define CONFIG_SYS_MEM_TOP_HIDE (4 << 10) /* don't use last 4kbytes */ -@@ -306,7 +321,7 @@ - * overwrite part of the U-Boot image which is already loaded from NAND - * to SDRAM. - */ --#if defined(CONFIG_NAND_U_BOOT) -+#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_SYS_RAMBOOT) - #define CONFIG_SYS_POST_MEMORY_ON 0 - #else - #define CONFIG_SYS_POST_MEMORY_ON CONFIG_SYS_POST_MEMORY -@@ -354,7 +369,8 @@ - /* - * On Sequoia CS0 and CS3 are switched when configuring for NAND booting - */ --#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) -+#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) && \ -+ !defined(CONFIG_SYS_RAMBOOT) - #define CONFIG_SYS_NAND_CS 3 /* NAND chip connected to CSx */ - /* Memory Bank 0 (NOR-FLASH) initialization */ - #define CONFIG_SYS_EBC_PB0AP 0x03017200 -diff --git a/include/configs/smmaco4.h b/include/configs/smmaco4.h -index 35f3e3a..5a2ef3a 100644 ---- a/include/configs/smmaco4.h -+++ b/include/configs/smmaco4.h -@@ -215,6 +215,8 @@ - - /* Dynamic MTD partition support */ - #define CONFIG_CMD_MTDPARTS -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -+#define CONFIG_FLASH_CFI_MTD - #define MTDIDS_DEFAULT "nor0=TQM5200-0" - #define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \ - "1408k(kernel)," \ -diff --git a/include/configs/socrates.h b/include/configs/socrates.h -index becd13e..5b91b4d 100644 ---- a/include/configs/socrates.h -+++ b/include/configs/socrates.h -@@ -243,7 +243,6 @@ - #define CONFIG_SYS_I2C_OFFSET 0x3000 - - #define CONFIG_I2C_MULTI_BUS --#define CONFIG_I2C_CMD_TREE - #define CONFIG_SYS_I2C2_OFFSET 0x3100 - - /* I2C RTC */ -diff --git a/include/configs/taihu.h b/include/configs/taihu.h -index 8c48c66..836081d 100644 ---- a/include/configs/taihu.h -+++ b/include/configs/taihu.h -@@ -139,7 +139,7 @@ - */ - #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ - --#define CONFIG_SYS_I2C_NOPROBES { 0x69 } /* avoid iprobe hangup (why?) */ -+#define CONFIG_SYS_I2C_NOPROBES { 0x69 } /* avoid i2c probe hangup (why?) */ - #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 6 /* 24C02 requires 5ms delay */ - - #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* I2C boot EEPROM (24C02W) */ -diff --git a/include/configs/trab.h b/include/configs/trab.h -index 51ad3ca..7687ee6 100644 ---- a/include/configs/trab.h -+++ b/include/configs/trab.h -@@ -375,6 +375,8 @@ - - /* Dynamic MTD partition support */ - #define CONFIG_CMD_MTDPARTS -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -+#define CONFIG_FLASH_CFI_MTD - #define MTDIDS_DEFAULT "nor0=0" - - /* production flash layout */ -diff --git a/include/configs/trizepsiv.h b/include/configs/trizepsiv.h -index 4917318..49045fd 100644 ---- a/include/configs/trizepsiv.h -+++ b/include/configs/trizepsiv.h -@@ -65,6 +65,7 @@ - /* - * select serial console configuration - */ -+#define CONFIG_PXA_SERIAL - #define CONFIG_SERIAL_MULTI - #define CONFIG_FFUART 1 /* we use FFUART on Conxs */ - #define CONFIG_BTUART 1 /* we use BTUART on Conxs */ -diff --git a/include/configs/vct.h b/include/configs/vct.h -index fe67997..e72b504 100644 ---- a/include/configs/vct.h -+++ b/include/configs/vct.h -@@ -296,6 +296,7 @@ int vct_gpio_get(int pin); - #define CONFIG_CMD_JFFS2 - #define CONFIG_CMD_UBI - #define CONFIG_RBTREE -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ - #define CONFIG_MTD_PARTITIONS - #define CONFIG_CMD_MTDPARTS - -diff --git a/include/configs/virtlab2.h b/include/configs/virtlab2.h -index 021012d..9ebafcc 100644 ---- a/include/configs/virtlab2.h -+++ b/include/configs/virtlab2.h -@@ -226,6 +226,8 @@ - * Dynamic MTD partition support - */ - #define CONFIG_CMD_MTDPARTS -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -+#define CONFIG_FLASH_CFI_MTD - #define MTDIDS_DEFAULT "nor0=TQM8xxL-0" - - #define MTDPARTS_DEFAULT "mtdparts=TQM8xxL-0:256k(u-boot)," \ -diff --git a/include/configs/voiceblue.h b/include/configs/voiceblue.h -index aa8efaa..c9c3132 100644 ---- a/include/configs/voiceblue.h -+++ b/include/configs/voiceblue.h -@@ -190,6 +190,8 @@ - * JFFS2 partitions (mtdparts command line support) - */ - #define CONFIG_CMD_MTDPARTS -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -+#define CONFIG_FLASH_CFI_MTD - #define MTDIDS_DEFAULT "nor0=omapflash.0" - #define MTDPARTS_DEFAULT "mtdparts=omapflash.0:256k(u-boot),64k(env),64k(r_env),16192k(data0),-(data1)" - -diff --git a/include/configs/wepep250.h b/include/configs/wepep250.h -index 197ac0b..9a20cce 100644 ---- a/include/configs/wepep250.h -+++ b/include/configs/wepep250.h -@@ -33,6 +33,7 @@ - /* - * Select serial console configuration - */ -+#define CONFIG_PXA_SERIAL - #define CONFIG_BTUART 1 /* BTUART is default on WEP dev board */ - #define CONFIG_BAUDRATE 115200 - -diff --git a/include/configs/xaeniax.h b/include/configs/xaeniax.h -index 1632d29..83883f6 100644 ---- a/include/configs/xaeniax.h -+++ b/include/configs/xaeniax.h -@@ -55,6 +55,7 @@ - /* - * select serial console configuration - */ -+#define CONFIG_PXA_SERIAL - #define CONFIG_BTUART 1 /* we use BTUART on XAENIAX */ - - -diff --git a/include/configs/xilinx-ppc.h b/include/configs/xilinx-ppc.h -index e3ea84b..6efe342 100644 ---- a/include/configs/xilinx-ppc.h -+++ b/include/configs/xilinx-ppc.h -@@ -109,6 +109,8 @@ - #define CONFIG_SYS_FLASH_PROTECTION - #define CONFIG_CMD_JFFS2 - #define CONFIG_CMD_MTDPARTS -+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -+#define CONFIG_FLASH_CFI_MTD - #else - #define CONFIG_ENV_IS_NOWHERE - #define CONFIG_SYS_NO_FLASH -diff --git a/include/configs/xm250.h b/include/configs/xm250.h -index c8bdf31..f18701a 100644 ---- a/include/configs/xm250.h -+++ b/include/configs/xm250.h -@@ -77,6 +77,7 @@ - /* - * select serial console configuration - */ -+#define CONFIG_PXA_SERIAL - #define CONFIG_FFUART 1 /* we use FFUART */ - - /* allow to overwrite serial and ethaddr */ -diff --git a/include/configs/xsengine.h b/include/configs/xsengine.h -index 7e2abbf..2697cca 100644 ---- a/include/configs/xsengine.h -+++ b/include/configs/xsengine.h -@@ -99,6 +99,7 @@ - #define CONFIG_SMC_USE_32_BIT 1 - - /* select serial console configuration */ -+#define CONFIG_PXA_SERIAL - #define CONFIG_FFUART 1 - - /* allow to overwrite serial and ethaddr */ -diff --git a/include/configs/zylonite.h b/include/configs/zylonite.h -index 217636a..15c3708 100644 ---- a/include/configs/zylonite.h -+++ b/include/configs/zylonite.h -@@ -72,6 +72,7 @@ - /* - * select serial console configuration - */ -+#define CONFIG_PXA_SERIAL - #define CONFIG_FFUART 1 - - /* allow to overwrite serial and ethaddr */ -diff --git a/include/e500.h b/include/e500.h -index 4c5eeb7..84b580d 100644 ---- a/include/e500.h -+++ b/include/e500.h -@@ -18,6 +18,7 @@ typedef struct - unsigned long freqSystemBus; - unsigned long freqDDRBus; - unsigned long freqLocalBus; -+ unsigned long freqQE; - } MPC85xx_SYS_INFO; - - #endif /* _ASMLANGUAGE */ -diff --git a/include/fdt_support.h b/include/fdt_support.h -index 6062df9..16734c5 100644 ---- a/include/fdt_support.h -+++ b/include/fdt_support.h -@@ -59,7 +59,7 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd); - static inline void fdt_fixup_dr_usb(void *blob, bd_t *bd) {} - #endif /* CONFIG_HAS_FSL_DR_USB */ - --#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC83XX) -+#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC83xx) - void fdt_fixup_crypto_node(void *blob, int sec_rev); - #else - static inline void fdt_fixup_crypto_node(void *blob, int sec_rev) {} -diff --git a/include/i2c.h b/include/i2c.h -index f8a59a6..668e754 100644 ---- a/include/i2c.h -+++ b/include/i2c.h -@@ -78,16 +78,22 @@ - #endif - - #ifdef CONFIG_8xx --/* Set default values for the I2C bus speed and slave address on 8xx. In the -+/* Set default value for the I2C bus speed on 8xx. In the - * future, we'll define these in all 8xx board config files. - */ - #ifndef CONFIG_SYS_I2C_SPEED - #define CONFIG_SYS_I2C_SPEED 50000 - #endif -+#endif - -+/* -+ * Many boards/controllers/drivers don't support an I2C slave interface so -+ * provide a default slave address for them for use in common code. A real -+ * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does -+ * support a slave interface. -+ */ - #ifndef CONFIG_SYS_I2C_SLAVE --#define CONFIG_SYS_I2C_SLAVE 0xFE --#endif -+#define CONFIG_SYS_I2C_SLAVE 0xfe - #endif - - /* diff --git a/include/lcd.h b/include/lcd.h index f054cac..cc5d620 100644 --- a/include/lcd.h @@ -67138,1498 +13961,8 @@ index f054cac..cc5d620 100644 /************************************************************************/ #endif /* _LCD_H_ */ -diff --git a/include/linux/mtd/compat.h b/include/linux/mtd/compat.h -index 9036b74..f0c8464 100644 ---- a/include/linux/mtd/compat.h -+++ b/include/linux/mtd/compat.h -@@ -19,11 +19,15 @@ - - #define kmalloc(size, flags) malloc(size) - #define kzalloc(size, flags) calloc(size, 1) --#define vmalloc(size) malloc(size) --#define kfree(ptr) free(ptr) --#define vfree(ptr) free(ptr) -+#define vmalloc(size) malloc(size) -+#define kfree(ptr) free(ptr) -+#define vfree(ptr) free(ptr) - --#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) -+#define DECLARE_WAITQUEUE(...) do { } while (0) -+#define add_wait_queue(...) do { } while (0) -+#define remove_wait_queue(...) do { } while (0) -+ -+#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) - - /* - * ..and if you can't take the strict -diff --git a/include/linux/mtd/concat.h b/include/linux/mtd/concat.h -new file mode 100644 -index 0000000..e80c674 ---- /dev/null -+++ b/include/linux/mtd/concat.h -@@ -0,0 +1,21 @@ -+/* -+ * MTD device concatenation layer definitions -+ * -+ * (C) 2002 Robert Kaiser -+ * -+ * This code is GPL -+ */ -+ -+#ifndef MTD_CONCAT_H -+#define MTD_CONCAT_H -+ -+ -+struct mtd_info *mtd_concat_create( -+ struct mtd_info *subdev[], /* subdevices to concatenate */ -+ int num_devs, /* number of subdevices */ -+ const char *name); /* name for the new device */ -+ -+void mtd_concat_destroy(struct mtd_info *mtd); -+ -+#endif -+ -diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h -index 354e3a0..c884567 100644 ---- a/include/linux/mtd/mtd.h -+++ b/include/linux/mtd/mtd.h -@@ -8,6 +8,7 @@ - #define __MTD_MTD_H__ - - #include -+#include - #include - - #define MTD_CHAR_MAJOR 90 -@@ -20,6 +21,8 @@ - #define MTD_ERASE_DONE 0x08 - #define MTD_ERASE_FAILED 0x10 - -+#define MTD_FAIL_ADDR_UNKNOWN -1LL -+ - /* - * Enumeration for NAND/OneNAND flash chip state - */ -@@ -37,13 +40,13 @@ enum { - }; - - /* If the erase fails, fail_addr might indicate exactly which block failed. If -- fail_addr = 0xffffffff, the failure was not at the device level or was not -+ fail_addr = MTD_FAIL_ADDR_UNKNOWN, the failure was not at the device level or was not - specific to any particular block. */ - struct erase_info { - struct mtd_info *mtd; -- u_int32_t addr; -- u_int32_t len; -- u_int32_t fail_addr; -+ uint64_t addr; -+ uint64_t len; -+ uint64_t fail_addr; - u_long time; - u_long retries; - u_int dev; -@@ -55,7 +58,7 @@ struct erase_info { - }; - - struct mtd_erase_region_info { -- u_int32_t offset; /* At which this region starts, from the beginning of the MTD */ -+ uint64_t offset; /* At which this region starts, from the beginning of the MTD */ - u_int32_t erasesize; /* For this region */ - u_int32_t numblocks; /* Number of blocks of erasesize in this region */ - unsigned long *lockmap; /* If keeping bitmap of locks */ -@@ -110,7 +113,7 @@ struct mtd_oob_ops { - struct mtd_info { - u_char type; - u_int32_t flags; -- u_int32_t size; /* Total size of the MTD */ -+ uint64_t size; // Total size of the MTD - - /* "Major" erase size for the device. Naïve users may take this - * to be the only erase size available, or may use the more detailed -@@ -202,8 +205,8 @@ struct mtd_info { - void (*sync) (struct mtd_info *mtd); - - /* Chip-supported device locking */ -- int (*lock) (struct mtd_info *mtd, loff_t ofs, size_t len); -- int (*unlock) (struct mtd_info *mtd, loff_t ofs, size_t len); -+ int (*lock) (struct mtd_info *mtd, loff_t ofs, uint64_t len); -+ int (*unlock) (struct mtd_info *mtd, loff_t ofs, uint64_t len); - - /* Power Management functions */ - int (*suspend) (struct mtd_info *mtd); -@@ -236,6 +239,16 @@ struct mtd_info { - void (*put_device) (struct mtd_info *mtd); - }; - -+static inline uint32_t mtd_div_by_eb(uint64_t sz, struct mtd_info *mtd) -+{ -+ do_div(sz, mtd->erasesize); -+ return sz; -+} -+ -+static inline uint32_t mtd_mod_by_eb(uint64_t sz, struct mtd_info *mtd) -+{ -+ return do_div(sz, mtd->erasesize); -+} - - /* Kernel-side ioctl definitions */ - -diff --git a/include/mpc512x.h b/include/mpc512x.h -deleted file mode 100644 -index 0f02293..0000000 ---- a/include/mpc512x.h -+++ /dev/null -@@ -1,702 +0,0 @@ --/* -- * Copyright (C) 2004-2006 Freescale Semiconductor, Inc. -- * (C) Copyright 2007 DENX Software Engineering -- * -- * See file CREDITS for list of people who contributed to this -- * project. -- * -- * This program is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of -- * the License, or (at your option) any later version. -- * -- * Derived from the MPC83xx header. -- */ -- --#ifndef __MPC512X_H__ --#define __MPC512X_H__ -- --#include --#if defined(CONFIG_E300) --#include --#endif -- --/* System reset offset (PowerPC standard) -- */ --#define EXC_OFF_SYS_RESET 0x0100 --#define _START_OFFSET EXC_OFF_SYS_RESET -- -- --/* IMMRBAR - Internal Memory Register Base Address -- */ --#define CONFIG_DEFAULT_IMMR 0xFF400000 /* Default IMMR base address */ --#define IMMRBAR 0x0000 /* Register offset to immr */ --#define IMMRBAR_BASE_ADDR 0xFFF00000 /* Base address mask */ --#define IMMRBAR_RES ~(IMMRBAR_BASE_ADDR) -- --/* LAWBAR - Local Access Window Base Address Register -- */ --#define LPBAW 0x0020 /* Register offset to immr */ --#define LPCS0AW 0x0024 --#define LPCS1AW 0x0028 --#define LPCS2AW 0x002C --#define LPCS3AW 0x0030 --#define LPCS4AW 0x0034 --#define LPCS5AW 0x0038 --#define LPCS6AW 0x003C --#define LPCA7AW 0x0040 --#define SRAMBAR 0x00C4 --#define LAWBAR_BAR 0xFFFFF000 /* Base address mask */ -- --#define LPC_OFFSET 0x10000 -- --#define CS0_CONFIG 0x00000 --#define CS1_CONFIG 0x00004 --#define CS2_CONFIG 0x00008 --#define CS3_CONFIG 0x0000C --#define CS4_CONFIG 0x00010 --#define CS5_CONFIG 0x00014 --#define CS6_CONFIG 0x00018 --#define CS7_CONFIG 0x0001C --#define CS_ALE_TIMING_CONFIG 0x00034 -- --#define CS_CTRL 0x00020 --#define CS_CTRL_ME 0x01000000 /* CS Master Enable bit */ --#define CS_CTRL_IE 0x08000000 /* CS Interrupt Enable bit */ -- --/* SPRIDR - System Part and Revision ID Register -- */ --#define SPRIDR_PARTID 0xFFFF0000 /* Part Identification */ --#define SPRIDR_REVID 0x0000FFFF /* Revision Identification */ -- --#define SPR_5121E 0x80180000 -- --/* SPCR - System Priority Configuration Register -- */ --#define SPCR_PCIHPE 0x10000000 /* PCI Highest Priority Enable */ --#define SPCR_PCIHPE_SHIFT (31-3) --#define SPCR_PCIPR 0x03000000 /* PCI bridge system bus request priority */ --#define SPCR_PCIPR_SHIFT (31-7) --#define SPCR_TBEN 0x00400000 /* E300 PowerPC core time base unit enable */ --#define SPCR_TBEN_SHIFT (31-9) --#define SPCR_COREPR 0x00300000 /* E300 PowerPC Core system bus request priority */ --#define SPCR_COREPR_SHIFT (31-11) -- --/* SWCRR - System Watchdog Control Register -- */ --#define SWCRR 0x0904 /* Register offset to immr */ --#define SWCRR_SWTC 0xFFFF0000 /* Software Watchdog Time Count */ --#define SWCRR_SWEN 0x00000004 /* Watchdog Enable bit */ --#define SWCRR_SWRI 0x00000002 /* Software Watchdog Reset/Interrupt Select bit */ --#define SWCRR_SWPR 0x00000001 /* Software Watchdog Counter Prescale bit */ --#define SWCRR_RES ~(SWCRR_SWTC | SWCRR_SWEN | SWCRR_SWRI | SWCRR_SWPR) -- --/* SWCNR - System Watchdog Counter Register -- */ --#define SWCNR 0x0908 /* Register offset to immr */ --#define SWCNR_SWCN 0x0000FFFF /* Software Watchdog Count mask */ --#define SWCNR_RES ~(SWCNR_SWCN) -- --/* SWSRR - System Watchdog Service Register -- */ --#define SWSRR 0x090E /* Register offset to immr */ -- --/* ACR - Arbiter Configuration Register -- */ --#define ACR_COREDIS 0x10000000 /* Core disable */ --#define ACR_COREDIS_SHIFT (31-7) --#define ACR_PIPE_DEP 0x00070000 /* Pipeline depth */ --#define ACR_PIPE_DEP_SHIFT (31-15) --#define ACR_PCI_RPTCNT 0x00007000 /* PCI repeat count */ --#define ACR_PCI_RPTCNT_SHIFT (31-19) --#define ACR_RPTCNT 0x00000700 /* Repeat count */ --#define ACR_RPTCNT_SHIFT (31-23) --#define ACR_APARK 0x00000030 /* Address parking */ --#define ACR_APARK_SHIFT (31-27) --#define ACR_PARKM 0x0000000F /* Parking master */ --#define ACR_PARKM_SHIFT (31-31) -- --/* ATR - Arbiter Timers Register -- */ --#define ATR_DTO 0x00FF0000 /* Data time out */ --#define ATR_ATO 0x000000FF /* Address time out */ -- --/* AER - Arbiter Event Register -- */ --#define AER_ETEA 0x00000020 /* Transfer error */ --#define AER_RES 0x00000010 /* Reserved transfer type */ --#define AER_ECW 0x00000008 /* External control word transfer type */ --#define AER_AO 0x00000004 /* Address Only transfer type */ --#define AER_DTO 0x00000002 /* Data time out */ --#define AER_ATO 0x00000001 /* Address time out */ -- --/* AEATR - Arbiter Event Address Register -- */ --#define AEATR_EVENT 0x07000000 /* Event type */ --#define AEATR_MSTR_ID 0x001F0000 /* Master Id */ --#define AEATR_TBST 0x00000800 /* Transfer burst */ --#define AEATR_TSIZE 0x00000700 /* Transfer Size */ --#define AEATR_TTYPE 0x0000001F /* Transfer Type */ -- --/* RSR - Reset Status Register -- */ --#define RSR_SWSR 0x00002000 /* software soft reset */ --#define RSR_SWSR_SHIFT 13 --#define RSR_SWHR 0x00001000 /* software hard reset */ --#define RSR_SWHR_SHIFT 12 --#define RSR_JHRS 0x00000200 /* jtag hreset */ --#define RSR_JHRS_SHIFT 9 --#define RSR_JSRS 0x00000100 /* jtag sreset status */ --#define RSR_JSRS_SHIFT 8 --#define RSR_CSHR 0x00000010 /* checkstop reset status */ --#define RSR_CSHR_SHIFT 4 --#define RSR_SWRS 0x00000008 /* software watchdog reset status */ --#define RSR_SWRS_SHIFT 3 --#define RSR_BMRS 0x00000004 /* bus monitop reset status */ --#define RSR_BMRS_SHIFT 2 --#define RSR_SRS 0x00000002 /* soft reset status */ --#define RSR_SRS_SHIFT 1 --#define RSR_HRS 0x00000001 /* hard reset status */ --#define RSR_HRS_SHIFT 0 --#define RSR_RES ~(RSR_SWSR | RSR_SWHR |\ -- RSR_JHRS | RSR_JSRS | RSR_CSHR | RSR_SWRS |\ -- RSR_BMRS | RSR_SRS | RSR_HRS) --/* RMR - Reset Mode Register -- */ --#define RMR_CSRE 0x00000001 /* checkstop reset enable */ --#define RMR_CSRE_SHIFT 0 --#define RMR_RES ~(RMR_CSRE) -- --/* RCR - Reset Control Register -- */ --#define RCR_SWHR 0x00000002 /* software hard reset */ --#define RCR_SWSR 0x00000001 /* software soft reset */ --#define RCR_RES ~(RCR_SWHR | RCR_SWSR) -- --/* RCER - Reset Control Enable Register -- */ --#define RCER_CRE 0x00000001 /* software hard reset */ --#define RCER_RES ~(RCER_CRE) -- --/* SPMR - System PLL Mode Register -- */ --#define SPMR_SPMF 0x0F000000 --#define SPMR_SPMF_SHIFT 24 --#define SPMR_CPMF 0x000F0000 --#define SPMR_CPMF_SHIFT 16 -- --/* SCFR1 System Clock Frequency Register 1 -- */ --#define SCFR1_IPS_DIV 0x3 --#define SCFR1_IPS_DIV_MASK 0x03800000 --#define SCFR1_IPS_DIV_SHIFT 23 -- --#define SCFR1_PCI_DIV 0x6 --#define SCFR1_PCI_DIV_MASK 0x00700000 --#define SCFR1_PCI_DIV_SHIFT 20 -- --/* SCFR2 System Clock Frequency Register 2 -- */ --#define SCFR2_SYS_DIV 0xFC000000 --#define SCFR2_SYS_DIV_SHIFT 26 -- --/* SCCR - System Clock Control Registers -- */ -- --/* System Clock Control Register 1 commands */ --#define CLOCK_SCCR1_CFG_EN 0x80000000 --#define CLOCK_SCCR1_LPC_EN 0x40000000 --#define CLOCK_SCCR1_NFC_EN 0x20000000 --#define CLOCK_SCCR1_PATA_EN 0x10000000 --#define CLOCK_SCCR1_PSC_EN(cn) (0x08000000 >> (cn)) --#define CLOCK_SCCR1_PSCFIFO_EN 0x00008000 --#define CLOCK_SCCR1_SATA_EN 0x00004000 --#define CLOCK_SCCR1_FEC_EN 0x00002000 --#define CLOCK_SCCR1_TPR_EN 0x00001000 --#define CLOCK_SCCR1_PCI_EN 0x00000800 --#define CLOCK_SCCR1_DDR_EN 0x00000400 -- --/* System Clock Control Register 2 commands */ --#define CLOCK_SCCR2_DIU_EN 0x80000000 --#define CLOCK_SCCR2_AXE_EN 0x40000000 --#define CLOCK_SCCR2_MEM_EN 0x20000000 --#define CLOCK_SCCR2_USB2_EN 0x10000000 --#define CLOCK_SCCR2_USB1_EN 0x08000000 --#define CLOCK_SCCR2_I2C_EN 0x04000000 --#define CLOCK_SCCR2_BDLC_EN 0x02000000 --#define CLOCK_SCCR2_SDHC_EN 0x01000000 --#define CLOCK_SCCR2_SPDIF_EN 0x00800000 --#define CLOCK_SCCR2_MBX_BUS_EN 0x00400000 --#define CLOCK_SCCR2_MBX_EN 0x00200000 --#define CLOCK_SCCR2_MBX_3D_EN 0x00100000 --#define CLOCK_SCCR2_IIM_EN 0x00080000 -- --/* PSC FIFO Command values */ --#define PSC_FIFO_RESET_SLICE 0x80 --#define PSC_FIFO_ENABLE_SLICE 0x01 -- --/* PSC FIFO Controller Command values */ --#define FIFOC_ENABLE_CLOCK_GATE 0x01 --#define FIFOC_DISABLE_CLOCK_GATE 0x00 -- --/* PSC FIFO status */ --#define PSC_FIFO_EMPTY 0x01 -- --/* PSC Command values */ --#define PSC_RX_ENABLE 0x01 --#define PSC_RX_DISABLE 0x02 --#define PSC_TX_ENABLE 0x04 --#define PSC_TX_DISABLE 0x08 --#define PSC_SEL_MODE_REG_1 0x10 --#define PSC_RST_RX 0x20 --#define PSC_RST_TX 0x30 --#define PSC_RST_ERR_STAT 0x40 --#define PSC_RST_BRK_CHG_INT 0x50 --#define PSC_START_BRK 0x60 --#define PSC_STOP_BRK 0x70 -- --/* PSC status register bits */ --#define PSC_SR_CDE 0x0080 --#define PSC_SR_TXEMP 0x0800 --#define PSC_SR_OE 0x1000 --#define PSC_SR_PE 0x2000 --#define PSC_SR_FE 0x4000 --#define PSC_SR_RB 0x8000 -- --/* PSC mode fields */ --#define PSC_MODE_5_BITS 0x00 --#define PSC_MODE_6_BITS 0x01 --#define PSC_MODE_7_BITS 0x02 --#define PSC_MODE_8_BITS 0x03 --#define PSC_MODE_PAREVEN 0x00 --#define PSC_MODE_PARODD 0x04 --#define PSC_MODE_PARFORCE 0x08 --#define PSC_MODE_PARNONE 0x10 --#define PSC_MODE_ENTIMEOUT 0x20 --#define PSC_MODE_RXRTS 0x80 --#define PSC_MODE_1_STOPBIT 0x07 -- --/* -- * Centralized FIFO Controller has internal memory for all 12 PSCs FIFOs -- * -- * NOTE: individual PSC units are free to use whatever area (and size) of the -- * FIFOC internal memory, so make sure memory areas for FIFO slices used by -- * different PSCs do not overlap! -- * -- * Overall size of FIFOC memory is not documented in the MPC5121e RM, but -- * tests indicate that it is 1024 words total. -- */ --#define FIFOC_PSC0_TX_SIZE 0x0 /* number of 4-byte words for FIFO slice */ --#define FIFOC_PSC0_TX_ADDR 0x0 --#define FIFOC_PSC0_RX_SIZE 0x0 --#define FIFOC_PSC0_RX_ADDR 0x0 -- --#define FIFOC_PSC1_TX_SIZE 0x0 --#define FIFOC_PSC1_TX_ADDR 0x0 --#define FIFOC_PSC1_RX_SIZE 0x0 --#define FIFOC_PSC1_RX_ADDR 0x0 -- --#define FIFOC_PSC2_TX_SIZE 0x0 --#define FIFOC_PSC2_TX_ADDR 0x0 --#define FIFOC_PSC2_RX_SIZE 0x0 --#define FIFOC_PSC2_RX_ADDR 0x0 -- --#define FIFOC_PSC3_TX_SIZE 0x04 --#define FIFOC_PSC3_TX_ADDR 0x0 --#define FIFOC_PSC3_RX_SIZE 0x04 --#define FIFOC_PSC3_RX_ADDR 0x10 -- --#define FIFOC_PSC4_TX_SIZE 0x0 --#define FIFOC_PSC4_TX_ADDR 0x0 --#define FIFOC_PSC4_RX_SIZE 0x0 --#define FIFOC_PSC4_RX_ADDR 0x0 -- --#define FIFOC_PSC5_TX_SIZE 0x0 --#define FIFOC_PSC5_TX_ADDR 0x0 --#define FIFOC_PSC5_RX_SIZE 0x0 --#define FIFOC_PSC5_RX_ADDR 0x0 -- --#define FIFOC_PSC6_TX_SIZE 0x0 --#define FIFOC_PSC6_TX_ADDR 0x0 --#define FIFOC_PSC6_RX_SIZE 0x0 --#define FIFOC_PSC6_RX_ADDR 0x0 -- --#define FIFOC_PSC7_TX_SIZE 0x0 --#define FIFOC_PSC7_TX_ADDR 0x0 --#define FIFOC_PSC7_RX_SIZE 0x0 --#define FIFOC_PSC7_RX_ADDR 0x0 -- --#define FIFOC_PSC8_TX_SIZE 0x0 --#define FIFOC_PSC8_TX_ADDR 0x0 --#define FIFOC_PSC8_RX_SIZE 0x0 --#define FIFOC_PSC8_RX_ADDR 0x0 -- --#define FIFOC_PSC9_TX_SIZE 0x0 --#define FIFOC_PSC9_TX_ADDR 0x0 --#define FIFOC_PSC9_RX_SIZE 0x0 --#define FIFOC_PSC9_RX_ADDR 0x0 -- --#define FIFOC_PSC10_TX_SIZE 0x0 --#define FIFOC_PSC10_TX_ADDR 0x0 --#define FIFOC_PSC10_RX_SIZE 0x0 --#define FIFOC_PSC10_RX_ADDR 0x0 -- --#define FIFOC_PSC11_TX_SIZE 0x0 --#define FIFOC_PSC11_TX_ADDR 0x0 --#define FIFOC_PSC11_RX_SIZE 0x0 --#define FIFOC_PSC11_RX_ADDR 0x0 -- --/* IO Control Register -- */ --#define IOCTL_MEM 0x000 --#define IOCTL_GP 0x004 --#define IOCTL_LPC_CLK 0x008 --#define IOCTL_LPC_OE 0x00C --#define IOCTL_LPC_RWB 0x010 --#define IOCTL_LPC_ACK 0x014 --#define IOCTL_LPC_CS0 0x018 --#define IOCTL_NFC_CE0 0x01C --#define IOCTL_LPC_CS1 0x020 --#define IOCTL_LPC_CS2 0x024 --#define IOCTL_LPC_AX03 0x028 --#define IOCTL_EMB_AX02 0x02C --#define IOCTL_EMB_AX01 0x030 --#define IOCTL_EMB_AX00 0x034 --#define IOCTL_EMB_AD31 0x038 --#define IOCTL_EMB_AD30 0x03C --#define IOCTL_EMB_AD29 0x040 --#define IOCTL_EMB_AD28 0x044 --#define IOCTL_EMB_AD27 0x048 --#define IOCTL_EMB_AD26 0x04C --#define IOCTL_EMB_AD25 0x050 --#define IOCTL_EMB_AD24 0x054 --#define IOCTL_EMB_AD23 0x058 --#define IOCTL_EMB_AD22 0x05C --#define IOCTL_EMB_AD21 0x060 --#define IOCTL_EMB_AD20 0x064 --#define IOCTL_EMB_AD19 0x068 --#define IOCTL_EMB_AD18 0x06C --#define IOCTL_EMB_AD17 0x070 --#define IOCTL_EMB_AD16 0x074 --#define IOCTL_EMB_AD15 0x078 --#define IOCTL_EMB_AD14 0x07C --#define IOCTL_EMB_AD13 0x080 --#define IOCTL_EMB_AD12 0x084 --#define IOCTL_EMB_AD11 0x088 --#define IOCTL_EMB_AD10 0x08C --#define IOCTL_EMB_AD09 0x090 --#define IOCTL_EMB_AD08 0x094 --#define IOCTL_EMB_AD07 0x098 --#define IOCTL_EMB_AD06 0x09C --#define IOCTL_EMB_AD05 0x0A0 --#define IOCTL_EMB_AD04 0x0A4 --#define IOCTL_EMB_AD03 0x0A8 --#define IOCTL_EMB_AD02 0x0AC --#define IOCTL_EMB_AD01 0x0B0 --#define IOCTL_EMB_AD00 0x0B4 --#define IOCTL_PATA_CE1 0x0B8 --#define IOCTL_PATA_CE2 0x0BC --#define IOCTL_PATA_ISOLATE 0x0C0 --#define IOCTL_PATA_IOR 0x0C4 --#define IOCTL_PATA_IOW 0x0C8 --#define IOCTL_PATA_IOCHRDY 0x0CC --#define IOCTL_PATA_INTRQ 0x0D0 --#define IOCTL_PATA_DRQ 0x0D4 --#define IOCTL_PATA_DACK 0x0D8 --#define IOCTL_NFC_WP 0x0DC --#define IOCTL_NFC_RB 0x0E0 --#define IOCTL_NFC_ALE 0x0E4 --#define IOCTL_NFC_CLE 0x0E8 --#define IOCTL_NFC_WE 0x0EC --#define IOCTL_NFC_RE 0x0F0 --#define IOCTL_PCI_AD31 0x0F4 --#define IOCTL_PCI_AD30 0x0F8 --#define IOCTL_PCI_AD29 0x0FC --#define IOCTL_PCI_AD28 0x100 --#define IOCTL_PCI_AD27 0x104 --#define IOCTL_PCI_AD26 0x108 --#define IOCTL_PCI_AD25 0x10C --#define IOCTL_PCI_AD24 0x110 --#define IOCTL_PCI_AD23 0x114 --#define IOCTL_PCI_AD22 0x118 --#define IOCTL_PCI_AD21 0x11C --#define IOCTL_PCI_AD20 0x120 --#define IOCTL_PCI_AD19 0x124 --#define IOCTL_PCI_AD18 0x128 --#define IOCTL_PCI_AD17 0x12C --#define IOCTL_PCI_AD16 0x130 --#define IOCTL_PCI_AD15 0x134 --#define IOCTL_PCI_AD14 0x138 --#define IOCTL_PCI_AD13 0x13C --#define IOCTL_PCI_AD12 0x140 --#define IOCTL_PCI_AD11 0x144 --#define IOCTL_PCI_AD10 0x148 --#define IOCTL_PCI_AD09 0x14C --#define IOCTL_PCI_AD08 0x150 --#define IOCTL_PCI_AD07 0x154 --#define IOCTL_PCI_AD06 0x158 --#define IOCTL_PCI_AD05 0x15C --#define IOCTL_PCI_AD04 0x160 --#define IOCTL_PCI_AD03 0x164 --#define IOCTL_PCI_AD02 0x168 --#define IOCTL_PCI_AD01 0x16C --#define IOCTL_PCI_AD00 0x170 --#define IOCTL_PCI_CBE0 0x174 --#define IOCTL_PCI_CBE1 0x178 --#define IOCTL_PCI_CBE2 0x17C --#define IOCTL_PCI_CBE3 0x180 --#define IOCTL_PCI_GNT2 0x184 --#define IOCTL_PCI_REQ2 0x188 --#define IOCTL_PCI_GNT1 0x18C --#define IOCTL_PCI_REQ1 0x190 --#define IOCTL_PCI_GNT0 0x194 --#define IOCTL_PCI_REQ0 0x198 --#define IOCTL_PCI_INTA 0x19C --#define IOCTL_PCI_CLK 0x1A0 --#define IOCTL_PCI_RST_OUT 0x1A4 --#define IOCTL_PCI_FRAME 0x1A8 --#define IOCTL_PCI_IDSEL 0x1AC --#define IOCTL_PCI_DEVSEL 0x1B0 --#define IOCTL_PCI_IRDY 0x1B4 --#define IOCTL_PCI_TRDY 0x1B8 --#define IOCTL_PCI_STOP 0x1BC --#define IOCTL_PCI_PAR 0x1C0 --#define IOCTL_PCI_PERR 0x1C4 --#define IOCTL_PCI_SERR 0x1C8 --#define IOCTL_SPDIF_TXCLK 0x1CC --#define IOCTL_SPDIF_TX 0x1D0 --#define IOCTL_SPDIF_RX 0x1D4 --#define IOCTL_I2C0_SCL 0x1D8 --#define IOCTL_I2C0_SDA 0x1DC --#define IOCTL_I2C1_SCL 0x1E0 --#define IOCTL_I2C1_SDA 0x1E4 --#define IOCTL_I2C2_SCL 0x1E8 --#define IOCTL_I2C2_SDA 0x1EC --#define IOCTL_IRQ0 0x1F0 --#define IOCTL_IRQ1 0x1F4 --#define IOCTL_CAN1_TX 0x1F8 --#define IOCTL_CAN2_TX 0x1FC --#define IOCTL_J1850_TX 0x200 --#define IOCTL_J1850_RX 0x204 --#define IOCTL_PSC_MCLK_IN 0x208 --#define IOCTL_PSC0_0 0x20C --#define IOCTL_PSC0_1 0x210 --#define IOCTL_PSC0_2 0x214 --#define IOCTL_PSC0_3 0x218 --#define IOCTL_PSC0_4 0x21C --#define IOCTL_PSC1_0 0x220 --#define IOCTL_PSC1_1 0x224 --#define IOCTL_PSC1_2 0x228 --#define IOCTL_PSC1_3 0x22C --#define IOCTL_PSC1_4 0x230 --#define IOCTL_PSC2_0 0x234 --#define IOCTL_PSC2_1 0x238 --#define IOCTL_PSC2_2 0x23C --#define IOCTL_PSC2_3 0x240 --#define IOCTL_PSC2_4 0x244 --#define IOCTL_PSC3_0 0x248 --#define IOCTL_PSC3_1 0x24C --#define IOCTL_PSC3_2 0x250 --#define IOCTL_PSC3_3 0x254 --#define IOCTL_PSC3_4 0x258 --#define IOCTL_PSC4_0 0x25C --#define IOCTL_PSC4_1 0x260 --#define IOCTL_PSC4_2 0x264 --#define IOCTL_PSC4_3 0x268 --#define IOCTL_PSC4_4 0x26C --#define IOCTL_PSC5_0 0x270 --#define IOCTL_PSC5_1 0x274 --#define IOCTL_PSC5_2 0x278 --#define IOCTL_PSC5_3 0x27C --#define IOCTL_PSC5_4 0x280 --#define IOCTL_PSC6_0 0x284 --#define IOCTL_PSC6_1 0x288 --#define IOCTL_PSC6_2 0x28C --#define IOCTL_PSC6_3 0x290 --#define IOCTL_PSC6_4 0x294 --#define IOCTL_PSC7_0 0x298 --#define IOCTL_PSC7_1 0x29C --#define IOCTL_PSC7_2 0x2A0 --#define IOCTL_PSC7_3 0x2A4 --#define IOCTL_PSC7_4 0x2A8 --#define IOCTL_PSC8_0 0x2AC --#define IOCTL_PSC8_1 0x2B0 --#define IOCTL_PSC8_2 0x2B4 --#define IOCTL_PSC8_3 0x2B8 --#define IOCTL_PSC8_4 0x2BC --#define IOCTL_PSC9_0 0x2C0 --#define IOCTL_PSC9_1 0x2C4 --#define IOCTL_PSC9_2 0x2C8 --#define IOCTL_PSC9_3 0x2CC --#define IOCTL_PSC9_4 0x2D0 --#define IOCTL_PSC10_0 0x2D4 --#define IOCTL_PSC10_1 0x2D8 --#define IOCTL_PSC10_2 0x2DC --#define IOCTL_PSC10_3 0x2E0 --#define IOCTL_PSC10_4 0x2E4 --#define IOCTL_PSC11_0 0x2E8 --#define IOCTL_PSC11_1 0x2EC --#define IOCTL_PSC11_2 0x2F0 --#define IOCTL_PSC11_3 0x2F4 --#define IOCTL_PSC11_4 0x2F8 --#define IOCTL_HRESET 0x2FC --#define IOCTL_SRESET 0x300 --#define IOCTL_CKSTP_OUT 0x304 --#define IOCTL_USB2_VBUS_PWR_FAULT 0x308 --#define IOCTL_USB2_VBUS_PWR_SELECT 0x30C --#define IOCTL_USB2_PHY_DRVV_BUS 0x310 -- --#ifndef __ASSEMBLY__ -- -- --/* IO pin fields */ --#define IO_PIN_FMUX(v) ((v) << 7) /* pin function */ --#define IO_PIN_HOLD(v) ((v) << 5) /* hold time, pci only */ --#define IO_PIN_PUD(v) ((v) << 4) /* if PUE, 0=pull-down, 1=pull-up */ --#define IO_PIN_PUE(v) ((v) << 3) /* pull up/down enable */ --#define IO_PIN_ST(v) ((v) << 2) /* schmitt trigger */ --#define IO_PIN_DS(v) ((v)) /* slew rate */ -- --typedef struct iopin_t { -- int p_offset; /* offset from IOCTL_MEM_OFFSET */ -- int nr_pins; /* number of pins to set this way */ -- int bit_or; /* or in the value instead of overwrite */ -- u_long val; /* value to write or or */ --}iopin_t; -- --void iopin_initialize(iopin_t *,int); --#endif -- --/* Indexes in regs array */ --/* Set for DDR */ --#define IOCTRL_MUX_DDR 0x00000036 -- -- /* Register Offset Base */ --#define MPC512X_FEC (CONFIG_SYS_IMMR + 0x02800) --#define MPC512X_PATA (CONFIG_SYS_IMMR + 0x10200) -- --/* IIM control */ --#define IIM_SET_UA(bk, f) ((bk << 3) | (f >> 5)) --#define IIM_SET_LA(f, bit) (((f & 0x0000001f) << 3) | bit) --#define IIM_STAT_BUSY 0x00000080 --#define IIM_STAT_PRGD 0x00000002 --#define IIM_STAT_SNSD 0x00000001 --#define IIM_ERR_WPE 0x00000040 --#define IIM_ERR_OPE 0x00000020 --#define IIM_ERR_RPE 0x00000010 --#define IIM_ERR_WLRE 0x00000008 --#define IIM_ERR_SNSE 0x00000004 --#define IIM_ERR_PARITYE 0x00000002 --#define IIM_PRG_P_SET 0x000000aa --#define IIM_PRG_P_UNSET 0 --#define IIM_FCTL_PROG_PULSE 0x00000020 --#define IIM_FCTL_PROG 0x00000001 --#define IIM_FCTL_ESNS_N 0x00000008 --#define IIM_FBAC_FBWP 0x00000080 --#define IIM_FBAC_FBOP 0x00000040 --#define IIM_FBAC_FBRP 0x00000020 --#define IIM_FBAC_FBESP 0x00000008 --#define IIM_PROTECTION 0x000000e8 --#define IIM_FMAX 31 -- --/* Number of I2C buses */ --#define I2C_BUS_CNT 3 -- --/* I2Cn control register bits */ --#define I2C_EN 0x80 --#define I2C_IEN 0x40 --#define I2C_STA 0x20 --#define I2C_TX 0x10 --#define I2C_TXAK 0x08 --#define I2C_RSTA 0x04 --#define I2C_INIT_MASK (I2C_EN | I2C_STA | I2C_TX | I2C_RSTA) -- --/* I2Cn status register bits */ --#define I2C_CF 0x80 --#define I2C_AAS 0x40 --#define I2C_BB 0x20 --#define I2C_AL 0x10 --#define I2C_SRW 0x04 --#define I2C_IF 0x02 --#define I2C_RXAK 0x01 -- --/* POTAR - PCI Outbound Translation Address Register -- */ --#define POTAR_TA_MASK 0x000fffff -- --/* POBAR - PCI Outbound Base Address Register -- */ --#define POBAR_BA_MASK 0x000fffff -- --/* POCMR - PCI Outbound Comparision Mask Register -- */ --#define POCMR_EN 0x80000000 --#define POCMR_IO 0x40000000 /* 0-memory space 1-I/O space */ --#define POCMR_PRE 0x20000000 /* prefetch enable */ --#define POCMR_SBS 0x00100000 /* special byte swap enable */ --#define POCMR_CM_MASK 0x000fffff --#define POCMR_CM_4G 0x00000000 --#define POCMR_CM_2G 0x00080000 --#define POCMR_CM_1G 0x000C0000 --#define POCMR_CM_512M 0x000E0000 --#define POCMR_CM_256M 0x000F0000 --#define POCMR_CM_128M 0x000F8000 --#define POCMR_CM_64M 0x000FC000 --#define POCMR_CM_32M 0x000FE000 --#define POCMR_CM_16M 0x000FF000 --#define POCMR_CM_8M 0x000FF800 --#define POCMR_CM_4M 0x000FFC00 --#define POCMR_CM_2M 0x000FFE00 --#define POCMR_CM_1M 0x000FFF00 --#define POCMR_CM_512K 0x000FFF80 --#define POCMR_CM_256K 0x000FFFC0 --#define POCMR_CM_128K 0x000FFFE0 --#define POCMR_CM_64K 0x000FFFF0 --#define POCMR_CM_32K 0x000FFFF8 --#define POCMR_CM_16K 0x000FFFFC --#define POCMR_CM_8K 0x000FFFFE --#define POCMR_CM_4K 0x000FFFFF -- --/* PITAR - PCI Inbound Translation Address Register -- */ --#define PITAR_TA_MASK 0x000fffff -- --/* PIBAR - PCI Inbound Base/Extended Address Register -- */ --#define PIBAR_MASK 0xffffffff --#define PIEBAR_EBA_MASK 0x000fffff -- --/* PIWAR - PCI Inbound Windows Attributes Register -- */ --#define PIWAR_EN 0x80000000 --#define PIWAR_SBS 0x40000000 --#define PIWAR_PF 0x20000000 --#define PIWAR_RTT_MASK 0x000f0000 --#define PIWAR_RTT_NO_SNOOP 0x00040000 --#define PIWAR_RTT_SNOOP 0x00050000 --#define PIWAR_WTT_MASK 0x0000f000 --#define PIWAR_WTT_NO_SNOOP 0x00004000 --#define PIWAR_WTT_SNOOP 0x00005000 --#define PIWAR_IWS_MASK 0x0000003F --#define PIWAR_IWS_4K 0x0000000B --#define PIWAR_IWS_8K 0x0000000C --#define PIWAR_IWS_16K 0x0000000D --#define PIWAR_IWS_32K 0x0000000E --#define PIWAR_IWS_64K 0x0000000F --#define PIWAR_IWS_128K 0x00000010 --#define PIWAR_IWS_256K 0x00000011 --#define PIWAR_IWS_512K 0x00000012 --#define PIWAR_IWS_1M 0x00000013 --#define PIWAR_IWS_2M 0x00000014 --#define PIWAR_IWS_4M 0x00000015 --#define PIWAR_IWS_8M 0x00000016 --#define PIWAR_IWS_16M 0x00000017 --#define PIWAR_IWS_32M 0x00000018 --#define PIWAR_IWS_64M 0x00000019 --#define PIWAR_IWS_128M 0x0000001A --#define PIWAR_IWS_256M 0x0000001B --#define PIWAR_IWS_512M 0x0000001C --#define PIWAR_IWS_1G 0x0000001D --#define PIWAR_IWS_2G 0x0000001E -- --#endif /* __MPC512X_H__ */ -diff --git a/include/mpc83xx.h b/include/mpc83xx.h -index fab3751..c5bd6cb 100644 ---- a/include/mpc83xx.h -+++ b/include/mpc83xx.h -@@ -54,7 +54,7 @@ - #define SPRIDR_PARTID 0xFFFF0000 /* Part Id */ - #define SPRIDR_REVID 0x0000FFFF /* Revision Id */ - --#if defined(CONFIG_MPC834X) -+#if defined(CONFIG_MPC834x) - #define REVID_MAJOR(spridr) ((spridr & 0x0000FF00) >> 8) - #define REVID_MINOR(spridr) (spridr & 0x000000FF) - #else -@@ -100,7 +100,7 @@ - #define SPCR_COREPR 0x00300000 /* E300 PowerPC Core system bus request priority */ - #define SPCR_COREPR_SHIFT (31-11) - --#if defined(CONFIG_MPC834X) -+#if defined(CONFIG_MPC834x) - /* SPCR bits - MPC8349 specific */ - #define SPCR_TSEC1DP 0x00003000 /* TSEC1 data priority */ - #define SPCR_TSEC1DP_SHIFT (31-19) -@@ -115,7 +115,7 @@ - #define SPCR_TSEC2EP 0x00000003 /* TSEC2 emergency priority */ - #define SPCR_TSEC2EP_SHIFT (31-31) - --#elif defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X) -+#elif defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x) - /* SPCR bits - MPC831x and MPC837x specific */ - #define SPCR_TSECDP 0x00003000 /* TSEC data priority */ - #define SPCR_TSECDP_SHIFT (31-19) -@@ -127,7 +127,7 @@ - - /* SICRL/H - System I/O Configuration Register Low/High - */ --#if defined(CONFIG_MPC834X) -+#if defined(CONFIG_MPC834x) - /* SICRL bits - MPC8349 specific */ - #define SICRL_LDP_A 0x80000000 - #define SICRL_USB1 0x40000000 -@@ -190,8 +190,8 @@ - #define SICRH_UC2E1OBI 0x00000002 - #define SICRH_UC2E2OBI 0x00000001 - --#elif defined(CONFIG_MPC832X) --/* SICRL bits - MPC832X specific */ -+#elif defined(CONFIG_MPC832x) -+/* SICRL bits - MPC832x specific */ - #define SICRL_LDP_LCS_A 0x80000000 - #define SICRL_IRQ_CKS 0x20000000 - #define SICRL_PCI_MSRC 0x10000000 -@@ -262,7 +262,7 @@ - #define SICRH_TSOBI1 0x00000002 - #define SICRH_TSOBI2 0x00000001 - --#elif defined(CONFIG_MPC837X) -+#elif defined(CONFIG_MPC837x) - /* SICRL bits - MPC837x specific */ - #define SICRL_USB_A 0xC0000000 - #define SICRL_USB_B 0x30000000 -@@ -424,7 +424,7 @@ - #define HRCWL_CORE_TO_CSB_2_5X1 0x00050000 - #define HRCWL_CORE_TO_CSB_3X1 0x00060000 - --#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832X) -+#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832x) - #define HRCWL_CEVCOD 0x000000C0 - #define HRCWL_CEVCOD_SHIFT 6 - #define HRCWL_CE_PLL_VCO_DIV_4 0x00000000 -@@ -478,7 +478,7 @@ - #define HRCWL_SVCOD_DIV_8 0x20000000 - #define HRCWL_SVCOD_DIV_1 0x30000000 - --#elif defined(CONFIG_MPC837X) -+#elif defined(CONFIG_MPC837x) - #define HRCWL_SVCOD 0x30000000 - #define HRCWL_SVCOD_SHIFT 28 - #define HRCWL_SVCOD_DIV_4 0x00000000 -@@ -493,7 +493,7 @@ - #define HRCWH_PCI_HOST_SHIFT 31 - #define HRCWH_PCI_AGENT 0x00000000 - --#if defined(CONFIG_MPC834X) -+#if defined(CONFIG_MPC834x) - #define HRCWH_32_BIT_PCI 0x00000000 - #define HRCWH_64_BIT_PCI 0x40000000 - #endif -@@ -504,7 +504,7 @@ - #define HRCWH_PCI_ARBITER_DISABLE 0x00000000 - #define HRCWH_PCI_ARBITER_ENABLE 0x20000000 - --#if defined(CONFIG_MPC834X) -+#if defined(CONFIG_MPC834x) - #define HRCWH_PCI2_ARBITER_DISABLE 0x00000000 - #define HRCWH_PCI2_ARBITER_ENABLE 0x10000000 - -@@ -528,17 +528,17 @@ - - #define HRCWH_ROM_LOC_DDR_SDRAM 0x00000000 - #define HRCWH_ROM_LOC_PCI1 0x00100000 --#if defined(CONFIG_MPC834X) -+#if defined(CONFIG_MPC834x) - #define HRCWH_ROM_LOC_PCI2 0x00200000 - #endif --#if defined(CONFIG_MPC837X) -+#if defined(CONFIG_MPC837x) - #define HRCWH_ROM_LOC_ON_CHIP_ROM 0x00300000 - #endif - #define HRCWH_ROM_LOC_LOCAL_8BIT 0x00500000 - #define HRCWH_ROM_LOC_LOCAL_16BIT 0x00600000 - #define HRCWH_ROM_LOC_LOCAL_32BIT 0x00700000 - --#if defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X) -+#if defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x) - #define HRCWH_ROM_LOC_NAND_SP_8BIT 0x00100000 - #define HRCWH_ROM_LOC_NAND_SP_16BIT 0x00200000 - #define HRCWH_ROM_LOC_NAND_LP_8BIT 0x00500000 -@@ -562,7 +562,7 @@ - #define HRCWH_TSEC2M_IN_SGMII 0x00001800 - #endif - --#if defined(CONFIG_MPC834X) -+#if defined(CONFIG_MPC834x) - #define HRCWH_TSEC1M_IN_RGMII 0x00000000 - #define HRCWH_TSEC1M_IN_RTBI 0x00004000 - #define HRCWH_TSEC1M_IN_GMII 0x00008000 -@@ -589,7 +589,7 @@ - - /* RSR - Reset Status Register - */ --#if defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X) -+#if defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x) - #define RSR_RSTSRC 0xF0000000 /* Reset source */ - #define RSR_RSTSRC_SHIFT 28 - #else -@@ -682,7 +682,7 @@ - #define SCCR_PCICM 0x00010000 - #define SCCR_PCICM_SHIFT 16 - --#if defined(CONFIG_MPC834X) -+#if defined(CONFIG_MPC834x) - /* SCCR bits - MPC834x specific */ - #define SCCR_TSEC1CM 0xc0000000 - #define SCCR_TSEC1CM_SHIFT 30 -@@ -770,7 +770,7 @@ - #define SCCR_TDMCM_2 0x00000020 - #define SCCR_TDMCM_3 0x00000030 - --#elif defined(CONFIG_MPC837X) -+#elif defined(CONFIG_MPC837x) - /* SCCR bits - MPC837x specific */ - #define SCCR_TSEC1CM 0xc0000000 - #define SCCR_TSEC1CM_SHIFT 30 -diff --git a/include/serial.h b/include/serial.h -index e3d8b36..aca5221 100644 ---- a/include/serial.h -+++ b/include/serial.h -@@ -42,6 +42,13 @@ extern struct serial_device s3c24xx_serial1_device; - extern struct serial_device s3c24xx_serial2_device; - #endif - -+#if defined(CONFIG_OMAP3_ZOOM2) -+extern struct serial_device zoom2_serial_device0; -+extern struct serial_device zoom2_serial_device1; -+extern struct serial_device zoom2_serial_device2; -+extern struct serial_device zoom2_serial_device3; -+#endif -+ - extern struct serial_device serial_ffuart_device; - extern struct serial_device serial_btuart_device; - extern struct serial_device serial_stuart_device; -diff --git a/include/status_led.h b/include/status_led.h -index 175972a..9dbf01f 100644 ---- a/include/status_led.h -+++ b/include/status_led.h -@@ -397,6 +397,8 @@ extern void green_LED_on(void); - extern void green_LED_off(void); - extern void yellow_LED_on(void); - extern void yellow_LED_off(void); -+extern void blue_LED_on(void); -+extern void blue_LED_off(void); - #else - .extern LED_init - .extern red_LED_on -@@ -405,6 +407,8 @@ extern void yellow_LED_off(void); - .extern yellow_LED_off - .extern green_LED_on - .extern green_LED_off -+ .extern blue_LED_on -+ .extern blue_LED_off - #endif - - #endif /* CONFIG_STATUS_LED */ -diff --git a/include/tsec.h b/include/tsec.h -index 7b52e06..9184256 100644 ---- a/include/tsec.h -+++ b/include/tsec.h -@@ -28,7 +28,7 @@ - - /* FIXME: Should these be pushed back to 83xx and 85xx config files? */ - #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) \ -- || defined(CONFIG_MPC83XX) -+ || defined(CONFIG_MPC83xx) - #define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET) - #endif - -diff --git a/include/usb/ehci-fsl.h b/include/usb/ehci-fsl.h -new file mode 100644 -index 0000000..1140561 ---- /dev/null -+++ b/include/usb/ehci-fsl.h -@@ -0,0 +1,149 @@ -+/* -+ * Copyright (c) 2005, 2009 Freescale Semiconductor, Inc -+ * Copyright (c) 2005 MontaVista Software -+ * Copyright (c) 2008 Excito Elektronik i Sk=E5ne AB -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#ifndef _EHCI_FSL_H -+#define _EHCI_FSL_H -+ -+#include -+ -+/* Global offsets */ -+#define FSL_SKIP_PCI 0x100 -+ -+/* offsets for the non-ehci registers in the FSL SOC USB controller */ -+#define FSL_SOC_USB_ULPIVP 0x170 -+#define FSL_SOC_USB_PORTSC1 0x184 -+#define PORT_PTS_MSK (3 << 30) -+#define PORT_PTS_UTMI (0 << 30) -+#define PORT_PTS_ULPI (2 << 30) -+#define PORT_PTS_SERIAL (3 << 30) -+#define PORT_PTS_PTW (1 << 28) -+ -+/* USBMODE Register bits */ -+#define CM_IDLE (0 << 0) -+#define CM_RESERVED (1 << 0) -+#define CM_DEVICE (2 << 0) -+#define CM_HOST (3 << 0) -+#define USBMODE_RESERVED_2 (0 << 2) -+#define SLOM (1 << 3) -+#define SDIS (1 << 4) -+ -+/* CONTROL Register bits */ -+#define ULPI_INT_EN (1 << 0) -+#define WU_INT_EN (1 << 1) -+#define USB_EN (1 << 2) -+#define LSF_EN (1 << 3) -+#define KEEP_OTG_ON (1 << 4) -+#define OTG_PORT (1 << 5) -+#define REFSEL_12MHZ (0 << 6) -+#define REFSEL_16MHZ (1 << 6) -+#define REFSEL_48MHZ (2 << 6) -+#define PLL_RESET (1 << 8) -+#define UTMI_PHY_EN (1 << 9) -+#define PHY_CLK_SEL_UTMI (0 << 10) -+#define PHY_CLK_SEL_ULPI (1 << 10) -+#define CLKIN_SEL_USB_CLK (0 << 11) -+#define CLKIN_SEL_USB_CLK2 (1 << 11) -+#define CLKIN_SEL_SYS_CLK (2 << 11) -+#define CLKIN_SEL_SYS_CLK2 (3 << 11) -+#define RESERVED_18 (0 << 13) -+#define RESERVED_17 (0 << 14) -+#define RESERVED_16 (0 << 15) -+#define WU_INT (1 << 16) -+#define PHY_CLK_VALID (1 << 17) -+ -+#define FSL_SOC_USB_PORTSC2 0x188 -+#define FSL_SOC_USB_USBMODE 0x1a8 -+#define FSL_SOC_USB_SNOOP1 0x400 /* NOTE: big-endian */ -+#define FSL_SOC_USB_SNOOP2 0x404 /* NOTE: big-endian */ -+#define FSL_SOC_USB_AGECNTTHRSH 0x408 /* NOTE: big-endian */ -+#define FSL_SOC_USB_PRICTRL 0x40c /* NOTE: big-endian */ -+#define FSL_SOC_USB_SICTRL 0x410 /* NOTE: big-endian */ -+#define FSL_SOC_USB_CTRL 0x500 /* NOTE: big-endian */ -+#define SNOOP_SIZE_2GB 0x1e -+ -+/* System Clock Control Register */ -+#define MPC83XX_SCCR_USB_MASK 0x00f00000 -+#define MPC83XX_SCCR_USB_DRCM_11 0x00300000 -+#define MPC83XX_SCCR_USB_DRCM_01 0x00100000 -+#define MPC83XX_SCCR_USB_DRCM_10 0x00200000 -+ -+#if defined(CONFIG_MPC83XX) -+#define CONFIG_SYS_MPC8xxx_USB_ADDR CONFIG_SYS_MPC83xx_USB_ADDR -+#elif defined(CONFIG_MPC85xx) -+#define CONFIG_SYS_MPC8xxx_USB_ADDR CONFIG_SYS_MPC85xx_USB_ADDR -+#endif -+ -+/* -+ * USB Registers -+ */ -+struct usb_ehci { -+ u8 res1[0x100]; -+ u16 caplength; /* 0x100 - Capability Register Length */ -+ u16 hciversion; /* 0x102 - Host Interface Version */ -+ u32 hcsparams; /* 0x104 - Host Structural Parameters */ -+ u32 hccparams; /* 0x108 - Host Capability Parameters */ -+ u8 res2[0x14]; -+ u32 dciversion; /* 0x120 - Device Interface Version */ -+ u32 dciparams; /* 0x124 - Device Controller Params */ -+ u8 res3[0x18]; -+ u32 usbcmd; /* 0x140 - USB Command */ -+ u32 usbsts; /* 0x144 - USB Status */ -+ u32 usbintr; /* 0x148 - USB Interrupt Enable */ -+ u32 frindex; /* 0x14C - USB Frame Index */ -+ u8 res4[0x4]; -+ u32 perlistbase; /* 0x154 - Periodic List Base -+ - USB Device Address */ -+ u32 ep_list_addr; /* 0x158 - Next Asynchronous List -+ - End Point Address */ -+ u8 res5[0x4]; -+ u32 burstsize; /* 0x160 - Programmable Burst Size */ -+ u32 txfilltuning; /* 0x164 - Host TT Transmit -+ pre-buffer packet tuning */ -+ u8 res6[0x8]; -+ u32 ulpi_viewpoint; /* 0x170 - ULPI Reister Access */ -+ u8 res7[0xc]; -+ u32 config_flag; /* 0x180 - Configured Flag Register */ -+ u32 portsc; /* 0x184 - Port status/control */ -+ u8 res8[0x20]; -+ u32 usbmode; /* 0x1a8 - USB Device Mode */ -+ u32 epsetupstat; /* 0x1ac - End Point Setup Status */ -+ u32 epprime; /* 0x1b0 - End Point Init Status */ -+ u32 epflush; /* 0x1b4 - End Point De-initlialize */ -+ u32 epstatus; /* 0x1b8 - End Point Status */ -+ u32 epcomplete; /* 0x1bc - End Point Complete */ -+ u32 epctrl0; /* 0x1c0 - End Point Control 0 */ -+ u32 epctrl1; /* 0x1c4 - End Point Control 1 */ -+ u32 epctrl2; /* 0x1c8 - End Point Control 2 */ -+ u32 epctrl3; /* 0x1cc - End Point Control 3 */ -+ u32 epctrl4; /* 0x1d0 - End Point Control 4 */ -+ u32 epctrl5; /* 0x1d4 - End Point Control 5 */ -+ u8 res9[0x228]; -+ u32 snoop1; /* 0x400 - Snoop 1 */ -+ u32 snoop2; /* 0x404 - Snoop 2 */ -+ u32 age_cnt_limit; /* 0x408 - Age Count Threshold */ -+ u32 prictrl; /* 0x40c - Priority Control */ -+ u32 sictrl; /* 0x410 - System Interface Control */ -+ u8 res10[0xEC]; -+ u32 control; /* 0x500 - Control */ -+ u8 res11[0xafc]; -+}; -+ -+#endif /* _EHCI_FSL_H */ -diff --git a/lib_arm/board.c b/lib_arm/board.c -index 5d05d9b..4236c94 100644 ---- a/lib_arm/board.c -+++ b/lib_arm/board.c -@@ -136,6 +136,10 @@ void inline __yellow_LED_on(void) {} - void inline yellow_LED_on(void)__attribute__((weak, alias("__yellow_LED_on"))); - void inline __yellow_LED_off(void) {} - void inline yellow_LED_off(void)__attribute__((weak, alias("__yellow_LED_off"))); -+void inline __blue_LED_on(void) {} -+void inline blue_LED_on(void)__attribute__((weak, alias("__blue_LED_on"))); -+void inline __blue_LED_off(void) {} -+void inline blue_LED_off(void)__attribute__((weak, alias("__blue_LED_off"))); - - /************************************************************************ - * Init Utilities * -@@ -261,12 +265,14 @@ typedef int (init_fnc_t) (void); - int print_cpuinfo (void); - - init_fnc_t *init_sequence[] = { -- cpu_init, /* basic cpu dependent setup */ - #if defined(CONFIG_ARCH_CPU_INIT) - arch_cpu_init, /* basic arch cpu dependent setup */ - #endif - board_init, /* basic board dependent setup */ -+#if defined(CONFIG_USE_IRQ) - interrupt_init, /* set up exceptions */ -+#endif -+ timer_init, /* initialize timer */ - env_init, /* initialize environment */ - init_baudrate, /* initialze baudrate settings */ - serial_init, /* serial communications setup */ -@@ -316,6 +322,9 @@ void start_armboot (void) - } - } - -+ /* armboot_start is defined in the board-specific linker script */ -+ mem_malloc_init (_armboot_start - CONFIG_SYS_MALLOC_LEN); -+ - #ifndef CONFIG_SYS_NO_FLASH - /* configure available FLASH banks */ - display_flash_config (flash_init ()); -@@ -350,9 +359,6 @@ void start_armboot (void) - } - #endif /* CONFIG_LCD */ - -- /* armboot_start is defined in the board-specific linker script */ -- mem_malloc_init (_armboot_start - CONFIG_SYS_MALLOC_LEN); -- - #if defined(CONFIG_CMD_NAND) - puts ("NAND: "); - nand_init(); /* go init the NAND */ -@@ -393,6 +399,10 @@ void start_armboot (void) - - console_init_r (); /* fully init console as a device */ - -+#if defined(CONFIG_ARCH_MISC_INIT) -+ /* miscellaneous arch dependent initialisations */ -+ arch_misc_init (); -+#endif - #if defined(CONFIG_MISC_INIT_R) - /* miscellaneous platform dependent initialisations */ - misc_init_r (); -@@ -462,102 +472,3 @@ void hang (void) - puts ("### ERROR ### Please RESET the board ###\n"); - for (;;); - } -- --#ifdef CONFIG_MODEM_SUPPORT --static inline void mdm_readline(char *buf, int bufsiz); -- --/* called from main loop (common/main.c) */ --extern void dbg(const char *fmt, ...); --int mdm_init (void) --{ -- char env_str[16]; -- char *init_str; -- int i; -- extern char console_buffer[]; -- extern void enable_putc(void); -- extern int hwflow_onoff(int); -- -- enable_putc(); /* enable serial_putc() */ -- --#ifdef CONFIG_HWFLOW -- init_str = getenv("mdm_flow_control"); -- if (init_str && (strcmp(init_str, "rts/cts") == 0)) -- hwflow_onoff (1); -- else -- hwflow_onoff(-1); --#endif -- -- for (i = 1;;i++) { -- sprintf(env_str, "mdm_init%d", i); -- if ((init_str = getenv(env_str)) != NULL) { -- serial_puts(init_str); -- serial_puts("\n"); -- for(;;) { -- mdm_readline(console_buffer, CONFIG_SYS_CBSIZE); -- dbg("ini%d: [%s]", i, console_buffer); -- -- if ((strcmp(console_buffer, "OK") == 0) || -- (strcmp(console_buffer, "ERROR") == 0)) { -- dbg("ini%d: cmd done", i); -- break; -- } else /* in case we are originating call ... */ -- if (strncmp(console_buffer, "CONNECT", 7) == 0) { -- dbg("ini%d: connect", i); -- return 0; -- } -- } -- } else -- break; /* no init string - stop modem init */ -- -- udelay(100000); -- } -- -- udelay(100000); -- -- /* final stage - wait for connect */ -- for(;i > 1;) { /* if 'i' > 1 - wait for connection -- message from modem */ -- mdm_readline(console_buffer, CONFIG_SYS_CBSIZE); -- dbg("ini_f: [%s]", console_buffer); -- if (strncmp(console_buffer, "CONNECT", 7) == 0) { -- dbg("ini_f: connected"); -- return 0; -- } -- } -- -- return 0; --} -- --/* 'inline' - We have to do it fast */ --static inline void mdm_readline(char *buf, int bufsiz) --{ -- char c; -- char *p; -- int n; -- -- n = 0; -- p = buf; -- for(;;) { -- c = serial_getc(); -- -- /* dbg("(%c)", c); */ -- -- switch(c) { -- case '\r': -- break; -- case '\n': -- *p = '\0'; -- return; -- -- default: -- if(n++ > bufsiz) { -- *p = '\0'; -- return; /* sanity check */ -- } -- *p = c; -- p++; -- break; -- } -- } --} --#endif /* CONFIG_MODEM_SUPPORT */ -diff --git a/lib_arm/interrupts.c b/lib_arm/interrupts.c -index 8bb950b..1f2b815 100644 ---- a/lib_arm/interrupts.c -+++ b/lib_arm/interrupts.c -@@ -39,6 +39,19 @@ - #include - - #ifdef CONFIG_USE_IRQ -+DECLARE_GLOBAL_DATA_PTR; -+ -+int interrupt_init (void) -+{ -+ /* -+ * setup up stacks if necessary -+ */ -+ IRQ_STACK_START = _armboot_start - CONFIG_SYS_MALLOC_LEN - CONFIG_SYS_GBL_DATA_SIZE - 4; -+ FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ; -+ -+ return arch_interrupt_init(); -+} -+ - /* enable IRQ interrupts */ - void enable_interrupts (void) - { -diff --git a/lib_blackfin/board.c b/lib_blackfin/board.c -index 49465d2..047f164 100644 ---- a/lib_blackfin/board.c -+++ b/lib_blackfin/board.c -@@ -324,6 +324,10 @@ void board_init_r(gd_t * id, ulong dest_addr) - post_reloc(); - #endif - -+ /* initialize malloc() area */ -+ mem_malloc_init(); -+ malloc_bin_reloc(); -+ - #if !defined(CONFIG_SYS_NO_FLASH) - /* Initialize the flash and protect u-boot by default */ - extern flash_info_t flash_info[]; -@@ -341,9 +345,6 @@ void board_init_r(gd_t * id, ulong dest_addr) - bd->bi_flashsize = 0; - bd->bi_flashoffset = 0; - #endif -- /* initialize malloc() area */ -- mem_malloc_init(); -- malloc_bin_reloc(); - - #ifdef CONFIG_CMD_NAND - puts("NAND: "); -diff --git a/lib_m68k/board.c b/lib_m68k/board.c -index db45b00..7d4ffc7 100644 ---- a/lib_m68k/board.c -+++ b/lib_m68k/board.c -@@ -438,9 +438,8 @@ board_init_f (ulong bootflag) - void board_init_r (gd_t *id, ulong dest_addr) - { - cmd_tbl_t *cmdtp; -- char *s, *e; -+ char *s; - bd_t *bd; -- int i; - extern void malloc_bin_reloc (void); - - #ifndef CONFIG_ENV_IS_NOWHERE -@@ -519,6 +518,10 @@ void board_init_r (gd_t *id, ulong dest_addr) - */ - trap_init (CONFIG_SYS_SDRAM_BASE); - -+ /* initialize malloc() area */ -+ mem_malloc_init (); -+ malloc_bin_reloc (); -+ - #if !defined(CONFIG_SYS_NO_FLASH) - puts ("FLASH: "); - -@@ -563,10 +566,6 @@ void board_init_r (gd_t *id, ulong dest_addr) - - WATCHDOG_RESET (); - -- /* initialize malloc() area */ -- mem_malloc_init (); -- malloc_bin_reloc (); -- - #ifdef CONFIG_SPI - # if !defined(CONFIG_ENV_IS_IN_EEPROM) - spi_init_f (); -diff --git a/lib_m68k/time.c b/lib_m68k/time.c -index 697d67e..29269f6 100644 ---- a/lib_m68k/time.c -+++ b/lib_m68k/time.c -@@ -27,10 +27,15 @@ - - #include - #include -+#include - - DECLARE_GLOBAL_DATA_PTR; - --static ulong timestamp; -+static volatile ulong timestamp = 0; -+ -+#ifndef CONFIG_SYS_WATCHDOG_FREQ -+#define CONFIG_SYS_WATCHDOG_FREQ (CONFIG_SYS_HZ / 2) -+#endif - - #if defined(CONFIG_MCFTMR) - #ifndef CONFIG_SYS_UDELAY_BASE -@@ -76,6 +81,12 @@ void dtimer_interrupt(void *not_used) - if ((CONFIG_SYS_TMRPND_REG & CONFIG_SYS_TMRINTR_MASK) == CONFIG_SYS_TMRINTR_PEND) { - timerp->ter = (DTIM_DTER_CAP | DTIM_DTER_REF); - timestamp++; -+ -+ #if defined(CONFIG_WATCHDOG) || defined (CONFIG_HW_WATCHDOG) -+ if ((timestamp % (CONFIG_SYS_WATCHDOG_FREQ)) == 0) { -+ WATCHDOG_RESET (); -+ } -+ #endif /* CONFIG_WATCHDOG || CONFIG_HW_WATCHDOG */ - return; - } - } diff --git a/lib_mips/board.c b/lib_mips/board.c -index 061901e..539f78f 100644 +index f8ac234..539f78f 100644 --- a/lib_mips/board.c +++ b/lib_mips/board.c @@ -45,6 +45,10 @@ DECLARE_GLOBAL_DATA_PTR; @@ -68690,28 +14023,6 @@ index 061901e..539f78f 100644 /* Reserve memory for U-Boot code, data & bss * round down to next 16 kB limit */ -@@ -370,6 +380,10 @@ void board_init_r (gd_t *id, ulong dest_addr) - - bd = gd->bd; - -+ /* initialize malloc() area */ -+ mem_malloc_init(); -+ malloc_bin_reloc(); -+ - #ifndef CONFIG_SYS_NO_FLASH - /* configure available FLASH banks */ - size = flash_init(); -@@ -384,10 +398,6 @@ void board_init_r (gd_t *id, ulong dest_addr) - bd->bi_flashoffset = 0; - #endif - -- /* initialize malloc() area */ -- mem_malloc_init(); -- malloc_bin_reloc(); -- - #ifdef CONFIG_CMD_NAND - puts ("NAND: "); - nand_init (); /* go init the NAND */ diff --git a/lib_mips/time.c b/lib_mips/time.c index 07e356d..4654bf4 100644 --- a/lib_mips/time.c @@ -68731,253 +14042,6 @@ index 07e356d..4654bf4 100644 } + +#endif /* !CONFIG_JzRISC */ -diff --git a/lib_nios/board.c b/lib_nios/board.c -index 63e79ae..9d8eea7 100644 ---- a/lib_nios/board.c -+++ b/lib_nios/board.c -@@ -143,11 +143,13 @@ void board_init (void) - } - - WATCHDOG_RESET (); -+ mem_malloc_init(); -+ malloc_bin_reloc(); -+ -+ WATCHDOG_RESET (); - bd->bi_flashsize = flash_init(); - - WATCHDOG_RESET (); -- mem_malloc_init(); -- malloc_bin_reloc(); - env_relocate(); - - bd->bi_ip_addr = getenv_IPaddr ("ipaddr"); -diff --git a/lib_nios2/board.c b/lib_nios2/board.c -index 70fad1b..0677e99 100644 ---- a/lib_nios2/board.c -+++ b/lib_nios2/board.c -@@ -149,11 +149,13 @@ void board_init (void) - } - - WATCHDOG_RESET (); -+ mem_malloc_init(); -+ malloc_bin_reloc(); -+ -+ WATCHDOG_RESET (); - bd->bi_flashsize = flash_init(); - - WATCHDOG_RESET (); -- mem_malloc_init(); -- malloc_bin_reloc(); - env_relocate(); - - bd->bi_ip_addr = getenv_IPaddr ("ipaddr"); -diff --git a/lib_ppc/board.c b/lib_ppc/board.c -index 9e944fa..155171d 100644 ---- a/lib_ppc/board.c -+++ b/lib_ppc/board.c -@@ -321,7 +321,7 @@ init_fnc_t *init_sequence[] = { - prt_8260_rsr, - prt_8260_clks, - #endif /* CONFIG_8260 */ --#if defined(CONFIG_MPC83XX) -+#if defined(CONFIG_MPC83xx) - prt_83xx_rsr, - #endif - checkcpu, -@@ -408,7 +408,7 @@ void board_init_f (ulong bootflag) - /* compiler optimization barrier needed for GCC >= 3.4 */ - __asm__ __volatile__("": : :"memory"); - --#if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC83XX) && \ -+#if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC83xx) && \ - !defined(CONFIG_MPC85xx) && !defined(CONFIG_MPC86xx) - /* Clear initial global data */ - memset ((void *) gd, 0, sizeof (gd_t)); -@@ -570,7 +570,7 @@ void board_init_f (ulong bootflag) - #if defined(CONFIG_MPC5xxx) - bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ - #endif --#if defined(CONFIG_MPC83XX) -+#if defined(CONFIG_MPC83xx) - bd->bi_immrbar = CONFIG_SYS_IMMR; - #endif - #if defined(CONFIG_MPC8220) -@@ -750,7 +750,7 @@ void board_init_r (gd_t *id, ulong dest_addr) - - WATCHDOG_RESET(); - --#if defined(CONFIG_SYS_DELAYED_ICACHE) || defined(CONFIG_MPC83XX) -+#if defined(CONFIG_SYS_DELAYED_ICACHE) || defined(CONFIG_MPC83xx) - icache_enable (); /* it's time to enable the instruction cache */ - #endif - -@@ -775,6 +775,10 @@ void board_init_r (gd_t *id, ulong dest_addr) - - asm ("sync ; isync"); - -+ /* initialize malloc() area */ -+ mem_malloc_init (); -+ malloc_bin_reloc (); -+ - #if !defined(CONFIG_SYS_NO_FLASH) - puts ("FLASH: "); - -@@ -832,10 +836,6 @@ void board_init_r (gd_t *id, ulong dest_addr) - - WATCHDOG_RESET (); - -- /* initialize malloc() area */ -- mem_malloc_init (); -- malloc_bin_reloc (); -- - #ifdef CONFIG_SPI - # if !defined(CONFIG_ENV_IS_IN_EEPROM) - spi_init_f (); -@@ -1157,103 +1157,6 @@ void hang (void) - for (;;); - } - --#ifdef CONFIG_MODEM_SUPPORT --/* called from main loop (common/main.c) */ --/* 'inline' - We have to do it fast */ --static inline void mdm_readline(char *buf, int bufsiz) --{ -- char c; -- char *p; -- int n; -- -- n = 0; -- p = buf; -- for(;;) { -- c = serial_getc(); -- -- /* dbg("(%c)", c); */ -- -- switch(c) { -- case '\r': -- break; -- case '\n': -- *p = '\0'; -- return; -- -- default: -- if(n++ > bufsiz) { -- *p = '\0'; -- return; /* sanity check */ -- } -- *p = c; -- p++; -- break; -- } -- } --} -- --extern void dbg(const char *fmt, ...); --int mdm_init (void) --{ -- char env_str[16]; -- char *init_str; -- int i; -- extern char console_buffer[]; -- extern void enable_putc(void); -- extern int hwflow_onoff(int); -- -- enable_putc(); /* enable serial_putc() */ -- --#ifdef CONFIG_HWFLOW -- init_str = getenv("mdm_flow_control"); -- if (init_str && (strcmp(init_str, "rts/cts") == 0)) -- hwflow_onoff (1); -- else -- hwflow_onoff(-1); --#endif -- -- for (i = 1;;i++) { -- sprintf(env_str, "mdm_init%d", i); -- if ((init_str = getenv(env_str)) != NULL) { -- serial_puts(init_str); -- serial_puts("\n"); -- for(;;) { -- mdm_readline(console_buffer, CONFIG_SYS_CBSIZE); -- dbg("ini%d: [%s]", i, console_buffer); -- -- if ((strcmp(console_buffer, "OK") == 0) || -- (strcmp(console_buffer, "ERROR") == 0)) { -- dbg("ini%d: cmd done", i); -- break; -- } else /* in case we are originating call ... */ -- if (strncmp(console_buffer, "CONNECT", 7) == 0) { -- dbg("ini%d: connect", i); -- return 0; -- } -- } -- } else -- break; /* no init string - stop modem init */ -- -- udelay(100000); -- } -- -- udelay(100000); -- -- /* final stage - wait for connect */ -- for(;i > 1;) { /* if 'i' > 1 - wait for connection -- message from modem */ -- mdm_readline(console_buffer, CONFIG_SYS_CBSIZE); -- dbg("ini_f: [%s]", console_buffer); -- if (strncmp(console_buffer, "CONNECT", 7) == 0) { -- dbg("ini_f: connected"); -- return 0; -- } -- } -- -- return 0; --} -- --#endif - - #if 0 /* We could use plain global data, but the resulting code is bigger */ - /* -diff --git a/lib_sh/board.c b/lib_sh/board.c -index 2fd213b..183110f 100644 ---- a/lib_sh/board.c -+++ b/lib_sh/board.c -@@ -146,8 +146,8 @@ init_fnc_t *init_sequence[] = - checkboard, /* Check support board */ - dram_init, /* SDRAM init */ - timer_init, /* SuperH Timer (TCNT0 only) init */ -- sh_flash_init, /* Flash memory(NOR) init*/ - sh_mem_env_init, -+ sh_flash_init, /* Flash memory(NOR) init*/ - INIT_FUNC_NAND_INIT/* Flash memory (NAND) init */ - INIT_FUNC_PCI_INIT /* PCI init */ - devices_init, -diff --git a/lib_sparc/board.c b/lib_sparc/board.c -index 2f3e673..628d46d 100644 ---- a/lib_sparc/board.c -+++ b/lib_sparc/board.c -@@ -331,6 +331,10 @@ void board_init_f(ulong bootflag) - */ - interrupt_init(); - -+ /* initialize malloc() area */ -+ mem_malloc_init(); -+ malloc_bin_reloc(); -+ - #if !defined(CONFIG_SYS_NO_FLASH) - puts("FLASH: "); - -@@ -371,11 +375,6 @@ void board_init_f(ulong bootflag) - bd->bi_flashoffset = 0; - #endif /* !CONFIG_SYS_NO_FLASH */ - -- /* initialize malloc() area */ -- mem_malloc_init(); -- -- malloc_bin_reloc(); -- - #ifdef CONFIG_SPI - # if !defined(CONFIG_ENV_IS_IN_EEPROM) - spi_init_f(); diff --git a/nand_spl/board/amcc/acadia/Makefile b/nand_spl/board/amcc/acadia/Makefile deleted file mode 100644 index 931f04b..0000000 @@ -71642,76 +16706,3 @@ index 0000000..924a47a + */ + (*uboot)(); +} -diff --git a/tools/envcrc.c b/tools/envcrc.c -index 4334cdf..5b0f7cd 100644 ---- a/tools/envcrc.c -+++ b/tools/envcrc.c -@@ -24,6 +24,7 @@ - #include - #include - #include -+#include - #include - - #ifndef __ASSEMBLY__ -@@ -77,19 +78,56 @@ extern unsigned char environment; - int main (int argc, char **argv) - { - #ifdef ENV_IS_EMBEDDED -+ unsigned char pad = 0x00; - uint32_t crc; - unsigned char *envptr = &environment, - *dataptr = envptr + ENV_HEADER_SIZE; - unsigned int datasize = ENV_SIZE; -+ unsigned int eoe; -+ -+ if (argv[1] && !strncmp(argv[1], "--binary", 8)) { -+ int ipad = 0xff; -+ if (argv[1][8] == '=') -+ sscanf(argv[1] + 9, "%i", &ipad); -+ pad = ipad; -+ } -+ -+ if (pad) { -+ /* find the end of env */ -+ for (eoe = 0; eoe < datasize - 1; ++eoe) -+ if (!dataptr[eoe] && !dataptr[eoe+1]) { -+ eoe += 2; -+ break; -+ } -+ if (eoe < datasize - 1) -+ memset(dataptr + eoe, pad, datasize - eoe); -+ } - - crc = crc32 (0, dataptr, datasize); - - /* Check if verbose mode is activated passing a parameter to the program */ - if (argc > 1) { -- printf ("CRC32 from offset %08X to %08X of environment = %08X\n", -- (unsigned int) (dataptr - envptr), -- (unsigned int) (dataptr - envptr) + datasize, -- crc); -+ if (!strncmp(argv[1], "--binary", 8)) { -+ int le = (argc > 2 ? !strcmp(argv[2], "le") : 1); -+ size_t i, start, end, step; -+ if (le) { -+ start = 0; -+ end = ENV_HEADER_SIZE; -+ step = 1; -+ } else { -+ start = ENV_HEADER_SIZE - 1; -+ end = -1; -+ step = -1; -+ } -+ for (i = start; i != end; i += step) -+ printf("%c", (crc & (0xFF << (i * 8))) >> (i * 8)); -+ fwrite(dataptr, 1, datasize, stdout); -+ } else { -+ printf("CRC32 from offset %08X to %08X of environment = %08X\n", -+ (unsigned int) (dataptr - envptr), -+ (unsigned int) (dataptr - envptr) + datasize, -+ crc); -+ } - } else { - printf ("0x%08X\n", crc); - }