mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2025-04-21 12:27:27 +03:00
[brcm63xx] add experimental support for bcm6338
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@13691 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
@@ -15,6 +15,15 @@
|
||||
/* Clock Control register */
|
||||
#define PERF_CKCTL_REG 0x4
|
||||
|
||||
#define CKCTL_6338_ENET_EN (1 << 4)
|
||||
#define CKCTL_6338_USBS_EN (1 << 4)
|
||||
#define CKCTL_6338_SAR_EN (1 << 5)
|
||||
#define CKCTL_6338_SPI_EN (1 << 9)
|
||||
|
||||
#define CKCTL_6338_ALL_SAFE_EN (CKCTL_6338_ENET_EN | \
|
||||
CKCTL_6338_SAR_EN | \
|
||||
CKCTL_6338_SPI_EN)
|
||||
|
||||
#define CKCTL_6348_ADSLPHY_EN (1 << 0)
|
||||
#define CKCTL_6348_MPI_EN (1 << 1)
|
||||
#define CKCTL_6348_SDRAM_EN (1 << 2)
|
||||
@@ -83,6 +92,25 @@
|
||||
/* Soft Reset register */
|
||||
#define PERF_SOFTRESET_REG 0x28
|
||||
|
||||
#define SOFTRESET_6338_SPI_MASK (1 << 0)
|
||||
#define SOFTRESET_6338_ENET_MASK (1 << 2)
|
||||
#define SOFTRESET_6338_USBH_MASK (1 << 3)
|
||||
#define SOFTRESET_6338_USBS_MASK (1 << 4)
|
||||
#define SOFTRESET_6338_ADSL_MASK (1 << 5)
|
||||
#define SOFTRESET_6338_DMAMEM_MASK (1 << 6)
|
||||
#define SOFTRESET_6338_SAR_MASK (1 << 7)
|
||||
#define SOFTRESET_6338_ACLC_MASK (1 << 8)
|
||||
#define SOFTRESET_6338_ADSLMIPSPLL_MASK (1 << 10)
|
||||
#define SOFTRESET_6338_ALL (SOFTRESET_6338_SPI_MASK | \
|
||||
SOFTRESET_6338_ENET_MASK | \
|
||||
SOFTRESET_6338_USBH_MASK | \
|
||||
SOFTRESET_6338_USBS_MASK | \
|
||||
SOFTRESET_6338_ADSL_MASK | \
|
||||
SOFTRESET_6338_DMAMEM_MASK | \
|
||||
SOFTRESET_6338_SAR_MASK | \
|
||||
SOFTRESET_6338_ACLC_MASK | \
|
||||
SOFTRESET_6338_ADSLMIPSPLL_MASK)
|
||||
|
||||
#define SOFTRESET_6348_SPI_MASK (1 << 0)
|
||||
#define SOFTRESET_6348_ENET_MASK (1 << 2)
|
||||
#define SOFTRESET_6348_USBH_MASK (1 << 3)
|
||||
@@ -763,7 +791,7 @@
|
||||
#define SPI_INT_MASK 0x704
|
||||
#define SPI_INTR_CMD_DONE 0x01
|
||||
#define SPI_INTR_RX_OVERFLOW 0x02
|
||||
#define SPI_INTR_INTR_TX_UNDERFLOW 0x04
|
||||
#define SPI_INTR_TX_UNDERFLOW 0x04
|
||||
#define SPI_INTR_TX_OVERFLOW 0x08
|
||||
#define SPI_INTR_RX_UNDERFLOW 0x10
|
||||
#define SPI_INTR_CLEAR_ALL 0x1f
|
||||
|
||||
Reference in New Issue
Block a user