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ar71xx: update AR7240 PCI code

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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@18860 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
juhosg
2009-12-20 13:46:23 +00:00
parent 0574916d37
commit 69905f6100
11 changed files with 226 additions and 84 deletions
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17
target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
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@@ -178,6 +178,7 @@ extern enum ar71xx_mach_type ar71xx_mach;
#define AR71XX_ETH1_PLL_SHIFT 19
#define AR724X_PLL_REG_CPU_CONFIG 0x00
#define AR724X_PLL_REG_PCIE_CONFIG 0x18
#define AR724X_PLL_DIV_SHIFT 0
#define AR724X_PLL_DIV_MASK 0x3ff
@@ -384,9 +385,13 @@ void ar71xx_ddr_flush(u32 reg);
#define AR724X_PCI_CFG_BASE (AR71XX_PCI_MEM_BASE + 0x4000000)
#define AR724X_PCI_CFG_SIZE 0x1000
#define AR724X_PCI_REG_APP 0x00
#define AR724X_PCI_REG_RESET 0x18
#define AR724X_PCI_REG_INT_STATUS 0x4c
#define AR724X_PCI_REG_INT_MASK 0x50
#define AR724X_PCI_APP_LTSSM_ENABLE BIT(0)
#define AR724X_PCI_INT_DEV0 BIT(14)
static inline void ar724x_pci_wr(unsigned reg, u32 val)
@@ -398,6 +403,14 @@ static inline void ar724x_pci_wr(unsigned reg, u32 val)
iounmap(base);
}
static inline void ar724x_pci_wr_nf(unsigned reg, u32 val)
{
void __iomem *base;
base = ioremap_nocache(AR724X_PCI_CTRL_BASE, AR724X_PCI_CTRL_SIZE);
iounmap(base);
}
static inline u32 ar724x_pci_rr(unsigned reg)
{
void __iomem *base;
@@ -477,6 +490,10 @@ static inline u32 ar724x_pci_rr(unsigned reg)
#define RESET_MODULE_PCI_BUS BIT(1)
#define RESET_MODULE_PCI_CORE BIT(0)
#define AR724X_RESET_PCIE_PHY_SERIAL BIT(10)
#define AR724X_RESET_PCIE_PHY BIT(7)
#define AR724X_RESET_PCIE BIT(6)
#define REV_ID_MAJOR_MASK 0xf0
#define REV_ID_MAJOR_AR71XX 0xa0
#define REV_ID_MAJOR_AR913X 0xb0