mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-26 00:05:31 +02:00
[ifxmips] cleanup sources and prepare for 2.6.27
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@13660 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
parent
84938fc03d
commit
6ad1668c37
@ -12,6 +12,7 @@ BOARDNAME:=Infineon Mips
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FEATURES:=squashfs jffs2
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FEATURES:=squashfs jffs2
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SUBTARGETS:=generic nfs
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SUBTARGETS:=generic nfs
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LINUX_VERSION:=2.6.26.8
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LINUX_VERSION:=2.6.26.8
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#LINUX_VERSION:=2.6.27.9
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include $(INCLUDE_DIR)/target.mk
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include $(INCLUDE_DIR)/target.mk
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DEFAULT_PACKAGES+=uboot-ifxmips
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DEFAULT_PACKAGES+=uboot-ifxmips
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@ -22,11 +22,11 @@ CONFIG_CPU_HAS_SYNC=y
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# CONFIG_CPU_LITTLE_ENDIAN is not set
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# CONFIG_CPU_LITTLE_ENDIAN is not set
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# CONFIG_CPU_LOONGSON2 is not set
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# CONFIG_CPU_LOONGSON2 is not set
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CONFIG_CPU_MIPS32=y
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CONFIG_CPU_MIPS32=y
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CONFIG_CPU_MIPS32_R1=y
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# CONFIG_CPU_MIPS32_R1 is not set
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# CONFIG_CPU_MIPS32_R2 is not set
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CONFIG_CPU_MIPS32_R2=y
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# CONFIG_CPU_MIPS64_R1 is not set
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# CONFIG_CPU_MIPS64_R1 is not set
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# CONFIG_CPU_MIPS64_R2 is not set
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# CONFIG_CPU_MIPS64_R2 is not set
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CONFIG_CPU_MIPSR1=y
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CONFIG_CPU_MIPSR2=y
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# CONFIG_CPU_NEVADA is not set
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# CONFIG_CPU_NEVADA is not set
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# CONFIG_CPU_R10000 is not set
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# CONFIG_CPU_R10000 is not set
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# CONFIG_CPU_R3000 is not set
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# CONFIG_CPU_R3000 is not set
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@ -113,6 +113,7 @@ CONFIG_MIPS_MT_DISABLED=y
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# CONFIG_MIPS_MT_SMTC is not set
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# CONFIG_MIPS_MT_SMTC is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_MIPS_SIM is not set
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# CONFIG_MIPS_SIM is not set
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# CONFIG_MIPS_VPE_LOADER is not set
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CONFIG_MTD=y
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CONFIG_MTD=y
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# CONFIG_MTD_ABSENT is not set
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# CONFIG_MTD_ABSENT is not set
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CONFIG_MTD_BLKDEVS=y
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CONFIG_MTD_BLKDEVS=y
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@ -166,7 +167,6 @@ CONFIG_MTD_PARTITIONS=y
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# CONFIG_NE2K_PCI is not set
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# CONFIG_NE2K_PCI is not set
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# CONFIG_NET_VENDOR_3COM is not set
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# CONFIG_NET_VENDOR_3COM is not set
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# CONFIG_NO_IOPORT is not set
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# CONFIG_NO_IOPORT is not set
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# CONFIG_OCF_OCF is not set
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CONFIG_PAGEFLAGS_EXTENDED=y
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CONFIG_PAGEFLAGS_EXTENDED=y
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# CONFIG_PAGE_SIZE_16KB is not set
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# CONFIG_PAGE_SIZE_16KB is not set
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CONFIG_PAGE_SIZE_4KB=y
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CONFIG_PAGE_SIZE_4KB=y
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@ -180,6 +180,7 @@ CONFIG_PCI_DOMAINS=y
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# CONFIG_PMC_YOSEMITE is not set
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# CONFIG_PMC_YOSEMITE is not set
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# CONFIG_PNX8550_JBS is not set
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# CONFIG_PNX8550_JBS is not set
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# CONFIG_PNX8550_STB810 is not set
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# CONFIG_PNX8550_STB810 is not set
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# CONFIG_PROM_EMU is not set
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# CONFIG_R6040 is not set
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# CONFIG_R6040 is not set
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CONFIG_RFKILL_LEDS=y
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CONFIG_RFKILL_LEDS=y
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CONFIG_RTC_LIB=y
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CONFIG_RTC_LIB=y
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@ -208,10 +209,12 @@ CONFIG_SSB_POSSIBLE=y
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CONFIG_SWAP_IO_SPACE=y
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CONFIG_SWAP_IO_SPACE=y
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CONFIG_SYSVIPC_SYSCTL=y
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CONFIG_SYSVIPC_SYSCTL=y
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CONFIG_SYS_HAS_CPU_MIPS32_R1=y
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CONFIG_SYS_HAS_CPU_MIPS32_R1=y
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CONFIG_SYS_HAS_CPU_MIPS32_R2=y
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CONFIG_SYS_HAS_EARLY_PRINTK=y
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CONFIG_SYS_HAS_EARLY_PRINTK=y
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CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
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CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
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CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
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CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
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CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
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CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
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CONFIG_SYS_SUPPORTS_MULTITHREADING=y
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# CONFIG_TC35815 is not set
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# CONFIG_TC35815 is not set
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# CONFIG_TICK_ONESHOT is not set
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# CONFIG_TICK_ONESHOT is not set
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# CONFIG_TOSHIBA_JMR3927 is not set
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# CONFIG_TOSHIBA_JMR3927 is not set
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257
target/linux/ifxmips/config-2.6.27
Normal file
257
target/linux/ifxmips/config-2.6.27
Normal file
@ -0,0 +1,257 @@
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CONFIG_32BIT=y
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# CONFIG_64BIT is not set
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# CONFIG_8139TOO is not set
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# CONFIG_ARCH_HAS_ILOG2_U32 is not set
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# CONFIG_ARCH_HAS_ILOG2_U64 is not set
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CONFIG_ARCH_POPULATES_NODE_MAP=y
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# CONFIG_ARCH_SUPPORTS_MSI is not set
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CONFIG_ARCH_SUPPORTS_OPROFILE=y
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CONFIG_ARCH_SUSPEND_POSSIBLE=y
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# CONFIG_ATM is not set
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CONFIG_BASE_SMALL=0
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# CONFIG_BCM47XX is not set
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CONFIG_BITREVERSE=y
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# CONFIG_BT is not set
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CONFIG_CEVT_R4K=y
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CONFIG_CLASSIC_RCU=y
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CONFIG_CMDLINE="console=ttyS0,9600 rootfstype=squashfs,jffs2 init=/etc/preinit"
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CONFIG_CPU_BIG_ENDIAN=y
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CONFIG_CPU_HAS_LLSC=y
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CONFIG_CPU_HAS_PREFETCH=y
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CONFIG_CPU_HAS_SYNC=y
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# CONFIG_CPU_LITTLE_ENDIAN is not set
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# CONFIG_CPU_LOONGSON2 is not set
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CONFIG_CPU_MIPS32=y
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# CONFIG_CPU_MIPS32_R1 is not set
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CONFIG_CPU_MIPS32_R2=y
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# CONFIG_CPU_MIPS64_R1 is not set
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# CONFIG_CPU_MIPS64_R2 is not set
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CONFIG_CPU_MIPSR2=y
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# CONFIG_CPU_NEVADA is not set
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# CONFIG_CPU_R10000 is not set
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# CONFIG_CPU_R3000 is not set
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# CONFIG_CPU_R4300 is not set
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# CONFIG_CPU_R4X00 is not set
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# CONFIG_CPU_R5000 is not set
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# CONFIG_CPU_R5432 is not set
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# CONFIG_CPU_R6000 is not set
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# CONFIG_CPU_R8000 is not set
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# CONFIG_CPU_RM7000 is not set
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# CONFIG_CPU_RM9000 is not set
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# CONFIG_CPU_SB1 is not set
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CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
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CONFIG_CPU_SUPPORTS_HIGHMEM=y
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# CONFIG_CPU_TX39XX is not set
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# CONFIG_CPU_TX49XX is not set
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# CONFIG_CPU_VR41XX is not set
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CONFIG_CRYPTO_GF128MUL=m
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CONFIG_CSRC_R4K=y
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CONFIG_DEVPORT=y
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# CONFIG_DM9000 is not set
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CONFIG_DMA_NEED_PCI_MAP_STATE=y
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CONFIG_DMA_NONCOHERENT=y
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CONFIG_EARLY_PRINTK=y
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CONFIG_FS_POSIX_ACL=y
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CONFIG_GENERIC_CLOCKEVENTS=y
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CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
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CONFIG_GENERIC_CMOS_UPDATE=y
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# CONFIG_GENERIC_FIND_FIRST_BIT is not set
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CONFIG_GENERIC_FIND_NEXT_BIT=y
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CONFIG_GENERIC_GPIO=y
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# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
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CONFIG_GPIO_DEVICE=y
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CONFIG_HAS_DMA=y
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CONFIG_HAS_IOMEM=y
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CONFIG_HAS_IOPORT=y
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CONFIG_HAVE_ARCH_KGDB=y
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# CONFIG_HAVE_ARCH_TRACEHOOK is not set
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# CONFIG_HAVE_CLK is not set
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# CONFIG_HAVE_DMA_ATTRS is not set
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# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
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# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
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CONFIG_HAVE_IDE=y
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# CONFIG_HAVE_IOREMAP_PROT is not set
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# CONFIG_HAVE_KPROBES is not set
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# CONFIG_HAVE_KRETPROBES is not set
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CONFIG_HAVE_OPROFILE=y
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CONFIG_HAVE_STD_PC_SERIAL_PORT=y
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# CONFIG_HIGH_RES_TIMERS is not set
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CONFIG_HW_HAS_PCI=y
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CONFIG_HW_RANDOM=y
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# CONFIG_I2C is not set
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# CONFIG_IDE is not set
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CONFIG_IFXMIPS=y
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CONFIG_IFXMIPS_EEPROM=y
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CONFIG_IFXMIPS_GPIO_RST_BTN=y
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# CONFIG_IFXMIPS_MEI is not set
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CONFIG_IFXMIPS_MII0=y
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# CONFIG_IFXMIPS_PROM_ASC0 is not set
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CONFIG_IFXMIPS_PROM_ASC1=y
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CONFIG_IFXMIPS_SSC=y
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CONFIG_IFXMIPS_WDT=y
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CONFIG_INITRAMFS_SOURCE=""
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CONFIG_IRQ_CPU=y
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CONFIG_KALLSYMS=y
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CONFIG_KMOD=y
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# CONFIG_LEDS_ALIX is not set
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CONFIG_LEDS_GPIO=y
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CONFIG_LEDS_IFXMIPS=y
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# CONFIG_LEMOTE_FULONG is not set
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# CONFIG_MACH_ALCHEMY is not set
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_MACH_TX39XX is not set
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# CONFIG_MACH_TX49XX is not set
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# CONFIG_MACH_VR41XX is not set
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# CONFIG_MFD_CORE is not set
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# CONFIG_MFD_TMIO is not set
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# CONFIG_MIKROTIK_RB532 is not set
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CONFIG_MIPS=y
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# CONFIG_MIPS_COBALT is not set
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CONFIG_MIPS_L1_CACHE_SHIFT=5
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# CONFIG_MIPS_MACHINE is not set
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# CONFIG_MIPS_MALTA is not set
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CONFIG_MIPS_MT_DISABLED=y
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# CONFIG_MIPS_MT_SMP is not set
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# CONFIG_MIPS_MT_SMTC is not set
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# CONFIG_MIPS_SIM is not set
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# CONFIG_MIPS_VPE_LOADER is not set
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CONFIG_MTD=y
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# CONFIG_MTD_ABSENT is not set
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CONFIG_MTD_BLKDEVS=y
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CONFIG_MTD_BLOCK=y
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# CONFIG_MTD_BLOCK2MTD is not set
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CONFIG_MTD_CFI=y
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CONFIG_MTD_CFI_ADV_OPTIONS=y
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CONFIG_MTD_CFI_AMDSTD=y
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# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
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CONFIG_MTD_CFI_GEOMETRY=y
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CONFIG_MTD_CFI_I1=y
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CONFIG_MTD_CFI_I2=y
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# CONFIG_MTD_CFI_I4 is not set
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# CONFIG_MTD_CFI_I8 is not set
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# CONFIG_MTD_CFI_INTELEXT is not set
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# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
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CONFIG_MTD_CFI_NOSWAP=y
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# CONFIG_MTD_CFI_STAA is not set
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CONFIG_MTD_CFI_UTIL=y
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CONFIG_MTD_CHAR=y
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CONFIG_MTD_CMDLINE_PARTS=y
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CONFIG_MTD_COMPLEX_MAPPINGS=y
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# CONFIG_MTD_CONCAT is not set
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CONFIG_MTD_GEN_PROBE=y
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CONFIG_MTD_IFXMIPS=y
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# CONFIG_MTD_JEDECPROBE is not set
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# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
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# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
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CONFIG_MTD_MAP_BANK_WIDTH_2=y
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# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
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# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
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# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
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# CONFIG_MTD_MTDRAM is not set
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# CONFIG_MTD_ONENAND is not set
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# CONFIG_MTD_OTP is not set
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CONFIG_MTD_PARTITIONS=y
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# CONFIG_MTD_PCI is not set
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# CONFIG_MTD_PHRAM is not set
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# CONFIG_MTD_PHYSMAP is not set
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# CONFIG_MTD_PLATRAM is not set
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# CONFIG_MTD_PMC551 is not set
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# CONFIG_MTD_RAM is not set
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# CONFIG_MTD_REDBOOT_PARTS is not set
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# CONFIG_MTD_ROM is not set
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# CONFIG_MTD_SLRAM is not set
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# CONFIG_NATSEMI is not set
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CONFIG_NF_CT_ACCT=y
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# CONFIG_NO_IOPORT is not set
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CONFIG_PAGEFLAGS_EXTENDED=y
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||||||
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# CONFIG_PAGE_SIZE_16KB is not set
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CONFIG_PAGE_SIZE_4KB=y
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# CONFIG_PAGE_SIZE_64KB is not set
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||||||
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# CONFIG_PAGE_SIZE_8KB is not set
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||||||
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CONFIG_PCI=y
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CONFIG_PCI_DOMAINS=y
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||||||
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# CONFIG_PCSPKR_PLATFORM is not set
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||||||
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# CONFIG_PMC_MSP is not set
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# CONFIG_PMC_YOSEMITE is not set
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||||||
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# CONFIG_PNX8550_JBS is not set
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||||||
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# CONFIG_PNX8550_STB810 is not set
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||||||
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# CONFIG_PROBE_INITRD_HEADER is not set
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||||||
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# CONFIG_PROM_EMU is not set
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||||||
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# CONFIG_R6040 is not set
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||||||
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CONFIG_RFKILL_LEDS=y
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||||||
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CONFIG_RTC_LIB=y
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||||||
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CONFIG_RWSEM_GENERIC_SPINLOCK=y
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||||||
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CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
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||||||
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CONFIG_SCSI_WAIT_SCAN=m
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||||||
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# CONFIG_SERIAL_8250 is not set
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||||||
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CONFIG_SERIAL_IFXMIPS=y
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||||||
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# CONFIG_SGI_IP22 is not set
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||||||
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# CONFIG_SGI_IP27 is not set
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||||||
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# CONFIG_SGI_IP28 is not set
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||||||
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# CONFIG_SGI_IP32 is not set
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||||||
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# CONFIG_SIBYTE_BIGSUR is not set
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||||||
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# CONFIG_SIBYTE_CARMEL is not set
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||||||
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# CONFIG_SIBYTE_CRHINE is not set
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||||||
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# CONFIG_SIBYTE_CRHONE is not set
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||||||
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# CONFIG_SIBYTE_LITTLESUR is not set
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||||||
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# CONFIG_SIBYTE_RHONE is not set
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||||||
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# CONFIG_SIBYTE_SENTOSA is not set
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||||||
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# CONFIG_SIBYTE_SWARM is not set
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||||||
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# CONFIG_SOFT_WATCHDOG is not set
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||||||
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# CONFIG_SPARSEMEM_STATIC is not set
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||||||
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# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
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||||||
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CONFIG_SSB_POSSIBLE=y
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||||||
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# CONFIG_SWAP is not set
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||||||
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CONFIG_SWAP_IO_SPACE=y
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||||||
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CONFIG_SYSVIPC_SYSCTL=y
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||||||
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CONFIG_SYS_HAS_CPU_MIPS32_R1=y
|
||||||
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CONFIG_SYS_HAS_CPU_MIPS32_R2=y
|
||||||
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CONFIG_SYS_HAS_EARLY_PRINTK=y
|
||||||
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CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
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||||||
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CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
|
||||||
|
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
|
||||||
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CONFIG_SYS_SUPPORTS_MULTITHREADING=y
|
||||||
|
# CONFIG_TC35815 is not set
|
||||||
|
# CONFIG_TICK_ONESHOT is not set
|
||||||
|
CONFIG_TRAD_SIGNALS=y
|
||||||
|
CONFIG_USB=m
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||||||
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CONFIG_USB_AMD5536UDC=y
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||||||
|
# CONFIG_USB_CDC_COMPOSITE is not set
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||||||
|
# CONFIG_USB_DWC_HCD is not set
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||||||
|
# CONFIG_USB_EHCI_HCD is not set
|
||||||
|
CONFIG_USB_ETH=y
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||||||
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CONFIG_USB_ETH_RNDIS=y
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||||||
|
# CONFIG_USB_FILE_STORAGE is not set
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||||||
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CONFIG_USB_GADGET=y
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||||||
|
# CONFIG_USB_GADGETFS is not set
|
||||||
|
CONFIG_USB_GADGET_AMD5536UDC=y
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||||||
|
# CONFIG_USB_GADGET_AT91 is not set
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||||||
|
# CONFIG_USB_GADGET_ATMEL_USBA is not set
|
||||||
|
CONFIG_USB_GADGET_DEBUG_FILES=y
|
||||||
|
CONFIG_USB_GADGET_DEBUG_FS=y
|
||||||
|
CONFIG_USB_GADGET_DUALSPEED=y
|
||||||
|
# CONFIG_USB_GADGET_DUMMY_HCD is not set
|
||||||
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# CONFIG_USB_GADGET_FSL_USB2 is not set
|
||||||
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# CONFIG_USB_GADGET_GOKU is not set
|
||||||
|
# CONFIG_USB_GADGET_LH7A40X is not set
|
||||||
|
# CONFIG_USB_GADGET_M66592 is not set
|
||||||
|
# CONFIG_USB_GADGET_MUSB_HDRC is not set
|
||||||
|
# CONFIG_USB_GADGET_NET2280 is not set
|
||||||
|
# CONFIG_USB_GADGET_OMAP is not set
|
||||||
|
# CONFIG_USB_GADGET_PXA25X is not set
|
||||||
|
# CONFIG_USB_GADGET_PXA27X is not set
|
||||||
|
# CONFIG_USB_GADGET_S3C2410 is not set
|
||||||
|
CONFIG_USB_GADGET_SELECTED=y
|
||||||
|
# CONFIG_USB_G_PRINTER is not set
|
||||||
|
# CONFIG_USB_G_SERIAL is not set
|
||||||
|
# CONFIG_USB_MIDI_GADGET is not set
|
||||||
|
CONFIG_USB_SUPPORT=y
|
||||||
|
# CONFIG_USB_UHCI_HCD is not set
|
||||||
|
# CONFIG_USB_ZERO is not set
|
||||||
|
# CONFIG_VGASTATE is not set
|
||||||
|
# CONFIG_VIA_RHINE is not set
|
||||||
|
CONFIG_VIDEO_MEDIA=m
|
||||||
|
CONFIG_VIDEO_V4L2=m
|
||||||
|
CONFIG_VIDEO_V4L2_COMMON=m
|
||||||
|
CONFIG_ZONE_DMA_FLAG=0
|
@ -70,7 +70,7 @@ struct ifxmips_board {
|
|||||||
int num_devs;
|
int num_devs;
|
||||||
};
|
};
|
||||||
|
|
||||||
spinlock_t ebu_lock = SPIN_LOCK_UNLOCKED;
|
DEFINE_SPINLOCK(ebu_lock);
|
||||||
EXPORT_SYMBOL_GPL(ebu_lock);
|
EXPORT_SYMBOL_GPL(ebu_lock);
|
||||||
|
|
||||||
static unsigned char ifxmips_ethaddr[6];
|
static unsigned char ifxmips_ethaddr[6];
|
||||||
@ -354,8 +354,8 @@ int __init ifxmips_init_devices(void)
|
|||||||
#endif
|
#endif
|
||||||
ifxmips_led_data.leds = board->ifxmips_leds;
|
ifxmips_led_data.leds = board->ifxmips_leds;
|
||||||
|
|
||||||
printk(KERN_INFO "%s:%s[%d]adding %d devs\n",
|
printk(KERN_INFO "%s: adding %d devs\n",
|
||||||
__FILE__, __func__, __LINE__, board->num_devs);
|
__func__, board->num_devs);
|
||||||
|
|
||||||
ifxmips_gpio.resource = &board->reset_resource;
|
ifxmips_gpio.resource = &board->reset_resource;
|
||||||
ifxmips_gpio_dev.resource = &board->gpiodev_resource;
|
ifxmips_gpio_dev.resource = &board->gpiodev_resource;
|
||||||
|
@ -24,8 +24,8 @@
|
|||||||
#include <linux/fs.h>
|
#include <linux/fs.h>
|
||||||
#include <linux/miscdevice.h>
|
#include <linux/miscdevice.h>
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <asm/uaccess.h>
|
#include <linux/uaccess.h>
|
||||||
#include <asm/unistd.h>
|
#include <linux/unistd.h>
|
||||||
#include <asm/irq.h>
|
#include <asm/irq.h>
|
||||||
#include <asm/div64.h>
|
#include <asm/div64.h>
|
||||||
#include <linux/errno.h>
|
#include <linux/errno.h>
|
||||||
|
@ -15,9 +15,9 @@
|
|||||||
#include <linux/vmalloc.h>
|
#include <linux/vmalloc.h>
|
||||||
#include <linux/interrupt.h>
|
#include <linux/interrupt.h>
|
||||||
#include <linux/delay.h>
|
#include <linux/delay.h>
|
||||||
#include <asm/uaccess.h>
|
#include <linux/uaccess.h>
|
||||||
#include <linux/errno.h>
|
#include <linux/errno.h>
|
||||||
#include <asm/io.h>
|
#include <linux/io.h>
|
||||||
|
|
||||||
#include <asm/ifxmips/ifxmips.h>
|
#include <asm/ifxmips/ifxmips.h>
|
||||||
#include <asm/ifxmips/ifxmips_irq.h>
|
#include <asm/ifxmips/ifxmips_irq.h>
|
||||||
@ -40,8 +40,8 @@ u64 *g_desc_list;
|
|||||||
_dma_device_info dma_devs[MAX_DMA_DEVICE_NUM];
|
_dma_device_info dma_devs[MAX_DMA_DEVICE_NUM];
|
||||||
_dma_channel_info dma_chan[MAX_DMA_CHANNEL_NUM];
|
_dma_channel_info dma_chan[MAX_DMA_CHANNEL_NUM];
|
||||||
|
|
||||||
char global_device_name[MAX_DMA_DEVICE_NUM][20] =
|
static const char *global_device_name[MAX_DMA_DEVICE_NUM] =
|
||||||
{ {"PPE"}, {"DEU"}, {"SPI"}, {"SDIO"}, {"MCTRL0"}, {"MCTRL1"} };
|
{ "PPE", "DEU", "SPI", "SDIO", "MCTRL0", "MCTRL1" };
|
||||||
|
|
||||||
_dma_chan_map default_dma_map[MAX_DMA_CHANNEL_NUM] = {
|
_dma_chan_map default_dma_map[MAX_DMA_CHANNEL_NUM] = {
|
||||||
{"PPE", IFXMIPS_DMA_RX, 0, IFXMIPS_DMA_CH0_INT, 0},
|
{"PPE", IFXMIPS_DMA_RX, 0, IFXMIPS_DMA_CH0_INT, 0},
|
||||||
@ -67,34 +67,30 @@ _dma_chan_map default_dma_map[MAX_DMA_CHANNEL_NUM] = {
|
|||||||
};
|
};
|
||||||
|
|
||||||
_dma_chan_map *chan_map = default_dma_map;
|
_dma_chan_map *chan_map = default_dma_map;
|
||||||
volatile u32 g_ifxmips_dma_int_status = 0;
|
volatile u32 g_ifxmips_dma_int_status;
|
||||||
volatile int g_ifxmips_dma_in_process = 0;/*0=not in process,1=in process*/
|
volatile int g_ifxmips_dma_in_process; /* 0=not in process, 1=in process */
|
||||||
|
|
||||||
void do_dma_tasklet(unsigned long);
|
void do_dma_tasklet(unsigned long);
|
||||||
DECLARE_TASKLET(dma_tasklet, do_dma_tasklet, 0);
|
DECLARE_TASKLET(dma_tasklet, do_dma_tasklet, 0);
|
||||||
|
|
||||||
u8*
|
u8 *common_buffer_alloc(int len, int *byte_offset, void **opt)
|
||||||
common_buffer_alloc (int len, int *byte_offset, void **opt)
|
|
||||||
{
|
{
|
||||||
u8 *buffer = (u8 *) kmalloc (len * sizeof (u8), GFP_KERNEL);
|
u8 *buffer = kmalloc(len * sizeof(u8), GFP_KERNEL);
|
||||||
|
|
||||||
*byte_offset = 0;
|
*byte_offset = 0;
|
||||||
|
|
||||||
return buffer;
|
return buffer;
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void common_buffer_free(u8 *dataptr, void *opt)
|
||||||
common_buffer_free (u8 *dataptr, void *opt)
|
|
||||||
{
|
{
|
||||||
if (dataptr)
|
|
||||||
kfree(dataptr);
|
kfree(dataptr);
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void enable_ch_irq(_dma_channel_info *pCh)
|
||||||
enable_ch_irq (_dma_channel_info *pCh)
|
|
||||||
{
|
{
|
||||||
int chan_no = (int)(pCh - dma_chan);
|
int chan_no = (int)(pCh - dma_chan);
|
||||||
int flag;
|
unsigned long flag;
|
||||||
|
|
||||||
local_irq_save(flag);
|
local_irq_save(flag);
|
||||||
ifxmips_w32(chan_no, IFXMIPS_DMA_CS);
|
ifxmips_w32(chan_no, IFXMIPS_DMA_CS);
|
||||||
@ -104,10 +100,9 @@ enable_ch_irq (_dma_channel_info *pCh)
|
|||||||
ifxmips_enable_irq(pCh->irq);
|
ifxmips_enable_irq(pCh->irq);
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void disable_ch_irq(_dma_channel_info *pCh)
|
||||||
disable_ch_irq (_dma_channel_info *pCh)
|
|
||||||
{
|
{
|
||||||
int flag;
|
unsigned long flag;
|
||||||
int chan_no = (int) (pCh - dma_chan);
|
int chan_no = (int) (pCh - dma_chan);
|
||||||
|
|
||||||
local_irq_save(flag);
|
local_irq_save(flag);
|
||||||
@ -119,10 +114,9 @@ disable_ch_irq (_dma_channel_info *pCh)
|
|||||||
ifxmips_mask_and_ack_irq(pCh->irq);
|
ifxmips_mask_and_ack_irq(pCh->irq);
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void open_chan(_dma_channel_info *pCh)
|
||||||
open_chan (_dma_channel_info *pCh)
|
|
||||||
{
|
{
|
||||||
int flag;
|
unsigned long flag;
|
||||||
int chan_no = (int)(pCh - dma_chan);
|
int chan_no = (int)(pCh - dma_chan);
|
||||||
|
|
||||||
local_irq_save(flag);
|
local_irq_save(flag);
|
||||||
@ -133,10 +127,9 @@ open_chan (_dma_channel_info *pCh)
|
|||||||
local_irq_restore(flag);
|
local_irq_restore(flag);
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void close_chan(_dma_channel_info *pCh)
|
||||||
close_chan(_dma_channel_info *pCh)
|
|
||||||
{
|
{
|
||||||
int flag;
|
unsigned long flag;
|
||||||
int chan_no = (int) (pCh - dma_chan);
|
int chan_no = (int) (pCh - dma_chan);
|
||||||
|
|
||||||
local_irq_save(flag);
|
local_irq_save(flag);
|
||||||
@ -146,8 +139,7 @@ close_chan(_dma_channel_info *pCh)
|
|||||||
local_irq_restore(flag);
|
local_irq_restore(flag);
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void reset_chan(_dma_channel_info *pCh)
|
||||||
reset_chan (_dma_channel_info *pCh)
|
|
||||||
{
|
{
|
||||||
int chan_no = (int) (pCh - dma_chan);
|
int chan_no = (int) (pCh - dma_chan);
|
||||||
|
|
||||||
@ -155,14 +147,13 @@ reset_chan (_dma_channel_info *pCh)
|
|||||||
ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_CCTRL) | 2, IFXMIPS_DMA_CCTRL);
|
ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_CCTRL) | 2, IFXMIPS_DMA_CCTRL);
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void rx_chan_intr_handler(int chan_no)
|
||||||
rx_chan_intr_handler (int chan_no)
|
|
||||||
{
|
{
|
||||||
_dma_device_info *pDev = (_dma_device_info *)dma_chan[chan_no].dma_dev;
|
_dma_device_info *pDev = (_dma_device_info *)dma_chan[chan_no].dma_dev;
|
||||||
_dma_channel_info *pCh = &dma_chan[chan_no];
|
_dma_channel_info *pCh = &dma_chan[chan_no];
|
||||||
struct rx_desc *rx_desc_p;
|
struct rx_desc *rx_desc_p;
|
||||||
int tmp;
|
int tmp;
|
||||||
int flag;
|
unsigned long flag;
|
||||||
|
|
||||||
/*handle command complete interrupt */
|
/*handle command complete interrupt */
|
||||||
rx_desc_p = (struct rx_desc *)pCh->desc_base + pCh->curr_desc;
|
rx_desc_p = (struct rx_desc *)pCh->desc_base + pCh->curr_desc;
|
||||||
@ -186,13 +177,12 @@ rx_chan_intr_handler (int chan_no)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
inline void
|
inline void tx_chan_intr_handler(int chan_no)
|
||||||
tx_chan_intr_handler (int chan_no)
|
|
||||||
{
|
{
|
||||||
_dma_device_info *pDev = (_dma_device_info *)dma_chan[chan_no].dma_dev;
|
_dma_device_info *pDev = (_dma_device_info *)dma_chan[chan_no].dma_dev;
|
||||||
_dma_channel_info *pCh = &dma_chan[chan_no];
|
_dma_channel_info *pCh = &dma_chan[chan_no];
|
||||||
int tmp;
|
int tmp;
|
||||||
int flag;
|
unsigned long flag;
|
||||||
|
|
||||||
local_irq_save(flag);
|
local_irq_save(flag);
|
||||||
tmp = ifxmips_r32(IFXMIPS_DMA_CS);
|
tmp = ifxmips_r32(IFXMIPS_DMA_CS);
|
||||||
@ -206,62 +196,51 @@ tx_chan_intr_handler (int chan_no)
|
|||||||
pDev->intr_handler(pDev, TRANSMIT_CPT_INT);
|
pDev->intr_handler(pDev, TRANSMIT_CPT_INT);
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void do_dma_tasklet(unsigned long unused)
|
||||||
do_dma_tasklet (unsigned long unused)
|
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
int chan_no = 0;
|
int chan_no = 0;
|
||||||
int budget = DMA_INT_BUDGET;
|
int budget = DMA_INT_BUDGET;
|
||||||
int weight = 0;
|
int weight = 0;
|
||||||
int flag;
|
unsigned long flag;
|
||||||
|
|
||||||
while (g_ifxmips_dma_int_status)
|
while (g_ifxmips_dma_int_status) {
|
||||||
{
|
if (budget-- < 0) {
|
||||||
if (budget-- < 0)
|
|
||||||
{
|
|
||||||
tasklet_schedule(&dma_tasklet);
|
tasklet_schedule(&dma_tasklet);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
chan_no = -1;
|
chan_no = -1;
|
||||||
weight = 0;
|
weight = 0;
|
||||||
for (i = 0; i < MAX_DMA_CHANNEL_NUM; i++)
|
for (i = 0; i < MAX_DMA_CHANNEL_NUM; i++) {
|
||||||
{
|
if ((g_ifxmips_dma_int_status & (1 << i)) && dma_chan[i].weight > 0) {
|
||||||
if ((g_ifxmips_dma_int_status & (1 << i)) && dma_chan[i].weight > 0)
|
if (dma_chan[i].weight > weight) {
|
||||||
{
|
|
||||||
if (dma_chan[i].weight > weight)
|
|
||||||
{
|
|
||||||
chan_no = i;
|
chan_no = i;
|
||||||
weight = dma_chan[chan_no].weight;
|
weight = dma_chan[chan_no].weight;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if (chan_no >= 0)
|
if (chan_no >= 0) {
|
||||||
{
|
|
||||||
if (chan_map[chan_no].dir == IFXMIPS_DMA_RX)
|
if (chan_map[chan_no].dir == IFXMIPS_DMA_RX)
|
||||||
rx_chan_intr_handler(chan_no);
|
rx_chan_intr_handler(chan_no);
|
||||||
else
|
else
|
||||||
tx_chan_intr_handler(chan_no);
|
tx_chan_intr_handler(chan_no);
|
||||||
} else {
|
} else {
|
||||||
for (i = 0; i < MAX_DMA_CHANNEL_NUM; i++)
|
for (i = 0; i < MAX_DMA_CHANNEL_NUM; i++)
|
||||||
{
|
|
||||||
dma_chan[i].weight = dma_chan[i].default_weight;
|
dma_chan[i].weight = dma_chan[i].default_weight;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
|
||||||
|
|
||||||
local_irq_save(flag);
|
local_irq_save(flag);
|
||||||
g_ifxmips_dma_in_process = 0;
|
g_ifxmips_dma_in_process = 0;
|
||||||
if (g_ifxmips_dma_int_status)
|
if (g_ifxmips_dma_int_status) {
|
||||||
{
|
|
||||||
g_ifxmips_dma_in_process = 1;
|
g_ifxmips_dma_in_process = 1;
|
||||||
tasklet_schedule(&dma_tasklet);
|
tasklet_schedule(&dma_tasklet);
|
||||||
}
|
}
|
||||||
local_irq_restore(flag);
|
local_irq_restore(flag);
|
||||||
}
|
}
|
||||||
|
|
||||||
irqreturn_t
|
irqreturn_t dma_interrupt(int irq, void *dev_id)
|
||||||
dma_interrupt (int irq, void *dev_id)
|
|
||||||
{
|
{
|
||||||
_dma_channel_info *pCh;
|
_dma_channel_info *pCh;
|
||||||
int chan_no = 0;
|
int chan_no = 0;
|
||||||
@ -278,8 +257,7 @@ dma_interrupt (int irq, void *dev_id)
|
|||||||
ifxmips_w32(tmp, IFXMIPS_DMA_IRNEN);
|
ifxmips_w32(tmp, IFXMIPS_DMA_IRNEN);
|
||||||
ifxmips_mask_and_ack_irq(irq);
|
ifxmips_mask_and_ack_irq(irq);
|
||||||
|
|
||||||
if (!g_ifxmips_dma_in_process)
|
if (!g_ifxmips_dma_in_process) {
|
||||||
{
|
|
||||||
g_ifxmips_dma_in_process = 1;
|
g_ifxmips_dma_in_process = 1;
|
||||||
tasklet_schedule(&dma_tasklet);
|
tasklet_schedule(&dma_tasklet);
|
||||||
}
|
}
|
||||||
@ -287,15 +265,12 @@ dma_interrupt (int irq, void *dev_id)
|
|||||||
return IRQ_HANDLED;
|
return IRQ_HANDLED;
|
||||||
}
|
}
|
||||||
|
|
||||||
_dma_device_info*
|
_dma_device_info *dma_device_reserve(char *dev_name)
|
||||||
dma_device_reserve (char *dev_name)
|
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
for (i = 0; i < MAX_DMA_DEVICE_NUM; i++)
|
for (i = 0; i < MAX_DMA_DEVICE_NUM; i++) {
|
||||||
{
|
if (strcmp(dev_name, dma_devs[i].device_name) == 0) {
|
||||||
if (strcmp(dev_name, dma_devs[i].device_name) == 0)
|
|
||||||
{
|
|
||||||
if (dma_devs[i].reserved)
|
if (dma_devs[i].reserved)
|
||||||
return NULL;
|
return NULL;
|
||||||
dma_devs[i].reserved = 1;
|
dma_devs[i].reserved = 1;
|
||||||
@ -305,34 +280,31 @@ dma_device_reserve (char *dev_name)
|
|||||||
|
|
||||||
return &dma_devs[i];
|
return &dma_devs[i];
|
||||||
}
|
}
|
||||||
|
EXPORT_SYMBOL(dma_device_reserve);
|
||||||
|
|
||||||
void
|
void dma_device_release(_dma_device_info *dev)
|
||||||
dma_device_release (_dma_device_info *dev)
|
|
||||||
{
|
{
|
||||||
dev->reserved = 0;
|
dev->reserved = 0;
|
||||||
}
|
}
|
||||||
|
EXPORT_SYMBOL(dma_device_release);
|
||||||
|
|
||||||
void
|
void dma_device_register(_dma_device_info *dev)
|
||||||
dma_device_register(_dma_device_info *dev)
|
|
||||||
{
|
{
|
||||||
int i, j;
|
int i, j;
|
||||||
int chan_no = 0;
|
int chan_no = 0;
|
||||||
u8 *buffer;
|
u8 *buffer;
|
||||||
int byte_offset;
|
int byte_offset;
|
||||||
int flag;
|
unsigned long flag;
|
||||||
_dma_device_info *pDev;
|
_dma_device_info *pDev;
|
||||||
_dma_channel_info *pCh;
|
_dma_channel_info *pCh;
|
||||||
struct rx_desc *rx_desc_p;
|
struct rx_desc *rx_desc_p;
|
||||||
struct tx_desc *tx_desc_p;
|
struct tx_desc *tx_desc_p;
|
||||||
|
|
||||||
for (i = 0; i < dev->max_tx_chan_num; i++)
|
for (i = 0; i < dev->max_tx_chan_num; i++) {
|
||||||
{
|
|
||||||
pCh = dev->tx_chan[i];
|
pCh = dev->tx_chan[i];
|
||||||
if (pCh->control == IFXMIPS_DMA_CH_ON)
|
if (pCh->control == IFXMIPS_DMA_CH_ON) {
|
||||||
{
|
|
||||||
chan_no = (int)(pCh - dma_chan);
|
chan_no = (int)(pCh - dma_chan);
|
||||||
for (j = 0; j < pCh->desc_len; j++)
|
for (j = 0; j < pCh->desc_len; j++) {
|
||||||
{
|
|
||||||
tx_desc_p = (struct tx_desc *)pCh->desc_base + j;
|
tx_desc_p = (struct tx_desc *)pCh->desc_base + j;
|
||||||
memset(tx_desc_p, 0, sizeof(struct tx_desc));
|
memset(tx_desc_p, 0, sizeof(struct tx_desc));
|
||||||
}
|
}
|
||||||
@ -344,22 +316,20 @@ dma_device_register(_dma_device_info *dev)
|
|||||||
|
|
||||||
ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_CCTRL) & ~1, IFXMIPS_DMA_CCTRL);
|
ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_CCTRL) & ~1, IFXMIPS_DMA_CCTRL);
|
||||||
ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_CCTRL) | 2, IFXMIPS_DMA_CCTRL);
|
ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_CCTRL) | 2, IFXMIPS_DMA_CCTRL);
|
||||||
while (ifxmips_r32(IFXMIPS_DMA_CCTRL) & 2){};
|
while (ifxmips_r32(IFXMIPS_DMA_CCTRL) & 2)
|
||||||
|
;
|
||||||
ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_IRNEN) | (1 << chan_no), IFXMIPS_DMA_IRNEN);
|
ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_IRNEN) | (1 << chan_no), IFXMIPS_DMA_IRNEN);
|
||||||
ifxmips_w32(0x30100, IFXMIPS_DMA_CCTRL); /* reset and enable channel,enable channel later */
|
ifxmips_w32(0x30100, IFXMIPS_DMA_CCTRL); /* reset and enable channel,enable channel later */
|
||||||
local_irq_restore(flag);
|
local_irq_restore(flag);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
for (i = 0; i < dev->max_rx_chan_num; i++)
|
for (i = 0; i < dev->max_rx_chan_num; i++) {
|
||||||
{
|
|
||||||
pCh = dev->rx_chan[i];
|
pCh = dev->rx_chan[i];
|
||||||
if (pCh->control == IFXMIPS_DMA_CH_ON)
|
if (pCh->control == IFXMIPS_DMA_CH_ON) {
|
||||||
{
|
|
||||||
chan_no = (int)(pCh - dma_chan);
|
chan_no = (int)(pCh - dma_chan);
|
||||||
|
|
||||||
for (j = 0; j < pCh->desc_len; j++)
|
for (j = 0; j < pCh->desc_len; j++) {
|
||||||
{
|
|
||||||
rx_desc_p = (struct rx_desc *)pCh->desc_base + j;
|
rx_desc_p = (struct rx_desc *)pCh->desc_base + j;
|
||||||
pDev = (_dma_device_info *)(pCh->dma_dev);
|
pDev = (_dma_device_info *)(pCh->dma_dev);
|
||||||
buffer = pDev->buffer_alloc(pCh->packet_size, &byte_offset, (void *)&(pCh->opt[j]));
|
buffer = pDev->buffer_alloc(pCh->packet_size, &byte_offset, (void *)&(pCh->opt[j]));
|
||||||
@ -382,7 +352,8 @@ dma_device_register(_dma_device_info *dev)
|
|||||||
ifxmips_w32(pCh->desc_len, IFXMIPS_DMA_CDLEN);
|
ifxmips_w32(pCh->desc_len, IFXMIPS_DMA_CDLEN);
|
||||||
ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_CCTRL) & ~1, IFXMIPS_DMA_CCTRL);
|
ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_CCTRL) & ~1, IFXMIPS_DMA_CCTRL);
|
||||||
ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_CCTRL) | 2, IFXMIPS_DMA_CCTRL);
|
ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_CCTRL) | 2, IFXMIPS_DMA_CCTRL);
|
||||||
while (ifxmips_r32(IFXMIPS_DMA_CCTRL) & 2){};
|
while (ifxmips_r32(IFXMIPS_DMA_CCTRL) & 2)
|
||||||
|
;
|
||||||
ifxmips_w32(0x0a, IFXMIPS_DMA_CIE); /* fix me, should enable all the interrupts here? */
|
ifxmips_w32(0x0a, IFXMIPS_DMA_CIE); /* fix me, should enable all the interrupts here? */
|
||||||
ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_IRNEN) | (1 << chan_no), IFXMIPS_DMA_IRNEN);
|
ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_IRNEN) | (1 << chan_no), IFXMIPS_DMA_IRNEN);
|
||||||
ifxmips_w32(0x30000, IFXMIPS_DMA_CCTRL);
|
ifxmips_w32(0x30000, IFXMIPS_DMA_CCTRL);
|
||||||
@ -391,22 +362,20 @@ dma_device_register(_dma_device_info *dev)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
EXPORT_SYMBOL(dma_device_register);
|
||||||
|
|
||||||
void
|
void dma_device_unregister(_dma_device_info *dev)
|
||||||
dma_device_unregister (_dma_device_info *dev)
|
|
||||||
{
|
{
|
||||||
int i, j;
|
int i, j;
|
||||||
int chan_no;
|
int chan_no;
|
||||||
_dma_channel_info *pCh;
|
_dma_channel_info *pCh;
|
||||||
struct rx_desc *rx_desc_p;
|
struct rx_desc *rx_desc_p;
|
||||||
struct tx_desc *tx_desc_p;
|
struct tx_desc *tx_desc_p;
|
||||||
int flag;
|
unsigned long flag;
|
||||||
|
|
||||||
for (i = 0; i < dev->max_tx_chan_num; i++)
|
for (i = 0; i < dev->max_tx_chan_num; i++) {
|
||||||
{
|
|
||||||
pCh = dev->tx_chan[i];
|
pCh = dev->tx_chan[i];
|
||||||
if (pCh->control == IFXMIPS_DMA_CH_ON)
|
if (pCh->control == IFXMIPS_DMA_CH_ON) {
|
||||||
{
|
|
||||||
chan_no = (int)(dev->tx_chan[i] - dma_chan);
|
chan_no = (int)(dev->tx_chan[i] - dma_chan);
|
||||||
local_irq_save(flag);
|
local_irq_save(flag);
|
||||||
ifxmips_w32(chan_no, IFXMIPS_DMA_CS);
|
ifxmips_w32(chan_no, IFXMIPS_DMA_CS);
|
||||||
@ -416,26 +385,24 @@ dma_device_unregister (_dma_device_info *dev)
|
|||||||
ifxmips_w32(0, IFXMIPS_DMA_CIE); /* fix me, should disable all the interrupts here? */
|
ifxmips_w32(0, IFXMIPS_DMA_CIE); /* fix me, should disable all the interrupts here? */
|
||||||
ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_IRNEN) & ~(1 << chan_no), IFXMIPS_DMA_IRNEN); /* disable interrupts */
|
ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_IRNEN) & ~(1 << chan_no), IFXMIPS_DMA_IRNEN); /* disable interrupts */
|
||||||
ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_CCTRL) & ~1, IFXMIPS_DMA_CCTRL);
|
ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_CCTRL) & ~1, IFXMIPS_DMA_CCTRL);
|
||||||
while (ifxmips_r32(IFXMIPS_DMA_CCTRL) & 1) {};
|
while (ifxmips_r32(IFXMIPS_DMA_CCTRL) & 1)
|
||||||
|
;
|
||||||
local_irq_restore(flag);
|
local_irq_restore(flag);
|
||||||
|
|
||||||
for (j = 0; j < pCh->desc_len; j++)
|
for (j = 0; j < pCh->desc_len; j++) {
|
||||||
{
|
|
||||||
tx_desc_p = (struct tx_desc *)pCh->desc_base + j;
|
tx_desc_p = (struct tx_desc *)pCh->desc_base + j;
|
||||||
if ((tx_desc_p->status.field.OWN == CPU_OWN && tx_desc_p->status.field.C)
|
if ((tx_desc_p->status.field.OWN == CPU_OWN && tx_desc_p->status.field.C)
|
||||||
|| (tx_desc_p->status.field.OWN == DMA_OWN && tx_desc_p->status.field.data_length > 0))
|
|| (tx_desc_p->status.field.OWN == DMA_OWN && tx_desc_p->status.field.data_length > 0)) {
|
||||||
{
|
|
||||||
dev->buffer_free((u8 *) __va(tx_desc_p->Data_Pointer), (void *)pCh->opt[j]);
|
dev->buffer_free((u8 *) __va(tx_desc_p->Data_Pointer), (void *)pCh->opt[j]);
|
||||||
}
|
}
|
||||||
tx_desc_p->status.field.OWN = CPU_OWN;
|
tx_desc_p->status.field.OWN = CPU_OWN;
|
||||||
memset(tx_desc_p, 0, sizeof(struct tx_desc));
|
memset(tx_desc_p, 0, sizeof(struct tx_desc));
|
||||||
}
|
}
|
||||||
//TODO should free buffer that is not transferred by dma
|
/* TODO should free buffer that is not transferred by dma */
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
for (i = 0; i < dev->max_rx_chan_num; i++)
|
for (i = 0; i < dev->max_rx_chan_num; i++) {
|
||||||
{
|
|
||||||
pCh = dev->rx_chan[i];
|
pCh = dev->rx_chan[i];
|
||||||
chan_no = (int)(dev->rx_chan[i] - dma_chan);
|
chan_no = (int)(dev->rx_chan[i] - dma_chan);
|
||||||
ifxmips_disable_irq(pCh->irq);
|
ifxmips_disable_irq(pCh->irq);
|
||||||
@ -450,27 +417,26 @@ dma_device_unregister (_dma_device_info *dev)
|
|||||||
ifxmips_w32(0, IFXMIPS_DMA_CIE); /* fix me, should disable all the interrupts here? */
|
ifxmips_w32(0, IFXMIPS_DMA_CIE); /* fix me, should disable all the interrupts here? */
|
||||||
ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_IRNEN) & ~(1 << chan_no), IFXMIPS_DMA_IRNEN); /* disable interrupts */
|
ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_IRNEN) & ~(1 << chan_no), IFXMIPS_DMA_IRNEN); /* disable interrupts */
|
||||||
ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_CCTRL) & ~1, IFXMIPS_DMA_CCTRL);
|
ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_CCTRL) & ~1, IFXMIPS_DMA_CCTRL);
|
||||||
while (ifxmips_r32(IFXMIPS_DMA_CCTRL) & 1) {};
|
while (ifxmips_r32(IFXMIPS_DMA_CCTRL) & 1)
|
||||||
|
;
|
||||||
|
|
||||||
local_irq_restore(flag);
|
local_irq_restore(flag);
|
||||||
for (j = 0; j < pCh->desc_len; j++)
|
for (j = 0; j < pCh->desc_len; j++) {
|
||||||
{
|
|
||||||
rx_desc_p = (struct rx_desc *) pCh->desc_base + j;
|
rx_desc_p = (struct rx_desc *) pCh->desc_base + j;
|
||||||
if ((rx_desc_p->status.field.OWN == CPU_OWN
|
if ((rx_desc_p->status.field.OWN == CPU_OWN
|
||||||
&& rx_desc_p->status.field.C)
|
&& rx_desc_p->status.field.C)
|
||||||
|| (rx_desc_p->status.field.OWN == DMA_OWN
|
|| (rx_desc_p->status.field.OWN == DMA_OWN
|
||||||
&& rx_desc_p->status.field.data_length > 0)) {
|
&& rx_desc_p->status.field.data_length > 0)) {
|
||||||
dev->buffer_free((u8 *)
|
dev->buffer_free((u8 *)
|
||||||
__va (rx_desc_p->
|
__va(rx_desc_p->Data_Pointer),
|
||||||
Data_Pointer),
|
|
||||||
(void *) pCh->opt[j]);
|
(void *) pCh->opt[j]);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
EXPORT_SYMBOL(dma_device_unregister);
|
||||||
|
|
||||||
int
|
int dma_device_read(struct dma_device_info *dma_dev, u8 **dataptr, void **opt)
|
||||||
dma_device_read (struct dma_device_info *dma_dev, u8 ** dataptr, void **opt)
|
|
||||||
{
|
{
|
||||||
u8 *buf;
|
u8 *buf;
|
||||||
int len;
|
int len;
|
||||||
@ -482,26 +448,20 @@ dma_device_read (struct dma_device_info *dma_dev, u8 ** dataptr, void **opt)
|
|||||||
/* get the rx data first */
|
/* get the rx data first */
|
||||||
rx_desc_p = (struct rx_desc *) pCh->desc_base + pCh->curr_desc;
|
rx_desc_p = (struct rx_desc *) pCh->desc_base + pCh->curr_desc;
|
||||||
if (!(rx_desc_p->status.field.OWN == CPU_OWN && rx_desc_p->status.field.C))
|
if (!(rx_desc_p->status.field.OWN == CPU_OWN && rx_desc_p->status.field.C))
|
||||||
{
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
|
||||||
|
|
||||||
buf = (u8 *) __va(rx_desc_p->Data_Pointer);
|
buf = (u8 *) __va(rx_desc_p->Data_Pointer);
|
||||||
*(u32 *)dataptr = (u32)buf;
|
*(u32 *)dataptr = (u32)buf;
|
||||||
len = rx_desc_p->status.field.data_length;
|
len = rx_desc_p->status.field.data_length;
|
||||||
|
|
||||||
if (opt)
|
if (opt)
|
||||||
{
|
|
||||||
*(int *)opt = (int)pCh->opt[pCh->curr_desc];
|
*(int *)opt = (int)pCh->opt[pCh->curr_desc];
|
||||||
}
|
|
||||||
|
|
||||||
/* replace with a new allocated buffer */
|
/* replace with a new allocated buffer */
|
||||||
buf = dma_dev->buffer_alloc(pCh->packet_size, &byte_offset, &p);
|
buf = dma_dev->buffer_alloc(pCh->packet_size, &byte_offset, &p);
|
||||||
|
|
||||||
if (buf)
|
if (buf) {
|
||||||
{
|
dma_cache_inv((unsigned long) buf, pCh->packet_size);
|
||||||
dma_cache_inv ((unsigned long) buf,
|
|
||||||
pCh->packet_size);
|
|
||||||
pCh->opt[pCh->curr_desc] = p;
|
pCh->opt[pCh->curr_desc] = p;
|
||||||
wmb();
|
wmb();
|
||||||
|
|
||||||
@ -522,11 +482,11 @@ dma_device_read (struct dma_device_info *dma_dev, u8 ** dataptr, void **opt)
|
|||||||
|
|
||||||
return len;
|
return len;
|
||||||
}
|
}
|
||||||
|
EXPORT_SYMBOL(dma_device_read);
|
||||||
|
|
||||||
int
|
int dma_device_write(struct dma_device_info *dma_dev, u8 *dataptr, int len, void *opt)
|
||||||
dma_device_write (struct dma_device_info *dma_dev, u8 * dataptr, int len, void *opt)
|
|
||||||
{
|
{
|
||||||
int flag;
|
unsigned long flag;
|
||||||
u32 tmp, byte_offset;
|
u32 tmp, byte_offset;
|
||||||
_dma_channel_info *pCh;
|
_dma_channel_info *pCh;
|
||||||
int chan_no;
|
int chan_no;
|
||||||
@ -537,8 +497,7 @@ dma_device_write (struct dma_device_info *dma_dev, u8 * dataptr, int len, void *
|
|||||||
chan_no = (int)(pCh - (_dma_channel_info *) dma_chan);
|
chan_no = (int)(pCh - (_dma_channel_info *) dma_chan);
|
||||||
|
|
||||||
tx_desc_p = (struct tx_desc *)pCh->desc_base + pCh->prev_desc;
|
tx_desc_p = (struct tx_desc *)pCh->desc_base + pCh->prev_desc;
|
||||||
while (tx_desc_p->status.field.OWN == CPU_OWN && tx_desc_p->status.field.C)
|
while (tx_desc_p->status.field.OWN == CPU_OWN && tx_desc_p->status.field.C) {
|
||||||
{
|
|
||||||
dma_dev->buffer_free((u8 *) __va(tx_desc_p->Data_Pointer), pCh->opt[pCh->prev_desc]);
|
dma_dev->buffer_free((u8 *) __va(tx_desc_p->Data_Pointer), pCh->opt[pCh->prev_desc]);
|
||||||
memset(tx_desc_p, 0, sizeof(struct tx_desc));
|
memset(tx_desc_p, 0, sizeof(struct tx_desc));
|
||||||
pCh->prev_desc = (pCh->prev_desc + 1) % (pCh->desc_len);
|
pCh->prev_desc = (pCh->prev_desc + 1) % (pCh->desc_len);
|
||||||
@ -546,8 +505,7 @@ dma_device_write (struct dma_device_info *dma_dev, u8 * dataptr, int len, void *
|
|||||||
}
|
}
|
||||||
tx_desc_p = (struct tx_desc *)pCh->desc_base + pCh->curr_desc;
|
tx_desc_p = (struct tx_desc *)pCh->desc_base + pCh->curr_desc;
|
||||||
/* Check whether this descriptor is available */
|
/* Check whether this descriptor is available */
|
||||||
if (tx_desc_p->status.field.OWN == DMA_OWN || tx_desc_p->status.field.C)
|
if (tx_desc_p->status.field.OWN == DMA_OWN || tx_desc_p->status.field.C) {
|
||||||
{
|
|
||||||
/* if not, the tell the upper layer device */
|
/* if not, the tell the upper layer device */
|
||||||
dma_dev->intr_handler (dma_dev, TX_BUF_FULL_INT);
|
dma_dev->intr_handler (dma_dev, TX_BUF_FULL_INT);
|
||||||
local_irq_restore(flag);
|
local_irq_restore(flag);
|
||||||
@ -571,8 +529,7 @@ dma_device_write (struct dma_device_info *dma_dev, u8 * dataptr, int len, void *
|
|||||||
|
|
||||||
/*Check whether this descriptor is available */
|
/*Check whether this descriptor is available */
|
||||||
tx_desc_p = (struct tx_desc *) pCh->desc_base + pCh->curr_desc;
|
tx_desc_p = (struct tx_desc *) pCh->desc_base + pCh->curr_desc;
|
||||||
if (tx_desc_p->status.field.OWN == DMA_OWN)
|
if (tx_desc_p->status.field.OWN == DMA_OWN) {
|
||||||
{
|
|
||||||
/*if not , the tell the upper layer device */
|
/*if not , the tell the upper layer device */
|
||||||
dma_dev->intr_handler (dma_dev, TX_BUF_FULL_INT);
|
dma_dev->intr_handler (dma_dev, TX_BUF_FULL_INT);
|
||||||
}
|
}
|
||||||
@ -587,33 +544,28 @@ dma_device_write (struct dma_device_info *dma_dev, u8 * dataptr, int len, void *
|
|||||||
|
|
||||||
return len;
|
return len;
|
||||||
}
|
}
|
||||||
|
EXPORT_SYMBOL(dma_device_write);
|
||||||
|
|
||||||
int
|
int map_dma_chan(_dma_chan_map *map)
|
||||||
map_dma_chan(_dma_chan_map *map)
|
|
||||||
{
|
{
|
||||||
int i, j;
|
int i, j;
|
||||||
int result;
|
int result;
|
||||||
|
|
||||||
for (i = 0; i < MAX_DMA_DEVICE_NUM; i++)
|
for (i = 0; i < MAX_DMA_DEVICE_NUM; i++)
|
||||||
{
|
|
||||||
strcpy(dma_devs[i].device_name, global_device_name[i]);
|
strcpy(dma_devs[i].device_name, global_device_name[i]);
|
||||||
}
|
|
||||||
|
|
||||||
for (i = 0; i < MAX_DMA_CHANNEL_NUM; i++)
|
for (i = 0; i < MAX_DMA_CHANNEL_NUM; i++) {
|
||||||
{
|
|
||||||
dma_chan[i].irq = map[i].irq;
|
dma_chan[i].irq = map[i].irq;
|
||||||
result = request_irq(dma_chan[i].irq, dma_interrupt, IRQF_DISABLED, "dma-core", (void*)&dma_chan[i]);
|
result = request_irq(dma_chan[i].irq, dma_interrupt, IRQF_DISABLED, map[i].dev_name, (void *)&dma_chan[i]);
|
||||||
if (result)
|
if (result) {
|
||||||
{
|
printk(KERN_WARNING "error, cannot get dma_irq!\n");
|
||||||
printk("error, cannot get dma_irq!\n");
|
|
||||||
free_irq(dma_chan[i].irq, (void *) &dma_interrupt);
|
free_irq(dma_chan[i].irq, (void *) &dma_interrupt);
|
||||||
|
|
||||||
return -EFAULT;
|
return -EFAULT;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
for (i = 0; i < MAX_DMA_DEVICE_NUM; i++)
|
for (i = 0; i < MAX_DMA_DEVICE_NUM; i++) {
|
||||||
{
|
|
||||||
dma_devs[i].num_tx_chan = 0; /*set default tx channel number to be one */
|
dma_devs[i].num_tx_chan = 0; /*set default tx channel number to be one */
|
||||||
dma_devs[i].num_rx_chan = 0; /*set default rx channel number to be one */
|
dma_devs[i].num_rx_chan = 0; /*set default rx channel number to be one */
|
||||||
dma_devs[i].max_rx_chan_num = 0;
|
dma_devs[i].max_rx_chan_num = 0;
|
||||||
@ -623,20 +575,17 @@ map_dma_chan(_dma_chan_map *map)
|
|||||||
dma_devs[i].intr_handler = NULL;
|
dma_devs[i].intr_handler = NULL;
|
||||||
dma_devs[i].tx_burst_len = 4;
|
dma_devs[i].tx_burst_len = 4;
|
||||||
dma_devs[i].rx_burst_len = 4;
|
dma_devs[i].rx_burst_len = 4;
|
||||||
if (i == 0)
|
if (i == 0) {
|
||||||
{
|
|
||||||
ifxmips_w32(0, IFXMIPS_DMA_PS);
|
ifxmips_w32(0, IFXMIPS_DMA_PS);
|
||||||
ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_PCTRL) | ((0xf << 8) | (1 << 6)), IFXMIPS_DMA_PCTRL); /*enable dma drop */
|
ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_PCTRL) | ((0xf << 8) | (1 << 6)), IFXMIPS_DMA_PCTRL); /*enable dma drop */
|
||||||
}
|
}
|
||||||
|
|
||||||
if (i == 1)
|
if (i == 1) {
|
||||||
{
|
|
||||||
ifxmips_w32(1, IFXMIPS_DMA_PS);
|
ifxmips_w32(1, IFXMIPS_DMA_PS);
|
||||||
ifxmips_w32(0x14, IFXMIPS_DMA_PCTRL); /*deu port setting */
|
ifxmips_w32(0x14, IFXMIPS_DMA_PCTRL); /*deu port setting */
|
||||||
}
|
}
|
||||||
|
|
||||||
for (j = 0; j < MAX_DMA_CHANNEL_NUM; j++)
|
for (j = 0; j < MAX_DMA_CHANNEL_NUM; j++) {
|
||||||
{
|
|
||||||
dma_chan[j].byte_offset = 0;
|
dma_chan[j].byte_offset = 0;
|
||||||
dma_chan[j].open = &open_chan;
|
dma_chan[j].open = &open_chan;
|
||||||
dma_chan[j].close = &close_chan;
|
dma_chan[j].close = &close_chan;
|
||||||
@ -651,26 +600,23 @@ map_dma_chan(_dma_chan_map *map)
|
|||||||
dma_chan[j].prev_desc = 0;
|
dma_chan[j].prev_desc = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
for (j = 0; j < MAX_DMA_CHANNEL_NUM; j++)
|
for (j = 0; j < MAX_DMA_CHANNEL_NUM; j++) {
|
||||||
{
|
if (strcmp(dma_devs[i].device_name, map[j].dev_name) == 0) {
|
||||||
if (strcmp(dma_devs[i].device_name, map[j].dev_name) == 0)
|
if (map[j].dir == IFXMIPS_DMA_RX) {
|
||||||
{
|
|
||||||
if (map[j].dir == IFXMIPS_DMA_RX)
|
|
||||||
{
|
|
||||||
dma_chan[j].dir = IFXMIPS_DMA_RX;
|
dma_chan[j].dir = IFXMIPS_DMA_RX;
|
||||||
dma_devs[i].max_rx_chan_num++;
|
dma_devs[i].max_rx_chan_num++;
|
||||||
dma_devs[i].rx_chan[dma_devs[i].max_rx_chan_num - 1] = &dma_chan[j];
|
dma_devs[i].rx_chan[dma_devs[i].max_rx_chan_num - 1] = &dma_chan[j];
|
||||||
dma_devs[i].rx_chan[dma_devs[i].max_rx_chan_num - 1]->pri = map[j].pri;
|
dma_devs[i].rx_chan[dma_devs[i].max_rx_chan_num - 1]->pri = map[j].pri;
|
||||||
dma_chan[j].dma_dev = (void *)&dma_devs[i];
|
dma_chan[j].dma_dev = (void *)&dma_devs[i];
|
||||||
} else if(map[j].dir == IFXMIPS_DMA_TX)
|
} else if (map[j].dir == IFXMIPS_DMA_TX) {
|
||||||
{ /*TX direction */
|
/*TX direction */
|
||||||
dma_chan[j].dir = IFXMIPS_DMA_TX;
|
dma_chan[j].dir = IFXMIPS_DMA_TX;
|
||||||
dma_devs[i].max_tx_chan_num++;
|
dma_devs[i].max_tx_chan_num++;
|
||||||
dma_devs[i].tx_chan[dma_devs[i].max_tx_chan_num - 1] = &dma_chan[j];
|
dma_devs[i].tx_chan[dma_devs[i].max_tx_chan_num - 1] = &dma_chan[j];
|
||||||
dma_devs[i].tx_chan[dma_devs[i].max_tx_chan_num - 1]->pri = map[j].pri;
|
dma_devs[i].tx_chan[dma_devs[i].max_tx_chan_num - 1]->pri = map[j].pri;
|
||||||
dma_chan[j].dma_dev = (void *)&dma_devs[i];
|
dma_chan[j].dma_dev = (void *)&dma_devs[i];
|
||||||
} else {
|
} else {
|
||||||
printk ("WRONG DMA MAP!\n");
|
printk(KERN_WARNING "WRONG DMA MAP!\n");
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -679,32 +625,28 @@ map_dma_chan(_dma_chan_map *map)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void dma_chip_init(void)
|
||||||
dma_chip_init(void)
|
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
// enable DMA from PMU
|
/* enable DMA from PMU */
|
||||||
ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_DMA);
|
ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_DMA);
|
||||||
|
|
||||||
// reset DMA
|
/* reset DMA */
|
||||||
ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_CTRL) | 1, IFXMIPS_DMA_CTRL);
|
ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_CTRL) | 1, IFXMIPS_DMA_CTRL);
|
||||||
|
|
||||||
// diable all interrupts
|
/* disable all interrupts */
|
||||||
ifxmips_w32(0, IFXMIPS_DMA_IRNEN);
|
ifxmips_w32(0, IFXMIPS_DMA_IRNEN);
|
||||||
|
|
||||||
for (i = 0; i < MAX_DMA_CHANNEL_NUM; i++)
|
for (i = 0; i < MAX_DMA_CHANNEL_NUM; i++) {
|
||||||
{
|
|
||||||
ifxmips_w32(i, IFXMIPS_DMA_CS);
|
ifxmips_w32(i, IFXMIPS_DMA_CS);
|
||||||
ifxmips_w32(0x2, IFXMIPS_DMA_CCTRL);
|
ifxmips_w32(0x2, IFXMIPS_DMA_CCTRL);
|
||||||
ifxmips_w32(0x80000040, IFXMIPS_DMA_CPOLL);
|
ifxmips_w32(0x80000040, IFXMIPS_DMA_CPOLL);
|
||||||
ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_CCTRL) & ~0x1, IFXMIPS_DMA_CCTRL);
|
ifxmips_w32(ifxmips_r32(IFXMIPS_DMA_CCTRL) & ~0x1, IFXMIPS_DMA_CCTRL);
|
||||||
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int ifxmips_dma_init(void)
|
||||||
ifxmips_dma_init (void)
|
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
@ -714,16 +656,14 @@ ifxmips_dma_init (void)
|
|||||||
|
|
||||||
g_desc_list = (u64 *)KSEG1ADDR(__get_free_page(GFP_DMA));
|
g_desc_list = (u64 *)KSEG1ADDR(__get_free_page(GFP_DMA));
|
||||||
|
|
||||||
if (g_desc_list == NULL)
|
if (g_desc_list == NULL) {
|
||||||
{
|
printk(KERN_WARNING "no memory for desriptor\n");
|
||||||
printk("no memory for desriptor\n");
|
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
}
|
}
|
||||||
|
|
||||||
memset(g_desc_list, 0, PAGE_SIZE);
|
memset(g_desc_list, 0, PAGE_SIZE);
|
||||||
|
|
||||||
for (i = 0; i < MAX_DMA_CHANNEL_NUM; i++)
|
for (i = 0; i < MAX_DMA_CHANNEL_NUM; i++) {
|
||||||
{
|
|
||||||
dma_chan[i].desc_base = (u32)g_desc_list + i * IFXMIPS_DMA_DESCRIPTOR_OFFSET * 8;
|
dma_chan[i].desc_base = (u32)g_desc_list + i * IFXMIPS_DMA_DESCRIPTOR_OFFSET * 8;
|
||||||
dma_chan[i].curr_desc = 0;
|
dma_chan[i].curr_desc = 0;
|
||||||
dma_chan[i].desc_len = IFXMIPS_DMA_DESCRIPTOR_OFFSET;
|
dma_chan[i].desc_len = IFXMIPS_DMA_DESCRIPTOR_OFFSET;
|
||||||
@ -738,8 +678,7 @@ ifxmips_dma_init (void)
|
|||||||
|
|
||||||
arch_initcall(ifxmips_dma_init);
|
arch_initcall(ifxmips_dma_init);
|
||||||
|
|
||||||
void
|
void dma_cleanup(void)
|
||||||
dma_cleanup(void)
|
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
@ -748,11 +687,4 @@ dma_cleanup(void)
|
|||||||
free_irq(dma_chan[i].irq, (void *)&dma_interrupt);
|
free_irq(dma_chan[i].irq, (void *)&dma_interrupt);
|
||||||
}
|
}
|
||||||
|
|
||||||
EXPORT_SYMBOL (dma_device_reserve);
|
|
||||||
EXPORT_SYMBOL (dma_device_release);
|
|
||||||
EXPORT_SYMBOL (dma_device_register);
|
|
||||||
EXPORT_SYMBOL (dma_device_unregister);
|
|
||||||
EXPORT_SYMBOL (dma_device_read);
|
|
||||||
EXPORT_SYMBOL (dma_device_write);
|
|
||||||
|
|
||||||
MODULE_LICENSE("GPL");
|
MODULE_LICENSE("GPL");
|
||||||
|
@ -35,9 +35,8 @@
|
|||||||
#include <linux/netlink.h>
|
#include <linux/netlink.h>
|
||||||
#include <linux/platform_device.h>
|
#include <linux/platform_device.h>
|
||||||
#include <net/sock.h>
|
#include <net/sock.h>
|
||||||
#include <asm/uaccess.h>
|
#include <linux/uaccess.h>
|
||||||
#include <asm/semaphore.h>
|
#include <linux/semaphore.h>
|
||||||
#include <asm/uaccess.h>
|
|
||||||
#include <asm/ifxmips/ifxmips.h>
|
#include <asm/ifxmips/ifxmips.h>
|
||||||
|
|
||||||
#define MAX_PORTS 2
|
#define MAX_PORTS 2
|
||||||
|
@ -30,17 +30,16 @@
|
|||||||
#include <asm/ifxmips/ifxmips_irq.h>
|
#include <asm/ifxmips/ifxmips_irq.h>
|
||||||
#include <asm/irq_cpu.h>
|
#include <asm/irq_cpu.h>
|
||||||
|
|
||||||
void
|
void ifxmips_disable_irq(unsigned int irq_nr)
|
||||||
ifxmips_disable_irq(unsigned int irq_nr)
|
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
u32 *ifxmips_ier = IFXMIPS_ICU_IM0_IER;
|
u32 *ifxmips_ier = IFXMIPS_ICU_IM0_IER;
|
||||||
|
|
||||||
irq_nr -= INT_NUM_IRQ0;
|
irq_nr -= INT_NUM_IRQ0;
|
||||||
for(i = 0; i <= 4; i++)
|
for (i = 0; i <= 4; i++) {
|
||||||
{
|
|
||||||
if (irq_nr < INT_NUM_IM_OFFSET) {
|
if (irq_nr < INT_NUM_IM_OFFSET) {
|
||||||
ifxmips_w32(ifxmips_r32(ifxmips_ier) & ~(1 << irq_nr ), ifxmips_ier);
|
ifxmips_w32(ifxmips_r32(ifxmips_ier) & ~(1 << irq_nr),
|
||||||
|
ifxmips_ier);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
ifxmips_ier += IFXMIPS_ICU_OFFSET;
|
ifxmips_ier += IFXMIPS_ICU_OFFSET;
|
||||||
@ -49,19 +48,17 @@ ifxmips_disable_irq(unsigned int irq_nr)
|
|||||||
}
|
}
|
||||||
EXPORT_SYMBOL(ifxmips_disable_irq);
|
EXPORT_SYMBOL(ifxmips_disable_irq);
|
||||||
|
|
||||||
void
|
void ifxmips_mask_and_ack_irq(unsigned int irq_nr)
|
||||||
ifxmips_mask_and_ack_irq(unsigned int irq_nr)
|
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
u32 *ifxmips_ier = IFXMIPS_ICU_IM0_IER;
|
u32 *ifxmips_ier = IFXMIPS_ICU_IM0_IER;
|
||||||
u32 *ifxmips_isr = IFXMIPS_ICU_IM0_ISR;
|
u32 *ifxmips_isr = IFXMIPS_ICU_IM0_ISR;
|
||||||
|
|
||||||
irq_nr -= INT_NUM_IRQ0;
|
irq_nr -= INT_NUM_IRQ0;
|
||||||
for(i = 0; i <= 4; i++)
|
for (i = 0; i <= 4; i++) {
|
||||||
{
|
if (irq_nr < INT_NUM_IM_OFFSET) {
|
||||||
if(irq_nr < INT_NUM_IM_OFFSET)
|
ifxmips_w32(ifxmips_r32(ifxmips_ier) & ~(1 << irq_nr),
|
||||||
{
|
ifxmips_ier);
|
||||||
ifxmips_w32(ifxmips_r32(ifxmips_ier) & ~(1 << irq_nr ), ifxmips_ier);
|
|
||||||
ifxmips_w32((1 << irq_nr), ifxmips_isr);
|
ifxmips_w32((1 << irq_nr), ifxmips_isr);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
@ -72,18 +69,16 @@ ifxmips_mask_and_ack_irq(unsigned int irq_nr)
|
|||||||
}
|
}
|
||||||
EXPORT_SYMBOL(ifxmips_mask_and_ack_irq);
|
EXPORT_SYMBOL(ifxmips_mask_and_ack_irq);
|
||||||
|
|
||||||
void
|
void ifxmips_enable_irq(unsigned int irq_nr)
|
||||||
ifxmips_enable_irq(unsigned int irq_nr)
|
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
u32 *ifxmips_ier = IFXMIPS_ICU_IM0_IER;
|
u32 *ifxmips_ier = IFXMIPS_ICU_IM0_IER;
|
||||||
|
|
||||||
irq_nr -= INT_NUM_IRQ0;
|
irq_nr -= INT_NUM_IRQ0;
|
||||||
for(i = 0; i <= 4; i++)
|
for (i = 0; i <= 4; i++) {
|
||||||
{
|
if (irq_nr < INT_NUM_IM_OFFSET) {
|
||||||
if(irq_nr < INT_NUM_IM_OFFSET)
|
ifxmips_w32(ifxmips_r32(ifxmips_ier) | (1 << irq_nr),
|
||||||
{
|
ifxmips_ier);
|
||||||
ifxmips_w32(ifxmips_r32(ifxmips_ier) | (1 << irq_nr ), ifxmips_ier);
|
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
ifxmips_ier += IFXMIPS_ICU_OFFSET;
|
ifxmips_ier += IFXMIPS_ICU_OFFSET;
|
||||||
@ -92,22 +87,19 @@ ifxmips_enable_irq(unsigned int irq_nr)
|
|||||||
}
|
}
|
||||||
EXPORT_SYMBOL(ifxmips_enable_irq);
|
EXPORT_SYMBOL(ifxmips_enable_irq);
|
||||||
|
|
||||||
static unsigned int
|
static unsigned int ifxmips_startup_irq(unsigned int irq)
|
||||||
ifxmips_startup_irq(unsigned int irq)
|
|
||||||
{
|
{
|
||||||
ifxmips_enable_irq(irq);
|
ifxmips_enable_irq(irq);
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static void ifxmips_end_irq(unsigned int irq)
|
||||||
ifxmips_end_irq(unsigned int irq)
|
|
||||||
{
|
{
|
||||||
if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
|
if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
|
||||||
ifxmips_enable_irq(irq);
|
ifxmips_enable_irq(irq);
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct hw_interrupt_type
|
static struct hw_interrupt_type ifxmips_irq_type = {
|
||||||
ifxmips_irq_type = {
|
|
||||||
"IFXMIPS",
|
"IFXMIPS",
|
||||||
.startup = ifxmips_startup_irq,
|
.startup = ifxmips_startup_irq,
|
||||||
.enable = ifxmips_enable_irq,
|
.enable = ifxmips_enable_irq,
|
||||||
@ -119,8 +111,7 @@ ifxmips_irq_type = {
|
|||||||
.end = ifxmips_end_irq,
|
.end = ifxmips_end_irq,
|
||||||
};
|
};
|
||||||
|
|
||||||
static inline int
|
static inline int ls1bit32(unsigned long x)
|
||||||
ls1bit32(unsigned long x)
|
|
||||||
{
|
{
|
||||||
__asm__ (
|
__asm__ (
|
||||||
".set push \n"
|
".set push \n"
|
||||||
@ -132,8 +123,7 @@ ls1bit32(unsigned long x)
|
|||||||
return 31 - x;
|
return 31 - x;
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void ifxmips_hw_irqdispatch(int module)
|
||||||
ifxmips_hw_irqdispatch(int module)
|
|
||||||
{
|
{
|
||||||
u32 irq;
|
u32 irq;
|
||||||
|
|
||||||
@ -145,46 +135,58 @@ ifxmips_hw_irqdispatch(int module)
|
|||||||
irq = ls1bit32(irq);
|
irq = ls1bit32(irq);
|
||||||
do_IRQ((int)irq + INT_NUM_IM0_IRL0 + (INT_NUM_IM_OFFSET * module));
|
do_IRQ((int)irq + INT_NUM_IM0_IRL0 + (INT_NUM_IM_OFFSET * module));
|
||||||
|
|
||||||
if((irq == 22) && (module == 0)){
|
if ((irq == 22) && (module == 0))
|
||||||
ifxmips_w32(ifxmips_r32(IFXMIPS_EBU_PCC_ISTAT) | 0x10, IFXMIPS_EBU_PCC_ISTAT);
|
ifxmips_w32(ifxmips_r32(IFXMIPS_EBU_PCC_ISTAT) | 0x10,
|
||||||
}
|
IFXMIPS_EBU_PCC_ISTAT);
|
||||||
}
|
}
|
||||||
|
|
||||||
asmlinkage void
|
#ifdef CONFIG_CPU_MIPSR2_IRQ_VI
|
||||||
plat_irq_dispatch(void)
|
#define DEFINE_HWx_IRQDISPATCH(x) \
|
||||||
|
static void ifxmips_hw ## x ## _irqdispatch(void)\
|
||||||
|
{\
|
||||||
|
ifxmips_hw_irqdispatch(x); \
|
||||||
|
}
|
||||||
|
static void ifxmips_hw5_irqdispatch(void)
|
||||||
|
{
|
||||||
|
do_IRQ(MIPS_CPU_TIMER_IRQ);
|
||||||
|
}
|
||||||
|
DEFINE_HWx_IRQDISPATCH(0)
|
||||||
|
DEFINE_HWx_IRQDISPATCH(1)
|
||||||
|
DEFINE_HWx_IRQDISPATCH(2)
|
||||||
|
DEFINE_HWx_IRQDISPATCH(3)
|
||||||
|
DEFINE_HWx_IRQDISPATCH(4)
|
||||||
|
/*DEFINE_HWx_IRQDISPATCH(5)*/
|
||||||
|
#endif /* #ifdef CONFIG_CPU_MIPSR2_IRQ_VI */
|
||||||
|
|
||||||
|
asmlinkage void plat_irq_dispatch(void)
|
||||||
{
|
{
|
||||||
unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
|
unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
|
||||||
unsigned int i;
|
unsigned int i;
|
||||||
|
|
||||||
if(pending & CAUSEF_IP7)
|
if (pending & CAUSEF_IP7) {
|
||||||
{
|
|
||||||
do_IRQ(MIPS_CPU_TIMER_IRQ);
|
do_IRQ(MIPS_CPU_TIMER_IRQ);
|
||||||
goto out;
|
goto out;
|
||||||
} else {
|
} else {
|
||||||
for(i = 0; i < 5; i++)
|
for (i = 0; i < 5; i++) {
|
||||||
{
|
if (pending & (CAUSEF_IP2 << i)) {
|
||||||
if(pending & (CAUSEF_IP2 << i))
|
|
||||||
{
|
|
||||||
ifxmips_hw_irqdispatch(i);
|
ifxmips_hw_irqdispatch(i);
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
printk("Spurious IRQ: CAUSE=0x%08x\n", read_c0_status());
|
printk(KERN_ALERT "Spurious IRQ: CAUSE=0x%08x\n", read_c0_status());
|
||||||
|
|
||||||
out:
|
out:
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct irqaction
|
static struct irqaction cascade = {
|
||||||
cascade = {
|
|
||||||
.handler = no_action,
|
.handler = no_action,
|
||||||
.flags = IRQF_DISABLED,
|
.flags = IRQF_DISABLED,
|
||||||
.name = "cascade",
|
.name = "cascade",
|
||||||
};
|
};
|
||||||
|
|
||||||
void __init
|
void __init arch_init_irq(void)
|
||||||
arch_init_irq(void)
|
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
@ -196,8 +198,35 @@ arch_init_irq(void)
|
|||||||
for (i = 2; i <= 6; i++)
|
for (i = 2; i <= 6; i++)
|
||||||
setup_irq(i, &cascade);
|
setup_irq(i, &cascade);
|
||||||
|
|
||||||
for(i = INT_NUM_IRQ0; i <= (INT_NUM_IRQ0 + (5 * INT_NUM_IM_OFFSET)); i++)
|
#ifdef CONFIG_CPU_MIPSR2_IRQ_VI
|
||||||
set_irq_chip_and_handler(i, &ifxmips_irq_type, handle_level_irq);
|
if (cpu_has_vint) {
|
||||||
|
printk(KERN_INFO "Setting up vectored interrupts\n");
|
||||||
set_c0_status(IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5);
|
set_vi_handler(2, ifxmips_hw0_irqdispatch);
|
||||||
|
set_vi_handler(3, ifxmips_hw1_irqdispatch);
|
||||||
|
set_vi_handler(4, ifxmips_hw2_irqdispatch);
|
||||||
|
set_vi_handler(5, ifxmips_hw3_irqdispatch);
|
||||||
|
set_vi_handler(6, ifxmips_hw4_irqdispatch);
|
||||||
|
set_vi_handler(7, ifxmips_hw5_irqdispatch);
|
||||||
|
}
|
||||||
|
#endif /* CONFIG_CPU_MIPSR2_IRQ_VI */
|
||||||
|
|
||||||
|
for (i = INT_NUM_IRQ0; i <= (INT_NUM_IRQ0 + (5 * INT_NUM_IM_OFFSET));
|
||||||
|
i++)
|
||||||
|
set_irq_chip_and_handler(i, &ifxmips_irq_type,
|
||||||
|
handle_level_irq);
|
||||||
|
|
||||||
|
#if !defined(CONFIG_MIPS_MT_SMP) && !defined(CONFIG_MIPS_MT_SMTC)
|
||||||
|
set_c0_status(IE_IRQ0 | IE_IRQ1 | IE_IRQ2 |
|
||||||
|
IE_IRQ3 | IE_IRQ4 | IE_IRQ5);
|
||||||
|
#else
|
||||||
|
set_c0_status(IE_SW0 | IE_SW1 | IE_IRQ0 | IE_IRQ1 |
|
||||||
|
IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
void __cpuinit arch_fixup_c0_irqs(void)
|
||||||
|
{
|
||||||
|
/* FIXME: check for CPUID and only do fix for specific chips/versions */
|
||||||
|
cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ;
|
||||||
|
cp0_perfcount_irq = CP0_LEGACY_PERFCNT_IRQ;
|
||||||
}
|
}
|
||||||
|
@ -23,35 +23,36 @@
|
|||||||
#include <asm/bootinfo.h>
|
#include <asm/bootinfo.h>
|
||||||
#include <asm/ifxmips/ifxmips.h>
|
#include <asm/ifxmips/ifxmips.h>
|
||||||
|
|
||||||
static char buf[1024];
|
static char buf[1024]; /* for prom_printf() */
|
||||||
|
|
||||||
|
/* for voice cpu (MIPS24K) */
|
||||||
unsigned int *prom_cp1_base = NULL;
|
unsigned int *prom_cp1_base = NULL;
|
||||||
unsigned int prom_cp1_size = 0;
|
unsigned int prom_cp1_size = 0;
|
||||||
|
|
||||||
|
/* for Multithreading (APRP) on MIPS34K */
|
||||||
|
unsigned long physical_memsize = 0L;
|
||||||
|
|
||||||
#ifdef IFXMIPS_PROM_ASC0
|
#ifdef IFXMIPS_PROM_ASC0
|
||||||
#define IFXMIPS_ASC_DIFF 0
|
#define IFXMIPS_ASC_DIFF 0
|
||||||
#else
|
#else
|
||||||
#define IFXMIPS_ASC_DIFF IFXMIPS_ASC_BASE_DIFF
|
#define IFXMIPS_ASC_DIFF IFXMIPS_ASC_BASE_DIFF
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
static inline u32
|
static inline u32 asc_r32(unsigned long r)
|
||||||
asc_r32(unsigned long r)
|
|
||||||
{
|
{
|
||||||
return ifxmips_r32((u32 *)(IFXMIPS_ASC_BASE_ADDR + IFXMIPS_ASC_DIFF + r));
|
return ifxmips_r32((u32 *)(IFXMIPS_ASC_BASE_ADDR + IFXMIPS_ASC_DIFF + r));
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void
|
static inline void asc_w32(u32 v, unsigned long r)
|
||||||
asc_w32(u32 v, unsigned long r)
|
|
||||||
{
|
{
|
||||||
ifxmips_w32(v, (u32 *)(IFXMIPS_ASC_BASE_ADDR + IFXMIPS_ASC_DIFF + r));
|
ifxmips_w32(v, (u32 *)(IFXMIPS_ASC_BASE_ADDR + IFXMIPS_ASC_DIFF + r));
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void prom_free_prom_memory(void)
|
||||||
prom_free_prom_memory(void)
|
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void prom_putchar(char c)
|
||||||
prom_putchar(char c)
|
|
||||||
{
|
{
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
|
|
||||||
@ -64,8 +65,7 @@ prom_putchar(char c)
|
|||||||
local_irq_restore(flags);
|
local_irq_restore(flags);
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void prom_printf(const char *fmt, ...)
|
||||||
prom_printf(const char * fmt, ...)
|
|
||||||
{
|
{
|
||||||
va_list args;
|
va_list args;
|
||||||
int l;
|
int l;
|
||||||
@ -88,35 +88,47 @@ EXPORT_SYMBOL(prom_get_cp1_base);
|
|||||||
|
|
||||||
unsigned int prom_get_cp1_size(void)
|
unsigned int prom_get_cp1_size(void)
|
||||||
{
|
{
|
||||||
return prom_cp1_size;
|
/* return size im MB */
|
||||||
|
return prom_cp1_size>>20;
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL(prom_get_cp1_size);
|
EXPORT_SYMBOL(prom_get_cp1_size);
|
||||||
|
|
||||||
void __init
|
void __init prom_init(void)
|
||||||
prom_init(void)
|
|
||||||
{
|
{
|
||||||
int argc = fw_arg0;
|
int argc = fw_arg0;
|
||||||
char **argv = (char **) fw_arg1;
|
char **argv = (char **) fw_arg1;
|
||||||
char **envp = (char **) fw_arg2;
|
char **envp = (char **) fw_arg2;
|
||||||
|
|
||||||
int memsize = 16;
|
int memsize = 16; /* assume 16M as default */
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
mips_machtype = MACH_INFINEON_IFXMIPS;
|
mips_machtype = MACH_INFINEON_IFXMIPS;
|
||||||
|
|
||||||
|
if (argc) {
|
||||||
argv = (char**)KSEG1ADDR((unsigned long)argv);
|
argv = (char**)KSEG1ADDR((unsigned long)argv);
|
||||||
arcs_cmdline[0] = '\0';
|
arcs_cmdline[0] = '\0';
|
||||||
for (i = 1; i < argc; i++)
|
for (i = 1; i < argc; i++)
|
||||||
{
|
{
|
||||||
char *a = (char *)KSEG1ADDR(argv[i]);
|
char *a = (char *)KSEG1ADDR(argv[i]);
|
||||||
if(!a)
|
if (!argv[i])
|
||||||
continue;
|
continue;
|
||||||
if(strlen(arcs_cmdline) + strlen(a + 1) >= sizeof(arcs_cmdline))
|
/* for voice cpu on Twinpass/Danube */
|
||||||
|
if (cpu_data[0].cputype == CPU_24K)
|
||||||
|
if (!strncmp(a, "cp1_size=", 9)) {
|
||||||
|
prom_cp1_size = memparse(a + 9, &a);
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
if (strlen(arcs_cmdline) + strlen(a + 1) >= sizeof(arcs_cmdline)) {
|
||||||
|
prom_printf("cmdline overflow, skipping: %s\n", a);
|
||||||
break;
|
break;
|
||||||
|
}
|
||||||
strcat(arcs_cmdline, a);
|
strcat(arcs_cmdline, a);
|
||||||
strcat(arcs_cmdline, " ");
|
strcat(arcs_cmdline, " ");
|
||||||
}
|
}
|
||||||
|
if (!*arcs_cmdline)
|
||||||
|
strcpy(&(arcs_cmdline[0]),
|
||||||
|
"console=ttyS0,115200 rootfstype=squashfs,jffs2 init=/etc/preinit");
|
||||||
|
}
|
||||||
envp = (char**)KSEG1ADDR((unsigned long)envp);
|
envp = (char**)KSEG1ADDR((unsigned long)envp);
|
||||||
while(*envp)
|
while(*envp)
|
||||||
{
|
{
|
||||||
@ -130,16 +142,16 @@ prom_init(void)
|
|||||||
envp++;
|
envp++;
|
||||||
}
|
}
|
||||||
|
|
||||||
prom_cp1_size = 2;
|
|
||||||
memsize -= prom_cp1_size;
|
|
||||||
prom_cp1_base = (unsigned int*)(0xA0000000 + (memsize * 1024 * 1024));
|
|
||||||
|
|
||||||
prom_printf("Using %dMB Ram and reserving %dMB for cp1\n", memsize, prom_cp1_size);
|
|
||||||
memsize *= 1024 * 1024;
|
memsize *= 1024 * 1024;
|
||||||
|
|
||||||
if(!*arcs_cmdline)
|
/* only on Twinpass/Danube a second CPU is used for Voice */
|
||||||
strcpy(&(arcs_cmdline[0]),
|
if ((cpu_data[0].cputype == CPU_24K) && (prom_cp1_size)) {
|
||||||
"console=ttyS0,115200 rootfstype=squashfs,jffs2 init=/etc/preinit");
|
memsize -= prom_cp1_size;
|
||||||
|
prom_cp1_base = (unsigned int*)KSEG1ADDR(memsize);
|
||||||
|
|
||||||
|
prom_printf("Using %dMB Ram and reserving %dMB for cp1\n",
|
||||||
|
memsize>>20, prom_cp1_size>>20);
|
||||||
|
}
|
||||||
|
|
||||||
add_memory_region(0x00000000, memsize, BOOT_MEM_RAM);
|
add_memory_region(0x00000000, memsize, BOOT_MEM_RAM);
|
||||||
}
|
}
|
||||||
|
@ -23,8 +23,7 @@
|
|||||||
#include <asm/io.h>
|
#include <asm/io.h>
|
||||||
#include <asm/ifxmips/ifxmips.h>
|
#include <asm/ifxmips/ifxmips.h>
|
||||||
|
|
||||||
static void
|
static void ifxmips_machine_restart(char *command)
|
||||||
ifxmips_machine_restart(char *command)
|
|
||||||
{
|
{
|
||||||
printk(KERN_NOTICE "System restart\n");
|
printk(KERN_NOTICE "System restart\n");
|
||||||
local_irq_disable();
|
local_irq_disable();
|
||||||
@ -33,24 +32,21 @@ ifxmips_machine_restart(char *command)
|
|||||||
for(;;);
|
for(;;);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static void ifxmips_machine_halt(void)
|
||||||
ifxmips_machine_halt(void)
|
|
||||||
{
|
{
|
||||||
printk(KERN_NOTICE "System halted.\n");
|
printk(KERN_NOTICE "System halted.\n");
|
||||||
local_irq_disable();
|
local_irq_disable();
|
||||||
for(;;);
|
for(;;);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static void ifxmips_machine_power_off(void)
|
||||||
ifxmips_machine_power_off(void)
|
|
||||||
{
|
{
|
||||||
printk (KERN_NOTICE "Please turn off the power now.\n");
|
printk (KERN_NOTICE "Please turn off the power now.\n");
|
||||||
local_irq_disable();
|
local_irq_disable();
|
||||||
for(;;);
|
for(;;);
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void ifxmips_reboot_setup(void)
|
||||||
ifxmips_reboot_setup(void)
|
|
||||||
{
|
{
|
||||||
_machine_restart = ifxmips_machine_restart;
|
_machine_restart = ifxmips_machine_restart;
|
||||||
_machine_halt = ifxmips_machine_halt;
|
_machine_halt = ifxmips_machine_halt;
|
||||||
|
@ -21,7 +21,7 @@
|
|||||||
|
|
||||||
#include <asm/time.h>
|
#include <asm/time.h>
|
||||||
#include <asm/traps.h>
|
#include <asm/traps.h>
|
||||||
#include <asm/cpu.h>
|
#include <linux/cpu.h>
|
||||||
#include <asm/irq.h>
|
#include <asm/irq.h>
|
||||||
#include <asm/bootinfo.h>
|
#include <asm/bootinfo.h>
|
||||||
#include <asm/ifxmips/ifxmips.h>
|
#include <asm/ifxmips/ifxmips.h>
|
||||||
@ -33,17 +33,18 @@
|
|||||||
static unsigned int r4k_offset;
|
static unsigned int r4k_offset;
|
||||||
static unsigned int r4k_cur;
|
static unsigned int r4k_cur;
|
||||||
|
|
||||||
|
/* required in arch/mips/kernel/kspd.c */
|
||||||
|
unsigned long cpu_khz;
|
||||||
|
|
||||||
extern void ifxmips_reboot_setup(void);
|
extern void ifxmips_reboot_setup(void);
|
||||||
|
|
||||||
unsigned int
|
unsigned int ifxmips_get_cpu_ver(void)
|
||||||
ifxmips_get_cpu_ver(void)
|
|
||||||
{
|
{
|
||||||
return (ifxmips_r32(IFXMIPS_MPS_CHIPID) & 0xF0000000) >> 28;
|
return (ifxmips_r32(IFXMIPS_MPS_CHIPID) & 0xF0000000) >> 28;
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL(ifxmips_get_cpu_ver);
|
EXPORT_SYMBOL(ifxmips_get_cpu_ver);
|
||||||
|
|
||||||
static __inline__ u32
|
static inline u32 ifxmips_get_counter_resolution(void)
|
||||||
ifxmips_get_counter_resolution(void)
|
|
||||||
{
|
{
|
||||||
u32 res;
|
u32 res;
|
||||||
__asm__ __volatile__(
|
__asm__ __volatile__(
|
||||||
@ -60,23 +61,23 @@ ifxmips_get_counter_resolution(void)
|
|||||||
return res;
|
return res;
|
||||||
}
|
}
|
||||||
|
|
||||||
void __init
|
void __init plat_time_init(void)
|
||||||
plat_time_init(void)
|
|
||||||
{
|
{
|
||||||
mips_hpt_frequency = ifxmips_get_cpu_hz() / ifxmips_get_counter_resolution();
|
mips_hpt_frequency = ifxmips_get_cpu_hz() / ifxmips_get_counter_resolution();
|
||||||
r4k_cur = (read_c0_count() + r4k_offset);
|
r4k_cur = (read_c0_count() + r4k_offset);
|
||||||
write_c0_compare(r4k_cur);
|
write_c0_compare(r4k_cur);
|
||||||
|
|
||||||
ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_GPT | IFXMIPS_PMU_PWDCR_FPI);
|
ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_GPT | IFXMIPS_PMU_PWDCR_FPI);
|
||||||
ifxmips_w32(0x100, IFXMIPS_GPTU_GPT_CLC); // set clock divider to 1
|
ifxmips_w32(0x100, IFXMIPS_GPTU_GPT_CLC); /* set clock divider to 1 */
|
||||||
|
cpu_khz = ifxmips_get_cpu_hz();
|
||||||
}
|
}
|
||||||
|
|
||||||
void __init
|
void __init plat_mem_setup(void)
|
||||||
plat_mem_setup(void)
|
|
||||||
{
|
{
|
||||||
u32 status;
|
u32 status;
|
||||||
prom_printf("This %s has a cpu rev of 0x%X\n", get_system_type(), ifxmips_get_cpu_ver());
|
prom_printf("This %s system has a cpu rev of %d\n", get_system_type(), ifxmips_get_cpu_ver());
|
||||||
|
|
||||||
|
/* make sure to have no "reverse endian" for user mode! */
|
||||||
status = read_c0_status();
|
status = read_c0_status();
|
||||||
status &= (~(1<<25));
|
status &= (~(1<<25));
|
||||||
write_c0_status(status);
|
write_c0_status(status);
|
||||||
|
@ -369,7 +369,7 @@ ifxmips_request_timer(unsigned int timer, unsigned int flag, unsigned long value
|
|||||||
if (TIMER_FLAG_MASK_HANDLE (flag) != TIMER_FLAG_NO_HANDLE) {
|
if (TIMER_FLAG_MASK_HANDLE (flag) != TIMER_FLAG_NO_HANDLE) {
|
||||||
if (TIMER_FLAG_MASK_HANDLE (flag) == TIMER_FLAG_SIGNAL)
|
if (TIMER_FLAG_MASK_HANDLE (flag) == TIMER_FLAG_SIGNAL)
|
||||||
timer_dev.timer[timer - FIRST_TIMER].arg1 =
|
timer_dev.timer[timer - FIRST_TIMER].arg1 =
|
||||||
(unsigned long) find_task_by_pid ((int) arg1);
|
(unsigned long) find_task_by_vpid ((int) arg1);
|
||||||
|
|
||||||
irnen_reg = 1 << (timer - FIRST_TIMER);
|
irnen_reg = 1 << (timer - FIRST_TIMER);
|
||||||
|
|
||||||
|
@ -43,23 +43,23 @@
|
|||||||
#include <linux/delay.h>
|
#include <linux/delay.h>
|
||||||
#include <linux/spinlock.h>
|
#include <linux/spinlock.h>
|
||||||
#include <linux/slab.h>
|
#include <linux/slab.h>
|
||||||
#include <asm/system.h>
|
#include <linux/io.h>
|
||||||
#include <asm/io.h>
|
#include <linux/irq.h>
|
||||||
#include <asm/irq.h>
|
#include <linux/uaccess.h>
|
||||||
#include <asm/uaccess.h>
|
#include <linux/bitops.h>
|
||||||
#include <asm/bitops.h>
|
|
||||||
|
|
||||||
#include <linux/types.h>
|
#include <linux/types.h>
|
||||||
#include <linux/kernel.h>
|
#include <linux/kernel.h>
|
||||||
#include <linux/version.h>
|
#include <linux/version.h>
|
||||||
|
|
||||||
|
#include <asm/system.h>
|
||||||
#include <asm/ifxmips/ifxmips.h>
|
#include <asm/ifxmips/ifxmips.h>
|
||||||
#include <asm/ifxmips/ifxmips_irq.h>
|
#include <asm/ifxmips/ifxmips_irq.h>
|
||||||
#include <asm/ifxmips/ifx_ssc_defines.h>
|
#include <asm/ifxmips/ifx_ssc_defines.h>
|
||||||
#include <asm/ifxmips/ifx_ssc.h>
|
#include <asm/ifxmips/ifx_ssc.h>
|
||||||
|
|
||||||
/* allow the user to set the major device number */
|
/* allow the user to set the major device number */
|
||||||
static int ifxmips_eeprom_maj = 0;
|
static int ifxmips_eeprom_maj;
|
||||||
|
|
||||||
extern int ifx_ssc_init(void);
|
extern int ifx_ssc_init(void);
|
||||||
extern int ifx_ssc_open(struct inode *inode, struct file *filp);
|
extern int ifx_ssc_open(struct inode *inode, struct file *filp);
|
||||||
@ -88,8 +88,7 @@ extern int ifx_ssc_rx (char *rx_buf, unsigned int rx_len);
|
|||||||
#define EEPROM_PAGE_SIZE 4
|
#define EEPROM_PAGE_SIZE 4
|
||||||
#define EEPROM_SIZE 512
|
#define EEPROM_SIZE 512
|
||||||
|
|
||||||
static int
|
static int eeprom_rdsr(void)
|
||||||
eeprom_rdsr (void)
|
|
||||||
{
|
{
|
||||||
int ret = 0;
|
int ret = 0;
|
||||||
unsigned char cmd = EEPROM_RDSR;
|
unsigned char cmd = EEPROM_RDSR;
|
||||||
@ -108,15 +107,13 @@ eeprom_rdsr (void)
|
|||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void eeprom_wip_over(void)
|
||||||
eeprom_wip_over (void)
|
|
||||||
{
|
{
|
||||||
while (eeprom_rdsr())
|
while (eeprom_rdsr())
|
||||||
printk("waiting for eeprom\n");
|
printk(KERN_INFO "waiting for eeprom\n");
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static int eeprom_wren(void)
|
||||||
eeprom_wren (void)
|
|
||||||
{
|
{
|
||||||
unsigned char cmd = EEPROM_WREN;
|
unsigned char cmd = EEPROM_WREN;
|
||||||
int ret = 0;
|
int ret = 0;
|
||||||
@ -136,8 +133,7 @@ eeprom_wren (void)
|
|||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static int eeprom_wrsr(void)
|
||||||
eeprom_wrsr (void)
|
|
||||||
{
|
{
|
||||||
int ret = 0;
|
int ret = 0;
|
||||||
unsigned char cmd[2];
|
unsigned char cmd[2];
|
||||||
@ -146,9 +142,8 @@ eeprom_wrsr (void)
|
|||||||
cmd[0] = EEPROM_WRSR;
|
cmd[0] = EEPROM_WRSR;
|
||||||
cmd[1] = 0;
|
cmd[1] = 0;
|
||||||
|
|
||||||
if ((ret = eeprom_wren()))
|
if ((ret = eeprom_wren())) {
|
||||||
{
|
printk(KERN_ERR "eeprom_wren fails\n");
|
||||||
printk ("eeprom_wren fails\n");
|
|
||||||
goto out1;
|
goto out1;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -178,16 +173,14 @@ out1:
|
|||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static int eeprom_read(unsigned int addr, unsigned char *buf, unsigned int len)
|
||||||
eeprom_read (unsigned int addr, unsigned char *buf, unsigned int len)
|
|
||||||
{
|
{
|
||||||
int ret = 0;
|
int ret = 0;
|
||||||
unsigned char write_buf[2];
|
unsigned char write_buf[2];
|
||||||
unsigned int eff = 0;
|
unsigned int eff = 0;
|
||||||
unsigned long flag;
|
unsigned long flag;
|
||||||
|
|
||||||
while (1)
|
while (1) {
|
||||||
{
|
|
||||||
eeprom_wip_over();
|
eeprom_wip_over();
|
||||||
eff = EEPROM_PAGE_SIZE - (addr % EEPROM_PAGE_SIZE);
|
eff = EEPROM_PAGE_SIZE - (addr % EEPROM_PAGE_SIZE);
|
||||||
eff = (eff < len) ? eff : len;
|
eff = (eff < len) ? eff : len;
|
||||||
@ -199,9 +192,9 @@ eeprom_read (unsigned int addr, unsigned char *buf, unsigned int len)
|
|||||||
write_buf[0] = EEPROM_READ | ((unsigned char)((addr & 0x100) >> 5));
|
write_buf[0] = EEPROM_READ | ((unsigned char)((addr & 0x100) >> 5));
|
||||||
write_buf[1] = (addr & 0xff);
|
write_buf[1] = (addr & 0xff);
|
||||||
|
|
||||||
if ((ret = ifx_ssc_txrx (write_buf, 2, buf, eff)) != eff)
|
ret = ifx_ssc_txrx(write_buf, 2, buf, eff);
|
||||||
{
|
if (ret != eff) {
|
||||||
printk("ssc_txrx fails %d\n", ret);
|
printk(KERN_ERR "ssc_txrx fails %d\n", ret);
|
||||||
ifx_ssc_cs_high(EEPROM_CS);
|
ifx_ssc_cs_high(EEPROM_CS);
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
@ -210,7 +203,8 @@ eeprom_read (unsigned int addr, unsigned char *buf, unsigned int len)
|
|||||||
len -= ret;
|
len -= ret;
|
||||||
addr += ret;
|
addr += ret;
|
||||||
|
|
||||||
if ((ret = ifx_ssc_cs_high(EEPROM_CS)))
|
ret = ifx_ssc_cs_high(EEPROM_CS);
|
||||||
|
if (ret)
|
||||||
goto out;
|
goto out;
|
||||||
|
|
||||||
local_irq_restore(flag);
|
local_irq_restore(flag);
|
||||||
@ -225,8 +219,7 @@ out2:
|
|||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static int eeprom_write(unsigned int addr, unsigned char *buf, unsigned int len)
|
||||||
eeprom_write (unsigned int addr, unsigned char *buf, unsigned int len)
|
|
||||||
{
|
{
|
||||||
int ret = 0;
|
int ret = 0;
|
||||||
unsigned int eff = 0;
|
unsigned int eff = 0;
|
||||||
@ -234,13 +227,11 @@ eeprom_write (unsigned int addr, unsigned char *buf, unsigned int len)
|
|||||||
int i;
|
int i;
|
||||||
unsigned char rx_buf[EEPROM_PAGE_SIZE];
|
unsigned char rx_buf[EEPROM_PAGE_SIZE];
|
||||||
|
|
||||||
while (1)
|
while (1) {
|
||||||
{
|
|
||||||
eeprom_wip_over();
|
eeprom_wip_over();
|
||||||
|
|
||||||
if ((ret = eeprom_wren()))
|
if ((ret = eeprom_wren())) {
|
||||||
{
|
printk(KERN_ERR "eeprom_wren fails\n");
|
||||||
printk("eeprom_wren fails\n");
|
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -250,7 +241,7 @@ eeprom_write (unsigned int addr, unsigned char *buf, unsigned int len)
|
|||||||
eff = EEPROM_PAGE_SIZE - (addr % EEPROM_PAGE_SIZE);
|
eff = EEPROM_PAGE_SIZE - (addr % EEPROM_PAGE_SIZE);
|
||||||
eff = (eff < len) ? eff : len;
|
eff = (eff < len) ? eff : len;
|
||||||
|
|
||||||
printk("EEPROM Write:\n");
|
printk(KERN_INFO "EEPROM Write:\n");
|
||||||
for (i = 0; i < eff; i++) {
|
for (i = 0; i < eff; i++) {
|
||||||
printk("%2x ", buf[i]);
|
printk("%2x ", buf[i]);
|
||||||
if ((i % 16) == 15)
|
if ((i % 16) == 15)
|
||||||
@ -261,16 +252,14 @@ eeprom_write (unsigned int addr, unsigned char *buf, unsigned int len)
|
|||||||
if ((ret = ifx_ssc_cs_low(EEPROM_CS)))
|
if ((ret = ifx_ssc_cs_low(EEPROM_CS)))
|
||||||
goto out;
|
goto out;
|
||||||
|
|
||||||
if ((ret = ifx_ssc_tx (write_buf, 2)) < 0)
|
if ((ret = ifx_ssc_tx(write_buf, 2)) < 0) {
|
||||||
{
|
printk(KERN_ERR "ssc_tx fails %d\n", ret);
|
||||||
printk("ssc_tx fails %d\n", ret);
|
|
||||||
ifx_ssc_cs_high(EEPROM_CS);
|
ifx_ssc_cs_high(EEPROM_CS);
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
|
|
||||||
if ((ret = ifx_ssc_tx (buf, eff)) != eff)
|
if ((ret = ifx_ssc_tx(buf, eff)) != eff) {
|
||||||
{
|
printk(KERN_ERR "ssc_tx fails %d\n", ret);
|
||||||
printk("ssc_tx fails %d\n", ret);
|
|
||||||
ifx_ssc_cs_high(EEPROM_CS);
|
ifx_ssc_cs_high(EEPROM_CS);
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
@ -282,12 +271,10 @@ eeprom_write (unsigned int addr, unsigned char *buf, unsigned int len)
|
|||||||
if ((ret = ifx_ssc_cs_high(EEPROM_CS)))
|
if ((ret = ifx_ssc_cs_high(EEPROM_CS)))
|
||||||
goto out;
|
goto out;
|
||||||
|
|
||||||
printk ("<==");
|
printk(KERN_INFO "<==");
|
||||||
eeprom_read((addr - eff), rx_buf, eff);
|
eeprom_read((addr - eff), rx_buf, eff);
|
||||||
for (i = 0; i < eff; i++)
|
for (i = 0; i < eff; i++)
|
||||||
{
|
|
||||||
printk("[%x]", rx_buf[i]);
|
printk("[%x]", rx_buf[i]);
|
||||||
}
|
|
||||||
printk("\n");
|
printk("\n");
|
||||||
|
|
||||||
if (len <= 0)
|
if (len <= 0)
|
||||||
@ -298,81 +285,71 @@ out:
|
|||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int ifxmips_eeprom_open(struct inode *inode, struct file *filp)
|
||||||
ifxmips_eeprom_open (struct inode *inode, struct file *filp)
|
|
||||||
{
|
{
|
||||||
filp->f_pos = 0;
|
filp->f_pos = 0;
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int ifxmips_eeprom_close(struct inode *inode, struct file *filp)
|
||||||
ifxmips_eeprom_close (struct inode *inode, struct file *filp)
|
|
||||||
{
|
{
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int ifxmips_eeprom_ioctl(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long data)
|
||||||
ifxmips_eeprom_ioctl (struct inode *inode, struct file *filp, unsigned int cmd, unsigned long data)
|
|
||||||
{
|
{
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
ssize_t
|
ssize_t ifxmips_eeprom_read(char *buf, size_t len, unsigned int addr)
|
||||||
ifxmips_eeprom_read (char *buf, size_t len, unsigned int addr)
|
|
||||||
{
|
{
|
||||||
int ret = 0;
|
int ret = 0;
|
||||||
unsigned int data;
|
unsigned int data;
|
||||||
|
|
||||||
printk("addr:=%d\n", addr);
|
printk(KERN_INFO "addr:=%d\n", addr);
|
||||||
printk("len:=%d\n", len);
|
printk(KERN_INFO "len:=%d\n", len);
|
||||||
|
|
||||||
if ((addr + len) > EEPROM_SIZE)
|
if ((addr + len) > EEPROM_SIZE) {
|
||||||
{
|
printk(KERN_ERR "invalid len\n");
|
||||||
printk("invalid len\n");
|
|
||||||
addr = 0;
|
addr = 0;
|
||||||
len = EEPROM_SIZE / 2;
|
len = EEPROM_SIZE / 2;
|
||||||
}
|
}
|
||||||
|
|
||||||
if ((ret = ifx_ssc_open((struct inode *) 0, NULL)))
|
if ((ret = ifx_ssc_open((struct inode *)0, NULL))) {
|
||||||
{
|
printk(KERN_ERR "ifxmips_ssc_open fails\n");
|
||||||
printk("ifxmips_eeprom_open fails\n");
|
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
|
|
||||||
data = (unsigned int)IFX_SSC_MODE_RXTX;
|
data = (unsigned int)IFX_SSC_MODE_RXTX;
|
||||||
|
|
||||||
if ((ret = ifx_ssc_ioctl((struct inode *) 0, NULL, IFX_SSC_RXTX_MODE_SET, (unsigned long) &data)))
|
if ((ret = ifx_ssc_ioctl((struct inode *)0, NULL, IFX_SSC_RXTX_MODE_SET, (unsigned long) &data))) {
|
||||||
{
|
printk(KERN_ERR "set RXTX mode fails\n");
|
||||||
printk("set RXTX mode fails\n");
|
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
|
|
||||||
if ((ret = eeprom_wrsr()))
|
if ((ret = eeprom_wrsr())) {
|
||||||
{
|
printk(KERN_ERR "EEPROM reset fails\n");
|
||||||
printk("EEPROM reset fails\n");
|
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
|
|
||||||
if ((ret = eeprom_read(addr, buf, len)))
|
if ((ret = eeprom_read(addr, buf, len))) {
|
||||||
{
|
printk(KERN_ERR "eeprom read fails\n");
|
||||||
printk("eeprom read fails\n");
|
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
|
|
||||||
out:
|
out:
|
||||||
if (ifx_ssc_close((struct inode *)0, NULL))
|
if (ifx_ssc_close((struct inode *)0, NULL))
|
||||||
printk("ifxmips_eeprom_close fails\n");
|
printk(KERN_ERR "ifxmips_ssc_close fails\n");
|
||||||
|
|
||||||
return len;
|
return len;
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL(ifxmips_eeprom_read);
|
EXPORT_SYMBOL(ifxmips_eeprom_read);
|
||||||
|
|
||||||
static ssize_t
|
static ssize_t ifxmips_eeprom_fops_read(struct file *filp, char *ubuf, size_t len, loff_t *off)
|
||||||
ifxmips_eeprom_fops_read (struct file *filp, char *ubuf, size_t len, loff_t * off)
|
|
||||||
{
|
{
|
||||||
int ret = 0;
|
int ret = 0;
|
||||||
unsigned char ssc_rx_buf[EEPROM_SIZE];
|
unsigned char ssc_rx_buf[EEPROM_SIZE];
|
||||||
long flag;
|
unsigned long flag;
|
||||||
|
|
||||||
if (*off >= EEPROM_SIZE)
|
if (*off >= EEPROM_SIZE)
|
||||||
return 0;
|
return 0;
|
||||||
@ -385,15 +362,13 @@ ifxmips_eeprom_fops_read (struct file *filp, char *ubuf, size_t len, loff_t * of
|
|||||||
|
|
||||||
local_irq_save(flag);
|
local_irq_save(flag);
|
||||||
|
|
||||||
if ((ret = ifxmips_eeprom_read(ssc_rx_buf, len, *off)) < 0)
|
if ((ret = ifxmips_eeprom_read(ssc_rx_buf, len, *off)) < 0) {
|
||||||
{
|
printk(KERN_ERR "read fails, err=%x\n", ret);
|
||||||
printk("read fails, err=%x\n", ret);
|
|
||||||
local_irq_restore(flag);
|
local_irq_restore(flag);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (copy_to_user((void*)ubuf, ssc_rx_buf, ret) != 0)
|
if (copy_to_user((void *)ubuf, ssc_rx_buf, ret) != 0) {
|
||||||
{
|
|
||||||
local_irq_restore(flag);
|
local_irq_restore(flag);
|
||||||
ret = -EFAULT;
|
ret = -EFAULT;
|
||||||
}
|
}
|
||||||
@ -404,46 +379,42 @@ ifxmips_eeprom_fops_read (struct file *filp, char *ubuf, size_t len, loff_t * of
|
|||||||
return len;
|
return len;
|
||||||
}
|
}
|
||||||
|
|
||||||
ssize_t
|
ssize_t ifxmips_eeprom_write(char *buf, size_t len, unsigned int addr)
|
||||||
ifxmips_eeprom_write (char *buf, size_t len, unsigned int addr)
|
|
||||||
{
|
{
|
||||||
int ret = 0;
|
int ret = 0;
|
||||||
unsigned int data;
|
unsigned int data;
|
||||||
|
|
||||||
if ((ret = ifx_ssc_open ((struct inode *) 0, NULL)))
|
if ((ret = ifx_ssc_open((struct inode *)0, NULL))) {
|
||||||
{
|
printk(KERN_ERR "ifxmips_ssc_open fails\n");
|
||||||
printk ("ifxmips_eeprom_open fails\n");
|
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
|
|
||||||
data = (unsigned int) IFX_SSC_MODE_RXTX;
|
data = (unsigned int) IFX_SSC_MODE_RXTX;
|
||||||
|
|
||||||
if ((ret = ifx_ssc_ioctl ((struct inode *) 0, NULL, IFX_SSC_RXTX_MODE_SET, (unsigned long) &data)))
|
if ((ret = ifx_ssc_ioctl((struct inode *)0, NULL, IFX_SSC_RXTX_MODE_SET, (unsigned long) &data))) {
|
||||||
{
|
printk(KERN_ERR "set RXTX mode fails\n");
|
||||||
printk ("set RXTX mode fails\n");
|
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
|
|
||||||
if ((ret = eeprom_wrsr())) {
|
if ((ret = eeprom_wrsr())) {
|
||||||
printk ("EEPROM reset fails\n");
|
printk(KERN_ERR "EEPROM reset fails\n");
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
|
|
||||||
if ((ret = eeprom_write(addr, buf, len))) {
|
if ((ret = eeprom_write(addr, buf, len))) {
|
||||||
printk ("eeprom write fails\n");
|
printk(KERN_ERR "eeprom write fails\n");
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
|
|
||||||
out:
|
out:
|
||||||
if (ifx_ssc_close((struct inode *)0, NULL))
|
if (ifx_ssc_close((struct inode *)0, NULL))
|
||||||
printk ("ifxmips_eeprom_close fails\n");
|
printk(KERN_ERR "ifxmips_ssc_close fails\n");
|
||||||
|
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL(ifxmips_eeprom_write);
|
EXPORT_SYMBOL(ifxmips_eeprom_write);
|
||||||
|
|
||||||
static ssize_t
|
static ssize_t ifxmips_eeprom_fops_write(struct file *filp, const char *ubuf, size_t len, loff_t *off)
|
||||||
ifxmips_eeprom_fops_write (struct file *filp, const char *ubuf, size_t len, loff_t * off)
|
|
||||||
{
|
{
|
||||||
int ret = 0;
|
int ret = 0;
|
||||||
unsigned char ssc_tx_buf[EEPROM_SIZE];
|
unsigned char ssc_tx_buf[EEPROM_SIZE];
|
||||||
@ -465,8 +436,7 @@ ifxmips_eeprom_fops_write (struct file *filp, const char *ubuf, size_t len, loff
|
|||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
loff_t
|
loff_t ifxmips_eeprom_llseek(struct file *filp, loff_t off, int whence)
|
||||||
ifxmips_eeprom_llseek (struct file * filp, loff_t off, int whence)
|
|
||||||
{
|
{
|
||||||
loff_t newpos;
|
loff_t newpos;
|
||||||
switch (whence) {
|
switch (whence) {
|
||||||
@ -491,41 +461,38 @@ ifxmips_eeprom_llseek (struct file * filp, loff_t off, int whence)
|
|||||||
}
|
}
|
||||||
|
|
||||||
static struct file_operations ifxmips_eeprom_fops = {
|
static struct file_operations ifxmips_eeprom_fops = {
|
||||||
owner:THIS_MODULE,
|
.owner = THIS_MODULE,
|
||||||
llseek:ifxmips_eeprom_llseek,
|
.llseek = ifxmips_eeprom_llseek,
|
||||||
read:ifxmips_eeprom_fops_read,
|
.read = ifxmips_eeprom_fops_read,
|
||||||
write:ifxmips_eeprom_fops_write,
|
.write = ifxmips_eeprom_fops_write,
|
||||||
ioctl:ifxmips_eeprom_ioctl,
|
.ioctl = ifxmips_eeprom_ioctl,
|
||||||
open:ifxmips_eeprom_open,
|
.open = ifxmips_eeprom_open,
|
||||||
release:ifxmips_eeprom_close,
|
.release = ifxmips_eeprom_close,
|
||||||
};
|
};
|
||||||
|
|
||||||
int __init
|
int __init ifxmips_eeprom_init(void)
|
||||||
ifxmips_eeprom_init (void)
|
|
||||||
{
|
{
|
||||||
int ret = 0;
|
int ret = 0;
|
||||||
|
|
||||||
ifxmips_eeprom_maj = register_chrdev(0, "eeprom", &ifxmips_eeprom_fops);
|
ifxmips_eeprom_maj = register_chrdev(0, "eeprom", &ifxmips_eeprom_fops);
|
||||||
|
|
||||||
if (ifxmips_eeprom_maj < 0)
|
if (ifxmips_eeprom_maj < 0) {
|
||||||
{
|
printk(KERN_ERR "failed to register eeprom device\n");
|
||||||
printk("failed to register eeprom device\n");
|
|
||||||
ret = -EINVAL;
|
ret = -EINVAL;
|
||||||
|
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
|
|
||||||
printk("ifxmips_eeprom : /dev/eeprom mayor %d\n", ifxmips_eeprom_maj);
|
printk(KERN_INFO "ifxmips_eeprom : /dev/eeprom mayor %d\n", ifxmips_eeprom_maj);
|
||||||
|
|
||||||
out:
|
out:
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
void __exit
|
void __exit ifxmips_eeprom_cleanup_module(void)
|
||||||
ifxmips_eeprom_cleanup_module (void)
|
|
||||||
{
|
{
|
||||||
/*if (unregister_chrdev(ifxmips_eeprom_maj, "eeprom")) {
|
/*if (unregister_chrdev(ifxmips_eeprom_maj, "eeprom")) {
|
||||||
printk ("Unable to unregister major %d for the EEPROM\n",
|
printk(KERN_ERR "Unable to unregister major %d for the EEPROM\n",
|
||||||
maj);
|
maj);
|
||||||
}*/
|
}*/
|
||||||
}
|
}
|
||||||
@ -538,4 +505,3 @@ MODULE_AUTHOR ("Peng Liu");
|
|||||||
MODULE_DESCRIPTION("IFAP EEPROM driver");
|
MODULE_DESCRIPTION("IFAP EEPROM driver");
|
||||||
MODULE_SUPPORTED_DEVICE("ifxmips_eeprom");
|
MODULE_SUPPORTED_DEVICE("ifxmips_eeprom");
|
||||||
|
|
||||||
|
|
||||||
|
@ -18,12 +18,14 @@
|
|||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
|
|
||||||
// ### TO DO: general issues:
|
/*
|
||||||
// - power management
|
### TO DO: general issues:
|
||||||
// - interrupt handling (direct/indirect)
|
- power management
|
||||||
// - pin/mux-handling (just overall concept due to project dependency)
|
- interrupt handling (direct/indirect)
|
||||||
// - multiple instances capability
|
- pin/mux-handling (just overall concept due to project dependency)
|
||||||
// - slave functionality
|
- multiple instances capability
|
||||||
|
- slave functionality
|
||||||
|
*/
|
||||||
|
|
||||||
#include <linux/module.h>
|
#include <linux/module.h>
|
||||||
#include <linux/errno.h>
|
#include <linux/errno.h>
|
||||||
@ -42,24 +44,23 @@
|
|||||||
#include <linux/delay.h>
|
#include <linux/delay.h>
|
||||||
#include <linux/spinlock.h>
|
#include <linux/spinlock.h>
|
||||||
#include <linux/slab.h>
|
#include <linux/slab.h>
|
||||||
|
#include <linux/io.h>
|
||||||
#include <asm/system.h>
|
#include <linux/irq.h>
|
||||||
#include <asm/io.h>
|
#include <linux/uaccess.h>
|
||||||
#include <asm/irq.h>
|
#include <linux/bitops.h>
|
||||||
#include <asm/uaccess.h>
|
|
||||||
#include <asm/bitops.h>
|
|
||||||
|
|
||||||
#include <linux/types.h>
|
#include <linux/types.h>
|
||||||
#include <linux/kernel.h>
|
#include <linux/kernel.h>
|
||||||
#include <linux/version.h>
|
#include <linux/version.h>
|
||||||
|
|
||||||
|
#include <asm/system.h>
|
||||||
#include <asm/ifxmips/ifxmips.h>
|
#include <asm/ifxmips/ifxmips.h>
|
||||||
#include <asm/ifxmips/ifxmips_irq.h>
|
#include <asm/ifxmips/ifxmips_irq.h>
|
||||||
#include <asm/ifxmips/ifx_ssc_defines.h>
|
#include <asm/ifxmips/ifx_ssc_defines.h>
|
||||||
#include <asm/ifxmips/ifx_ssc.h>
|
#include <asm/ifxmips/ifx_ssc.h>
|
||||||
|
|
||||||
/* allow the user to set the major device number */
|
/* allow the user to set the major device number */
|
||||||
static int maj = 0;
|
static int maj;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* This is the per-channel data structure containing pointers, flags
|
* This is the per-channel data structure containing pointers, flags
|
||||||
@ -75,22 +76,19 @@ static void tx_int (struct ifx_ssc_port *);
|
|||||||
extern unsigned int ifxmips_get_fpi_hz(void);
|
extern unsigned int ifxmips_get_fpi_hz(void);
|
||||||
extern void ifxmips_mask_and_ack_irq(unsigned int irq_nr);
|
extern void ifxmips_mask_and_ack_irq(unsigned int irq_nr);
|
||||||
|
|
||||||
static inline unsigned int
|
static inline unsigned int ifx_ssc_get_kernel_clk(struct ifx_ssc_port *info)
|
||||||
ifx_ssc_get_kernel_clk (struct ifx_ssc_port *info)
|
|
||||||
{
|
{
|
||||||
unsigned int rmc;
|
unsigned int rmc;
|
||||||
|
|
||||||
rmc = (ifxmips_r32(IFXMIPS_SSC_CLC) & IFX_CLC_RUN_DIVIDER_MASK) >> IFX_CLC_RUN_DIVIDER_OFFSET;
|
rmc = (ifxmips_r32(IFXMIPS_SSC_CLC) & IFX_CLC_RUN_DIVIDER_MASK) >> IFX_CLC_RUN_DIVIDER_OFFSET;
|
||||||
if (rmc == 0)
|
if (rmc == 0) {
|
||||||
{
|
|
||||||
printk("ifx_ssc_get_kernel_clk rmc==0 \n");
|
printk("ifx_ssc_get_kernel_clk rmc==0 \n");
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
return ifxmips_get_fpi_hz() / rmc;
|
return ifxmips_get_fpi_hz() / rmc;
|
||||||
}
|
}
|
||||||
|
|
||||||
inline static void
|
static inline void rx_int(struct ifx_ssc_port *info)
|
||||||
rx_int (struct ifx_ssc_port *info)
|
|
||||||
{
|
{
|
||||||
int fifo_fill_lev, bytes_in_buf, i;
|
int fifo_fill_lev, bytes_in_buf, i;
|
||||||
unsigned long tmp_val;
|
unsigned long tmp_val;
|
||||||
@ -99,7 +97,7 @@ rx_int (struct ifx_ssc_port *info)
|
|||||||
/* number of words waiting in the RX FIFO */
|
/* number of words waiting in the RX FIFO */
|
||||||
fifo_fill_lev = (ifxmips_r32(IFXMIPS_SSC_FSTAT) & IFX_SSC_FSTAT_RECEIVED_WORDS_MASK) >> IFX_SSC_FSTAT_RECEIVED_WORDS_OFFSET;
|
fifo_fill_lev = (ifxmips_r32(IFXMIPS_SSC_FSTAT) & IFX_SSC_FSTAT_RECEIVED_WORDS_MASK) >> IFX_SSC_FSTAT_RECEIVED_WORDS_OFFSET;
|
||||||
bytes_in_buf = info->rxbuf_end - info->rxbuf_ptr;
|
bytes_in_buf = info->rxbuf_end - info->rxbuf_ptr;
|
||||||
// transfer with 32 bits per entry
|
/* transfer with 32 bits per entry */
|
||||||
while ((bytes_in_buf >= 4) && (fifo_fill_lev > 0)) {
|
while ((bytes_in_buf >= 4) && (fifo_fill_lev > 0)) {
|
||||||
tmp_ptr = (unsigned long *)info->rxbuf_ptr;
|
tmp_ptr = (unsigned long *)info->rxbuf_ptr;
|
||||||
*tmp_ptr = ifxmips_r32(IFXMIPS_SSC_RB);
|
*tmp_ptr = ifxmips_r32(IFXMIPS_SSC_RB);
|
||||||
@ -109,7 +107,7 @@ rx_int (struct ifx_ssc_port *info)
|
|||||||
bytes_in_buf -= 4;
|
bytes_in_buf -= 4;
|
||||||
}
|
}
|
||||||
|
|
||||||
// now do the rest as mentioned in STATE.RXBV
|
/* now do the rest as mentioned in STATE.RXBV */
|
||||||
while ((bytes_in_buf > 0) && (fifo_fill_lev > 0)) {
|
while ((bytes_in_buf > 0) && (fifo_fill_lev > 0)) {
|
||||||
rx_valid_cnt = (ifxmips_r32(IFXMIPS_SSC_STATE) & IFX_SSC_STATE_RX_BYTE_VALID_MASK) >> IFX_SSC_STATE_RX_BYTE_VALID_OFFSET;
|
rx_valid_cnt = (ifxmips_r32(IFXMIPS_SSC_STATE) & IFX_SSC_STATE_RX_BYTE_VALID_MASK) >> IFX_SSC_STATE_RX_BYTE_VALID_OFFSET;
|
||||||
if (rx_valid_cnt == 0)
|
if (rx_valid_cnt == 0)
|
||||||
@ -120,8 +118,7 @@ rx_int (struct ifx_ssc_port *info)
|
|||||||
|
|
||||||
tmp_val = ifxmips_r32(IFXMIPS_SSC_RB);
|
tmp_val = ifxmips_r32(IFXMIPS_SSC_RB);
|
||||||
|
|
||||||
for (i = 0; i < rx_valid_cnt; i++)
|
for (i = 0; i < rx_valid_cnt; i++) {
|
||||||
{
|
|
||||||
*info->rxbuf_ptr = (tmp_val >> (8 * (rx_valid_cnt - i - 1))) & 0xff;
|
*info->rxbuf_ptr = (tmp_val >> (8 * (rx_valid_cnt - i - 1))) & 0xff;
|
||||||
bytes_in_buf--;
|
bytes_in_buf--;
|
||||||
info->rxbuf_ptr++;
|
info->rxbuf_ptr++;
|
||||||
@ -129,13 +126,11 @@ rx_int (struct ifx_ssc_port *info)
|
|||||||
info->stats.rxBytes += rx_valid_cnt;
|
info->stats.rxBytes += rx_valid_cnt;
|
||||||
}
|
}
|
||||||
|
|
||||||
// check if transfer is complete
|
/* check if transfer is complete */
|
||||||
if (info->rxbuf_ptr >= info->rxbuf_end)
|
if (info->rxbuf_ptr >= info->rxbuf_end) {
|
||||||
{
|
|
||||||
disable_irq(IFXMIPS_SSC_RIR);
|
disable_irq(IFXMIPS_SSC_RIR);
|
||||||
wake_up_interruptible(&info->rwait);
|
wake_up_interruptible(&info->rwait);
|
||||||
} else if ((info->opts.modeRxTx == IFX_SSC_MODE_RX) && (ifxmips_r32(IFXMIPS_SSC_RXCNT) == 0))
|
} else if ((info->opts.modeRxTx == IFX_SSC_MODE_RX) && (ifxmips_r32(IFXMIPS_SSC_RXCNT) == 0)) {
|
||||||
{
|
|
||||||
if (info->rxbuf_end - info->rxbuf_ptr < IFX_SSC_RXREQ_BLOCK_SIZE)
|
if (info->rxbuf_end - info->rxbuf_ptr < IFX_SSC_RXREQ_BLOCK_SIZE)
|
||||||
ifxmips_w32((info->rxbuf_end - info->rxbuf_ptr) << IFX_SSC_RXREQ_RXCOUNT_OFFSET, IFXMIPS_SSC_RXREQ);
|
ifxmips_w32((info->rxbuf_end - info->rxbuf_ptr) << IFX_SSC_RXREQ_RXCOUNT_OFFSET, IFXMIPS_SSC_RXREQ);
|
||||||
else
|
else
|
||||||
@ -143,8 +138,7 @@ rx_int (struct ifx_ssc_port *info)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
inline static void
|
static inline void tx_int(struct ifx_ssc_port *info)
|
||||||
tx_int (struct ifx_ssc_port *info)
|
|
||||||
{
|
{
|
||||||
|
|
||||||
int fifo_space, fill, i;
|
int fifo_space, fill, i;
|
||||||
@ -159,9 +153,8 @@ tx_int (struct ifx_ssc_port *info)
|
|||||||
if (fill > fifo_space * 4)
|
if (fill > fifo_space * 4)
|
||||||
fill = fifo_space * 4;
|
fill = fifo_space * 4;
|
||||||
|
|
||||||
for (i = 0; i < fill / 4; i++)
|
for (i = 0; i < fill / 4; i++) {
|
||||||
{
|
/* at first 32 bit access */
|
||||||
// at first 32 bit access
|
|
||||||
ifxmips_w32(*(UINT32 *)info->txbuf_ptr, IFXMIPS_SSC_TB);
|
ifxmips_w32(*(UINT32 *)info->txbuf_ptr, IFXMIPS_SSC_TB);
|
||||||
info->txbuf_ptr += 4;
|
info->txbuf_ptr += 4;
|
||||||
}
|
}
|
||||||
@ -169,9 +162,8 @@ tx_int (struct ifx_ssc_port *info)
|
|||||||
fifo_space -= fill / 4;
|
fifo_space -= fill / 4;
|
||||||
info->stats.txBytes += fill & ~0x3;
|
info->stats.txBytes += fill & ~0x3;
|
||||||
fill &= 0x3;
|
fill &= 0x3;
|
||||||
if ((fifo_space > 0) & (fill > 1))
|
if ((fifo_space > 0) & (fill > 1)) {
|
||||||
{
|
/* trailing 16 bit access */
|
||||||
// trailing 16 bit access
|
|
||||||
WRITE_PERIPHERAL_REGISTER_16(*(UINT16 *)info->txbuf_ptr, info->mapbase + IFX_SSC_TB);
|
WRITE_PERIPHERAL_REGISTER_16(*(UINT16 *)info->txbuf_ptr, info->mapbase + IFX_SSC_TB);
|
||||||
info->txbuf_ptr += 2;
|
info->txbuf_ptr += 2;
|
||||||
info->stats.txBytes += 2;
|
info->stats.txBytes += 2;
|
||||||
@ -179,17 +171,15 @@ tx_int (struct ifx_ssc_port *info)
|
|||||||
fill -= 2;
|
fill -= 2;
|
||||||
}
|
}
|
||||||
|
|
||||||
if ((fifo_space > 0) & (fill > 0))
|
if ((fifo_space > 0) & (fill > 0)) {
|
||||||
{
|
/* trailing 8 bit access */
|
||||||
// trailing 8 bit access
|
|
||||||
WRITE_PERIPHERAL_REGISTER_8(*(UINT8 *)info->txbuf_ptr, info->mapbase + IFX_SSC_TB);
|
WRITE_PERIPHERAL_REGISTER_8(*(UINT8 *)info->txbuf_ptr, info->mapbase + IFX_SSC_TB);
|
||||||
info->txbuf_ptr++;
|
info->txbuf_ptr++;
|
||||||
info->stats.txBytes++;
|
info->stats.txBytes++;
|
||||||
}
|
}
|
||||||
|
|
||||||
// check if transmission complete
|
/* check if transmission complete */
|
||||||
if (info->txbuf_ptr >= info->txbuf_end)
|
if (info->txbuf_ptr >= info->txbuf_end) {
|
||||||
{
|
|
||||||
disable_irq(IFXMIPS_SSC_TIR);
|
disable_irq(IFXMIPS_SSC_TIR);
|
||||||
kfree(info->txbuf);
|
kfree(info->txbuf);
|
||||||
info->txbuf = NULL;
|
info->txbuf = NULL;
|
||||||
@ -197,8 +187,7 @@ tx_int (struct ifx_ssc_port *info)
|
|||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
irqreturn_t
|
irqreturn_t ifx_ssc_rx_int(int irq, void *dev_id)
|
||||||
ifx_ssc_rx_int (int irq, void *dev_id)
|
|
||||||
{
|
{
|
||||||
struct ifx_ssc_port *info = (struct ifx_ssc_port *)dev_id;
|
struct ifx_ssc_port *info = (struct ifx_ssc_port *)dev_id;
|
||||||
rx_int(info);
|
rx_int(info);
|
||||||
@ -206,8 +195,7 @@ ifx_ssc_rx_int (int irq, void *dev_id)
|
|||||||
return IRQ_HANDLED;
|
return IRQ_HANDLED;
|
||||||
}
|
}
|
||||||
|
|
||||||
irqreturn_t
|
irqreturn_t ifx_ssc_tx_int(int irq, void *dev_id)
|
||||||
ifx_ssc_tx_int (int irq, void *dev_id)
|
|
||||||
{
|
{
|
||||||
struct ifx_ssc_port *info = (struct ifx_ssc_port *)dev_id;
|
struct ifx_ssc_port *info = (struct ifx_ssc_port *)dev_id;
|
||||||
tx_int(info);
|
tx_int(info);
|
||||||
@ -215,8 +203,7 @@ ifx_ssc_tx_int (int irq, void *dev_id)
|
|||||||
return IRQ_HANDLED;
|
return IRQ_HANDLED;
|
||||||
}
|
}
|
||||||
|
|
||||||
irqreturn_t
|
irqreturn_t ifx_ssc_err_int(int irq, void *dev_id)
|
||||||
ifx_ssc_err_int (int irq, void *dev_id)
|
|
||||||
{
|
{
|
||||||
struct ifx_ssc_port *info = (struct ifx_ssc_port *)dev_id;
|
struct ifx_ssc_port *info = (struct ifx_ssc_port *)dev_id;
|
||||||
unsigned int state;
|
unsigned int state;
|
||||||
@ -259,8 +246,7 @@ ifx_ssc_err_int (int irq, void *dev_id)
|
|||||||
return IRQ_HANDLED;
|
return IRQ_HANDLED;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static void ifx_ssc_abort(struct ifx_ssc_port *info)
|
||||||
ifx_ssc_abort (struct ifx_ssc_port *info)
|
|
||||||
{
|
{
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
bool enabled;
|
bool enabled;
|
||||||
@ -273,35 +259,35 @@ ifx_ssc_abort (struct ifx_ssc_port *info)
|
|||||||
|
|
||||||
local_irq_restore(flags);
|
local_irq_restore(flags);
|
||||||
|
|
||||||
// disable SSC (also aborts a receive request!)
|
/* disable SSC(also aborts a receive request!) */
|
||||||
// ### TO DO: Perhaps it's better to abort after the receiption of a
|
/* ### TO DO: Perhaps it's better to abort after the receiption of a
|
||||||
// complete word. The disable cuts the transmission immediatly and
|
complete word. The disable cuts the transmission immediatly and
|
||||||
// releases the chip selects. This could result in unpredictable
|
releases the chip selects. This could result in unpredictable
|
||||||
// behavior of connected external devices!
|
behavior of connected external devices!
|
||||||
|
*/
|
||||||
enabled = (ifxmips_r32(IFXMIPS_SSC_STATE) & IFX_SSC_STATE_IS_ENABLED) != 0;
|
enabled = (ifxmips_r32(IFXMIPS_SSC_STATE) & IFX_SSC_STATE_IS_ENABLED) != 0;
|
||||||
ifxmips_w32(IFX_SSC_WHBSTATE_CLR_ENABLE, IFXMIPS_SSC_WHBSTATE);
|
ifxmips_w32(IFX_SSC_WHBSTATE_CLR_ENABLE, IFXMIPS_SSC_WHBSTATE);
|
||||||
|
|
||||||
// flush fifos
|
/* flush fifos */
|
||||||
ifxmips_w32(IFX_SSC_XFCON_FIFO_FLUSH, IFXMIPS_SSC_TXFCON);
|
ifxmips_w32(IFX_SSC_XFCON_FIFO_FLUSH, IFXMIPS_SSC_TXFCON);
|
||||||
ifxmips_w32(IFX_SSC_XFCON_FIFO_FLUSH, IFXMIPS_SSC_RXFCON);
|
ifxmips_w32(IFX_SSC_XFCON_FIFO_FLUSH, IFXMIPS_SSC_RXFCON);
|
||||||
|
|
||||||
// free txbuf
|
/* free txbuf */
|
||||||
if (info->txbuf != NULL)
|
if (info->txbuf != NULL) {
|
||||||
{
|
|
||||||
kfree(info->txbuf);
|
kfree(info->txbuf);
|
||||||
info->txbuf = NULL;
|
info->txbuf = NULL;
|
||||||
}
|
}
|
||||||
|
|
||||||
// wakeup read process
|
/* wakeup read process */
|
||||||
if (info->rxbuf != NULL)
|
if (info->rxbuf != NULL)
|
||||||
wake_up_interruptible(&info->rwait);
|
wake_up_interruptible(&info->rwait);
|
||||||
|
|
||||||
// clear pending int's
|
/* clear pending int's */
|
||||||
ifxmips_mask_and_ack_irq(IFXMIPS_SSC_RIR);
|
ifxmips_mask_and_ack_irq(IFXMIPS_SSC_RIR);
|
||||||
ifxmips_mask_and_ack_irq(IFXMIPS_SSC_TIR);
|
ifxmips_mask_and_ack_irq(IFXMIPS_SSC_TIR);
|
||||||
ifxmips_mask_and_ack_irq(IFXMIPS_SSC_EIR);
|
ifxmips_mask_and_ack_irq(IFXMIPS_SSC_EIR);
|
||||||
|
|
||||||
// clear error flags
|
/* clear error flags */
|
||||||
ifxmips_w32(IFX_SSC_WHBSTATE_CLR_ALL_ERROR, IFXMIPS_SSC_WHBSTATE);
|
ifxmips_w32(IFX_SSC_WHBSTATE_CLR_ALL_ERROR, IFXMIPS_SSC_WHBSTATE);
|
||||||
|
|
||||||
if (enabled)
|
if (enabled)
|
||||||
@ -313,8 +299,7 @@ ifx_ssc_abort (struct ifx_ssc_port *info)
|
|||||||
* This routine is called whenever a port is opened. It enforces
|
* This routine is called whenever a port is opened. It enforces
|
||||||
* exclusive opening of a port and enables interrupts, etc.
|
* exclusive opening of a port and enables interrupts, etc.
|
||||||
*/
|
*/
|
||||||
int
|
int ifx_ssc_open(struct inode *inode, struct file *filp)
|
||||||
ifx_ssc_open (struct inode *inode, struct file *filp)
|
|
||||||
{
|
{
|
||||||
struct ifx_ssc_port *info;
|
struct ifx_ssc_port *info;
|
||||||
int line;
|
int line;
|
||||||
@ -323,9 +308,8 @@ ifx_ssc_open (struct inode *inode, struct file *filp)
|
|||||||
if ((inode == (struct inode *)0) || (inode == (struct inode *)1)) {
|
if ((inode == (struct inode *)0) || (inode == (struct inode *)1)) {
|
||||||
from_kernel = 1;
|
from_kernel = 1;
|
||||||
line = (int) inode;
|
line = (int) inode;
|
||||||
} else {
|
} else
|
||||||
line = MINOR(filp->f_dentry->d_inode->i_rdev);
|
line = MINOR(filp->f_dentry->d_inode->i_rdev);
|
||||||
}
|
|
||||||
|
|
||||||
/* don't open more minor devices than we can support */
|
/* don't open more minor devices than we can support */
|
||||||
if (line < 0 || line >= PORT_CNT)
|
if (line < 0 || line >= PORT_CNT)
|
||||||
@ -353,7 +337,7 @@ ifx_ssc_open (struct inode *inode, struct file *filp)
|
|||||||
/* clear all error bits */
|
/* clear all error bits */
|
||||||
ifxmips_w32(IFX_SSC_WHBSTATE_CLR_ALL_ERROR, IFXMIPS_SSC_WHBSTATE);
|
ifxmips_w32(IFX_SSC_WHBSTATE_CLR_ALL_ERROR, IFXMIPS_SSC_WHBSTATE);
|
||||||
|
|
||||||
// clear pending interrupts
|
/* clear pending interrupts */
|
||||||
ifxmips_mask_and_ack_irq(IFXMIPS_SSC_RIR);
|
ifxmips_mask_and_ack_irq(IFXMIPS_SSC_RIR);
|
||||||
ifxmips_mask_and_ack_irq(IFXMIPS_SSC_TIR);
|
ifxmips_mask_and_ack_irq(IFXMIPS_SSC_TIR);
|
||||||
ifxmips_mask_and_ack_irq(IFXMIPS_SSC_EIR);
|
ifxmips_mask_and_ack_irq(IFXMIPS_SSC_EIR);
|
||||||
@ -364,8 +348,7 @@ ifx_ssc_open (struct inode *inode, struct file *filp)
|
|||||||
}
|
}
|
||||||
EXPORT_SYMBOL(ifx_ssc_open);
|
EXPORT_SYMBOL(ifx_ssc_open);
|
||||||
|
|
||||||
int
|
int ifx_ssc_close(struct inode *inode, struct file *filp)
|
||||||
ifx_ssc_close (struct inode *inode, struct file *filp)
|
|
||||||
{
|
{
|
||||||
struct ifx_ssc_port *info;
|
struct ifx_ssc_port *info;
|
||||||
int idx;
|
int idx;
|
||||||
@ -392,8 +375,8 @@ ifx_ssc_close (struct inode *inode, struct file *filp)
|
|||||||
}
|
}
|
||||||
EXPORT_SYMBOL(ifx_ssc_close);
|
EXPORT_SYMBOL(ifx_ssc_close);
|
||||||
|
|
||||||
static ssize_t
|
static ssize_t ifx_ssc_read_helper_poll(struct ifx_ssc_port *info, char *buf,
|
||||||
ifx_ssc_read_helper_poll (struct ifx_ssc_port *info, char *buf, size_t len, int from_kernel)
|
size_t len, int from_kernel)
|
||||||
{
|
{
|
||||||
ssize_t ret_val;
|
ssize_t ret_val;
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
@ -406,8 +389,7 @@ ifx_ssc_read_helper_poll (struct ifx_ssc_port *info, char *buf, size_t len, int
|
|||||||
local_irq_restore(flags);
|
local_irq_restore(flags);
|
||||||
/* Vinetic driver always works in IFX_SSC_MODE_RXTX */
|
/* Vinetic driver always works in IFX_SSC_MODE_RXTX */
|
||||||
/* TXRX in poll mode */
|
/* TXRX in poll mode */
|
||||||
while (info->rxbuf_ptr < info->rxbuf_end)
|
while (info->rxbuf_ptr < info->rxbuf_end) {
|
||||||
{
|
|
||||||
if (info->txbuf_ptr < info->txbuf_end)
|
if (info->txbuf_ptr < info->txbuf_end)
|
||||||
tx_int(info);
|
tx_int(info);
|
||||||
|
|
||||||
@ -419,8 +401,8 @@ ifx_ssc_read_helper_poll (struct ifx_ssc_port *info, char *buf, size_t len, int
|
|||||||
return ret_val;
|
return ret_val;
|
||||||
}
|
}
|
||||||
|
|
||||||
static ssize_t
|
static ssize_t ifx_ssc_read_helper(struct ifx_ssc_port *info, char *buf,
|
||||||
ifx_ssc_read_helper (struct ifx_ssc_port *info, char *buf, size_t len, int from_kernel)
|
size_t len, int from_kernel)
|
||||||
{
|
{
|
||||||
ssize_t ret_val;
|
ssize_t ret_val;
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
@ -433,10 +415,8 @@ ifx_ssc_read_helper (struct ifx_ssc_port *info, char *buf, size_t len, int from_
|
|||||||
info->rxbuf_ptr = info->rxbuf;
|
info->rxbuf_ptr = info->rxbuf;
|
||||||
info->rxbuf_end = info->rxbuf + len;
|
info->rxbuf_end = info->rxbuf + len;
|
||||||
|
|
||||||
if (info->opts.modeRxTx == IFX_SSC_MODE_RXTX)
|
if (info->opts.modeRxTx == IFX_SSC_MODE_RXTX) {
|
||||||
{
|
if ((info->txbuf == NULL) || (info->txbuf != info->txbuf_ptr) || (info->txbuf_end != len + info->txbuf)) {
|
||||||
if ((info->txbuf == NULL) || (info->txbuf != info->txbuf_ptr) || (info->txbuf_end != len + info->txbuf))
|
|
||||||
{
|
|
||||||
local_irq_restore(flags);
|
local_irq_restore(flags);
|
||||||
printk("IFX SSC - %s: write must be called before calling " "read in combined RX/TX!\n", __func__);
|
printk("IFX SSC - %s: write must be called before calling " "read in combined RX/TX!\n", __func__);
|
||||||
return -EFAULT;
|
return -EFAULT;
|
||||||
@ -470,8 +450,7 @@ ifx_ssc_read_helper (struct ifx_ssc_port *info, char *buf, size_t len, int from_
|
|||||||
|
|
||||||
local_irq_restore(flags);
|
local_irq_restore(flags);
|
||||||
|
|
||||||
if (signal_pending (current))
|
if (signal_pending(current)) {
|
||||||
{
|
|
||||||
ret_val = -ERESTARTSYS;
|
ret_val = -ERESTARTSYS;
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
@ -485,11 +464,10 @@ out:
|
|||||||
current->state = TASK_RUNNING;
|
current->state = TASK_RUNNING;
|
||||||
__remove_wait_queue(&info->rwait, &wait);
|
__remove_wait_queue(&info->rwait, &wait);
|
||||||
|
|
||||||
return (ret_val);
|
return ret_val;
|
||||||
}
|
}
|
||||||
|
|
||||||
static ssize_t
|
static ssize_t ifx_ssc_write_helper(struct ifx_ssc_port *info, const char *buf,
|
||||||
ifx_ssc_write_helper (struct ifx_ssc_port *info, const char *buf,
|
|
||||||
size_t len, int from_kernel)
|
size_t len, int from_kernel)
|
||||||
{
|
{
|
||||||
if (info->opts.modeRxTx == IFX_SSC_MODE_RX)
|
if (info->opts.modeRxTx == IFX_SSC_MODE_RX)
|
||||||
@ -497,20 +475,16 @@ ifx_ssc_write_helper (struct ifx_ssc_port *info, const char *buf,
|
|||||||
|
|
||||||
info->txbuf_ptr = info->txbuf;
|
info->txbuf_ptr = info->txbuf;
|
||||||
info->txbuf_end = len + info->txbuf;
|
info->txbuf_end = len + info->txbuf;
|
||||||
if (info->opts.modeRxTx == IFX_SSC_MODE_TX)
|
if (info->opts.modeRxTx == IFX_SSC_MODE_TX) {
|
||||||
{
|
|
||||||
tx_int(info);
|
tx_int(info);
|
||||||
if (info->txbuf_ptr < info->txbuf_end)
|
if (info->txbuf_ptr < info->txbuf_end)
|
||||||
{
|
|
||||||
enable_irq(IFXMIPS_SSC_TIR);
|
enable_irq(IFXMIPS_SSC_TIR);
|
||||||
}
|
}
|
||||||
}
|
|
||||||
|
|
||||||
return len;
|
return len;
|
||||||
}
|
}
|
||||||
|
|
||||||
ssize_t
|
ssize_t ifx_ssc_kread(int port, char *kbuf, size_t len)
|
||||||
ifx_ssc_kread (int port, char *kbuf, size_t len)
|
|
||||||
{
|
{
|
||||||
struct ifx_ssc_port *info;
|
struct ifx_ssc_port *info;
|
||||||
ssize_t ret_val;
|
ssize_t ret_val;
|
||||||
@ -523,15 +497,13 @@ ifx_ssc_kread (int port, char *kbuf, size_t len)
|
|||||||
|
|
||||||
info = &isp[port];
|
info = &isp[port];
|
||||||
|
|
||||||
if (info->rxbuf != NULL)
|
if (info->rxbuf != NULL) {
|
||||||
{
|
|
||||||
printk("SSC device busy\n");
|
printk("SSC device busy\n");
|
||||||
return -EBUSY;
|
return -EBUSY;
|
||||||
}
|
}
|
||||||
|
|
||||||
info->rxbuf = kbuf;
|
info->rxbuf = kbuf;
|
||||||
if (info->rxbuf == NULL)
|
if (info->rxbuf == NULL) {
|
||||||
{
|
|
||||||
printk("SSC device error\n");
|
printk("SSC device error\n");
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
@ -545,8 +517,7 @@ ifx_ssc_kread (int port, char *kbuf, size_t len)
|
|||||||
}
|
}
|
||||||
EXPORT_SYMBOL(ifx_ssc_kread);
|
EXPORT_SYMBOL(ifx_ssc_kread);
|
||||||
|
|
||||||
ssize_t
|
ssize_t ifx_ssc_kwrite(int port, const char *kbuf, size_t len)
|
||||||
ifx_ssc_kwrite (int port, const char *kbuf, size_t len)
|
|
||||||
{
|
{
|
||||||
struct ifx_ssc_port *info;
|
struct ifx_ssc_port *info;
|
||||||
ssize_t ret_val;
|
ssize_t ret_val;
|
||||||
@ -559,7 +530,7 @@ ifx_ssc_kwrite (int port, const char *kbuf, size_t len)
|
|||||||
|
|
||||||
info = &isp[port];
|
info = &isp[port];
|
||||||
|
|
||||||
// check if transmission in progress
|
/* check if transmission in progress */
|
||||||
if (info->txbuf != NULL)
|
if (info->txbuf != NULL)
|
||||||
return -EBUSY;
|
return -EBUSY;
|
||||||
|
|
||||||
@ -574,8 +545,7 @@ ifx_ssc_kwrite (int port, const char *kbuf, size_t len)
|
|||||||
}
|
}
|
||||||
EXPORT_SYMBOL(ifx_ssc_kwrite);
|
EXPORT_SYMBOL(ifx_ssc_kwrite);
|
||||||
|
|
||||||
static ssize_t
|
static ssize_t ifx_ssc_read(struct file *filp, char *ubuf, size_t len, loff_t *off)
|
||||||
ifx_ssc_read (struct file *filp, char *ubuf, size_t len, loff_t * off)
|
|
||||||
{
|
{
|
||||||
ssize_t ret_val;
|
ssize_t ret_val;
|
||||||
int idx;
|
int idx;
|
||||||
@ -600,18 +570,17 @@ ifx_ssc_read (struct file *filp, char *ubuf, size_t len, loff_t * off)
|
|||||||
kfree(info->rxbuf);
|
kfree(info->rxbuf);
|
||||||
info->rxbuf = NULL;
|
info->rxbuf = NULL;
|
||||||
|
|
||||||
return (ret_val);
|
return ret_val;
|
||||||
}
|
}
|
||||||
|
|
||||||
static ssize_t
|
static ssize_t ifx_ssc_write(struct file *filp, const char *ubuf, size_t len, loff_t *off)
|
||||||
ifx_ssc_write (struct file *filp, const char *ubuf, size_t len, loff_t * off)
|
|
||||||
{
|
{
|
||||||
int idx;
|
int idx;
|
||||||
struct ifx_ssc_port *info;
|
struct ifx_ssc_port *info;
|
||||||
int ret_val;
|
int ret_val;
|
||||||
|
|
||||||
if (len == 0)
|
if (len == 0)
|
||||||
return (0);
|
return 0;
|
||||||
|
|
||||||
idx = MINOR(filp->f_dentry->d_inode->i_rdev);
|
idx = MINOR(filp->f_dentry->d_inode->i_rdev);
|
||||||
info = &isp[idx];
|
info = &isp[idx];
|
||||||
@ -629,17 +598,15 @@ ifx_ssc_write (struct file *filp, const char *ubuf, size_t len, loff_t * off)
|
|||||||
else
|
else
|
||||||
ret_val = -EFAULT;
|
ret_val = -EFAULT;
|
||||||
|
|
||||||
if (ret_val < 0)
|
if (ret_val < 0) {
|
||||||
{
|
|
||||||
kfree(info->txbuf);
|
kfree(info->txbuf);
|
||||||
info->txbuf = NULL;
|
info->txbuf = NULL;
|
||||||
}
|
}
|
||||||
|
|
||||||
return (ret_val);
|
return ret_val;
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct ifx_ssc_frm_status *
|
static struct ifx_ssc_frm_status *ifx_ssc_frm_status_get(struct ifx_ssc_port *info)
|
||||||
ifx_ssc_frm_status_get (struct ifx_ssc_port *info)
|
|
||||||
{
|
{
|
||||||
unsigned long tmp;
|
unsigned long tmp;
|
||||||
|
|
||||||
@ -655,9 +622,7 @@ ifx_ssc_frm_status_get (struct ifx_ssc_port *info)
|
|||||||
return &info->frm_status;
|
return &info->frm_status;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static struct ifx_ssc_frm_opts *ifx_ssc_frm_control_get(struct ifx_ssc_port *info)
|
||||||
static struct ifx_ssc_frm_opts *
|
|
||||||
ifx_ssc_frm_control_get (struct ifx_ssc_port *info)
|
|
||||||
{
|
{
|
||||||
unsigned long tmp;
|
unsigned long tmp;
|
||||||
|
|
||||||
@ -672,8 +637,7 @@ ifx_ssc_frm_control_get (struct ifx_ssc_port *info)
|
|||||||
return &info->frm_opts;
|
return &info->frm_opts;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static int ifx_ssc_frm_control_set(struct ifx_ssc_port *info)
|
||||||
ifx_ssc_frm_control_set (struct ifx_ssc_port *info)
|
|
||||||
{
|
{
|
||||||
unsigned long tmp;
|
unsigned long tmp;
|
||||||
|
|
||||||
@ -685,12 +649,12 @@ ifx_ssc_frm_control_set (struct ifx_ssc_port *info)
|
|||||||
|| (info->frm_opts.IdleClock & ~(IFX_SSC_SFCON_PAUSE_CLOCK_MASK >> IFX_SSC_SFCON_PAUSE_CLOCK_OFFSET)))
|
|| (info->frm_opts.IdleClock & ~(IFX_SSC_SFCON_PAUSE_CLOCK_MASK >> IFX_SSC_SFCON_PAUSE_CLOCK_OFFSET)))
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
||||||
// read interrupt bits (they're not changed here)
|
/* read interrupt bits(they're not changed here) */
|
||||||
tmp = ifxmips_r32(IFXMIPS_SSC_SFCON) &
|
tmp = ifxmips_r32(IFXMIPS_SSC_SFCON) &
|
||||||
(IFX_SSC_SFCON_FIR_ENABLE_BEFORE_PAUSE | IFX_SSC_SFCON_FIR_ENABLE_AFTER_PAUSE);
|
(IFX_SSC_SFCON_FIR_ENABLE_BEFORE_PAUSE | IFX_SSC_SFCON_FIR_ENABLE_AFTER_PAUSE);
|
||||||
|
|
||||||
// set all values with respect to it's bit position (for data and pause
|
/* set all values with respect to it's bit position(for data and pause
|
||||||
// length set N-1)
|
length set N-1) */
|
||||||
tmp = (info->frm_opts.DataLength - 1) << IFX_SSC_SFCON_DATA_LENGTH_OFFSET;
|
tmp = (info->frm_opts.DataLength - 1) << IFX_SSC_SFCON_DATA_LENGTH_OFFSET;
|
||||||
tmp |= (info->frm_opts.PauseLength - 1) << IFX_SSC_SFCON_PAUSE_LENGTH_OFFSET;
|
tmp |= (info->frm_opts.PauseLength - 1) << IFX_SSC_SFCON_PAUSE_LENGTH_OFFSET;
|
||||||
tmp |= info->frm_opts.IdleData << IFX_SSC_SFCON_PAUSE_DATA_OFFSET;
|
tmp |= info->frm_opts.IdleData << IFX_SSC_SFCON_PAUSE_DATA_OFFSET;
|
||||||
@ -703,8 +667,7 @@ ifx_ssc_frm_control_set (struct ifx_ssc_port *info)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static int ifx_ssc_rxtx_mode_set(struct ifx_ssc_port *info, unsigned int val)
|
||||||
ifx_ssc_rxtx_mode_set (struct ifx_ssc_port *info, unsigned int val)
|
|
||||||
{
|
{
|
||||||
unsigned long tmp;
|
unsigned long tmp;
|
||||||
|
|
||||||
@ -722,8 +685,7 @@ ifx_ssc_rxtx_mode_set (struct ifx_ssc_port *info, unsigned int val)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static int ifx_ssc_sethwopts(struct ifx_ssc_port *info)
|
||||||
ifx_ssc_sethwopts (struct ifx_ssc_port *info)
|
|
||||||
{
|
{
|
||||||
unsigned long flags, bits;
|
unsigned long flags, bits;
|
||||||
struct ifx_ssc_hwopts *opts = &info->opts;
|
struct ifx_ssc_hwopts *opts = &info->opts;
|
||||||
@ -754,8 +716,7 @@ ifx_ssc_sethwopts (struct ifx_ssc_port *info)
|
|||||||
if (opts->clockPolarity)
|
if (opts->clockPolarity)
|
||||||
bits |= IFX_SSC_CON_CLOCK_FALL;
|
bits |= IFX_SSC_CON_CLOCK_FALL;
|
||||||
|
|
||||||
switch (opts->modeRxTx)
|
switch (opts->modeRxTx) {
|
||||||
{
|
|
||||||
case IFX_SSC_MODE_TX:
|
case IFX_SSC_MODE_TX:
|
||||||
bits |= IFX_SSC_CON_RX_OFF;
|
bits |= IFX_SSC_CON_RX_OFF;
|
||||||
break;
|
break;
|
||||||
@ -772,16 +733,16 @@ ifx_ssc_sethwopts (struct ifx_ssc_port *info)
|
|||||||
|
|
||||||
ifxmips_w32(info->opts.gpoCs << IFX_SSC_WHBGPOSTAT_SETOUT0_POS, IFXMIPS_SSC_WHBGPOSTAT);
|
ifxmips_w32(info->opts.gpoCs << IFX_SSC_WHBGPOSTAT_SETOUT0_POS, IFXMIPS_SSC_WHBGPOSTAT);
|
||||||
|
|
||||||
//master mode
|
/* master mode */
|
||||||
if (opts->masterSelect)
|
if (opts->masterSelect)
|
||||||
ifxmips_w32(IFX_SSC_WHBSTATE_SET_MASTER_SELECT, IFXMIPS_SSC_WHBSTATE);
|
ifxmips_w32(IFX_SSC_WHBSTATE_SET_MASTER_SELECT, IFXMIPS_SSC_WHBSTATE);
|
||||||
else
|
else
|
||||||
ifxmips_w32(IFX_SSC_WHBSTATE_CLR_MASTER_SELECT, IFXMIPS_SSC_WHBSTATE);
|
ifxmips_w32(IFX_SSC_WHBSTATE_CLR_MASTER_SELECT, IFXMIPS_SSC_WHBSTATE);
|
||||||
|
|
||||||
// init serial framing
|
/* init serial framing */
|
||||||
ifxmips_w32(0, IFXMIPS_SSC_SFCON);
|
ifxmips_w32(0, IFXMIPS_SSC_SFCON);
|
||||||
/* set up the port pins */
|
/* set up the port pins */
|
||||||
//check for general requirements to switch (external) pad/pin characteristics
|
/* check for general requirements to switch(external) pad/pin characteristics */
|
||||||
/* TODO: P0.9 SPI_CS4, P0.10 SPI_CS5, P 0.11 SPI_CS6, because of ASC0 */
|
/* TODO: P0.9 SPI_CS4, P0.10 SPI_CS5, P 0.11 SPI_CS6, because of ASC0 */
|
||||||
/* p0.15 SPI_CS1(EEPROM), P0.13 SPI_CS3, */
|
/* p0.15 SPI_CS1(EEPROM), P0.13 SPI_CS3, */
|
||||||
/* Set p0.15 to alternative 01, others to 00(In/OUT) */
|
/* Set p0.15 to alternative 01, others to 00(In/OUT) */
|
||||||
@ -805,8 +766,7 @@ ifx_ssc_sethwopts (struct ifx_ssc_port *info)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static int ifx_ssc_set_baud(struct ifx_ssc_port *info, unsigned int baud)
|
||||||
ifx_ssc_set_baud (struct ifx_ssc_port *info, unsigned int baud)
|
|
||||||
{
|
{
|
||||||
unsigned int ifx_ssc_clock;
|
unsigned int ifx_ssc_clock;
|
||||||
unsigned int br;
|
unsigned int br;
|
||||||
@ -815,8 +775,7 @@ ifx_ssc_set_baud (struct ifx_ssc_port *info, unsigned int baud)
|
|||||||
int retval = 0;
|
int retval = 0;
|
||||||
|
|
||||||
ifx_ssc_clock = ifx_ssc_get_kernel_clk(info);
|
ifx_ssc_clock = ifx_ssc_get_kernel_clk(info);
|
||||||
if (ifx_ssc_clock == 0)
|
if (ifx_ssc_clock == 0) {
|
||||||
{
|
|
||||||
retval = -EINVAL;
|
retval = -EINVAL;
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
@ -847,8 +806,7 @@ out:
|
|||||||
return retval;
|
return retval;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static int ifx_ssc_hwinit(struct ifx_ssc_port *info)
|
||||||
ifx_ssc_hwinit (struct ifx_ssc_port *info)
|
|
||||||
{
|
{
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
bool enabled;
|
bool enabled;
|
||||||
@ -856,14 +814,12 @@ ifx_ssc_hwinit (struct ifx_ssc_port *info)
|
|||||||
enabled = (ifxmips_r32(IFXMIPS_SSC_STATE) & IFX_SSC_STATE_IS_ENABLED);
|
enabled = (ifxmips_r32(IFXMIPS_SSC_STATE) & IFX_SSC_STATE_IS_ENABLED);
|
||||||
ifxmips_w32(IFX_SSC_WHBSTATE_CLR_ENABLE, IFXMIPS_SSC_WHBSTATE);
|
ifxmips_w32(IFX_SSC_WHBSTATE_CLR_ENABLE, IFXMIPS_SSC_WHBSTATE);
|
||||||
|
|
||||||
if (ifx_ssc_sethwopts (info) < 0)
|
if (ifx_ssc_sethwopts(info) < 0) {
|
||||||
{
|
|
||||||
printk("%s: setting the hardware options failed\n", __func__);
|
printk("%s: setting the hardware options failed\n", __func__);
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (ifx_ssc_set_baud (info, info->baud) < 0)
|
if (ifx_ssc_set_baud(info, info->baud) < 0) {
|
||||||
{
|
|
||||||
printk("%s: setting the baud rate failed\n", __func__);
|
printk("%s: setting the baud rate failed\n", __func__);
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
@ -883,8 +839,8 @@ ifx_ssc_hwinit (struct ifx_ssc_port *info)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int ifx_ssc_ioctl(struct inode *inode, struct file *filp,
|
||||||
ifx_ssc_ioctl (struct inode *inode, struct file *filp, unsigned int cmd, unsigned long data)
|
unsigned int cmd, unsigned long data)
|
||||||
{
|
{
|
||||||
struct ifx_ssc_port *info;
|
struct ifx_ssc_port *info;
|
||||||
int line, ret_val = 0;
|
int line, ret_val = 0;
|
||||||
@ -892,21 +848,18 @@ ifx_ssc_ioctl (struct inode *inode, struct file *filp, unsigned int cmd, unsigne
|
|||||||
unsigned long tmp;
|
unsigned long tmp;
|
||||||
int from_kernel = 0;
|
int from_kernel = 0;
|
||||||
|
|
||||||
if ((inode == (struct inode *) 0) || (inode == (struct inode *) 1))
|
if ((inode == (struct inode *)0) || (inode == (struct inode *)1)) {
|
||||||
{
|
|
||||||
from_kernel = 1;
|
from_kernel = 1;
|
||||||
line = (int) inode;
|
line = (int) inode;
|
||||||
} else {
|
} else
|
||||||
line = MINOR(filp->f_dentry->d_inode->i_rdev);
|
line = MINOR(filp->f_dentry->d_inode->i_rdev);
|
||||||
}
|
|
||||||
|
|
||||||
if (line < 0 || line >= PORT_CNT)
|
if (line < 0 || line >= PORT_CNT)
|
||||||
return -ENXIO;
|
return -ENXIO;
|
||||||
|
|
||||||
info = &isp[line];
|
info = &isp[line];
|
||||||
|
|
||||||
switch (cmd)
|
switch (cmd) {
|
||||||
{
|
|
||||||
case IFX_SSC_STATS_READ:
|
case IFX_SSC_STATS_READ:
|
||||||
/* data must be a pointer to a struct ifx_ssc_statistics */
|
/* data must be a pointer to a struct ifx_ssc_statistics */
|
||||||
if (from_kernel)
|
if (from_kernel)
|
||||||
@ -1003,10 +956,9 @@ ifx_ssc_ioctl (struct inode *inode, struct file *filp, unsigned int cmd, unsigne
|
|||||||
}
|
}
|
||||||
if (tmp > IFX_SSC_MAX_GPO_OUT)
|
if (tmp > IFX_SSC_MAX_GPO_OUT)
|
||||||
ret_val = -EINVAL;
|
ret_val = -EINVAL;
|
||||||
else {
|
else
|
||||||
ifxmips_w32(1 << (tmp + IFX_SSC_WHBGPOSTAT_CLROUT0_POS),
|
ifxmips_w32(1 << (tmp + IFX_SSC_WHBGPOSTAT_CLROUT0_POS),
|
||||||
IFXMIPS_SSC_WHBGPOSTAT);
|
IFXMIPS_SSC_WHBGPOSTAT);
|
||||||
}
|
|
||||||
break;
|
break;
|
||||||
case IFX_SSC_GPO_OUT_GET:
|
case IFX_SSC_GPO_OUT_GET:
|
||||||
tmp = ifxmips_r32(IFXMIPS_SSC_GPOSTAT);
|
tmp = ifxmips_r32(IFXMIPS_SSC_GPOSTAT);
|
||||||
@ -1066,9 +1018,8 @@ ifx_ssc_ioctl (struct inode *inode, struct file *filp, unsigned int cmd, unsigne
|
|||||||
ret_val = -EFAULT;
|
ret_val = -EFAULT;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
if (ifx_ssc_hwinit (info) < 0) {
|
if (ifx_ssc_hwinit(info) < 0)
|
||||||
ret_val = -EIO;
|
ret_val = -EIO;
|
||||||
}
|
|
||||||
break;
|
break;
|
||||||
case IFX_SSC_HWOPTS_GET:
|
case IFX_SSC_HWOPTS_GET:
|
||||||
/* data must be a pointer to a struct ifx_ssc_hwopts */
|
/* data must be a pointer to a struct ifx_ssc_hwopts */
|
||||||
@ -1097,8 +1048,7 @@ static struct file_operations ifx_ssc_fops = {
|
|||||||
.release = ifx_ssc_close,
|
.release = ifx_ssc_close,
|
||||||
};
|
};
|
||||||
|
|
||||||
int __init
|
int __init ifx_ssc_init(void)
|
||||||
ifx_ssc_init (void)
|
|
||||||
{
|
{
|
||||||
struct ifx_ssc_port *info;
|
struct ifx_ssc_port *info;
|
||||||
int i, nbytes;
|
int i, nbytes;
|
||||||
@ -1107,26 +1057,24 @@ ifx_ssc_init (void)
|
|||||||
|
|
||||||
ret_val = -ENOMEM;
|
ret_val = -ENOMEM;
|
||||||
nbytes = PORT_CNT * sizeof(struct ifx_ssc_port);
|
nbytes = PORT_CNT * sizeof(struct ifx_ssc_port);
|
||||||
isp = (struct ifx_ssc_port*)kmalloc(nbytes, GFP_KERNEL);
|
isp = kmalloc(nbytes, GFP_KERNEL);
|
||||||
|
|
||||||
if (isp == NULL)
|
if (isp == NULL) {
|
||||||
{
|
|
||||||
printk("%s: no memory for isp\n", __func__);
|
printk("%s: no memory for isp\n", __func__);
|
||||||
return (ret_val);
|
return ret_val;
|
||||||
}
|
}
|
||||||
memset(isp, 0, nbytes);
|
memset(isp, 0, nbytes);
|
||||||
|
|
||||||
ret_val = -ENXIO;
|
ret_val = -ENXIO;
|
||||||
if ((i = register_chrdev (maj, "ssc", &ifx_ssc_fops)) < 0)
|
i = register_chrdev(maj, "ssc", &ifx_ssc_fops);
|
||||||
{
|
if (i < 0) {
|
||||||
printk("Unable to register major %d for the Infineon SSC\n", maj);
|
printk("Unable to register major %d for the Infineon SSC\n", maj);
|
||||||
if (maj == 0)
|
if (maj == 0) {
|
||||||
{
|
|
||||||
goto errout;
|
goto errout;
|
||||||
} else {
|
} else {
|
||||||
maj = 0;
|
maj = 0;
|
||||||
if ((i = register_chrdev (maj, "ssc", &ifx_ssc_fops)) < 0)
|
i = register_chrdev(maj, "ssc", &ifx_ssc_fops);
|
||||||
{
|
if (i < 0) {
|
||||||
printk("Unable to register major %d for the Infineon SSC\n", maj);
|
printk("Unable to register major %d for the Infineon SSC\n", maj);
|
||||||
goto errout;
|
goto errout;
|
||||||
}
|
}
|
||||||
@ -1161,9 +1109,8 @@ ifx_ssc_init (void)
|
|||||||
info->rxbuf = NULL;
|
info->rxbuf = NULL;
|
||||||
info->txbuf = NULL;
|
info->txbuf = NULL;
|
||||||
/* values specific to SSC1 */
|
/* values specific to SSC1 */
|
||||||
if (i == 0) {
|
if (i == 0)
|
||||||
info->mapbase = IFXMIPS_SSC_BASE_ADDR;
|
info->mapbase = IFXMIPS_SSC_BASE_ADDR;
|
||||||
}
|
|
||||||
|
|
||||||
ifxmips_w32(IFX_SSC_DEF_RMC << IFX_CLC_RUN_DIVIDER_OFFSET, IFXMIPS_SSC_CLC);
|
ifxmips_w32(IFX_SSC_DEF_RMC << IFX_CLC_RUN_DIVIDER_OFFSET, IFXMIPS_SSC_CLC);
|
||||||
|
|
||||||
@ -1171,45 +1118,43 @@ ifx_ssc_init (void)
|
|||||||
|
|
||||||
local_irq_save(flags);
|
local_irq_save(flags);
|
||||||
|
|
||||||
// init serial framing register
|
/* init serial framing register */
|
||||||
ifxmips_w32(IFX_SSC_DEF_SFCON, IFXMIPS_SSC_SFCON);
|
ifxmips_w32(IFX_SSC_DEF_SFCON, IFXMIPS_SSC_SFCON);
|
||||||
|
|
||||||
ret_val = request_irq(IFXMIPS_SSC_TIR, ifx_ssc_tx_int, IRQF_DISABLED, "ifx_ssc_tx", info);
|
ret_val = request_irq(IFXMIPS_SSC_TIR, ifx_ssc_tx_int, IRQF_DISABLED, "ifx_ssc_tx", info);
|
||||||
if (ret_val)
|
if (ret_val) {
|
||||||
{
|
|
||||||
printk("%s: unable to get irq %d\n", __func__, IFXMIPS_SSC_TIR);
|
printk("%s: unable to get irq %d\n", __func__, IFXMIPS_SSC_TIR);
|
||||||
local_irq_restore(flags);
|
local_irq_restore(flags);
|
||||||
goto errout;
|
goto errout;
|
||||||
}
|
}
|
||||||
|
|
||||||
ret_val = request_irq(IFXMIPS_SSC_RIR, ifx_ssc_rx_int, IRQF_DISABLED, "ifx_ssc_rx", info);
|
ret_val = request_irq(IFXMIPS_SSC_RIR, ifx_ssc_rx_int, IRQF_DISABLED, "ifx_ssc_rx", info);
|
||||||
if (ret_val)
|
if (ret_val) {
|
||||||
{
|
|
||||||
printk("%s: unable to get irq %d\n", __func__, IFXMIPS_SSC_RIR);
|
printk("%s: unable to get irq %d\n", __func__, IFXMIPS_SSC_RIR);
|
||||||
local_irq_restore(flags);
|
local_irq_restore(flags);
|
||||||
goto irqerr;
|
goto irqerr;
|
||||||
}
|
}
|
||||||
|
|
||||||
ret_val = request_irq(IFXMIPS_SSC_EIR, ifx_ssc_err_int, IRQF_DISABLED, "ifx_ssc_err", info);
|
ret_val = request_irq(IFXMIPS_SSC_EIR, ifx_ssc_err_int, IRQF_DISABLED, "ifx_ssc_err", info);
|
||||||
if (ret_val)
|
if (ret_val) {
|
||||||
{
|
|
||||||
printk("%s: unable to get irq %d\n", __func__, IFXMIPS_SSC_EIR);
|
printk("%s: unable to get irq %d\n", __func__, IFXMIPS_SSC_EIR);
|
||||||
local_irq_restore(flags);
|
local_irq_restore(flags);
|
||||||
goto irqerr;
|
goto irqerr;
|
||||||
}
|
}
|
||||||
ifxmips_w32(IFX_SSC_DEF_IRNEN, IFXMIPS_SSC_IRN);
|
ifxmips_w32(IFX_SSC_DEF_IRNEN, IFXMIPS_SSC_IRN);
|
||||||
|
|
||||||
//enable_irq(IFXMIPS_SSC_TIR);
|
#if 0
|
||||||
//enable_irq(IFXMIPS_SSC_RIR);
|
enable_irq(IFXMIPS_SSC_TIR);
|
||||||
//enable_irq(IFXMIPS_SSC_EIR);
|
enable_irq(IFXMIPS_SSC_RIR);
|
||||||
|
enable_irq(IFXMIPS_SSC_EIR);
|
||||||
|
#endif
|
||||||
|
|
||||||
local_irq_restore(flags);
|
local_irq_restore(flags);
|
||||||
}
|
}
|
||||||
|
|
||||||
for (i = 0; i < PORT_CNT; i++) {
|
for (i = 0; i < PORT_CNT; i++) {
|
||||||
info = &isp[i];
|
info = &isp[i];
|
||||||
if (ifx_ssc_hwinit (info) < 0)
|
if (ifx_ssc_hwinit(info) < 0) {
|
||||||
{
|
|
||||||
printk("%s: hardware init failed for port %d\n", __func__, i);
|
printk("%s: hardware init failed for port %d\n", __func__, i);
|
||||||
goto irqerr;
|
goto irqerr;
|
||||||
}
|
}
|
||||||
@ -1224,11 +1169,10 @@ irqerr:
|
|||||||
free_irq(IFXMIPS_SSC_EIR, &isp[0]);
|
free_irq(IFXMIPS_SSC_EIR, &isp[0]);
|
||||||
errout:
|
errout:
|
||||||
kfree(isp);
|
kfree(isp);
|
||||||
return (ret_val);
|
return ret_val;
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void __exit ifx_ssc_cleanup_module(void)
|
||||||
ifx_ssc_cleanup_module (void)
|
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
@ -1244,12 +1188,11 @@ ifx_ssc_cleanup_module (void)
|
|||||||
module_init(ifx_ssc_init);
|
module_init(ifx_ssc_init);
|
||||||
module_exit(ifx_ssc_cleanup_module);
|
module_exit(ifx_ssc_cleanup_module);
|
||||||
|
|
||||||
|
inline int ifx_ssc_cs_low(u32 pin)
|
||||||
inline int
|
|
||||||
ifx_ssc_cs_low (u32 pin)
|
|
||||||
{
|
{
|
||||||
int ret = 0;
|
int ret = 0;
|
||||||
if ((ret = ifx_ssc_ioctl ((struct inode *) 0, NULL, IFX_SSC_GPO_OUT_CLR, (unsigned long) &pin)))
|
ret = ifx_ssc_ioctl((struct inode *)0, NULL, IFX_SSC_GPO_OUT_CLR, (unsigned long) &pin);
|
||||||
|
if (ret)
|
||||||
printk("clear CS %d fails\n", pin);
|
printk("clear CS %d fails\n", pin);
|
||||||
wmb();
|
wmb();
|
||||||
|
|
||||||
@ -1257,11 +1200,11 @@ ifx_ssc_cs_low (u32 pin)
|
|||||||
}
|
}
|
||||||
EXPORT_SYMBOL(ifx_ssc_cs_low);
|
EXPORT_SYMBOL(ifx_ssc_cs_low);
|
||||||
|
|
||||||
inline int
|
inline int ifx_ssc_cs_high(u32 pin)
|
||||||
ifx_ssc_cs_high (u32 pin)
|
|
||||||
{
|
{
|
||||||
int ret = 0;
|
int ret = 0;
|
||||||
if ((ret = ifx_ssc_ioctl((struct inode *) 0, NULL, IFX_SSC_GPO_OUT_SET, (unsigned long) &pin)))
|
ret = ifx_ssc_ioctl((struct inode *)0, NULL, IFX_SSC_GPO_OUT_SET, (unsigned long) &pin);
|
||||||
|
if (ret)
|
||||||
printk("set CS %d fails\n", pin);
|
printk("set CS %d fails\n", pin);
|
||||||
wmb();
|
wmb();
|
||||||
|
|
||||||
@ -1269,8 +1212,7 @@ ifx_ssc_cs_high (u32 pin)
|
|||||||
}
|
}
|
||||||
EXPORT_SYMBOL(ifx_ssc_cs_high);
|
EXPORT_SYMBOL(ifx_ssc_cs_high);
|
||||||
|
|
||||||
static int
|
static int ssc_session(char *tx_buf, u32 tx_len, char *rx_buf, u32 rx_len)
|
||||||
ssc_session (char *tx_buf, u32 tx_len, char *rx_buf, u32 rx_len)
|
|
||||||
{
|
{
|
||||||
int ret = 0;
|
int ret = 0;
|
||||||
|
|
||||||
@ -1283,61 +1225,47 @@ ssc_session (char *tx_buf, u32 tx_len, char *rx_buf, u32 rx_len)
|
|||||||
printk("invalid parameters\n");
|
printk("invalid parameters\n");
|
||||||
ret = -EINVAL;
|
ret = -EINVAL;
|
||||||
goto ssc_session_exit;
|
goto ssc_session_exit;
|
||||||
}
|
} else if (tx_buf == NULL || tx_len == 0) {
|
||||||
else if (tx_buf == NULL || tx_len == 0) {
|
|
||||||
if (rx_buf != NULL && rx_len != 0) {
|
if (rx_buf != NULL && rx_len != 0) {
|
||||||
mode = IFX_SSC_MODE_RX;
|
mode = IFX_SSC_MODE_RX;
|
||||||
}
|
} else {
|
||||||
else {
|
|
||||||
printk("invalid parameters\n");
|
printk("invalid parameters\n");
|
||||||
ret = -EINVAL;
|
ret = -EINVAL;
|
||||||
goto ssc_session_exit;
|
goto ssc_session_exit;
|
||||||
}
|
}
|
||||||
}
|
} else if (rx_buf == NULL || rx_len == 0) {
|
||||||
else if (rx_buf == NULL || rx_len == 0) {
|
if (tx_buf != NULL && tx_len != 0)
|
||||||
if (tx_buf != NULL && tx_len != 0) {
|
|
||||||
mode = IFX_SSC_MODE_TX;
|
mode = IFX_SSC_MODE_TX;
|
||||||
}
|
|
||||||
else {
|
else {
|
||||||
printk("invalid parameters\n");
|
printk("invalid parameters\n");
|
||||||
ret = -EINVAL;
|
ret = -EINVAL;
|
||||||
goto ssc_session_exit;
|
goto ssc_session_exit;
|
||||||
}
|
}
|
||||||
}
|
} else
|
||||||
else {
|
|
||||||
mode = IFX_SSC_MODE_RXTX;
|
mode = IFX_SSC_MODE_RXTX;
|
||||||
}
|
|
||||||
|
|
||||||
if (mode == IFX_SSC_MODE_RXTX) {
|
if (mode == IFX_SSC_MODE_RXTX)
|
||||||
eff_size = tx_len + rx_len;
|
eff_size = tx_len + rx_len;
|
||||||
}
|
else if (mode == IFX_SSC_MODE_RX)
|
||||||
else if (mode == IFX_SSC_MODE_RX) {
|
|
||||||
eff_size = rx_len;
|
eff_size = rx_len;
|
||||||
}
|
else
|
||||||
else {
|
|
||||||
eff_size = tx_len;
|
eff_size = tx_len;
|
||||||
}
|
|
||||||
|
|
||||||
//4 bytes alignment, required by driver
|
//4 bytes alignment, required by driver
|
||||||
/* change by TaiCheng */
|
/* change by TaiCheng */
|
||||||
//if (in_irq()){
|
//if (in_irq()){
|
||||||
if (1) {
|
if (1) {
|
||||||
ssc_tx_buf =
|
ssc_tx_buf = kmalloc(sizeof(char) *
|
||||||
(char *) kmalloc (sizeof (char) *
|
|
||||||
((eff_size + 3) & (~3)),
|
((eff_size + 3) & (~3)),
|
||||||
GFP_ATOMIC);
|
GFP_ATOMIC);
|
||||||
ssc_rx_buf =
|
ssc_rx_buf = kmalloc(sizeof(char) *
|
||||||
(char *) kmalloc (sizeof (char) *
|
|
||||||
((eff_size + 3) & (~3)),
|
((eff_size + 3) & (~3)),
|
||||||
GFP_ATOMIC);
|
GFP_ATOMIC);
|
||||||
}
|
} else {
|
||||||
else {
|
ssc_tx_buf = kmalloc(sizeof(char) *
|
||||||
ssc_tx_buf =
|
|
||||||
(char *) kmalloc (sizeof (char) *
|
|
||||||
((eff_size + 3) & (~3)),
|
((eff_size + 3) & (~3)),
|
||||||
GFP_KERNEL);
|
GFP_KERNEL);
|
||||||
ssc_rx_buf =
|
ssc_rx_buf = kmalloc(sizeof(char) *
|
||||||
(char *) kmalloc (sizeof (char) *
|
|
||||||
((eff_size + 3) & (~3)),
|
((eff_size + 3) & (~3)),
|
||||||
GFP_KERNEL);
|
GFP_KERNEL);
|
||||||
}
|
}
|
||||||
@ -1349,15 +1277,13 @@ ssc_session (char *tx_buf, u32 tx_len, char *rx_buf, u32 rx_len)
|
|||||||
memset((void *)ssc_tx_buf, 0, eff_size);
|
memset((void *)ssc_tx_buf, 0, eff_size);
|
||||||
memset((void *)ssc_rx_buf, 0, eff_size);
|
memset((void *)ssc_rx_buf, 0, eff_size);
|
||||||
|
|
||||||
if (tx_len > 0) {
|
if (tx_len > 0)
|
||||||
memcpy(ssc_tx_buf, tx_buf, tx_len);
|
memcpy(ssc_tx_buf, tx_buf, tx_len);
|
||||||
}
|
|
||||||
|
|
||||||
ret = ifx_ssc_kwrite(0, ssc_tx_buf, eff_size);
|
ret = ifx_ssc_kwrite(0, ssc_tx_buf, eff_size);
|
||||||
|
|
||||||
if (ret > 0) {
|
if (ret > 0)
|
||||||
ssc_tx_buf = NULL; //should be freed by ifx_ssc_kwrite
|
ssc_tx_buf = NULL; /* should be freed by ifx_ssc_kwrite */
|
||||||
}
|
|
||||||
|
|
||||||
if (ret != eff_size) {
|
if (ret != eff_size) {
|
||||||
printk("ifx_ssc_write return %d\n", ret);
|
printk("ifx_ssc_write return %d\n", ret);
|
||||||
@ -1371,41 +1297,36 @@ ssc_session (char *tx_buf, u32 tx_len, char *rx_buf, u32 rx_len)
|
|||||||
|
|
||||||
memcpy(rx_buf, ssc_rx_buf + tx_len, rx_len);
|
memcpy(rx_buf, ssc_rx_buf + tx_len, rx_len);
|
||||||
|
|
||||||
if (mode == IFX_SSC_MODE_TX) {
|
if (mode == IFX_SSC_MODE_TX)
|
||||||
ret = tx_len;
|
ret = tx_len;
|
||||||
}
|
else
|
||||||
else {
|
|
||||||
ret = rx_len;
|
ret = rx_len;
|
||||||
}
|
|
||||||
ssc_session_exit:
|
|
||||||
|
|
||||||
|
ssc_session_exit:
|
||||||
if (ssc_tx_buf != NULL)
|
if (ssc_tx_buf != NULL)
|
||||||
kfree(ssc_tx_buf);
|
kfree(ssc_tx_buf);
|
||||||
if (ssc_rx_buf != NULL)
|
if (ssc_rx_buf != NULL)
|
||||||
kfree(ssc_rx_buf);
|
kfree(ssc_rx_buf);
|
||||||
|
|
||||||
if (ret < 0) {
|
if (ret < 0)
|
||||||
printk("ssc session fails\n");
|
printk("ssc session fails\n");
|
||||||
}
|
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int ifx_ssc_txrx(char *tx_buf, u32 tx_len, char *rx_buf, u32 rx_len)
|
||||||
ifx_ssc_txrx (char *tx_buf, u32 tx_len, char *rx_buf, u32 rx_len)
|
|
||||||
{
|
{
|
||||||
return ssc_session(tx_buf, tx_len, rx_buf, rx_len);
|
return ssc_session(tx_buf, tx_len, rx_buf, rx_len);
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL(ifx_ssc_txrx);
|
EXPORT_SYMBOL(ifx_ssc_txrx);
|
||||||
|
|
||||||
int
|
int ifx_ssc_tx(char *tx_buf, u32 tx_len)
|
||||||
ifx_ssc_tx (char *tx_buf, u32 tx_len)
|
|
||||||
{
|
{
|
||||||
return ssc_session(tx_buf, tx_len, NULL, 0);
|
return ssc_session(tx_buf, tx_len, NULL, 0);
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL(ifx_ssc_tx);
|
EXPORT_SYMBOL(ifx_ssc_tx);
|
||||||
|
|
||||||
int
|
int ifx_ssc_rx(char *rx_buf, u32 rx_len)
|
||||||
ifx_ssc_rx (char *rx_buf, u32 rx_len)
|
|
||||||
{
|
{
|
||||||
return ssc_session(NULL, 0, rx_buf, rx_len);
|
return ssc_session(NULL, 0, rx_buf, rx_len);
|
||||||
}
|
}
|
||||||
|
@ -25,14 +25,15 @@
|
|||||||
#include <linux/fs.h>
|
#include <linux/fs.h>
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <linux/platform_device.h>
|
#include <linux/platform_device.h>
|
||||||
#include <asm/uaccess.h>
|
#include <linux/uaccess.h>
|
||||||
#include <asm/unistd.h>
|
#include <linux/unistd.h>
|
||||||
#include <linux/errno.h>
|
#include <linux/errno.h>
|
||||||
|
#include <linux/leds.h>
|
||||||
|
#include <linux/delay.h>
|
||||||
|
|
||||||
#include <asm/ifxmips/ifxmips.h>
|
#include <asm/ifxmips/ifxmips.h>
|
||||||
#include <asm/ifxmips/ifxmips_gpio.h>
|
#include <asm/ifxmips/ifxmips_gpio.h>
|
||||||
#include <asm/ifxmips/ifxmips_pmu.h>
|
#include <asm/ifxmips/ifxmips_pmu.h>
|
||||||
#include <linux/leds.h>
|
|
||||||
#include <linux/delay.h>
|
|
||||||
|
|
||||||
#define DRVNAME "ifxmips_led"
|
#define DRVNAME "ifxmips_led"
|
||||||
|
|
||||||
@ -50,40 +51,35 @@ struct ifxmips_led {
|
|||||||
u8 bit;
|
u8 bit;
|
||||||
};
|
};
|
||||||
|
|
||||||
void
|
void ifxmips_led_set (unsigned int led)
|
||||||
ifxmips_led_set (unsigned int led)
|
|
||||||
{
|
{
|
||||||
led &= 0xffffff;
|
led &= 0xffffff;
|
||||||
ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CPU0) | led, IFXMIPS_LED_CPU0);
|
ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CPU0) | led, IFXMIPS_LED_CPU0);
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL(ifxmips_led_set);
|
EXPORT_SYMBOL(ifxmips_led_set);
|
||||||
|
|
||||||
void
|
void ifxmips_led_clear (unsigned int led)
|
||||||
ifxmips_led_clear (unsigned int led)
|
|
||||||
{
|
{
|
||||||
led = ~(led & 0xffffff);
|
led = ~(led & 0xffffff);
|
||||||
ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CPU0) & led, IFXMIPS_LED_CPU0);
|
ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CPU0) & led, IFXMIPS_LED_CPU0);
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL(ifxmips_led_clear);
|
EXPORT_SYMBOL(ifxmips_led_clear);
|
||||||
|
|
||||||
void
|
void ifxmips_led_blink_set (unsigned int led)
|
||||||
ifxmips_led_blink_set (unsigned int led)
|
|
||||||
{
|
{
|
||||||
led &= 0xffffff;
|
led &= 0xffffff;
|
||||||
ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON0) | led, IFXMIPS_LED_CON0);
|
ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON0) | led, IFXMIPS_LED_CON0);
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL(ifxmips_led_blink_set);
|
EXPORT_SYMBOL(ifxmips_led_blink_set);
|
||||||
|
|
||||||
void
|
void ifxmips_led_blink_clear (unsigned int led)
|
||||||
ifxmips_led_blink_clear (unsigned int led)
|
|
||||||
{
|
{
|
||||||
led = ~(led & 0xffffff);
|
led = ~(led & 0xffffff);
|
||||||
ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON0) & led, IFXMIPS_LED_CON0);
|
ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON0) & led, IFXMIPS_LED_CON0);
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL(ifxmips_led_blink_clear);
|
EXPORT_SYMBOL(ifxmips_led_blink_clear);
|
||||||
|
|
||||||
void
|
void ifxmips_ledapi_set(struct led_classdev *led_cdev, enum led_brightness value)
|
||||||
ifxmips_ledapi_set(struct led_classdev *led_cdev, enum led_brightness value)
|
|
||||||
{
|
{
|
||||||
struct ifxmips_led *led_dev = container_of(led_cdev, struct ifxmips_led, cdev);
|
struct ifxmips_led *led_dev = container_of(led_cdev, struct ifxmips_led, cdev);
|
||||||
|
|
||||||
@ -93,14 +89,12 @@ ifxmips_ledapi_set(struct led_classdev *led_cdev, enum led_brightness value)
|
|||||||
ifxmips_led_clear(1 << led_dev->bit);
|
ifxmips_led_clear(1 << led_dev->bit);
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void ifxmips_led_setup_gpio (void)
|
||||||
ifxmips_led_setup_gpio (void)
|
|
||||||
{
|
{
|
||||||
int i = 0;
|
int i = 0;
|
||||||
|
|
||||||
/* we need to setup pins SH,D,ST (4,5,6) */
|
/* we need to setup pins SH,D,ST (4,5,6) */
|
||||||
for (i = 4; i < 7; i++)
|
for (i = 4; i < 7; i++) {
|
||||||
{
|
|
||||||
ifxmips_port_set_altsel0(IFXMIPS_LED_GPIO_PORT, i);
|
ifxmips_port_set_altsel0(IFXMIPS_LED_GPIO_PORT, i);
|
||||||
ifxmips_port_clear_altsel1(IFXMIPS_LED_GPIO_PORT, i);
|
ifxmips_port_clear_altsel1(IFXMIPS_LED_GPIO_PORT, i);
|
||||||
ifxmips_port_set_dir_out(IFXMIPS_LED_GPIO_PORT, i);
|
ifxmips_port_set_dir_out(IFXMIPS_LED_GPIO_PORT, i);
|
||||||
@ -108,8 +102,7 @@ ifxmips_led_setup_gpio (void)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static int ifxmips_led_probe(struct platform_device *dev)
|
||||||
ifxmips_led_probe(struct platform_device *dev)
|
|
||||||
{
|
{
|
||||||
int i = 0;
|
int i = 0;
|
||||||
|
|
||||||
@ -142,8 +135,7 @@ ifxmips_led_probe(struct platform_device *dev)
|
|||||||
/* per default, the leds are turned on */
|
/* per default, the leds are turned on */
|
||||||
ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_LED);
|
ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_LED);
|
||||||
|
|
||||||
for(i = 0; i < IFXMIPS_MAX_LED; i++)
|
for (i = 0; i < IFXMIPS_MAX_LED; i++) {
|
||||||
{
|
|
||||||
struct ifxmips_led *tmp = kzalloc(sizeof(struct ifxmips_led), GFP_KERNEL);
|
struct ifxmips_led *tmp = kzalloc(sizeof(struct ifxmips_led), GFP_KERNEL);
|
||||||
tmp->cdev.brightness_set = ifxmips_ledapi_set;
|
tmp->cdev.brightness_set = ifxmips_ledapi_set;
|
||||||
tmp->cdev.name = kmalloc(sizeof("ifxmips:led:00"), GFP_KERNEL);
|
tmp->cdev.name = kmalloc(sizeof("ifxmips:led:00"), GFP_KERNEL);
|
||||||
@ -156,14 +148,12 @@ ifxmips_led_probe(struct platform_device *dev)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static int ifxmips_led_remove(struct platform_device *pdev)
|
||||||
ifxmips_led_remove(struct platform_device *pdev)
|
|
||||||
{
|
{
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct
|
static struct platform_driver ifxmips_led_driver = {
|
||||||
platform_driver ifxmips_led_driver = {
|
|
||||||
.probe = ifxmips_led_probe,
|
.probe = ifxmips_led_probe,
|
||||||
.remove = ifxmips_led_remove,
|
.remove = ifxmips_led_remove,
|
||||||
.driver = {
|
.driver = {
|
||||||
@ -172,8 +162,7 @@ platform_driver ifxmips_led_driver = {
|
|||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
int __init
|
int __init ifxmips_led_init (void)
|
||||||
ifxmips_led_init (void)
|
|
||||||
{
|
{
|
||||||
int ret = platform_driver_register(&ifxmips_led_driver);
|
int ret = platform_driver_register(&ifxmips_led_driver);
|
||||||
if (ret)
|
if (ret)
|
||||||
@ -182,8 +171,7 @@ ifxmips_led_init (void)
|
|||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
void __exit
|
void __exit ifxmips_led_exit (void)
|
||||||
ifxmips_led_exit (void)
|
|
||||||
{
|
{
|
||||||
platform_driver_unregister(&ifxmips_led_driver);
|
platform_driver_unregister(&ifxmips_led_driver);
|
||||||
}
|
}
|
||||||
|
@ -26,11 +26,12 @@
|
|||||||
#include <linux/mtd/map.h>
|
#include <linux/mtd/map.h>
|
||||||
#include <linux/mtd/partitions.h>
|
#include <linux/mtd/partitions.h>
|
||||||
#include <linux/mtd/cfi.h>
|
#include <linux/mtd/cfi.h>
|
||||||
|
#include <linux/magic.h>
|
||||||
|
#include <linux/platform_device.h>
|
||||||
|
|
||||||
#include <asm/ifxmips/ifxmips.h>
|
#include <asm/ifxmips/ifxmips.h>
|
||||||
#include <asm/ifxmips/ifxmips_prom.h>
|
#include <asm/ifxmips/ifxmips_prom.h>
|
||||||
#include <asm/ifxmips/ifxmips_ebu.h>
|
#include <asm/ifxmips/ifxmips_ebu.h>
|
||||||
#include <linux/magic.h>
|
|
||||||
#include <linux/platform_device.h>
|
|
||||||
|
|
||||||
#ifndef CONFIG_MTD_PARTITIONS
|
#ifndef CONFIG_MTD_PARTITIONS
|
||||||
#error Please enable CONFIG_MTD_PARTITIONS
|
#error Please enable CONFIG_MTD_PARTITIONS
|
||||||
|
@ -48,8 +48,7 @@ struct ifxmips_mii_priv {
|
|||||||
static struct net_device *ifxmips_mii0_dev;
|
static struct net_device *ifxmips_mii0_dev;
|
||||||
static unsigned char mac_addr[MAX_ADDR_LEN];
|
static unsigned char mac_addr[MAX_ADDR_LEN];
|
||||||
|
|
||||||
void
|
void ifxmips_write_mdio(u32 phy_addr, u32 phy_reg, u16 phy_data)
|
||||||
ifxmips_write_mdio(u32 phy_addr, u32 phy_reg, u16 phy_data)
|
|
||||||
{
|
{
|
||||||
u32 val = MDIO_ACC_REQUEST |
|
u32 val = MDIO_ACC_REQUEST |
|
||||||
((phy_addr & MDIO_ACC_ADDR_MASK) << MDIO_ACC_ADDR_OFFSET) |
|
((phy_addr & MDIO_ACC_ADDR_MASK) << MDIO_ACC_ADDR_OFFSET) |
|
||||||
@ -61,8 +60,7 @@ ifxmips_write_mdio(u32 phy_addr, u32 phy_reg, u16 phy_data)
|
|||||||
}
|
}
|
||||||
EXPORT_SYMBOL(ifxmips_write_mdio);
|
EXPORT_SYMBOL(ifxmips_write_mdio);
|
||||||
|
|
||||||
unsigned short
|
unsigned short ifxmips_read_mdio(u32 phy_addr, u32 phy_reg)
|
||||||
ifxmips_read_mdio(u32 phy_addr, u32 phy_reg)
|
|
||||||
{
|
{
|
||||||
u32 val = MDIO_ACC_REQUEST | MDIO_ACC_READ |
|
u32 val = MDIO_ACC_REQUEST | MDIO_ACC_READ |
|
||||||
((phy_addr & MDIO_ACC_ADDR_MASK) << MDIO_ACC_ADDR_OFFSET) |
|
((phy_addr & MDIO_ACC_ADDR_MASK) << MDIO_ACC_ADDR_OFFSET) |
|
||||||
@ -70,21 +68,19 @@ ifxmips_read_mdio(u32 phy_addr, u32 phy_reg)
|
|||||||
|
|
||||||
while (ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST) ;
|
while (ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST) ;
|
||||||
ifxmips_w32(val, IFXMIPS_PPE32_MDIO_ACC);
|
ifxmips_w32(val, IFXMIPS_PPE32_MDIO_ACC);
|
||||||
while(ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST){};
|
while (ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST) ;
|
||||||
val = ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_VAL_MASK;
|
val = ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_VAL_MASK;
|
||||||
return val;
|
return val;
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL(ifxmips_read_mdio);
|
EXPORT_SYMBOL(ifxmips_read_mdio);
|
||||||
|
|
||||||
int
|
int ifxmips_ifxmips_mii_open(struct net_device *dev)
|
||||||
ifxmips_ifxmips_mii_open(struct net_device *dev)
|
|
||||||
{
|
{
|
||||||
struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)dev->priv;
|
struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)dev->priv;
|
||||||
struct dma_device_info *dma_dev = priv->dma_device;
|
struct dma_device_info *dma_dev = priv->dma_device;
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
for (i = 0; i < dma_dev->max_rx_chan_num; i++)
|
for (i = 0; i < dma_dev->max_rx_chan_num; i++) {
|
||||||
{
|
|
||||||
if ((dma_dev->rx_chan[i])->control == IFXMIPS_DMA_CH_ON)
|
if ((dma_dev->rx_chan[i])->control == IFXMIPS_DMA_CH_ON)
|
||||||
(dma_dev->rx_chan[i])->open(dma_dev->rx_chan[i]);
|
(dma_dev->rx_chan[i])->open(dma_dev->rx_chan[i]);
|
||||||
}
|
}
|
||||||
@ -92,8 +88,8 @@ ifxmips_ifxmips_mii_open(struct net_device *dev)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int ifxmips_mii_release(struct net_device *dev)
|
||||||
ifxmips_mii_release(struct net_device *dev){
|
{
|
||||||
struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)dev->priv;
|
struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)dev->priv;
|
||||||
struct dma_device_info *dma_dev = priv->dma_device;
|
struct dma_device_info *dma_dev = priv->dma_device;
|
||||||
int i;
|
int i;
|
||||||
@ -104,8 +100,7 @@ ifxmips_mii_release(struct net_device *dev){
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int ifxmips_mii_hw_receive(struct net_device *dev, struct dma_device_info *dma_dev)
|
||||||
ifxmips_mii_hw_receive(struct net_device* dev,struct dma_device_info* dma_dev)
|
|
||||||
{
|
{
|
||||||
struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)dev->priv;
|
struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)dev->priv;
|
||||||
unsigned char *buf = NULL;
|
unsigned char *buf = NULL;
|
||||||
@ -114,22 +109,19 @@ ifxmips_mii_hw_receive(struct net_device* dev,struct dma_device_info* dma_dev)
|
|||||||
|
|
||||||
len = dma_device_read(dma_dev, &buf, (void **)&skb);
|
len = dma_device_read(dma_dev, &buf, (void **)&skb);
|
||||||
|
|
||||||
if (len >= ETHERNET_PACKET_DMA_BUFFER_SIZE)
|
if (len >= ETHERNET_PACKET_DMA_BUFFER_SIZE) {
|
||||||
{
|
|
||||||
printk(KERN_INFO "ifxmips_mii0: packet too large %d\n", len);
|
printk(KERN_INFO "ifxmips_mii0: packet too large %d\n", len);
|
||||||
goto ifxmips_mii_hw_receive_err_exit;
|
goto ifxmips_mii_hw_receive_err_exit;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* remove CRC */
|
/* remove CRC */
|
||||||
len -= 4;
|
len -= 4;
|
||||||
if (skb == NULL)
|
if (skb == NULL) {
|
||||||
{
|
|
||||||
printk(KERN_INFO "ifxmips_mii0: cannot restore pointer\n");
|
printk(KERN_INFO "ifxmips_mii0: cannot restore pointer\n");
|
||||||
goto ifxmips_mii_hw_receive_err_exit;
|
goto ifxmips_mii_hw_receive_err_exit;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (len > (skb->end - skb->tail))
|
if (len > (skb->end - skb->tail)) {
|
||||||
{
|
|
||||||
printk(KERN_INFO "ifxmips_mii0: BUG, len:%d end:%p tail:%p\n",
|
printk(KERN_INFO "ifxmips_mii0: BUG, len:%d end:%p tail:%p\n",
|
||||||
(len+4), skb->end, skb->tail);
|
(len+4), skb->end, skb->tail);
|
||||||
goto ifxmips_mii_hw_receive_err_exit;
|
goto ifxmips_mii_hw_receive_err_exit;
|
||||||
@ -145,8 +137,7 @@ ifxmips_mii_hw_receive(struct net_device* dev,struct dma_device_info* dma_dev)
|
|||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
ifxmips_mii_hw_receive_err_exit:
|
ifxmips_mii_hw_receive_err_exit:
|
||||||
if (len == 0)
|
if (len == 0) {
|
||||||
{
|
|
||||||
if (skb)
|
if (skb)
|
||||||
dev_kfree_skb_any(skb);
|
dev_kfree_skb_any(skb);
|
||||||
priv->stats.rx_errors++;
|
priv->stats.rx_errors++;
|
||||||
@ -157,8 +148,7 @@ ifxmips_mii_hw_receive_err_exit:
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int ifxmips_mii_hw_tx(char *buf, int len, struct net_device *dev)
|
||||||
ifxmips_mii_hw_tx(char *buf, int len, struct net_device *dev)
|
|
||||||
{
|
{
|
||||||
int ret = 0;
|
int ret = 0;
|
||||||
struct ifxmips_mii_priv *priv = dev->priv;
|
struct ifxmips_mii_priv *priv = dev->priv;
|
||||||
@ -167,8 +157,7 @@ ifxmips_mii_hw_tx(char *buf, int len, struct net_device *dev)
|
|||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int ifxmips_mii_tx(struct sk_buff *skb, struct net_device *dev)
|
||||||
ifxmips_mii_tx(struct sk_buff *skb, struct net_device *dev)
|
|
||||||
{
|
{
|
||||||
int len;
|
int len;
|
||||||
char *data;
|
char *data;
|
||||||
@ -179,14 +168,13 @@ ifxmips_mii_tx(struct sk_buff *skb, struct net_device *dev)
|
|||||||
data = skb->data;
|
data = skb->data;
|
||||||
priv->skb = skb;
|
priv->skb = skb;
|
||||||
dev->trans_start = jiffies;
|
dev->trans_start = jiffies;
|
||||||
// TODO we got more than 1 dma channel, so we should do something intelligent
|
/* TODO: we got more than 1 dma channel,
|
||||||
// here to select one
|
so we should do something intelligent here to select one */
|
||||||
dma_dev->current_tx_chan = 0;
|
dma_dev->current_tx_chan = 0;
|
||||||
|
|
||||||
wmb();
|
wmb();
|
||||||
|
|
||||||
if (ifxmips_mii_hw_tx(data, len, dev) != len)
|
if (ifxmips_mii_hw_tx(data, len, dev) != len) {
|
||||||
{
|
|
||||||
dev_kfree_skb_any(skb);
|
dev_kfree_skb_any(skb);
|
||||||
priv->stats.tx_errors++;
|
priv->stats.tx_errors++;
|
||||||
priv->stats.tx_dropped++;
|
priv->stats.tx_dropped++;
|
||||||
@ -198,8 +186,7 @@ ifxmips_mii_tx(struct sk_buff *skb, struct net_device *dev)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void ifxmips_mii_tx_timeout(struct net_device *dev)
|
||||||
ifxmips_mii_tx_timeout(struct net_device *dev)
|
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)dev->priv;
|
struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)dev->priv;
|
||||||
@ -211,13 +198,11 @@ ifxmips_mii_tx_timeout(struct net_device *dev)
|
|||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int dma_intr_handler(struct dma_device_info *dma_dev, int status)
|
||||||
dma_intr_handler(struct dma_device_info* dma_dev, int status)
|
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
switch(status)
|
switch (status) {
|
||||||
{
|
|
||||||
case RCV_INT:
|
case RCV_INT:
|
||||||
ifxmips_mii_hw_receive(ifxmips_mii0_dev, dma_dev);
|
ifxmips_mii_hw_receive(ifxmips_mii0_dev, dma_dev);
|
||||||
break;
|
break;
|
||||||
@ -225,8 +210,7 @@ dma_intr_handler(struct dma_device_info* dma_dev, int status)
|
|||||||
case TX_BUF_FULL_INT:
|
case TX_BUF_FULL_INT:
|
||||||
printk(KERN_INFO "ifxmips_mii0: tx buffer full\n");
|
printk(KERN_INFO "ifxmips_mii0: tx buffer full\n");
|
||||||
netif_stop_queue(ifxmips_mii0_dev);
|
netif_stop_queue(ifxmips_mii0_dev);
|
||||||
for (i = 0; i < dma_dev->max_tx_chan_num; i++)
|
for (i = 0; i < dma_dev->max_tx_chan_num; i++) {
|
||||||
{
|
|
||||||
if ((dma_dev->tx_chan[i])->control == IFXMIPS_DMA_CH_ON)
|
if ((dma_dev->tx_chan[i])->control == IFXMIPS_DMA_CH_ON)
|
||||||
dma_dev->tx_chan[i]->enable_irq(dma_dev->tx_chan[i]);
|
dma_dev->tx_chan[i]->enable_irq(dma_dev->tx_chan[i]);
|
||||||
}
|
}
|
||||||
@ -243,8 +227,7 @@ dma_intr_handler(struct dma_device_info* dma_dev, int status)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
unsigned char*
|
unsigned char *ifxmips_etop_dma_buffer_alloc(int len, int *byte_offset, void **opt)
|
||||||
ifxmips_etop_dma_buffer_alloc(int len, int *byte_offset, void **opt)
|
|
||||||
{
|
{
|
||||||
unsigned char *buffer = NULL;
|
unsigned char *buffer = NULL;
|
||||||
struct sk_buff *skb = NULL;
|
struct sk_buff *skb = NULL;
|
||||||
@ -261,13 +244,11 @@ ifxmips_etop_dma_buffer_alloc(int len, int *byte_offset, void **opt)
|
|||||||
return buffer;
|
return buffer;
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void ifxmips_etop_dma_buffer_free(unsigned char *dataptr, void *opt)
|
||||||
ifxmips_etop_dma_buffer_free(unsigned char *dataptr, void *opt)
|
|
||||||
{
|
{
|
||||||
struct sk_buff *skb = NULL;
|
struct sk_buff *skb = NULL;
|
||||||
|
|
||||||
if (opt == NULL)
|
if (opt == NULL) {
|
||||||
{
|
|
||||||
kfree(dataptr);
|
kfree(dataptr);
|
||||||
} else {
|
} else {
|
||||||
skb = (struct sk_buff *)opt;
|
skb = (struct sk_buff *)opt;
|
||||||
@ -275,14 +256,12 @@ ifxmips_etop_dma_buffer_free(unsigned char *dataptr, void *opt)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct net_device_stats*
|
static struct net_device_stats *ifxmips_get_stats(struct net_device *dev)
|
||||||
ifxmips_get_stats(struct net_device *dev)
|
|
||||||
{
|
{
|
||||||
return (struct net_device_stats *)dev->priv;
|
return (struct net_device_stats *)dev->priv;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static int ifxmips_mii_dev_init(struct net_device *dev)
|
||||||
ifxmips_mii_dev_init(struct net_device *dev)
|
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
struct ifxmips_mii_priv *priv;
|
struct ifxmips_mii_priv *priv;
|
||||||
@ -307,8 +286,7 @@ ifxmips_mii_dev_init(struct net_device *dev)
|
|||||||
priv->dma_device->intr_handler = &dma_intr_handler;
|
priv->dma_device->intr_handler = &dma_intr_handler;
|
||||||
priv->dma_device->max_rx_chan_num = 4;
|
priv->dma_device->max_rx_chan_num = 4;
|
||||||
|
|
||||||
for (i = 0; i < priv->dma_device->max_rx_chan_num; i++)
|
for (i = 0; i < priv->dma_device->max_rx_chan_num; i++) {
|
||||||
{
|
|
||||||
priv->dma_device->rx_chan[i]->packet_size = ETHERNET_PACKET_DMA_BUFFER_SIZE;
|
priv->dma_device->rx_chan[i]->packet_size = ETHERNET_PACKET_DMA_BUFFER_SIZE;
|
||||||
priv->dma_device->rx_chan[i]->control = IFXMIPS_DMA_CH_ON;
|
priv->dma_device->rx_chan[i]->control = IFXMIPS_DMA_CH_ON;
|
||||||
}
|
}
|
||||||
@ -322,16 +300,14 @@ ifxmips_mii_dev_init(struct net_device *dev)
|
|||||||
dma_device_register(priv->dma_device);
|
dma_device_register(priv->dma_device);
|
||||||
|
|
||||||
printk(KERN_INFO "ifxmips_mii0: using mac=");
|
printk(KERN_INFO "ifxmips_mii0: using mac=");
|
||||||
for (i = 0; i < 6; i++)
|
for (i = 0; i < 6; i++) {
|
||||||
{
|
|
||||||
dev->dev_addr[i] = mac_addr[i];
|
dev->dev_addr[i] = mac_addr[i];
|
||||||
printk("%02X%c", dev->dev_addr[i], (i == 5)?('\n'):(':'));
|
printk("%02X%c", dev->dev_addr[i], (i == 5)?('\n'):(':'));
|
||||||
}
|
}
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static void ifxmips_mii_chip_init(int mode)
|
||||||
ifxmips_mii_chip_init(int mode)
|
|
||||||
{
|
{
|
||||||
ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_DMA);
|
ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_DMA);
|
||||||
ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_PPE);
|
ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_PPE);
|
||||||
@ -345,8 +321,7 @@ ifxmips_mii_chip_init(int mode)
|
|||||||
wmb();
|
wmb();
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static int ifxmips_mii_probe(struct platform_device *dev)
|
||||||
ifxmips_mii_probe(struct platform_device *dev)
|
|
||||||
{
|
{
|
||||||
int result = 0;
|
int result = 0;
|
||||||
unsigned char *mac = (unsigned char *)dev->dev.platform_data;
|
unsigned char *mac = (unsigned char *)dev->dev.platform_data;
|
||||||
@ -356,8 +331,7 @@ ifxmips_mii_probe(struct platform_device *dev)
|
|||||||
strcpy(ifxmips_mii0_dev->name, "eth%d");
|
strcpy(ifxmips_mii0_dev->name, "eth%d");
|
||||||
ifxmips_mii_chip_init(REV_MII_MODE);
|
ifxmips_mii_chip_init(REV_MII_MODE);
|
||||||
result = register_netdev(ifxmips_mii0_dev);
|
result = register_netdev(ifxmips_mii0_dev);
|
||||||
if (result)
|
if (result) {
|
||||||
{
|
|
||||||
printk(KERN_INFO "ifxmips_mii0: error %i registering device \"%s\"\n", result, ifxmips_mii0_dev->name);
|
printk(KERN_INFO "ifxmips_mii0: error %i registering device \"%s\"\n", result, ifxmips_mii0_dev->name);
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
@ -368,8 +342,7 @@ out:
|
|||||||
return result;
|
return result;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static int ifxmips_mii_remove(struct platform_device *dev)
|
||||||
ifxmips_mii_remove(struct platform_device *dev)
|
|
||||||
{
|
{
|
||||||
struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)ifxmips_mii0_dev->priv;
|
struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)ifxmips_mii0_dev->priv;
|
||||||
|
|
||||||
@ -383,8 +356,7 @@ ifxmips_mii_remove(struct platform_device *dev)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct
|
static struct platform_driver ifxmips_mii_driver = {
|
||||||
platform_driver ifxmips_mii_driver = {
|
|
||||||
.probe = ifxmips_mii_probe,
|
.probe = ifxmips_mii_probe,
|
||||||
.remove = ifxmips_mii_remove,
|
.remove = ifxmips_mii_remove,
|
||||||
.driver = {
|
.driver = {
|
||||||
@ -393,8 +365,7 @@ platform_driver ifxmips_mii_driver = {
|
|||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
int __init
|
int __init ifxmips_mii_init(void)
|
||||||
ifxmips_mii_init(void)
|
|
||||||
{
|
{
|
||||||
int ret = platform_driver_register(&ifxmips_mii_driver);
|
int ret = platform_driver_register(&ifxmips_mii_driver);
|
||||||
if (ret)
|
if (ret)
|
||||||
@ -402,8 +373,7 @@ ifxmips_mii_init(void)
|
|||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void __exit
|
static void __exit ifxmips_mii_cleanup(void)
|
||||||
ifxmips_mii_cleanup(void)
|
|
||||||
{
|
{
|
||||||
platform_driver_unregister(&ifxmips_mii_driver);
|
platform_driver_unregister(&ifxmips_mii_driver);
|
||||||
}
|
}
|
||||||
@ -414,3 +384,4 @@ module_exit(ifxmips_mii_cleanup);
|
|||||||
MODULE_LICENSE("GPL");
|
MODULE_LICENSE("GPL");
|
||||||
MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
|
MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
|
||||||
MODULE_DESCRIPTION("ethernet map driver for IFXMIPS boards");
|
MODULE_DESCRIPTION("ethernet map driver for IFXMIPS boards");
|
||||||
|
|
||||||
|
@ -42,10 +42,12 @@
|
|||||||
#include <linux/sysrq.h>
|
#include <linux/sysrq.h>
|
||||||
#include <linux/irq.h>
|
#include <linux/irq.h>
|
||||||
#include <linux/platform_device.h>
|
#include <linux/platform_device.h>
|
||||||
|
#include <linux/io.h>
|
||||||
|
#include <linux/uaccess.h>
|
||||||
|
#include <linux/bitops.h>
|
||||||
|
|
||||||
#include <asm/system.h>
|
#include <asm/system.h>
|
||||||
#include <asm/io.h>
|
|
||||||
#include <asm/uaccess.h>
|
|
||||||
#include <asm/bitops.h>
|
|
||||||
#include <asm/ifxmips/ifxmips.h>
|
#include <asm/ifxmips/ifxmips.h>
|
||||||
#include <asm/ifxmips/ifxmips_irq.h>
|
#include <asm/ifxmips/ifxmips_irq.h>
|
||||||
|
|
||||||
@ -61,14 +63,12 @@ static struct uart_port ifxmipsasc_port[2];
|
|||||||
static struct uart_driver ifxmipsasc_reg;
|
static struct uart_driver ifxmipsasc_reg;
|
||||||
extern unsigned int ifxmips_get_fpi_hz(void);
|
extern unsigned int ifxmips_get_fpi_hz(void);
|
||||||
|
|
||||||
static void
|
static void ifxmipsasc_stop_tx(struct uart_port *port)
|
||||||
ifxmipsasc_stop_tx(struct uart_port *port)
|
|
||||||
{
|
{
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static void ifxmipsasc_start_tx(struct uart_port *port)
|
||||||
ifxmipsasc_start_tx(struct uart_port *port)
|
|
||||||
{
|
{
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
local_irq_save(flags);
|
local_irq_save(flags);
|
||||||
@ -77,26 +77,28 @@ ifxmipsasc_start_tx(struct uart_port *port)
|
|||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static void ifxmipsasc_stop_rx(struct uart_port *port)
|
||||||
ifxmipsasc_stop_rx(struct uart_port *port)
|
|
||||||
{
|
{
|
||||||
ifxmips_w32(ASCWHBSTATE_CLRREN, port->membase + IFXMIPS_ASC_WHBSTATE);
|
ifxmips_w32(ASCWHBSTATE_CLRREN, port->membase + IFXMIPS_ASC_WHBSTATE);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static void ifxmipsasc_enable_ms(struct uart_port *port)
|
||||||
ifxmipsasc_enable_ms(struct uart_port *port)
|
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
#include <linux/version.h>
|
||||||
ifxmipsasc_rx_chars(struct uart_port *port)
|
|
||||||
|
static void ifxmipsasc_rx_chars(struct uart_port *port)
|
||||||
{
|
{
|
||||||
|
#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 26))
|
||||||
|
struct tty_struct *tty = port->info->port.tty;
|
||||||
|
#else
|
||||||
struct tty_struct *tty = port->info->tty;
|
struct tty_struct *tty = port->info->tty;
|
||||||
|
#endif
|
||||||
unsigned int ch = 0, rsr = 0, fifocnt;
|
unsigned int ch = 0, rsr = 0, fifocnt;
|
||||||
|
|
||||||
fifocnt = ifxmips_r32(port->membase + IFXMIPS_ASC_FSTAT) & ASCFSTAT_RXFFLMASK;
|
fifocnt = ifxmips_r32(port->membase + IFXMIPS_ASC_FSTAT) & ASCFSTAT_RXFFLMASK;
|
||||||
while(fifocnt--)
|
while (fifocnt--) {
|
||||||
{
|
|
||||||
u8 flag = TTY_NORMAL;
|
u8 flag = TTY_NORMAL;
|
||||||
ch = ifxmips_r32(port->membase + IFXMIPS_ASC_RBUF);
|
ch = ifxmips_r32(port->membase + IFXMIPS_ASC_RBUF);
|
||||||
rsr = (ifxmips_r32(port->membase + IFXMIPS_ASC_STATE) & ASCSTATE_ANY) | UART_DUMMY_UER_RX;
|
rsr = (ifxmips_r32(port->membase + IFXMIPS_ASC_STATE) & ASCSTATE_ANY) | UART_DUMMY_UER_RX;
|
||||||
@ -107,19 +109,15 @@ ifxmipsasc_rx_chars(struct uart_port *port)
|
|||||||
* Note that the error handling code is
|
* Note that the error handling code is
|
||||||
* out of the main execution path
|
* out of the main execution path
|
||||||
*/
|
*/
|
||||||
if(rsr & ASCSTATE_ANY)
|
if (rsr & ASCSTATE_ANY) {
|
||||||
{
|
if (rsr & ASCSTATE_PE) {
|
||||||
if(rsr & ASCSTATE_PE)
|
|
||||||
{
|
|
||||||
port->icount.parity++;
|
port->icount.parity++;
|
||||||
ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_WHBSTATE) | ASCWHBSTATE_CLRPE, port->membase + IFXMIPS_ASC_WHBSTATE);
|
ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_WHBSTATE) | ASCWHBSTATE_CLRPE, port->membase + IFXMIPS_ASC_WHBSTATE);
|
||||||
} else if(rsr & ASCSTATE_FE)
|
} else if (rsr & ASCSTATE_FE) {
|
||||||
{
|
|
||||||
port->icount.frame++;
|
port->icount.frame++;
|
||||||
ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_WHBSTATE) | ASCWHBSTATE_CLRFE, port->membase + IFXMIPS_ASC_WHBSTATE);
|
ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_WHBSTATE) | ASCWHBSTATE_CLRFE, port->membase + IFXMIPS_ASC_WHBSTATE);
|
||||||
}
|
}
|
||||||
if(rsr & ASCSTATE_ROE)
|
if (rsr & ASCSTATE_ROE) {
|
||||||
{
|
|
||||||
port->icount.overrun++;
|
port->icount.overrun++;
|
||||||
ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_WHBSTATE) | ASCWHBSTATE_CLRROE, port->membase + IFXMIPS_ASC_WHBSTATE);
|
ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_WHBSTATE) | ASCWHBSTATE_CLRROE, port->membase + IFXMIPS_ASC_WHBSTATE);
|
||||||
}
|
}
|
||||||
@ -149,21 +147,17 @@ ifxmipsasc_rx_chars(struct uart_port *port)
|
|||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
static void
|
static void ifxmipsasc_tx_chars(struct uart_port *port)
|
||||||
ifxmipsasc_tx_chars(struct uart_port *port)
|
|
||||||
{
|
{
|
||||||
struct circ_buf *xmit = &port->info->xmit;
|
struct circ_buf *xmit = &port->info->xmit;
|
||||||
if(uart_tx_stopped(port))
|
if (uart_tx_stopped(port)) {
|
||||||
{
|
|
||||||
ifxmipsasc_stop_tx(port);
|
ifxmipsasc_stop_tx(port);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
while (((ifxmips_r32(port->membase + IFXMIPS_ASC_FSTAT) & ASCFSTAT_TXFFLMASK)
|
while (((ifxmips_r32(port->membase + IFXMIPS_ASC_FSTAT) & ASCFSTAT_TXFFLMASK)
|
||||||
>> ASCFSTAT_TXFFLOFF) != TXFIFO_FULL)
|
>> ASCFSTAT_TXFFLOFF) != TXFIFO_FULL) {
|
||||||
{
|
if (port->x_char) {
|
||||||
if(port->x_char)
|
|
||||||
{
|
|
||||||
ifxmips_w32(port->x_char, port->membase + IFXMIPS_ASC_TBUF);
|
ifxmips_w32(port->x_char, port->membase + IFXMIPS_ASC_TBUF);
|
||||||
port->icount.tx++;
|
port->icount.tx++;
|
||||||
port->x_char = 0;
|
port->x_char = 0;
|
||||||
@ -182,8 +176,7 @@ ifxmipsasc_tx_chars(struct uart_port *port)
|
|||||||
uart_write_wakeup(port);
|
uart_write_wakeup(port);
|
||||||
}
|
}
|
||||||
|
|
||||||
static irqreturn_t
|
static irqreturn_t ifxmipsasc_tx_int(int irq, void *_port)
|
||||||
ifxmipsasc_tx_int(int irq, void *_port)
|
|
||||||
{
|
{
|
||||||
struct uart_port *port = (struct uart_port *)_port;
|
struct uart_port *port = (struct uart_port *)_port;
|
||||||
ifxmips_w32(ASC_IRNCR_TIR, port->membase + IFXMIPS_ASC_IRNCR);
|
ifxmips_w32(ASC_IRNCR_TIR, port->membase + IFXMIPS_ASC_IRNCR);
|
||||||
@ -192,8 +185,7 @@ ifxmipsasc_tx_int(int irq, void *_port)
|
|||||||
return IRQ_HANDLED;
|
return IRQ_HANDLED;
|
||||||
}
|
}
|
||||||
|
|
||||||
static irqreturn_t
|
static irqreturn_t ifxmipsasc_er_int(int irq, void *_port)
|
||||||
ifxmipsasc_er_int(int irq, void *_port)
|
|
||||||
{
|
{
|
||||||
struct uart_port *port = (struct uart_port *)_port;
|
struct uart_port *port = (struct uart_port *)_port;
|
||||||
/* clear any pending interrupts */
|
/* clear any pending interrupts */
|
||||||
@ -202,8 +194,7 @@ ifxmipsasc_er_int(int irq, void *_port)
|
|||||||
return IRQ_HANDLED;
|
return IRQ_HANDLED;
|
||||||
}
|
}
|
||||||
|
|
||||||
static irqreturn_t
|
static irqreturn_t ifxmipsasc_rx_int(int irq, void *_port)
|
||||||
ifxmipsasc_rx_int(int irq, void *_port)
|
|
||||||
{
|
{
|
||||||
struct uart_port *port = (struct uart_port *)_port;
|
struct uart_port *port = (struct uart_port *)_port;
|
||||||
ifxmips_w32(ASC_IRNCR_RIR, port->membase + IFXMIPS_ASC_IRNCR);
|
ifxmips_w32(ASC_IRNCR_RIR, port->membase + IFXMIPS_ASC_IRNCR);
|
||||||
@ -212,32 +203,27 @@ ifxmipsasc_rx_int(int irq, void *_port)
|
|||||||
return IRQ_HANDLED;
|
return IRQ_HANDLED;
|
||||||
}
|
}
|
||||||
|
|
||||||
static unsigned int
|
static unsigned int ifxmipsasc_tx_empty(struct uart_port *port)
|
||||||
ifxmipsasc_tx_empty(struct uart_port *port)
|
|
||||||
{
|
{
|
||||||
int status;
|
int status;
|
||||||
status = ifxmips_r32(port->membase + IFXMIPS_ASC_FSTAT) & ASCFSTAT_TXFFLMASK;
|
status = ifxmips_r32(port->membase + IFXMIPS_ASC_FSTAT) & ASCFSTAT_TXFFLMASK;
|
||||||
return status ? 0 : TIOCSER_TEMT;
|
return status ? 0 : TIOCSER_TEMT;
|
||||||
}
|
}
|
||||||
|
|
||||||
static unsigned int
|
static unsigned int ifxmipsasc_get_mctrl(struct uart_port *port)
|
||||||
ifxmipsasc_get_mctrl(struct uart_port *port)
|
|
||||||
{
|
{
|
||||||
return TIOCM_CTS | TIOCM_CAR | TIOCM_DSR;
|
return TIOCM_CTS | TIOCM_CAR | TIOCM_DSR;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static void ifxmipsasc_set_mctrl(struct uart_port *port, u_int mctrl)
|
||||||
ifxmipsasc_set_mctrl(struct uart_port *port, u_int mctrl)
|
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static void ifxmipsasc_break_ctl(struct uart_port *port, int break_state)
|
||||||
ifxmipsasc_break_ctl(struct uart_port *port, int break_state)
|
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static int ifxmipsasc_startup(struct uart_port *port)
|
||||||
ifxmipsasc_startup(struct uart_port *port)
|
|
||||||
{
|
{
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
int retval;
|
int retval;
|
||||||
@ -255,23 +241,20 @@ ifxmipsasc_startup(struct uart_port *port)
|
|||||||
local_irq_save(flags);
|
local_irq_save(flags);
|
||||||
|
|
||||||
retval = request_irq(port->irq, ifxmipsasc_tx_int, IRQF_DISABLED, "asc_tx", port);
|
retval = request_irq(port->irq, ifxmipsasc_tx_int, IRQF_DISABLED, "asc_tx", port);
|
||||||
if(retval)
|
if (retval) {
|
||||||
{
|
printk(KERN_ERR "failed to request ifxmipsasc_tx_int\n");
|
||||||
printk("failed to request ifxmipsasc_tx_int\n");
|
|
||||||
return retval;
|
return retval;
|
||||||
}
|
}
|
||||||
|
|
||||||
retval = request_irq(port->irq + 2, ifxmipsasc_rx_int, IRQF_DISABLED, "asc_rx", port);
|
retval = request_irq(port->irq + 2, ifxmipsasc_rx_int, IRQF_DISABLED, "asc_rx", port);
|
||||||
if(retval)
|
if (retval) {
|
||||||
{
|
printk(KERN_ERR "failed to request ifxmipsasc_rx_int\n");
|
||||||
printk("failed to request ifxmipsasc_rx_int\n");
|
|
||||||
goto err1;
|
goto err1;
|
||||||
}
|
}
|
||||||
|
|
||||||
retval = request_irq(port->irq + 3, ifxmipsasc_er_int, IRQF_DISABLED, "asc_er", port);
|
retval = request_irq(port->irq + 3, ifxmipsasc_er_int, IRQF_DISABLED, "asc_er", port);
|
||||||
if(retval)
|
if (retval) {
|
||||||
{
|
printk(KERN_ERR "failed to request ifxmipsasc_er_int\n");
|
||||||
printk("failed to request ifxmipsasc_er_int\n");
|
|
||||||
goto err2;
|
goto err2;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -288,8 +271,7 @@ err1:
|
|||||||
return retval;
|
return retval;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static void ifxmipsasc_shutdown(struct uart_port *port)
|
||||||
ifxmipsasc_shutdown(struct uart_port *port)
|
|
||||||
{
|
{
|
||||||
free_irq(port->irq, port);
|
free_irq(port->irq, port);
|
||||||
free_irq(port->irq + 2, port);
|
free_irq(port->irq + 2, port);
|
||||||
@ -314,8 +296,7 @@ static void ifxmipsasc_set_termios(struct uart_port *port, struct ktermios *new,
|
|||||||
cflag = new->c_cflag;
|
cflag = new->c_cflag;
|
||||||
iflag = new->c_iflag;
|
iflag = new->c_iflag;
|
||||||
|
|
||||||
switch(cflag & CSIZE)
|
switch (cflag & CSIZE) {
|
||||||
{
|
|
||||||
case CS7:
|
case CS7:
|
||||||
con = ASCCON_M_7ASYNC;
|
con = ASCCON_M_7ASYNC;
|
||||||
break;
|
break;
|
||||||
@ -330,8 +311,7 @@ static void ifxmipsasc_set_termios(struct uart_port *port, struct ktermios *new,
|
|||||||
if (cflag & CSTOPB)
|
if (cflag & CSTOPB)
|
||||||
con |= ASCCON_STP;
|
con |= ASCCON_STP;
|
||||||
|
|
||||||
if(cflag & PARENB)
|
if (cflag & PARENB) {
|
||||||
{
|
|
||||||
if (!(cflag & PARODD))
|
if (!(cflag & PARODD))
|
||||||
con &= ~ASCCON_ODD;
|
con &= ~ASCCON_ODD;
|
||||||
else
|
else
|
||||||
@ -346,8 +326,7 @@ static void ifxmipsasc_set_termios(struct uart_port *port, struct ktermios *new,
|
|||||||
if (iflag & IGNPAR)
|
if (iflag & IGNPAR)
|
||||||
port->ignore_status_mask |= ASCSTATE_FE | ASCSTATE_PE;
|
port->ignore_status_mask |= ASCSTATE_FE | ASCSTATE_PE;
|
||||||
|
|
||||||
if(iflag & IGNBRK)
|
if (iflag & IGNBRK) {
|
||||||
{
|
|
||||||
/*
|
/*
|
||||||
* If we're ignoring parity and break indicators,
|
* If we're ignoring parity and break indicators,
|
||||||
* ignore overruns too (for real raw support).
|
* ignore overruns too (for real raw support).
|
||||||
@ -393,11 +372,9 @@ static void ifxmipsasc_set_termios(struct uart_port *port, struct ktermios *new,
|
|||||||
local_irq_restore(flags);
|
local_irq_restore(flags);
|
||||||
}
|
}
|
||||||
|
|
||||||
static const char*
|
static const char *ifxmipsasc_type(struct uart_port *port)
|
||||||
ifxmipsasc_type(struct uart_port *port)
|
|
||||||
{
|
|
||||||
if(port->type == PORT_IFXMIPSASC)
|
|
||||||
{
|
{
|
||||||
|
if (port->type == PORT_IFXMIPSASC) {
|
||||||
if (port->membase == (void *)IFXMIPS_ASC_BASE_ADDR)
|
if (port->membase == (void *)IFXMIPS_ASC_BASE_ADDR)
|
||||||
return "asc0";
|
return "asc0";
|
||||||
else
|
else
|
||||||
@ -407,29 +384,24 @@ ifxmipsasc_type(struct uart_port *port)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static void ifxmipsasc_release_port(struct uart_port *port)
|
||||||
ifxmipsasc_release_port(struct uart_port *port)
|
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static int ifxmipsasc_request_port(struct uart_port *port)
|
||||||
ifxmipsasc_request_port(struct uart_port *port)
|
|
||||||
{
|
{
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static void ifxmipsasc_config_port(struct uart_port *port, int flags)
|
||||||
ifxmipsasc_config_port(struct uart_port *port, int flags)
|
|
||||||
{
|
|
||||||
if(flags & UART_CONFIG_TYPE)
|
|
||||||
{
|
{
|
||||||
|
if (flags & UART_CONFIG_TYPE) {
|
||||||
port->type = PORT_IFXMIPSASC;
|
port->type = PORT_IFXMIPSASC;
|
||||||
ifxmipsasc_request_port(port);
|
ifxmipsasc_request_port(port);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static int ifxmipsasc_verify_port(struct uart_port *port, struct serial_struct *ser)
|
||||||
ifxmipsasc_verify_port(struct uart_port *port, struct serial_struct *ser)
|
|
||||||
{
|
{
|
||||||
int ret = 0;
|
int ret = 0;
|
||||||
if (ser->type != PORT_UNKNOWN && ser->type != PORT_IFXMIPSASC)
|
if (ser->type != PORT_UNKNOWN && ser->type != PORT_IFXMIPSASC)
|
||||||
@ -441,8 +413,7 @@ ifxmipsasc_verify_port(struct uart_port *port, struct serial_struct *ser)
|
|||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct uart_ops ifxmipsasc_pops =
|
static struct uart_ops ifxmipsasc_pops = {
|
||||||
{
|
|
||||||
.tx_empty = ifxmipsasc_tx_empty,
|
.tx_empty = ifxmipsasc_tx_empty,
|
||||||
.set_mctrl = ifxmipsasc_set_mctrl,
|
.set_mctrl = ifxmipsasc_set_mctrl,
|
||||||
.get_mctrl = ifxmipsasc_get_mctrl,
|
.get_mctrl = ifxmipsasc_get_mctrl,
|
||||||
@ -461,42 +432,39 @@ static struct uart_ops ifxmipsasc_pops =
|
|||||||
.verify_port = ifxmipsasc_verify_port,
|
.verify_port = ifxmipsasc_verify_port,
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct uart_port ifxmipsasc_port[2] =
|
static struct uart_port ifxmipsasc_port[2] = {
|
||||||
{
|
{
|
||||||
{
|
.membase = (void *)IFXMIPS_ASC_BASE_ADDR,
|
||||||
membase: (void *)IFXMIPS_ASC_BASE_ADDR,
|
.mapbase = IFXMIPS_ASC_BASE_ADDR,
|
||||||
mapbase: IFXMIPS_ASC_BASE_ADDR,
|
.iotype = SERIAL_IO_MEM,
|
||||||
iotype: SERIAL_IO_MEM,
|
.irq = IFXMIPSASC_TIR(0),
|
||||||
irq: IFXMIPSASC_TIR(0),
|
.uartclk = 0,
|
||||||
uartclk: 0,
|
.fifosize = 16,
|
||||||
fifosize: 16,
|
.type = PORT_IFXMIPSASC,
|
||||||
type: PORT_IFXMIPSASC,
|
.ops = &ifxmipsasc_pops,
|
||||||
ops: &ifxmipsasc_pops,
|
.flags = ASYNC_BOOT_AUTOCONF,
|
||||||
flags: ASYNC_BOOT_AUTOCONF,
|
.line = 0
|
||||||
line: 0
|
|
||||||
}, {
|
}, {
|
||||||
membase: (void *)(IFXMIPS_ASC_BASE_ADDR + IFXMIPS_ASC_BASE_DIFF),
|
.membase = (void *)(IFXMIPS_ASC_BASE_ADDR + IFXMIPS_ASC_BASE_DIFF),
|
||||||
mapbase: IFXMIPS_ASC_BASE_ADDR + IFXMIPS_ASC_BASE_DIFF,
|
.mapbase = IFXMIPS_ASC_BASE_ADDR + IFXMIPS_ASC_BASE_DIFF,
|
||||||
iotype: SERIAL_IO_MEM,
|
.iotype = SERIAL_IO_MEM,
|
||||||
irq: IFXMIPSASC_TIR(1),
|
.irq = IFXMIPSASC_TIR(1),
|
||||||
uartclk: 0,
|
.uartclk = 0,
|
||||||
fifosize: 16,
|
.fifosize = 16,
|
||||||
type: PORT_IFXMIPSASC,
|
.type = PORT_IFXMIPSASC,
|
||||||
ops: &ifxmipsasc_pops,
|
.ops = &ifxmipsasc_pops,
|
||||||
flags: ASYNC_BOOT_AUTOCONF,
|
.flags = ASYNC_BOOT_AUTOCONF,
|
||||||
line: 1
|
.line = 1
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
|
|
||||||
static void
|
static void ifxmipsasc_console_write(struct console *co, const char *s, u_int count)
|
||||||
ifxmipsasc_console_write(struct console *co, const char *s, u_int count)
|
|
||||||
{
|
{
|
||||||
int port = co->index;
|
int port = co->index;
|
||||||
int i, fifocnt;
|
int i, fifocnt;
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
local_irq_save(flags);
|
local_irq_save(flags);
|
||||||
for(i = 0; i < count; i++)
|
for (i = 0; i < count; i++) {
|
||||||
{
|
|
||||||
do {
|
do {
|
||||||
fifocnt = (ifxmips_r32((u32 *)(IFXMIPS_ASC_BASE_ADDR + (port * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_FSTAT)) & ASCFSTAT_TXFFLMASK)
|
fifocnt = (ifxmips_r32((u32 *)(IFXMIPS_ASC_BASE_ADDR + (port * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_FSTAT)) & ASCFSTAT_TXFFLMASK)
|
||||||
>> ASCFSTAT_TXFFLOFF;
|
>> ASCFSTAT_TXFFLOFF;
|
||||||
@ -505,8 +473,7 @@ ifxmipsasc_console_write(struct console *co, const char *s, u_int count)
|
|||||||
if (s[i] == '\0')
|
if (s[i] == '\0')
|
||||||
break;
|
break;
|
||||||
|
|
||||||
if(s[i] == '\n')
|
if (s[i] == '\n') {
|
||||||
{
|
|
||||||
ifxmips_w32('\r', (u32 *)(IFXMIPS_ASC_BASE_ADDR + (port * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_TBUF));
|
ifxmips_w32('\r', (u32 *)(IFXMIPS_ASC_BASE_ADDR + (port * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_TBUF));
|
||||||
do {
|
do {
|
||||||
fifocnt = (ifxmips_r32((u32 *)(IFXMIPS_ASC_BASE_ADDR + (port * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_FSTAT)) & ASCFSTAT_TXFFLMASK)
|
fifocnt = (ifxmips_r32((u32 *)(IFXMIPS_ASC_BASE_ADDR + (port * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_FSTAT)) & ASCFSTAT_TXFFLMASK)
|
||||||
@ -519,8 +486,7 @@ ifxmipsasc_console_write(struct console *co, const char *s, u_int count)
|
|||||||
local_irq_restore(flags);
|
local_irq_restore(flags);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int __init
|
static int __init ifxmipsasc_console_setup(struct console *co, char *options)
|
||||||
ifxmipsasc_console_setup(struct console *co, char *options)
|
|
||||||
{
|
{
|
||||||
int port = co->index;
|
int port = co->index;
|
||||||
int baud = 115200;
|
int baud = 115200;
|
||||||
@ -537,26 +503,25 @@ ifxmipsasc_console_setup(struct console *co, char *options)
|
|||||||
static struct console ifxmipsasc_console[2] =
|
static struct console ifxmipsasc_console[2] =
|
||||||
{
|
{
|
||||||
{
|
{
|
||||||
name: "ttyS",
|
.name = "ttyS",
|
||||||
write: ifxmipsasc_console_write,
|
.write = ifxmipsasc_console_write,
|
||||||
device: uart_console_device,
|
.device = uart_console_device,
|
||||||
setup: ifxmipsasc_console_setup,
|
.setup = ifxmipsasc_console_setup,
|
||||||
flags: CON_PRINTBUFFER,
|
.flags = CON_PRINTBUFFER,
|
||||||
index: 0,
|
.index = 0,
|
||||||
data: &ifxmipsasc_reg,
|
.data = &ifxmipsasc_reg,
|
||||||
}, {
|
}, {
|
||||||
name: "ttyS",
|
.name = "ttyS",
|
||||||
write: ifxmipsasc_console_write,
|
.write = ifxmipsasc_console_write,
|
||||||
device: uart_console_device,
|
.device = uart_console_device,
|
||||||
setup: ifxmipsasc_console_setup,
|
.setup = ifxmipsasc_console_setup,
|
||||||
flags: CON_PRINTBUFFER,
|
.flags = CON_PRINTBUFFER,
|
||||||
index: 1,
|
.index = 1,
|
||||||
data: &ifxmipsasc_reg,
|
.data = &ifxmipsasc_reg,
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
|
|
||||||
static int __init
|
static int __init ifxmipsasc_console_init(void)
|
||||||
ifxmipsasc_console_init(void)
|
|
||||||
{
|
{
|
||||||
register_console(&ifxmipsasc_console[0]);
|
register_console(&ifxmipsasc_console[0]);
|
||||||
register_console(&ifxmipsasc_console[1]);
|
register_console(&ifxmipsasc_console[1]);
|
||||||
@ -564,8 +529,7 @@ ifxmipsasc_console_init(void)
|
|||||||
}
|
}
|
||||||
console_initcall(ifxmipsasc_console_init);
|
console_initcall(ifxmipsasc_console_init);
|
||||||
|
|
||||||
static struct uart_driver ifxmipsasc_reg =
|
static struct uart_driver ifxmipsasc_reg = {
|
||||||
{
|
|
||||||
.owner = THIS_MODULE,
|
.owner = THIS_MODULE,
|
||||||
.driver_name = "serial",
|
.driver_name = "serial",
|
||||||
.dev_name = "ttyS",
|
.dev_name = "ttyS",
|
||||||
@ -575,8 +539,7 @@ static struct uart_driver ifxmipsasc_reg =
|
|||||||
.cons = &ifxmipsasc_console[1],
|
.cons = &ifxmipsasc_console[1],
|
||||||
};
|
};
|
||||||
|
|
||||||
int __init
|
int __init ifxmipsasc_init(void)
|
||||||
ifxmipsasc_init(void)
|
|
||||||
{
|
{
|
||||||
int ret;
|
int ret;
|
||||||
uart_register_driver(&ifxmipsasc_reg);
|
uart_register_driver(&ifxmipsasc_reg);
|
||||||
@ -585,8 +548,7 @@ ifxmipsasc_init(void)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
void __exit
|
void __exit ifxmipsasc_exit(void)
|
||||||
ifxmipsasc_exit(void)
|
|
||||||
{
|
{
|
||||||
uart_unregister_driver(&ifxmipsasc_reg);
|
uart_unregister_driver(&ifxmipsasc_reg);
|
||||||
}
|
}
|
||||||
|
@ -33,10 +33,9 @@
|
|||||||
#define IOMEM_RESOURCE_END 0xffffffff
|
#define IOMEM_RESOURCE_END 0xffffffff
|
||||||
|
|
||||||
#define IFXMIPS_FLASH_START 0x10000000
|
#define IFXMIPS_FLASH_START 0x10000000
|
||||||
#define IFXMIPS_FLASH_MAX 0x2000000
|
#define IFXMIPS_FLASH_MAX 0x02000000
|
||||||
|
|
||||||
|
/*------------ ASC0/1 */
|
||||||
/*------------ ASC1 */
|
|
||||||
|
|
||||||
#define IFXMIPS_ASC_BASE_ADDR (KSEG1 + 0x1E100400)
|
#define IFXMIPS_ASC_BASE_ADDR (KSEG1 + 0x1E100400)
|
||||||
#define IFXMIPS_ASC_BASE_DIFF (0x1E100C00 - 0x1E100400)
|
#define IFXMIPS_ASC_BASE_DIFF (0x1E100C00 - 0x1E100400)
|
||||||
@ -197,6 +196,8 @@
|
|||||||
|
|
||||||
#define IFXMIPS_ICU_IM1_ISR ((u32*)(IFXMIPS_ICU_BASE_ADDR + 0x0028))
|
#define IFXMIPS_ICU_IM1_ISR ((u32*)(IFXMIPS_ICU_BASE_ADDR + 0x0028))
|
||||||
#define IFXMIPS_ICU_IM2_IER ((u32*)(IFXMIPS_ICU_BASE_ADDR + 0x0058))
|
#define IFXMIPS_ICU_IM2_IER ((u32*)(IFXMIPS_ICU_BASE_ADDR + 0x0058))
|
||||||
|
#define IFXMIPS_ICU_IM3_IER ((u32*)(IFXMIPS_ICU_BASE_ADDR + 0x0080))
|
||||||
|
#define IFXMIPS_ICU_IM4_IER ((u32*)(IFXMIPS_ICU_BASE_ADDR + 0x00A8))
|
||||||
#define IFXMIPS_ICU_IM5_IER ((u32*)(IFXMIPS_ICU_BASE_ADDR + 0x00D0))
|
#define IFXMIPS_ICU_IM5_IER ((u32*)(IFXMIPS_ICU_BASE_ADDR + 0x00D0))
|
||||||
|
|
||||||
#define IFXMIPS_ICU_OFFSET (IFXMIPS_ICU_IM1_ISR - IFXMIPS_ICU_IM0_ISR)
|
#define IFXMIPS_ICU_OFFSET (IFXMIPS_ICU_IM1_ISR - IFXMIPS_ICU_IM0_ISR)
|
||||||
@ -387,7 +388,7 @@
|
|||||||
|
|
||||||
/*------------ MEI */
|
/*------------ MEI */
|
||||||
|
|
||||||
#define IFXMIPS_MEI_BASE_ADDR (0xBE116000)
|
#define IFXMIPS_MEI_BASE_ADDR (KSEG1 + 0x1E116000)
|
||||||
|
|
||||||
#define MEI_DATA_XFR ((u32*)(IFXMIPS_MEI_BASE_ADDR + 0x0000))
|
#define MEI_DATA_XFR ((u32*)(IFXMIPS_MEI_BASE_ADDR + 0x0000))
|
||||||
#define MEI_VERSION ((u32*)(IFXMIPS_MEI_BASE_ADDR + 0x0004))
|
#define MEI_VERSION ((u32*)(IFXMIPS_MEI_BASE_ADDR + 0x0004))
|
||||||
|
@ -57,7 +57,7 @@ enum attr_t{
|
|||||||
#define IFXMIPS_DMA_TX 1
|
#define IFXMIPS_DMA_TX 1
|
||||||
|
|
||||||
typedef struct dma_chan_map {
|
typedef struct dma_chan_map {
|
||||||
char dev_name[15];
|
const char *dev_name;
|
||||||
enum attr_t dir;
|
enum attr_t dir;
|
||||||
int pri;
|
int pri;
|
||||||
int irq;
|
int irq;
|
||||||
@ -75,7 +75,7 @@ typedef struct rx_desc{
|
|||||||
volatile u32 C:1;
|
volatile u32 C:1;
|
||||||
volatile u32 OWN:1;
|
volatile u32 OWN:1;
|
||||||
volatile u32 Data_Pointer;
|
volatile u32 Data_Pointer;
|
||||||
/*fix me:should be 28 bits here, 32 bits just for host simulatiuon purpose*/
|
/* fix me:should be 28 bits here, 32 bits just for host simulation purpose */
|
||||||
}_rx_desc;
|
}_rx_desc;
|
||||||
|
|
||||||
typedef struct tx_desc{
|
typedef struct tx_desc{
|
||||||
@ -86,9 +86,9 @@ typedef struct tx_desc{
|
|||||||
volatile u32 SoP:1;
|
volatile u32 SoP:1;
|
||||||
volatile u32 C:1;
|
volatile u32 C:1;
|
||||||
volatile u32 OWN:1;
|
volatile u32 OWN:1;
|
||||||
volatile u32 Data_Pointer;//fix me:should be 28 bits here
|
volatile u32 Data_Pointer;/* fix me:should be 28 bits here */
|
||||||
}_tx_desc;
|
}_tx_desc;
|
||||||
#else //BIG
|
#else /* BIG */
|
||||||
typedef struct rx_desc{
|
typedef struct rx_desc{
|
||||||
union
|
union
|
||||||
{
|
{
|
||||||
@ -200,3 +200,4 @@ int dma_device_read(struct dma_device_info* info, u8** dataptr, void** opt);
|
|||||||
|
|
||||||
int dma_device_write(struct dma_device_info* info, u8* dataptr, int len, void* opt);
|
int dma_device_write(struct dma_device_info* info, u8* dataptr, int len, void* opt);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
@ -19,7 +19,6 @@
|
|||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
|
||||||
#ifndef _IFXMIPS_GPIO_H_
|
#ifndef _IFXMIPS_GPIO_H_
|
||||||
#define _IFXMIPS_GPIO_H_
|
#define _IFXMIPS_GPIO_H_
|
||||||
|
|
||||||
|
@ -1,3 +1,5 @@
|
|||||||
|
|
||||||
|
grep "/dev/root" /proc/mounts |grep -q nfs && {
|
||||||
echo "- init nfs -"
|
echo "- init nfs -"
|
||||||
exec /sbin/init
|
exec /sbin/init
|
||||||
|
}
|
||||||
|
16
target/linux/ifxmips/nfs/config-2.6.27
Normal file
16
target/linux/ifxmips/nfs/config-2.6.27
Normal file
@ -0,0 +1,16 @@
|
|||||||
|
CONFIG_CRYPTO_ALGAPI=y
|
||||||
|
CONFIG_CRYPTO_BLKCIPHER=y
|
||||||
|
CONFIG_CRYPTO_CBC=y
|
||||||
|
CONFIG_CRYPTO_DES=y
|
||||||
|
CONFIG_CRYPTO_MANAGER=y
|
||||||
|
CONFIG_CRYPTO_MD5=y
|
||||||
|
CONFIG_IP_PNP=y
|
||||||
|
# CONFIG_IP_PNP_BOOTP is not set
|
||||||
|
# CONFIG_IP_PNP_DHCP is not set
|
||||||
|
# CONFIG_IP_PNP_RARP is not set
|
||||||
|
CONFIG_LOCKD=y
|
||||||
|
CONFIG_NFS_FS=y
|
||||||
|
CONFIG_ROOT_NFS=y
|
||||||
|
CONFIG_RPCSEC_GSS_KRB5=y
|
||||||
|
CONFIG_SUNRPC=y
|
||||||
|
CONFIG_SUNRPC_GSS=y
|
@ -0,0 +1,34 @@
|
|||||||
|
--- a/arch/mips/kernel/traps.c
|
||||||
|
+++ b/arch/mips/kernel/traps.c
|
||||||
|
@@ -1484,7 +1484,16 @@ void __cpuinit per_cpu_trap_init(void)
|
||||||
|
*/
|
||||||
|
if (cpu_has_mips_r2) {
|
||||||
|
cp0_compare_irq = (read_c0_intctl() >> 29) & 7;
|
||||||
|
+ if (!cp0_compare_irq)
|
||||||
|
+ cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ;
|
||||||
|
+
|
||||||
|
cp0_perfcount_irq = (read_c0_intctl() >> 26) & 7;
|
||||||
|
+ if (!cp0_perfcount_irq)
|
||||||
|
+ cp0_perfcount_irq = CP0_LEGACY_PERFCNT_IRQ;
|
||||||
|
+
|
||||||
|
+ if (arch_fixup_c0_irqs)
|
||||||
|
+ arch_fixup_c0_irqs();
|
||||||
|
+
|
||||||
|
if (cp0_perfcount_irq == cp0_compare_irq)
|
||||||
|
cp0_perfcount_irq = -1;
|
||||||
|
} else {
|
||||||
|
--- a/include/asm-mips/irq.h
|
||||||
|
+++ b/include/asm-mips/irq.h
|
||||||
|
@@ -156,8 +156,12 @@ extern void free_irqno(unsigned int irq)
|
||||||
|
* IE7. Since R2 their number has to be read from the c0_intctl register.
|
||||||
|
*/
|
||||||
|
#define CP0_LEGACY_COMPARE_IRQ 7
|
||||||
|
+#define CP0_LEGACY_PERFCNT_IRQ 7
|
||||||
|
|
||||||
|
extern int cp0_compare_irq;
|
||||||
|
extern int cp0_perfcount_irq;
|
||||||
|
|
||||||
|
+extern void __weak arch_fixup_c0_irqs(void);
|
||||||
|
+
|
||||||
|
+
|
||||||
|
#endif /* _ASM_IRQ_H */
|
@ -0,0 +1,33 @@
|
|||||||
|
--- a/arch/mips/kernel/cevt-r4k.c
|
||||||
|
+++ b/arch/mips/kernel/cevt-r4k.c
|
||||||
|
@@ -21,6 +21,22 @@
|
||||||
|
|
||||||
|
#ifndef CONFIG_MIPS_MT_SMTC
|
||||||
|
|
||||||
|
+/*
|
||||||
|
+ * Compare interrupt can be routed and latched outside the core,
|
||||||
|
+ * so a single execution hazard barrier may not be enough to give
|
||||||
|
+ * it time to clear as seen in the Cause register. 4 time the
|
||||||
|
+ * pipeline depth seems reasonably conservative, and empirically
|
||||||
|
+ * works better in configurations with high CPU/bus clock ratios.
|
||||||
|
+ */
|
||||||
|
+
|
||||||
|
+#define compare_change_hazard() \
|
||||||
|
+ do { \
|
||||||
|
+ irq_disable_hazard(); \
|
||||||
|
+ irq_disable_hazard(); \
|
||||||
|
+ irq_disable_hazard(); \
|
||||||
|
+ irq_disable_hazard(); \
|
||||||
|
+ } while (0)
|
||||||
|
+
|
||||||
|
static int mips_next_event(unsigned long delta,
|
||||||
|
struct clock_event_device *evt)
|
||||||
|
{
|
||||||
|
@@ -30,6 +46,7 @@ static int mips_next_event(unsigned long
|
||||||
|
cnt = read_c0_count();
|
||||||
|
cnt += delta;
|
||||||
|
write_c0_compare(cnt);
|
||||||
|
+ compare_change_hazard();
|
||||||
|
res = ((int)(read_c0_count() - cnt) > 0) ? -ETIME : 0;
|
||||||
|
return res;
|
||||||
|
}
|
72
target/linux/ifxmips/patches-2.6.27/100-board.patch
Normal file
72
target/linux/ifxmips/patches-2.6.27/100-board.patch
Normal file
@ -0,0 +1,72 @@
|
|||||||
|
--- a/arch/mips/Kconfig
|
||||||
|
+++ b/arch/mips/Kconfig
|
||||||
|
@@ -78,6 +78,23 @@ config MIPS_COBALT
|
||||||
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
||||||
|
select GENERIC_HARDIRQS_NO__DO_IRQ
|
||||||
|
|
||||||
|
+config IFXMIPS
|
||||||
|
+ bool "Infineon Twinpass, Danube, Amazon-SE"
|
||||||
|
+ select DMA_NONCOHERENT
|
||||||
|
+ select IRQ_CPU
|
||||||
|
+ select CEVT_R4K
|
||||||
|
+ select CSRC_R4K
|
||||||
|
+ select SYS_HAS_CPU_MIPS32_R1
|
||||||
|
+ select SYS_HAS_CPU_MIPS32_R2
|
||||||
|
+ select HAVE_STD_PC_SERIAL_PORT
|
||||||
|
+ select SYS_SUPPORTS_BIG_ENDIAN
|
||||||
|
+ select SYS_SUPPORTS_32BIT_KERNEL
|
||||||
|
+ select SYS_SUPPORTS_MULTITHREADING
|
||||||
|
+ select SYS_HAS_EARLY_PRINTK
|
||||||
|
+ select HW_HAS_PCI
|
||||||
|
+ select GENERIC_GPIO
|
||||||
|
+ select SWAP_IO_SPACE
|
||||||
|
+
|
||||||
|
config MACH_DECSTATION
|
||||||
|
bool "DECstations"
|
||||||
|
select BOOT_ELF32
|
||||||
|
@@ -607,6 +624,7 @@ source "arch/mips/sgi-ip27/Kconfig"
|
||||||
|
source "arch/mips/sibyte/Kconfig"
|
||||||
|
source "arch/mips/txx9/Kconfig"
|
||||||
|
source "arch/mips/vr41xx/Kconfig"
|
||||||
|
+source "arch/mips/ifxmips/Kconfig"
|
||||||
|
|
||||||
|
endmenu
|
||||||
|
|
||||||
|
--- a/arch/mips/Makefile
|
||||||
|
+++ b/arch/mips/Makefile
|
||||||
|
@@ -283,6 +283,13 @@ cflags-$(CONFIG_MIPS_COBALT) += -Iinclud
|
||||||
|
load-$(CONFIG_MIPS_COBALT) += 0xffffffff80080000
|
||||||
|
|
||||||
|
#
|
||||||
|
+# Infineon IFXMIPS
|
||||||
|
+#
|
||||||
|
+core-$(CONFIG_IFXMIPS) += arch/mips/ifxmips/
|
||||||
|
+cflags-$(CONFIG_IFXMIPS) += -Iinclude/asm-mips/mach-ifxmips
|
||||||
|
+load-$(CONFIG_IFXMIPS) += 0xffffffff80002000
|
||||||
|
+
|
||||||
|
+#
|
||||||
|
# DECstation family
|
||||||
|
#
|
||||||
|
core-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/
|
||||||
|
--- a/include/asm-mips/bootinfo.h
|
||||||
|
+++ b/include/asm-mips/bootinfo.h
|
||||||
|
@@ -57,6 +57,12 @@
|
||||||
|
#define MACH_MIKROTIK_RB532 0 /* Mikrotik RouterBoard 532 */
|
||||||
|
#define MACH_MIKROTIK_RB532A 1 /* Mikrotik RouterBoard 532A */
|
||||||
|
|
||||||
|
+/*
|
||||||
|
+ * Valid machtype for group IFXMIPS
|
||||||
|
+ */
|
||||||
|
+#define MACH_GROUP_IFXMIPS 29
|
||||||
|
+#define MACH_INFINEON_IFXMIPS 0
|
||||||
|
+
|
||||||
|
#define CL_SIZE COMMAND_LINE_SIZE
|
||||||
|
|
||||||
|
extern char *system_type;
|
||||||
|
--- a/arch/mips/pci/Makefile
|
||||||
|
+++ b/arch/mips/pci/Makefile
|
||||||
|
@@ -51,3 +51,4 @@ obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc
|
||||||
|
obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o
|
||||||
|
obj-$(CONFIG_WR_PPMC) += fixup-wrppmc.o
|
||||||
|
obj-$(CONFIG_MIKROTIK_RB532) += pci-rc32434.o ops-rc32434.o fixup-rc32434.o
|
||||||
|
+obj-$(CONFIG_IFXMIPS) += pci-ifxmips.o ops-ifxmips.o
|
152
target/linux/ifxmips/patches-2.6.27/110-drivers.patch
Normal file
152
target/linux/ifxmips/patches-2.6.27/110-drivers.patch
Normal file
@ -0,0 +1,152 @@
|
|||||||
|
--- a/drivers/char/Makefile
|
||||||
|
+++ b/drivers/char/Makefile
|
||||||
|
@@ -112,6 +112,10 @@ obj-$(CONFIG_PS3_FLASH) += ps3flash.o
|
||||||
|
obj-$(CONFIG_JS_RTC) += js-rtc.o
|
||||||
|
js-rtc-y = rtc.o
|
||||||
|
|
||||||
|
+obj-$(CONFIG_IFXMIPS_SSC) += ifxmips_ssc.o
|
||||||
|
+obj-$(CONFIG_IFXMIPS_EEPROM) += ifxmips_eeprom.o
|
||||||
|
+obj-$(CONFIG_IFXMIPS_MEI) += ifxmips_mei_core.o
|
||||||
|
+
|
||||||
|
# Files generated that shall be removed upon make clean
|
||||||
|
clean-files := consolemap_deftbl.c defkeymap.c
|
||||||
|
|
||||||
|
--- a/drivers/mtd/maps/Makefile
|
||||||
|
+++ b/drivers/mtd/maps/Makefile
|
||||||
|
@@ -56,6 +56,7 @@ obj-$(CONFIG_MTD_WALNUT) += walnu
|
||||||
|
obj-$(CONFIG_MTD_H720X) += h720x-flash.o
|
||||||
|
obj-$(CONFIG_MTD_SBC8240) += sbc8240.o
|
||||||
|
obj-$(CONFIG_MTD_NOR_TOTO) += omap-toto-flash.o
|
||||||
|
+obj-$(CONFIG_MTD_IFXMIPS) += ifxmips.o
|
||||||
|
obj-$(CONFIG_MTD_IXP4XX) += ixp4xx.o
|
||||||
|
obj-$(CONFIG_MTD_IXP2000) += ixp2000.o
|
||||||
|
obj-$(CONFIG_MTD_WRSBC8260) += wr_sbc82xx_flash.o
|
||||||
|
--- a/drivers/net/Kconfig
|
||||||
|
+++ b/drivers/net/Kconfig
|
||||||
|
@@ -343,6 +343,12 @@ config MACB
|
||||||
|
|
||||||
|
source "drivers/net/arm/Kconfig"
|
||||||
|
|
||||||
|
+config IFXMIPS_MII0
|
||||||
|
+ tristate "Infineon IFXMips eth0 driver"
|
||||||
|
+ depends on IFXMIPS
|
||||||
|
+ help
|
||||||
|
+ Support for the MII0 inside the IFXMips SOC
|
||||||
|
+
|
||||||
|
config AX88796
|
||||||
|
tristate "ASIX AX88796 NE2000 clone support"
|
||||||
|
depends on ARM || MIPS || SUPERH
|
||||||
|
--- a/drivers/serial/Kconfig
|
||||||
|
+++ b/drivers/serial/Kconfig
|
||||||
|
@@ -1353,6 +1353,14 @@ config SERIAL_OF_PLATFORM
|
||||||
|
Currently, only 8250 compatible ports are supported, but
|
||||||
|
others can easily be added.
|
||||||
|
|
||||||
|
+config SERIAL_IFXMIPS
|
||||||
|
+ bool "IFXMips serial driver"
|
||||||
|
+ depends on IFXMIPS
|
||||||
|
+ select SERIAL_CORE
|
||||||
|
+ select SERIAL_CORE_CONSOLE
|
||||||
|
+ help
|
||||||
|
+ Driver for the ifxmipss built in ASC hardware
|
||||||
|
+
|
||||||
|
config SERIAL_QE
|
||||||
|
tristate "Freescale QUICC Engine serial port support"
|
||||||
|
depends on QUICC_ENGINE
|
||||||
|
--- a/drivers/serial/Makefile
|
||||||
|
+++ b/drivers/serial/Makefile
|
||||||
|
@@ -69,3 +69,4 @@ obj-$(CONFIG_SERIAL_OF_PLATFORM) += of_s
|
||||||
|
obj-$(CONFIG_SERIAL_KS8695) += serial_ks8695.o
|
||||||
|
obj-$(CONFIG_KGDB_SERIAL_CONSOLE) += kgdboc.o
|
||||||
|
obj-$(CONFIG_SERIAL_QE) += ucc_uart.o
|
||||||
|
+obj-$(CONFIG_SERIAL_IFXMIPS) += ifxmips_asc.o
|
||||||
|
--- a/drivers/watchdog/Makefile
|
||||||
|
+++ b/drivers/watchdog/Makefile
|
||||||
|
@@ -102,6 +102,7 @@ obj-$(CONFIG_WDT_RM9K_GPI) += rm9k_wdt.o
|
||||||
|
obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o
|
||||||
|
obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
|
||||||
|
obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
|
||||||
|
+obj-$(CONFIG_IFXMIPS_WDT) += ifxmips_wdt.o
|
||||||
|
|
||||||
|
# PARISC Architecture
|
||||||
|
|
||||||
|
--- a/drivers/net/Makefile
|
||||||
|
+++ b/drivers/net/Makefile
|
||||||
|
@@ -256,4 +256,4 @@ obj-$(CONFIG_NETXEN_NIC) += netxen/
|
||||||
|
obj-$(CONFIG_NIU) += niu.o
|
||||||
|
obj-$(CONFIG_VIRTIO_NET) += virtio_net.o
|
||||||
|
obj-$(CONFIG_SFC) += sfc/
|
||||||
|
-
|
||||||
|
+obj-$(CONFIG_IFXMIPS_MII0) += ifxmips_mii0.o
|
||||||
|
--- a/drivers/crypto/Kconfig
|
||||||
|
+++ b/drivers/crypto/Kconfig
|
||||||
|
@@ -9,6 +9,9 @@ menuconfig CRYPTO_HW
|
||||||
|
If you say N, all options in this submenu will be skipped and disabled.
|
||||||
|
|
||||||
|
if CRYPTO_HW
|
||||||
|
+config CRYPTO_DEV_IFXMIPS
|
||||||
|
+ tristate "Support for IFXMIPS Data Encryption Unit"
|
||||||
|
+ depends on IFXMIPS
|
||||||
|
|
||||||
|
config CRYPTO_DEV_PADLOCK
|
||||||
|
tristate "Support for VIA PadLock ACE"
|
||||||
|
--- a/drivers/crypto/Makefile
|
||||||
|
+++ b/drivers/crypto/Makefile
|
||||||
|
@@ -4,3 +4,4 @@ obj-$(CONFIG_CRYPTO_DEV_GEODE) += geode-
|
||||||
|
obj-$(CONFIG_CRYPTO_DEV_HIFN_795X) += hifn_795x.o
|
||||||
|
obj-$(CONFIG_CRYPTO_DEV_TALITOS) += talitos.o
|
||||||
|
obj-$(CONFIG_CRYPTO_DEV_IXP4XX) += ixp4xx_crypto.o
|
||||||
|
+obj-$(CONFIG_CRYPTO_DEV_IFXMIPS) += ifxdeu-aes.o ifxdeu-des.o ifxdeu-dma.o ifxdeu-generic.o ifxdeu-md5.o ifxdeu-sha1.o
|
||||||
|
--- a/drivers/usb/host/Kconfig
|
||||||
|
+++ b/drivers/usb/host/Kconfig
|
||||||
|
@@ -305,3 +305,10 @@ config SUPERH_ON_CHIP_R8A66597
|
||||||
|
help
|
||||||
|
This driver enables support for the on-chip R8A66597 in the
|
||||||
|
SH7366 and SH7723 processors.
|
||||||
|
+
|
||||||
|
+config USB_DWC_HCD
|
||||||
|
+ tristate "IFXMIPS USB Host Controller Driver"
|
||||||
|
+ depends on USB && IFXMIPS
|
||||||
|
+ default y
|
||||||
|
+ help
|
||||||
|
+ Danube USB Host Controller
|
||||||
|
--- a/drivers/leds/Kconfig
|
||||||
|
+++ b/drivers/leds/Kconfig
|
||||||
|
@@ -169,6 +169,12 @@ config LEDS_PCA955X
|
||||||
|
LED driver chips accessed via the I2C bus. Supported
|
||||||
|
devices include PCA9550, PCA9551, PCA9552, and PCA9553.
|
||||||
|
|
||||||
|
+config LEDS_IFXMIPS
|
||||||
|
+ tristate "LED Support for IFXMIPS LEDs"
|
||||||
|
+ depends on LEDS_CLASS && IFXMIPS
|
||||||
|
+ help
|
||||||
|
+ This option enables support for the CM-X270 LEDs.
|
||||||
|
+
|
||||||
|
comment "LED Triggers"
|
||||||
|
|
||||||
|
config LEDS_TRIGGERS
|
||||||
|
--- a/drivers/leds/Makefile
|
||||||
|
+++ b/drivers/leds/Makefile
|
||||||
|
@@ -24,6 +24,7 @@ obj-$(CONFIG_LEDS_CLEVO_MAIL) += leds-c
|
||||||
|
obj-$(CONFIG_LEDS_HP6XX) += leds-hp6xx.o
|
||||||
|
obj-$(CONFIG_LEDS_FSG) += leds-fsg.o
|
||||||
|
obj-$(CONFIG_LEDS_PCA955X) += leds-pca955x.o
|
||||||
|
+obj-$(CONFIG_LEDS_IFXMIPS) += leds-ifxmips.o
|
||||||
|
|
||||||
|
# LED Triggers
|
||||||
|
obj-$(CONFIG_LEDS_TRIGGER_TIMER) += ledtrig-timer.o
|
||||||
|
--- a/drivers/watchdog/Kconfig
|
||||||
|
+++ b/drivers/watchdog/Kconfig
|
||||||
|
@@ -704,6 +704,12 @@ config TXX9_WDT
|
||||||
|
help
|
||||||
|
Hardware driver for the built-in watchdog timer on TXx9 MIPS SoCs.
|
||||||
|
|
||||||
|
+config IFXMIPS_WDT
|
||||||
|
+ bool "IFXMips watchdog"
|
||||||
|
+ depends on IFXMIPS
|
||||||
|
+ help
|
||||||
|
+ Hardware driver for the IFXMIPS Watchdog Timer.
|
||||||
|
+
|
||||||
|
# PARISC Architecture
|
||||||
|
|
||||||
|
# POWERPC Architecture
|
13
target/linux/ifxmips/patches-2.6.27/160-cfi-swap.patch
Normal file
13
target/linux/ifxmips/patches-2.6.27/160-cfi-swap.patch
Normal file
@ -0,0 +1,13 @@
|
|||||||
|
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
|
||||||
|
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
|
||||||
|
@@ -1025,7 +1025,9 @@ static int __xipram do_write_oneword(str
|
||||||
|
int retry_cnt = 0;
|
||||||
|
|
||||||
|
adr += chip->start;
|
||||||
|
-
|
||||||
|
+#ifdef CONFIG_IFXMIPS
|
||||||
|
+ adr ^= 2;
|
||||||
|
+#endif
|
||||||
|
spin_lock(chip->mutex);
|
||||||
|
ret = get_chip(map, chip, adr, FL_WRITING);
|
||||||
|
if (ret) {
|
11
target/linux/ifxmips/patches-2.6.27/170-dma_hack.patch
Normal file
11
target/linux/ifxmips/patches-2.6.27/170-dma_hack.patch
Normal file
@ -0,0 +1,11 @@
|
|||||||
|
--- a/arch/mips/mm/cache.c
|
||||||
|
+++ b/arch/mips/mm/cache.c
|
||||||
|
@@ -51,6 +51,8 @@ void (*_dma_cache_wback)(unsigned long s
|
||||||
|
void (*_dma_cache_inv)(unsigned long start, unsigned long size);
|
||||||
|
|
||||||
|
EXPORT_SYMBOL(_dma_cache_wback_inv);
|
||||||
|
+EXPORT_SYMBOL(_dma_cache_wback);
|
||||||
|
+EXPORT_SYMBOL(_dma_cache_inv);
|
||||||
|
|
||||||
|
#endif /* CONFIG_DMA_NONCOHERENT */
|
||||||
|
|
12
target/linux/ifxmips/patches-2.6.27/200-genirq_fix.patch
Normal file
12
target/linux/ifxmips/patches-2.6.27/200-genirq_fix.patch
Normal file
@ -0,0 +1,12 @@
|
|||||||
|
--- a/kernel/irq/chip.c
|
||||||
|
+++ b/kernel/irq/chip.c
|
||||||
|
@@ -526,6 +526,9 @@ handle_percpu_irq(unsigned int irq, stru
|
||||||
|
|
||||||
|
kstat_this_cpu.irqs[irq]++;
|
||||||
|
|
||||||
|
+ if (unlikely(!desc->action || (desc->status & IRQ_DISABLED)))
|
||||||
|
+ return;
|
||||||
|
+
|
||||||
|
if (desc->chip->ack)
|
||||||
|
desc->chip->ack(irq);
|
||||||
|
|
34
target/linux/ifxmips/patches/000-mips-bad-intctl.patch
Normal file
34
target/linux/ifxmips/patches/000-mips-bad-intctl.patch
Normal file
@ -0,0 +1,34 @@
|
|||||||
|
--- a/arch/mips/kernel/traps.c
|
||||||
|
+++ b/arch/mips/kernel/traps.c
|
||||||
|
@@ -1464,7 +1464,16 @@ void __cpuinit per_cpu_trap_init(void)
|
||||||
|
*/
|
||||||
|
if (cpu_has_mips_r2) {
|
||||||
|
cp0_compare_irq = (read_c0_intctl() >> 29) & 7;
|
||||||
|
+ if (!cp0_compare_irq)
|
||||||
|
+ cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ;
|
||||||
|
+
|
||||||
|
cp0_perfcount_irq = (read_c0_intctl() >> 26) & 7;
|
||||||
|
+ if (!cp0_perfcount_irq)
|
||||||
|
+ cp0_perfcount_irq = CP0_LEGACY_PERFCNT_IRQ;
|
||||||
|
+
|
||||||
|
+ if (arch_fixup_c0_irqs)
|
||||||
|
+ arch_fixup_c0_irqs();
|
||||||
|
+
|
||||||
|
if (cp0_perfcount_irq == cp0_compare_irq)
|
||||||
|
cp0_perfcount_irq = -1;
|
||||||
|
} else {
|
||||||
|
--- a/include/asm-mips/irq.h
|
||||||
|
+++ b/include/asm-mips/irq.h
|
||||||
|
@@ -156,8 +156,12 @@ extern void free_irqno(unsigned int irq)
|
||||||
|
* IE7. Since R2 their number has to be read from the c0_intctl register.
|
||||||
|
*/
|
||||||
|
#define CP0_LEGACY_COMPARE_IRQ 7
|
||||||
|
+#define CP0_LEGACY_PERFCNT_IRQ 7
|
||||||
|
|
||||||
|
extern int cp0_compare_irq;
|
||||||
|
extern int cp0_perfcount_irq;
|
||||||
|
|
||||||
|
+extern void __weak arch_fixup_c0_irqs(void);
|
||||||
|
+
|
||||||
|
+
|
||||||
|
#endif /* _ASM_IRQ_H */
|
@ -0,0 +1,65 @@
|
|||||||
|
--- a/arch/mips/kernel/cevt-r4k.c
|
||||||
|
+++ b/arch/mips/kernel/cevt-r4k.c
|
||||||
|
@@ -13,6 +13,22 @@
|
||||||
|
#include <asm/smtc_ipi.h>
|
||||||
|
#include <asm/time.h>
|
||||||
|
|
||||||
|
+/*
|
||||||
|
+ * Compare interrupt can be routed and latched outside the core,
|
||||||
|
+ * so a single execution hazard barrier may not be enough to give
|
||||||
|
+ * it time to clear as seen in the Cause register. 4 time the
|
||||||
|
+ * pipeline depth seems reasonably conservative, and empirically
|
||||||
|
+ * works better in configurations with high CPU/bus clock ratios.
|
||||||
|
+ */
|
||||||
|
+
|
||||||
|
+#define compare_change_hazard() \
|
||||||
|
+ do { \
|
||||||
|
+ irq_disable_hazard(); \
|
||||||
|
+ irq_disable_hazard(); \
|
||||||
|
+ irq_disable_hazard(); \
|
||||||
|
+ irq_disable_hazard(); \
|
||||||
|
+ } while (0)
|
||||||
|
+
|
||||||
|
static int mips_next_event(unsigned long delta,
|
||||||
|
struct clock_event_device *evt)
|
||||||
|
{
|
||||||
|
@@ -28,6 +44,7 @@ static int mips_next_event(unsigned long
|
||||||
|
cnt = read_c0_count();
|
||||||
|
cnt += delta;
|
||||||
|
write_c0_compare(cnt);
|
||||||
|
+ compare_change_hazard();
|
||||||
|
res = ((int)(read_c0_count() - cnt) > 0) ? -ETIME : 0;
|
||||||
|
#ifdef CONFIG_MIPS_MT_SMTC
|
||||||
|
evpe(vpflags);
|
||||||
|
@@ -187,7 +204,7 @@ static int c0_compare_int_usable(void)
|
||||||
|
*/
|
||||||
|
if (c0_compare_int_pending()) {
|
||||||
|
write_c0_compare(read_c0_count());
|
||||||
|
- irq_disable_hazard();
|
||||||
|
+ compare_change_hazard();
|
||||||
|
if (c0_compare_int_pending())
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
@@ -196,7 +213,7 @@ static int c0_compare_int_usable(void)
|
||||||
|
cnt = read_c0_count();
|
||||||
|
cnt += delta;
|
||||||
|
write_c0_compare(cnt);
|
||||||
|
- irq_disable_hazard();
|
||||||
|
+ compare_change_hazard();
|
||||||
|
if ((int)(read_c0_count() - cnt) < 0)
|
||||||
|
break;
|
||||||
|
/* increase delta if the timer was already expired */
|
||||||
|
@@ -205,11 +222,12 @@ static int c0_compare_int_usable(void)
|
||||||
|
while ((int)(read_c0_count() - cnt) <= 0)
|
||||||
|
; /* Wait for expiry */
|
||||||
|
|
||||||
|
+ compare_change_hazard();
|
||||||
|
if (!c0_compare_int_pending())
|
||||||
|
return 0;
|
||||||
|
|
||||||
|
write_c0_compare(read_c0_count());
|
||||||
|
- irq_disable_hazard();
|
||||||
|
+ compare_change_hazard();
|
||||||
|
if (c0_compare_int_pending())
|
||||||
|
return 0;
|
||||||
|
|
@ -1,6 +1,6 @@
|
|||||||
--- a/arch/mips/Kconfig
|
--- a/arch/mips/Kconfig
|
||||||
+++ b/arch/mips/Kconfig
|
+++ b/arch/mips/Kconfig
|
||||||
@@ -78,6 +78,21 @@ config MIPS_COBALT
|
@@ -78,6 +78,23 @@ config MIPS_COBALT
|
||||||
select SYS_SUPPORTS_LITTLE_ENDIAN
|
select SYS_SUPPORTS_LITTLE_ENDIAN
|
||||||
select GENERIC_HARDIRQS_NO__DO_IRQ
|
select GENERIC_HARDIRQS_NO__DO_IRQ
|
||||||
|
|
||||||
@ -11,9 +11,11 @@
|
|||||||
+ select CEVT_R4K
|
+ select CEVT_R4K
|
||||||
+ select CSRC_R4K
|
+ select CSRC_R4K
|
||||||
+ select SYS_HAS_CPU_MIPS32_R1
|
+ select SYS_HAS_CPU_MIPS32_R1
|
||||||
|
+ select SYS_HAS_CPU_MIPS32_R2
|
||||||
+ select HAVE_STD_PC_SERIAL_PORT
|
+ select HAVE_STD_PC_SERIAL_PORT
|
||||||
+ select SYS_SUPPORTS_BIG_ENDIAN
|
+ select SYS_SUPPORTS_BIG_ENDIAN
|
||||||
+ select SYS_SUPPORTS_32BIT_KERNEL
|
+ select SYS_SUPPORTS_32BIT_KERNEL
|
||||||
|
+ select SYS_SUPPORTS_MULTITHREADING
|
||||||
+ select SYS_HAS_EARLY_PRINTK
|
+ select SYS_HAS_EARLY_PRINTK
|
||||||
+ select HW_HAS_PCI
|
+ select HW_HAS_PCI
|
||||||
+ select GENERIC_GPIO
|
+ select GENERIC_GPIO
|
||||||
@ -22,7 +24,7 @@
|
|||||||
config MACH_DECSTATION
|
config MACH_DECSTATION
|
||||||
bool "DECstations"
|
bool "DECstations"
|
||||||
select BOOT_ELF32
|
select BOOT_ELF32
|
||||||
@@ -697,6 +712,7 @@ source "arch/mips/sibyte/Kconfig"
|
@@ -697,6 +714,7 @@ source "arch/mips/sibyte/Kconfig"
|
||||||
source "arch/mips/tx4927/Kconfig"
|
source "arch/mips/tx4927/Kconfig"
|
||||||
source "arch/mips/tx4938/Kconfig"
|
source "arch/mips/tx4938/Kconfig"
|
||||||
source "arch/mips/vr41xx/Kconfig"
|
source "arch/mips/vr41xx/Kconfig"
|
||||||
@ -61,16 +63,6 @@
|
|||||||
#define CL_SIZE COMMAND_LINE_SIZE
|
#define CL_SIZE COMMAND_LINE_SIZE
|
||||||
|
|
||||||
extern char *system_type;
|
extern char *system_type;
|
||||||
--- a/arch/mips/kernel/traps.c
|
|
||||||
+++ b/arch/mips/kernel/traps.c
|
|
||||||
@@ -1464,6 +1464,7 @@ void __cpuinit per_cpu_trap_init(void)
|
|
||||||
*/
|
|
||||||
if (cpu_has_mips_r2) {
|
|
||||||
cp0_compare_irq = (read_c0_intctl() >> 29) & 7;
|
|
||||||
+ cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ;
|
|
||||||
cp0_perfcount_irq = (read_c0_intctl() >> 26) & 7;
|
|
||||||
if (cp0_perfcount_irq == cp0_compare_irq)
|
|
||||||
cp0_perfcount_irq = -1;
|
|
||||||
--- a/arch/mips/pci/Makefile
|
--- a/arch/mips/pci/Makefile
|
||||||
+++ b/arch/mips/pci/Makefile
|
+++ b/arch/mips/pci/Makefile
|
||||||
@@ -48,3 +48,4 @@ obj-$(CONFIG_TOSHIBA_RBTX4938) += fixup-
|
@@ -48,3 +48,4 @@ obj-$(CONFIG_TOSHIBA_RBTX4938) += fixup-
|
||||||
|
@ -1,88 +0,0 @@
|
|||||||
Makefile
|
|
||||||
base-files/etc/config/network
|
|
||||||
config-2.6.23
|
|
||||||
files/arch/mips/danube/Kconfig
|
|
||||||
files/arch/mips/danube/Makefile
|
|
||||||
files/arch/mips/danube/built-in.o
|
|
||||||
files/arch/mips/danube/dma-core.c
|
|
||||||
files/arch/mips/danube/dma-core.h
|
|
||||||
files/arch/mips/danube/dma-core.o
|
|
||||||
files/arch/mips/danube/interrupt.c
|
|
||||||
files/arch/mips/danube/interrupt.o
|
|
||||||
files/arch/mips/danube/kgdb_serial.c
|
|
||||||
files/arch/mips/danube/pci.c
|
|
||||||
files/arch/mips/danube/prom.c
|
|
||||||
files/arch/mips/danube/prom.o
|
|
||||||
files/arch/mips/danube/reset.c
|
|
||||||
files/arch/mips/danube/reset.o
|
|
||||||
files/arch/mips/danube/setup.c
|
|
||||||
files/arch/mips/danube/setup.o
|
|
||||||
files/drivers/mtd/maps/danube.c
|
|
||||||
files/drivers/serial/danube_asc.c
|
|
||||||
files/drivers/serial/danube_asc.c~
|
|
||||||
files/drivers/serial/danube_asc.o
|
|
||||||
files/include/asm-mips/danube/adm6996.h
|
|
||||||
files/include/asm-mips/danube/atm_mib.h
|
|
||||||
files/include/asm-mips/danube/danube.h
|
|
||||||
files/include/asm-mips/danube/danube_bcu.h
|
|
||||||
files/include/asm-mips/danube/danube_cgu.h
|
|
||||||
files/include/asm-mips/danube/danube_deu.h
|
|
||||||
files/include/asm-mips/danube/danube_deu_structs.h
|
|
||||||
files/include/asm-mips/danube/danube_dma.h
|
|
||||||
files/include/asm-mips/danube/danube_eth2.h
|
|
||||||
files/include/asm-mips/danube/danube_eth2_fw.h
|
|
||||||
files/include/asm-mips/danube/danube_eth2_fw_with_dplus.h
|
|
||||||
files/include/asm-mips/danube/danube_eth2_fw_with_dplus_sb.h
|
|
||||||
files/include/asm-mips/danube/danube_eth_d2.h
|
|
||||||
files/include/asm-mips/danube/danube_eth_fw_d2.h
|
|
||||||
files/include/asm-mips/danube/danube_gpio.h
|
|
||||||
files/include/asm-mips/danube/danube_gptu.h
|
|
||||||
files/include/asm-mips/danube/danube_icu.h
|
|
||||||
files/include/asm-mips/danube/danube_led.h
|
|
||||||
files/include/asm-mips/danube/danube_mei.h
|
|
||||||
files/include/asm-mips/danube/danube_mei_app.h
|
|
||||||
files/include/asm-mips/danube/danube_mei_app_ioctl.h
|
|
||||||
files/include/asm-mips/danube/danube_mei_bsp.h
|
|
||||||
files/include/asm-mips/danube/danube_mei_ioctl.h
|
|
||||||
files/include/asm-mips/danube/danube_mei_linux.h
|
|
||||||
files/include/asm-mips/danube/danube_misc.h
|
|
||||||
files/include/asm-mips/danube/danube_pmu.h
|
|
||||||
files/include/asm-mips/danube/danube_ppa_api.h
|
|
||||||
files/include/asm-mips/danube/danube_ppa_eth_fw_d2.h
|
|
||||||
files/include/asm-mips/danube/danube_ppa_eth_fw_d3.h
|
|
||||||
files/include/asm-mips/danube/danube_ppa_hook.h
|
|
||||||
files/include/asm-mips/danube/danube_ppa_ppe_d3_hal.h
|
|
||||||
files/include/asm-mips/danube/danube_ppa_ppe_hal.h
|
|
||||||
files/include/asm-mips/danube/danube_ppa_stack_al.h
|
|
||||||
files/include/asm-mips/danube/danube_ppe.h
|
|
||||||
files/include/asm-mips/danube/danube_ppe_fw.h
|
|
||||||
files/include/asm-mips/danube/danube_ppe_fw_fix_for_pci.h
|
|
||||||
files/include/asm-mips/danube/danube_rcu.h
|
|
||||||
files/include/asm-mips/danube/danube_sdio_controller.h
|
|
||||||
files/include/asm-mips/danube/danube_sdio_controller_registers.h
|
|
||||||
files/include/asm-mips/danube/danube_ssc.h
|
|
||||||
files/include/asm-mips/danube/danube_sw.h
|
|
||||||
files/include/asm-mips/danube/danube_wdt.h
|
|
||||||
files/include/asm-mips/danube/danube_ws.h
|
|
||||||
files/include/asm-mips/danube/emulation.h
|
|
||||||
files/include/asm-mips/danube/ifx_mps.h
|
|
||||||
files/include/asm-mips/danube/ifx_peripheral_definitions.h
|
|
||||||
files/include/asm-mips/danube/ifx_sd_card.h
|
|
||||||
files/include/asm-mips/danube/ifx_serial.h
|
|
||||||
files/include/asm-mips/danube/ifx_ssc.h
|
|
||||||
files/include/asm-mips/danube/ifx_ssc_defines.h
|
|
||||||
files/include/asm-mips/danube/ifx_types.h
|
|
||||||
files/include/asm-mips/danube/infineon_sdio.h
|
|
||||||
files/include/asm-mips/danube/infineon_sdio_card.h
|
|
||||||
files/include/asm-mips/danube/infineon_sdio_cmds.h
|
|
||||||
files/include/asm-mips/danube/infineon_sdio_controller.h
|
|
||||||
files/include/asm-mips/danube/irq.h
|
|
||||||
files/include/asm-mips/danube/memcopy.h
|
|
||||||
files/include/asm-mips/danube/mps.h
|
|
||||||
files/include/asm-mips/danube/port.h
|
|
||||||
files/include/asm-mips/danube/ppe.h
|
|
||||||
files/include/asm-mips/danube/serial.h
|
|
||||||
files/include/asm-mips/mach-danube/irq.h
|
|
||||||
image/Makefile
|
|
||||||
patches/100-board.patch
|
|
||||||
patches/110-drivers.patch
|
|
Loading…
Reference in New Issue
Block a user