mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2025-04-21 12:27:27 +03:00
lots of ifxmips cleanups
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@11596 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
@@ -2,24 +2,10 @@
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menu "IFXMips built-in"
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config IFXMIPS_ASC_UART
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bool "IFXMips asc uart"
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select SERIAL_CORE
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select SERIAL_CORE_CONSOLE
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default y
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config MTD_IFXMIPS
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bool "IFXMips flash map"
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default y
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config IFXMIPS_WDT
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bool "IFXMips watchdog"
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default y
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config IFXMIPS_LED
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bool "IFXMips led"
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default y
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config IFXMIPS_SSC
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bool "IFXMips ssc"
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default y
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@@ -32,7 +32,7 @@
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#include <asm/io.h>
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#include <asm/ifxmips/ifxmips.h>
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#define MAX_IFXMIPS_DEVS 7
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#define MAX_IFXMIPS_DEVS 9
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#define BOARD_DANUBE "Danube"
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#define BOARD_DANUBE_CHIPID 0x10129083
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@@ -79,6 +79,24 @@ ifxmips_wdt[] =
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},
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};
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static struct platform_device
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ifxmips_asc0[] =
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{
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{
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.id = 0,
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.name = "ifxmips_asc",
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},
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};
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static struct platform_device
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ifxmips_asc1[] =
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{
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{
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.id = 1,
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.name = "ifxmips_asc",
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},
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};
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static struct physmap_flash_data
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ifxmips_mtd_data = {
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.width = 2,
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@@ -155,6 +173,8 @@ ifxmips_init_devices(void)
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ifxmips_devs[dev++] = ifxmips_mii;
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ifxmips_devs[dev++] = ifxmips_mtd;
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ifxmips_devs[dev++] = ifxmips_wdt;
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//ifxmips_devs[dev++] = ifxmips_asc0;
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ifxmips_devs[dev++] = ifxmips_asc1;
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#ifdef CONFIG_GPIO_DEVICE
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ifxmips_devs[dev++] = ifxmips_gpio_dev;
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#endif
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@@ -413,3 +413,19 @@ cgu_get_clockout(int clkout)
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}
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return 0;
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}
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void cgu_setup_pci_clk(int external_clock)
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{
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//set clock to 33Mhz
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ifxmips_w32(ifxmips_r32(IFXMIPS_CGU_IFCCR) & ~0xf00000, IFXMIPS_CGU_IFCCR);
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ifxmips_w32(ifxmips_r32(IFXMIPS_CGU_IFCCR) | 0x800000, IFXMIPS_CGU_IFCCR);
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// internal or external clock
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if(external_clock)
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{
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ifxmips_w32(ifxmips_r32(IFXMIPS_CGU_IFCCR) & ~ (1 << 16), IFXMIPS_CGU_IFCCR);
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ifxmips_w32((1 << 30), IFXMIPS_CGU_PCICR);
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} else {
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ifxmips_w32(ifxmips_r32(IFXMIPS_CGU_IFCCR) | (1 << 16), IFXMIPS_CGU_IFCCR);
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ifxmips_w32((1 << 31) | (1 << 30), IFXMIPS_CGU_PCICR);
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}
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}
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@@ -125,8 +125,7 @@ prom_init(void)
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memsize -= prom_cp1_size;
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prom_cp1_base = (unsigned int*)(0xA0000000 + (memsize * 1024 * 1024));
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prom_printf(KERN_INFO "Using %dMB Ram and reserving %dMB for cp1\n",
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memsize, prom_cp1_size);
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prom_printf("Using %dMB Ram and reserving %dMB for cp1\n", memsize, prom_cp1_size);
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memsize *= 1024 * 1024;
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if(!*arcs_cmdline)
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@@ -6,6 +6,7 @@
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#include <linux/mm.h>
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#include <asm/ifxmips/ifxmips.h>
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#include <asm/ifxmips/ifxmips_irq.h>
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#include <asm/ifxmips/ifxmips_cgu.h>
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#include <asm/addrspace.h>
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#include <linux/vmalloc.h>
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@@ -17,26 +18,30 @@
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extern int ifxmips_pci_read_config_dword(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
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extern int ifxmips_pci_write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
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struct pci_ops ifxmips_pci_ops = {
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struct pci_ops ifxmips_pci_ops =
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{
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.read = ifxmips_pci_read_config_dword,
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.write = ifxmips_pci_write_config_dword
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};
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static struct resource pci_io_resource = {
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static struct resource pci_io_resource =
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{
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.name = "io pci IO space",
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.start = IFXMIPS_PCI_IO_BASE,
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.end = IFXMIPS_PCI_IO_BASE + IFXMIPS_PCI_IO_SIZE - 1,
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.flags = IORESOURCE_IO
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};
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static struct resource pci_mem_resource = {
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static struct resource pci_mem_resource =
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{
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.name = "ext pci memory space",
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.start = IFXMIPS_PCI_MEM_BASE,
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.end = IFXMIPS_PCI_MEM_BASE + IFXMIPS_PCI_MEM_SIZE - 1,
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.flags = IORESOURCE_MEM
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};
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static struct pci_controller ifxmips_pci_controller = {
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static struct pci_controller ifxmips_pci_controller =
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{
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.pci_ops = &ifxmips_pci_ops,
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.mem_resource = &pci_mem_resource,
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.mem_offset = 0x00000000UL,
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@@ -45,12 +50,25 @@ static struct pci_controller ifxmips_pci_controller = {
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};
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u32 ifxmips_pci_mapped_cfg;
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u32 ifxmips_pci_external_clock = 0;
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int pcibios_plat_dev_init(struct pci_dev *dev){
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static int __init
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ifxmips_pci_set_external_clk(char *str)
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{
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printk("cgu: setting up external pci clock\n");
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ifxmips_pci_external_clock = 1;
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return 1;
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}
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__setup("pci_external_clk", ifxmips_pci_set_external_clk);
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int
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pcibios_plat_dev_init(struct pci_dev *dev)
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{
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u8 pin;
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pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
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switch(pin) {
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switch(pin)
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{
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case 0:
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break;
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case 1:
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@@ -69,12 +87,13 @@ int pcibios_plat_dev_init(struct pci_dev *dev){
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return 0;
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}
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static void __init ifxmips_pci_startup (void){
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static void __init
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ifxmips_pci_startup(void)
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{
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u32 temp_buffer;
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ifxmips_w32(ifxmips_r32(IFXMIPS_CGU_IFCCR) & ~0xf00000, IFXMIPS_CGU_IFCCR);
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ifxmips_w32(ifxmips_r32(IFXMIPS_CGU_IFCCR) | 0x800000, IFXMIPS_CGU_IFCCR);
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ifxmips_w32(ifxmips_r32(IFXMIPS_CGU_IFCCR) | (1 << 16), IFXMIPS_CGU_IFCCR);
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ifxmips_w32((1 << 31) | (1 << 30), IFXMIPS_CGU_PCICR);
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cgu_setup_pci_clk(ifxmips_pci_external_clock);
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ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P1_OUT) | (1 << 5), IFXMIPS_GPIO_P1_OUT);
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ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P1_OD) | (1 << 5), IFXMIPS_GPIO_P1_OD);
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ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P1_DIR) | (1 << 5), IFXMIPS_GPIO_P1_DIR);
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@@ -138,8 +157,10 @@ static void __init ifxmips_pci_startup (void){
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ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P1_OUT) | (1 << 5), IFXMIPS_GPIO_P1_OUT);
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}
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int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin){
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switch (slot) {
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int __init
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pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin){
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switch(slot)
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{
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case 13:
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/* IDSEL = AD29 --> USB Host Controller */
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return (INT_NUM_IM1_IRL0 + 17);
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@@ -152,11 +173,13 @@ int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin){
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}
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}
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int pcibios_init(void){
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int
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pcibios_init(void)
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{
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extern int pci_probe_only;
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pci_probe_only = 0;
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printk ("PCI: Probing PCI hardware on host bus 0.\n");
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printk("PCI: Probing PCI hardware on host bus 0.\n");
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ifxmips_pci_startup ();
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// IFXMIPS_PCI_REG32(PCI_CR_CLK_CTRL_REG) &= (~8);
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ifxmips_pci_mapped_cfg = (u32)ioremap_nocache(0x17000000, 0x800 * 16);
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@@ -41,7 +41,7 @@
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#include <linux/console.h>
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#include <linux/sysrq.h>
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#include <linux/irq.h>
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#include <linux/platform_device.h>
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#include <asm/system.h>
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#include <asm/io.h>
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#include <asm/uaccess.h>
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@@ -60,7 +60,6 @@ static void ifxmipsasc_tx_chars(struct uart_port *port);
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extern void prom_printf(const char * fmt, ...);
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static struct uart_port ifxmipsasc_port[2];
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static struct uart_driver ifxmipsasc_reg;
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static unsigned int uartclk = 0;
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extern unsigned int ifxmips_get_fpi_hz(void);
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static void
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@@ -155,7 +154,6 @@ static void
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ifxmipsasc_tx_chars(struct uart_port *port)
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{
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struct circ_buf *xmit = &port->info->xmit;
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if(uart_tx_stopped(port))
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{
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ifxmipsasc_stop_tx(port);
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@@ -245,10 +243,7 @@ ifxmipsasc_startup(struct uart_port *port)
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unsigned long flags;
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int retval;
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if(uartclk == 0)
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uartclk = ifxmips_get_fpi_hz();
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port->uartclk = uartclk;
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port->uartclk = ifxmips_get_fpi_hz();
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ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_CLC) & ~IFXMIPS_ASC_CLC_DISS, port->membase + IFXMIPS_ASC_CLC);
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ifxmips_w32(((ifxmips_r32(port->membase + IFXMIPS_ASC_CLC) & ~ASCCLC_RMCMASK)) | (1 << ASCCLC_RMCOFFSET), port->membase + IFXMIPS_ASC_CLC);
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@@ -260,17 +255,17 @@ ifxmipsasc_startup(struct uart_port *port)
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local_irq_save(flags);
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retval = request_irq(port->irq, ifxmipsasc_rx_int, IRQF_DISABLED, "asc_rx", port);
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if(retval)
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{
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printk("failed to request ifxmipsasc_rx_int\n");
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return retval;
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}
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retval = request_irq(port->irq + 2, ifxmipsasc_tx_int, IRQF_DISABLED, "asc_tx", port);
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retval = request_irq(port->irq, ifxmipsasc_tx_int, IRQF_DISABLED, "asc_tx", port);
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if(retval)
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{
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printk("failed to request ifxmipsasc_tx_int\n");
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return retval;
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}
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retval = request_irq(port->irq + 2, ifxmipsasc_rx_int, IRQF_DISABLED, "asc_rx", port);
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if(retval)
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{
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printk("failed to request ifxmipsasc_rx_int\n");
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goto err1;
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}
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@@ -402,7 +397,15 @@ static void ifxmipsasc_set_termios(struct uart_port *port, struct ktermios *new,
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static const char*
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ifxmipsasc_type(struct uart_port *port)
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{
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return port->type == PORT_IFXMIPSASC ? "IFXMIPSASC" : NULL;
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if(port->type == PORT_IFXMIPSASC)
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{
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if(port->membase == IFXMIPS_ASC_BASE_ADDR)
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return "asc0";
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else
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return "asc1";
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} else {
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return NULL;
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}
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}
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static void
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@@ -465,54 +468,53 @@ static struct uart_port ifxmipsasc_port[2] =
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membase: (void *)IFXMIPS_ASC_BASE_ADDR,
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mapbase: IFXMIPS_ASC_BASE_ADDR,
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iotype: SERIAL_IO_MEM,
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irq: IFXMIPSASC_RIR(0),
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irq: IFXMIPSASC_TIR(0),
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uartclk: 0,
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fifosize: 16,
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type: PORT_IFXMIPSASC,
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ops: &ifxmipsasc_pops,
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flags: ASYNC_BOOT_AUTOCONF,
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line: 0
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}, {
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membase: (void *)(IFXMIPS_ASC_BASE_ADDR + IFXMIPS_ASC_BASE_DIFF),
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mapbase: IFXMIPS_ASC_BASE_ADDR + IFXMIPS_ASC_BASE_DIFF,
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iotype: SERIAL_IO_MEM,
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irq: IFXMIPSASC_RIR(1),
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irq: IFXMIPSASC_TIR(1),
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uartclk: 0,
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fifosize: 16,
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type: PORT_IFXMIPSASC,
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ops: &ifxmipsasc_pops,
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flags: ASYNC_BOOT_AUTOCONF,
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line: 1
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}
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};
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static void
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ifxmipsasc_console_write(struct console *co, const char *s, u_int count)
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{
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int port = co->index;
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int i, fifocnt;
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unsigned long flags;
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local_irq_save(flags);
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for(i = 0; i < count; i++)
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{
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/* wait until the FIFO is not full */
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do
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{
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fifocnt = (ifxmips_r32((u32*)(IFXMIPS_ASC_BASE_ADDR + (co->index * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_FSTAT)) & ASCFSTAT_TXFFLMASK)
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do {
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fifocnt = (ifxmips_r32((u32*)(IFXMIPS_ASC_BASE_ADDR + (port * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_FSTAT)) & ASCFSTAT_TXFFLMASK)
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>> ASCFSTAT_TXFFLOFF;
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}while(fifocnt == IFXMIPSASC_TXFIFO_FULL);
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} while(fifocnt == IFXMIPSASC_TXFIFO_FULL);
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if(s[i] == '\0')
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break;
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if(s[i] == '\n')
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{
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ifxmips_w32('\r', (u32*)(IFXMIPS_ASC_BASE_ADDR + (co->index * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_TBUF));
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do
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{
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fifocnt = (ifxmips_r32((u32*)(IFXMIPS_ASC_BASE_ADDR + (co->index * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_FSTAT)) & ASCFSTAT_TXFFLMASK)
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ifxmips_w32('\r', (u32*)(IFXMIPS_ASC_BASE_ADDR + (port * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_TBUF));
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do {
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fifocnt = (ifxmips_r32((u32*)(IFXMIPS_ASC_BASE_ADDR + (port * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_FSTAT)) & ASCFSTAT_TXFFLMASK)
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>> ASCFSTAT_TXFFLOFF;
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} while(fifocnt == IFXMIPSASC_TXFIFO_FULL);
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}
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ifxmips_w32(s[i], (u32*)(IFXMIPS_ASC_BASE_ADDR + (co->index * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_TBUF));
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ifxmips_w32(s[i], (u32*)(IFXMIPS_ASC_BASE_ADDR + (port * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_TBUF));
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}
|
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|
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local_irq_restore(flags);
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@@ -521,23 +523,16 @@ ifxmipsasc_console_write(struct console *co, const char *s, u_int count)
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static int __init
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ifxmipsasc_console_setup(struct console *co, char *options)
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{
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struct uart_port *port;
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int port = co->index;
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int baud = 115200;
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int bits = 8;
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int parity = 'n';
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int flow = 'n';
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|
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if(uartclk == 0)
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uartclk = ifxmips_get_fpi_hz();
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co->index = 0;
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port = &ifxmipsasc_port[co->index];
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ifxmipsasc_port[co->index].uartclk = uartclk;
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ifxmipsasc_port[co->index].type = PORT_IFXMIPSASC;
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ifxmipsasc_port[port].uartclk = ifxmips_get_fpi_hz();
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ifxmipsasc_port[port].type = PORT_IFXMIPSASC;
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if(options)
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uart_parse_options(options, &baud, &parity, &bits, &flow);
|
||||
|
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return uart_set_options(port, co, baud, parity, bits, flow);
|
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return uart_set_options(&ifxmipsasc_port[port], co, baud, parity, bits, flow);
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}
|
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|
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static struct console ifxmipsasc_console[2] =
|
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@@ -578,22 +573,20 @@ static struct uart_driver ifxmipsasc_reg =
|
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.major = TTY_MAJOR,
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.minor = 64,
|
||||
.nr = 2,
|
||||
.cons = ifxmipsasc_console,
|
||||
.cons = &ifxmipsasc_console[1],
|
||||
};
|
||||
|
||||
static int __init
|
||||
int __init
|
||||
ifxmipsasc_init(void)
|
||||
{
|
||||
unsigned char res;
|
||||
|
||||
int ret;
|
||||
uart_register_driver(&ifxmipsasc_reg);
|
||||
res = uart_add_one_port(&ifxmipsasc_reg, &ifxmipsasc_port[0]);
|
||||
res = uart_add_one_port(&ifxmipsasc_reg, &ifxmipsasc_port[1]);
|
||||
|
||||
return res;
|
||||
ret = uart_add_one_port(&ifxmipsasc_reg, &ifxmipsasc_port[0]);
|
||||
ret = uart_add_one_port(&ifxmipsasc_reg, &ifxmipsasc_port[1]);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void __exit
|
||||
void __exit
|
||||
ifxmipsasc_exit(void)
|
||||
{
|
||||
uart_unregister_driver(&ifxmipsasc_reg);
|
||||
|
||||
@@ -8,4 +8,5 @@ u32 cgu_get_pp32_clock(void);
|
||||
u32 cgu_get_ethernet_clock(int mii);
|
||||
u32 cgu_get_usb_clock(void);
|
||||
u32 cgu_get_clockout(int clkout);
|
||||
void cgu_setup_pci_clk(int internal_clock);
|
||||
#endif
|
||||
|
||||
Reference in New Issue
Block a user