mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2025-04-21 12:27:27 +03:00
lots of ifxmips cleanups
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@11596 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
@@ -41,7 +41,7 @@
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#include <linux/console.h>
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#include <linux/sysrq.h>
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#include <linux/irq.h>
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#include <linux/platform_device.h>
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#include <asm/system.h>
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#include <asm/io.h>
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#include <asm/uaccess.h>
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@@ -60,7 +60,6 @@ static void ifxmipsasc_tx_chars(struct uart_port *port);
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extern void prom_printf(const char * fmt, ...);
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static struct uart_port ifxmipsasc_port[2];
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static struct uart_driver ifxmipsasc_reg;
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static unsigned int uartclk = 0;
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extern unsigned int ifxmips_get_fpi_hz(void);
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static void
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@@ -155,7 +154,6 @@ static void
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ifxmipsasc_tx_chars(struct uart_port *port)
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{
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struct circ_buf *xmit = &port->info->xmit;
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if(uart_tx_stopped(port))
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{
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ifxmipsasc_stop_tx(port);
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@@ -245,10 +243,7 @@ ifxmipsasc_startup(struct uart_port *port)
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unsigned long flags;
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int retval;
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if(uartclk == 0)
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uartclk = ifxmips_get_fpi_hz();
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port->uartclk = uartclk;
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port->uartclk = ifxmips_get_fpi_hz();
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ifxmips_w32(ifxmips_r32(port->membase + IFXMIPS_ASC_CLC) & ~IFXMIPS_ASC_CLC_DISS, port->membase + IFXMIPS_ASC_CLC);
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ifxmips_w32(((ifxmips_r32(port->membase + IFXMIPS_ASC_CLC) & ~ASCCLC_RMCMASK)) | (1 << ASCCLC_RMCOFFSET), port->membase + IFXMIPS_ASC_CLC);
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@@ -260,17 +255,17 @@ ifxmipsasc_startup(struct uart_port *port)
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local_irq_save(flags);
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retval = request_irq(port->irq, ifxmipsasc_rx_int, IRQF_DISABLED, "asc_rx", port);
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if(retval)
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{
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printk("failed to request ifxmipsasc_rx_int\n");
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return retval;
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}
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retval = request_irq(port->irq + 2, ifxmipsasc_tx_int, IRQF_DISABLED, "asc_tx", port);
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retval = request_irq(port->irq, ifxmipsasc_tx_int, IRQF_DISABLED, "asc_tx", port);
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if(retval)
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{
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printk("failed to request ifxmipsasc_tx_int\n");
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return retval;
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}
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retval = request_irq(port->irq + 2, ifxmipsasc_rx_int, IRQF_DISABLED, "asc_rx", port);
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if(retval)
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{
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printk("failed to request ifxmipsasc_rx_int\n");
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goto err1;
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}
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@@ -402,7 +397,15 @@ static void ifxmipsasc_set_termios(struct uart_port *port, struct ktermios *new,
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static const char*
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ifxmipsasc_type(struct uart_port *port)
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{
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return port->type == PORT_IFXMIPSASC ? "IFXMIPSASC" : NULL;
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if(port->type == PORT_IFXMIPSASC)
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{
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if(port->membase == IFXMIPS_ASC_BASE_ADDR)
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return "asc0";
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else
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return "asc1";
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} else {
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return NULL;
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}
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}
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static void
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@@ -465,54 +468,53 @@ static struct uart_port ifxmipsasc_port[2] =
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membase: (void *)IFXMIPS_ASC_BASE_ADDR,
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mapbase: IFXMIPS_ASC_BASE_ADDR,
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iotype: SERIAL_IO_MEM,
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irq: IFXMIPSASC_RIR(0),
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irq: IFXMIPSASC_TIR(0),
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uartclk: 0,
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fifosize: 16,
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type: PORT_IFXMIPSASC,
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ops: &ifxmipsasc_pops,
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flags: ASYNC_BOOT_AUTOCONF,
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line: 0
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}, {
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membase: (void *)(IFXMIPS_ASC_BASE_ADDR + IFXMIPS_ASC_BASE_DIFF),
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mapbase: IFXMIPS_ASC_BASE_ADDR + IFXMIPS_ASC_BASE_DIFF,
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iotype: SERIAL_IO_MEM,
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irq: IFXMIPSASC_RIR(1),
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irq: IFXMIPSASC_TIR(1),
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uartclk: 0,
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fifosize: 16,
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type: PORT_IFXMIPSASC,
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ops: &ifxmipsasc_pops,
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flags: ASYNC_BOOT_AUTOCONF,
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line: 1
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}
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};
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static void
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ifxmipsasc_console_write(struct console *co, const char *s, u_int count)
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{
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int port = co->index;
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int i, fifocnt;
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unsigned long flags;
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local_irq_save(flags);
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for(i = 0; i < count; i++)
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{
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/* wait until the FIFO is not full */
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do
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{
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fifocnt = (ifxmips_r32((u32*)(IFXMIPS_ASC_BASE_ADDR + (co->index * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_FSTAT)) & ASCFSTAT_TXFFLMASK)
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do {
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fifocnt = (ifxmips_r32((u32*)(IFXMIPS_ASC_BASE_ADDR + (port * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_FSTAT)) & ASCFSTAT_TXFFLMASK)
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>> ASCFSTAT_TXFFLOFF;
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}while(fifocnt == IFXMIPSASC_TXFIFO_FULL);
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} while(fifocnt == IFXMIPSASC_TXFIFO_FULL);
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if(s[i] == '\0')
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break;
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if(s[i] == '\n')
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{
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ifxmips_w32('\r', (u32*)(IFXMIPS_ASC_BASE_ADDR + (co->index * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_TBUF));
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do
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{
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fifocnt = (ifxmips_r32((u32*)(IFXMIPS_ASC_BASE_ADDR + (co->index * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_FSTAT)) & ASCFSTAT_TXFFLMASK)
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ifxmips_w32('\r', (u32*)(IFXMIPS_ASC_BASE_ADDR + (port * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_TBUF));
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do {
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fifocnt = (ifxmips_r32((u32*)(IFXMIPS_ASC_BASE_ADDR + (port * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_FSTAT)) & ASCFSTAT_TXFFLMASK)
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>> ASCFSTAT_TXFFLOFF;
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} while(fifocnt == IFXMIPSASC_TXFIFO_FULL);
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}
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ifxmips_w32(s[i], (u32*)(IFXMIPS_ASC_BASE_ADDR + (co->index * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_TBUF));
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ifxmips_w32(s[i], (u32*)(IFXMIPS_ASC_BASE_ADDR + (port * IFXMIPS_ASC_BASE_DIFF) + IFXMIPS_ASC_TBUF));
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}
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local_irq_restore(flags);
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@@ -521,23 +523,16 @@ ifxmipsasc_console_write(struct console *co, const char *s, u_int count)
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static int __init
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ifxmipsasc_console_setup(struct console *co, char *options)
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{
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struct uart_port *port;
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int port = co->index;
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int baud = 115200;
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int bits = 8;
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int parity = 'n';
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int flow = 'n';
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if(uartclk == 0)
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uartclk = ifxmips_get_fpi_hz();
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co->index = 0;
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port = &ifxmipsasc_port[co->index];
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ifxmipsasc_port[co->index].uartclk = uartclk;
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ifxmipsasc_port[co->index].type = PORT_IFXMIPSASC;
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ifxmipsasc_port[port].uartclk = ifxmips_get_fpi_hz();
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ifxmipsasc_port[port].type = PORT_IFXMIPSASC;
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if(options)
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uart_parse_options(options, &baud, &parity, &bits, &flow);
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return uart_set_options(port, co, baud, parity, bits, flow);
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return uart_set_options(&ifxmipsasc_port[port], co, baud, parity, bits, flow);
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}
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static struct console ifxmipsasc_console[2] =
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@@ -578,22 +573,20 @@ static struct uart_driver ifxmipsasc_reg =
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.major = TTY_MAJOR,
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.minor = 64,
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.nr = 2,
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.cons = ifxmipsasc_console,
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.cons = &ifxmipsasc_console[1],
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};
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static int __init
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int __init
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ifxmipsasc_init(void)
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{
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unsigned char res;
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int ret;
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uart_register_driver(&ifxmipsasc_reg);
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res = uart_add_one_port(&ifxmipsasc_reg, &ifxmipsasc_port[0]);
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res = uart_add_one_port(&ifxmipsasc_reg, &ifxmipsasc_port[1]);
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return res;
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ret = uart_add_one_port(&ifxmipsasc_reg, &ifxmipsasc_port[0]);
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ret = uart_add_one_port(&ifxmipsasc_reg, &ifxmipsasc_port[1]);
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return 0;
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}
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static void __exit
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void __exit
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ifxmipsasc_exit(void)
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{
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uart_unregister_driver(&ifxmipsasc_reg);
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