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Code

jz4740: Use new mmc driver.

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This commit is contained in:
Lars-Peter Clausen 2009-11-28 07:39:48 +01:00
parent 69ea41784f
commit 77179384c6
5 changed files with 772 additions and 949 deletions
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4
target/linux/xburst/files-2.6.31/arch/mips/jz4740/board-qi_lb60.c
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@ -28,7 +28,7 @@
#include <linux/spi/spi_gpio.h>
#include <linux/power_supply.h>
#include <linux/power/jz4740-battery.h>
/*#include <linux/mmc/jz4740_mmc.h>*/
#include <linux/mmc/jz4740_mmc.h>
/* NAND */
@ -327,13 +327,11 @@ static struct platform_device qi_lb60_gpio_keys = {
}
};
/*
static struct jz4740_mmc_platform_data qi_lb60_mmc_pdata = {
.gpio_card_detect = JZ_GPIO_PORTD(0),
.gpio_read_only = JZ_GPIO_PORTD(16),
.gpio_power = JZ_GPIO_PORTD(2),
};
*/
static struct platform_device *jz_platform_devices[] __initdata = {
&jz4740_usb_ohci_device,

18
target/linux/xburst/files-2.6.31/arch/mips/jz4740/clock.c
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@ -71,7 +71,7 @@
#define JZ_CLOCK_PLL_OD_OFFSET 16
static void __iomem *jz_clock_base;
spinlock_t jz_clock_lock;
static spinlock_t jz_clock_lock;
static LIST_HEAD(jz_clocks);
struct clk {
@ -202,8 +202,8 @@ static unsigned long jz_clk_pll_half_get_rate(struct clk *clk)
reg = jz_clk_reg_read(JZ_REG_CLOCK_CTRL);
if (reg & JZ_CLOCK_CTRL_PLL_HALF)
return jz_clk_pll_get_rate(NULL) >> 1;
return jz_clk_pll_get_rate(NULL);
return jz_clk_pll_get_rate(clk->parent);
return jz_clk_pll_get_rate(clk->parent) >> 1;
}
@ -212,7 +212,7 @@ static const int jz_clk_main_divs[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32};
static unsigned long jz_clk_main_round_rate(struct clk *clk, unsigned long rate)
{
unsigned long parent_rate = jz_clk_pll_get_rate(NULL);
unsigned long parent_rate = jz_clk_pll_get_rate(clk->parent);
int div;
div = parent_rate / rate;
@ -238,7 +238,7 @@ static unsigned long jz_clk_main_get_rate(struct clk *clk) {
if (div >= ARRAY_SIZE(jz_clk_main_divs))
div = ARRAY_SIZE(jz_clk_main_divs) - 1;
return jz_clk_pll_get_rate(NULL) / jz_clk_main_divs[div];
return jz_clk_pll_get_rate(clk->parent) / jz_clk_main_divs[div];
}
static int jz_clk_main_set_rate(struct clk *clk, unsigned long rate)
@ -246,7 +246,7 @@ static int jz_clk_main_set_rate(struct clk *clk, unsigned long rate)
struct main_clk *mclk = (struct main_clk*)clk;
int i;
int div;
unsigned long parent_rate = jz_clk_pll_get_rate(NULL);
unsigned long parent_rate = jz_clk_pll_get_rate(clk->parent);
rate = jz_clk_main_round_rate(clk, rate);
@ -444,7 +444,7 @@ static int jz_clk_divided_set_rate(struct clk *clk, unsigned long rate)
static unsigned long jz_clk_ldclk_round_rate(struct clk *clk, unsigned long rate)
{
int div;
unsigned long parent_rate = jz_clk_pll_half_get_rate(NULL);
unsigned long parent_rate = jz_clk_pll_half_get_rate(clk->parent);
if (rate > 150000000)
return 150000000;
@ -465,7 +465,7 @@ static int jz_clk_ldclk_set_rate(struct clk *clk, unsigned long rate)
if (rate > 150000000)
return -EINVAL;
div = jz_clk_pll_half_get_rate(NULL) / rate - 1;
div = jz_clk_pll_half_get_rate(clk->parent) / rate - 1;
if (div < 0)
div = 0;
else if(div > 31)
@ -484,7 +484,7 @@ static unsigned long jz_clk_ldclk_get_rate(struct clk *clk)
div = jz_clk_reg_read(JZ_REG_CLOCK_CTRL) & JZ_CLOCK_CTRL_LDIV_MASK;
div >>= JZ_CLOCK_CTRL_LDIV_OFFSET;
return jz_clk_pll_half_get_rate(NULL) / (div + 1);
return jz_clk_pll_half_get_rate(clk->parent) / (div + 1);
}
static struct clk jz_clk_ld = {

1620
target/linux/xburst/files-2.6.31/drivers/mmc/host/jz_mmc.c
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File diff suppressed because it is too large Load Diff

65
target/linux/xburst/files-2.6.31/drivers/mmc/host/jz_mmc.h
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@ -1,65 +0,0 @@
#ifndef __JZ_MMC_H__
#define __JZ_MMC_H__
#define MMC_CLOCK_SLOW 400000 /* 400 kHz for initial setup */
#define MMC_CLOCK_FAST 20000000 /* 20 MHz for maximum for normal operation */
#define SD_CLOCK_FAST 24000000 /* 24 MHz for SD Cards */
#define MMC_NO_ERROR 0
/* Extra MMC commands for state control */
/* Use negative numbers to disambiguate */
#define MMC_CIM_RESET -1
#define MMC_SET_CLOCK 100
typedef struct jzsoc_dma_desc {
volatile u32 ddadr; /* Points to the next descriptor + flags */
volatile u32 dsadr; /* DSADR value for the current transfer */
volatile u32 dtadr; /* DTADR value for the current transfer */
volatile u32 dcmd; /* DCMD value for the current transfer */
} jzsoc_dma_desc;
#include <linux/interrupt.h>
struct device;
struct mmc_host;
struct jz_mmc_platform_data {
unsigned int ocr_mask; /* available voltages */
unsigned long detect_delay; /* delay in jiffies before detecting cards after interrupt */
int (*init)(struct device *, irq_handler_t , void *);
int (*get_ro)(struct device *);
void (*setpower)(struct device *, unsigned int);
void (*exit)(struct device *, void *);
};
//extern void pxa_set_mci_info(struct pxamci_platform_data *info);
#define SZ_1K 0x00000400
#define SZ_4K 0x00001000
#define SZ_8K 0x00002000
#define SZ_16K 0x00004000
#define SZ_64K 0x00010000
#define SZ_128K 0x00020000
#define SZ_256K 0x00040000
#define SZ_512K 0x00080000
#define SZ_1M 0x00100000
#define SZ_2M 0x00200000
#define SZ_4M 0x00400000
#define SZ_8M 0x00800000
#define SZ_16M 0x01000000
#define SZ_32M 0x02000000
#define SZ_64M 0x04000000
#define SZ_128M 0x08000000
#define SZ_256M 0x10000000
#define SZ_512M 0x20000000
#define SZ_1G 0x40000000
#define SZ_2G 0x80000000
#endif /* __JZ_MMC_H__ */

14
target/linux/xburst/files-2.6.31/include/linux/mmc/jz4740_mmc.h Normal file
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@ -0,0 +1,14 @@
#ifndef __LINUX_MMC_JZ4740_MMC
#define __LINUX_MMC_JZ4740_MMC
struct jz4740_mmc_platform_data {
int gpio_power;
int gpio_card_detect;
int gpio_read_only;
unsigned card_detect_active_low:1;
unsigned read_only_active_low:1;
unsigned data_1bit:1;
};
#endif