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git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-28 18:50:37 +02:00
jz4740: Use new mmc driver.
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parent
69ea41784f
commit
77179384c6
@ -28,7 +28,7 @@
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#include <linux/spi/spi_gpio.h>
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#include <linux/spi/spi_gpio.h>
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#include <linux/power_supply.h>
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#include <linux/power_supply.h>
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#include <linux/power/jz4740-battery.h>
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#include <linux/power/jz4740-battery.h>
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/*#include <linux/mmc/jz4740_mmc.h>*/
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#include <linux/mmc/jz4740_mmc.h>
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/* NAND */
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/* NAND */
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@ -327,13 +327,11 @@ static struct platform_device qi_lb60_gpio_keys = {
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}
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}
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};
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};
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/*
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static struct jz4740_mmc_platform_data qi_lb60_mmc_pdata = {
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static struct jz4740_mmc_platform_data qi_lb60_mmc_pdata = {
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.gpio_card_detect = JZ_GPIO_PORTD(0),
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.gpio_card_detect = JZ_GPIO_PORTD(0),
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.gpio_read_only = JZ_GPIO_PORTD(16),
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.gpio_read_only = JZ_GPIO_PORTD(16),
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.gpio_power = JZ_GPIO_PORTD(2),
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.gpio_power = JZ_GPIO_PORTD(2),
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};
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};
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*/
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static struct platform_device *jz_platform_devices[] __initdata = {
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static struct platform_device *jz_platform_devices[] __initdata = {
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&jz4740_usb_ohci_device,
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&jz4740_usb_ohci_device,
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@ -71,7 +71,7 @@
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#define JZ_CLOCK_PLL_OD_OFFSET 16
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#define JZ_CLOCK_PLL_OD_OFFSET 16
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static void __iomem *jz_clock_base;
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static void __iomem *jz_clock_base;
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spinlock_t jz_clock_lock;
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static spinlock_t jz_clock_lock;
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static LIST_HEAD(jz_clocks);
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static LIST_HEAD(jz_clocks);
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struct clk {
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struct clk {
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@ -202,8 +202,8 @@ static unsigned long jz_clk_pll_half_get_rate(struct clk *clk)
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reg = jz_clk_reg_read(JZ_REG_CLOCK_CTRL);
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reg = jz_clk_reg_read(JZ_REG_CLOCK_CTRL);
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if (reg & JZ_CLOCK_CTRL_PLL_HALF)
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if (reg & JZ_CLOCK_CTRL_PLL_HALF)
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return jz_clk_pll_get_rate(NULL) >> 1;
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return jz_clk_pll_get_rate(clk->parent);
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return jz_clk_pll_get_rate(NULL);
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return jz_clk_pll_get_rate(clk->parent) >> 1;
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}
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}
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@ -212,7 +212,7 @@ static const int jz_clk_main_divs[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32};
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static unsigned long jz_clk_main_round_rate(struct clk *clk, unsigned long rate)
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static unsigned long jz_clk_main_round_rate(struct clk *clk, unsigned long rate)
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{
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{
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unsigned long parent_rate = jz_clk_pll_get_rate(NULL);
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unsigned long parent_rate = jz_clk_pll_get_rate(clk->parent);
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int div;
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int div;
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div = parent_rate / rate;
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div = parent_rate / rate;
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@ -238,7 +238,7 @@ static unsigned long jz_clk_main_get_rate(struct clk *clk) {
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if (div >= ARRAY_SIZE(jz_clk_main_divs))
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if (div >= ARRAY_SIZE(jz_clk_main_divs))
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div = ARRAY_SIZE(jz_clk_main_divs) - 1;
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div = ARRAY_SIZE(jz_clk_main_divs) - 1;
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return jz_clk_pll_get_rate(NULL) / jz_clk_main_divs[div];
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return jz_clk_pll_get_rate(clk->parent) / jz_clk_main_divs[div];
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}
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}
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static int jz_clk_main_set_rate(struct clk *clk, unsigned long rate)
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static int jz_clk_main_set_rate(struct clk *clk, unsigned long rate)
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@ -246,7 +246,7 @@ static int jz_clk_main_set_rate(struct clk *clk, unsigned long rate)
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struct main_clk *mclk = (struct main_clk*)clk;
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struct main_clk *mclk = (struct main_clk*)clk;
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int i;
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int i;
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int div;
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int div;
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unsigned long parent_rate = jz_clk_pll_get_rate(NULL);
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unsigned long parent_rate = jz_clk_pll_get_rate(clk->parent);
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rate = jz_clk_main_round_rate(clk, rate);
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rate = jz_clk_main_round_rate(clk, rate);
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@ -444,7 +444,7 @@ static int jz_clk_divided_set_rate(struct clk *clk, unsigned long rate)
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static unsigned long jz_clk_ldclk_round_rate(struct clk *clk, unsigned long rate)
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static unsigned long jz_clk_ldclk_round_rate(struct clk *clk, unsigned long rate)
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{
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{
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int div;
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int div;
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unsigned long parent_rate = jz_clk_pll_half_get_rate(NULL);
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unsigned long parent_rate = jz_clk_pll_half_get_rate(clk->parent);
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if (rate > 150000000)
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if (rate > 150000000)
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return 150000000;
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return 150000000;
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@ -465,7 +465,7 @@ static int jz_clk_ldclk_set_rate(struct clk *clk, unsigned long rate)
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if (rate > 150000000)
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if (rate > 150000000)
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return -EINVAL;
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return -EINVAL;
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div = jz_clk_pll_half_get_rate(NULL) / rate - 1;
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div = jz_clk_pll_half_get_rate(clk->parent) / rate - 1;
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if (div < 0)
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if (div < 0)
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div = 0;
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div = 0;
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else if(div > 31)
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else if(div > 31)
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@ -484,7 +484,7 @@ static unsigned long jz_clk_ldclk_get_rate(struct clk *clk)
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div = jz_clk_reg_read(JZ_REG_CLOCK_CTRL) & JZ_CLOCK_CTRL_LDIV_MASK;
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div = jz_clk_reg_read(JZ_REG_CLOCK_CTRL) & JZ_CLOCK_CTRL_LDIV_MASK;
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div >>= JZ_CLOCK_CTRL_LDIV_OFFSET;
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div >>= JZ_CLOCK_CTRL_LDIV_OFFSET;
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return jz_clk_pll_half_get_rate(NULL) / (div + 1);
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return jz_clk_pll_half_get_rate(clk->parent) / (div + 1);
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}
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}
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static struct clk jz_clk_ld = {
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static struct clk jz_clk_ld = {
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File diff suppressed because it is too large
Load Diff
@ -1,65 +0,0 @@
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#ifndef __JZ_MMC_H__
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#define __JZ_MMC_H__
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#define MMC_CLOCK_SLOW 400000 /* 400 kHz for initial setup */
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#define MMC_CLOCK_FAST 20000000 /* 20 MHz for maximum for normal operation */
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#define SD_CLOCK_FAST 24000000 /* 24 MHz for SD Cards */
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#define MMC_NO_ERROR 0
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/* Extra MMC commands for state control */
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/* Use negative numbers to disambiguate */
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#define MMC_CIM_RESET -1
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#define MMC_SET_CLOCK 100
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typedef struct jzsoc_dma_desc {
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volatile u32 ddadr; /* Points to the next descriptor + flags */
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volatile u32 dsadr; /* DSADR value for the current transfer */
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volatile u32 dtadr; /* DTADR value for the current transfer */
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volatile u32 dcmd; /* DCMD value for the current transfer */
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} jzsoc_dma_desc;
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#include <linux/interrupt.h>
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struct device;
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struct mmc_host;
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struct jz_mmc_platform_data {
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unsigned int ocr_mask; /* available voltages */
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unsigned long detect_delay; /* delay in jiffies before detecting cards after interrupt */
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int (*init)(struct device *, irq_handler_t , void *);
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int (*get_ro)(struct device *);
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void (*setpower)(struct device *, unsigned int);
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void (*exit)(struct device *, void *);
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};
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//extern void pxa_set_mci_info(struct pxamci_platform_data *info);
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#define SZ_1K 0x00000400
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#define SZ_4K 0x00001000
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#define SZ_8K 0x00002000
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#define SZ_16K 0x00004000
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#define SZ_64K 0x00010000
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#define SZ_128K 0x00020000
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#define SZ_256K 0x00040000
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#define SZ_512K 0x00080000
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#define SZ_1M 0x00100000
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#define SZ_2M 0x00200000
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#define SZ_4M 0x00400000
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#define SZ_8M 0x00800000
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#define SZ_16M 0x01000000
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#define SZ_32M 0x02000000
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#define SZ_64M 0x04000000
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#define SZ_128M 0x08000000
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#define SZ_256M 0x10000000
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#define SZ_512M 0x20000000
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#define SZ_1G 0x40000000
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#define SZ_2G 0x80000000
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#endif /* __JZ_MMC_H__ */
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@ -0,0 +1,14 @@
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#ifndef __LINUX_MMC_JZ4740_MMC
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#define __LINUX_MMC_JZ4740_MMC
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struct jz4740_mmc_platform_data {
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int gpio_power;
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int gpio_card_detect;
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int gpio_read_only;
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unsigned card_detect_active_low:1;
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unsigned read_only_active_low:1;
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unsigned data_1bit:1;
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};
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#endif
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