mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2025-04-21 12:27:27 +03:00
Add 2.6.31 patches and files.
This commit is contained in:
Lars-Peter Clausen
committed by
Xiangfu Liu
Xiangfu Liu
parent
f58d88c0f1
commit
7d446f792e
@@ -0,0 +1,26 @@
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/*
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* linux/include/asm-mips/jzsoc.h
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*
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* Ingenic's JZXXXX SoC common include.
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*
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* Copyright (C) 2006 - 2008 Ingenic Semiconductor Inc.
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*
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* Author: <jlwei@ingenic.cn>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_JZSOC_H__
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#define __ASM_JZSOC_H__
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/*
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* SoC include
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*/
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#ifdef CONFIG_SOC_JZ4740
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#include <asm/mach-jz4740/jz4740.h>
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#endif
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#endif /* __ASM_JZSOC_H__ */
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@@ -0,0 +1,69 @@
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/*
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* linux/include/asm-mips/mach-jz4740/board-dipper.h
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*
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* JZ4725-based (16bit) Dipper board ver 1.x definition.
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*
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* Copyright (C) 2006 - 2007 Ingenic Semiconductor Inc.
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*
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* Author: <lhhuang@ingenic.cn>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_JZ4725_DIPPER_H__
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#define __ASM_JZ4725_DIPPER_H__
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/*======================================================================
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* Frequencies of on-board oscillators
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*/
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#define JZ_EXTAL 12000000 /* Main extal freq: 12 MHz */
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#define JZ_EXTAL2 32768 /* RTC extal freq: 32.768 KHz */
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/*======================================================================
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* GPIO JZ4725
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*/
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#define GPIO_SD_VCC_EN_N 85 /* GPC21 */
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#define GPIO_SD_CD_N 91 /* GPC27 */
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#define GPIO_SD_WP 112 /* GPD16 */
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#define GPIO_USB_DETE 124 /* GPD28 */
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#define GPIO_DC_DETE_N 103 /* GPD7 */
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#define GPIO_CHARG_STAT_N 86 /* GPC22 */
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#define GPIO_DISP_OFF_N 118 /* GPD22 */
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#define GPIO_UDC_HOTPLUG GPIO_USB_DETE
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/*======================================================================
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* MMC/SD
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*/
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#define MSC_WP_PIN GPIO_SD_WP
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#define MSC_HOTPLUG_PIN GPIO_SD_CD_N
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#define MSC_HOTPLUG_IRQ (IRQ_GPIO_0 + GPIO_SD_CD_N)
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#define __msc_init_io() \
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do { \
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__gpio_as_output(GPIO_SD_VCC_EN_N); \
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__gpio_as_input(GPIO_SD_CD_N); \
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} while (0)
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#define __msc_enable_power() \
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do { \
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__gpio_clear_pin(GPIO_SD_VCC_EN_N); \
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} while (0)
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#define __msc_disable_power() \
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do { \
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__gpio_set_pin(GPIO_SD_VCC_EN_N); \
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} while (0)
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#define __msc_card_detected(s) \
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({ \
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int detected = 1; \
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if (__gpio_get_pin(GPIO_SD_CD_N)) \
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detected = 0; \
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detected; \
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})
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#endif /* __ASM_JZ4740_DIPPER_H__ */
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@@ -0,0 +1,56 @@
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#ifndef __ASM_JZ4740_LEO_H__
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#define __ASM_JZ4740_LEO_H__
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/*
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* Define your board specific codes here !!!
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*/
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/*======================================================================
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* Frequencies of on-board oscillators
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*/
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#define JZ_EXTAL 12000000 /* Main extal freq: 12 MHz */
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#define JZ_EXTAL2 32768 /* RTC extal freq: 32.768 KHz */
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/*======================================================================
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* GPIO
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*/
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#define GPIO_DISP_OFF_N 100
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#define GPIO_SD_VCC_EN_N 119
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#define GPIO_SD_CD_N 120
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#define GPIO_SD_WP 111
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/*======================================================================
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* MMC/SD
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*/
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#define MSC_WP_PIN GPIO_SD_WP
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#define MSC_HOTPLUG_PIN GPIO_SD_CD_N
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#define MSC_HOTPLUG_IRQ (IRQ_GPIO_0 + GPIO_SD_CD_N)
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#define __msc_init_io() \
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do { \
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__gpio_as_output(GPIO_SD_VCC_EN_N); \
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__gpio_as_input(GPIO_SD_CD_N); \
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} while (0)
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#define __msc_enable_power() \
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do { \
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__gpio_clear_pin(GPIO_SD_VCC_EN_N); \
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} while (0)
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#define __msc_disable_power() \
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do { \
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__gpio_set_pin(GPIO_SD_VCC_EN_N); \
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} while (0)
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#define __msc_card_detected(s) \
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({ \
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int detected = 1; \
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__gpio_as_input(GPIO_SD_CD_N); \
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if (__gpio_get_pin(GPIO_SD_CD_N)) \
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detected = 0; \
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detected; \
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})
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#endif /* __ASM_JZ4740_BOARD_LEO_H__ */
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@@ -0,0 +1,70 @@
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/*
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* linux/include/asm-mips/mach-jz4740/board-lyra.h
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*
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* JZ4740-based LYRA board ver 2.x definition.
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*
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* Copyright (C) 2006 - 2007 Ingenic Semiconductor Inc.
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*
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* Author: <lhhuang@ingenic.cn>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_JZ4740_LYRA_H__
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#define __ASM_JZ4740_LYRA_H__
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/*======================================================================
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* Frequencies of on-board oscillators
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*/
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#define JZ_EXTAL 12000000 /* Main extal freq: 12 MHz */
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#define JZ_EXTAL2 32768 /* RTC extal freq: 32.768 KHz */
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/*======================================================================
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* GPIO
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*/
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#define GPIO_SD_VCC_EN_N 113 /* GPD17 */
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#define GPIO_SD_CD_N 110 /* GPD14 */
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#define GPIO_SD_WP 112 /* GPD16 */
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#define GPIO_USB_DETE 102 /* GPD6 */
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#define GPIO_DC_DETE_N 103 /* GPD7 */
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#define GPIO_CHARG_STAT_N 111 /* GPD15 */
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#define GPIO_DISP_OFF_N 118 /* GPD22 */
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#define GPIO_LED_EN 124 /* GPD28 */
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#define GPIO_UDC_HOTPLUG GPIO_USB_DETE
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/*======================================================================
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* MMC/SD
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*/
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#define MSC_WP_PIN GPIO_SD_WP
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#define MSC_HOTPLUG_PIN GPIO_SD_CD_N
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#define MSC_HOTPLUG_IRQ (IRQ_GPIO_0 + GPIO_SD_CD_N)
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#define __msc_init_io() \
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do { \
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__gpio_as_output(GPIO_SD_VCC_EN_N); \
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__gpio_as_input(GPIO_SD_CD_N); \
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} while (0)
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#define __msc_enable_power() \
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do { \
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__gpio_clear_pin(GPIO_SD_VCC_EN_N); \
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} while (0)
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#define __msc_disable_power() \
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do { \
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__gpio_set_pin(GPIO_SD_VCC_EN_N); \
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} while (0)
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#define __msc_card_detected(s) \
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({ \
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int detected = 1; \
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if (!(__gpio_get_pin(GPIO_SD_CD_N))) \
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detected = 0; \
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detected; \
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})
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#endif /* __ASM_JZ4740_LYRA_H__ */
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@@ -0,0 +1,70 @@
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/*
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* linux/include/asm-mips/mach-jz4740/board-pavo.h
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*
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* JZ4730-based PAVO board ver 2.x definition.
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*
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* Copyright (C) 2006 - 2007 Ingenic Semiconductor Inc.
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*
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* Author: <lhhuang@ingenic.cn>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_JZ4740_PAVO_H__
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#define __ASM_JZ4740_PAVO_H__
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/*======================================================================
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* Frequencies of on-board oscillators
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*/
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#define JZ_EXTAL 12000000 /* Main extal freq: 12 MHz */
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#define JZ_EXTAL2 32768 /* RTC extal freq: 32.768 KHz */
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/*======================================================================
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* GPIO
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*/
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#define GPIO_SD_VCC_EN_N 113 /* GPD17 */
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#define GPIO_SD_CD_N 110 /* GPD14 */
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#define GPIO_SD_WP 112 /* GPD16 */
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#define GPIO_USB_DETE 102 /* GPD6 */
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#define GPIO_DC_DETE_N 103 /* GPD7 */
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#define GPIO_CHARG_STAT_N 111 /* GPD15 */
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#define GPIO_DISP_OFF_N 118 /* GPD22 */
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#define GPIO_LED_EN 124 /* GPD28 */
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#define GPIO_UDC_HOTPLUG GPIO_USB_DETE
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/*======================================================================
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* MMC/SD
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*/
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#define MSC_WP_PIN GPIO_SD_WP
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#define MSC_HOTPLUG_PIN GPIO_SD_CD_N
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#define MSC_HOTPLUG_IRQ (IRQ_GPIO_0 + GPIO_SD_CD_N)
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#define __msc_init_io() \
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do { \
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__gpio_as_output(GPIO_SD_VCC_EN_N); \
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__gpio_as_input(GPIO_SD_CD_N); \
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} while (0)
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#define __msc_enable_power() \
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do { \
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__gpio_clear_pin(GPIO_SD_VCC_EN_N); \
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} while (0)
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#define __msc_disable_power() \
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do { \
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__gpio_set_pin(GPIO_SD_VCC_EN_N); \
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} while (0)
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#define __msc_card_detected(s) \
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({ \
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int detected = 1; \
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if (__gpio_get_pin(GPIO_SD_CD_N)) \
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detected = 0; \
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detected; \
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})
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#endif /* __ASM_JZ4740_PAVO_H__ */
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@@ -0,0 +1,67 @@
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/*
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* linux/include/asm-mips/mach-jz4740/board-virgo.h
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*
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* JZ4720-based VIRGO board ver 1.x definition.
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*
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* Copyright (C) 2006 - 2007 Ingenic Semiconductor Inc.
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*
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* Author: <lhhuang@ingenic.cn>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_JZ4720_VIRGO_H__
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#define __ASM_JZ4720_VIRGO_H__
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/*======================================================================
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* Frequencies of on-board oscillators
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*/
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#define JZ_EXTAL 12000000 /* Main extal freq: 12 MHz */
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#define JZ_EXTAL2 32768 /* RTC extal freq: 32.768 KHz */
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/*======================================================================
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* GPIO VIRGO(JZ4720)
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*/
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#define GPIO_SD_VCC_EN_N 115 /* GPD19 */
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#define GPIO_SD_CD_N 116 /* GPD20 */
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#define GPIO_USB_DETE 114 /* GPD18 */
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#define GPIO_DC_DETE_N 120 /* GPD24 */
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#define GPIO_DISP_OFF_N 118 /* GPD22 */
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#define GPIO_LED_EN 117 /* GPD21 */
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#define GPIO_UDC_HOTPLUG GPIO_USB_DETE
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/*======================================================================
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* MMC/SD
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*/
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#define MSC_HOTPLUG_PIN GPIO_SD_CD_N
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#define MSC_HOTPLUG_IRQ (IRQ_GPIO_0 + GPIO_SD_CD_N)
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#define __msc_init_io() \
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do { \
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__gpio_as_output(GPIO_SD_VCC_EN_N); \
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__gpio_as_input(GPIO_SD_CD_N); \
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} while (0)
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#define __msc_enable_power() \
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do { \
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__gpio_clear_pin(GPIO_SD_VCC_EN_N); \
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} while (0)
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#define __msc_disable_power() \
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do { \
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__gpio_set_pin(GPIO_SD_VCC_EN_N); \
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} while (0)
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#define __msc_card_detected(s) \
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({ \
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int detected = 1; \
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if (__gpio_get_pin(GPIO_SD_CD_N)) \
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detected = 0; \
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detected; \
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})
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#endif /* __ASM_JZ4720_VIRGO_H__ */
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@@ -0,0 +1,173 @@
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/*
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* linux/include/asm-mips/mach-jz4740/clock.h
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*
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* JZ4740 clocks definition.
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*
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* Copyright (C) 2006 - 2007 Ingenic Semiconductor Inc.
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*
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* Author: <lhhuang@ingenic.cn>
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*
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* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_JZ4740_CLOCK_H__
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#define __ASM_JZ4740_CLOCK_H__
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#ifndef JZ_EXTAL
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//#define JZ_EXTAL 3686400 /* 3.6864 MHz */
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#define JZ_EXTAL 12000000 /* 3.6864 MHz */
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#endif
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#ifndef JZ_EXTAL2
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#define JZ_EXTAL2 32768 /* 32.768 KHz */
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#endif
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/*
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* JZ4740 clocks structure
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*/
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typedef struct {
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unsigned int cclk; /* CPU clock */
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unsigned int hclk; /* System bus clock */
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unsigned int pclk; /* Peripheral bus clock */
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unsigned int mclk; /* Flash/SRAM/SDRAM clock */
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unsigned int lcdclk; /* LCDC module clock */
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unsigned int pixclk; /* LCD pixel clock */
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unsigned int i2sclk; /* AIC module clock */
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unsigned int usbclk; /* USB module clock */
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unsigned int mscclk; /* MSC module clock */
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unsigned int extalclk; /* EXTAL clock for UART,I2C,SSI,TCU,USB-PHY */
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unsigned int rtcclk; /* RTC clock for CPM,INTC,RTC,TCU,WDT */
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} jz_clocks_t;
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extern jz_clocks_t jz_clocks;
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/* PLL output frequency */
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static __inline__ unsigned int __cpm_get_pllout(void)
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{
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unsigned long m, n, no, pllout;
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unsigned long cppcr = REG_CPM_CPPCR;
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unsigned long od[4] = {1, 2, 2, 4};
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if ((cppcr & CPM_CPPCR_PLLEN) && !(cppcr & CPM_CPPCR_PLLBP)) {
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m = __cpm_get_pllm() + 2;
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n = __cpm_get_plln() + 2;
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no = od[__cpm_get_pllod()];
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pllout = ((JZ_EXTAL) / (n * no)) * m;
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} else
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pllout = JZ_EXTAL;
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return pllout;
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}
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/* PLL output frequency for MSC/I2S/LCD/USB */
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static __inline__ unsigned int __cpm_get_pllout2(void)
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{
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if (REG_CPM_CPCCR & CPM_CPCCR_PCS)
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return __cpm_get_pllout();
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else
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return __cpm_get_pllout()/2;
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}
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/* CPU core clock */
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static __inline__ unsigned int __cpm_get_cclk(void)
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{
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int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32};
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return __cpm_get_pllout() / div[__cpm_get_cdiv()];
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}
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/* AHB system bus clock */
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static __inline__ unsigned int __cpm_get_hclk(void)
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{
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int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32};
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return __cpm_get_pllout() / div[__cpm_get_hdiv()];
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}
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/* Memory bus clock */
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static __inline__ unsigned int __cpm_get_mclk(void)
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{
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int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32};
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return __cpm_get_pllout() / div[__cpm_get_mdiv()];
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}
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/* APB peripheral bus clock */
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static __inline__ unsigned int __cpm_get_pclk(void)
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{
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int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32};
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||||
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return __cpm_get_pllout() / div[__cpm_get_pdiv()];
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}
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||||
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/* LCDC module clock */
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static __inline__ unsigned int __cpm_get_lcdclk(void)
|
||||
{
|
||||
return __cpm_get_pllout2() / (__cpm_get_ldiv() + 1);
|
||||
}
|
||||
|
||||
/* LCD pixel clock */
|
||||
static __inline__ unsigned int __cpm_get_pixclk(void)
|
||||
{
|
||||
return __cpm_get_pllout2() / (__cpm_get_pixdiv() + 1);
|
||||
}
|
||||
|
||||
/* I2S clock */
|
||||
static __inline__ unsigned int __cpm_get_i2sclk(void)
|
||||
{
|
||||
if (REG_CPM_CPCCR & CPM_CPCCR_I2CS) {
|
||||
return __cpm_get_pllout2() / (__cpm_get_i2sdiv() + 1);
|
||||
}
|
||||
else {
|
||||
return JZ_EXTAL;
|
||||
}
|
||||
}
|
||||
|
||||
/* USB clock */
|
||||
static __inline__ unsigned int __cpm_get_usbclk(void)
|
||||
{
|
||||
if (REG_CPM_CPCCR & CPM_CPCCR_UCS) {
|
||||
return __cpm_get_pllout2() / (__cpm_get_udiv() + 1);
|
||||
}
|
||||
else {
|
||||
return JZ_EXTAL;
|
||||
}
|
||||
}
|
||||
|
||||
/* MSC clock */
|
||||
static __inline__ unsigned int __cpm_get_mscclk(void)
|
||||
{
|
||||
return __cpm_get_pllout2() / (__cpm_get_mscdiv() + 1);
|
||||
}
|
||||
|
||||
/* EXTAL clock for UART,I2C,SSI,TCU,USB-PHY */
|
||||
static __inline__ unsigned int __cpm_get_extalclk(void)
|
||||
{
|
||||
return JZ_EXTAL;
|
||||
}
|
||||
|
||||
/* RTC clock for CPM,INTC,RTC,TCU,WDT */
|
||||
static __inline__ unsigned int __cpm_get_rtcclk(void)
|
||||
{
|
||||
return JZ_EXTAL2;
|
||||
}
|
||||
|
||||
/*
|
||||
* Output 24MHz for SD and 16MHz for MMC.
|
||||
*/
|
||||
static inline void __cpm_select_msc_clk(int sd)
|
||||
{
|
||||
unsigned int pllout2 = __cpm_get_pllout2();
|
||||
unsigned int div = 0;
|
||||
|
||||
if (sd) {
|
||||
div = pllout2 / 24000000;
|
||||
}
|
||||
else {
|
||||
div = pllout2 / 16000000;
|
||||
}
|
||||
|
||||
REG_CPM_MSCCDR = div - 1;
|
||||
}
|
||||
|
||||
#endif /* __ASM_JZ4740_CLOCK_H__ */
|
||||
@@ -0,0 +1,265 @@
|
||||
/*
|
||||
* linux/include/asm-mips/mach-jz4740/dma.h
|
||||
*
|
||||
* JZ4740 DMA definition.
|
||||
*
|
||||
* Copyright (C) 2006 - 2007 Ingenic Semiconductor Inc.
|
||||
*
|
||||
* Author: <lhhuang@ingenic.cn>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_JZ4740_DMA_H__
|
||||
#define __ASM_JZ4740_DMA_H__
|
||||
|
||||
#include <linux/interrupt.h>
|
||||
#include <asm/io.h> /* need byte IO */
|
||||
#include <linux/spinlock.h> /* And spinlocks */
|
||||
#include <linux/delay.h>
|
||||
#include <asm/system.h>
|
||||
|
||||
/*
|
||||
* Descriptor structure for JZ4740 DMA engine
|
||||
* Note: this structure must always be aligned to a 16-bytes boundary.
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
volatile u32 dcmd; /* DCMD value for the current transfer */
|
||||
volatile u32 dsadr; /* DSAR value for the current transfer */
|
||||
volatile u32 dtadr; /* DTAR value for the current transfer */
|
||||
volatile u32 ddadr; /* Points to the next descriptor + transfer count */
|
||||
} jz_dma_desc;
|
||||
|
||||
|
||||
/* DMA Device ID's follow */
|
||||
enum {
|
||||
DMA_ID_UART0_TX = 0,
|
||||
DMA_ID_UART0_RX,
|
||||
DMA_ID_SSI_TX,
|
||||
DMA_ID_SSI_RX,
|
||||
DMA_ID_AIC_TX,
|
||||
DMA_ID_AIC_RX,
|
||||
DMA_ID_MSC_TX,
|
||||
DMA_ID_MSC_RX,
|
||||
DMA_ID_TCU_OVERFLOW,
|
||||
DMA_ID_AUTO,
|
||||
DMA_ID_RAW_SET,
|
||||
DMA_ID_MAX
|
||||
};
|
||||
|
||||
/* DMA modes, simulated by sw */
|
||||
#define DMA_MODE_READ 0x0 /* I/O to memory, no autoinit, increment, single mode */
|
||||
#define DMA_MODE_WRITE 0x1 /* memory to I/O, no autoinit, increment, single mode */
|
||||
#define DMA_AUTOINIT 0x2
|
||||
#define DMA_MODE_MASK 0x3
|
||||
|
||||
struct jz_dma_chan {
|
||||
int dev_id; /* DMA ID: this channel is allocated if >=0, free otherwise */
|
||||
unsigned int io; /* DMA channel number */
|
||||
const char *dev_str; /* string describes the DMA channel */
|
||||
int irq; /* DMA irq number */
|
||||
void *irq_dev; /* DMA private device structure */
|
||||
unsigned int fifo_addr; /* physical fifo address of the requested device */
|
||||
unsigned int cntl; /* DMA controll */
|
||||
unsigned int mode; /* DMA configuration */
|
||||
unsigned int source; /* DMA request source */
|
||||
};
|
||||
|
||||
extern struct jz_dma_chan jz_dma_table[];
|
||||
|
||||
|
||||
#define DMA_8BIT_RX_CMD \
|
||||
DMAC_DCMD_DAI | \
|
||||
DMAC_DCMD_SWDH_8 | DMAC_DCMD_DWDH_32 | \
|
||||
DMAC_DCMD_DS_8BIT | DMAC_DCMD_RDIL_IGN
|
||||
|
||||
#define DMA_8BIT_TX_CMD \
|
||||
DMAC_DCMD_SAI | \
|
||||
DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_8 | \
|
||||
DMAC_DCMD_DS_8BIT | DMAC_DCMD_RDIL_IGN
|
||||
|
||||
#define DMA_16BIT_RX_CMD \
|
||||
DMAC_DCMD_DAI | \
|
||||
DMAC_DCMD_SWDH_16 | DMAC_DCMD_DWDH_32 | \
|
||||
DMAC_DCMD_DS_16BIT | DMAC_DCMD_RDIL_IGN
|
||||
|
||||
#define DMA_16BIT_TX_CMD \
|
||||
DMAC_DCMD_SAI | \
|
||||
DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_16 | \
|
||||
DMAC_DCMD_DS_16BIT | DMAC_DCMD_RDIL_IGN
|
||||
|
||||
#define DMA_32BIT_RX_CMD \
|
||||
DMAC_DCMD_DAI | \
|
||||
DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_32 | \
|
||||
DMAC_DCMD_DS_32BIT | DMAC_DCMD_RDIL_IGN
|
||||
|
||||
#define DMA_32BIT_TX_CMD \
|
||||
DMAC_DCMD_SAI | \
|
||||
DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_32 | \
|
||||
DMAC_DCMD_DS_32BIT | DMAC_DCMD_RDIL_IGN
|
||||
|
||||
#define DMA_16BYTE_RX_CMD \
|
||||
DMAC_DCMD_DAI | \
|
||||
DMAC_DCMD_SWDH_8 | DMAC_DCMD_DWDH_32 | \
|
||||
DMAC_DCMD_DS_16BYTE | DMAC_DCMD_RDIL_IGN
|
||||
|
||||
#define DMA_16BYTE_TX_CMD \
|
||||
DMAC_DCMD_SAI | \
|
||||
DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_8 | \
|
||||
DMAC_DCMD_DS_16BYTE | DMAC_DCMD_RDIL_IGN
|
||||
|
||||
#define DMA_32BYTE_RX_CMD \
|
||||
DMAC_DCMD_DAI | \
|
||||
DMAC_DCMD_SWDH_8 | DMAC_DCMD_DWDH_32 | \
|
||||
DMAC_DCMD_DS_32BYTE | DMAC_DCMD_RDIL_IGN
|
||||
|
||||
#define DMA_32BYTE_TX_CMD \
|
||||
DMAC_DCMD_SAI | \
|
||||
DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_8 | \
|
||||
DMAC_DCMD_DS_32BYTE | DMAC_DCMD_RDIL_IGN
|
||||
|
||||
#define DMA_AIC_32_16BYTE_TX_CMD \
|
||||
DMAC_DCMD_SAI | \
|
||||
DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_32 | \
|
||||
DMAC_DCMD_DS_16BYTE | DMAC_DCMD_RDIL_IGN
|
||||
|
||||
#define DMA_AIC_32_16BYTE_RX_CMD \
|
||||
DMAC_DCMD_DAI | \
|
||||
DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_32 | \
|
||||
DMAC_DCMD_DS_16BYTE | DMAC_DCMD_RDIL_IGN
|
||||
|
||||
#define DMA_AIC_16BIT_TX_CMD \
|
||||
DMAC_DCMD_SAI | \
|
||||
DMAC_DCMD_SWDH_16 | DMAC_DCMD_DWDH_16 | \
|
||||
DMAC_DCMD_DS_16BIT | DMAC_DCMD_RDIL_IGN
|
||||
|
||||
#define DMA_AIC_16BIT_RX_CMD \
|
||||
DMAC_DCMD_DAI | \
|
||||
DMAC_DCMD_SWDH_16 | DMAC_DCMD_DWDH_16 | \
|
||||
DMAC_DCMD_DS_16BIT | DMAC_DCMD_RDIL_IGN
|
||||
|
||||
#define DMA_AIC_16BYTE_RX_CMD \
|
||||
DMAC_DCMD_DAI | \
|
||||
DMAC_DCMD_SWDH_16 | DMAC_DCMD_DWDH_16 | \
|
||||
DMAC_DCMD_DS_16BYTE | DMAC_DCMD_RDIL_IGN
|
||||
|
||||
#define DMA_AIC_16BYTE_TX_CMD \
|
||||
DMAC_DCMD_SAI | \
|
||||
DMAC_DCMD_SWDH_16 | DMAC_DCMD_DWDH_16 | \
|
||||
DMAC_DCMD_DS_16BYTE | DMAC_DCMD_RDIL_IGN
|
||||
|
||||
extern int jz_request_dma(int dev_id,
|
||||
const char *dev_str,
|
||||
irqreturn_t (*irqhandler)(int, void *),
|
||||
unsigned long irqflags,
|
||||
void *irq_dev_id);
|
||||
extern void jz_free_dma(unsigned int dmanr);
|
||||
|
||||
extern int jz_dma_read_proc(char *buf, char **start, off_t fpos,
|
||||
int length, int *eof, void *data);
|
||||
extern void dump_jz_dma_channel(unsigned int dmanr);
|
||||
|
||||
extern void enable_dma(unsigned int dmanr);
|
||||
extern void disable_dma(unsigned int dmanr);
|
||||
extern void set_dma_addr(unsigned int dmanr, unsigned int phyaddr);
|
||||
extern void set_dma_count(unsigned int dmanr, unsigned int bytecnt);
|
||||
extern void set_dma_mode(unsigned int dmanr, unsigned int mode);
|
||||
extern void jz_set_oss_dma(unsigned int dmanr, unsigned int mode, unsigned int audio_fmt);
|
||||
extern void jz_set_alsa_dma(unsigned int dmanr, unsigned int mode, unsigned int audio_fmt);
|
||||
extern unsigned int get_dma_residue(unsigned int dmanr);
|
||||
|
||||
extern spinlock_t dma_spin_lock;
|
||||
|
||||
static __inline__ unsigned long claim_dma_lock(void)
|
||||
{
|
||||
unsigned long flags;
|
||||
spin_lock_irqsave(&dma_spin_lock, flags);
|
||||
return flags;
|
||||
}
|
||||
|
||||
static __inline__ void release_dma_lock(unsigned long flags)
|
||||
{
|
||||
spin_unlock_irqrestore(&dma_spin_lock, flags);
|
||||
}
|
||||
|
||||
/* Clear the 'DMA Pointer Flip Flop'.
|
||||
* Write 0 for LSB/MSB, 1 for MSB/LSB access.
|
||||
*/
|
||||
#define clear_dma_ff(channel)
|
||||
|
||||
static __inline__ struct jz_dma_chan *get_dma_chan(unsigned int dmanr)
|
||||
{
|
||||
if (dmanr > MAX_DMA_NUM
|
||||
|| jz_dma_table[dmanr].dev_id < 0)
|
||||
return NULL;
|
||||
return &jz_dma_table[dmanr];
|
||||
}
|
||||
|
||||
static __inline__ int dma_halted(unsigned int dmanr)
|
||||
{
|
||||
struct jz_dma_chan *chan = get_dma_chan(dmanr);
|
||||
if (!chan)
|
||||
return 1;
|
||||
return __dmac_channel_transmit_halt_detected(dmanr) ? 1 : 0;
|
||||
}
|
||||
|
||||
static __inline__ unsigned int get_dma_mode(unsigned int dmanr)
|
||||
{
|
||||
struct jz_dma_chan *chan = get_dma_chan(dmanr);
|
||||
if (!chan)
|
||||
return 0;
|
||||
return chan->mode;
|
||||
}
|
||||
|
||||
static __inline__ void clear_dma_done(unsigned int dmanr)
|
||||
{
|
||||
struct jz_dma_chan *chan = get_dma_chan(dmanr);
|
||||
if (!chan)
|
||||
return;
|
||||
REG_DMAC_DCCSR(chan->io) &= ~(DMAC_DCCSR_HLT | DMAC_DCCSR_TT | DMAC_DCCSR_AR);
|
||||
}
|
||||
|
||||
static __inline__ void clear_dma_halt(unsigned int dmanr)
|
||||
{
|
||||
struct jz_dma_chan *chan = get_dma_chan(dmanr);
|
||||
if (!chan)
|
||||
return;
|
||||
REG_DMAC_DCCSR(chan->io) &= ~(DMAC_DCCSR_HLT);
|
||||
REG_DMAC_DMACR &= ~(DMAC_DMACR_HLT);
|
||||
}
|
||||
|
||||
static __inline__ void clear_dma_flag(unsigned int dmanr)
|
||||
{
|
||||
struct jz_dma_chan *chan = get_dma_chan(dmanr);
|
||||
if (!chan)
|
||||
return;
|
||||
REG_DMAC_DCCSR(chan->io) &= ~(DMAC_DCCSR_HLT | DMAC_DCCSR_TT | DMAC_DCCSR_AR);
|
||||
REG_DMAC_DMACR &= ~(DMAC_DMACR_HLT | DMAC_DMACR_AR);
|
||||
}
|
||||
|
||||
static __inline__ void set_dma_page(unsigned int dmanr, char pagenr)
|
||||
{
|
||||
}
|
||||
|
||||
static __inline__ unsigned int get_dma_done_status(unsigned int dmanr)
|
||||
{
|
||||
unsigned long dccsr;
|
||||
struct jz_dma_chan *chan = get_dma_chan(dmanr);
|
||||
if (!chan)
|
||||
return 0;
|
||||
dccsr = REG_DMAC_DCCSR(chan->io);
|
||||
return dccsr & (DMAC_DCCSR_HLT | DMAC_DCCSR_TT | DMAC_DCCSR_AR);
|
||||
}
|
||||
|
||||
static __inline__ int get_dma_done_irq(unsigned int dmanr)
|
||||
{
|
||||
struct jz_dma_chan *chan = get_dma_chan(dmanr);
|
||||
if (!chan)
|
||||
return -1;
|
||||
return chan->irq;
|
||||
}
|
||||
|
||||
#endif /* __ASM_JZ4740_DMA_H__ */
|
||||
@@ -0,0 +1,56 @@
|
||||
/*
|
||||
* linux/include/asm-mips/mach-jz4740/jz4740.h
|
||||
*
|
||||
* JZ4740 common definition.
|
||||
*
|
||||
* Copyright (C) 2006 - 2007 Ingenic Semiconductor Inc.
|
||||
*
|
||||
* Author: <lhhuang@ingenic.cn>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_JZ4740_H__
|
||||
#define __ASM_JZ4740_H__
|
||||
|
||||
#include <asm/mach-jz4740/regs.h>
|
||||
#include <asm/mach-jz4740/ops.h>
|
||||
#include <asm/mach-jz4740/dma.h>
|
||||
#include <asm/mach-jz4740/misc.h>
|
||||
|
||||
/*------------------------------------------------------------------
|
||||
* Platform definitions
|
||||
*/
|
||||
#ifdef CONFIG_JZ4740_PAVO
|
||||
#include <asm/mach-jz4740/board-pavo.h>
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_JZ4740_LEO
|
||||
#include <asm/mach-jz4740/board-leo.h>
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_JZ4740_LYRA
|
||||
#include <asm/mach-jz4740/board-lyra.h>
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_JZ4725_DIPPER
|
||||
#include <asm/mach-jz4740/board-dipper.h>
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_JZ4720_VIRGO
|
||||
#include <asm/mach-jz4740/board-virgo.h>
|
||||
#endif
|
||||
|
||||
/* Add other platform definition here ... */
|
||||
|
||||
|
||||
/*------------------------------------------------------------------
|
||||
* Follows are related to platform definitions
|
||||
*/
|
||||
|
||||
#include <asm/mach-jz4740/clock.h>
|
||||
#include <asm/mach-jz4740/serial.h>
|
||||
|
||||
#endif /* __ASM_JZ4740_H__ */
|
||||
@@ -0,0 +1,43 @@
|
||||
/*
|
||||
* linux/include/asm-mips/mach-jz4740/misc.h
|
||||
*
|
||||
* Ingenic's JZ4740 common include.
|
||||
*
|
||||
* Copyright (C) 2006 - 2007 Ingenic Semiconductor Inc.
|
||||
*
|
||||
* Author: <yliu@ingenic.cn>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_JZ4740_MISC_H__
|
||||
#define __ASM_JZ4740_MISC_H__
|
||||
|
||||
/*==========================================================
|
||||
* I2C
|
||||
*===========================================================*/
|
||||
|
||||
#define I2C_EEPROM_DEV 0xA /* b'1010 */
|
||||
#define I2C_RTC_DEV 0xD /* b'1101 */
|
||||
#define DIMM0_SPD_ADDR 0
|
||||
#define DIMM1_SPD_ADDR 1
|
||||
#define DIMM2_SPD_ADDR 2
|
||||
#define DIMM3_SPD_ADDR 3
|
||||
#define JZ_HCI_ADDR 7
|
||||
|
||||
#define DIMM_SPD_LEN 128
|
||||
#define JZ_HCI_LEN 512 /* 4K bits E2PROM */
|
||||
#define I2C_RTC_LEN 16
|
||||
#define HCI_MAC_OFFSET 64
|
||||
|
||||
extern void i2c_open(void);
|
||||
extern void i2c_close(void);
|
||||
extern void i2c_setclk(unsigned int i2cclk);
|
||||
extern int i2c_read(unsigned char device, unsigned char *buf,
|
||||
unsigned char address, int count);
|
||||
extern int i2c_write(unsigned char device, unsigned char *buf,
|
||||
unsigned char address, int count);
|
||||
|
||||
#endif /* __ASM_JZ4740_MISC_H__ */
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,30 @@
|
||||
/*
|
||||
* linux/include/asm-mips/mach-jz4740/serial.h
|
||||
*
|
||||
* Ingenic's JZ4740 common include.
|
||||
*
|
||||
* Copyright (C) 2006 - 2007 Ingenic Semiconductor Inc.
|
||||
*
|
||||
* Author: <yliu@ingenic.cn>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_BOARD_SERIAL_H__
|
||||
#define __ASM_BOARD_SERIAL_H__
|
||||
|
||||
#ifndef CONFIG_SERIAL_MANY_PORTS
|
||||
#undef RS_TABLE_SIZE
|
||||
#define RS_TABLE_SIZE 1
|
||||
#endif
|
||||
|
||||
#define JZ_BASE_BAUD (12000000/16)
|
||||
|
||||
#define JZ_SERIAL_PORT_DEFNS \
|
||||
{ .baud_base = JZ_BASE_BAUD, .irq = IRQ_UART0, \
|
||||
.flags = STD_COM_FLAGS, .iomem_base = (u8 *)UART0_BASE, \
|
||||
.iomem_reg_shift = 2, .io_type = SERIAL_IO_MEM },
|
||||
|
||||
#endif /* __ASM_BORAD_SERIAL_H__ */
|
||||
@@ -0,0 +1,25 @@
|
||||
/*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
|
||||
*/
|
||||
#ifndef __ASM_MIPS_MACH_JZ4740_WAR_H
|
||||
#define __ASM_MIPS_MACH_JZ4740_WAR_H
|
||||
|
||||
#define R4600_V1_INDEX_ICACHEOP_WAR 0
|
||||
#define R4600_V1_HIT_CACHEOP_WAR 0
|
||||
#define R4600_V2_HIT_CACHEOP_WAR 0
|
||||
#define R5432_CP0_INTERRUPT_WAR 0
|
||||
#define BCM1250_M3_WAR 0
|
||||
#define SIBYTE_1956_WAR 0
|
||||
#define MIPS4K_ICACHE_REFILL_WAR 0
|
||||
#define MIPS_CACHE_SYNC_WAR 0
|
||||
#define TX49XX_ICACHE_INDEX_INV_WAR 0
|
||||
#define RM9000_CDEX_SMP_WAR 0
|
||||
#define ICACHE_REFILLS_WORKAROUND_WAR 0
|
||||
#define R10000_LLSC_WAR 0
|
||||
#define MIPS34K_MISSED_ITLB_WAR 0
|
||||
|
||||
#endif /* __ASM_MIPS_MACH_JZ4740_WAR_H */
|
||||
Reference in New Issue
Block a user