mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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[adm5120] more USB driver changes
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@9550 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
juhosg
parent
d895ddd832
commit
7fcae4c7e6
@ -139,7 +139,7 @@ urb_print(struct admhcd *ahcd, struct urb * urb, char * str, int small)
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static void admhc_dump_intr_mask(struct admhcd *ahcd, char *label, u32 mask,
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char **next, unsigned *size)
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{
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admhc_dbg_sw(ahcd, next, size, "%s 0x%08x%s%s%s%s%s%s%s%s%s%s\n",
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admhc_dbg_sw(ahcd, next, size, "%s 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s\n",
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label,
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mask,
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(mask & ADMHC_INTR_INTA) ? " INTA" : "",
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@ -150,6 +150,8 @@ static void admhc_dump_intr_mask(struct admhcd *ahcd, char *label, u32 mask,
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(mask & ADMHC_INTR_SO) ? " SO" : "",
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(mask & ADMHC_INTR_INSM) ? " INSM" : "",
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(mask & ADMHC_INTR_BABI) ? " BABI" : "",
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(mask & ADMHC_INTR_7) ? " !7!" : "",
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(mask & ADMHC_INTR_6) ? " !6!" : "",
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(mask & ADMHC_INTR_RESI) ? " RESI" : "",
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(mask & ADMHC_INTR_SOFI) ? " SOFI" : ""
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);
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@ -45,20 +45,21 @@
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#include "../core/hcd.h"
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#include "../core/hub.h"
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#define DRIVER_VERSION "v0.05"
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#define DRIVER_VERSION "v0.06"
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#define DRIVER_AUTHOR "Gabor Juhos <juhosg at openwrt.org>"
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#define DRIVER_DESC "ADMtek USB 1.1 Host Controller Driver"
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/*-------------------------------------------------------------------------*/
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#define ADMHC_VERBOSE_DEBUG /* not always helpful */
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#undef ADMHC_VERBOSE_DEBUG /* not always helpful */
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/* For initializing controller (mask in an HCFS mode too) */
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#define OHCI_CONTROL_INIT OHCI_CTRL_CBSR
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#define ADMHC_INTR_INIT \
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( ADMHC_INTR_MIE | ADMHC_INTR_INSM | ADMHC_INTR_FATI \
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| ADMHC_INTR_RESI | ADMHC_INTR_TDC | ADMHC_INTR_BABI )
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| ADMHC_INTR_RESI | ADMHC_INTR_TDC | ADMHC_INTR_BABI \
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| ADMHC_INTR_7 | ADMHC_INTR_6 )
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/*-------------------------------------------------------------------------*/
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@ -346,6 +347,7 @@ static int admhc_get_frame_number(struct usb_hcd *hcd)
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static void admhc_usb_reset(struct admhcd *ahcd)
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{
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admhc_dbg(ahcd, "usb reset\n");
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ahcd->host_control = ADMHC_BUSS_RESET;
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admhc_writel(ahcd, ahcd->host_control, &ahcd->regs->host_control);
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}
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@ -359,6 +361,8 @@ admhc_shutdown(struct usb_hcd *hcd)
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{
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struct admhcd *ahcd;
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admhc_dbg(ahcd, "shutdown\n");
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ahcd = hcd_to_admhcd(hcd);
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admhc_intr_disable(ahcd, ADMHC_INTR_MIE);
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admhc_dma_disable(ahcd);
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@ -394,7 +398,7 @@ static void admhc_eds_cleanup(struct admhcd *ahcd)
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ahcd->ed_head = NULL;
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}
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#define ED_DUMMY_INFO (ED_SPEED_FULL | ED_SKIP)
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#define ED_DUMMY_INFO 0
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static int admhc_eds_init(struct admhcd *ahcd)
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{
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@ -527,8 +531,8 @@ static int admhc_run(struct admhcd *ahcd)
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break;
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}
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admhc_writel(ahcd, ahcd->host_control, &ahcd->regs->host_control);
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msleep(temp);
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temp = admhc_read_rhdesc(ahcd);
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if (!(temp & ADMHC_RH_NPS)) {
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/* power down each port */
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@ -547,7 +551,7 @@ static int admhc_run(struct admhcd *ahcd)
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admhc_err(ahcd, "USB HC reset timed out!\n");
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return -1;
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}
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udelay (1);
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udelay(1);
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}
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/* enable HOST mode, before access any host specific register */
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@ -562,22 +566,10 @@ static int admhc_run(struct admhcd *ahcd)
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hcd->poll_rh = 1;
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hcd->uses_new_polling = 1;
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#if 0
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/* wake on ConnectStatusChange, matching external hubs */
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admhc_writel(ahcd, RH_HS_DRWE, &ahcd->regs->roothub.status);
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#else
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/* FIXME roothub_write_status (ahcd, ADMHC_RH_DRWE); */
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#endif
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/* Choose the interrupts we care about now, others later on demand */
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admhc_intr_ack(ahcd, ~0);
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admhc_intr_enable(ahcd, ADMHC_INTR_INIT);
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admhc_writel(ahcd, ADMHC_RH_NPS | ADMHC_RH_LPSC, &ahcd->regs->rhdesc);
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/* start controller operations */
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ahcd->host_control = ADMHC_BUSS_OPER;
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admhc_writel(ahcd, ahcd->host_control, &ahcd->regs->host_control);
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hcd->state = HC_STATE_RUNNING;
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temp = 20;
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while ((admhc_readl(ahcd, &ahcd->regs->host_control)
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@ -590,12 +582,24 @@ static int admhc_run(struct admhcd *ahcd)
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mdelay(1);
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}
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hcd->state = HC_STATE_RUNNING;
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ahcd->next_statechange = jiffies + STATECHANGE_DELAY;
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#if 0
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/* FIXME */
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/* wake on ConnectStatusChange, matching external hubs */
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admhc_writel(ahcd, ADMHC_RH_DRWE, &ahcd->regs->rhdesc);
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#endif
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/* Choose the interrupts we care about now, others later on demand */
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temp = ADMHC_INTR_INIT;
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admhc_intr_ack(ahcd, ~0);
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admhc_intr_enable(ahcd, temp);
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admhc_writel(ahcd, ADMHC_RH_NPS | ADMHC_RH_LPSC, &ahcd->regs->rhdesc);
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ahcd->next_statechange = jiffies + STATECHANGE_DELAY;
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spin_unlock_irq(&ahcd->lock);
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mdelay(ADMHC_POTPGT);
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hcd->state = HC_STATE_RUNNING;
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return 0;
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}
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@ -611,13 +615,27 @@ static irqreturn_t admhc_irq(struct usb_hcd *hcd)
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u32 ints;
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ints = admhc_readl(ahcd, ®s->int_status);
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if (!(ints & ADMHC_INTR_INTA))
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if (!(ints & ADMHC_INTR_INTA)) {
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/* no unmasked interrupt status is set */
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admhc_err(ahcd, "spurious interrupt %08x\n", ints);
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return IRQ_NONE;
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}
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ints &= admhc_readl(ahcd, ®s->int_enable);
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if (!ints)
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if (!ints) {
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admhc_err(ahcd, "hardware irq problems?\n");
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return IRQ_NONE;
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}
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if (ints & ADMHC_INTR_6) {
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admhc_err(ahcd, "unknown interrupt 6\n");
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admhc_dump(ahcd, 0);
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}
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if (ints & ADMHC_INTR_7) {
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admhc_err(ahcd, "unknown interrupt 7\n");
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admhc_dump(ahcd, 0);
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}
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if (ints & ADMHC_INTR_FATI) {
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admhc_disable(ahcd);
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@ -655,16 +673,17 @@ static irqreturn_t admhc_irq(struct usb_hcd *hcd)
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admhc_intr_ack(ahcd, ADMHC_INTR_RESI);
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hcd->poll_rh = 1;
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if (ahcd->autostop) {
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spin_lock(&ahcd->lock);
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admhc_rh_resume(ahcd);
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spin_unlock(&ahcd->lock);
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} else
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usb_hcd_resume_root_hub(hcd);
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}
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if (ints & ADMHC_INTR_TDC) {
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admhc_intr_ack(ahcd, ADMHC_INTR_TDC);
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admhc_vdbg(ahcd, "Transfer Descriptor Complete\n");
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if (HC_IS_RUNNING(hcd->state))
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admhc_intr_disable(ahcd, ADMHC_INTR_TDC);
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admhc_vdbg(ahcd, "Transfer Descriptor Complete\n");
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spin_lock(&ahcd->lock);
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admhc_td_complete(ahcd);
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spin_unlock(&ahcd->lock);
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@ -674,15 +693,13 @@ static irqreturn_t admhc_irq(struct usb_hcd *hcd)
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if (ints & ADMHC_INTR_SO) {
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/* could track INTR_SO to reduce available PCI/... bandwidth */
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admhc_vdbg(ahcd, "Schedule Overrun\n");
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admhc_err(ahcd, "Schedule Overrun\n");
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}
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if (ints & ADMHC_INTR_SOFI) {
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admhc_intr_ack(ahcd, ADMHC_INTR_SOFI);
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spin_lock(&ahcd->lock);
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/* handle any pending ED removes */
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admhc_finish_unlinks(ahcd, admhc_frame_no(ahcd));
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admhc_sof_refill(ahcd);
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spin_unlock(&ahcd->lock);
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}
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@ -90,6 +90,8 @@ static struct ed *ed_create(struct admhcd *ahcd, unsigned int type, u32 info)
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break;
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}
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info |= ED_SKIP;
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ed->dummy = td;
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ed->state = ED_NEW;
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ed->type = type;
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@ -112,10 +114,8 @@ err:
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static struct ed *ed_get(struct admhcd *ahcd, struct usb_host_endpoint *ep,
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struct usb_device *udev, unsigned int pipe, int interval)
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{
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struct ed *ed;
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unsigned long flags;
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struct ed *ed;
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spin_lock_irqsave(&ahcd->lock, flags);
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ed = ep->hcpriv;
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if (!ed) {
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u32 info;
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@ -133,11 +133,33 @@ static struct ed *ed_get(struct admhcd *ahcd, struct usb_host_endpoint *ep,
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if (ed)
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ep->hcpriv = ed;
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}
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spin_unlock_irqrestore(&ahcd->lock, flags);
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return ed;
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}
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static void ed_next_urb(struct admhcd *ahcd, struct ed *ed)
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{
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struct urb_priv *up;
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u32 carry;
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up = list_entry(ed->urb_pending.next, struct urb_priv, pending);
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list_del(&up->pending);
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ed->urb_active = up;
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ed->state = ED_OPER;
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#ifdef ADMHC_VERBOSE_DEBUG
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urb_print(ahcd, up->urb, "NEXT", 0);
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admhc_dump_ed(ahcd, " ", ed, 0);
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#endif
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up->td[up->td_cnt-1]->hwNextTD = cpu_to_hc32(ahcd, ed->dummy->td_dma);
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carry = hc32_to_cpup(ahcd, &ed->hwHeadP) & ED_C;
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ed->hwHeadP = cpu_to_hc32(ahcd, up->td[0]->td_dma | carry);
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ed->hwINFO &= ~cpu_to_hc32(ahcd, ED_SKIP);
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}
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/* link an ed into the HC chain */
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static int ed_schedule(struct admhcd *ahcd, struct ed *ed)
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{
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@ -146,37 +168,43 @@ static int ed_schedule(struct admhcd *ahcd, struct ed *ed)
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if (admhcd_to_hcd(ahcd)->state == HC_STATE_QUIESCING)
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return -EAGAIN;
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if (ed->state != ED_NEW)
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return 0;
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if (ed->state == ED_NEW) {
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ed->state = ED_IDLE;
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admhc_dump_ed(ahcd, "ED-SCHED", ed, 0);
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old_tail = ahcd->ed_tails[ed->type];
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ed->state = ED_IDLE;
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ed->ed_next = old_tail->ed_next;
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if (ed->ed_next) {
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ed->ed_next->ed_prev = ed;
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ed->hwNextED = cpu_to_hc32(ahcd, ed->ed_next->dma);
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}
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ed->ed_prev = old_tail;
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ed->hwINFO &= ~cpu_to_hc32(ahcd, ED_SKIP);
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old_tail->ed_next = ed;
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old_tail->hwNextED = cpu_to_hc32(ahcd, ed->dma);
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old_tail = ahcd->ed_tails[ed->type];
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ed->ed_next = old_tail->ed_next;
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if (ed->ed_next) {
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ed->ed_next->ed_prev = ed;
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ed->hwNextED = cpu_to_hc32(ahcd, ed->ed_next->dma);
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ahcd->ed_tails[ed->type] = ed;
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ed->hwINFO &= ~cpu_to_hc32(ahcd, ED_SKIP);
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}
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ed->ed_prev = old_tail;
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old_tail->ed_next = ed;
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old_tail->hwNextED = cpu_to_hc32(ahcd, ed->dma);
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#ifdef ADMHC_VERBOSE_DEBUG
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admhc_dump_ed(ahcd, "ED-SCHED", ed, 0);
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#endif
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ahcd->ed_tails[ed->type] = ed;
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admhc_intr_enable(ahcd, ADMHC_INTR_SOFI);
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if (!ed->urb_active) {
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ed_next_urb(ahcd, ed);
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admhc_dma_enable(ahcd);
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}
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return 0;
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}
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static void ed_deschedule(struct admhcd *ahcd, struct ed *ed)
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{
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#ifdef ADMHC_VERBOSE_DEBUG
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admhc_dump_ed(ahcd, "ED-DESCHED", ed, 0);
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#endif
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/* remove this ED from the HC list */
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ed->ed_prev->hwNextED = ed->hwNextED;
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@ -197,16 +225,14 @@ static void ed_deschedule(struct admhcd *ahcd, struct ed *ed)
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static void ed_start_deschedule(struct admhcd *ahcd, struct ed *ed)
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{
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#ifdef ADMHC_VERBOSE_DEBUG
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admhc_dump_ed(ahcd, "ED-UNLINK", ed, 0);
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#endif
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ed->hwINFO |= cpu_to_hc32(ahcd, ED_SKIP);
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ed->state = ED_UNLINK;
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/* add this ED into the remove list */
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ed->ed_rm_next = ahcd->ed_rm_list;
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ahcd->ed_rm_list = ed;
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/* SOF interrupt might get delayed; record the frame counter value that
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* indicates when the HC isn't looking at it, so concurrent unlinks
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* behave. frame_no wraps every 2^16 msec, and changes right before
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@ -214,7 +240,6 @@ static void ed_start_deschedule(struct admhcd *ahcd, struct ed *ed)
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*/
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ed->tick = admhc_frame_no(ahcd) + 1;
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/* enable SOF interrupt */
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admhc_intr_enable(ahcd, ADMHC_INTR_SOFI);
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}
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@ -229,9 +254,9 @@ static void td_fill(struct admhcd *ahcd, u32 info, dma_addr_t data, int len,
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u32 cbl = 0;
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if (up->td_idx >= up->td_cnt) {
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admhc_dbg(ahcd, "td_fill error, idx=%d, cnt=%d\n", up->td_idx,
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admhc_err(ahcd, "td_fill error, idx=%d, cnt=%d\n", up->td_idx,
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up->td_cnt);
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return;
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BUG();
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}
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td = up->td[up->td_idx];
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@ -239,9 +264,7 @@ static void td_fill(struct admhcd *ahcd, u32 info, dma_addr_t data, int len,
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if (!len)
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data = 0;
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#if 1
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if (up->td_idx == up->td_cnt-1)
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#endif
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cbl |= TD_IE;
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if (data)
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@ -446,7 +469,10 @@ static int td_done(struct admhcd *ahcd, struct urb *urb, struct td *td)
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* might not be reported as errors.
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*/
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} else {
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#ifdef ADMHC_VERBOSE_DEBUG
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admhc_dump_td(ahcd, "td_done", td);
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#endif
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/* count all non-empty packets except control SETUP packet */
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if ((type != PIPE_CONTROL || td->index != 0) && dbp != 0) {
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@ -459,122 +485,7 @@ static int td_done(struct admhcd *ahcd, struct urb *urb, struct td *td)
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/*-------------------------------------------------------------------------*/
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static inline struct td *
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ed_halted(struct admhcd *ahcd, struct td *td, int cc, struct td *rev)
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{
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#if 0
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struct urb *urb = td->urb;
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struct ed *ed = td->ed;
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struct list_head *tmp = td->td_list.next;
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__hc32 toggle = ed->hwHeadP & cpu_to_hc32 (ahcd, ED_C);
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admhc_dump_ed(ahcd, "ed halted", td->ed, 1);
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/* clear ed halt; this is the td that caused it, but keep it inactive
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* until its urb->complete() has a chance to clean up.
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*/
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ed->hwINFO |= cpu_to_hc32 (ahcd, ED_SKIP);
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wmb ();
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ed->hwHeadP &= ~cpu_to_hc32 (ahcd, ED_H);
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/* put any later tds from this urb onto the donelist, after 'td',
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* order won't matter here: no errors, and nothing was transferred.
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* also patch the ed so it looks as if those tds completed normally.
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*/
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while (tmp != &ed->td_list) {
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struct td *next;
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__hc32 info;
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next = list_entry(tmp, struct td, td_list);
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tmp = next->td_list.next;
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if (next->urb != urb)
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break;
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/* NOTE: if multi-td control DATA segments get supported,
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* this urb had one of them, this td wasn't the last td
|
||||
* in that segment (TD_R clear), this ed halted because
|
||||
* of a short read, _and_ URB_SHORT_NOT_OK is clear ...
|
||||
* then we need to leave the control STATUS packet queued
|
||||
* and clear ED_SKIP.
|
||||
*/
|
||||
info = next->hwINFO;
|
||||
#if 0 /* FIXME */
|
||||
info |= cpu_to_hc32 (ahcd, TD_DONE);
|
||||
info &= ~cpu_to_hc32 (ahcd, TD_CC);
|
||||
#endif
|
||||
next->hwINFO = info;
|
||||
|
||||
next->next_dl_td = rev;
|
||||
rev = next;
|
||||
|
||||
ed->hwHeadP = next->hwNextTD | toggle;
|
||||
}
|
||||
|
||||
/* help for troubleshooting: report anything that
|
||||
* looks odd ... that doesn't include protocol stalls
|
||||
* (or maybe some other things)
|
||||
*/
|
||||
switch (cc) {
|
||||
case TD_CC_DATAUNDERRUN:
|
||||
if ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0)
|
||||
break;
|
||||
/* fallthrough */
|
||||
case TD_CC_STALL:
|
||||
if (usb_pipecontrol (urb->pipe))
|
||||
break;
|
||||
/* fallthrough */
|
||||
default:
|
||||
admhc_dbg (ahcd,
|
||||
"urb %p path %s ep%d%s %08x cc %d --> status %d\n",
|
||||
urb, urb->dev->devpath,
|
||||
usb_pipeendpoint (urb->pipe),
|
||||
usb_pipein (urb->pipe) ? "in" : "out",
|
||||
hc32_to_cpu(ahcd, td->hwINFO),
|
||||
cc, cc_to_error [cc]);
|
||||
}
|
||||
|
||||
return rev;
|
||||
#else
|
||||
return NULL;
|
||||
#endif
|
||||
}
|
||||
|
||||
/*-------------------------------------------------------------------------*/
|
||||
|
||||
static int ed_next_urb(struct admhcd *ahcd, struct ed *ed)
|
||||
{
|
||||
struct urb_priv *up;
|
||||
u32 carry;
|
||||
|
||||
if (ed->state != ED_IDLE)
|
||||
return 1;
|
||||
|
||||
if (ed->urb_active)
|
||||
return 1;
|
||||
|
||||
if (list_empty(&ed->urb_pending))
|
||||
return 0;
|
||||
|
||||
up = list_entry(ed->urb_pending.next, struct urb_priv, pending);
|
||||
list_del(&up->pending);
|
||||
ed->urb_active = up;
|
||||
ed->state = ED_OPER;
|
||||
|
||||
#ifdef ADMHC_VERBOSE_DEBUG
|
||||
urb_print(ahcd, up->urb, "NEXT", 0);
|
||||
admhc_dump_ed(ahcd, " ", ed, 0);
|
||||
#endif
|
||||
|
||||
up->td[up->td_cnt-1]->hwNextTD = cpu_to_hc32(ahcd, ed->dummy->td_dma);
|
||||
|
||||
carry = hc32_to_cpup(ahcd, &ed->hwHeadP) & ED_C;
|
||||
ed->hwHeadP = cpu_to_hc32(ahcd, up->td[0]->td_dma | carry);
|
||||
ed->hwINFO &= ~cpu_to_hc32(ahcd, ED_SKIP);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
static void ed_update(struct admhcd *ahcd, struct ed *ed, int partial)
|
||||
static void ed_update(struct admhcd *ahcd, struct ed *ed, int force)
|
||||
{
|
||||
struct urb_priv *up;
|
||||
struct urb *urb;
|
||||
@ -588,8 +499,8 @@ static void ed_update(struct admhcd *ahcd, struct ed *ed, int partial)
|
||||
|
||||
#ifdef ADMHC_VERBOSE_DEBUG
|
||||
urb_print(ahcd, urb, "UPDATE", 0);
|
||||
#endif
|
||||
admhc_dump_ed(ahcd, "ED-UPDATE", ed, 1);
|
||||
#endif
|
||||
|
||||
cc = TD_CC_NOERROR;
|
||||
for (; up->td_idx < up->td_cnt; up->td_idx++) {
|
||||
@ -611,7 +522,7 @@ static void ed_update(struct admhcd *ahcd, struct ed *ed, int partial)
|
||||
}
|
||||
}
|
||||
|
||||
if ((up->td_idx != up->td_cnt) && (!partial))
|
||||
if ((up->td_idx != up->td_cnt) && (!force))
|
||||
/* the URB is not completed yet */
|
||||
return;
|
||||
|
||||
@ -637,68 +548,65 @@ static void ed_update(struct admhcd *ahcd, struct ed *ed, int partial)
|
||||
static void admhc_td_complete(struct admhcd *ahcd)
|
||||
{
|
||||
struct ed *ed;
|
||||
int more = 0;
|
||||
|
||||
for (ed = ahcd->ed_head; ed; ed = ed->ed_next) {
|
||||
if (ed->state != ED_OPER)
|
||||
continue;
|
||||
|
||||
if (hc32_to_cpup(ahcd, &ed->hwINFO) & ED_SKIP)
|
||||
continue;
|
||||
|
||||
if (hc32_to_cpup(ahcd, &ed->hwHeadP) & ED_H) {
|
||||
/* TODO */
|
||||
admhc_dump_ed(ahcd, "ed halted", ed, 1);
|
||||
ed_update(ahcd, ed, 1);
|
||||
ed->hwHeadP &= ~cpu_to_hc32(ahcd, ED_H);
|
||||
} else
|
||||
ed_update(ahcd, ed, 0);
|
||||
|
||||
if (ed->urb_active) {
|
||||
more = 1;
|
||||
continue;
|
||||
}
|
||||
|
||||
ed_update(ahcd, ed, 0);
|
||||
if (!(list_empty(&ed->urb_pending))) {
|
||||
more = 1;
|
||||
ed_next_urb(ahcd, ed);
|
||||
continue;
|
||||
}
|
||||
|
||||
ed_start_deschedule(ahcd, ed);
|
||||
}
|
||||
|
||||
if (!more)
|
||||
admhc_dma_disable(ahcd);
|
||||
|
||||
}
|
||||
|
||||
/* there are some urbs/eds to unlink; called in_irq(), with HCD locked */
|
||||
static void admhc_finish_unlinks(struct admhcd *ahcd, u16 tick)
|
||||
{
|
||||
struct ed *ed;
|
||||
int more = 0;
|
||||
|
||||
for (ed = ahcd->ed_head; ed; ed = ed->ed_next) {
|
||||
if (ed->state != ED_UNLINK)
|
||||
continue;
|
||||
|
||||
if (likely(HC_IS_RUNNING(admhcd_to_hcd(ahcd)->state)))
|
||||
if (tick_before(tick, ed->tick))
|
||||
if (tick_before(tick, ed->tick)) {
|
||||
more = 1;
|
||||
continue;
|
||||
}
|
||||
|
||||
/* process partial status */
|
||||
ed_update(ahcd, ed, 1);
|
||||
}
|
||||
}
|
||||
|
||||
static void admhc_sof_refill(struct admhcd *ahcd)
|
||||
{
|
||||
struct ed *ed;
|
||||
int disable_dma = 1;
|
||||
|
||||
for (ed = ahcd->ed_head; ed; ed = ed->ed_next) {
|
||||
|
||||
if (hc32_to_cpup(ahcd, &ed->hwHeadP) & ED_H) {
|
||||
if (ed->urb_active)
|
||||
ed_update(ahcd, ed, 1);
|
||||
ed->hwHeadP &= ~cpu_to_hc32 (ahcd, ED_H);
|
||||
}
|
||||
|
||||
if (ed_next_urb(ahcd, ed)) {
|
||||
disable_dma = 0;
|
||||
} else {
|
||||
struct ed *tmp;
|
||||
tmp = ed->ed_prev;
|
||||
if (list_empty(&ed->urb_pending))
|
||||
ed_deschedule(ahcd, ed);
|
||||
ed = tmp;
|
||||
}
|
||||
else
|
||||
ed_schedule(ahcd, ed);
|
||||
}
|
||||
|
||||
if (disable_dma) {
|
||||
admhc_intr_disable(ahcd, ADMHC_INTR_SOFI);
|
||||
admhc_dma_disable(ahcd);
|
||||
} else {
|
||||
admhc_intr_enable(ahcd, ADMHC_INTR_SOFI);
|
||||
admhc_dma_enable(ahcd);
|
||||
}
|
||||
if (!more)
|
||||
if (likely(HC_IS_RUNNING(admhcd_to_hcd(ahcd)->state)))
|
||||
admhc_intr_disable(ahcd, ADMHC_INTR_SOFI);
|
||||
}
|
||||
|
||||
@ -65,7 +65,6 @@ struct ed {
|
||||
/* host's view of schedule */
|
||||
struct ed *ed_next; /* on schedule list */
|
||||
struct ed *ed_prev; /* for non-interrupt EDs */
|
||||
struct ed *ed_rm_next; /* on rm list */
|
||||
|
||||
/* create --> IDLE --> OPER --> ... --> IDLE --> destroy
|
||||
* usually: OPER --> UNLINK --> (IDLE | OPER) --> ...
|
||||
@ -262,6 +261,8 @@ struct admhcd_regs {
|
||||
*/
|
||||
#define ADMHC_INTR_SOFI (1 << 4) /* start of frame */
|
||||
#define ADMHC_INTR_RESI (1 << 5) /* resume detected */
|
||||
#define ADMHC_INTR_6 (1 << 6) /* unknown */
|
||||
#define ADMHC_INTR_7 (1 << 7) /* unknown */
|
||||
#define ADMHC_INTR_BABI (1 << 8) /* babble detected */
|
||||
#define ADMHC_INTR_INSM (1 << 9) /* root hub status change */
|
||||
#define ADMHC_INTR_SO (1 << 10) /* scheduling overrun */
|
||||
@ -381,8 +382,7 @@ struct admhcd {
|
||||
struct ed *ed_head;
|
||||
struct ed *ed_tails[4];
|
||||
|
||||
struct ed *ed_rm_list; /* to be removed */
|
||||
struct ed *periodic[NUM_INTS]; /* shadow int_table */
|
||||
// struct ed *periodic[NUM_INTS]; /* shadow int_table */
|
||||
|
||||
#if 0 /* TODO: remove? */
|
||||
/*
|
||||
|
||||
@ -237,11 +237,11 @@ CONFIG_TMPFS_POSIX_ACL=y
|
||||
# CONFIG_TOSHIBA_RBTX4938 is not set
|
||||
CONFIG_TRAD_SIGNALS=y
|
||||
# CONFIG_USBPCWATCHDOG is not set
|
||||
# CONFIG_USB_ACM is not set
|
||||
CONFIG_USB_ADM5120_HCD=m
|
||||
# CONFIG_USB_ALI_M5632 is not set
|
||||
# CONFIG_USB_AN2720 is not set
|
||||
# CONFIG_USB_CATC is not set
|
||||
CONFIG_USB_DEBUG=y
|
||||
CONFIG_USB_EHCI_HCD=m
|
||||
# CONFIG_USB_KAWETH is not set
|
||||
# CONFIG_USB_NET_DM9601 is not set
|
||||
|
||||
Loading…
Reference in New Issue
Block a user