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add ar7-2.6 fixes by Stefan Weil

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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@7487 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
nbd
2007-06-04 09:46:30 +00:00
parent e799c14a2d
commit 7fff341bb3
8 changed files with 56 additions and 24 deletions
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12
target/linux/ar7-2.6/files/arch/mips/ar7/clock.c
View File

@@ -174,10 +174,12 @@ static int tnetd7300_get_clock(u32 shift, struct tnetd7300_clock *clock,
{
int product;
int base_clock = ar7_ref_clock;
int prediv = ((clock->ctrl & PREDIV_MASK) >> PREDIV_SHIFT) + 1;
int postdiv = (clock->ctrl & POSTDIV_MASK) + 1;
u32 ctrl = clock->ctrl;
u32 pll = clock->pll;
int prediv = ((ctrl & PREDIV_MASK) >> PREDIV_SHIFT) + 1;
int postdiv = (ctrl & POSTDIV_MASK) + 1;
int divisor = prediv * postdiv;
int mul = ((clock->pll & MUL_MASK) >> MUL_SHIFT) + 1;
int mul = ((pll & MUL_MASK) >> MUL_SHIFT) + 1;
switch ((*bootcr & (BOOT_PLL_SOURCE_MASK << shift)) >> shift) {
case BOOT_PLL_SOURCE_BUS:
@@ -197,10 +199,10 @@ static int tnetd7300_get_clock(u32 shift, struct tnetd7300_clock *clock,
if (*bootcr & BOOT_PLL_BYPASS)
return base_clock / divisor;
if ((clock->pll & PLL_MODE_MASK) == 0)
if ((pll & PLL_MODE_MASK) == 0)
return (base_clock >> (mul / 16 + 1)) / divisor;
if ((clock->pll & (PLL_NDIV | PLL_DIV)) == (PLL_NDIV | PLL_DIV)) {
if ((pll & (PLL_NDIV | PLL_DIV)) == (PLL_NDIV | PLL_DIV)) {
product = (mul & 1) ?
(base_clock * mul) >> 1 :
(base_clock * (mul - 1)) >> 2;

21
target/linux/ar7-2.6/files/arch/mips/ar7/irq.c
View File

@@ -33,17 +33,17 @@
#define REG_OFFSET(irq, reg) ((irq) / 32 * 0x4 + reg * 0x10)
#define SEC_REG_OFFSET(reg) (EXCEPT_OFFSET + reg * 0x8)
#define SR_OFFSET (SEC_REG_OFFSET(0))
#define CR_OFFSET(irq) (REG_OFFSET(irq, 1))
#define SEC_CR_OFFSET (SEC_REG_OFFSET(1))
#define ESR_OFFSET(irq) (REG_OFFSET(irq, 2))
#define SEC_ESR_OFFSET (SEC_REG_OFFSET(2))
#define ECR_OFFSET(irq) (REG_OFFSET(irq, 3))
#define SEC_ECR_OFFSET (SEC_REG_OFFSET(3))
#define SEC_SR_OFFSET (SEC_REG_OFFSET(0)) /* 0x80 */
#define CR_OFFSET(irq) (REG_OFFSET(irq, 1)) /* 0x10 */
#define SEC_CR_OFFSET (SEC_REG_OFFSET(1)) /* 0x88 */
#define ESR_OFFSET(irq) (REG_OFFSET(irq, 2)) /* 0x20 */
#define SEC_ESR_OFFSET (SEC_REG_OFFSET(2)) /* 0x90 */
#define ECR_OFFSET(irq) (REG_OFFSET(irq, 3)) /* 0x30 */
#define SEC_ECR_OFFSET (SEC_REG_OFFSET(3)) /* 0x98 */
#define PIR_OFFSET (0x40)
#define MSR_OFFSET (0x44)
#define PM_OFFSET(irq) (REG_OFFSET(irq, 5))
#define TM_OFFSET(irq) (REG_OFFSET(irq, 6))
#define PM_OFFSET(irq) (REG_OFFSET(irq, 5)) /* 0x50 */
#define TM_OFFSET(irq) (REG_OFFSET(irq, 6)) /* 0x60 */
#define REG(addr) (*(volatile u32 *)(KSEG1ADDR(AR7_REGS_IRQ) + addr))
@@ -59,6 +59,7 @@ static void ar7_irq_init(int base);
static int ar7_irq_base;
static struct irq_chip ar7_irq_type = {
.typename = "AR7",
.name = "AR7",
.unmask = ar7_unmask_irq,
.mask = ar7_mask_irq,
@@ -174,7 +175,7 @@ static irqreturn_t ar7_secondary_cascade(int interrupt, void *dev)
int irq = 0, i;
unsigned long status;
status = REG(SR_OFFSET);
status = REG(SEC_SR_OFFSET);
if (unlikely(!status)) {
spurious_interrupt();
return IRQ_NONE;

1
target/linux/ar7-2.6/files/arch/mips/ar7/prom.c
View File

@@ -246,7 +246,6 @@ static void __init console_config(void)
#ifdef CONFIG_KGDB
strcat(prom_getcmdline(), " console=kgdb");
prom_printf("Please connect GDB to this port\n");
kgdb_enabled = 1;
return;
#endif

5
target/linux/ar7-2.6/files/arch/mips/ar7/vlynq.c
View File

@@ -196,10 +196,11 @@ static irqreturn_t vlynq_irq(int irq, void *dev_id)
}
static struct irq_chip vlynq_irq_chip = {
.typename = "VLYNQ",
.name = "vlynq",
.unmask = vlynq_irq_unmask,
.mask = vlynq_irq_mask,
.set_type = vlynq_irq_type,
.set_type = vlynq_irq_type,
};
static int vlynq_setup_irq(struct vlynq_device *dev)
@@ -235,7 +236,7 @@ static int vlynq_setup_irq(struct vlynq_device *dev)
dev->remote->int_device[i >> 2] = 0;
}
if (request_irq(dev->irq, vlynq_irq, SA_SHIRQ, "AR7 VLYNQ", dev)) {
if (request_irq(dev->irq, vlynq_irq, SA_SHIRQ, "vlynq", dev)) {
printk("%s: request_irq failed\n", dev->dev.bus_id);
return -EAGAIN;
}