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Add definitions, add settings detection for SoCs

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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@6759 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
florian
2007-03-29 22:21:22 +00:00
parent f69503b99e
commit 8194aa23ac
4 changed files with 230 additions and 15 deletions
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60
target/linux/adm5120-2.6/files/include/asm-mips/mach-adm5120/adm5120_defs.h Normal file
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@@ -0,0 +1,60 @@
/*
* $Id$
*
* ADM5120 SoC definitions
*
* This file defines some constants specific to the ADM5120 SoC
*
* Copyright (C) 2007 OpenWrt.org
* Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the
* Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
* Boston, MA 02110-1301, USA.
*/
#ifndef _ADM5120_DEFS_H
#define _ADM5120_DEFS_H
#define ADM5120_SDRAM0_BASE 0x00000000
#define ADM5120_SDRAM1_BASE 0x01000000
#define ADM5120_SRAM1_BASE 0x10000000
#define ADM5120_MPMC_BASE 0x11000000
#define ADM5120_USBC_BASE 0x11200000
#define ADM5120_PCIMEM_BASE 0x11400000
#define ADM5120_PCIIO_BASE 0x11500000
#define ADM5120_PCICFG_ADDR 0x115FFFF0
#define ADM5120_PCICFG_DATA 0x115FFFF8
#define ADM5120_SWITCH_BASE 0x12000000
#define ADM5120_INTC_BASE 0x12200000
#define ADM5120_UART0_BASE 0x12600000
#define ADM5120_UART1_BASE 0x12800000
#define ADM5120_SRAM0_BASE 0x1FC00000
#define ADM5120_MPMC_SIZE 0x1000
#define ADM5120_USBC_SIZE 0x84
#define ADM5120_PCIMEM_SIZE (ADM5120_PCIIO_BASE - ADM5120_PCIMEM_BASE)
#define ADM5120_PCIIO_SIZE (ADM5120_PCICFG_ADDR - ADM5120_PCIIO_BASE)
#define ADM5120_PCICFG_SIZE 0x10
#define ADM5120_SWITCH_SIZE 0x114
#define ADM5120_INTC_SIZE 0x28
#define ADM5120_UART_SIZE 0x20
#define ADM5120_CLK_175 175000000
#define ADM5120_CLK_200 200000000
#define ADM5120_CLK_225 225000000
#define ADM5120_CLK_250 250000000
#define ADM5120_UART_CLOCK 62500000
#endif /* _ADM5120_DEFS_H */

16
target/linux/adm5120-2.6/files/include/asm-mips/mach-adm5120/adm5120_info.h
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@@ -1,7 +1,9 @@
/*
* $Id$
*
* Copyright (C) 2007 OpenWrt.org
* Copyright (C) Gabor Juhos
*
* Copyright (C) Gabor Juhos <juhosg@freemail.hu>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
@@ -14,8 +16,11 @@
#include <linux/types.h>
struct adm5120_info {
unsigned long cpu_speed;
unsigned int product_code;
unsigned int revision;
unsigned int cpu_package;
unsigned int nand_boot;
unsigned long cpu_speed;
unsigned int boot_loader;
unsigned int board_type;
};
@@ -49,4 +54,9 @@ struct adm5120_info {
extern struct adm5120_info adm5120_info;
extern void adm5120_info_init(void);
static inline int adm5120_has_pci(void)
{
return (adm5120_info.cpu_package == CPU_PACKAGE_BGA);
}
#endif /* _ADM5120_INFO_H */

89
target/linux/adm5120-2.6/files/include/asm-mips/mach-adm5120/adm5120_switch.h Normal file
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@@ -0,0 +1,89 @@
/*
* ADM5120 ethernet switch definitions
*
* This header file defines the hardware registers of the ADM5120 SoC
* built-in Ethernet switch.
*
* Copyright (C) 2007 OpenWrt.org
* Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the
* Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
* Boston, MA 02110-1301, USA.
*/
#ifndef _ADM5120_SWITCH_H
#define _ADM5120_SWITCH_H
#define BITMASK(len) ((1 << (len))-1)
#define ONEBIT(at) (1 << (at))
/* Switch register offsets */
#define SWITCH_REG_CODE 0x0000
#define SWITCH_REG_SOFT_RESET 0x0004
#define SWITCH_REG_MEMCTRL 0x001C
#define SWITCH_REG_CPUP_CONF 0x0024
#define SWITCH_REG_PORT_CONF0 0x0028
#define SWITCH_REG_PORT_CONF1 0x002C
#define SWITCH_REG_PORT_CONF2 0x0030
#define SWITCH_REG_VLAN_G1 0x0040
#define SWITCH_REG_VLAN_G2 0x0044
#define SWITCH_REG_SEND_TRIG 0x0048
#define SWITCH_REG_MAC_WT0 0x0058
#define SWITCH_REG_MAC_WT1 0x005C
#define SWITCH_REG_PHY_CNTL0 0x0068
#define SWITCH_REG_PHY_CNTL1 0x006C
#define SWITCH_REG_PHY_CNTL2 0x007C
#define SWITCH_REG_PHY_CNTL3 0x0080
#define SWITCH_REG_PRI_CNTL 0x0084
#define SWITCH_REG_INT_STATUS 0x00B0
#define SWITCH_REG_INT_MASK 0x00B4
#define SWITCH_REG_GPIO_CONF0 0x00B8
#define SWITCH_REG_GPIO_CONF2 0x00BC
#define SWITCH_REG_WDOG0 0x00C0
#define SWITCH_REG_WDOG1 0x00C4
#define SWITCH_REG_PHY_CNTL4 0x00A0
#define SWITCH_REG_SEND_HBADDR 0x00D0
#define SWITCH_REG_SEND_LBADDR 0x00D4
#define SWITCH_REG_RECV_HBADDR 0x00D8
#define SWITCH_REG_RECV_LBADDR 0x00DC
#define SWITCH_REG_TIMER_INT 0x00F0
#define SWITCH_REG_TIMER 0x00F4
#define SWITCH_REG_PORT0_LED 0x0100
#define SWITCH_REG_PORT1_LED 0x0104
#define SWITCH_REG_PORT2_LED 0x0108
#define SWITCH_REG_PORT3_LED 0x010C
#define SWITCH_REG_PORT4_LED 0x0110
/* CODE register bits */
#define CODE_PC_MASK BITMASK(16) /* Product Code */
#define CODE_REV_SHIFT 16
#define CODE_REV_MASK BITMASK(4) /* Product Revision */
#define CODE_CLKS_SHIFT 20
#define CODE_CLKS_MASK BITMASK(2) /* Clock Speed */
#define CODE_CLKS_175 0 /* 175 MHz */
#define CODE_CLKS_200 1 /* 200 MHz */
#define CODE_CLKS_225 2 /* 225 MHz */
#define CODE_CLKS_250 3 /* 250 MHz */
#define CODE_NAB ONEBIT(24) /* NAND boot */
#define CODE_PK_MASK BITMASK(1) /* Package type */
#define CODE_PK_SHIFT 29
#define CODE_PK_BGA 0 /* BGA package */
#define CODE_PK_PQFP 1 /* PQFP package */
#endif /* _ADM5120_SWITCH_H */