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ar71xx: AR724[12] requires different USB setup
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@23135 3c298f89-4303-0410-b956-a3cf2f4a3e73
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@ -128,16 +128,26 @@ static void __init ar7240_usb_setup(void)
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/* WAR for HW bug. Here it adjusts the duration between two SOFS */
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/* WAR for HW bug. Here it adjusts the duration between two SOFS */
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ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x3);
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ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x3);
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if (ar71xx_soc == AR71XX_SOC_AR7241 || ar71xx_soc == AR71XX_SOC_AR7242) {
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ar71xx_ohci_device.resource = ar7240_ohci_resources;
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ar71xx_ohci_device.num_resources = ARRAY_SIZE(ar7240_ohci_resources);
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platform_device_register(&ar71xx_ohci_device);
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}
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static void __init ar7241_usb_setup(void)
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{
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ar71xx_device_start(AR724X_RESET_USBSUS_OVERRIDE);
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mdelay(10);
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ar71xx_device_start(AR724X_RESET_USB_HOST);
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mdelay(10);
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ar71xx_device_start(AR724X_RESET_USB_PHY);
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mdelay(10);
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ar71xx_ehci_data.is_ar91xx = 1;
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ar71xx_ehci_data.is_ar91xx = 1;
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ar71xx_ehci_device.resource = ar7240_ohci_resources;
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ar71xx_ehci_device.resource = ar7240_ohci_resources;
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ar71xx_ehci_device.num_resources = ARRAY_SIZE(ar7240_ohci_resources);
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ar71xx_ehci_device.num_resources = ARRAY_SIZE(ar7240_ohci_resources);
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platform_device_register(&ar71xx_ehci_device);
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platform_device_register(&ar71xx_ehci_device);
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} else {
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ar71xx_ohci_device.resource = ar7240_ohci_resources;
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ar71xx_ohci_device.num_resources = ARRAY_SIZE(ar7240_ohci_resources);
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platform_device_register(&ar71xx_ohci_device);
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}
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}
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}
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static void __init ar91xx_usb_setup(void)
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static void __init ar91xx_usb_setup(void)
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@ -159,9 +169,12 @@ void __init ar71xx_add_device_usb(void)
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{
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{
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switch (ar71xx_soc) {
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switch (ar71xx_soc) {
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case AR71XX_SOC_AR7240:
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case AR71XX_SOC_AR7240:
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ar7240_usb_setup();
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break;
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case AR71XX_SOC_AR7241:
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case AR71XX_SOC_AR7241:
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case AR71XX_SOC_AR7242:
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case AR71XX_SOC_AR7242:
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ar7240_usb_setup();
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ar7241_usb_setup();
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break;
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break;
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case AR71XX_SOC_AR7130:
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case AR71XX_SOC_AR7130:
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@ -432,6 +432,9 @@ void ar71xx_ddr_flush(u32 reg);
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#define AR724X_RESET_PCIE_PHY_SERIAL BIT(10)
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#define AR724X_RESET_PCIE_PHY_SERIAL BIT(10)
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#define AR724X_RESET_PCIE_PHY BIT(7)
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#define AR724X_RESET_PCIE_PHY BIT(7)
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#define AR724X_RESET_PCIE BIT(6)
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#define AR724X_RESET_PCIE BIT(6)
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#define AR724X_RESET_USB_HOST BIT(5)
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#define AR724X_RESET_USB_PHY BIT(4)
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#define AR724X_RESET_USBSUS_OVERRIDE BIT(3)
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#define REV_ID_MAJOR_MASK 0xfff0
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#define REV_ID_MAJOR_MASK 0xfff0
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#define REV_ID_MAJOR_AR71XX 0x00a0
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#define REV_ID_MAJOR_AR71XX 0x00a0
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