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ramips: implement clock API for RT305X
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@25124 3c298f89-4303-0410-b956-a3cf2f4a3e73
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@@ -1,7 +1,7 @@
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/*
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* Ralink RT305x SoC specific setup
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*
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* Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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*
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* Parts of this file are based on Ralink's 2.6.21 BSP
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@@ -20,12 +20,6 @@
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#include <asm/mach-ralink/rt305x.h>
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#include <asm/mach-ralink/rt305x_regs.h>
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unsigned long rt305x_cpu_freq;
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EXPORT_SYMBOL_GPL(rt305x_cpu_freq);
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unsigned long rt305x_sys_freq;
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EXPORT_SYMBOL_GPL(rt305x_sys_freq);
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void __iomem * rt305x_sysc_base;
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void __iomem * rt305x_memc_base;
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@@ -49,25 +43,6 @@ void __init rt305x_detect_sys_type(void)
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(id & CHIP_ID_REV_MASK));
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}
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void __init rt305x_detect_sys_freq(void)
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{
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u32 t;
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t = rt305x_sysc_rr(SYSC_REG_SYSTEM_CONFIG);
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t = ((t >> SYSTEM_CONFIG_CPUCLK_SHIFT) & SYSTEM_CONFIG_CPUCLK_MASK);
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switch (t) {
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case SYSTEM_CONFIG_CPUCLK_320:
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rt305x_cpu_freq = 320000000;
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break;
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case SYSTEM_CONFIG_CPUCLK_384:
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rt305x_cpu_freq = 384000000;
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break;
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}
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rt305x_sys_freq = rt305x_cpu_freq / 3;
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}
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static void rt305x_gpio_reserve(int first, int last)
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{
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for (; first <= last; first++)
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