mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2025-04-21 12:27:27 +03:00
ar71xx: merge 3.2 fixes
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@30406 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
@@ -12,7 +12,10 @@
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*
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*/
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/spinlock.h>
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@@ -20,7 +23,8 @@
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#include <linux/platform_device.h>
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#include <linux/spi/spi.h>
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#include <asm/mach-ar71xx/ar71xx.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include <asm/mach-ath79/ath79.h>
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#define DRV_NAME "rb4xx-spi"
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#define DRV_DESC "Mikrotik RB4xx SPI controller driver"
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@@ -41,13 +45,16 @@ struct rb4xx_spi {
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unsigned spi_ctrl_flash;
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unsigned spi_ctrl_fread;
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struct clk *ahb_clk;
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unsigned long ahb_freq;
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spinlock_t lock;
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struct list_head queue;
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int busy:1;
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int cs_wait;
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};
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static unsigned spi_clk_low = SPI_IOC_CS1;
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static unsigned spi_clk_low = AR71XX_SPI_IOC_CS1;
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#ifdef RB4XX_SPI_DEBUG
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static inline void do_spi_delay(void)
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@@ -60,10 +67,11 @@ static inline void do_spi_delay(void) { }
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static inline void do_spi_init(struct spi_device *spi)
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{
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unsigned cs = SPI_IOC_CS0 | SPI_IOC_CS1;
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unsigned cs = AR71XX_SPI_IOC_CS0 | AR71XX_SPI_IOC_CS1;
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if (!(spi->mode & SPI_CS_HIGH))
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cs ^= (spi->chip_select == 2) ? SPI_IOC_CS1 : SPI_IOC_CS0;
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cs ^= (spi->chip_select == 2) ? AR71XX_SPI_IOC_CS1 :
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AR71XX_SPI_IOC_CS0;
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spi_clk_low = cs;
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}
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@@ -71,17 +79,18 @@ static inline void do_spi_init(struct spi_device *spi)
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static inline void do_spi_finish(void __iomem *base)
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{
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do_spi_delay();
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__raw_writel(SPI_IOC_CS0 | SPI_IOC_CS1, base + SPI_REG_IOC);
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__raw_writel(AR71XX_SPI_IOC_CS0 | AR71XX_SPI_IOC_CS1,
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base + AR71XX_SPI_REG_IOC);
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}
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static inline void do_spi_clk(void __iomem *base, int bit)
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{
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unsigned bval = spi_clk_low | ((bit & 1) ? SPI_IOC_DO : 0);
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unsigned bval = spi_clk_low | ((bit & 1) ? AR71XX_SPI_IOC_DO : 0);
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do_spi_delay();
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__raw_writel(bval, base + SPI_REG_IOC);
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__raw_writel(bval, base + AR71XX_SPI_REG_IOC);
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do_spi_delay();
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__raw_writel(bval | SPI_IOC_CLK, base + SPI_REG_IOC);
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__raw_writel(bval | AR71XX_SPI_IOC_CLK, base + AR71XX_SPI_REG_IOC);
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}
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static void do_spi_byte(void __iomem *base, unsigned char byte)
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@@ -97,19 +106,19 @@ static void do_spi_byte(void __iomem *base, unsigned char byte)
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pr_debug("spi_byte sent 0x%02x got 0x%02x\n",
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(unsigned)byte,
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(unsigned char)__raw_readl(base + SPI_REG_RDS));
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(unsigned char)__raw_readl(base + AR71XX_SPI_REG_RDS));
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}
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static inline void do_spi_clk_fast(void __iomem *base, unsigned bit1,
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unsigned bit2)
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{
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unsigned bval = (spi_clk_low |
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((bit1 & 1) ? SPI_IOC_DO : 0) |
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((bit2 & 1) ? SPI_IOC_CS2 : 0));
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((bit1 & 1) ? AR71XX_SPI_IOC_DO : 0) |
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((bit2 & 1) ? AR71XX_SPI_IOC_CS2 : 0));
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do_spi_delay();
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__raw_writel(bval, base + SPI_REG_IOC);
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__raw_writel(bval, base + AR71XX_SPI_REG_IOC);
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do_spi_delay();
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__raw_writel(bval | SPI_IOC_CLK, base + SPI_REG_IOC);
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__raw_writel(bval | AR71XX_SPI_IOC_CLK, base + AR71XX_SPI_REG_IOC);
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}
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static void do_spi_byte_fast(void __iomem *base, unsigned char byte)
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@@ -121,7 +130,7 @@ static void do_spi_byte_fast(void __iomem *base, unsigned char byte)
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pr_debug("spi_byte_fast sent 0x%02x got 0x%02x\n",
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(unsigned)byte,
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(unsigned char) __raw_readl(base + SPI_REG_RDS));
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(unsigned char) __raw_readl(base + AR71XX_SPI_REG_RDS));
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}
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static int rb4xx_spi_txrx(void __iomem *base, struct spi_transfer *t)
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@@ -150,9 +159,9 @@ static int rb4xx_spi_txrx(void __iomem *base, struct spi_transfer *t)
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do_spi_byte(base, sdata);
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if (rx_ptr) {
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rx_ptr[i] = __raw_readl(base + SPI_REG_RDS) & 0xff;
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rx_ptr[i] = __raw_readl(base + AR71XX_SPI_REG_RDS) & 0xff;
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} else if (rxv_ptr) {
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unsigned char c = __raw_readl(base + SPI_REG_RDS);
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unsigned char c = __raw_readl(base + AR71XX_SPI_REG_RDS);
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if (rxv_ptr[i] != c)
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return i;
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}
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@@ -201,9 +210,9 @@ static int rb4xx_spi_read_fast(struct rb4xx_spi *rbspi,
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if (t->tx_buf && !t->verify)
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return -1;
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__raw_writel(SPI_FS_GPIO, base + SPI_REG_FS);
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__raw_writel(rbspi->spi_ctrl_fread, base + SPI_REG_CTRL);
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__raw_writel(0, base + SPI_REG_FS);
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__raw_writel(AR71XX_SPI_FS_GPIO, base + AR71XX_SPI_REG_FS);
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__raw_writel(rbspi->spi_ctrl_fread, base + AR71XX_SPI_REG_CTRL);
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__raw_writel(0, base + AR71XX_SPI_REG_FS);
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if (t->rx_buf) {
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memcpy(t->rx_buf, (const void *)addr, t->len);
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@@ -216,9 +225,9 @@ static int rb4xx_spi_read_fast(struct rb4xx_spi *rbspi,
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m->actual_length += t->len;
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if (rbspi->spi_ctrl_flash != rbspi->spi_ctrl_fread) {
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__raw_writel(SPI_FS_GPIO, base + SPI_REG_FS);
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__raw_writel(rbspi->spi_ctrl_flash, base + SPI_REG_CTRL);
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__raw_writel(0, base + SPI_REG_FS);
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__raw_writel(AR71XX_SPI_FS_GPIO, base + AR71XX_SPI_REG_FS);
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__raw_writel(rbspi->spi_ctrl_flash, base + AR71XX_SPI_REG_CTRL);
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__raw_writel(0, base + AR71XX_SPI_REG_FS);
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}
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return 0;
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@@ -237,8 +246,8 @@ static int rb4xx_spi_msg(struct rb4xx_spi *rbspi, struct spi_message *m)
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if (rb4xx_spi_read_fast(rbspi, m) == 0)
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return -1;
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__raw_writel(SPI_FS_GPIO, base + SPI_REG_FS);
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__raw_writel(SPI_CTRL_FASTEST, base + SPI_REG_CTRL);
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__raw_writel(AR71XX_SPI_FS_GPIO, base + AR71XX_SPI_REG_FS);
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__raw_writel(SPI_CTRL_FASTEST, base + AR71XX_SPI_REG_CTRL);
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do_spi_init(m->spi);
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list_for_each_entry(t, &m->transfers, transfer_list) {
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@@ -262,8 +271,8 @@ static int rb4xx_spi_msg(struct rb4xx_spi *rbspi, struct spi_message *m)
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}
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do_spi_finish(base);
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__raw_writel(rbspi->spi_ctrl_flash, base + SPI_REG_CTRL);
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__raw_writel(0, base + SPI_REG_FS);
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__raw_writel(rbspi->spi_ctrl_flash, base + AR71XX_SPI_REG_CTRL);
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__raw_writel(0, base + AR71XX_SPI_REG_FS);
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return -1;
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}
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@@ -352,11 +361,12 @@ static int rb4xx_spi_setup(struct spi_device *spi)
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return 0;
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}
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static unsigned get_spi_ctrl(unsigned hz_max, const char *name)
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static unsigned get_spi_ctrl(struct rb4xx_spi *rbspi, unsigned hz_max,
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const char *name)
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{
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unsigned div;
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div = (ar71xx_ahb_freq - 1) / (2 * hz_max);
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div = (rbspi->ahb_freq - 1) / (2 * hz_max);
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/*
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* CPU has a bug at (div == 0) - first bit read is random
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@@ -365,7 +375,7 @@ static unsigned get_spi_ctrl(unsigned hz_max, const char *name)
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++div;
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if (name) {
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unsigned ahb_khz = (ar71xx_ahb_freq + 500) / 1000;
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unsigned ahb_khz = (rbspi->ahb_freq + 500) / 1000;
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unsigned div_real = 2 * (div + 1);
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pr_debug("rb4xx: %s SPI clock %u kHz (AHB %u kHz / %u)\n",
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name,
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@@ -396,23 +406,40 @@ static int rb4xx_spi_probe(struct platform_device *pdev)
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master->transfer = rb4xx_spi_transfer;
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rbspi = spi_master_get_devdata(master);
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rbspi->ahb_clk = clk_get(&pdev->dev, "ahb");
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if (IS_ERR(rbspi->ahb_clk)) {
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err = PTR_ERR(rbspi->ahb_clk);
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goto err_put_master;
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}
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err = clk_enable(rbspi->ahb_clk);
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if (err)
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goto err_clk_put;
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rbspi->ahb_freq = clk_get_rate(rbspi->ahb_clk);
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if (!rbspi->ahb_freq) {
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err = -EINVAL;
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goto err_clk_disable;
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}
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platform_set_drvdata(pdev, rbspi);
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (r == NULL) {
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err = -ENOENT;
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goto err_put_master;
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goto err_clk_disable;
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}
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rbspi->base = ioremap(r->start, r->end - r->start + 1);
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if (!rbspi->base) {
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err = -ENXIO;
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goto err_put_master;
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goto err_clk_disable;
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}
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rbspi->master = master;
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rbspi->spi_ctrl_flash = get_spi_ctrl(SPI_FLASH_HZ, "FLASH");
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rbspi->spi_ctrl_fread = get_spi_ctrl(SPI_CPLD_HZ, "CPLD");
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rbspi->spi_ctrl_flash = get_spi_ctrl(rbspi, SPI_FLASH_HZ, "FLASH");
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rbspi->spi_ctrl_fread = get_spi_ctrl(rbspi, SPI_CPLD_HZ, "CPLD");
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rbspi->cs_wait = -1;
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spin_lock_init(&rbspi->lock);
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@@ -428,6 +455,10 @@ static int rb4xx_spi_probe(struct platform_device *pdev)
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err_iounmap:
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iounmap(rbspi->base);
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err_clk_disable:
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clk_disable(rbspi->ahb_clk);
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err_clk_put:
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clk_put(rbspi->ahb_clk);
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err_put_master:
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platform_set_drvdata(pdev, NULL);
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spi_master_put(master);
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@@ -440,6 +471,8 @@ static int rb4xx_spi_remove(struct platform_device *pdev)
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struct rb4xx_spi *rbspi = platform_get_drvdata(pdev);
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iounmap(rbspi->base);
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clk_disable(rbspi->ahb_clk);
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clk_put(rbspi->ahb_clk);
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platform_set_drvdata(pdev, NULL);
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spi_master_put(rbspi->master);
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