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git://projects.qi-hardware.com/openwrt-xburst.git
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more cleanup
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@6309 3c298f89-4303-0410-b956-a3cf2f4a3e73
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@ -76,7 +76,6 @@
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#define BOARD_IDX_STATIC 0
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#define BOARD_IDX_OVERFLOW -1
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#include "platform.h"
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#include "dma.h"
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#include "ar2313.h"
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@ -4,7 +4,6 @@
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#include <linux/autoconf.h>
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#include <asm/bootinfo.h>
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#include <ar531x_platform.h>
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#include "platform.h"
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/*
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* probe link timer - 5 secs
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@ -48,14 +47,53 @@ static inline int tx_space (u32 csm, u32 prd)
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#define AR2313_SYNC 12
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struct ar2313_cmd {
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u32 cmd;
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u32 address; /* virtual address of image */
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u32 length; /* size of image to download */
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u32 mailbox; /* mailbox to get/set */
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u32 data[2]; /* contents of mailbox to read/write */
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};
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//
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// New Combo structure for Both Eth0 AND eth1
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//
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typedef struct {
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volatile unsigned int mac_control; /* 0x00 */
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volatile unsigned int mac_addr[2]; /* 0x04 - 0x08*/
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volatile unsigned int mcast_table[2]; /* 0x0c - 0x10 */
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volatile unsigned int mii_addr; /* 0x14 */
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volatile unsigned int mii_data; /* 0x18 */
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volatile unsigned int flow_control; /* 0x1c */
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volatile unsigned int vlan_tag; /* 0x20 */
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volatile unsigned int pad[7]; /* 0x24 - 0x3c */
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volatile unsigned int ucast_table[8]; /* 0x40-0x5c */
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} ETHERNET_STRUCT;
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/********************************************************************
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* Interrupt controller
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********************************************************************/
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typedef struct {
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volatile unsigned int wdog_control; /* 0x08 */
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volatile unsigned int wdog_timer; /* 0x0c */
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volatile unsigned int misc_status; /* 0x10 */
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volatile unsigned int misc_mask; /* 0x14 */
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volatile unsigned int global_status; /* 0x18 */
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volatile unsigned int reserved; /* 0x1c */
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volatile unsigned int reset_control; /* 0x20 */
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} INTERRUPT;
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/********************************************************************
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* DMA controller
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********************************************************************/
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typedef struct {
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volatile unsigned int bus_mode; /* 0x00 (CSR0) */
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volatile unsigned int xmt_poll; /* 0x04 (CSR1) */
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volatile unsigned int rcv_poll; /* 0x08 (CSR2) */
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volatile unsigned int rcv_base; /* 0x0c (CSR3) */
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volatile unsigned int xmt_base; /* 0x10 (CSR4) */
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volatile unsigned int status; /* 0x14 (CSR5) */
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volatile unsigned int control; /* 0x18 (CSR6) */
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volatile unsigned int intr_ena; /* 0x1c (CSR7) */
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volatile unsigned int rcv_missed; /* 0x20 (CSR8) */
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volatile unsigned int reserved[11]; /* 0x24-0x4c (CSR9-19) */
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volatile unsigned int cur_tx_buf_addr; /* 0x50 (CSR20) */
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volatile unsigned int cur_rx_buf_addr; /* 0x50 (CSR21) */
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} DMA;
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/*
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* Struct private for the Sibyte.
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@ -1,17 +0,0 @@
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#ifndef _AR2313_MSG_H_
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#define _AR2313_MSG_H_
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#define AR2313_MTU 1692
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#define AR2313_PRIOS 1
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#define AR2313_QUEUES (2*AR2313_PRIOS)
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#define AR2313_DESCR_ENTRIES 64
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typedef struct {
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volatile unsigned int status; // OWN, Device control and status.
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volatile unsigned int devcs; // pkt Control bits + Length
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volatile unsigned int addr; // Current Address.
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volatile unsigned int descr; // Next descriptor in chain.
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} ar2313_descr_t;
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#endif /* _AR2313_MSG_H_ */
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@ -1,68 +0,0 @@
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/********************************************************************************
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Title: $Source: platform.h,v $
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Author: Dan Steinberg
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Copyright Integrated Device Technology 2001
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Purpose: AR2313 Register/Bit Definitions
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Update:
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$Log: platform.h,v $
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Notes: See Merlot architecture spec for complete details. Note, all
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addresses are virtual addresses in kseg1 (Uncached, Unmapped).
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********************************************************************************/
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#ifndef PLATFORM_H
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#define PLATFORM_H
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//
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// New Combo structure for Both Eth0 AND eth1
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//
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typedef struct {
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volatile unsigned int mac_control; /* 0x00 */
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volatile unsigned int mac_addr[2]; /* 0x04 - 0x08*/
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volatile unsigned int mcast_table[2]; /* 0x0c - 0x10 */
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volatile unsigned int mii_addr; /* 0x14 */
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volatile unsigned int mii_data; /* 0x18 */
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volatile unsigned int flow_control; /* 0x1c */
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volatile unsigned int vlan_tag; /* 0x20 */
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volatile unsigned int pad[7]; /* 0x24 - 0x3c */
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volatile unsigned int ucast_table[8]; /* 0x40-0x5c */
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} ETHERNET_STRUCT;
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/********************************************************************
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* Interrupt controller
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********************************************************************/
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typedef struct {
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volatile unsigned int wdog_control; /* 0x08 */
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volatile unsigned int wdog_timer; /* 0x0c */
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volatile unsigned int misc_status; /* 0x10 */
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volatile unsigned int misc_mask; /* 0x14 */
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volatile unsigned int global_status; /* 0x18 */
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volatile unsigned int reserved; /* 0x1c */
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volatile unsigned int reset_control; /* 0x20 */
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} INTERRUPT;
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/********************************************************************
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* DMA controller
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********************************************************************/
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typedef struct {
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volatile unsigned int bus_mode; /* 0x00 (CSR0) */
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volatile unsigned int xmt_poll; /* 0x04 (CSR1) */
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volatile unsigned int rcv_poll; /* 0x08 (CSR2) */
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volatile unsigned int rcv_base; /* 0x0c (CSR3) */
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volatile unsigned int xmt_base; /* 0x10 (CSR4) */
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volatile unsigned int status; /* 0x14 (CSR5) */
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volatile unsigned int control; /* 0x18 (CSR6) */
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volatile unsigned int intr_ena; /* 0x1c (CSR7) */
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volatile unsigned int rcv_missed; /* 0x20 (CSR8) */
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volatile unsigned int reserved[11]; /* 0x24-0x4c (CSR9-19) */
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volatile unsigned int cur_tx_buf_addr; /* 0x50 (CSR20) */
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volatile unsigned int cur_rx_buf_addr; /* 0x50 (CSR21) */
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} DMA;
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#endif /* PLATFORM_H */
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