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[brcm63xx] prepare for SPI controller driver

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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@14755 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
florian
2009-03-06 01:15:00 +00:00
parent 493a9bf37a
commit 8bd259b281
5 changed files with 252 additions and 0 deletions
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114
target/linux/brcm63xx/files/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h
View File

@@ -289,6 +289,120 @@ static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set)
return 0;
}
/*
* SPI register layout is not compatible
* accross CPU versions but it is software
* compatible
*/
enum bcm63xx_regs_spi {
SPI_CMD,
SPI_INT_STATUS,
SPI_INT_MASK_ST,
SPI_INT_MASK,
SPI_ST,
SPI_CLK_CFG,
SPI_FILL_BYTE,
SPI_MSG_TAIL,
SPI_RX_TAIL,
SPI_MSG_CTL,
SPI_MSG_DATA,
SPI_RX_DATA,
};
extern const unsigned long *bcm63xx_regs_spi;
static inline unsigned long bcm63xx_spireg(enum bcm63xx_regs_spi reg)
{
#ifdef BCMCPU_RUNTIME_DETECT
return bcm63xx_regs_spi[reg];
#else
#ifdef CONFIG_BCM63XX_CPU_6338
switch (reg) {
case SPI_CMD:
return SPI_BCM_6338_SPI_CMD;
case SPI_INT_STATUS:
return SPI_BCM_6338_SPI_INT_STATUS;
case SPI_INT_MASK_ST:
return SPI_BCM_6338_SPI_MASK_INT_ST;
case SPI_INT_MASK:
return SPI_BCM_6338_SPI_INT_MASK;
case SPI_ST:
return SPI_BCM_6338_SPI_ST;
case SPI_CLK_CFG:
return SPI_BCM_6338_SPI_CLK_CFG;
case SPI_FILL_BYTE:
return SPI_BCM_6338_SPI_FILL_BYTE;
case SPI_MSG_TAIL:
return SPI_BCM_6338_SPI_MSG_TAIL;
case SPI_RX_TAIL:
return SPI_BCM_6338_SPI_RX_TAIL;
case SPI_MSG_CTL:
return SPI_BCM_6338_SPI_MSG_CTL;
case SPI_MSG_DATA:
return SPI_BCM_6338_SPI_MSG_DATA;
case SPI_RX_DATA:
return SPI_BCM_6338_SPI_RX_DATA;
}
#endif
#ifdef CONFIG_BCM63XX_CPU_6348
switch (reg) {
case SPI_CMD:
return SPI_BCM_6348_SPI_CMD;
case SPI_INT_MASK_ST:
return SPI_BCM_6348_SPI_MASK_INT_ST;
case SPI_INT_STATUS:
return SPI_BCM_6348_SPI_INT_STATUS;
case SPI_ST:
return SPI_BCM_6348_SPI_ST;
case SPI_CLK_CFG:
return SPI_BCM_6348_SPI_CLK_CFG;
case SPI_FILL_BYTE:
return SPI_BCM_6348_SPI_FILL_BYTE;
case SPI_MSG_TAIL:
return SPI_BCM_6348_SPI_MSG_TAIL;
case SPI_RX_TAIL:
return SPI_BCM_6348_SPI_RX_TAIL;
case SPI_MSG_CTL:
return SPI_BCM_6348_SPI_MSG_CTL;
case SPI_MSG_DATA:
return SPI_BCM_6348_SPI_MSG_DATA;
case SPI_BCM_6348_SPI_RX_DATA:
return SPI_BCM_6348_SPI_RX_DATA;
}
#endif
#ifdef CONFIG_BCM63XX_CPU_6358
switch (reg) {
case SPI_CMD:
return SPI_BCM_6358_SPI_CMD;
case SPI_INT_STATUS:
return SPI_BCM_6358_SPI_INT_STATUS;
case SPI_INT_MASK_ST:
return SPI_BCM_6358_SPI_MASK_INT_ST;
case SPI_INT_MASK:
return SPI_BCM_6358_SPI_INT_MASK;
case SPI_ST:
return SPI_BCM_6358_SPI_STATUS;
case SPI_CLK_CFG:
return SPI_BCM_6358_SPI_CLK_CFG;
case SPI_FILL_BYTE:
return SPI_BCM_6358_SPI_FILL_BYTE;
case SPI_MSG_TAIL:
return SPI_BCM_6358_SPI_MSG_TAIL;
case SPI_RX_TAIL:
return SPI_BCM_6358_SPI_RX_TAIL;
case SPI_MSG_CTL:
return SPI_BCM_6358_MSG_CTL;
case SPI_MSG_DATA:
return SPI_BCM_6358_SPI_MSG_DATA;
case SPI_RX_DATA:
return SPI_BCM_6358_SPI_RX_FIFO;
}
#endif
#endif
return 0;
}
/*
* IRQ number changes across CPU too
*/