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Add ar7-2.6 port (marked as broken for now).

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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@6600 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
ejka
2007-03-18 09:40:51 +00:00
parent 865cfde1ef
commit 8c72b797b4
33 changed files with 5058 additions and 0 deletions
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15
target/linux/ar7-2.6/files/arch/mips/ar7/Makefile Normal file
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@@ -0,0 +1,15 @@
obj-y := \
prom.o \
setup.o \
memory.o \
irq.o \
time.o \
platform.o \
gpio.o \
vlynq.o
obj-$(CONFIG_PCI) += \
vlynq-pci.o
EXTRA_AFLAGS := $(CFLAGS)

56
target/linux/ar7-2.6/files/arch/mips/ar7/gpio.c Normal file
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@@ -0,0 +1,56 @@
/*
* $Id$
*
* Copyright (C) 2007 OpenWrt.org
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/init.h>
#include <linux/types.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <asm/addrspace.h>
#include <asm/io.h>
#include <asm/ar7/ar7.h>
#include <asm/ar7/gpio.h>
static char *ar7_gpio_list[AR7_GPIO_MAX] = { 0, };
int gpio_request(unsigned gpio, char *label)
{
if (gpio >= AR7_GPIO_MAX)
return -EINVAL;
if (ar7_gpio_list[gpio])
return -EBUSY;
if (label) {
ar7_gpio_list[gpio] = label;
} else {
ar7_gpio_list[gpio] = "busy";
}
return 0;
}
EXPORT_SYMBOL(gpio_request);
void gpio_free(unsigned gpio)
{
BUG_ON(!ar7_gpio_list[gpio]);
ar7_gpio_list[gpio] = NULL;
}
EXPORT_SYMBOL(gpio_free);

160
target/linux/ar7-2.6/files/arch/mips/ar7/irq.c Normal file
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/*
* $Id$
*
* Copyright (C) 2006, 2007 OpenWrt.org
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <asm/irq.h>
#include <asm/irq_cpu.h>
#include <asm/mipsregs.h>
#include <asm/ar7/ar7.h>
#define EXCEPT_OFFSET 0x80
#define PACE_OFFSET 0xA0
#define CHNLS_OFFSET 0x200
#define IRQ_NUM(irq) (irq % 40 % 32)
#define REG_OFFSET(irq, reg) (((irq) < 40) ? \
((irq) / 32 * 0x4 + reg * 0x10) : \
(EXCEPT_OFFSET + reg * 0x8))
#define SR_OFFSET(irq) (REG_OFFSET(irq, 0))
#define CR_OFFSET(irq) (REG_OFFSET(irq, 1))
#define ESR_OFFSET(irq) (REG_OFFSET(irq, 2))
#define ECR_OFFSET(irq) (REG_OFFSET(irq, 3))
#define PIR_OFFSET (0x40)
#define MSR_OFFSET (0x44)
#define PM_OFFSET(irq) (REG_OFFSET(irq, 5))
#define TM_OFFSET(irq) (REG_OFFSET(irq, 6))
#define REG(addr) (*(volatile u32 *)(KSEG1ADDR(AR7_REGS_IRQ) + addr))
#define CHNL_OFFSET(chnl) (CHNLS_OFFSET + (chnl * 4))
static void ar7_unmask_irq(unsigned int irq_nr);
static void ar7_mask_irq(unsigned int irq_nr);
static irqreturn_t ar7_cascade(int interrupt, void *dev);
void ar7_irq_init(int);
static struct irq_chip ar7_irq_type = {
.name = "AR7",
.unmask = ar7_unmask_irq,
.mask = ar7_mask_irq,
};
static int ar7_irq_base;
static struct irqaction ar7_cascade_action = {
.handler = ar7_cascade,
.name = "AR7 cascade interrupt"
};
static void ar7_unmask_irq(unsigned int irq)
{
unsigned long flags;
local_irq_save(flags);
/* enable the interrupt channel bit */
REG(ESR_OFFSET(irq - ar7_irq_base)) = 1 << IRQ_NUM(irq - ar7_irq_base);
local_irq_restore(flags);
}
static void ar7_mask_irq(unsigned int irq)
{
unsigned long flags;
local_irq_save(flags);
/* disable the interrupt channel bit */
REG(ECR_OFFSET(irq - ar7_irq_base)) = 1 << IRQ_NUM(irq - ar7_irq_base);
local_irq_restore(flags);
}
void __init arch_init_irq(void) {
mips_cpu_irq_init(0);
ar7_irq_init(8);
}
void __init ar7_irq_init(int base)
{
int i;
/*
Disable interrupts and clear pending
*/
REG(ECR_OFFSET(0)) = 0xffffffff;
REG(ECR_OFFSET(32)) = 0xff;
REG(ECR_OFFSET(40)) = 0xffffffff;
REG(CR_OFFSET(0)) = 0xffffffff;
REG(CR_OFFSET(32)) = 0xff;
REG(CR_OFFSET(40)) = 0xffffffff;
for(i = 0; i < 40; i++) {
REG(CHNL_OFFSET(i)) = i;
/* Primary IRQ's */
irq_desc[i + base].status = IRQ_DISABLED;
irq_desc[i + base].action = 0;
irq_desc[i + base].depth = 1;
irq_desc[i + base].chip = &ar7_irq_type;
/* Secondary IRQ's */
if (i < 32) {
irq_desc[i + base + 40].status = IRQ_DISABLED;
irq_desc[i + base + 40].action = 0;
irq_desc[i + base + 40].depth = 1;
irq_desc[i + base + 40].chip =
&ar7_irq_type;
}
}
ar7_irq_base = base;
setup_irq(2, &ar7_cascade_action);
set_c0_status(IE_IRQ0);
}
static irqreturn_t ar7_cascade(int interrupt, void *dev)
{
int irq, i;
unsigned long status;
irq = (REG(PIR_OFFSET) & 0x3F);
if (irq == 40) return IRQ_NONE;
if (irq > 0) {
REG(CR_OFFSET(irq)) = 1 << IRQ_NUM(irq);
} else {
status = REG(SR_OFFSET(40));
for (i = 0; i < 32; i++) {
if (status & (i << 1)) {
irq = i + 40;
REG(CR_OFFSET(irq)) = 1 << i;
break;
}
}
REG(CR_OFFSET(0)) = 1;
}
return do_IRQ(irq + ar7_irq_base);
}
asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending = read_c0_status() & read_c0_cause();
if (pending & STATUSF_IP7) /* cpu timer */
do_IRQ(7);
else if (pending & STATUSF_IP2) /* int0 hardware line */
do_IRQ(2);
else
spurious_interrupt();
}

210
target/linux/ar7-2.6/files/arch/mips/ar7/memory.c Normal file
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@@ -0,0 +1,210 @@
/*
* $Id$
*
* Copyright (C) 2007 OpenWrt.org
*
* Based on arch/mips/mm/init.c
* Copyright (C) 1994 - 2000 Ralf Baechle
* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
* Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
* Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/bootmem.h>
#include <linux/init.h>
#include <linux/initrd.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/pfn.h>
#include <linux/proc_fs.h>
#include <linux/string.h>
#include <linux/swap.h>
#include <asm/bootinfo.h>
#include <asm/page.h>
#include <asm/sections.h>
#include <asm/mips-boards/prom.h>
#warning FIXME: use sdram control regs and/or autodetection
static int __init memsize(void)
{
char *memsize_str;
unsigned int result;
char cmdline[CL_SIZE], *ptr;
/* Check the command line first for a memsize directive */
strcpy(cmdline, arcs_cmdline);
ptr = strstr(cmdline, "memsize=");
if (ptr && (ptr != cmdline) && (*(ptr - 1) != ' '))
ptr = strstr(ptr, " memsize=");
if (ptr) {
result = memparse(ptr + 8, &ptr);
} else {
/* otherwise look in the environment */
memsize_str = prom_getenv("memsize");
if (!memsize_str) {
prom_printf("memsize not set in boot prom, set to default (8Mb)\n");
result = 0x00800000;
} else {
result = simple_strtol(memsize_str, NULL, 0);
}
}
return result;
}
extern unsigned long __initramfs_start, __initramfs_end;
#ifdef CONFIG_NEED_MULTIPLE_NODES
static bootmem_data_t node_bootmem_data;
pg_data_t __node_data[1] = {
{
.bdata = &node_bootmem_data
},
};
EXPORT_SYMBOL(__node_data);
unsigned long max_mapnr;
struct page *mem_map;
EXPORT_SYMBOL(max_mapnr);
EXPORT_SYMBOL(mem_map);
static unsigned long setup_zero_pages(void)
{
unsigned int order = 3;
unsigned long size;
struct page *page;
empty_zero_page = __get_free_pages(GFP_KERNEL | __GFP_ZERO, order);
if (!empty_zero_page)
panic("Oh boy, that early out of memory?");
page = virt_to_page(empty_zero_page);
split_page(page, order);
while (page < virt_to_page(empty_zero_page + (PAGE_SIZE << order))) {
SetPageReserved(page);
page++;
}
size = PAGE_SIZE << order;
zero_page_mask = (size - 1) & PAGE_MASK;
return 1UL << order;
}
extern void pagetable_init(void);
void __init paging_init(void)
{
unsigned long zones_size[MAX_NR_ZONES] = { 0, };
pagetable_init();
zones_size[ZONE_DMA] = max_low_pfn - min_low_pfn;
free_area_init_node(0, NODE_DATA(0), zones_size, ARCH_PFN_OFFSET, NULL);
}
static struct kcore_list kcore_mem, kcore_vmalloc;
void __init mem_init(void)
{
unsigned long codesize, reservedpages, datasize, initsize;
unsigned long tmp, ram;
unsigned long kernel_start, kernel_end;
kernel_start = PFN_DOWN(CPHYSADDR((unsigned long)&_text));
kernel_end = PFN_UP(CPHYSADDR((unsigned long)&_end));
for (tmp = min_low_pfn + 1; tmp < kernel_start; tmp++) {
ClearPageReserved(pfn_to_page(tmp));
init_page_count(pfn_to_page(tmp));
free_page((unsigned long)__va(tmp << PAGE_SHIFT));
}
totalram_pages += free_all_bootmem();
totalram_pages -= setup_zero_pages(); /* Setup zeroed pages. */
reservedpages = ram = 0;
for (tmp = min_low_pfn; tmp <= max_low_pfn; tmp++) {
ram++;
if (PageReserved(pfn_to_page(tmp)))
if ((tmp < kernel_start) || (tmp > kernel_end))
reservedpages++;
}
num_physpages = ram;
codesize = (unsigned long) &_etext - (unsigned long) &_text;
datasize = (unsigned long) &_edata - (unsigned long) &_etext;
initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin;
kclist_add(&kcore_mem, __va(min_low_pfn),
(max_low_pfn - min_low_pfn) << PAGE_SHIFT);
kclist_add(&kcore_vmalloc, (void *)VMALLOC_START,
VMALLOC_END - VMALLOC_START);
printk(KERN_INFO "Memory: %luk/%luk available (%ldk kernel code, "
"%ldk reserved, %ldk data, %ldk init)\n",
(unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
ram << (PAGE_SHIFT-10),
codesize >> 10,
reservedpages << (PAGE_SHIFT-10),
datasize >> 10,
initsize >> 10);
}
#endif
void __init prom_meminit(void)
{
#ifdef CONFIG_NEED_MULTIPLE_NODES
unsigned long kernel_start, kernel_end;
unsigned long pages, free_pages;
unsigned long bootmap_size;
#endif
#ifdef CONFIG_BLK_DEV_INITRD
initrd_start = (unsigned long)&__initramfs_start;
initrd_end = (unsigned long)&__initramfs_end;
#endif
pages = memsize() >> PAGE_SHIFT;
add_memory_region(ARCH_PFN_OFFSET << PAGE_SHIFT, pages <<
PAGE_SHIFT, BOOT_MEM_RAM);
#ifdef CONFIG_NEED_MULTIPLE_NODES
kernel_start = PFN_DOWN(CPHYSADDR((unsigned long)&_text));
kernel_end = PFN_UP(CPHYSADDR((unsigned long)&_end));
min_low_pfn = ARCH_PFN_OFFSET;
max_low_pfn = ARCH_PFN_OFFSET + pages;
max_mapnr = max_low_pfn;
free_pages = pages - (kernel_end - min_low_pfn);
bootmap_size = init_bootmem_node(NODE_DATA(0), kernel_end,
ARCH_PFN_OFFSET, max_low_pfn);
free_bootmem(PFN_PHYS(kernel_end), free_pages << PAGE_SHIFT);
memory_present(0, min_low_pfn, max_low_pfn);
reserve_bootmem(PFN_PHYS(kernel_end), bootmap_size);
mem_map = NODE_DATA(0)->node_mem_map;
#endif
}
unsigned long __init prom_free_prom_memory(void)
{
/* return freed;
*/
return 0;
}

386
target/linux/ar7-2.6/files/arch/mips/ar7/platform.c Normal file
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/*
* $Id$
*
* Copyright (C) 2006, 2007 OpenWrt.org
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/autoconf.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/mtd/physmap.h>
#include <linux/serial.h>
#include <linux/serial_8250.h>
#include <linux/ioport.h>
#include <asm/addrspace.h>
#include <asm/io.h>
#include <asm/ar7/ar7.h>
#include <asm/ar7/gpio.h>
#include <asm/ar7/vlynq.h>
struct plat_vlynq_data {
struct plat_vlynq_ops ops;
int gpio_bit;
int reset_bit;
};
static int vlynq_on(struct vlynq_device *dev)
{
int result;
struct plat_vlynq_data *pdata = dev->dev.platform_data;
if ((result = gpio_request(pdata->gpio_bit, "vlynq")))
goto out;
ar7_device_reset(pdata->reset_bit);
if ((result = ar7_gpio_disable(pdata->gpio_bit)))
goto out_enabled;
if ((result = ar7_gpio_enable(pdata->gpio_bit)))
goto out_enabled;
if ((result = gpio_direction_output(pdata->gpio_bit)))
goto out_gpio_enabled;
gpio_set_value(pdata->gpio_bit, 0);
mdelay(50);
gpio_set_value(pdata->gpio_bit, 1);
mdelay(50);
return 0;
out_gpio_enabled:
ar7_gpio_disable(pdata->gpio_bit);
out_enabled:
ar7_device_disable(pdata->reset_bit);
gpio_free(pdata->gpio_bit);
out:
return result;
}
static void vlynq_off(struct vlynq_device *dev)
{
struct plat_vlynq_data *pdata = dev->dev.platform_data;
ar7_gpio_disable(pdata->gpio_bit);
gpio_free(pdata->gpio_bit);
ar7_device_disable(pdata->reset_bit);
}
static struct resource physmap_flash_resource = {
.name = "mem",
.flags = IORESOURCE_MEM,
.start = 0x10000000,
.end = 0x103fffff,
};
static struct resource cpmac_low_res[] = {
{
.name = "regs",
.flags = IORESOURCE_MEM,
.start = AR7_REGS_MAC0,
.end = AR7_REGS_MAC0 + 0x7FF,
},
{
.name = "irq",
.flags = IORESOURCE_IRQ,
.start = 27,
.end = 27,
},
};
static struct resource cpmac_high_res[] = {
{
.name = "regs",
.flags = IORESOURCE_MEM,
.start = AR7_REGS_MAC1,
.end = AR7_REGS_MAC1 + 0x7FF,
},
{
.name = "irq",
.flags = IORESOURCE_IRQ,
.start = 41,
.end = 41,
},
};
static struct resource vlynq_low_res[] = {
{
.name = "regs",
.flags = IORESOURCE_MEM,
.start = AR7_REGS_VLYNQ0,
.end = AR7_REGS_VLYNQ0 + 0xff,
},
{
.name = "irq",
.flags = IORESOURCE_IRQ,
.start = 29,
.end = 29,
},
{
.name = "mem",
.flags = IORESOURCE_MEM,
.start = 0x04000000,
.end = 0x04ffffff,
},
{
.name = "devirq",
.flags = IORESOURCE_IRQ,
.start = 80,
.end = 111,
},
};
static struct resource vlynq_high_res[] = {
{
.name = "regs",
.flags = IORESOURCE_MEM,
.start = AR7_REGS_VLYNQ1,
.end = AR7_REGS_VLYNQ1 + 0xFF,
},
{
.name = "irq",
.flags = IORESOURCE_IRQ,
.start = 33,
.end = 33,
},
{
.name = "mem",
.flags = IORESOURCE_MEM,
.start = 0x0c000000,
.end = 0x0cffffff,
},
{
.name = "devirq",
.flags = IORESOURCE_IRQ,
.start = 112,
.end = 143,
},
};
static struct physmap_flash_data physmap_flash_data = {
.width = 2,
};
static struct plat_cpmac_data cpmac_low_data = {
.reset_bit = 17,
.power_bit = 20,
.phy_mask = 0x80000000,
};
static struct plat_cpmac_data cpmac_high_data = {
.reset_bit = 21,
.power_bit = 22,
.phy_mask = 0x7fffffff,
};
static struct plat_vlynq_data vlynq_low_data = {
.ops.on = vlynq_on,
.ops.off = vlynq_off,
.reset_bit = 20,
.gpio_bit = 18,
};
static struct plat_vlynq_data vlynq_high_data = {
.ops.on = vlynq_on,
.ops.off = vlynq_off,
.reset_bit = 16,
.gpio_bit = 19,
};
static struct platform_device physmap_flash = {
.id = 0,
.name = "physmap-flash",
.dev.platform_data = &physmap_flash_data,
.resource = &physmap_flash_resource,
.num_resources = 1,
};
static struct platform_device cpmac_low = {
.id = 0,
.name = "cpmac",
.dev.platform_data = &cpmac_low_data,
.resource = cpmac_low_res,
.num_resources = ARRAY_SIZE(cpmac_low_res),
};
static struct platform_device cpmac_high = {
.id = 1,
.name = "cpmac",
.dev.platform_data = &cpmac_high_data,
.resource = cpmac_high_res,
.num_resources = ARRAY_SIZE(cpmac_high_res),
};
static struct platform_device vlynq_low = {
.id = 0,
.name = "vlynq",
.dev.platform_data = &vlynq_low_data,
.resource = vlynq_low_res,
.num_resources = ARRAY_SIZE(vlynq_low_res),
};
static struct platform_device vlynq_high = {
.id = 1,
.name = "vlynq",
.dev.platform_data = &vlynq_high_data,
.resource = vlynq_high_res,
.num_resources = ARRAY_SIZE(vlynq_high_res),
};
/* This is proper way to define uart ports, but they are then detected
* as xscale and, obviously, don't work...
*/
#if !defined(CONFIG_SERIAL_8250)
static struct plat_serial8250_port uart_data[] = {
{
.mapbase = AR7_REGS_UART0,
.irq = AR7_IRQ_UART0,
.regshift = 2,
.iotype = UPIO_MEM,
.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
},
{
.mapbase = AR7_REGS_UART1,
.irq = AR7_IRQ_UART1,
.regshift = 2,
.iotype = UPIO_MEM,
.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
},
{
.flags = 0,
},
};
static struct platform_device uart = {
.id = 0,
.name = "serial8250",
.dev.platform_data = uart_data,
};
#endif
static inline unsigned char char2hex(char h)
{
switch (h) {
case '0': case '1': case '2': case '3': case '4':
case '5': case '6': case '7': case '8': case '9':
return h - '0';
case 'A': case 'B': case 'C': case 'D': case 'E': case 'F':
return h - 'A' + 10;
case 'a': case 'b': case 'c': case 'd': case 'e': case 'f':
return h - 'a' + 10;
default:
return 0;
}
}
static void cpmac_get_mac(int instance, unsigned char *dev_addr)
{
int i;
char name[5], default_mac[] = "00:00:00:12:34:56", *mac;
mac = NULL;
sprintf(name, "mac%c", 'a' + instance);
mac = prom_getenv(name);
if (!mac) {
sprintf(name, "mac%c", 'a');
mac = prom_getenv(name);
}
if (!mac)
mac = default_mac;
for (i = 0; i < 6; i++)
dev_addr[i] = (char2hex(mac[i * 3]) << 4) +
char2hex(mac[i * 3 + 1]);
}
static int __init ar7_register_devices(void)
{
int res;
#if defined(CONFIG_SERIAL_8250)
static struct uart_port uart_port[2];
memset(uart_port, 0, sizeof(struct uart_port) * 2);
uart_port[0].type = PORT_16750;
uart_port[0].line = 0;
uart_port[0].irq = AR7_IRQ_UART0;
uart_port[0].uartclk = ar7_bus_freq() / 2;
uart_port[0].iotype = UPIO_MEM;
uart_port[0].mapbase = AR7_REGS_UART0;
uart_port[0].membase = ioremap(uart_port[0].mapbase, 256);
uart_port[0].regshift = 2;
res = early_serial_setup(&uart_port[0]);
if (res)
return res;
uart_port[1].type = PORT_16750;
uart_port[1].line = 1;
uart_port[1].irq = AR7_IRQ_UART1;
uart_port[1].uartclk = ar7_bus_freq() / 2;
uart_port[1].iotype = UPIO_MEM;
uart_port[1].mapbase = AR7_REGS_UART1;
uart_port[1].membase = ioremap(uart_port[1].mapbase, 256);
uart_port[1].regshift = 2;
res = early_serial_setup(&uart_port[1]);
if (res)
return res;
#else
uart_data[0].uartclk = ar7_bus_freq() / 2;
uart_data[1].uartclk = uart_data[0].uartclk;
res = platform_device_register(&uart);
if (res)
return res;
#endif
res = platform_device_register(&physmap_flash);
if (res)
return res;
res = platform_device_register(&vlynq_low);
if (res)
return res;
ar7_device_disable(vlynq_low_data.reset_bit);
if (ar7_has_high_vlynq()) {
ar7_device_disable(vlynq_high_data.reset_bit);
res = platform_device_register(&vlynq_high);
if (res)
return res;
}
if (ar7_has_high_cpmac()) {
cpmac_get_mac(1, cpmac_high_data.dev_addr);
res = platform_device_register(&cpmac_high);
if (res)
return res;
} else {
cpmac_low_data.phy_mask = 0xffffffff;
}
cpmac_get_mac(0, cpmac_low_data.dev_addr);
res = platform_device_register(&cpmac_low);
return res;
}
arch_initcall(ar7_register_devices);

266
target/linux/ar7-2.6/files/arch/mips/ar7/prom.c Normal file
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/*
* $Id$
*
* Copyright (C) 2006, 2007 OpenWrt.org
*
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
*
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
* Putting things on the screen/serial line using YAMONs facilities.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/serial_reg.h>
#include <linux/spinlock.h>
#include <linux/module.h>
#include <asm/io.h>
#include <asm/bootinfo.h>
#include <asm/mips-boards/prom.h>
#include <asm/ar7/ar7.h>
#define MAX_ENTRY 80
struct env_var {
char *name;
char *value;
};
struct psp_chip_map {
u16 chip;
char *names[50];
};
/* I hate this. No. *I* *HATE* *THIS* */
static __initdata struct psp_chip_map psp_chip_map[] = {
{
.chip = 0x5,
.names = {
"dummy", "cpufrequency", "memsize",
"flashsize", "modetty0", "modetty1", "prompt",
"bootcfg", "maca", "macb", "usb_rndis_mac",
"macap", "my_ipaddress", "server_ipaddress",
"bline_maca", "bline_macb", "bline_rndis",
"bline_atm", "usb_pid", "usb_vid",
"usb_eppolli", "gateway_ipaddress",
"subnet_mask", "usb_serial", "usb_board_mac",
"remote_user", "remote_pass", "remote_dir",
"sysfrequency", "link_timeout", "mac_port",
"path", "hostname", "tftpcfg", "buildops",
"tftp_fo_fname", "tftp_fo_ports",
"console_state", "mipsfrequency",
},
},
{
.chip = 0x18,
.names = {
"dummy", "cpufrequency", "memsize",
"flashsize", "modetty0", "modetty1", "prompt",
"bootcfg", "maca", "macb", "usb_rndis_mac",
"macap", "my_ipaddress", "server_ipaddress",
"bline_maca", "bline_macb", "bline_rndis",
"bline_atm", "usb_pid", "usb_vid",
"usb_eppolli", "gateway_ipaddress",
"subnet_mask", "usb_serial", "usb_board_mac",
"remote_user", "remote_pass", "remote_dir",
"sysfrequency", "link_timeout", "mac_port",
"path", "hostname", "tftpcfg", "buildops",
"tftp_fo_fname", "tftp_fo_ports",
"console_state", "mipsfrequency",
},
},
{
.chip = 0x2b,
.names = {
"dummy", "cpufrequency", "memsize",
"flashsize", "modetty0", "modetty1", "prompt",
"bootcfg", "maca", "macb", "usb_rndis_mac",
"macap", "my_ipaddress", "server_ipaddress",
"bline_maca", "bline_macb", "bline_rndis",
"bline_atm", "usb_pid", "usb_vid",
"usb_eppolli", "gateway_ipaddress",
"subnet_mask", "usb_serial", "usb_board_mac",
"remote_user", "remote_pass", "remote_dir",
"sysfrequency", "link_timeout", "mac_port",
"path", "hostname", "tftpcfg", "buildops",
"tftp_fo_fname", "tftp_fo_ports",
"console_state", "mipsfrequency",
},
},
{
.chip = 0x0,
},
};
static struct env_var adam2_env[MAX_ENTRY] = { { 0, }, };
char * __init prom_getenv(char *name)
{
int i;
for (i = 0; (i < MAX_ENTRY) && adam2_env[i].name; i++)
if (!strcmp(name, adam2_env[i].name))
return adam2_env[i].value;
return NULL;
}
char * __init prom_getcmdline(void)
{
return &(arcs_cmdline[0]);
}
static void __init ar7_init_cmdline(int argc, char *argv[])
{
char *cp;
int actr;
actr = 1; /* Always ignore argv[0] */
cp = &(arcs_cmdline[0]);
while(actr < argc) {
strcpy(cp, argv[actr]);
cp += strlen(argv[actr]);
*cp++ = ' ';
actr++;
}
if (cp != &(arcs_cmdline[0])) {
/* get rid of trailing space */
--cp;
*cp = '\0';
}
}
struct psbl_rec {
u32 psbl_size;
u32 env_base;
u32 env_size;
u32 ffs_base;
u32 ffs_size;
};
static __initdata char psp_env_version[] = "TIENV0.8";
struct psp_env_var {
unsigned char num;
unsigned char ctrl;
unsigned short csum;
unsigned char len;
unsigned char data[11];
};
static char psp_env_data[2048] = { 0, };
static void __init add_adam2_var(char *name, char *value)
{
int i;
for (i = 0; i < MAX_ENTRY; i++) {
if (!adam2_env[i].name) {
adam2_env[i].name = name;
adam2_env[i].value = value;
return;
} else if (!strcmp(adam2_env[i].name, name)) {
adam2_env[i].value = value;
return;
}
}
}
static int __init parse_psp_env(void *start)
{
int i, j;
u16 chip;
struct psp_chip_map *map;
char *src, *dest, *name, *value;
struct psp_env_var *vars = start;
chip = get_chip_id();
for (map = psp_chip_map; map->chip; map++)
if (map->chip == chip)
break;
if (!map->chip)
return -EINVAL;
i = 1;
j = 0;
dest = psp_env_data;
while (vars[i].num < 0xff) {
src = vars[i].data;
if (vars[i].num) {
strcpy(dest, map->names[vars[i].num]);
name = dest;
} else {
strcpy(dest, src);
name = dest;
src += strlen(src) + 1;
}
dest += strlen(dest) + 1;
strcpy(dest, src);
value = dest;
dest += strlen(dest) + 1;
add_adam2_var(name, value);
i += vars[i].len;
}
return 0;
}
static void __init ar7_init_env(struct env_var *env)
{
int i;
struct psbl_rec *psbl = (struct psbl_rec *)(KSEG1ADDR(0x14000300));
void *psp_env = (void *)KSEG1ADDR(psbl->env_base);
if(strcmp(psp_env, psp_env_version) == 0) {
parse_psp_env(psp_env);
} else {
for (i = 0; i < MAX_ENTRY; i++, env++)
if (env->name)
add_adam2_var(env->name, env->value);
}
}
void __init prom_init(void)
{
prom_printf("\nLINUX running...\n");
ar7_init_cmdline(fw_arg0, (char **)fw_arg1);
ar7_init_env((struct env_var *)fw_arg2);
}
#define PORT(offset) (KSEG1ADDR(AR7_REGS_UART0 + (offset * 4)))
static inline unsigned int serial_in(int offset)
{
return readb((void *)PORT(offset));
}
static inline void serial_out(int offset, int value)
{
writeb(value, (void *)PORT(offset));
}
char prom_getchar(void)
{
while (!(serial_in(UART_LSR) & UART_LSR_DR));
return serial_in(UART_RX);
}
int prom_putchar(char c)
{
while ((serial_in(UART_LSR) & UART_LSR_THRE) == 0);
serial_out(UART_TX, c);
return 1;
}
EXPORT_SYMBOL(prom_getenv);

120
target/linux/ar7-2.6/files/arch/mips/ar7/setup.c Normal file
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/*
* $Id$
*
* Copyright (C) 2006, 2007 OpenWrt.org
*
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
*
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*/
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/ioport.h>
#include <linux/pci.h>
#include <linux/tty.h>
#include <linux/pm.h>
#include <linux/serial_8250.h>
#include <linux/serial_core.h>
#include <linux/serial.h>
#include <linux/serial_reg.h>
#include <asm/cpu.h>
#include <asm/irq.h>
#include <asm/mips-boards/generic.h>
#include <asm/mips-boards/prom.h>
#include <asm/dma.h>
#include <asm/time.h>
#include <asm/traps.h>
#include <asm/io.h>
#include <asm/reboot.h>
#include <asm/gdb-stub.h>
#include <asm/ar7/ar7.h>
extern void ar7_time_init(void);
static void ar7_machine_restart(char *command);
static void ar7_machine_halt(void);
static void ar7_machine_power_off(void);
static void ar7_machine_restart(char *command)
{
volatile u32 *softres_reg = (u32 *)ioremap(AR7_REGS_RESET +
AR7_RESET_SOFTWARE, 1);
prom_printf("Reboot\n");
*softres_reg = 1;
}
static void ar7_machine_halt(void)
{
prom_printf("Halt\n");
while (1);
}
static void ar7_machine_power_off(void)
{
volatile u32 *power_reg = (u32 *)ioremap(AR7_REGS_POWER, 1);
u32 power_state = *power_reg | (3 << 30);
prom_printf("Power off\n");
*power_reg = power_state;
ar7_machine_halt();
}
const char *get_system_type(void)
{
u16 chip_id = get_chip_id();
switch (chip_id) {
case 0x5:
return "TI AR7 (TNETD7300)";
case 0x18:
return "TI AR7 (TNETD7100)";
case 0x2b:
return "TI AR7 (TNETD7200)";
default:
return "TI AR7 (Unknown)";
}
}
static int __init ar7_init_console(void)
{
return 0;
}
/*
* Initializes basic routines and structures pointers, memory size (as
* given by the bios and saves the command line.
*/
void __init plat_mem_setup(void)
{
unsigned long io_base;
_machine_restart = ar7_machine_restart;
_machine_halt = ar7_machine_halt;
pm_power_off = ar7_machine_power_off;
board_time_init = ar7_time_init;
panic_timeout = 3;
io_base = (unsigned long)ioremap(AR7_REGS_BASE, 0x10000);
if (!io_base) panic("Can't remap IO base!\n");
set_io_port_base(io_base);
prom_meminit();
ioport_resource.start = 0;
ioport_resource.end = ~0;
iomem_resource.start = 0;
iomem_resource.end = ~0;
}
console_initcall(ar7_init_console);

59
target/linux/ar7-2.6/files/arch/mips/ar7/time.c Normal file
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@@ -0,0 +1,59 @@
/*
* $Id$
*
* Copyright (C) 2006, 2007 OpenWrt.org
*
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
*
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
* Setting up the clock on the MIPS boards.
*/
#include <linux/types.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
#include <linux/sched.h>
#include <linux/spinlock.h>
#include <linux/interrupt.h>
#include <linux/time.h>
#include <linux/timex.h>
#include <linux/mc146818rtc.h>
#include <asm/mipsregs.h>
#include <asm/ptrace.h>
#include <asm/hardirq.h>
#include <asm/irq.h>
#include <asm/div64.h>
#include <asm/cpu.h>
#include <asm/time.h>
#include <asm/mc146818-time.h>
#include <asm/msc01_ic.h>
#include <asm/mips-boards/generic.h>
#include <asm/mips-boards/prom.h>
#include <asm/mips-boards/maltaint.h>
#include <asm/mc146818-time.h>
#include <asm/ar7/ar7.h>
void __init ar7_time_init(void)
{
mips_hpt_frequency = ar7_cpu_freq() / 2;
}
void __init plat_timer_setup(struct irqaction *irq)
{
setup_irq(7, irq);
}

396
target/linux/ar7-2.6/files/arch/mips/ar7/vlynq-pci.c Normal file
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@@ -0,0 +1,396 @@
/*
* $Id$
*
* Copyright (C) 2006, 2007 OpenWrt.org
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/ar7/vlynq.h>
#define VLYNQ_PCI_SLOTS 2
struct vlynq_reg_config {
u32 offset;
u32 value;
};
struct vlynq_pci_config {
u32 chip_id;
char name[32];
struct vlynq_mapping rx_mapping[4];
int irq;
int irq_type;
u32 chip;
u32 class;
int num_regs;
struct vlynq_reg_config regs[10];
};
struct vlynq_pci_private {
u32 latency;
u32 cache_line;
u32 command;
u32 sz_mask;
struct vlynq_pci_config *config;
};
static struct vlynq_pci_config known_devices[] = {
{
.chip_id = 0x00000009, .name = "TI ACX111",
.rx_mapping = {
{ .size = 0x22000, .offset = 0xf0000000 },
{ .size = 0x40000, .offset = 0xc0000000 },
{ .size = 0x0, .offset = 0x0 },
{ .size = 0x0, .offset = 0x0 },
},
.irq = 0, .chip = 0x9066104c,
.class = PCI_CLASS_NETWORK_OTHER,
.num_regs = 5,
.regs = {
{ .offset = 0x790, .value = (0xd0000000 - (ARCH_PFN_OFFSET << PAGE_SHIFT)) },
{ .offset = 0x794, .value = (0xd0000000 - (ARCH_PFN_OFFSET << PAGE_SHIFT)) },
{ .offset = 0x740, .value = 0 },
{ .offset = 0x744, .value = 0x00010000 },
{ .offset = 0x764, .value = 0x00010000 },
},
},
};
static struct vlynq_device *slots[VLYNQ_PCI_SLOTS] = { NULL, };
static struct resource vlynq_io_resource = {
.start = 0x00000000,
.end = 0x00000000,
.name = "pci IO space",
.flags = IORESOURCE_IO
};
static struct resource vlynq_mem_resource = {
.start = 0x00000000,
.end = 0x00000000,
.name = "pci memory space",
.flags = IORESOURCE_MEM
};
static inline u32 vlynq_get_mapped(struct vlynq_device *dev, int res)
{
int i;
struct vlynq_pci_private *priv = dev->priv;
u32 ret = dev->mem_start;
if (!priv->config->rx_mapping[res].size) return 0;
for (i = 0; i < res; i++)
ret += priv->config->rx_mapping[i].size;
return ret;
}
static inline u32 vlynq_read(u32 val, int size) {
switch (size) {
case 1:
return *(u8 *)&val;
case 2:
return *(u16 *)&val;
}
return val;
}
static int vlynq_config_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val)
{
struct vlynq_device *dev;
struct vlynq_pci_private *priv;
int resno, slot = PCI_SLOT(devfn);
if ((size == 2) && (where & 1))
return PCIBIOS_BAD_REGISTER_NUMBER;
else if ((size == 4) && (where & 3))
return PCIBIOS_BAD_REGISTER_NUMBER;
if (slot >= VLYNQ_PCI_SLOTS)
return PCIBIOS_DEVICE_NOT_FOUND;
dev = slots[slot];
if (!dev || (PCI_FUNC(devfn) > 0))
return PCIBIOS_DEVICE_NOT_FOUND;
priv = dev->priv;
switch (where) {
case PCI_VENDOR_ID:
*val = vlynq_read(priv->config->chip, size);
break;
case PCI_DEVICE_ID:
*val = priv->config->chip & 0xffff;
case PCI_COMMAND:
*val = priv->command;
case PCI_STATUS:
/* *val = PCI_STATUS_CAP_LIST;*/
*val = 0;
break;
case PCI_CLASS_REVISION:
*val = priv->config->class;
break;
case PCI_LATENCY_TIMER:
*val = priv->latency;
break;
case PCI_HEADER_TYPE:
*val = PCI_HEADER_TYPE_NORMAL;
break;
case PCI_CACHE_LINE_SIZE:
*val = priv->cache_line;
break;
case PCI_BASE_ADDRESS_0:
case PCI_BASE_ADDRESS_1:
case PCI_BASE_ADDRESS_2:
case PCI_BASE_ADDRESS_3:
resno = (where - PCI_BASE_ADDRESS_0) >> 2;
if (priv->sz_mask & (1 << resno)) {
priv->sz_mask &= ~(1 << resno);
*val = priv->config->rx_mapping[resno].size;
} else {
*val = vlynq_get_mapped(dev, resno);
}
break;
case PCI_BASE_ADDRESS_4:
case PCI_BASE_ADDRESS_5:
case PCI_SUBSYSTEM_VENDOR_ID:
case PCI_SUBSYSTEM_ID:
case PCI_ROM_ADDRESS:
case PCI_INTERRUPT_LINE:
case PCI_CARDBUS_CIS:
case PCI_CAPABILITY_LIST:
case PCI_INTERRUPT_PIN:
*val = 0;
break;
default:
printk("%s: Read of unknown register 0x%x (size %d)\n",
dev->dev.bus_id, where, size);
return PCIBIOS_BAD_REGISTER_NUMBER;
}
return PCIBIOS_SUCCESSFUL;
}
static int vlynq_config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val)
{
struct vlynq_device *dev;
struct vlynq_pci_private *priv;
int resno, slot = PCI_SLOT(devfn);
if ((size == 2) && (where & 1))
return PCIBIOS_BAD_REGISTER_NUMBER;
else if ((size == 4) && (where & 3))
return PCIBIOS_BAD_REGISTER_NUMBER;
if (slot >= VLYNQ_PCI_SLOTS)
return PCIBIOS_DEVICE_NOT_FOUND;
dev = slots[slot];
if (!dev || (PCI_FUNC(devfn) > 0))
return PCIBIOS_DEVICE_NOT_FOUND;
priv = dev->priv;
switch (where) {
case PCI_VENDOR_ID:
case PCI_DEVICE_ID:
case PCI_STATUS:
case PCI_CLASS_REVISION:
case PCI_HEADER_TYPE:
case PCI_CACHE_LINE_SIZE:
case PCI_SUBSYSTEM_VENDOR_ID:
case PCI_SUBSYSTEM_ID:
case PCI_INTERRUPT_LINE:
case PCI_INTERRUPT_PIN:
case PCI_CARDBUS_CIS:
case PCI_CAPABILITY_LIST:
return PCIBIOS_FUNC_NOT_SUPPORTED;
case PCI_COMMAND:
priv->command = val;
case PCI_LATENCY_TIMER:
priv->latency = val;
break;
case PCI_BASE_ADDRESS_0:
case PCI_BASE_ADDRESS_1:
case PCI_BASE_ADDRESS_2:
case PCI_BASE_ADDRESS_3:
if (val == 0xffffffff) {
resno = (where - PCI_BASE_ADDRESS_0) >> 2;
priv->sz_mask |= (1 << resno);
break;
}
case PCI_BASE_ADDRESS_4:
case PCI_BASE_ADDRESS_5:
case PCI_ROM_ADDRESS:
break;
default:
printk("%s: Write to unknown register 0x%x (size %d) value=0x%x\n",
dev->dev.bus_id, where, size, val);
return PCIBIOS_BAD_REGISTER_NUMBER;
}
return PCIBIOS_SUCCESSFUL;
}
static struct pci_ops vlynq_pci_ops = {
vlynq_config_read,
vlynq_config_write
};
static struct pci_controller vlynq_controller = {
.pci_ops = &vlynq_pci_ops,
.io_resource = &vlynq_io_resource,
.mem_resource = &vlynq_mem_resource,
};
static int vlynq_pci_probe(struct vlynq_device *dev)
{
int result, i;
u32 chip_id, addr;
struct vlynq_pci_private *priv;
struct vlynq_mapping mapping[4] = { { 0, }, };
struct vlynq_pci_config *config = NULL;
result = vlynq_set_local_irq(dev, 31);
if (result)
return result;
result = vlynq_set_remote_irq(dev, 30);
if (result)
return result;
result = vlynq_device_enable(dev);
if (result)
return result;
chip_id = vlynq_remote_id(dev);
for (i = 0; i < ARRAY_SIZE(known_devices); i++)
if (chip_id == known_devices[i].chip_id)
config = &known_devices[i];
if (!config) {
printk("vlynq-pci: skipping unknown device "
"%04x:%04x at %s\n", chip_id >> 16,
chip_id & 0xffff, dev->dev.bus_id);
result = -ENODEV;
goto fail;
}
printk("vlynq-pci: attaching device %s at %s\n",
config->name, dev->dev.bus_id);
priv = kmalloc(sizeof(struct vlynq_pci_private), GFP_KERNEL);
if (!priv) {
printk(KERN_ERR "%s: failed to allocate private data\n",
dev->dev.bus_id);
result = -ENOMEM;
goto fail;
}
memset(priv, 0, sizeof(struct vlynq_pci_private));
priv->latency = 64;
priv->cache_line = 32;
priv->config = config;
mapping[0].offset = ARCH_PFN_OFFSET << PAGE_SHIFT;
mapping[0].size = 0x02000000;
vlynq_set_local_mapping(dev, dev->mem_start, mapping);
vlynq_set_remote_mapping(dev, 0, config->rx_mapping);
addr = (u32)ioremap_nocache(dev->mem_start, 0x10000);
if (!addr) {
printk(KERN_ERR "%s: failed to remap io memory\n",
dev->dev.bus_id);
result = -ENXIO;
goto fail;
}
for (i = 0; i < config->num_regs; i++)
*(volatile u32 *)(addr + config->regs[i].offset) =
config->regs[i].value;
dev->priv = priv;
for (i = 0; i < VLYNQ_PCI_SLOTS; i++) {
if (!slots[i]) {
slots[i] = dev;
break;
}
}
return 0;
fail:
vlynq_device_disable(dev);
return result;
}
static int vlynq_pci_remove(struct vlynq_device *dev)
{
int i;
struct vlynq_pci_private *priv = dev->priv;
for (i = 0; i < VLYNQ_PCI_SLOTS; i++)
if (slots[i] == dev)
slots[i] = NULL;
vlynq_device_disable(dev);
kfree(priv);
return 0;
}
static struct vlynq_driver vlynq_pci = {
.name = "PCI over VLYNQ emulation",
.probe = vlynq_pci_probe,
.remove = vlynq_pci_remove,
};
int vlynq_pci_init(void)
{
int res;
res = vlynq_register_driver(&vlynq_pci);
if (res)
return res;
register_pci_controller(&vlynq_controller);
return 0;
}
int pcibios_map_irq(struct pci_dev *pdev, u8 slot, u8 pin)
{
struct vlynq_device *dev;
struct vlynq_pci_private *priv;
dev = slots[slot];
if (!dev)
return 0;
priv = dev->priv;
return vlynq_virq_to_irq(dev, priv->config->irq);
}
/* Do platform specific device initialization at pci_enable_device() time */
int pcibios_plat_dev_init(struct pci_dev *dev)
{
return 0;
}

543
target/linux/ar7-2.6/files/arch/mips/ar7/vlynq.c Normal file
View File

@@ -0,0 +1,543 @@
/*
* $Id$
*
* Copyright (C) 2006, 2007 OpenWrt.org
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/init.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/ioport.h>
#include <linux/errno.h>
#include <linux/platform_device.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/device.h>
#include <asm/addrspace.h>
#include <asm/io.h>
#include <asm/ar7/vlynq.h>
#define PER_DEVICE_IRQS 32
#define VLYNQ_CTRL_PM_ENABLE 0x80000000
#define VLYNQ_CTRL_CLOCK_INT 0x00008000
#define VLYNQ_CTRL_CLOCK_DIV(x) ((x & 7) << 16)
#define VLYNQ_CTRL_INT_LOCAL 0x00004000
#define VLYNQ_CTRL_INT_ENABLE 0x00002000
#define VLYNQ_CTRL_INT_VECTOR(x) ((x & 0x1f) << 8)
#define VLYNQ_CTRL_INT2CFG 0x00000080
#define VLYNQ_CTRL_RESET 0x00000001
#define VLYNQ_STATUS_RERROR 0x00000100
#define VLYNQ_STATUS_LERROR 0x00000080
#define VLYNQ_STATUS_LINK 0x00000001
#define VINT_ENABLE 0x00000100
#define VINT_TYPE_EDGE 0x00000080
#define VINT_LEVEL_LOW 0x00000040
#define VINT_VECTOR(x) (x & 0x1f)
#define VINT_OFFSET(irq) (8 * ((irq) % 4))
#define VLYNQ_AUTONEGO_V2 0x00010000
struct vlynq_regs {
volatile u32 revision;
volatile u32 control;
volatile u32 status;
volatile u32 int_prio;
volatile u32 int_status;
volatile u32 int_pending;
volatile u32 int_ptr;
volatile u32 tx_offset;
volatile struct vlynq_mapping rx_mapping[4];
volatile u32 chip;
volatile u32 autonego;
volatile u32 unused[6];
volatile u32 int_device[8];
} __attribute__ ((packed));
#ifdef VLYNQ_DEBUG
static void vlynq_dump_regs(struct vlynq_device *dev)
{
int i;
printk("VLYNQ local=%p remote=%p\n", dev->local, dev->remote);
for (i = 0; i < 32; i++) {
printk("VLYNQ: local %d: %08x\n", i + 1, ((u32 *)dev->local)[i]);
printk("VLYNQ: remote %d: %08x\n", i + 1, ((u32 *)dev->remote)[i]);
}
}
static void vlynq_dump_mem(u32 *base, int count)
{
int i;
for (i = 0; i < (count + 3) / 4; i++) {
if (i % 4 == 0) printk("\nMEM[0x%04x]:", i * 4);
printk(" 0x%08x", *(base + i));
}
printk("\n");
}
#endif
int vlynq_linked(struct vlynq_device *dev)
{
int i;
for (i = 0; i < 10; i++)
if (dev->local->status & VLYNQ_STATUS_LINK) {
printk("%s: linked\n", dev->dev.bus_id);
return 1;
} else {
mdelay(1);
}
return 0;
}
static void vlynq_irq_unmask(unsigned int irq)
{
volatile u32 val;
struct vlynq_device *dev = irq_desc[irq].chip_data;
int virq;
BUG_ON(!dev);
virq = irq - dev->irq_start;
val = dev->remote->int_device[virq >> 2];
val |= VINT_ENABLE << VINT_OFFSET(virq);
dev->remote->int_device[virq >> 2] = val;
}
static void vlynq_irq_mask(unsigned int irq)
{
volatile u32 val;
struct vlynq_device *dev = irq_desc[irq].chip_data;
int virq;
BUG_ON(!dev);
virq = irq - dev->irq_start;
val = dev->remote->int_device[virq >> 2];
val &= ~(VINT_ENABLE << VINT_OFFSET(virq));
dev->remote->int_device[virq >> 2] = val;
}
static int vlynq_irq_type(unsigned int irq, unsigned int flow_type)
{
volatile u32 val;
struct vlynq_device *dev = irq_desc[irq].chip_data;
int virq;
BUG_ON(!dev);
virq = irq - dev->irq_start;
val = dev->remote->int_device[virq >> 2];
switch (flow_type & IRQ_TYPE_SENSE_MASK) {
case IRQ_TYPE_EDGE_RISING:
case IRQ_TYPE_EDGE_FALLING:
case IRQ_TYPE_EDGE_BOTH:
val |= VINT_TYPE_EDGE << VINT_OFFSET(virq);
val &= ~(VINT_LEVEL_LOW << VINT_OFFSET(virq));
break;
case IRQ_TYPE_LEVEL_HIGH:
val &= ~(VINT_TYPE_EDGE << VINT_OFFSET(virq));
val &= ~(VINT_LEVEL_LOW << VINT_OFFSET(virq));
break;
case IRQ_TYPE_LEVEL_LOW:
val &= ~(VINT_TYPE_EDGE << VINT_OFFSET(virq));
val |= VINT_LEVEL_LOW << VINT_OFFSET(virq);
break;
default:
return -EINVAL;
}
dev->remote->int_device[virq >> 2] = val;
return 0;
}
static irqreturn_t vlynq_irq(int irq, void *dev_id)
{
struct vlynq_device *dev = dev_id;
u32 status, ack;
int virq = 0;
status = dev->local->int_status;
dev->local->int_status = status;
if (status & (1 << dev->local_irq)) { /* Local vlynq IRQ. Ack */
ack = dev->local->status;
dev->local->status = ack;
}
if (status & (1 << dev->remote_irq)) { /* Remote vlynq IRQ. Ack */
ack = dev->remote->status;
dev->remote->status = ack;
}
status &= ~((1 << dev->local_irq) | (1 << dev->remote_irq));
while (status) {
if (status & 1) /* Remote device IRQ. Pass. */
do_IRQ(dev->irq_start + virq);
status >>= 1;
virq++;
}
return IRQ_HANDLED;
}
static struct irq_chip vlynq_irq_chip = {
.name = "vlynq",
.unmask = vlynq_irq_unmask,
.mask = vlynq_irq_mask,
.set_type = vlynq_irq_type,
};
static int vlynq_setup_irq(struct vlynq_device *dev)
{
u32 val;
int i;
if (dev->local_irq == dev->remote_irq) {
printk("%s: local vlynq irq should be different from remote\n",
dev->dev.bus_id);
return -EINVAL;
}
val = VLYNQ_CTRL_INT_VECTOR(dev->local_irq);
val |= VLYNQ_CTRL_INT_ENABLE | VLYNQ_CTRL_INT_LOCAL |
VLYNQ_CTRL_INT2CFG;
dev->local->int_ptr = 0x14;
dev->local->control |= val;
val = VLYNQ_CTRL_INT_VECTOR(dev->remote_irq);
val |= VLYNQ_CTRL_INT_ENABLE;
dev->remote->int_ptr = 0x14;
dev->remote->control |= val;
for (i = 0; i < PER_DEVICE_IRQS; i++) {
if ((i == dev->local_irq) || (i == dev->remote_irq))
continue;
irq_desc[dev->irq_start + i].status = IRQ_DISABLED;
irq_desc[dev->irq_start + i].action = 0;
irq_desc[dev->irq_start + i].depth = 1;
irq_desc[dev->irq_start + i].chip = &vlynq_irq_chip;
irq_desc[dev->irq_start + i].chip_data = dev;
dev->remote->int_device[i >> 2] = 0;
}
if (request_irq(dev->irq, vlynq_irq, SA_SHIRQ, "AR7 VLYNQ", dev)) {
printk("%s: request_irq failed\n", dev->dev.bus_id);
return -EAGAIN;
}
return 0;
}
static void vlynq_free_irq(struct vlynq_device *dev)
{
free_irq(dev->irq, dev);
}
static void vlynq_device_release(struct device *dev)
{
struct vlynq_device *vdev = to_vlynq_device(dev);
kfree(vdev);
}
static int vlynq_device_probe(struct device *dev)
{
struct vlynq_driver *drv = to_vlynq_driver(dev->driver);
if (drv->probe)
return drv->probe(to_vlynq_device(dev));
return 0;
}
static int vlynq_device_remove(struct device *dev)
{
struct vlynq_driver *drv = to_vlynq_driver(dev->driver);
if (drv->remove)
return drv->remove(to_vlynq_device(dev));
return 0;
}
int __vlynq_register_driver(struct vlynq_driver *driver, struct module *owner)
{
driver->driver.name = driver->name;
driver->driver.bus = &vlynq_bus_type;
/* driver->driver.owner = owner;*/
return driver_register(&driver->driver);
}
EXPORT_SYMBOL(__vlynq_register_driver);
void vlynq_unregister_driver(struct vlynq_driver *driver)
{
driver_unregister(&driver->driver);
}
EXPORT_SYMBOL(vlynq_unregister_driver);
int vlynq_device_enable(struct vlynq_device *dev)
{
u32 val;
int result;
struct plat_vlynq_ops *ops = dev->dev.platform_data;
result = ops->on(dev);
if (result)
return result;
dev->local->control = 0;
dev->remote->control = 0;
if (vlynq_linked(dev))
return vlynq_setup_irq(dev);
for (val = 0; val < 8; val++) {
dev->local->control = VLYNQ_CTRL_CLOCK_DIV(val) |
VLYNQ_CTRL_CLOCK_INT;
if (vlynq_linked(dev))
return vlynq_setup_irq(dev);
}
}
void vlynq_device_disable(struct vlynq_device *dev)
{
struct plat_vlynq_ops *ops = dev->dev.platform_data;
vlynq_free_irq(dev);
ops->off(dev);
}
u32 vlynq_local_id(struct vlynq_device *dev)
{
return dev->local->chip;
}
u32 vlynq_remote_id(struct vlynq_device *dev)
{
return dev->remote->chip;
}
void vlynq_set_local_mapping(struct vlynq_device *dev, u32 tx_offset,
struct vlynq_mapping *mapping)
{
int i;
dev->local->tx_offset = tx_offset;
for (i = 0; i < 4; i++) {
dev->local->rx_mapping[i].offset = mapping[i].offset;
dev->local->rx_mapping[i].size = mapping[i].size;
}
}
void vlynq_set_remote_mapping(struct vlynq_device *dev, u32 tx_offset,
struct vlynq_mapping *mapping)
{
int i;
dev->remote->tx_offset = tx_offset;
for (i = 0; i < 4; i++) {
dev->remote->rx_mapping[i].offset = mapping[i].offset;
dev->remote->rx_mapping[i].size = mapping[i].size;
}
}
int vlynq_virq_to_irq(struct vlynq_device *dev, int virq)
{
if ((virq < 0) || (virq >= PER_DEVICE_IRQS))
return -EINVAL;
if ((virq == dev->local_irq) || (virq == dev->remote_irq))
return -EINVAL;
return dev->irq_start + virq;
}
int vlynq_irq_to_virq(struct vlynq_device *dev, int irq)
{
if ((irq < dev->irq_start) || (irq >= dev->irq_start + PER_DEVICE_IRQS))
return -EINVAL;
return irq - dev->irq_start;
}
int vlynq_set_local_irq(struct vlynq_device *dev, int virq)
{
if ((virq < 0) || (virq >= PER_DEVICE_IRQS))
return -EINVAL;
if (virq == dev->remote_irq)
return -EINVAL;
dev->local_irq = virq;
return 0;
}
int vlynq_set_remote_irq(struct vlynq_device *dev, int virq)
{
if ((virq < 0) || (virq >= PER_DEVICE_IRQS))
return -EINVAL;
if (virq == dev->local_irq)
return -EINVAL;
dev->remote_irq = virq;
return 0;
}
static int vlynq_probe(struct platform_device *pdev)
{
struct vlynq_device *dev;
struct resource *regs_res, *mem_res, *irq_res;
int len, result;
if (strcmp(pdev->name, "vlynq"))
return -ENODEV;
regs_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
if (!regs_res)
return -ENODEV;
mem_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem");
if (!mem_res)
return -ENODEV;
irq_res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "devirq");
if (!irq_res)
return -ENODEV;
dev = kmalloc(sizeof(struct vlynq_device), GFP_KERNEL);
if (!dev) {
printk(KERN_ERR "vlynq: failed to allocate device structure\n");
return -ENOMEM;
}
memset(dev, 0, sizeof(struct vlynq_device));
dev->id = pdev->id;
dev->dev.bus = &vlynq_bus_type;
dev->dev.parent = &pdev->dev;
snprintf(dev->dev.bus_id, BUS_ID_SIZE, "vlynq%d", dev->id);
dev->dev.bus_id[BUS_ID_SIZE - 1] = 0;
dev->dev.platform_data = pdev->dev.platform_data;
dev->dev.release = vlynq_device_release;
dev->regs_start = regs_res->start;
dev->regs_end = regs_res->end;
dev->mem_start = mem_res->start;
dev->mem_end = mem_res->end;
len = regs_res->end - regs_res->start;
if (!request_mem_region(regs_res->start, len, dev->dev.bus_id)) {
printk("%s: Can't request vlynq registers\n", dev->dev.bus_id);
result = -ENXIO;
goto fail_request;
}
dev->local = ioremap_nocache(regs_res->start, len);
if (!dev->local) {
printk("%s: Can't remap vlynq registers\n", dev->dev.bus_id);
result = -ENXIO;
goto fail_remap;
}
dev->remote = (struct vlynq_regs *)((u32)dev->local + 128);
dev->irq = platform_get_irq_byname(pdev, "irq");
dev->irq_start = irq_res->start;
dev->irq_end = irq_res->end;
dev->local_irq = 31;
dev->remote_irq = 30;
if (device_register(&dev->dev))
goto fail_register;
platform_set_drvdata(pdev, dev);
printk("%s: regs 0x%p, irq %d, mem 0x%p\n",
dev->dev.bus_id, (void *)dev->regs_start, dev->irq,
(void *)dev->mem_start);
return 0;
fail_register:
fail_remap:
iounmap(dev->local);
fail_request:
release_mem_region(regs_res->start, len);
kfree(dev);
return result;
}
static int vlynq_remove(struct platform_device *pdev)
{
struct vlynq_device *dev = platform_get_drvdata(pdev);
device_unregister(&dev->dev);
release_mem_region(dev->regs_start, dev->regs_end - dev->regs_start);
kfree(dev);
return 0;
}
static struct platform_driver vlynq_driver = {
.driver.name = "vlynq",
.probe = vlynq_probe,
.remove = vlynq_remove,
};
struct bus_type vlynq_bus_type = {
.name = "vlynq",
.probe = vlynq_device_probe,
.remove = vlynq_device_remove,
};
EXPORT_SYMBOL(vlynq_bus_type);
#ifdef CONFIG_PCI
extern void vlynq_pci_init(void);
#endif
int __init vlynq_init(void)
{
int res = 0;
res = bus_register(&vlynq_bus_type);
if (res)
goto fail_bus;
res = platform_driver_register(&vlynq_driver);
if (res)
goto fail_platform;
#ifdef CONFIG_PCI
vlynq_pci_init();
#endif
return 0;
fail_platform:
bus_unregister(&vlynq_bus_type);
fail_bus:
return res;
}
/*
void __devexit vlynq_exit(void)
{
platform_driver_unregister(&vlynq_driver);
bus_unregister(&vlynq_bus_type);
}
*/
subsys_initcall(vlynq_init);