From 90960d25b13cca9c2c76417355d9173ebb44d3aa Mon Sep 17 00:00:00 2001 From: blogic Date: Tue, 25 Sep 2012 14:46:58 +0000 Subject: [PATCH] [ramips] make ramips ethernet use a register mapping table git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33547 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- .../drivers/net/ethernet/ramips/ramips_main.c | 106 +++++++++++++----- 1 file changed, 78 insertions(+), 28 deletions(-) diff --git a/target/linux/ramips/files/drivers/net/ethernet/ramips/ramips_main.c b/target/linux/ramips/files/drivers/net/ethernet/ramips/ramips_main.c index 3d0956860..0a9b22a44 100644 --- a/target/linux/ramips/files/drivers/net/ethernet/ramips/ramips_main.c +++ b/target/linux/ramips/files/drivers/net/ethernet/ramips/ramips_main.c @@ -47,9 +47,47 @@ static inline void rt305x_esw_exit(void) { } #define RADEBUG(fmt, args...) do {} while (0) #endif +enum raeth_reg { + RAETH_REG_PDMA_GLO_CFG = 0, + RAETH_REG_PDMA_RST_CFG, + RAETH_REG_DLY_INT_CFG, + RAETH_REG_TX_BASE_PTR0, + RAETH_REG_TX_MAX_CNT0, + RAETH_REG_TX_CTX_IDX0, + RAETH_REG_RX_BASE_PTR0, + RAETH_REG_RX_MAX_CNT0, + RAETH_REG_RX_CALC_IDX0, + RAETH_REG_FE_INT_ENABLE, + RAETH_REG_FE_INT_STATUS, + RAETH_REG_COUNT +}; + +static const u32 ramips_reg_table[RAETH_REG_COUNT] = { + [RAETH_REG_PDMA_GLO_CFG] = RAMIPS_PDMA_GLO_CFG, + [RAETH_REG_PDMA_RST_CFG] = RAMIPS_PDMA_RST_CFG, + [RAETH_REG_DLY_INT_CFG] = RAMIPS_DLY_INT_CFG, + [RAETH_REG_TX_BASE_PTR0] = RAMIPS_TX_BASE_PTR0, + [RAETH_REG_TX_MAX_CNT0] = RAMIPS_TX_MAX_CNT0, + [RAETH_REG_TX_CTX_IDX0] = RAMIPS_TX_CTX_IDX0, + [RAETH_REG_RX_BASE_PTR0] = RAMIPS_RX_BASE_PTR0, + [RAETH_REG_RX_MAX_CNT0] = RAMIPS_RX_MAX_CNT0, + [RAETH_REG_RX_CALC_IDX0] = RAMIPS_RX_CALC_IDX0, + [RAETH_REG_FE_INT_ENABLE] = RAMIPS_FE_INT_ENABLE, + [RAETH_REG_FE_INT_STATUS] = RAMIPS_FE_INT_STATUS, +}; + static struct net_device * ramips_dev; static void __iomem *ramips_fe_base = 0; +static inline u32 get_reg_offset(enum raeth_reg reg) +{ + const u32 *table; + + table = ramips_reg_table; + + return table[reg]; +} + static inline void ramips_fe_wr(u32 val, unsigned reg) { @@ -62,22 +100,34 @@ ramips_fe_rr(unsigned reg) return __raw_readl(ramips_fe_base + reg); } +static inline void +ramips_fe_twr(u32 val, enum raeth_reg reg) +{ + ramips_fe_wr(val, get_reg_offset(reg)); +} + +static inline u32 +ramips_fe_trr(enum raeth_reg reg) +{ + return ramips_fe_rr(get_reg_offset(reg)); +} + static inline void ramips_fe_int_disable(u32 mask) { - ramips_fe_wr(ramips_fe_rr(RAMIPS_FE_INT_ENABLE) & ~mask, - RAMIPS_FE_INT_ENABLE); + ramips_fe_twr(ramips_fe_trr(RAETH_REG_FE_INT_ENABLE) & ~mask, + RAETH_REG_FE_INT_ENABLE); /* flush write */ - ramips_fe_rr(RAMIPS_FE_INT_ENABLE); + ramips_fe_trr(RAETH_REG_FE_INT_ENABLE); } static inline void ramips_fe_int_enable(u32 mask) { - ramips_fe_wr(ramips_fe_rr(RAMIPS_FE_INT_ENABLE) | mask, - RAMIPS_FE_INT_ENABLE); + ramips_fe_twr(ramips_fe_trr(RAETH_REG_FE_INT_ENABLE) | mask, + RAETH_REG_FE_INT_ENABLE); /* flush write */ - ramips_fe_rr(RAMIPS_FE_INT_ENABLE); + ramips_fe_trr(RAETH_REG_FE_INT_ENABLE); } static inline void @@ -642,15 +692,15 @@ err_cleanup: static void ramips_setup_dma(struct raeth_priv *re) { - ramips_fe_wr(re->tx_desc_dma, RAMIPS_TX_BASE_PTR0); - ramips_fe_wr(NUM_TX_DESC, RAMIPS_TX_MAX_CNT0); - ramips_fe_wr(0, RAMIPS_TX_CTX_IDX0); - ramips_fe_wr(RAMIPS_PST_DTX_IDX0, RAMIPS_PDMA_RST_CFG); + ramips_fe_twr(re->tx_desc_dma, RAETH_REG_TX_BASE_PTR0); + ramips_fe_twr(NUM_TX_DESC, RAETH_REG_TX_MAX_CNT0); + ramips_fe_twr(0, RAETH_REG_TX_CTX_IDX0); + ramips_fe_twr(RAMIPS_PST_DTX_IDX0, RAETH_REG_PDMA_RST_CFG); - ramips_fe_wr(re->rx_desc_dma, RAMIPS_RX_BASE_PTR0); - ramips_fe_wr(NUM_RX_DESC, RAMIPS_RX_MAX_CNT0); - ramips_fe_wr((NUM_RX_DESC - 1), RAMIPS_RX_CALC_IDX0); - ramips_fe_wr(RAMIPS_PST_DRX_IDX0, RAMIPS_PDMA_RST_CFG); + ramips_fe_twr(re->rx_desc_dma, RAETH_REG_RX_BASE_PTR0); + ramips_fe_twr(NUM_RX_DESC, RAETH_REG_RX_MAX_CNT0); + ramips_fe_twr((NUM_RX_DESC - 1), RAETH_REG_RX_CALC_IDX0); + ramips_fe_twr(RAMIPS_PST_DRX_IDX0, RAETH_REG_PDMA_RST_CFG); } static int @@ -680,7 +730,7 @@ ramips_eth_hard_start_xmit(struct sk_buff *skb, struct net_device *dev) DMA_TO_DEVICE); spin_lock(&re->page_lock); - tx = ramips_fe_rr(RAMIPS_TX_CTX_IDX0); + tx = ramips_fe_trr(RAETH_REG_TX_CTX_IDX0); tx_next = (tx + 1) % NUM_TX_DESC; txi = &re->tx_info[tx]; @@ -700,7 +750,7 @@ ramips_eth_hard_start_xmit(struct sk_buff *skb, struct net_device *dev) txd->txd2 = TX_DMA_LSO | TX_DMA_PLEN0(skb->len); dev->stats.tx_packets++; dev->stats.tx_bytes += skb->len; - ramips_fe_wr(tx_next, RAMIPS_TX_CTX_IDX0); + ramips_fe_twr(tx_next, RAETH_REG_TX_CTX_IDX0); netdev_sent_queue(dev, skb->len); spin_unlock(&re->page_lock); return NETDEV_TX_OK; @@ -720,7 +770,7 @@ ramips_eth_rx_hw(unsigned long ptr) int rx; int max_rx = 16; - rx = ramips_fe_rr(RAMIPS_RX_CALC_IDX0); + rx = ramips_fe_trr(RAETH_REG_RX_CALC_IDX0); while (max_rx) { struct raeth_rx_info *rxi; @@ -768,7 +818,7 @@ ramips_eth_rx_hw(unsigned long ptr) } rxd->rxd2 = RX_DMA_LSO; - ramips_fe_wr(rx, RAMIPS_RX_CALC_IDX0); + ramips_fe_twr(rx, RAETH_REG_RX_CALC_IDX0); max_rx--; } @@ -825,13 +875,13 @@ ramips_eth_irq(int irq, void *dev) struct raeth_priv *re = netdev_priv(dev); unsigned int status; - status = ramips_fe_rr(RAMIPS_FE_INT_STATUS); - status &= ramips_fe_rr(RAMIPS_FE_INT_ENABLE); + status = ramips_fe_trr(RAETH_REG_FE_INT_STATUS); + status &= ramips_fe_trr(RAETH_REG_FE_INT_ENABLE); if (!status) return IRQ_NONE; - ramips_fe_wr(status, RAMIPS_FE_INT_STATUS); + ramips_fe_twr(status, RAETH_REG_FE_INT_STATUS); if (status & RAMIPS_RX_DLY_INT) { ramips_fe_int_disable(RAMIPS_RX_DLY_INT); @@ -867,10 +917,10 @@ ramips_eth_open(struct net_device *dev) ramips_hw_set_macaddr(dev->dev_addr); ramips_setup_dma(re); - ramips_fe_wr((ramips_fe_rr(RAMIPS_PDMA_GLO_CFG) & 0xff) | + ramips_fe_twr((ramips_fe_trr(RAETH_REG_PDMA_GLO_CFG) & 0xff) | (RAMIPS_TX_WB_DDONE | RAMIPS_RX_DMA_EN | RAMIPS_TX_DMA_EN | RAMIPS_PDMA_SIZE_4DWORDS), - RAMIPS_PDMA_GLO_CFG); + RAETH_REG_PDMA_GLO_CFG); ramips_fe_wr((ramips_fe_rr(RAMIPS_FE_GLO_CFG) & ~(RAMIPS_US_CYC_CNT_MASK << RAMIPS_US_CYC_CNT_SHIFT)) | ((re->plat->sys_freq / RAMIPS_US_CYC_CNT_DIVISOR) << RAMIPS_US_CYC_CNT_SHIFT), @@ -882,8 +932,8 @@ ramips_eth_open(struct net_device *dev) ramips_phy_start(re); - ramips_fe_wr(RAMIPS_DELAY_INIT, RAMIPS_DLY_INT_CFG); - ramips_fe_wr(RAMIPS_TX_DLY_INT | RAMIPS_RX_DLY_INT, RAMIPS_FE_INT_ENABLE); + ramips_fe_twr(RAMIPS_DELAY_INIT, RAETH_REG_DLY_INT_CFG); + ramips_fe_twr(RAMIPS_TX_DLY_INT | RAMIPS_RX_DLY_INT, RAETH_REG_FE_INT_ENABLE); ramips_fe_wr(ramips_fe_rr(RAMIPS_GDMA1_FWD_CFG) & ~(RAMIPS_GDM1_ICS_EN | RAMIPS_GDM1_TCS_EN | RAMIPS_GDM1_UCS_EN | 0xffff), RAMIPS_GDMA1_FWD_CFG); @@ -907,12 +957,12 @@ ramips_eth_stop(struct net_device *dev) { struct raeth_priv *re = netdev_priv(dev); - ramips_fe_wr(ramips_fe_rr(RAMIPS_PDMA_GLO_CFG) & + ramips_fe_twr(ramips_fe_trr(RAETH_REG_PDMA_GLO_CFG) & ~(RAMIPS_TX_WB_DDONE | RAMIPS_RX_DMA_EN | RAMIPS_TX_DMA_EN), - RAMIPS_PDMA_GLO_CFG); + RAETH_REG_PDMA_GLO_CFG); /* disable all interrupts in the hw */ - ramips_fe_wr(0, RAMIPS_FE_INT_ENABLE); + ramips_fe_twr(0, RAETH_REG_FE_INT_ENABLE); ramips_phy_stop(re); free_irq(dev->irq, dev);