mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2025-04-21 12:27:27 +03:00
update brcm-2.4 to 2.4.35.4, integrate new broadcom system code, update broadcom-wl to a contributed version (v4.150.10.5) - no bcm57xx support yet, will follow shortly
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@10137 3c298f89-4303-0410-b956-a3cf2f4a3e73
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@@ -1,7 +1,7 @@
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/*
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* HND SiliconBackplane MIPS core software interface.
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*
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* Copyright 2006, Broadcom Corporation
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* Copyright 2007, Broadcom Corporation
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* All Rights Reserved.
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*
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* THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
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@@ -9,7 +9,7 @@
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* SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
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*
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* $Id: hndmips.h,v 1.1.1.8 2006/02/27 03:43:16 honor Exp $
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* $Id$
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*/
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#ifndef _hndmips_h_
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@@ -22,6 +22,7 @@ extern uint32 sb_memc_get_ncdl(sb_t *sbh);
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#if defined(BCMPERFSTATS)
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/* enable counting - exclusive version. Only one set of counters allowed at a time */
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extern void hndmips_perf_cyclecount_enable(void);
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extern void hndmips_perf_instrcount_enable(void);
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extern void hndmips_perf_icachecount_enable(void);
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extern void hndmips_perf_dcachecount_enable(void);
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@@ -40,6 +41,6 @@ extern void hndmips_perf_icache_miss_enable(void);
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extern uint32 hndmips_perf_read_instrcount(void);
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extern uint32 hndmips_perf_read_cache_miss(void);
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extern uint32 hndmips_perf_read_cache_hit(void);
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#endif /* defined(BCMINTERNAL) || defined (BCMPERFSTATS) */
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#endif
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#endif /* _hndmips_h_ */
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