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mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2024-07-15 22:48:48 +03:00

generic: ar8216: add a helper function for writing PHY debug registers

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@30884 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
juhosg 2012-03-11 16:49:35 +00:00
parent 7c3e076bdf
commit 91f1cdc854

View File

@ -118,6 +118,18 @@ ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
mutex_unlock(&bus->mdio_lock); mutex_unlock(&bus->mdio_lock);
} }
static void
ar8216_phy_dbg_write(struct ar8216_priv *priv, int phy_addr,
u16 dbg_addr, u16 dbg_data)
{
struct mii_bus *bus = priv->phy->bus;
mutex_lock(&bus->mdio_lock);
bus->write(bus, phy_addr, MII_ATH_DBG_ADDR, dbg_addr);
bus->write(bus, phy_addr, MII_ATH_DBG_DATA, dbg_data);
mutex_unlock(&bus->mdio_lock);
}
static u32 static u32
ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val) ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
{ {
@ -719,14 +731,11 @@ ar8316_hw_init(struct ar8216_priv *priv)
if ((i == 4) && priv->port4_phy && if ((i == 4) && priv->port4_phy &&
priv->phy->interface == PHY_INTERFACE_MODE_RGMII) { priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
/* work around for phy4 rgmii mode */ /* work around for phy4 rgmii mode */
mdiobus_write(bus, i, MII_ATH_DBG_ADDR, 0x12); ar8216_phy_dbg_write(priv, i, 0x12, 0x480c);
mdiobus_write(bus, i, MII_ATH_DBG_DATA, 0x480c);
/* rx delay */ /* rx delay */
mdiobus_write(bus, i, MII_ATH_DBG_ADDR, 0x0); ar8216_phy_dbg_write(priv, i, 0x0, 0x824e);
mdiobus_write(bus, i, MII_ATH_DBG_DATA, 0x824e);
/* tx delay */ /* tx delay */
mdiobus_write(bus, i, MII_ATH_DBG_ADDR, 0x5); ar8216_phy_dbg_write(priv, i, 0x5, 0x3d47);
mdiobus_write(bus, i, MII_ATH_DBG_DATA, 0x3d47);
msleep(1000); msleep(1000);
} }