mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2025-04-21 12:27:27 +03:00
bump ifxmips to 2.6.25.1
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@11071 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
@@ -602,7 +602,7 @@ map_dma_chan(_dma_chan_map *map)
|
||||
for (i = 0; i < MAX_DMA_CHANNEL_NUM; i++)
|
||||
{
|
||||
dma_chan[i].irq = map[i].irq;
|
||||
result = request_irq(dma_chan[i].irq, dma_interrupt, SA_INTERRUPT, "dma-core", (void*)&dma_chan[i]);
|
||||
result = request_irq(dma_chan[i].irq, dma_interrupt, IRQF_DISABLED, "dma-core", (void*)&dma_chan[i]);
|
||||
if (result)
|
||||
{
|
||||
printk("error, cannot get dma_irq!\n");
|
||||
|
||||
@@ -67,7 +67,6 @@ prom_printf (const char * fmt, ...)
|
||||
void __init
|
||||
prom_init(void)
|
||||
{
|
||||
mips_machgroup = MACH_GROUP_IFXMIPS;
|
||||
mips_machtype = MACH_INFINEON_IFXMIPS;
|
||||
|
||||
strcpy(&(arcs_cmdline[0]), "console=ttyS0,115200 rootfstype=squashfs,jffs2 init=/etc/preinit");
|
||||
|
||||
@@ -114,28 +114,9 @@ ifxmips_be_handler(struct pt_regs *regs, int is_fixup)
|
||||
return MIPS_BE_FATAL;
|
||||
}
|
||||
|
||||
/* ISR GPTU Timer 6 for high resolution timer */
|
||||
static irqreturn_t
|
||||
ifxmips_timer6_interrupt(int irq, void *dev_id)
|
||||
{
|
||||
timer_interrupt(IFXMIPS_TIMER6_INT, NULL);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static struct irqaction hrt_irqaction = {
|
||||
.handler = ifxmips_timer6_interrupt,
|
||||
.flags = IRQF_DISABLED,
|
||||
.name = "hrt",
|
||||
};
|
||||
|
||||
void __init
|
||||
plat_timer_setup (struct irqaction *irq)
|
||||
plat_time_init (void)
|
||||
{
|
||||
unsigned int retval;
|
||||
|
||||
setup_irq(MIPS_CPU_TIMER_IRQ, irq);
|
||||
|
||||
r4k_cur = (read_c0_count() + r4k_offset);
|
||||
write_c0_compare(r4k_cur);
|
||||
|
||||
@@ -145,17 +126,11 @@ plat_timer_setup (struct irqaction *irq)
|
||||
|
||||
writel(0xffff, IFXMIPS_GPTU_GPT_CAPREL);
|
||||
writel(0x80C0, IFXMIPS_GPTU_GPT_T6CON);
|
||||
|
||||
//retval = setup_irq(IFXMIPS_TIMER6_INT, &hrt_irqaction);
|
||||
|
||||
if (retval)
|
||||
{
|
||||
prom_printf("reqeust_irq failed %d. HIGH_RES_TIMER is diabled\n", IFXMIPS_TIMER6_INT);
|
||||
}
|
||||
}
|
||||
|
||||
extern const char* get_system_type (void);
|
||||
|
||||
void (*board_time_init)(void);
|
||||
void __init
|
||||
plat_mem_setup (void)
|
||||
{
|
||||
|
||||
@@ -0,0 +1,24 @@
|
||||
/*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
*/
|
||||
#ifndef __ASM_MIPS_MACH_IFXMIPS_WAR_H
|
||||
#define __ASM_MIPS_MACH_IFXMIPS_WAR_H
|
||||
|
||||
#define R4600_V1_INDEX_ICACHEOP_WAR 0
|
||||
#define R4600_V1_HIT_CACHEOP_WAR 0
|
||||
#define R4600_V2_HIT_CACHEOP_WAR 0
|
||||
#define R5432_CP0_INTERRUPT_WAR 0
|
||||
#define BCM1250_M3_WAR 0
|
||||
#define SIBYTE_1956_WAR 0
|
||||
#define MIPS4K_ICACHE_REFILL_WAR 0
|
||||
#define MIPS_CACHE_SYNC_WAR 0
|
||||
#define TX49XX_ICACHE_INDEX_INV_WAR 0
|
||||
#define RM9000_CDEX_SMP_WAR 0
|
||||
#define ICACHE_REFILLS_WORKAROUND_WAR 0
|
||||
#define R10000_LLSC_WAR 0
|
||||
#define MIPS34K_MISSED_ITLB_WAR 0
|
||||
|
||||
#endif
|
||||
Reference in New Issue
Block a user