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ar71xx: fix AR934X_EHCI_SIZE
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@32947 3c298f89-4303-0410-b956-a3cf2f4a3e73
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@ -60,7 +60,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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#define AR934X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000)
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#define AR934X_WMAC_SIZE 0x20000
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+#define AR934X_EHCI_BASE 0x1b000000
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+#define AR934X_EHCI_SIZE 0x1000
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+#define AR934X_EHCI_SIZE 0x200
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/*
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* DDR_CTRL block
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@ -82,7 +82,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
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@@ -92,6 +92,10 @@
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#define AR934X_EHCI_BASE 0x1b000000
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#define AR934X_EHCI_SIZE 0x1000
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#define AR934X_EHCI_SIZE 0x200
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+#define QCA955X_EHCI0_BASE 0x1b000000
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+#define QCA955X_EHCI1_BASE 0x1b400000
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@ -61,7 +61,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
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@@ -92,6 +92,8 @@
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#define AR934X_EHCI_BASE 0x1b000000
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#define AR934X_EHCI_SIZE 0x1000
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#define AR934X_EHCI_SIZE 0x200
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+#define QCA955X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000)
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+#define QCA955X_WMAC_SIZE 0x20000
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@ -83,7 +83,7 @@ Subject: [PATCH 26/34] MIPS: ath79: add PCI controller registration code for the
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+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
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@@ -92,6 +92,19 @@
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#define AR934X_EHCI_BASE 0x1b000000
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#define AR934X_EHCI_SIZE 0x1000
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#define AR934X_EHCI_SIZE 0x200
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+#define QCA955X_PCI_MEM_BASE0 0x10000000
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+#define QCA955X_PCI_MEM_BASE1 0x12000000
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