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ar71xx: fix GPIO function handling on AR934x
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@29124 3c298f89-4303-0410-b956-a3cf2f4a3e73
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@ -141,13 +141,21 @@ void ar71xx_gpio_function_enable(u32 mask)
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{
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void __iomem *base = ar71xx_gpio_base;
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unsigned long flags;
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unsigned int reg;
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if (ar71xx_soc == AR71XX_SOC_AR9341 ||
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ar71xx_soc == AR71XX_SOC_AR9342 ||
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ar71xx_soc == AR71XX_SOC_AR9344) {
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reg = AR934X_GPIO_REG_FUNC;
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} else {
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reg = AR71XX_GPIO_REG_FUNC;
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}
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spin_lock_irqsave(&ar71xx_gpio_lock, flags);
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__raw_writel(__raw_readl(base + AR71XX_GPIO_REG_FUNC) | mask,
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base + AR71XX_GPIO_REG_FUNC);
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__raw_writel(__raw_readl(base + reg) | mask, base + reg);
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/* flush write */
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(void) __raw_readl(base + AR71XX_GPIO_REG_FUNC);
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(void) __raw_readl(base + reg);
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spin_unlock_irqrestore(&ar71xx_gpio_lock, flags);
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}
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@ -156,13 +164,21 @@ void ar71xx_gpio_function_disable(u32 mask)
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{
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void __iomem *base = ar71xx_gpio_base;
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unsigned long flags;
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unsigned int reg;
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if (ar71xx_soc == AR71XX_SOC_AR9341 ||
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ar71xx_soc == AR71XX_SOC_AR9342 ||
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ar71xx_soc == AR71XX_SOC_AR9344) {
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reg = AR934X_GPIO_REG_FUNC;
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} else {
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reg = AR71XX_GPIO_REG_FUNC;
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}
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spin_lock_irqsave(&ar71xx_gpio_lock, flags);
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__raw_writel(__raw_readl(base + AR71XX_GPIO_REG_FUNC) & ~mask,
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base + AR71XX_GPIO_REG_FUNC);
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__raw_writel(__raw_readl(base + reg) & ~mask, base + reg);
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/* flush write */
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(void) __raw_readl(base + AR71XX_GPIO_REG_FUNC);
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(void) __raw_readl(base + reg);
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spin_unlock_irqrestore(&ar71xx_gpio_lock, flags);
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}
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@ -171,13 +187,21 @@ void ar71xx_gpio_function_setup(u32 set, u32 clear)
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{
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void __iomem *base = ar71xx_gpio_base;
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unsigned long flags;
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unsigned int reg;
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if (ar71xx_soc == AR71XX_SOC_AR9341 ||
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ar71xx_soc == AR71XX_SOC_AR9342 ||
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ar71xx_soc == AR71XX_SOC_AR9344) {
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reg = AR934X_GPIO_REG_FUNC;
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} else {
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reg = AR71XX_GPIO_REG_FUNC;
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}
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spin_lock_irqsave(&ar71xx_gpio_lock, flags);
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__raw_writel((__raw_readl(base + AR71XX_GPIO_REG_FUNC) & ~clear) | set,
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base + AR71XX_GPIO_REG_FUNC);
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__raw_writel((__raw_readl(base + reg) & ~clear) | set, base + reg);
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/* flush write */
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(void) __raw_readl(base + AR71XX_GPIO_REG_FUNC);
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(void) __raw_readl(base + reg);
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spin_unlock_irqrestore(&ar71xx_gpio_lock, flags);
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}
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@ -430,6 +430,8 @@ static inline u32 ar71xx_usb_ctrl_rr(unsigned reg)
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#define AR71XX_GPIO_REG_INT_ENABLE 0x24
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#define AR71XX_GPIO_REG_FUNC 0x28
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#define AR934X_GPIO_REG_FUNC 0x6c
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#define AR71XX_GPIO_FUNC_STEREO_EN BIT(17)
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#define AR71XX_GPIO_FUNC_SLIC_EN BIT(16)
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#define AR71XX_GPIO_FUNC_SPI_CS2_EN BIT(13)
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