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git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-24 09:42:49 +02:00
more irq patches and cleanups
git-svn-id: svn://svn.openwrt.org/openwrt/trunk/openwrt@3262 3c298f89-4303-0410-b956-a3cf2f4a3e73
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mbm
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commit
98289a1db2
@ -92,7 +92,7 @@ diff -Nur linux-2.6.15/arch/mips/aruba/idtIRQ.S linux-2.6.15-openwrt/arch/mips/a
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diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/aruba/irq.c
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--- linux-2.6.15/arch/mips/aruba/irq.c 1970-01-01 01:00:00.000000000 +0100
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+++ linux-2.6.15-openwrt/arch/mips/aruba/irq.c 2006-01-10 00:32:32.000000000 +0100
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@@ -0,0 +1,447 @@
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@@ -0,0 +1,429 @@
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+/**************************************************************************
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+ *
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+ * BRIEF MODULE DESCRIPTION
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@ -183,8 +183,8 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
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+};
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+
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+#define READ_PEND_MERLOT(base) (*((volatile unsigned long *)(0xbc003010)))
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+#define READ_MASK_MERLOT(base) (*((volatile unsigned long *)(0xbc003010 + 4)))
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+#define WRITE_MASK_MERLOT(base, val) ((*((volatile unsigned long *)((0xbc003010) + 4))) = (val))
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+#define READ_MASK_MERLOT(base) (*((volatile unsigned long *)(0xbc003014)))
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+#define WRITE_MASK_MERLOT(base, val) ((*((volatile unsigned long *)(0xbc003014))) = (val), READ_MASK_MERLOT())
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+
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+static const intr_group_t intr_group_muscat[NUM_INTR_GROUPS] = {
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+ {0x0000efff, (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 0 * IC_GROUP_OFFSET)},
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@ -224,21 +224,14 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
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+
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+static inline void enable_local_irq(unsigned int ip)
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+{
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+ int ipnum = 0x100 << ip;
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+ clear_c0_cause(ipnum);
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+ set_c0_status(ipnum);
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+ set_c0_status(0x100 << ip);
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+ irq_enable_hazard();
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+}
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+
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+static inline void disable_local_irq(unsigned int ip)
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+{
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+ int ipnum = 0x100 << ip;
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+ clear_c0_status(ipnum);
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+}
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+
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+static inline void ack_local_irq(unsigned int ip)
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+{
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+ int ipnum = 0x100 << ip;
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+ clear_c0_cause(ipnum);
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+ clear_c0_status(0x100 << ip);
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+ irq_disable_hazard();
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+}
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+
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+static void aruba_enable_irq(unsigned int irq_nr)
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@ -270,9 +263,6 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
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+ ip -= (group << 5);
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+ intr_bit = 1 << ip;
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+
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+ // first enable the IP mapped to this IRQ
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+ enable_local_irq(group_to_ip(group));
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+
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+ switch (mips_machtype) {
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+ case MACH_ARUBA_AP70:
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+ addr = intr_group_muscat[group].base_addr;
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@ -285,8 +275,10 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
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+ WRITE_MASK_MERLOT(addr, READ_MASK_MERLOT(addr) | intr_bit);
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+ break;
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+ }
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+ enable_local_irq(group_to_ip(group));
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+ }
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+
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+ back_to_back_c0_hazard();
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+ local_irq_restore(flags);
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+
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+}
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@ -341,15 +333,15 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
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+ // mask intr within group
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+ mask = READ_MASK_MERLOT(addr);
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+ mask &= ~intr_bit;
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+ WRITE_MASK_MERLOT(addr, mask);
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+ if (READ_MASK_MERLOT(addr))
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+ if (!mask)
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+ disable_local_irq(group_to_ip(group));
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+ WRITE_MASK_MERLOT(addr, mask);
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+ break;
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+ }
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+ }
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+
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+ back_to_back_c0_hazard();
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+ local_irq_restore(flags);
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+
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+}
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+
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+static unsigned int startup_irq(unsigned int irq_nr)
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@ -361,29 +353,31 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
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+static void shutdown_irq(unsigned int irq_nr)
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+{
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+ aruba_disable_irq(irq_nr);
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+ return;
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+}
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+
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+static void mask_and_ack_irq(unsigned int irq_nr)
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+{
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+ aruba_disable_irq(irq_nr);
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+ ack_local_irq(group_to_ip(irq_to_group(irq_nr)));
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+}
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+
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+static void end_irq(unsigned int irq_nr)
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+{
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+
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+ unsigned long flags;
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+ int ip = irq_nr - GROUP0_IRQ_BASE;
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+ unsigned int intr_bit, group;
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+ volatile unsigned int *addr;
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+
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+
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+ local_irq_save(flags);
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+ if (irq_desc[irq_nr].status & (IRQ_DISABLED | IRQ_INPROGRESS)) {
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+ printk("warning: end_irq %d did not enable (%x)\n",
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+ irq_nr, irq_desc[irq_nr].status);
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+ } else if (ip<0) {
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+ /* fall through; enable the interrupt
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+ * -- It'll get stuck otherwise
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+ */
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+
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+ }
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+
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+ if (ip<0) {
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+ enable_local_irq(irq_nr);
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+ } else {
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+
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@ -409,7 +403,8 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
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+ break;
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+
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+ case MACH_ARUBA_AP65:
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+ case MACH_ARUBA_AP60:
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+ case MACH_ARUBA_AP60:
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+ default:
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+ group = 0;
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+
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+ // calc interrupt bit within group
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@ -424,11 +419,10 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
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+ break;
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+ }
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+ }
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+ local_irq_restore(flags);
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+}
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+
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+static struct hw_interrupt_type aruba_irq_type = {
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+ .typename = "IDT434",
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+ .typename = "ARUBA",
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+ .startup = startup_irq,
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+ .shutdown = shutdown_irq,
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+ .enable = aruba_enable_irq,
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@ -444,7 +438,6 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
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+ memset(irq_desc, 0, sizeof(irq_desc));
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+ set_except_vector(0, idtIRQ);
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+
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+
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+ set_c0_status(0xFF00);
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+
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+ for (i = 0; i < RC32434_NR_IRQS; i++) {
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@ -454,17 +447,6 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
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+ irq_desc[i].handler = &aruba_irq_type;
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+ spin_lock_init(&irq_desc[i].lock);
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+ }
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+
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+ switch (mips_machtype) {
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+ case MACH_ARUBA_AP70:
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+ break;
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+ case MACH_ARUBA_AP65:
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+ case MACH_ARUBA_AP60:
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+ default:
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+ WRITE_MASK_MERLOT(intr_group_merlot[0].base_addr, 0);
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+ *((volatile unsigned long *)0xbc003014) = 0x10;
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+ break;
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+ }
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+}
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+
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+/* Main Interrupt dispatcher */
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@ -475,7 +457,7 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
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+
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+ if(cp0_cause == 0) {
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+ printk("INTERRUPT(S) FIRED WHILE MASKED\n");
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+
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+#ifdef ARUBA_DEBUG
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+ // debuging use -- figure out which interrupt(s) fired
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+ cp0_cause = read_c0_cause() & CAUSEF_IP;
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+ while (cp0_cause) {
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@ -486,11 +468,10 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
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+ printk(" ---> MASKED IRQ %d\n",irq_nr);
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+ cp0_cause &= ~(1 << intr_bit);
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+ }
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+
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+#endif
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+ return;
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+ }
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+
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+
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+ switch (mips_machtype) {
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+ case MACH_ARUBA_AP70:
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+ if ((ip = (cp0_cause & 0x7c00))) {
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@ -514,7 +495,8 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
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+ pend = READ_PEND_MERLOT(addr);
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+ pend &= READ_MASK_MERLOT(addr); // only unmasked interrupts
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+ /* handle one misc interrupt at a time */
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+ while (pend) {
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+ while (pend)
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+ {
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+ unsigned long intr_bit;
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+ unsigned int irq_nr;
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+
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@ -524,9 +506,9 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
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+ do_IRQ(irq_nr, regs);
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+ pend &= ~(1 << intr_bit);
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+ }
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+ }
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+ if (cp0_cause & 0x3c00) { // irq 2-5
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+ while (cp0_cause) {
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+ } else if (cp0_cause & 0x3c00) { // irq 2-5
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+ while (cp0_cause)
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+ {
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+ unsigned long intr_bit;
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+ unsigned int irq_nr;
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+
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