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Add NAND flash/YAFFS2 patches for RB532 by David Goodenough

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Read the kernel command line from an otherwise unused area of the kernel image (will be used for changing the command line on the fly when copying the system from CF to NAND)


git-svn-id: svn://svn.openwrt.org/openwrt/trunk@5296 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
nbd
2006-10-26 01:08:41 +00:00
parent e307e20472
commit 99f2f68b6f
7 changed files with 11649 additions and 93 deletions
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61
target/linux/rb532-2.6/patches/100-rb5xx_support.patch
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@@ -567,7 +567,7 @@ diff -urN linux.old/arch/mips/pci/pci-rc32434.c linux.dev/arch/mips/pci/pci-rc32
diff -urN linux.old/arch/mips/rb500/devices.c linux.dev/arch/mips/rb500/devices.c
--- linux.old/arch/mips/rb500/devices.c 1970-01-01 01:00:00.000000000 +0100
+++ linux.dev/arch/mips/rb500/devices.c 2006-10-11 21:56:38.000000000 +0200
@@ -0,0 +1,211 @@
@@ -0,0 +1,198 @@
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
@@ -677,10 +677,25 @@ diff -urN linux.old/arch/mips/rb500/devices.c linux.dev/arch/mips/rb500/devices.
+ .num_resources = ARRAY_SIZE(cf_slot0_res),
+};
+
+/* Resources and device for NAND. There is no data needed and no irqs, so just define the memory used. */
+static struct resource nand_slot0_res[] = {
+ {
+ .name = "nand_membase",
+ .flags = IORESOURCE_MEM
+ }
+};
+
+static struct platform_device nand_slot0 = {
+ .id = 0,
+ .name = "rb500-nand",
+ .resource = nand_slot0_res,
+ .num_resources = ARRAY_SIZE(nand_slot0_res),
+};
+
+
+static struct platform_device *rb500_devs[] = {
+ &korina_dev0,
+ &nand_slot0,
+ &cf_slot0
+};
+
@@ -711,6 +726,7 @@ diff -urN linux.old/arch/mips/rb500/devices.c linux.dev/arch/mips/rb500/devices.
+
+/* DEVICE CONTROLLER 1 */
+#define CFG_DC_DEV1 (void*)0xb8010010
+#define CFG_DC_DEV2 (void*)0xb8010020
+#define CFG_DC_DEVBASE 0x0
+#define CFG_DC_DEVMASK 0x4
+#define CFG_DC_DEVC 0x8
@@ -726,6 +742,10 @@ diff -urN linux.old/arch/mips/rb500/devices.c linux.dev/arch/mips/rb500/devices.
+ cf_slot0_res[0].start = readl(CFG_DC_DEV1 + CFG_DC_DEVBASE);
+ cf_slot0_res[0].end = cf_slot0_res[0].start + 0x1000;
+ }
+
+ /* There is always a NAND device */
+ nand_slot0_res[0].start = readl( CFG_DC_DEV2 + CFG_DC_DEVBASE);
+ nand_slot0_res[0].end = nand_slot0_res[0].start + 0x1000;
+
+ return platform_add_devices(rb500_devs, ARRAY_SIZE(rb500_devs));
+}
@@ -745,39 +765,6 @@ diff -urN linux.old/arch/mips/rb500/devices.c linux.dev/arch/mips/rb500/devices.
+extern void block2mtd_setup(char *initstr);
+extern void mount_devfs_fs(void);
+
+static int __init setup_mtd(void)
+{
+ struct hd_struct **part;
+ int num = 0, i;
+ char initstr[64];
+
+ if (cf_slot0_data.gd == NULL)
+ return 0;
+
+ /* count partitions */
+ part = cf_slot0_data.gd->part;
+ while (part[num] != NULL) {
+ num++;
+ }
+
+ if (num < 2)
+ return 0;
+
+ mount_devfs_fs();
+ printk("Setting up block2mtd devices\n");
+
+ block2mtd_setup("/dev/cf/card0/part1,131072,kernel");
+ block2mtd_setup("/dev/cf/card0/part2,131072,rootfs");
+
+ for (i = 2; part[i]; i++) {
+ sprintf(initstr, "/dev/cf/card0/part%d,131072,part%d", i + 1, i + 1);
+ block2mtd_setup(initstr);
+ }
+
+ return 0;
+}
+
+late_initcall(setup_mtd);
+#endif
diff -urN linux.old/arch/mips/rb500/early_serial.c linux.dev/arch/mips/rb500/early_serial.c
--- linux.old/arch/mips/rb500/early_serial.c 1970-01-01 01:00:00.000000000 +0100
@@ -1262,7 +1249,7 @@ diff -urN linux.old/arch/mips/rb500/Makefile linux.dev/arch/mips/rb500/Makefile
diff -urN linux.old/arch/mips/rb500/misc.c linux.dev/arch/mips/rb500/misc.c
--- linux.old/arch/mips/rb500/misc.c 1970-01-01 01:00:00.000000000 +0100
+++ linux.dev/arch/mips/rb500/misc.c 2006-10-11 21:56:38.000000000 +0200
@@ -0,0 +1,54 @@
@@ -0,0 +1,56 @@
+#include <linux/module.h>
+#include <linux/kernel.h> /* printk() */
+#include <linux/types.h> /* size_t */
@@ -1273,7 +1260,7 @@ diff -urN linux.old/arch/mips/rb500/misc.c linux.dev/arch/mips/rb500/misc.c
+#define GPIO_BADDR 0xb8050000
+
+
+static unsigned char *devCtl3Base = (unsigned char *) KSEG1ADDR(0x18010030);
+static volatile unsigned char *devCtl3Base = 0;
+static unsigned char latchU5State = 0;
+static spinlock_t clu5Lock = SPIN_LOCK_UNLOCKED;
+
@@ -1294,6 +1281,8 @@ diff -urN linux.old/arch/mips/rb500/misc.c linux.dev/arch/mips/rb500/misc.c
+ unsigned flags;
+ spin_lock_irqsave(&clu5Lock, flags);
+ latchU5State = (latchU5State | orMask) & ~nandMask;
+ if( !devCtl3Base) devCtl3Base = (volatile unsigned char *)
+ KSEG1ADDR(*(volatile unsigned *) KSEG1ADDR(0x18010030));
+ *devCtl3Base = latchU5State;
+ spin_unlock_irqrestore(&clu5Lock, flags);
+}