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git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-08-22 02:27:09 +03:00
enable the second uart on the WG302v1
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@12040 3c298f89-4303-0410-b956-a3cf2f4a3e73
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parent
f17fdda981
commit
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@ -112,7 +112,7 @@
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+subsys_initcall(wg302v1_pci_init);
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+subsys_initcall(wg302v1_pci_init);
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--- /dev/null
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--- /dev/null
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+++ b/arch/arm/mach-ixp4xx/wg302v1-setup.c
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+++ b/arch/arm/mach-ixp4xx/wg302v1-setup.c
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@@ -0,0 +1,126 @@
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@@ -0,0 +1,142 @@
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+/*
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+/*
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+ * arch/arm/mach-ixp4xx/wg302v1-setup.c
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+ * arch/arm/mach-ixp4xx/wg302v1-setup.c
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+ *
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+ *
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@ -163,10 +163,17 @@
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+ .resource = &wg302v1_flash_resource,
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+ .resource = &wg302v1_flash_resource,
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+};
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+};
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+
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+
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+static struct resource wg302v1_uart_resource = {
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+static struct resource wg302v1_uart_resources[] = {
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+ {
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+ .start = IXP4XX_UART1_BASE_PHYS,
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+ .start = IXP4XX_UART1_BASE_PHYS,
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+ .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
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+ .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
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+ .flags = IORESOURCE_MEM,
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+ .flags = IORESOURCE_MEM,
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+ },
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+ {
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+ .start = IXP4XX_UART2_BASE_PHYS,
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+ .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
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+ .flags = IORESOURCE_MEM,
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+ }
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+};
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+};
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+
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+
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+static struct plat_serial8250_port wg302v1_uart_data[] = {
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+static struct plat_serial8250_port wg302v1_uart_data[] = {
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@ -179,6 +186,15 @@
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+ .regshift = 2,
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+ .regshift = 2,
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+ .uartclk = IXP4XX_UART_XTAL,
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+ .uartclk = IXP4XX_UART_XTAL,
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+ },
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+ },
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+ {
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+ .mapbase = IXP4XX_UART2_BASE_PHYS,
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+ .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
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+ .irq = IRQ_IXP4XX_UART2,
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+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
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+ .iotype = UPIO_MEM,
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+ .regshift = 2,
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+ .uartclk = IXP4XX_UART_XTAL,
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+ },
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+ { },
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+ { },
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+};
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+};
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+
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+
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@ -188,8 +204,8 @@
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+ .dev = {
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+ .dev = {
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+ .platform_data = wg302v1_uart_data,
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+ .platform_data = wg302v1_uart_data,
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+ },
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+ },
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+ .num_resources = 1,
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+ .num_resources = 2,
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+ .resource = &wg302v1_uart_resource,
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+ .resource = wg302v1_uart_resources,
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+};
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+};
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+
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+
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+static struct eth_plat_info wg302v1_plat_eth[] = {
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+static struct eth_plat_info wg302v1_plat_eth[] = {
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