diff --git a/target/linux/xburst/files-2.6.31/drivers/video/jz4740_slcd.c b/target/linux/xburst/files-2.6.31/drivers/video/jz4740_slcd.c deleted file mode 100755 index 41f092848..000000000 --- a/target/linux/xburst/files-2.6.31/drivers/video/jz4740_slcd.c +++ /dev/null @@ -1,1334 +0,0 @@ -/* - * linux/drivers/video/jzslcd.c -- Ingenic On-Chip Smart LCD frame buffer device - * - * Copyright (C) 2005-2007, Ingenic Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include "console/fbcon.h" - -#include "jz4740_slcd.h" - -#undef DEBUG -//#define DEBUG -#ifdef DEBUG -#define dprintk(x...) printk(x) -#else -#define dprintk(x...) -#endif - -#define print_err(f, arg...) printk(KERN_ERR DRIVER_NAME ": " f "\n", ## arg) -#define print_warn(f, arg...) printk(KERN_WARNING DRIVER_NAME ": " f "\n", ## arg) -#define print_info(f, arg...) printk(KERN_INFO DRIVER_NAME ": " f "\n", ## arg) -#ifdef DEBUG -#define print_dbg(f, arg...) printk("dbg::" __FILE__ ",LINE(%d): " f "\n", __LINE__, ## arg) -#else -#define print_dbg(f, arg...) do {} while (0) -#endif - -static jz_dma_desc slcd_palette_desc __attribute__ ((aligned (16))); -static jz_dma_desc slcd_frame_desc __attribute__ ((aligned (16))); - -static int dma_chan; -static dma_addr_t slcd_frame_desc_phys_addr, slcd_palette_desc_phys_addr; - -static unsigned char non_link_desp = 0; -static unsigned char is_set_reg = 0; -struct lcd_cfb_info { - struct fb_info fb; - struct display_switch *dispsw; - signed int currcon; - int func_use_count; - - struct { - u16 red, green, blue; - } palette[NR_PALETTE]; -#ifdef CONFIG_PM - struct pm_dev *pm; -#endif -}; - -struct slcd_reg_info { - unsigned int cmd; - unsigned int data; -}; -static struct slcd_reg_info reg_buf; -static struct lcd_cfb_info *jzslcd_info; - -struct jzfb_info { - unsigned int cfg; /* panel mode and pin usage etc. */ - unsigned int w; - unsigned int h; - unsigned int bpp; /* bit per pixel */ - unsigned int bus; - unsigned int pclk; /* pixel clk */ - -}; - -static struct jzfb_info jzfb = { -#ifdef CONFIG_JZ_SLCD_LGDP4551 - SLCD_CFG_CS_ACTIVE_LOW | SLCD_CFG_RS_CMD_LOW | SLCD_CFG_TYPE_PARALLEL, - 400, 240, 16, 8, 16000000 /*16 bpp, 8 bus*/ -// 240, 400, 18, 8, 16000000 /*18 bpp, 8 bus*/ -// 400, 240, 18, 8, 16000000 /*18 bpp, 8 bus*/ -#endif - -#ifdef CONFIG_JZ_SLCD_SPFD5420A - SLCD_CFG_CS_ACTIVE_LOW | SLCD_CFG_RS_CMD_LOW | SLCD_CFG_TYPE_PARALLEL, - 400, 240, 18, 18, 16000000 /*18 bpp, 18 bus*/ -#endif -}; - - -static volatile unsigned char *slcd_palette; -static volatile unsigned char *slcd_frame; - -//extern struct display fb_display[MAX_NR_CONSOLES]; -static irqreturn_t slcd_dma_irq(int irq, void *dev_id); - - -static void Mcupanel_RegSet(UINT32 cmd, UINT32 data) -{ - switch (jzfb.bus) { - case 8: - while (REG_SLCD_STATE & SLCD_STATE_BUSY); - REG_SLCD_DATA = SLCD_DATA_RS_COMMAND | ((cmd&0xff00) >> 8); - while (REG_SLCD_STATE & SLCD_STATE_BUSY); - REG_SLCD_DATA = SLCD_DATA_RS_COMMAND | ((cmd&0xff) >> 0); - while (REG_SLCD_STATE & SLCD_STATE_BUSY); - REG_SLCD_DATA = SLCD_DATA_RS_DATA | (data&0xffff); - break; - case 9: - data = ((data & 0xff) << 1) | ((data & 0xff00) << 2); - data = ((data << 6) & 0xfc0000) | ((data << 4) & 0xfc00) | ((data << 2) & 0xfc); - while (REG_SLCD_STATE & SLCD_STATE_BUSY); - REG_SLCD_DATA = SLCD_DATA_RS_COMMAND | ((cmd&0xff00) >> 8); - while (REG_SLCD_STATE & SLCD_STATE_BUSY); - REG_SLCD_DATA = SLCD_DATA_RS_COMMAND | ((cmd&0xff) >> 0); - while (REG_SLCD_STATE & SLCD_STATE_BUSY); - REG_SLCD_DATA = SLCD_DATA_RS_DATA | data; - break; - case 16: - while (REG_SLCD_STATE & SLCD_STATE_BUSY); - REG_SLCD_DATA = SLCD_DATA_RS_COMMAND | (cmd&0xffff); - while (REG_SLCD_STATE & SLCD_STATE_BUSY); - REG_SLCD_DATA = SLCD_DATA_RS_DATA | (data&0xffff); - break; - case 18: - cmd = ((cmd & 0xff) << 1) | ((cmd & 0xff00) << 2); - data = ((data & 0xff) << 1) | ((data & 0xff00) << 2); - while (REG_SLCD_STATE & SLCD_STATE_BUSY); - REG_SLCD_DATA = SLCD_DATA_RS_COMMAND | cmd; - while (REG_SLCD_STATE & SLCD_STATE_BUSY); - REG_SLCD_DATA = SLCD_DATA_RS_DATA | ((data<<6)&0xfc0000)|((data<<4)&0xfc00) | ((data<<2)&0xfc); - break; - default: - printk("Don't support %d bit Bus\n", jzfb.bus ); - break; - } -} - -/* Sent a command withou data */ -static void Mcupanel_Command(UINT32 cmd) { - switch (jzfb.bus) { - case 8: - case 9: - while (REG_SLCD_STATE & SLCD_STATE_BUSY); - REG_SLCD_DATA = SLCD_DATA_RS_COMMAND | ((cmd&0xff00) >> 8); - while (REG_SLCD_STATE & SLCD_STATE_BUSY); - REG_SLCD_DATA = SLCD_DATA_RS_COMMAND | ((cmd&0xff) >> 0); - break; - case 16: - while (REG_SLCD_STATE & SLCD_STATE_BUSY); - REG_SLCD_DATA = SLCD_DATA_RS_COMMAND | (cmd&0xffff); - break; - case 18: - while (REG_SLCD_STATE & SLCD_STATE_BUSY); - REG_SLCD_DATA = SLCD_DATA_RS_COMMAND | ((cmd&0xff00) << 2) | ((cmd&0xff) << 1); - break; - default: - printk("Don't support %d bit Bus\n", jzfb.bus ); - break; - } -} - -/* Set the start address of screen, for example (0, 0) */ -#ifdef CONFIG_JZ_SLCD_LGDP4551 -static void Mcupanel_SetAddr(UINT16 x, UINT16 y) -{ - Mcupanel_RegSet(0x20,x) ; - udelay(1); - Mcupanel_RegSet(0x21,y) ; - udelay(1); - Mcupanel_Command(0x22); - -} -#endif -#ifdef CONFIG_JZ_SLCD_SPFD5420A -void Mcupanel_SetAddr(u32 x, u32 y) //u32 -{ - Mcupanel_RegSet(0x200,x) ; - udelay(1); - Mcupanel_RegSet(0x201,y) ; - udelay(1); - Mcupanel_Command(0x202); - -} - -#endif - -static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf) -{ - chan &= 0xffff; - chan >>= 16 - bf->length; - return chan << bf->offset; -} - -static int jzfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, - u_int transp, struct fb_info *info) -{ - struct lcd_cfb_info *cfb = (struct lcd_cfb_info *)info; - unsigned short *ptr, ctmp; - - print_dbg("regno:%d,RGBt:(%d,%d,%d,%d)\t", regno, red, green, blue, transp); - if (regno >= NR_PALETTE) - return 1; - - cfb->palette[regno].red = red ; - cfb->palette[regno].green = green; - cfb->palette[regno].blue = blue; - if (cfb->fb.var.bits_per_pixel <= 16) { - red >>= 8; - green >>= 8; - blue >>= 8; - - red &= 0xff; - green &= 0xff; - blue &= 0xff; - } - switch (cfb->fb.var.bits_per_pixel) { - case 1: - case 2: - case 4: - case 8: - /* RGB 565 */ - if (((red >> 3) == 0) && ((red >> 2) != 0)) - red = 1 << 3; - if (((blue >> 3) == 0) && ((blue >> 2) != 0)) - blue = 1 << 3; - ctmp = ((red >> 3) << 11) - | ((green >> 2) << 5) | (blue >> 3); - - ptr = (unsigned short *)slcd_palette; - ptr = (unsigned short *)(((u32)ptr)|0xa0000000); - ptr[regno] = ctmp; - - break; - - case 15: - if (regno < 16) - ((u32 *)cfb->fb.pseudo_palette)[regno] = - ((red >> 3) << 10) | - ((green >> 3) << 5) | - (blue >> 3); - break; - case 16: - if (regno < 16) { - ((u32 *)cfb->fb.pseudo_palette)[regno] = - ((red >> 3) << 11) | - ((green >> 2) << 5) | - (blue >> 3); - } - break; - case 18: - case 24: - case 32: - if (regno < 16) - ((u32 *)cfb->fb.pseudo_palette)[regno] = - (red << 16) | - (green << 8) | - (blue << 0); - -/* if (regno < 16) { - unsigned val; - val = chan_to_field(red, &cfb->fb.var.red); - val |= chan_to_field(green, &cfb->fb.var.green); - val |= chan_to_field(blue, &cfb->fb.var.blue); - ((u32 *)cfb->fb.pseudo_palette)[regno] = val; - } -*/ - - break; - } - return 0; -} - -static int jzfb_ioctl (struct fb_info *info, unsigned int cmd, unsigned long arg ) -{ - int ret = 0; - void __user *argp = (void __user *)arg; - - switch (cmd) { - case FBIOSETBACKLIGHT: - __slcd_set_backlight_level(arg); /* We support 8 levels here. */ - break; - case FBIODISPON: - __slcd_display_on(); - break; - case FBIODISPOFF: - __slcd_display_off(); - break; - case FBIO_REFRESH_ALWAYS: - dprintk("slcd_frame_desc.dcmd = 0x%08x\n", slcd_frame_desc.dcmd); - if (slcd_frame_desc.dcmd & DMAC_DCMD_LINK) - printk("The Smart LCD refreshes automatically. Option is omitted!\n"); - else { - dprintk("OPEN DMAC_DCMD_LINK \n"); - slcd_frame_desc.dcmd &= ~DMAC_DCMD_TIE; - slcd_frame_desc.dcmd |= DMAC_DCMD_LINK; - dma_cache_wback((unsigned long)(&slcd_frame_desc), 16); - REG_DMAC_DCMD(dma_chan) &= ~DMAC_DCMD_TIE; - __dmac_channel_set_doorbell(dma_chan); - } - break; - case FBIO_REFRESH_EVENTS: - dprintk("slcd_frame_desc.dcmd = 0x%08x\n", slcd_frame_desc.dcmd); - if (!(slcd_frame_desc.dcmd & DMAC_DCMD_LINK)) - printk("The Smart LCD is refreshed by envents. Option is omitted!\n"); - else { - non_link_desp = 1; - REG_DMAC_DCMD(dma_chan) |= DMAC_DCMD_TIE; - REG_DMAC_DCMD(dma_chan) &= ~DMAC_DCMD_LINK; - } - break; - case FBIO_DO_REFRESH: - - dprintk("slcd_frame_desc.dcmd = 0x%08x\n", slcd_frame_desc.dcmd); - if (slcd_frame_desc.dcmd & DMAC_DCMD_LINK) - printk("The Smart LCD can refresh automatically. Option is omitted!\n"); - else { - while (REG_SLCD_STATE & SLCD_STATE_BUSY); - __dmac_channel_set_doorbell(dma_chan); - } - break; - case FBIO_SET_REG: - if (copy_from_user(®_buf, argp, sizeof(reg_buf))) - return -EFAULT; - is_set_reg = 1; - REG_DMAC_DCMD(dma_chan) |= DMAC_DCMD_TIE; - REG_DMAC_DCMD(dma_chan) &= ~DMAC_DCMD_LINK; - break; - default: - break; - } - - return ret; -} - -/* Use mmap /dev/fb can only get a non-cacheable Virtual Address. */ -static int jzfb_mmap(struct fb_info *info, struct vm_area_struct *vma) -{ - struct lcd_cfb_info *cfb = (struct lcd_cfb_info *)info; - unsigned long start; - unsigned long off; - u32 len; - - off = vma->vm_pgoff << PAGE_SHIFT; - //fb->fb_get_fix(&fix, PROC_CONSOLE(info), info); - - /* frame buffer memory */ - start = cfb->fb.fix.smem_start; - len = PAGE_ALIGN((start & ~PAGE_MASK) + cfb->fb.fix.smem_len); - start &= PAGE_MASK; - - if ((vma->vm_end - vma->vm_start + off) > len) - return -EINVAL; - off += start; - - vma->vm_pgoff = off >> PAGE_SHIFT; - vma->vm_flags |= VM_IO; - vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); /* Uncacheable */ - -#if 1 - pgprot_val(vma->vm_page_prot) &= ~_CACHE_MASK; -// pgprot_val(vma->vm_page_prot) |= _CACHE_UNCACHED; /* Uncacheable */ - pgprot_val(vma->vm_page_prot) |= _CACHE_CACHABLE_NONCOHERENT; /* Write-Through */ -#endif - - if (io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT, - vma->vm_end - vma->vm_start, - vma->vm_page_prot)) { - return -EAGAIN; - } - return 0; -} - -/* checks var and eventually tweaks it to something supported, - * DO NOT MODIFY PAR */ -static int jzfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) -{ - print_dbg("jzfb_check_var"); - return 0; -} - - -/* - * set the video mode according to info->var - */ -static int jzfb_set_par(struct fb_info *info) -{ -// print_dbg("jzfb_set_par"); - printk("jzfb_set_par"); - return 0; -} - - -/* - * (Un)Blank the display. - * Fix me: should we use VESA value? - */ -static int jzfb_blank(int blank_mode, struct fb_info *info) -{ - - dprintk("fb_blank %d %p", blank_mode, info); - - switch (blank_mode) { - - case FB_BLANK_UNBLANK: - /* Turn on panel */ - break; - - case FB_BLANK_NORMAL: - case FB_BLANK_VSYNC_SUSPEND: - case FB_BLANK_HSYNC_SUSPEND: - case FB_BLANK_POWERDOWN: - /* Turn off panel */ - break; - default: - break; - - } - return 0; -} - -/* - * pan display - */ -static int jzfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) -{ - struct lcd_cfb_info *cfb = (struct lcd_cfb_info *)info; - int dy; - - if (!var || !cfb) { - return -EINVAL; - } - - if (var->xoffset - cfb->fb.var.xoffset) { - /* No support for X panning for now! */ - return -EINVAL; - } - - dy = var->yoffset - cfb->fb.var.yoffset; - print_dbg("var.yoffset: %d", dy); - if (dy) { - - print_dbg("Panning screen of %d lines", dy); -// slcd_frame_desc->databuf += (cfb->fb.fix.line_length * dy); -// slcd_frame_desc->dsadr += (cfb->fb.fix.line_length * dy); - /* TODO: Wait for current frame to finished */ - } - - return 0; -} - - -/* use default function cfb_fillrect, cfb_copyarea, cfb_imageblit */ -static struct fb_ops jzfb_ops = { - .owner = THIS_MODULE, - .fb_setcolreg = jzfb_setcolreg, - .fb_check_var = jzfb_check_var, - .fb_set_par = jzfb_set_par, - .fb_blank = jzfb_blank, - .fb_pan_display = jzfb_pan_display, - .fb_fillrect = cfb_fillrect, - .fb_copyarea = cfb_copyarea, - .fb_imageblit = cfb_imageblit, - .fb_mmap = jzfb_mmap, - .fb_ioctl = jzfb_ioctl, -}; - -static int jzfb_set_var(struct fb_var_screeninfo *var, int con, - struct fb_info *info) -{ - struct lcd_cfb_info *cfb = (struct lcd_cfb_info *)info; - //struct display *display; - int chgvar = 0; - - var->height = jzfb.h ; - var->width = jzfb.w ; - var->bits_per_pixel = jzfb.bpp; - - var->vmode = FB_VMODE_NONINTERLACED; - var->activate = cfb->fb.var.activate; - var->xres = var->width; - var->yres = var->height; - var->xres_virtual = var->width; - var->yres_virtual = var->height; - var->xoffset = 0; - var->yoffset = 0; - var->pixclock = 0; - var->left_margin = 0; - var->right_margin = 0; - var->upper_margin = 0; - var->lower_margin = 0; - var->hsync_len = 0; - var->vsync_len = 0; - var->sync = 0; - var->activate &= ~FB_ACTIVATE_TEST; - - /* - * CONUPDATE and SMOOTH_XPAN are equal. However, - * SMOOTH_XPAN is only used internally by fbcon. - */ - if (var->vmode & FB_VMODE_CONUPDATE) { - var->vmode |= FB_VMODE_YWRAP; - var->xoffset = cfb->fb.var.xoffset; - var->yoffset = cfb->fb.var.yoffset; - } - - if (var->activate & FB_ACTIVATE_TEST) - return 0; - - if ((var->activate & FB_ACTIVATE_MASK) != FB_ACTIVATE_NOW) - return -EINVAL; - - if (cfb->fb.var.xres != var->xres) - chgvar = 1; - if (cfb->fb.var.yres != var->yres) - chgvar = 1; - if (cfb->fb.var.xres_virtual != var->xres_virtual) - chgvar = 1; - if (cfb->fb.var.yres_virtual != var->yres_virtual) - chgvar = 1; - if (cfb->fb.var.bits_per_pixel != var->bits_per_pixel) - chgvar = 1; - - //display = fb_display + con; - - var->red.msb_right = 0; - var->green.msb_right = 0; - var->blue.msb_right = 0; - - switch(var->bits_per_pixel){ - case 1: /* Mono */ - cfb->fb.fix.visual = FB_VISUAL_MONO01; - cfb->fb.fix.line_length = (var->xres * var->bits_per_pixel) / 8; - break; - case 2: /* Mono */ - var->red.offset = 0; - var->red.length = 2; - var->green.offset = 0; - var->green.length = 2; - var->blue.offset = 0; - var->blue.length = 2; - - cfb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR; - cfb->fb.fix.line_length = (var->xres * var->bits_per_pixel) / 8; - break; - case 4: /* PSEUDOCOLOUR*/ - var->red.offset = 0; - var->red.length = 4; - var->green.offset = 0; - var->green.length = 4; - var->blue.offset = 0; - var->blue.length = 4; - - cfb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR; - cfb->fb.fix.line_length = var->xres / 2; - break; - case 8: /* PSEUDOCOLOUR, 256 */ - var->red.offset = 0; - var->red.length = 8; - var->green.offset = 0; - var->green.length = 8; - var->blue.offset = 0; - var->blue.length = 8; - - cfb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR; - cfb->fb.fix.line_length = var->xres ; - break; - case 15: /* DIRECTCOLOUR, 32k */ - var->bits_per_pixel = 15; - var->red.offset = 10; - var->red.length = 5; - var->green.offset = 5; - var->green.length = 5; - var->blue.offset = 0; - var->blue.length = 5; - - cfb->fb.fix.visual = FB_VISUAL_DIRECTCOLOR; - cfb->fb.fix.line_length = var->xres_virtual * 2; - break; - case 16: /* DIRECTCOLOUR, 64k */ - var->bits_per_pixel = 16; - var->red.offset = 11; - var->red.length = 5; - var->green.offset = 5; - var->green.length = 6; - var->blue.offset = 0; - var->blue.length = 5; - - cfb->fb.fix.visual = FB_VISUAL_TRUECOLOR; - cfb->fb.fix.line_length = var->xres_virtual * 2; - break; - case 18: - case 24: - case 32: - /* DIRECTCOLOUR, 256 */ - var->bits_per_pixel = 32; - - var->red.offset = 16; - var->red.length = 8; - var->green.offset = 8; - var->green.length = 8; - var->blue.offset = 0; - var->blue.length = 8; - var->transp.offset = 24; - var->transp.length = 8; - - cfb->fb.fix.visual = FB_VISUAL_TRUECOLOR; - cfb->fb.fix.line_length = var->xres_virtual * 4; - break; - - default: /* in theory this should never happen */ - printk(KERN_WARNING "%s: don't support for %dbpp\n", - cfb->fb.fix.id, var->bits_per_pixel); - break; - } - - cfb->fb.var = *var; - cfb->fb.var.activate &= ~FB_ACTIVATE_ALL; - - /* - * If we are setting all the virtual consoles, also set the - * defaults used to create new consoles. - */ - fb_set_cmap(&cfb->fb.cmap, &cfb->fb); - dprintk("jzfb_set_var: after fb_set_cmap...\n"); - - return 0; -} - -static struct lcd_cfb_info * jzfb_alloc_fb_info(void) -{ - struct lcd_cfb_info *cfb; - - cfb = kmalloc(sizeof(struct lcd_cfb_info) + sizeof(u32) * 16, GFP_KERNEL); - - if (!cfb) - return NULL; - - jzslcd_info = cfb; - - memset(cfb, 0, sizeof(struct lcd_cfb_info) ); - - cfb->currcon = -1; - - - strcpy(cfb->fb.fix.id, "jz-slcd"); - cfb->fb.fix.type = FB_TYPE_PACKED_PIXELS; - cfb->fb.fix.type_aux = 0; - cfb->fb.fix.xpanstep = 1; - cfb->fb.fix.ypanstep = 1; - cfb->fb.fix.ywrapstep = 0; - cfb->fb.fix.accel = FB_ACCEL_NONE; - - cfb->fb.var.nonstd = 0; - cfb->fb.var.activate = FB_ACTIVATE_NOW; - cfb->fb.var.height = -1; - cfb->fb.var.width = -1; - cfb->fb.var.accel_flags = FB_ACCELF_TEXT; - - cfb->fb.fbops = &jzfb_ops; - cfb->fb.flags = FBINFO_FLAG_DEFAULT; - - cfb->fb.pseudo_palette = (void *)(cfb + 1); - - switch (jzfb.bpp) { - case 1: - fb_alloc_cmap(&cfb->fb.cmap, 4, 0); - break; - case 2: - fb_alloc_cmap(&cfb->fb.cmap, 8, 0); - break; - case 4: - fb_alloc_cmap(&cfb->fb.cmap, 32, 0); - break; - case 8: - - default: - fb_alloc_cmap(&cfb->fb.cmap, 256, 0); - break; - } - dprintk("fb_alloc_cmap,fb.cmap.len:%d....\n", cfb->fb.cmap.len); - - return cfb; -} - -/* - * Map screen memory - */ -static int jzfb_map_smem(struct lcd_cfb_info *cfb) -{ - struct page * map = NULL; - unsigned char *tmp; - unsigned int page_shift, needroom, t; - - t = jzfb.bpp; - if (jzfb.bpp == 15) - t = 16; - if (jzfb.bpp == 18 || jzfb.bpp == 24) - t = 32; - needroom = ((jzfb.w * t + 7) >> 3) * jzfb.h; - - for (page_shift = 0; page_shift < 12; page_shift++) - if ((PAGE_SIZE << page_shift) >= needroom) - break; - - slcd_palette = (unsigned char *)__get_free_pages(GFP_KERNEL, 0); - slcd_frame = (unsigned char *)__get_free_pages(GFP_KERNEL, page_shift); - if ((!slcd_palette) || (!slcd_frame)) - return -ENOMEM; - - memset((void *)slcd_palette, 0, PAGE_SIZE); - memset((void *)slcd_frame, 0, PAGE_SIZE << page_shift); - - map = virt_to_page(slcd_palette); - set_bit(PG_reserved, &map->flags); - - for (tmp=(unsigned char *)slcd_frame; - tmp < slcd_frame + (PAGE_SIZE << page_shift); - tmp += PAGE_SIZE) { - map = virt_to_page(tmp); - set_bit(PG_reserved, &map->flags); - } - - cfb->fb.fix.smem_start = virt_to_phys((void *)slcd_frame); - - cfb->fb.fix.smem_len = (PAGE_SIZE << page_shift); - - cfb->fb.screen_base = - (unsigned char *)(((unsigned int)slcd_frame & 0x1fffffff) | 0xa0000000); - - if (!cfb->fb.screen_base) { - printk("%s: unable to map screen memory\n", cfb->fb.fix.id); - return -ENOMEM; - } - - return 0; -} - -static void jzfb_free_fb_info(struct lcd_cfb_info *cfb) -{ - if (cfb) { - fb_alloc_cmap(&cfb->fb.cmap, 0, 0); - kfree(cfb); - } -} - -static void jzfb_unmap_smem(struct lcd_cfb_info *cfb) -{ - struct page * map = NULL; - unsigned char *tmp; - unsigned int page_shift, needroom, t; - - t = jzfb.bpp; - if (jzfb.bpp == 18 || jzfb.bpp == 24) - t = 32; - if (jzfb.bpp == 15) - t = 16; - needroom = ((jzfb.w * t + 7) >> 3) * jzfb.h; - for (page_shift = 0; page_shift < 12; page_shift++) - if ((PAGE_SIZE << page_shift) >= needroom) - break; - - if (cfb && cfb->fb.screen_base) { - iounmap(cfb->fb.screen_base); - cfb->fb.screen_base = NULL; - release_mem_region(cfb->fb.fix.smem_start, - cfb->fb.fix.smem_len); - } - - if (slcd_palette) { - map = virt_to_page(slcd_palette); - clear_bit(PG_reserved, &map->flags); - free_pages((int)slcd_palette, 0); - } - - if (slcd_frame) { - - for (tmp=(unsigned char *)slcd_frame; - tmp < slcd_frame + (PAGE_SIZE << page_shift); - tmp += PAGE_SIZE) { - map = virt_to_page(tmp); - clear_bit(PG_reserved, &map->flags); - } - - free_pages((int)slcd_frame, page_shift); - } -} - -static void slcd_descriptor_init(void) -{ - int i; - int frm_size, pal_size; - unsigned int next; - unsigned int slcd_frame_src_phys_addr, slcd_palette_src_phys_addr, slcd_dma_dst_phys_addr; - - i = jzfb.bpp; - if (i == 18 || i == 24) - i = 32; - if (i == 15) - i = 16; - - switch (jzfb.bpp) { - case 1: - pal_size = 4; - break; - case 2: - pal_size = 8; - break; - case 4: - pal_size = 32; - break; - case 8: - default: - pal_size = 512; - } - - frm_size = jzfb.w * jzfb.h * jzfb.bpp / 8; - - /*Offset of next descriptor*/ - slcd_frame_desc_phys_addr = (dma_addr_t)CPHYSADDR((unsigned long)(&slcd_frame_desc)); - slcd_palette_desc_phys_addr = (dma_addr_t)CPHYSADDR((unsigned long)(&slcd_palette_desc)); - - /*Soure address and Target address*/ - slcd_palette_src_phys_addr = (unsigned int)virt_to_phys(slcd_palette); - slcd_frame_src_phys_addr = (unsigned int)virt_to_phys(slcd_frame); - slcd_dma_dst_phys_addr = (unsigned int)CPHYSADDR(SLCD_FIFO); - next = slcd_frame_desc_phys_addr >> 4; - - /* Prepare Palette Descriptor */ - slcd_palette_desc.dcmd = DMAC_DCMD_SAI | DMAC_DCMD_RDIL_IGN | DMAC_DCMD_SWDH_32 - | DMAC_DCMD_DWDH_16 | DMAC_DCMD_DS_16BYTE | DMAC_DCMD_TM | DMAC_DCMD_DES_V - | DMAC_DCMD_DES_VIE | DMAC_DCMD_LINK; - switch (slcd_palette_desc.dcmd & DMAC_DCMD_DS_MASK) { - case DMAC_DCMD_DS_32BYTE: - pal_size /= 32; - break; - case DMAC_DCMD_DS_16BYTE: - pal_size /= 16; - break; - case DMAC_DCMD_DS_32BIT: - pal_size /= 4; - break; - case DMAC_DCMD_DS_16BIT: - pal_size /= 2; - break; - case DMAC_DCMD_DS_8BIT: - default: - break; - } - - slcd_palette_desc.dsadr = (unsigned int)virt_to_phys(slcd_palette); /* DMA source address */ - slcd_palette_desc.dtadr = (unsigned int)CPHYSADDR(SLCD_FIFO); /* DMA target address */ - slcd_palette_desc.ddadr = (volatile unsigned int)((next << 24) | (pal_size & 0xffffff)); /* offset and size*/ - dma_cache_wback((unsigned long)(&slcd_palette_desc), 16); - - /*Prepare Frame Descriptor in memory*/ - switch (jzfb.bpp) { - case 8 ... 16: - slcd_frame_desc.dcmd = DMAC_DCMD_SAI | DMAC_DCMD_RDIL_IGN | DMAC_DCMD_SWDH_32 - | DMAC_DCMD_DWDH_16 | DMAC_DCMD_DS_16BYTE | DMAC_DCMD_TM | DMAC_DCMD_DES_V - | DMAC_DCMD_DES_VIE | DMAC_DCMD_LINK; - break; - - case 17 ... 32: - slcd_frame_desc.dcmd = DMAC_DCMD_SAI | DMAC_DCMD_RDIL_IGN | DMAC_DCMD_SWDH_32 - | DMAC_DCMD_DWDH_32 | DMAC_DCMD_DS_32BYTE | DMAC_DCMD_TM | DMAC_DCMD_DES_V - | DMAC_DCMD_DES_VIE | DMAC_DCMD_LINK; - break; - } - switch (slcd_frame_desc.dcmd & DMAC_DCMD_DS_MASK) { - case DMAC_DCMD_DS_32BYTE: - frm_size /= 32; - break; - case DMAC_DCMD_DS_16BYTE: - frm_size /= 16; - break; - case DMAC_DCMD_DS_32BIT: - frm_size /= 4; - break; - case DMAC_DCMD_DS_16BIT: - frm_size /= 2; - break; - case DMAC_DCMD_DS_8BIT: - default: - break; - } - - slcd_frame_desc.dsadr = slcd_frame_src_phys_addr; /* DMA source address */ - slcd_frame_desc.dtadr = slcd_dma_dst_phys_addr; /* DMA target address */ - slcd_frame_desc.ddadr = (volatile unsigned int)((next << 24) | (frm_size & 0xffffff)); /* offset and size*/ - dma_cache_wback((unsigned long)(&slcd_frame_desc), 16); -} - -void slcd_hw_init(void) -{ - unsigned int val, pclk; - int pll_div; - - REG_LCD_CFG &= ~LCD_CFG_LCDPIN_MASK; - REG_LCD_CFG |= LCD_CFG_LCDPIN_SLCD; - - if ((jzfb.bpp == 18) | (jzfb.bpp == 24)) - jzfb.bpp = 32; - - /* Configure SLCD module for initialize smart lcd registers*/ - switch (jzfb.bus) { - case 8: - REG_SLCD_CFG = SLCD_CFG_BURST_8_WORD | SLCD_CFG_DWIDTH_8_x2 - | SLCD_CFG_CWIDTH_8BIT | SLCD_CFG_CS_ACTIVE_LOW - | SLCD_CFG_RS_CMD_LOW | SLCD_CFG_CLK_ACTIVE_FALLING - | SLCD_CFG_TYPE_PARALLEL; - __gpio_as_slcd_8bit(); - break; - case 9: - REG_SLCD_CFG = SLCD_CFG_BURST_8_WORD | SLCD_CFG_DWIDTH_8_x2 - | SLCD_CFG_CWIDTH_8BIT | SLCD_CFG_CS_ACTIVE_LOW - | SLCD_CFG_RS_CMD_LOW | SLCD_CFG_CLK_ACTIVE_FALLING - | SLCD_CFG_TYPE_PARALLEL; - __gpio_as_slcd_9bit(); - break; - case 16: - REG_SLCD_CFG = SLCD_CFG_BURST_8_WORD | SLCD_CFG_DWIDTH_16 - | SLCD_CFG_CWIDTH_16BIT | SLCD_CFG_CS_ACTIVE_LOW - | SLCD_CFG_RS_CMD_LOW | SLCD_CFG_CLK_ACTIVE_FALLING - | SLCD_CFG_TYPE_PARALLEL; - __gpio_as_slcd_16bit(); - break; - case 18: - REG_SLCD_CFG = SLCD_CFG_BURST_8_WORD | SLCD_CFG_DWIDTH_18 - | SLCD_CFG_CWIDTH_18BIT | SLCD_CFG_CS_ACTIVE_LOW - | SLCD_CFG_RS_CMD_LOW | SLCD_CFG_CLK_ACTIVE_FALLING - | SLCD_CFG_TYPE_PARALLEL; - __gpio_as_slcd_18bit(); - break; - default: - printk("Error: Don't support BUS %d!\n", jzfb.bus); - break; - } - - REG_SLCD_CTRL = SLCD_CTRL_DMA_EN; - __cpm_stop_lcd(); - pclk = jzfb.pclk; - pll_div = ( REG_CPM_CPCCR & CPM_CPCCR_PCS ); /* clock source,0:pllout/2 1: pllout */ - pll_div = pll_div ? 1 : 2 ; - val = ( __cpm_get_pllout()/pll_div ) / pclk; - val--; - if ( val > 0x1ff ) { - printk("CPM_LPCDR too large, set it to 0x1ff\n"); - val = 0x1ff; - } - __cpm_set_pixdiv(val); - - REG_CPM_CPCCR |= CPM_CPCCR_CE ; /* update divide */ - - jz_clocks.pixclk = __cpm_get_pixclk(); - jz_clocks.lcdclk = __cpm_get_lcdclk(); - printk("SLCDC: PixClock:%d LcdClock:%d\n", - jz_clocks.pixclk, jz_clocks.lcdclk); - - __cpm_start_lcd(); - udelay(1000); - __slcd_display_pin_init(); - __slcd_special_on(); - - /* Configure SLCD module for transfer data to smart lcd GRAM*/ - switch (jzfb.bus) { - case 8: - switch (jzfb.bpp) { - case 8: - REG_SLCD_CFG &= ~SLCD_CFG_DWIDTH_MASK; - REG_SLCD_CFG |= SLCD_CFG_DWIDTH_8_x1; - break; - case 15: - case 16: - REG_SLCD_CFG &= ~SLCD_CFG_DWIDTH_MASK; - REG_SLCD_CFG |= SLCD_CFG_DWIDTH_8_x2; - break; - case 17 ... 32: - REG_SLCD_CFG &= ~SLCD_CFG_DWIDTH_MASK; - REG_SLCD_CFG |= SLCD_CFG_DWIDTH_8_x3; - break; - default: - printk("The BPP %d is not supported\n", jzfb.bpp); - break; - } - break; - case 9: - switch (jzfb.bpp) { - case 8: - REG_SLCD_CFG &= ~SLCD_CFG_DWIDTH_MASK; - REG_SLCD_CFG |= SLCD_CFG_DWIDTH_8_x1; - break; - case 15 ... 16: - REG_SLCD_CFG &= ~SLCD_CFG_DWIDTH_MASK; - REG_SLCD_CFG |= SLCD_CFG_DWIDTH_8_x2; - break; - case 17 ... 32: - REG_SLCD_CFG &= ~SLCD_CFG_DWIDTH_MASK; - REG_SLCD_CFG |= SLCD_CFG_DWIDTH_9_x2; - break; - default: - printk("The BPP %d is not supported\n", jzfb.bpp); - break; - } - break; - case 16: - switch (jzfb.bpp) { - case 8: - REG_SLCD_CFG &= ~SLCD_CFG_DWIDTH_MASK; - REG_SLCD_CFG |= SLCD_CFG_DWIDTH_8_x1; - break; - case 15 ... 16: - REG_SLCD_CFG &= ~SLCD_CFG_DWIDTH_MASK; - REG_SLCD_CFG |= SLCD_CFG_DWIDTH_16; - break; - case 17 ... 32: - REG_SLCD_CFG &= ~SLCD_CFG_DWIDTH_MASK; - REG_SLCD_CFG |= SLCD_CFG_DWIDTH_8_x3; - break; - default: - printk("The BPP %d is not supported\n", jzfb.bpp); - break; - } - break; - case 18: - switch (jzfb.bpp) { - case 8: - REG_SLCD_CFG &= ~SLCD_CFG_DWIDTH_MASK; - REG_SLCD_CFG |= SLCD_CFG_DWIDTH_8_x1; - break; - case 15: - case 16: - REG_SLCD_CFG &= ~SLCD_CFG_DWIDTH_MASK; - REG_SLCD_CFG |= SLCD_CFG_DWIDTH_16; - break; - case 17 ... 32: - REG_SLCD_CFG &= ~SLCD_CFG_DWIDTH_MASK; - REG_SLCD_CFG |= SLCD_CFG_DWIDTH_18; - break; - default: - printk("The BPP %d is not supported\n", jzfb.bpp); - break; - } - break; - default: - printk("Error: The BUS %d is not supported\n", jzfb.bus); - break; - } - dprintk("SLCD_CFG=0x%x\n", REG_SLCD_CFG); -} - -static irqreturn_t slcd_dma_irq(int irq, void *dev_id) -{ - - if (__dmac_channel_transmit_halt_detected(dma_chan)) { - dprintk("DMA HALT\n"); - __dmac_channel_clear_transmit_halt(dma_chan); - } - - if (__dmac_channel_address_error_detected(dma_chan)) { - dprintk("DMA ADDR ERROR\n"); - __dmac_channel_clear_address_error(dma_chan); - } - - if (__dmac_channel_descriptor_invalid_detected(dma_chan)) { - dprintk("DMA DESC INVALID\n"); - __dmac_channel_clear_descriptor_invalid(dma_chan); - } - - if (__dmac_channel_count_terminated_detected(dma_chan)) { - dprintk("DMA CT\n"); - __dmac_channel_clear_count_terminated(dma_chan); - if(is_set_reg){ - printk("Close DMAC_DCMD_LINK \n"); - REG_DMAC_DCMD(dma_chan) &= ~DMAC_DCMD_LINK; - } - if (non_link_desp) { - printk("Close DMAC_DCMD_LINK \n"); - /*Set to Non-Link Descriptor*/ - REG_DMAC_DCMD(dma_chan) &= ~DMAC_DCMD_LINK; - } - } - - if (__dmac_channel_transmit_end_detected(dma_chan)) { - printk("DMA TT\n"); - __dmac_channel_clear_transmit_end(dma_chan); - if (non_link_desp) { - slcd_frame_desc.dcmd |= DMAC_DCMD_TIE; - slcd_frame_desc.dcmd &= ~DMAC_DCMD_LINK; - dma_cache_wback((unsigned long)(&slcd_frame_desc), 16); - non_link_desp = 0; - } - if (is_set_reg) { - is_set_reg = 0; - while (REG_SLCD_STATE & SLCD_STATE_BUSY); - REG_DMAC_DMACR &= ~DMAC_DMACR_DMAE; /* disable DMA */ - REG_DMAC_DCCSR(dma_chan) &= ~DMAC_DCCSR_EN; /* disable DMA */ - REG_SLCD_CTRL = 0; - - /* - *add operation here - */ - Mcupanel_RegSet(reg_buf.cmd, reg_buf.data); - Mcupanel_Command(0x0022);/*Write Data to GRAM */ - mdelay(100); - REG_SLCD_CTRL = SLCD_CTRL_DMA_EN; - REG_DMAC_DMACR = DMAC_DMACR_DMAE; - REG_DMAC_DCCSR(dma_chan) = DMAC_DCCSR_EN; - __dmac_channel_set_doorbell(dma_chan); - } - } - return IRQ_HANDLED; -} - -static int slcd_dma_init(void) -{ - /* Request DMA channel and setup irq handler */ - dma_chan = jz_request_dma(DMA_ID_AUTO, "auto", slcd_dma_irq, 0, NULL); - if (dma_chan < 0) { - printk("Request DMA Failed\n"); - return -1; - } - printk("DMA channel %d is requested by SLCD!\n", dma_chan); - - /*Init the SLCD DMA and Enable*/ - REG_DMAC_DRSR(dma_chan) = DMAC_DRSR_RS_SLCD; - REG_DMAC_DMACR = DMAC_DMACR_DMAE; - REG_DMAC_DCCSR(dma_chan) = DMAC_DCCSR_EN; /*Descriptor Transfer*/ - - if (jzfb.bpp <= 8) - REG_DMAC_DDA(dma_chan) = slcd_palette_desc_phys_addr; - else - REG_DMAC_DDA(dma_chan) = slcd_frame_desc_phys_addr; - - /* DMA doorbell set -- start DMA now ... */ - __dmac_channel_set_doorbell(dma_chan); - return 0; -} - -#ifdef CONFIG_PM - -/* - * Suspend the LCDC. - */ -static int jzfb_suspend(void) -{ - - __slcd_close_backlight(); - __dmac_disable_channel(dma_chan); - __slcd_dma_disable(); /* Quick Disable */ - __slcd_special_off(); - __cpm_stop_lcd(); - return 0; -} - -/* - * Resume the LCDC. - */ - -static int jzfb_resume(void) -{ - __cpm_start_lcd(); - REG_SLCD_CFG &= ~SLCD_CFG_DWIDTH_MASK; - switch (jzfb.bpp) { - case 8: - /* DATA 8-bit once*/ - REG_SLCD_CFG |= SLCD_CFG_DWIDTH_8_x1; - break; - case 15: - case 16: - case 18: - case 24: - case 32: - /* DATA 8-bit twice*/ - REG_SLCD_CFG |= SLCD_CFG_DWIDTH_8_x2; - break; - default: - REG_SLCD_CFG = SLCD_CFG_DWIDTH_8_x2; - break; - } - __slcd_display_pin_init(); - __slcd_special_on(); - - if (jzfb.bpp == 32) { - /* DATA 8-bit three time*/ - REG_SLCD_CFG &= ~SLCD_CFG_DWIDTH_MASK; - REG_SLCD_CFG |= SLCD_CFG_DWIDTH_8_x3; - } - __slcd_dma_enable(); - udelay(100); - __dmac_enable_channel(dma_chan); - __dmac_channel_set_doorbell(dma_chan); - mdelay(200); - __slcd_set_backlight_level(80); - return 0; -} - -/* - * Power management hook. Note that we won't be called from IRQ context, - * unlike the blank functions above, so we may sleep. - */ -static int jzslcd_pm_callback(struct pm_dev *pm_dev, pm_request_t req, void *data) -{ - int ret; - struct lcd_cfb_info *cfb = pm_dev->data; - - if (!cfb) return -EINVAL; - - switch (req) { - case PM_SUSPEND: - ret = jzfb_suspend(); - break; - - case PM_RESUME: - ret = jzfb_resume(); - break; - - default: - ret = -EINVAL; - break; - } - return ret; -} -#else -#define jzfb_suspend NULL -#define jzfb_resume NULL -#endif /* CONFIG_PM */ -static int __init jzslcd_fb_init(void) -{ - - struct lcd_cfb_info *cfb; - int err = 0; - - /*the parameters of slcd*/ - cfb = jzfb_alloc_fb_info(); - if (!cfb) - goto failed; - - err = jzfb_map_smem(cfb); - if (err) - goto failed; - jzfb_set_var(&cfb->fb.var, -1, &cfb->fb); - - slcd_hw_init(); - - err = register_framebuffer(&cfb->fb); - if (err < 0) { - printk("jzslcd_fb_init(): slcd register framebuffer err.\n"); - goto failed; - } - - printk("fb%d: %s frame buffer device, using %dK of video memory\n", - cfb->fb.node, cfb->fb.fix.id, cfb->fb.fix.smem_len>>10); - - slcd_descriptor_init(); - err = slcd_dma_init(); - if (err != 0) { - printk("SLCD Init DMA Fail!\n"); - return err; - } - mdelay(100); - __slcd_set_backlight_level(80); - -#ifdef CONFIG_PM - /* - * Note that the console registers this as well, but we want to - * power down the display prior to sleeping. - */ -//struct pm_dev __deprecated *pm_register(pm_dev_t type, unsigned long id, pm_callback callback); - - cfb->pm = pm_register(PM_SYS_DEV, PM_SYS_VGA, jzslcd_pm_callback); - if (cfb->pm) - cfb->pm->data = cfb; - -#endif - return 0; - -failed: - jzfb_unmap_smem(cfb); - jzfb_free_fb_info(cfb); - - return err; -} - -#if 0 -static int jzfb_remove(struct device *dev) -{ - struct lcd_cfb_info *cfb = dev_get_drvdata(dev); - jzfb_unmap_smem(cfb); - jzfb_free_fb_info(cfb); - return 0; -} -#endif - -#if 0 -static struct device_driver jzfb_driver = { - .name = "jz-slcd", - .bus = &platform_bus_type, - .probe = jzfb_probe, - .remove = jzfb_remove, - .suspend = jzfb_suspend, - .resume = jzfb_resume, -}; -#endif - -static void __exit jzslcd_fb_cleanup(void) -{ - //driver_unregister(&jzfb_driver); - //jzfb_remove(); -} - -module_init(jzslcd_fb_init); -module_exit(jzslcd_fb_cleanup); - -MODULE_DESCRIPTION("JzSOC SLCD Controller driver"); -MODULE_LICENSE("GPL"); diff --git a/target/linux/xburst/files-2.6.31/drivers/video/jz4740_slcd.h b/target/linux/xburst/files-2.6.31/drivers/video/jz4740_slcd.h deleted file mode 100644 index 84754f654..000000000 --- a/target/linux/xburst/files-2.6.31/drivers/video/jz4740_slcd.h +++ /dev/null @@ -1,376 +0,0 @@ -/* - * linux/drivers/video/jzslcd.h -- Ingenic On-Chip SLCD frame buffer device - * - * Copyright (C) 2005-2007, Ingenic Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#ifndef __JZSLCD_H__ -#define __JZSLCD_H__ - -#define UINT16 unsigned short -#define UINT32 unsigned int - -#define NR_PALETTE 256 -/* Jz LCDFB supported I/O controls. */ -#define FBIOSETBACKLIGHT 0x4688 -#define FBIODISPON 0x4689 -#define FBIODISPOFF 0x468a -#define FBIORESET 0x468b -#define FBIOPRINT_REG 0x468c -#define FBIO_REFRESH_ALWAYS 0x468d -#define FBIO_REFRESH_EVENTS 0x468e -#define FBIO_DO_REFRESH 0x468f -#define FBIO_SET_REG 0x4690 - -#ifdef CONFIG_JZ_SLCD_LGDP4551 -#define PIN_CS_N (32*2+18) /* Chip select :SLCD_WR: GPC18 */ -#define PIN_RESET_N (32*2+21) /* LCD reset :SLCD_RST: GPC21*/ -#define PIN_RS_N (32*2+19) - -#define __slcd_special_pin_init() \ -do { \ - __gpio_as_output(PIN_CS_N); \ - __gpio_as_output(PIN_RESET_N); \ - __gpio_clear_pin(PIN_CS_N); /* Clear CS */\ - mdelay(100); \ -} while(0) - -#define __slcd_special_on() \ -do { /* RESET# */ \ - __gpio_set_pin(PIN_RESET_N); \ - mdelay(10); \ - __gpio_clear_pin(PIN_RESET_N); \ - mdelay(10); \ - __gpio_set_pin(PIN_RESET_N); \ - mdelay(100); \ - Mcupanel_RegSet(0x0015,0x0050); \ - Mcupanel_RegSet(0x0011,0x0000); \ - Mcupanel_RegSet(0x0010,0x3628); \ - Mcupanel_RegSet(0x0012,0x0002); \ - Mcupanel_RegSet(0x0013,0x0E47); \ - udelay(100); \ - Mcupanel_RegSet(0x0012,0x0012); \ - udelay(100); \ - Mcupanel_RegSet(0x0010,0x3620); \ - Mcupanel_RegSet(0x0013,0x2E47); \ - udelay(50); \ - Mcupanel_RegSet(0x0030,0x0000); \ - Mcupanel_RegSet(0x0031,0x0502); \ - Mcupanel_RegSet(0x0032,0x0307); \ - Mcupanel_RegSet(0x0033,0x0304); \ - Mcupanel_RegSet(0x0034,0x0004); \ - Mcupanel_RegSet(0x0035,0x0401); \ - Mcupanel_RegSet(0x0036,0x0707); \ - Mcupanel_RegSet(0x0037,0x0303); \ - Mcupanel_RegSet(0x0038,0x1E02); \ - Mcupanel_RegSet(0x0039,0x1E02); \ - Mcupanel_RegSet(0x0001,0x0000); \ - Mcupanel_RegSet(0x0002,0x0300); \ - if (jzfb.bpp == 16) \ - Mcupanel_RegSet(0x0003,0x10B8); /*8-bit system interface two transfers - up:0x10B8 down:0x1088 left:0x1090 right:0x10a0*/ \ - else \ - if (jzfb.bpp == 32)\ - Mcupanel_RegSet(0x0003,0xD0B8);/*8-bit system interface three transfers,666 - up:0xD0B8 down:0xD088 left:0xD090 right:0xD0A0*/ \ - Mcupanel_RegSet(0x0008,0x0204);\ - Mcupanel_RegSet(0x000A,0x0008);\ - Mcupanel_RegSet(0x0060,0x3100);\ - Mcupanel_RegSet(0x0061,0x0001);\ - Mcupanel_RegSet(0x0090,0x0052);\ - Mcupanel_RegSet(0x0092,0x000F);\ - Mcupanel_RegSet(0x0093,0x0001);\ - Mcupanel_RegSet(0x009A,0x0008);\ - Mcupanel_RegSet(0x00A3,0x0010);\ - Mcupanel_RegSet(0x0050,0x0000);\ - Mcupanel_RegSet(0x0051,0x00EF);\ - Mcupanel_RegSet(0x0052,0x0000);\ - Mcupanel_RegSet(0x0053,0x018F);\ - /*===Display_On_Function=== */ \ - Mcupanel_RegSet(0x0007,0x0001);\ - Mcupanel_RegSet(0x0007,0x0021);\ - Mcupanel_RegSet(0x0007,0x0023);\ - Mcupanel_RegSet(0x0007,0x0033);\ - Mcupanel_RegSet(0x0007,0x0133);\ - Mcupanel_Command(0x0022);/*Write Data to GRAM */ \ - udelay(1); \ - Mcupanel_SetAddr(0,0); \ - mdelay(100); \ -} while (0) - -#define __slcd_special_off() \ -do { \ -} while(0) -#endif /*CONFIG_JZ_SLCD_LGDP4551_xxBUS*/ - -#ifdef CONFIG_JZ_SLCD_SPFD5420A - - //#define PIN_CS_N (32*2+18) // Chip select //GPC18; -#define PIN_CS_N (32*2+22) // Chip select //GPC18; -#define PIN_RESET_N (32*1+18) // LCD reset //GPB18; -#define PIN_RS_N (32*2+19) // LCD RS //GPC19; -#define PIN_POWER_N (32*3+0) //Power off //GPD0; -#define PIN_FMARK_N (32*3+1) //fmark //GPD1; - -#define GAMMA() \ -do { \ - Mcupanel_RegSet(0x0300,0x0101); \ - Mcupanel_RegSet(0x0301,0x0b27); \ - Mcupanel_RegSet(0x0302,0x132a); \ - Mcupanel_RegSet(0x0303,0x2a13); \ - Mcupanel_RegSet(0x0304,0x270b); \ - Mcupanel_RegSet(0x0305,0x0101); \ - Mcupanel_RegSet(0x0306,0x1205); \ - Mcupanel_RegSet(0x0307,0x0512); \ - Mcupanel_RegSet(0x0308,0x0005); \ - Mcupanel_RegSet(0x0309,0x0003); \ - Mcupanel_RegSet(0x030a,0x0f04); \ - Mcupanel_RegSet(0x030b,0x0f00); \ - Mcupanel_RegSet(0x030c,0x000f); \ - Mcupanel_RegSet(0x030d,0x040f); \ - Mcupanel_RegSet(0x030e,0x0300); \ - Mcupanel_RegSet(0x030f,0x0500); \ - /*** secorrect gamma2 ***/ \ - Mcupanel_RegSet(0x0400,0x3500); \ - Mcupanel_RegSet(0x0401,0x0001); \ - Mcupanel_RegSet(0x0404,0x0000); \ - Mcupanel_RegSet(0x0500,0x0000); \ - Mcupanel_RegSet(0x0501,0x0000); \ - Mcupanel_RegSet(0x0502,0x0000); \ - Mcupanel_RegSet(0x0503,0x0000); \ - Mcupanel_RegSet(0x0504,0x0000); \ - Mcupanel_RegSet(0x0505,0x0000); \ - Mcupanel_RegSet(0x0600,0x0000); \ - Mcupanel_RegSet(0x0606,0x0000); \ - Mcupanel_RegSet(0x06f0,0x0000); \ - Mcupanel_RegSet(0x07f0,0x5420); \ - Mcupanel_RegSet(0x07f3,0x288a); \ - Mcupanel_RegSet(0x07f4,0x0022); \ - Mcupanel_RegSet(0x07f5,0x0001); \ - Mcupanel_RegSet(0x07f0,0x0000); \ -} while(0) - -#define __slcd_special_on() \ -do { \ - __gpio_set_pin(PIN_RESET_N); \ - mdelay(10); \ - __gpio_clear_pin(PIN_RESET_N); \ - mdelay(10); \ - __gpio_set_pin(PIN_RESET_N); \ - mdelay(100); \ - if (jzfb.bus == 18) {\ - Mcupanel_RegSet(0x0606,0x0000); \ - udelay(10); \ - Mcupanel_RegSet(0x0007,0x0001); \ - udelay(10); \ - Mcupanel_RegSet(0x0110,0x0001); \ - udelay(10); \ - Mcupanel_RegSet(0x0100,0x17b0); \ - Mcupanel_RegSet(0x0101,0x0147); \ - Mcupanel_RegSet(0x0102,0x019d); \ - Mcupanel_RegSet(0x0103,0x8600); \ - Mcupanel_RegSet(0x0281,0x0010); \ - udelay(10); \ - Mcupanel_RegSet(0x0102,0x01bd); \ - udelay(10); \ - /************initial************/\ - Mcupanel_RegSet(0x0000,0x0000); \ - Mcupanel_RegSet(0x0001,0x0000); \ - Mcupanel_RegSet(0x0002,0x0400); \ - Mcupanel_RegSet(0x0003,0x1288); /*up:0x1288 down:0x12B8 left:0x1290 right:0x12A0*/ \ - Mcupanel_RegSet(0x0006,0x0000); \ - Mcupanel_RegSet(0x0008,0x0503); \ - Mcupanel_RegSet(0x0009,0x0001); \ - Mcupanel_RegSet(0x000b,0x0010); \ - Mcupanel_RegSet(0x000c,0x0000); \ - Mcupanel_RegSet(0x000f,0x0000); \ - Mcupanel_RegSet(0x0007,0x0001); \ - Mcupanel_RegSet(0x0010,0x0010); \ - Mcupanel_RegSet(0x0011,0x0202); \ - Mcupanel_RegSet(0x0012,0x0300); \ - Mcupanel_RegSet(0x0020,0x021e); \ - Mcupanel_RegSet(0x0021,0x0202); \ - Mcupanel_RegSet(0x0022,0x0100); \ - Mcupanel_RegSet(0x0090,0x0000); \ - Mcupanel_RegSet(0x0092,0x0000); \ - Mcupanel_RegSet(0x0100,0x16b0); \ - Mcupanel_RegSet(0x0101,0x0147); \ - Mcupanel_RegSet(0x0102,0x01bd); \ - Mcupanel_RegSet(0x0103,0x2c00); \ - Mcupanel_RegSet(0x0107,0x0000); \ - Mcupanel_RegSet(0x0110,0x0001); \ - Mcupanel_RegSet(0x0210,0x0000); \ - Mcupanel_RegSet(0x0211,0x00ef); \ - Mcupanel_RegSet(0x0212,0x0000); \ - Mcupanel_RegSet(0x0213,0x018f); \ - Mcupanel_RegSet(0x0280,0x0000); \ - Mcupanel_RegSet(0x0281,0x0001); \ - Mcupanel_RegSet(0x0282,0x0000); \ - GAMMA(); \ - Mcupanel_RegSet(0x0007,0x0173); \ - } else { \ - Mcupanel_RegSet(0x0600, 0x0001); /*soft reset*/ \ - mdelay(10); \ - Mcupanel_RegSet(0x0600, 0x0000); /*soft reset*/ \ - mdelay(10); \ - Mcupanel_RegSet(0x0606, 0x0000); /*i80-i/F Endian Control*/ \ - /*===User setting=== */ \ - Mcupanel_RegSet(0x0001, 0x0000);/* Driver Output Control-----0x0100 SM(bit10) | 0x400*/ \ - Mcupanel_RegSet(0x0002, 0x0100); /*LCD Driving Wave Control 0x0100 */ \ - if (jzfb.bpp == 16) \ - Mcupanel_RegSet(0x0003, 0x50A8);/*Entry Mode 0x1030*/ \ - else /*bpp = 18*/ \ - Mcupanel_RegSet(0x0003, 0x1010 | 0xC8); /*Entry Mode 0x1030*/ \ - /*#endif */ \ - Mcupanel_RegSet(0x0006, 0x0000); /*Outline Sharpening Control*/\ - Mcupanel_RegSet(0x0008, 0x0808); /*Sets the number of lines for front/back porch period*/\ - Mcupanel_RegSet(0x0009, 0x0001); /*Display Control 3 */\ - Mcupanel_RegSet(0x000B, 0x0010); /*Low Power Control*/\ - Mcupanel_RegSet(0x000C, 0x0000); /*External Display Interface Control 1 /*0x0001*/\ - Mcupanel_RegSet(0x000F, 0x0000); /*External Display Interface Control 2 */\ - Mcupanel_RegSet(0x0400, 0xB104);/*Base Image Number of Line---GS(bit15) | 0x8000*/ \ - Mcupanel_RegSet(0x0401, 0x0001); /*Base Image Display 0x0001*/\ - Mcupanel_RegSet(0x0404, 0x0000); /*Base Image Vertical Scroll Control 0x0000*/\ - Mcupanel_RegSet(0x0500, 0x0000); /*Partial Image 1: Display Position*/\ - Mcupanel_RegSet(0x0501, 0x0000); /*RAM Address (Start Line Address) */\ - Mcupanel_RegSet(0x0502, 0x018f); /*RAM Address (End Line Address) */ \ - Mcupanel_RegSet(0x0503, 0x0000); /*Partial Image 2: Display Position RAM Address*/\ - Mcupanel_RegSet(0x0504, 0x0000); /*RAM Address (Start Line Address) */\ - Mcupanel_RegSet(0x0505, 0x0000); /*RAM Address (End Line Address)*/\ - /*Panel interface control===*/\ - Mcupanel_RegSet(0x0010, 0x0011); /*Division Ratio,Clocks per Line 14 */\ - mdelay(10); \ - Mcupanel_RegSet(0x0011, 0x0202); /*Division Ratio,Clocks per Line*/\ - Mcupanel_RegSet(0x0012, 0x0300); /*Sets low power VCOM drive period. */\ - mdelay(10); \ - Mcupanel_RegSet(0x0020, 0x021e); /*Panel Interface Control 4 */\ - Mcupanel_RegSet(0x0021, 0x0202); /*Panel Interface Control 5 */\ - Mcupanel_RegSet(0x0022, 0x0100); /*Panel Interface Control 6*/\ - Mcupanel_RegSet(0x0090, 0x0000); /*Frame Marker Control */\ - Mcupanel_RegSet(0x0092, 0x0000); /*MDDI Sub-display Control */\ - /*===Gamma setting=== */\ - Mcupanel_RegSet(0x0300, 0x0101); /*γ Control*/\ - Mcupanel_RegSet(0x0301, 0x0000); /*γ Control*/\ - Mcupanel_RegSet(0x0302, 0x0016); /*γ Control*/\ - Mcupanel_RegSet(0x0303, 0x2913); /*γ Control*/\ - Mcupanel_RegSet(0x0304, 0x260B); /*γ Control*/\ - Mcupanel_RegSet(0x0305, 0x0101); /*γ Control*/\ - Mcupanel_RegSet(0x0306, 0x1204); /*γ Control*/\ - Mcupanel_RegSet(0x0307, 0x0415); /*γ Control*/\ - Mcupanel_RegSet(0x0308, 0x0205); /*γ Control*/\ - Mcupanel_RegSet(0x0309, 0x0303); /*γ Control*/\ - Mcupanel_RegSet(0x030a, 0x0E05); /*γ Control*/\ - Mcupanel_RegSet(0x030b, 0x0D01); /*γ Control*/\ - Mcupanel_RegSet(0x030c, 0x010D); /*γ Control*/\ - Mcupanel_RegSet(0x030d, 0x050E); /*γ Control*/\ - Mcupanel_RegSet(0x030e, 0x0303); /*γ Control*/\ - Mcupanel_RegSet(0x030f, 0x0502); /*γ Control*/\ - /*===Power on sequence===*/\ - Mcupanel_RegSet(0x0007, 0x0001); /*Display Control 1*/\ - Mcupanel_RegSet(0x0110, 0x0001); /*Power supply startup enable bit*/\ - Mcupanel_RegSet(0x0112, 0x0060); /*Power Control 7*/\ - Mcupanel_RegSet(0x0100, 0x16B0); /*Power Control 1 */\ - Mcupanel_RegSet(0x0101, 0x0115); /*Power Control 2*/\ - Mcupanel_RegSet(0x0102, 0x0119); /*Starts VLOUT3,Sets the VREG1OUT.*/\ - mdelay(50); \ - Mcupanel_RegSet(0x0103, 0x2E00); /*set the amplitude of VCOM*/\ - mdelay(50);\ - Mcupanel_RegSet(0x0282, 0x0093);/*0x008E);/*0x0093); /*VCOMH voltage*/\ - Mcupanel_RegSet(0x0281, 0x000A); /*Selects the factor of VREG1OUT to generate VCOMH. */\ - Mcupanel_RegSet(0x0102, 0x01BE); /*Starts VLOUT3,Sets the VREG1OUT.*/\ - mdelay(10);\ - /*Address */\ - Mcupanel_RegSet(0x0210, 0x0000); /*Window Horizontal RAM Address Start*/\ - Mcupanel_RegSet(0x0211, 0x00ef); /*Window Horizontal RAM Address End*/\ - Mcupanel_RegSet(0x0212, 0x0000); /*Window Vertical RAM Address Start*/\ - Mcupanel_RegSet(0x0213, 0x018f); /*Window Vertical RAM Address End */\ - Mcupanel_RegSet(0x0200, 0x0000); /*RAM Address Set (Horizontal Address)*/\ - Mcupanel_RegSet(0x0201, 0x018f); /*RAM Address Set (Vertical Address)*/ \ - /*===Display_On_Function===*/\ - Mcupanel_RegSet(0x0007, 0x0021); /*Display Control 1 */\ - mdelay(50); /*40*/\ - Mcupanel_RegSet(0x0007, 0x0061); /*Display Control 1 */\ - mdelay(50); /*100*/\ - Mcupanel_RegSet(0x0007, 0x0173); /*Display Control 1 */\ - mdelay(50); /*300*/\ - }\ - Mcupanel_Command(0x0202); /*Write Data to GRAM */ \ - udelay(10);\ - Mcupanel_SetAddr(0,0);\ - udelay(100);\ -} while(0) - -#define __slcd_special_pin_init() \ -do { \ - __gpio_as_output(PIN_CS_N); \ - __gpio_as_output(PIN_RESET_N); \ - __gpio_clear_pin(PIN_CS_N); /* Clear CS */ \ - __gpio_as_output(PIN_POWER_N); \ - mdelay(100); \ -} while(0) - -#endif /*CONFIG_JZ_SLCD_SPFD5420A*/ - -#ifndef __slcd_special_pin_init -#define __slcd_special_pin_init() -#endif -#ifndef __slcd_special_on -#define __slcd_special_on() -#endif -#ifndef __slcd_special_off -#define __slcd_special_off() -#endif - -/* - * Platform specific definition - */ -#if defined(CONFIG_SOC_JZ4740) -#if defined(CONFIG_JZ4740_PAVO) -#define GPIO_PWM 123 /* GP_D27 */ -#define PWM_CHN 4 /* pwm channel */ -#define PWM_FULL 101 -/* 100 level: 0,1,...,100 */ -#define __slcd_set_backlight_level(n)\ -do { \ - __gpio_as_output(32*3+27); \ - __gpio_set_pin(32*3+27); \ -} while (0) - -#define __slcd_close_backlight() \ -do { \ - __gpio_as_output(GPIO_PWM); \ - __gpio_clear_pin(GPIO_PWM); \ -} while (0) - -#else - -#define __slcd_set_backlight_level(n) -#define __slcd_close_backlight() - -#endif /* #if defined(CONFIG_MIPS_JZ4740_PAVO) */ - -#define __slcd_display_pin_init() \ -do { \ - __slcd_special_pin_init(); \ -} while (0) - -#define __slcd_display_on() \ -do { \ - __slcd_special_on(); \ - __slcd_set_backlight_level(80); \ -} while (0) - -#define __slcd_display_off() \ -do { \ - __slcd_special_off(); \ - __slcd_close_backlight(); \ -} while (0) - -#endif /* CONFIG_SOC_JZ4740 */ -#endif /*__JZSLCD_H__*/ - diff --git a/target/linux/xburst/files-2.6.31/drivers/video/jz_auo_a043fl01v2.h b/target/linux/xburst/files-2.6.31/drivers/video/jz_auo_a043fl01v2.h deleted file mode 100644 index 00a572899..000000000 --- a/target/linux/xburst/files-2.6.31/drivers/video/jz_auo_a043fl01v2.h +++ /dev/null @@ -1,129 +0,0 @@ -/* - * linux/drivers/video/jz_auo_a043fl01v2.h -- Ingenic LCD driver - */ - -#ifndef __JZ_AUO_A043FL01V2_H__ -#define __JZ_AUO_A043FL01V2_H__ - -#if defined(CONFIG_JZ4750_APUS) /* board pavo */ - #define SPEN (32*3+29) /*LCD_CS*/ - #define SPCK (32*3+26) /*LCD_SCL*/ - #define SPDA (32*3+27) /*LCD_SDA*/ - #define LCD_DISP_N (32*4+25) /*LCD_DISP_N use for lcd reset*/ -#elif defined(CONFIG_JZ4750_FUWA) /* board fuwa */ - #define SPEN (32*3+29) /*LCD_CS*/ - #define SPCK (32*3+26) /*LCD_SCL*/ - #define SPDA (32*3+27) /*LCD_SDA*/ - #define LCD_DISP_N (32*5+2) /*LCD_DISP_N use for lcd reset*/ -#elif defined(CONFIG_JZ4750D_CETUS) /* board cetus */ - #define SPEN (32*5+13) /*LCD_CS*/ - #define SPCK (32*5+10) /*LCD_SCL*/ - #define SPDA (32*5+11) /*LCD_SDA*/ - #define LCD_DISP_N (32*4+18) /*LCD_DISP_N use for lcd reset*/ -#else -#error "driver/video/Jzlcd.h, please define SPI pins on your board." -#endif - -#define __spi_write_reg(reg, val) \ - do { \ - unsigned char no; \ - unsigned short value; \ - unsigned char a=0; \ - unsigned char b=0; \ - __gpio_as_output(SPEN); /* use SPDA */ \ - __gpio_as_output(SPCK); /* use SPCK */ \ - __gpio_as_output(SPDA); /* use SPDA */ \ - a=reg; \ - b=val; \ - __gpio_set_pin(SPEN); \ - __gpio_clear_pin(SPCK); \ - udelay(50); \ - __gpio_clear_pin(SPDA); \ - __gpio_clear_pin(SPEN); \ - udelay(50); \ - value=((a<<8)|(b&0xFF)); \ - for(no=0;no<16;no++) \ - { \ - if((value&0x8000)==0x8000){ \ - __gpio_set_pin(SPDA);} \ - else{ \ - __gpio_clear_pin(SPDA); } \ - udelay(50); \ - __gpio_set_pin(SPCK); \ - value=(value<<1); \ - udelay(50); \ - __gpio_clear_pin(SPCK); \ - } \ - __gpio_set_pin(SPEN); \ - udelay(400); \ - } while (0) -#define __spi_read_reg(reg,val) \ - do{ \ - unsigned char no; \ - unsigned short value; \ - __gpio_as_output(SPEN); /* use SPDA */ \ - __gpio_as_output(SPCK); /* use SPCK */ \ - __gpio_as_output(SPDA); /* use SPDA */ \ - value = ((reg << 0) | (1 << 7)); \ - val = 0; \ - __gpio_as_output(SPDA); \ - __gpio_set_pin(SPEN); \ - __gpio_clear_pin(SPCK); \ - udelay(50); \ - __gpio_clear_pin(SPDA); \ - __gpio_clear_pin(SPEN); \ - udelay(50); \ - for (no = 0; no < 16; no++ ) { \ - udelay(50); \ - if(no < 8) \ - { \ - if (value & 0x80) /* send data */ \ - __gpio_set_pin(SPDA); \ - else \ - __gpio_clear_pin(SPDA); \ - udelay(50); \ - __gpio_set_pin(SPCK); \ - value = (value << 1); \ - udelay(50); \ - __gpio_clear_pin(SPCK); \ - if(no == 7) \ - __gpio_as_input(SPDA); \ - } \ - else \ - { \ - udelay(100); \ - __gpio_set_pin(SPCK); \ - udelay(50); \ - val = (val << 1); \ - val |= __gpio_get_pin(SPDA); \ - __gpio_clear_pin(SPCK); \ - } \ - } \ - __gpio_as_output(SPDA); \ - __gpio_set_pin(SPEN); \ - udelay(400); \ - } while(0) - -#define __lcd_special_pin_init() \ - do { \ - __gpio_as_output(SPEN); /* use SPDA */ \ - __gpio_as_output(SPCK); /* use SPCK */ \ - __gpio_as_output(SPDA); /* use SPDA */ \ - __gpio_as_output(LCD_DISP_N); \ - __gpio_clear_pin(LCD_DISP_N); \ - } while (0) -#define __lcd_special_on() \ - do { \ - udelay(50);\ - __gpio_clear_pin(LCD_DISP_N); \ - udelay(100); \ - __gpio_set_pin(LCD_DISP_N); \ -} while (0) - - #define __lcd_special_off() \ - do { \ - __gpio_clear_pin(LCD_DISP_N); \ - } while (0) - -#endif /* __JZ_AUO_A043FL01V2_H__ */ - diff --git a/target/linux/xburst/files-2.6.31/drivers/video/jz_toppoly_td043mgeb1.h b/target/linux/xburst/files-2.6.31/drivers/video/jz_toppoly_td043mgeb1.h deleted file mode 100644 index 44fc61691..000000000 --- a/target/linux/xburst/files-2.6.31/drivers/video/jz_toppoly_td043mgeb1.h +++ /dev/null @@ -1,157 +0,0 @@ -#ifndef __JZ_TOPPOLY_TD043MGEB1_H__ -#define __JZ_TOPPOLY_TD043MGEB1_H__ - -#include - -#if defined(CONFIG_JZ4750_LCD_TOPPOLY_TD043MGEB1) || defined(CONFIG_JZ4750_ANDROID_LCD_TOPPOLY_TD043MGEB1) -#if defined(CONFIG_JZ4750_APUS) /* board FuWa */ - #define SPEN (32*3+29) /*LCD_CS*/ - #define SPCK (32*3+26) /*LCD_SCL*/ - #define SPDA (32*3+27) /*LCD_SDA*/ - #define LCD_RET (32*4+23) /*LCD_DISP_N use for lcd reset*/ - #define LCD_STBY (32*4+25) /*LCD_STBY, use for lcd standby*/ -#else -#error "driver/video/jz_toppoly_td043mgeb1.h, please define SPI pins on your board." -#endif - -#define __spi_write_reg(reg, val) \ - do { \ - unsigned char no; \ - unsigned short value; \ - unsigned char a=0; \ - unsigned char b=0; \ - __gpio_as_output(SPEN); /* use SPDA */ \ - __gpio_as_output(SPCK); /* use SPCK */ \ - __gpio_as_output(SPDA); /* use SPDA */ \ - a=reg; \ - b=val; \ - __gpio_set_pin(SPEN); \ - __gpio_clear_pin(SPCK); \ - udelay(500); \ - __gpio_clear_pin(SPDA); \ - __gpio_clear_pin(SPEN); \ - udelay(500); \ - value=((a<<10)|(b&0xFF)); \ - for(no=0;no<16;no++) \ - { \ - if((value&0x8000)==0x8000){ \ - __gpio_set_pin(SPDA);} \ - else{ \ - __gpio_clear_pin(SPDA); } \ - udelay(500); \ - __gpio_set_pin(SPCK); \ - value=(value<<1); \ - udelay(500); \ - __gpio_clear_pin(SPCK); \ - } \ - __gpio_set_pin(SPEN); \ - udelay(4000); \ - } while (0) -#define __spi_read_reg(reg,val) \ - do{ \ - unsigned char no; \ - unsigned short value; \ - __gpio_as_output(SPEN); /* use SPDA */ \ - __gpio_as_output(SPCK); /* use SPCK */ \ - __gpio_as_output(SPDA); /* use SPDA */ \ - value = ((reg << 2) | (1 << 1)); \ - val = 0; \ - __gpio_as_output(SPDA); \ - __gpio_set_pin(SPEN); \ - __gpio_clear_pin(SPCK); \ - udelay(50); \ - __gpio_clear_pin(SPDA); \ - __gpio_clear_pin(SPEN); \ - udelay(50); \ - for (no = 0; no < 16; no++ ) { \ - udelay(50); \ - if(no < 8) \ - { \ - if (value & 0x80) /* send data */ \ - __gpio_set_pin(SPDA); \ - else \ - __gpio_clear_pin(SPDA); \ - udelay(50); \ - __gpio_set_pin(SPCK); \ - value = (value << 1); \ - udelay(50); \ - __gpio_clear_pin(SPCK); \ - if(no == 7) \ - __gpio_as_input(SPDA); \ - } \ - else \ - { \ - udelay(100); \ - __gpio_set_pin(SPCK); \ - udelay(50); \ - val = (val << 1); \ - val |= __gpio_get_pin(SPDA); \ - __gpio_clear_pin(SPCK); \ - } \ - } \ - __gpio_as_output(SPDA); \ - __gpio_set_pin(SPEN); \ - udelay(400); \ - } while(0) - -#define __lcd_special_pin_init() \ - do { \ - __gpio_as_output(SPEN); /* use SPDA */ \ - __gpio_as_output(SPCK); /* use SPCK */ \ - __gpio_as_output(SPDA); /* use SPDA */ \ - __gpio_as_output(LCD_STBY); \ - __gpio_as_output(LCD_RET); \ - udelay(500); \ - __gpio_clear_pin(LCD_RET); \ - udelay(1000); \ - __gpio_set_pin(LCD_RET); \ - udelay(1000); \ - } while (0) - -#define __lcd_special_on() \ - do { \ - __gpio_set_pin(LCD_STBY); \ - udelay(1000); \ - __spi_write_reg(0x02, 0x07); \ - __spi_write_reg(0x03, 0x5F); \ - __spi_write_reg(0x04, 0x17); \ - __spi_write_reg(0x05, 0x20); \ - __spi_write_reg(0x06, 0x08); \ - __spi_write_reg(0x07, 0x20); \ - __spi_write_reg(0x08, 0x20); \ - __spi_write_reg(0x09, 0x20); \ - __spi_write_reg(0x0A, 0x20); \ - __spi_write_reg(0x0B, 0x20); \ - __spi_write_reg(0x0C, 0x20); \ - __spi_write_reg(0x0D, 0x22); \ - __spi_write_reg(0x0E, 0x2F); \ - __spi_write_reg(0x0F, 0x2f); \ - __spi_write_reg(0x10, 0x2F); \ - __spi_write_reg(0x11, 0x15); \ - __spi_write_reg(0x12, 0xaa); \ - __spi_write_reg(0x13, 0xFF); \ - __spi_write_reg(0x14, 0x86); \ - __spi_write_reg(0x15, 0x8e); \ - __spi_write_reg(0x16, 0xd6); \ - __spi_write_reg(0x17, 0xfe); \ - __spi_write_reg(0x18, 0x28); \ - __spi_write_reg(0x19, 0x52); \ - __spi_write_reg(0x1A, 0x7c); \ - __spi_write_reg(0x1B, 0xe9); \ - __spi_write_reg(0x1C, 0x42); \ - __spi_write_reg(0x1D, 0x88); \ - __spi_write_reg(0x1E, 0xb8); \ - __spi_write_reg(0x1F, 0xff); \ - __spi_write_reg(0x20, 0xf0); \ - __spi_write_reg(0x21, 0xf0); \ - __spi_write_reg(0x22, 0x08); \ - } while (0) - -#define __lcd_special_off() \ - do { \ - __gpio_clear_pin(LCD_STBY); \ - } while (0) - -#endif /* LCD_TOPPOLY_TD043MGEB1 */ - -#endif /* __JZ_TOPPOLY_TD043MGEB1_H__ */ diff --git a/target/linux/xburst/files-2.6.31/drivers/video/jzlcd.c b/target/linux/xburst/files-2.6.31/drivers/video/jzlcd.c deleted file mode 100755 index 6df943965..000000000 --- a/target/linux/xburst/files-2.6.31/drivers/video/jzlcd.c +++ /dev/null @@ -1,1538 +0,0 @@ -/* - * linux/drivers/video/jzlcd.c -- Ingenic On-Chip LCD frame buffer device - * - * Copyright (C) 2005-2007, Ingenic Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include "console/fbcon.h" - -#include "jzlcd.h" - -#define DRIVER_NAME "jz-lcd" - -#undef DEBUG -//#define DEBUG -#ifdef DEBUG -#define dprintk(x...) printk(x) -#else -#define dprintk(x...) -#endif - -#define print_err(f, arg...) printk(KERN_ERR DRIVER_NAME ": " f "\n", ## arg) -#define print_warn(f, arg...) printk(KERN_WARNING DRIVER_NAME ": " f "\n", ## arg) -#define print_info(f, arg...) printk(KERN_INFO DRIVER_NAME ": " f "\n", ## arg) -#ifdef DEBUG -#define print_dbg(f, arg...) printk("dbg::" __FILE__ ",LINE(%d): " f "\n", __LINE__, ## arg) -#else -#define print_dbg(f, arg...) do {} while (0) -#endif - -struct lcd_cfb_info { - struct fb_info fb; - struct display_switch *dispsw; - signed int currcon; - int func_use_count; - - struct { - u16 red, green, blue; - } palette[NR_PALETTE]; -#ifdef CONFIG_PM - struct pm_dev *pm; -#endif -#if defined(CONFIG_JZLCD_FRAMEBUFFER_ROTATE_SUPPORT) - struct task_struct *rotate_daemon_thread; -#endif -}; - -static struct lcd_cfb_info *jzlcd_info; - -struct jzfb_info { - unsigned int cfg; /* panel mode and pin usage etc. */ - unsigned int w; - unsigned int h; - unsigned int bpp; /* bit per pixel */ - unsigned int fclk; /* frame clk */ - unsigned int hsw; /* hsync width, in pclk */ - unsigned int vsw; /* vsync width, in line count */ - unsigned int elw; /* end of line, in pclk */ - unsigned int blw; /* begin of line, in pclk */ - unsigned int efw; /* end of frame, in line count */ - unsigned int bfw; /* begin of frame, in line count */ -}; - -static struct jzfb_info jzfb = { -#if defined(CONFIG_JZLCD_SHARP_LQ035Q7) - MODE_TFT_SHARP | PCLK_N | VSYNC_N, - 240, 320, 16, 60, 1, 2, 1, 2, 0, 6 -#endif -#if defined(CONFIG_JZLCD_SAMSUNG_LTS350Q1) - MODE_TFT_SAMSUNG | PCLK_N, - 240, 320, 16, 60, 1, 2, (254-240), 0, 7, 0 -#endif -#if defined(CONFIG_JZLCD_SAMSUNG_LTV350QVF04) - MODE_TFT_GEN | HSYNC_N | VSYNC_N, - 320, 240, 16, 70, 19, 4, 20, 14, 18, 6 -#endif -#if defined(CONFIG_JZLCD_SAMSUNG_LTP400WQF01) - MODE_TFT_GEN | HSYNC_N | VSYNC_N, - 480, 272, 16, 60, 41, 10, 2, 2, 2, 2 -#endif - -#if defined(CONFIG_JZLCD_SAMSUNG_LTP400WQF02) - /* MODE_TFT_18BIT: JZ4740@ version */ - MODE_TFT_GEN | MODE_TFT_18BIT | HSYNC_N | VSYNC_N, - 480, 272, 32, 60, 41, 10, 2, 2, 2, 2 -#endif -#if defined(CONFIG_JZLCD_TRULY_TFTG320240DTSW) - MODE_TFT_GEN | HSYNC_N | VSYNC_N | PCLK_N, - 320, 240, 16, 85, 30, 3, 38, 20, 11, 8 -#endif -#if defined(CONFIG_JZLCD_TRULY_TFTG320240DTSW_SERIAL) - MODE_8BIT_SERIAL_TFT | HSYNC_N | VSYNC_N | PCLK_N, - /* serial mode 280 lines, parallel mode 240 lines */ - 320, 280, 32, 60, (30*3), 3, (20*3), (38*3), 46, 23 -#endif -#if defined(CONFIG_JZLCD_AUO_A030FL01_V1) - MODE_TFT_GEN | MODE_TFT_18BIT | HSYNC_N | VSYNC_N, - 480, 272, 32, 60, 39, 10, 8, 4, 4, 2 -#endif -#if defined(CONFIG_JZLCD_TRULY_TFTG240320UTSW_63W_E) - MODE_TFT_GEN | HSYNC_N | VSYNC_N | PCLK_N | DE_N, - 320, 240, 16, 60, 3, 3, 3, 3, 3, 85 /* 320x240 */ -#endif -#if defined(CONFIG_JZLCD_FOXCONN_PT035TN01) && defined(CONFIG_JZ4740_PAVO) - MODE_TFT_GEN | HSYNC_N | VSYNC_N | MODE_TFT_18BIT | PCLK_N, -// 320, 240, 18, 110, 1, 1, 10, 50, 10, 13 - 320, 240, 18, 80, 1, 1, 10, 50, 10, 13 -#endif -#if defined(CONFIG_JZLCD_FOXCONN_PT035TN01) && !(defined(CONFIG_JZ4740_PAVO)) - MODE_TFT_GEN | HSYNC_N | VSYNC_N | PCLK_N, - 320, 240, 16, 110, 1, 1, 10, 50, 10, 13 -#endif -#if defined(CONFIG_JZLCD_INNOLUX_PT035TN01_SERIAL) - MODE_8BIT_SERIAL_TFT | PCLK_N | HSYNC_N | VSYNC_N, - 320, 240, 32, 60, 1, 1, 10, 50, 10, 13 -#endif -#if defined(CONFIG_JZLCD_HYNIX_HT10X21) - MODE_TFT_GEN | PCLK_N, - 1024, 768, 16, 45, 1, 1, 75, 0, 3, 0 -#endif -#if defined(CONFIG_JZLCD_TOSHIBA_LTM084P363) - MODE_TFT_GEN | PCLK_N, - 800, 600, 16, 50, 1, 2, 199, 0, 2, 0 -#endif -#if defined(CONFIG_JZLCD_INNOLUX_AT080TN42) - MODE_TFT_SHARP | PCLK_N, - 800, 600, 16, 40, 1, 1, 255, 0, 34, 0 -#endif -#if defined(CONFIG_JZLCD_CSTN_800x600) - MODE_STN_COLOR_DUAL | STN_DAT_PIN8, - 800, 600, 16, 30, 8, 1, 0, 0, 0, 0 -#endif -#if defined(CONFIG_JZLCD_CSTN_320x240) - MODE_STN_COLOR_SINGLE | STN_DAT_PIN8, - 320, 240, 16, 120, 8, 1, 8, 0, 0, 0 -#endif -#if defined(CONFIG_JZLCD_MSTN_640x480) - MODE_STN_MONO_DUAL | STN_DAT_PIN4, - 640, 480, 8, 110, 4, 1, 4, 0, 0, 0 -#endif -#if defined(CONFIG_JZLCD_MSTN_320x240) - MODE_STN_MONO_SINGLE | STN_DAT_PIN4, - 320, 240, 8, 110, 4, 1, 4, 0, 0, 0 -#endif -#if defined(CONFIG_JZLCD_MSTN_480x320) - MODE_STN_MONO_SINGLE | STN_DAT_PIN8 -#if defined(CONFIG_JZLCD_MSTN_INVERSE) - | DATA_INVERSE -#endif - , 480, 320, 8, 65, 8, 1, 8, 0, 0, 0 -#endif - -#if defined(CONFIG_JZLCD_MSTN_240x128) - MODE_STN_MONO_SINGLE | STN_DAT_PIN1 -#if defined(CONFIG_JZLCD_MSTN_INVERSE) - | DATA_INVERSE -#endif - , 240, 128, 8, 100, 1, 1, 1, 0, 0, 0 -#endif -}; - -static struct lcd_desc *lcd_desc_base; -static struct lcd_desc *lcd_palette_desc; -static struct lcd_desc *lcd_frame_desc0; -static struct lcd_desc *lcd_frame_desc1; - -static unsigned char *lcd_palette; -static unsigned char *lcd_frame[CONFIG_JZLCD_FRAMEBUFFER_MAX]; -struct jz_lcd_buffer_addrs_t jz_lcd_buffer_addrs; -//extern struct display fb_display[MAX_NR_CONSOLES]; -#if defined(CONFIG_JZLCD_FRAMEBUFFER_ROTATE_SUPPORT) -static unsigned char *lcd_frame_user_fb; -/* default rotate angle */ -static volatile int rotate_angle = CONFIG_JZLCD_FRAMEBUFFER_DEFAULT_ROTATE_ANGLE; -#endif - -#ifdef DEBUG -static void print_regs(void) /* debug */ -{ - printk("REG_LCD_CFG:\t0x%8.8x\n", REG_LCD_CFG); - printk("REG_LCD_VSYNC:\t0x%8.8x\n", REG_LCD_VSYNC); - printk("REG_LCD_HSYNC:\t0x%8.8x\n", REG_LCD_HSYNC); - printk("REG_LCD_VAT:\t0x%8.8x\n", REG_LCD_VAT); - printk("REG_LCD_DAH:\t0x%8.8x\n", REG_LCD_DAH); - printk("REG_LCD_DAV:\t0x%8.8x\n", REG_LCD_DAV); - printk("REG_LCD_PS:\t0x%8.8x\n", REG_LCD_PS); - printk("REG_LCD_CLS:\t0x%8.8x\n", REG_LCD_CLS); - printk("REG_LCD_SPL:\t0x%8.8x\n", REG_LCD_SPL); - printk("REG_LCD_REV:\t0x%8.8x\n", REG_LCD_REV); - printk("REG_LCD_CTRL:\t0x%8.8x\n", REG_LCD_CTRL); - printk("REG_LCD_STATE:\t0x%8.8x\n", REG_LCD_STATE); - printk("REG_LCD_IID:\t0x%8.8x\n", REG_LCD_IID); - printk("REG_LCD_DA0:\t0x%8.8x\n", REG_LCD_DA0); - printk("REG_LCD_SA0:\t0x%8.8x\n", REG_LCD_SA0); - printk("REG_LCD_FID0:\t0x%8.8x\n", REG_LCD_FID0); - printk("REG_LCD_CMD0:\t0x%8.8x\n", REG_LCD_CMD0); - - printk("==================================\n"); - printk("REG_LCD_VSYNC:\t%d:%d\n", REG_LCD_VSYNC>>16, REG_LCD_VSYNC&0xfff); - printk("REG_LCD_HSYNC:\t%d:%d\n", REG_LCD_HSYNC>>16, REG_LCD_HSYNC&0xfff); - printk("REG_LCD_VAT:\t%d:%d\n", REG_LCD_VAT>>16, REG_LCD_VAT&0xfff); - printk("REG_LCD_DAH:\t%d:%d\n", REG_LCD_DAH>>16, REG_LCD_DAH&0xfff); - printk("REG_LCD_DAV:\t%d:%d\n", REG_LCD_DAV>>16, REG_LCD_DAV&0xfff); - printk("==================================\n"); - -} -#else -#define print_regs() -#endif - -#if defined(CONFIG_JZLCD_FRAMEBUFFER_ROTATE_SUPPORT) -static int jzfb_rotate_daemon_thread(void *info) -{ - int i,j; - struct fb_info *fb = &jzlcd_info->fb; - - while (!kthread_should_stop()) { -#if (CONFIG_JZLCD_FRAMEBUFFER_BPP == 8) - unsigned char *plcd_frame = (unsigned char *)lcd_frame[0]; - unsigned char *pfb = (unsigned char *) (fb->screen_base); -#elif (CONFIG_JZLCD_FRAMEBUFFER_BPP == 16) - unsigned short *plcd_frame = (unsigned short *)lcd_frame[0]; - unsigned short *pfb = (unsigned short *) (fb->screen_base); -#elif (CONFIG_JZLCD_FRAMEBUFFER_BPP == 32) - unsigned int *plcd_frame = (unsigned int *)lcd_frame[0]; - unsigned int *pfb = (unsigned int *) (fb->screen_base); -#else -#error "ERROR, rotate not support this bpp." -#endif - switch ( rotate_angle ) { - case FB_ROTATE_UR: - printk("%s, Warning, this shouldn't reache\n", __FUNCTION__); - ssleep(1); - break; - case FB_ROTATE_UD: /* cost about 30ms, can be accelrated by dma in the future */ - plcd_frame += jzfb.w*jzfb.h -1; - for (i=0;ivar.height+1; i++) { - for (j=1; j < fb->var.width+1; j++) - plcd_frame[j*fb->var.height-i] = *pfb++; - } - msleep(100); /* sleep 100ms */ - break; - case FB_ROTATE_CCW: /* cost about 80ms */ - for (i=0;ivar.height;i++) { - for ( j=fb->var.width-1;j>=0;j--) - plcd_frame[j*fb->var.height+i] = *pfb++; - } - msleep(100); /* sleep 100ms */ - break; - default: /* FB_ROTATE_UR */ - dprintk("Unknown rotate(%d) type\n", rotate_angle); - ssleep(1); - } - - dma_cache_wback_inv((unsigned int)(lcd_frame_user_fb), fb->fix.smem_len); - } - return 0; -} -/* - * rotate param angle: - * 0: FB_ROTATE_UR, 0'C - * 1: FB_ROTATE_CW, 90'C - * 2: FB_ROTATE_UD, 180'C - * 3: FB_ROTATE_CCW, 270'C - */ -static int jzfb_rotate_change( int angle ) -{ - struct fb_info *fb = &jzlcd_info->fb; - - /* clear frame buffer */ - memset((void*)lcd_frame_user_fb, 0x00, fb->fix.smem_len); - switch ( angle ) { - case FB_ROTATE_UR: - fb->var.width = fb->var.xres = fb->var.xres_virtual = jzfb.w; - fb->var.height = fb->var.yres = fb->var.yres_virtual = jzfb.h; - /* change lcd controller's data buffer to lcd_frame_user_fb*/ - lcd_frame_desc0->databuf = virt_to_phys((void *)lcd_frame_user_fb); - if ( rotate_angle != FB_ROTATE_UR ) - kthread_stop(jzlcd_info->rotate_daemon_thread); - rotate_angle = angle; - break; - case FB_ROTATE_UD: - case FB_ROTATE_CW: - case FB_ROTATE_CCW: - if ( angle == FB_ROTATE_UD ) { - fb->var.width = fb->var.xres = fb->var.xres_virtual = jzfb.w; - fb->var.height = fb->var.yres = fb->var.yres_virtual = jzfb.h; - } - else { /* CW, CCW */ - fb->var.width = fb->var.xres = fb->var.xres_virtual = jzfb.h; - fb->var.height = fb->var.yres = fb->var.yres_virtual = jzfb.w; - } - /* change lcd controller's data buffer to lcd_frame[0]*/ - lcd_frame_desc0->databuf = virt_to_phys((void *)lcd_frame[0]); - if ( rotate_angle == FB_ROTATE_UR || \ - jzlcd_info->rotate_daemon_thread == NULL) - jzlcd_info->rotate_daemon_thread = kthread_run( jzfb_rotate_daemon_thread, jzlcd_info, "%s", "jzlcd-rotate-daemon"); /* start rotate daemon */ - rotate_angle = angle; - break; - default: - printk("Invalid angle(%d)\n", (unsigned int)angle); - } - fb->fix.line_length = fb->var.xres * CONFIG_JZLCD_FRAMEBUFFER_BPP/8; - dma_cache_wback_inv((unsigned int)(lcd_frame_desc0), sizeof(struct lcd_desc)); - return 0; -} - -void jzfb_fb_rotate(struct fb_info *fbi, int angle) -{ - jzfb_rotate_change( angle/90 ); -} -#endif /* #if defined(CONFIG_JZLCD_FRAMEBUFFER_ROTATE_SUPPORT) */ - -static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf) -{ - chan &= 0xffff; - chan >>= 16 - bf->length; - return chan << bf->offset; -} - -static int jzfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, - u_int transp, struct fb_info *info) -{ - struct lcd_cfb_info *cfb = (struct lcd_cfb_info *)info; - unsigned short *ptr, ctmp; - -// print_dbg("regno:%d,RGBt:(%d,%d,%d,%d)\t", regno, red, green, blue, transp); - if (regno >= NR_PALETTE) - return 1; - - cfb->palette[regno].red = red ; - cfb->palette[regno].green = green; - cfb->palette[regno].blue = blue; - if (cfb->fb.var.bits_per_pixel <= 16) { - red >>= 8; - green >>= 8; - blue >>= 8; - - red &= 0xff; - green &= 0xff; - blue &= 0xff; - } - switch (cfb->fb.var.bits_per_pixel) { - case 1: - case 2: - case 4: - case 8: - if (((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_SINGLE) || - ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL)) { - ctmp = (77L * red + 150L * green + 29L * blue) >> 8; - ctmp = ((ctmp >> 3) << 11) | ((ctmp >> 2) << 5) | - (ctmp >> 3); - } else { - /* RGB 565 */ - if (((red >> 3) == 0) && ((red >> 2) != 0)) - red = 1 << 3; - if (((blue >> 3) == 0) && ((blue >> 2) != 0)) - blue = 1 << 3; - ctmp = ((red >> 3) << 11) - | ((green >> 2) << 5) | (blue >> 3); - } - - ptr = (unsigned short *)lcd_palette; - ptr = (unsigned short *)(((u32)ptr)|0xa0000000); - ptr[regno] = ctmp; - - break; - - case 15: - if (regno < 16) - ((u32 *)cfb->fb.pseudo_palette)[regno] = - ((red >> 3) << 10) | - ((green >> 3) << 5) | - (blue >> 3); - break; - case 16: - if (regno < 16) { - ((u32 *)cfb->fb.pseudo_palette)[regno] = - ((red >> 3) << 11) | - ((green >> 2) << 5) | - (blue >> 3); - } - break; - case 18: - case 24: - case 32: - if (regno < 16) - ((u32 *)cfb->fb.pseudo_palette)[regno] = - (red << 16) | - (green << 8) | - (blue << 0); - -/* if (regno < 16) { - unsigned val; - val = chan_to_field(red, &cfb->fb.var.red); - val |= chan_to_field(green, &cfb->fb.var.green); - val |= chan_to_field(blue, &cfb->fb.var.blue); - ((u32 *)cfb->fb.pseudo_palette)[regno] = val; - } -*/ - - break; - } - return 0; -} - - -static int jzfb_ioctl (struct fb_info *fb, unsigned int cmd, unsigned long arg ) -{ - int ret = 0; - void __user *argp = (void __user *)arg; - - switch (cmd) { - case FBIOSETBACKLIGHT: - __lcd_set_backlight_level(arg); /* We support 8 levels here. */ - break; - case FBIODISPON: - __lcd_display_on(); - break; - case FBIODISPOFF: - __lcd_display_off(); - break; - case FBIOPRINT_REGS: - print_regs(); - break; - case FBIOGETBUFADDRS: - if ( copy_to_user(argp, &jz_lcd_buffer_addrs, - sizeof(struct jz_lcd_buffer_addrs_t)) ) - return -EFAULT; - break; -#if defined(CONFIG_JZLCD_FRAMEBUFFER_ROTATE_SUPPORT) - case FBIOROTATE: - ret = jzfb_rotate_change(arg); - break; -#endif /* defined(CONFIG_JZLCD_FRAMEBUFFER_ROTATE_SUPPORT) */ - default: - printk("Warn: Command(%x) not support\n", cmd); - ret = -1; - break; - } - return ret; - -} - -/* Use mmap /dev/fb can only get a non-cacheable Virtual Address. */ -static int jzfb_mmap(struct fb_info *info, struct vm_area_struct *vma) -{ - struct lcd_cfb_info *cfb = (struct lcd_cfb_info *)info; - unsigned long start; - unsigned long off; - u32 len; - - off = vma->vm_pgoff << PAGE_SHIFT; - //fb->fb_get_fix(&fix, PROC_CONSOLE(info), info); - - /* frame buffer memory */ - start = cfb->fb.fix.smem_start; - len = PAGE_ALIGN((start & ~PAGE_MASK) + cfb->fb.fix.smem_len); - start &= PAGE_MASK; - - if ((vma->vm_end - vma->vm_start + off) > len) - return -EINVAL; - off += start; - - vma->vm_pgoff = off >> PAGE_SHIFT; - vma->vm_flags |= VM_IO; - vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); /* Uncacheable */ - -#if 1 - pgprot_val(vma->vm_page_prot) &= ~_CACHE_MASK; - pgprot_val(vma->vm_page_prot) |= _CACHE_UNCACHED; /* Uncacheable */ -// pgprot_val(vma->vm_page_prot) |= _CACHE_CACHABLE_NONCOHERENT; /* Write-Through */ -#endif - - if (io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT, - vma->vm_end - vma->vm_start, - vma->vm_page_prot)) { - return -EAGAIN; - } - return 0; -} - -/* checks var and eventually tweaks it to something supported, - * DO NOT MODIFY PAR */ -static int jzfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) -{ - print_dbg("jzfb_check_var"); - return 0; -} - - -/* - * set the video mode according to info->var - */ -static int jzfb_set_par(struct fb_info *info) -{ - print_dbg("jzfb_set_par"); - return 0; -} - - -/* - * (Un)Blank the display. - * Fix me: should we use VESA value? - */ -static int jzfb_blank(int blank_mode, struct fb_info *info) -{ - - dprintk("fb_blank %d %p", blank_mode, info); - - switch (blank_mode) { - - case FB_BLANK_UNBLANK: - //case FB_BLANK_NORMAL: - /* Turn on panel */ - __lcd_set_ena(); - __lcd_display_on(); - break; - - case FB_BLANK_NORMAL: - case FB_BLANK_VSYNC_SUSPEND: - case FB_BLANK_HSYNC_SUSPEND: - case FB_BLANK_POWERDOWN: -#if 0 - /* Turn off panel */ - __lcd_set_dis(); - __lcd_display_off(); -#endif - break; - default: - break; - - } - return 0; -} - -/* - * pan display - */ -static int jzfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) -{ - struct lcd_cfb_info *cfb = (struct lcd_cfb_info *)info; - int dy; - - if (!var || !cfb) { - return -EINVAL; - } - - if (var->xoffset - cfb->fb.var.xoffset) { - /* No support for X panning for now! */ - return -EINVAL; - } - - dy = var->yoffset - cfb->fb.var.yoffset; - print_dbg("var.yoffset: %d", dy); - if (dy) { - - print_dbg("Panning screen of %d lines", dy); - - lcd_frame_desc0->databuf += (cfb->fb.fix.line_length * dy); - /* TODO: Wait for current frame to finished */ - } - - return 0; -} - - -/* use default function cfb_fillrect, cfb_copyarea, cfb_imageblit */ -static struct fb_ops jzfb_ops = { - .owner = THIS_MODULE, - .fb_setcolreg = jzfb_setcolreg, - .fb_check_var = jzfb_check_var, - .fb_set_par = jzfb_set_par, - .fb_blank = jzfb_blank, - .fb_pan_display = jzfb_pan_display, - .fb_fillrect = cfb_fillrect, - .fb_copyarea = cfb_copyarea, - .fb_imageblit = cfb_imageblit, - .fb_mmap = jzfb_mmap, - .fb_ioctl = jzfb_ioctl, -#if defined(CONFIG_JZLCD_FRAMEBUFFER_ROTATE_SUPPORT) - .fb_rotate = jzfb_fb_rotate, -#endif -}; - -static int jzfb_set_var(struct fb_var_screeninfo *var, int con, - struct fb_info *info) -{ - struct lcd_cfb_info *cfb = (struct lcd_cfb_info *)info; - int chgvar = 0; - - var->height = jzfb.h ; - var->width = jzfb.w ; - var->bits_per_pixel = jzfb.bpp; - - var->vmode = FB_VMODE_NONINTERLACED; - var->activate = cfb->fb.var.activate; - var->xres = var->width; - var->yres = var->height; - var->xres_virtual = var->width; - var->yres_virtual = var->height; - var->xoffset = 0; - var->yoffset = 0; - var->pixclock = 0; - var->left_margin = 0; - var->right_margin = 0; - var->upper_margin = 0; - var->lower_margin = 0; - var->hsync_len = 0; - var->vsync_len = 0; - var->sync = 0; - var->activate &= ~FB_ACTIVATE_TEST; - - /* - * CONUPDATE and SMOOTH_XPAN are equal. However, - * SMOOTH_XPAN is only used internally by fbcon. - */ - if (var->vmode & FB_VMODE_CONUPDATE) { - var->vmode |= FB_VMODE_YWRAP; - var->xoffset = cfb->fb.var.xoffset; - var->yoffset = cfb->fb.var.yoffset; - } - - if (var->activate & FB_ACTIVATE_TEST) - return 0; - - if ((var->activate & FB_ACTIVATE_MASK) != FB_ACTIVATE_NOW) - return -EINVAL; - - if (cfb->fb.var.xres != var->xres) - chgvar = 1; - if (cfb->fb.var.yres != var->yres) - chgvar = 1; - if (cfb->fb.var.xres_virtual != var->xres_virtual) - chgvar = 1; - if (cfb->fb.var.yres_virtual != var->yres_virtual) - chgvar = 1; - if (cfb->fb.var.bits_per_pixel != var->bits_per_pixel) - chgvar = 1; - - var->red.msb_right = 0; - var->green.msb_right = 0; - var->blue.msb_right = 0; - - switch(var->bits_per_pixel){ - case 1: /* Mono */ - cfb->fb.fix.visual = FB_VISUAL_MONO01; - cfb->fb.fix.line_length = (var->xres * var->bits_per_pixel) / 8; - break; - case 2: /* Mono */ - var->red.offset = 0; - var->red.length = 2; - var->green.offset = 0; - var->green.length = 2; - var->blue.offset = 0; - var->blue.length = 2; - - cfb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR; - cfb->fb.fix.line_length = (var->xres * var->bits_per_pixel) / 8; - break; - case 4: /* PSEUDOCOLOUR*/ - var->red.offset = 0; - var->red.length = 4; - var->green.offset = 0; - var->green.length = 4; - var->blue.offset = 0; - var->blue.length = 4; - - cfb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR; - cfb->fb.fix.line_length = var->xres / 2; - break; - case 8: /* PSEUDOCOLOUR, 256 */ - var->red.offset = 0; - var->red.length = 8; - var->green.offset = 0; - var->green.length = 8; - var->blue.offset = 0; - var->blue.length = 8; - - cfb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR; - cfb->fb.fix.line_length = var->xres ; - break; - case 15: /* DIRECTCOLOUR, 32k */ - var->bits_per_pixel = 15; - var->red.offset = 10; - var->red.length = 5; - var->green.offset = 5; - var->green.length = 5; - var->blue.offset = 0; - var->blue.length = 5; - - cfb->fb.fix.visual = FB_VISUAL_DIRECTCOLOR; - cfb->fb.fix.line_length = var->xres_virtual * 2; - break; - case 16: /* DIRECTCOLOUR, 64k */ - var->bits_per_pixel = 16; - var->red.offset = 11; - var->red.length = 5; - var->green.offset = 5; - var->green.length = 6; - var->blue.offset = 0; - var->blue.length = 5; - - cfb->fb.fix.visual = FB_VISUAL_TRUECOLOR; - cfb->fb.fix.line_length = var->xres_virtual * 2; - break; - case 18: - case 24: - case 32: - /* DIRECTCOLOUR, 16M */ - var->bits_per_pixel = 32; - - var->red.offset = 16; - var->red.length = 8; - var->green.offset = 8; - var->green.length = 8; - var->blue.offset = 0; - var->blue.length = 8; - var->transp.offset = 24; - var->transp.length = 8; - - cfb->fb.fix.visual = FB_VISUAL_TRUECOLOR; - cfb->fb.fix.line_length = var->xres_virtual * 4; - break; - - default: /* in theory this should never happen */ - printk(KERN_WARNING "%s: don't support for %dbpp\n", - cfb->fb.fix.id, var->bits_per_pixel); - break; - } - - cfb->fb.var = *var; - cfb->fb.var.activate &= ~FB_ACTIVATE_ALL; - - /* - * Update the old var. The fbcon drivers still use this. - * Once they are using cfb->fb.var, this can be dropped. - * --rmk - */ - //display->var = cfb->fb.var; - /* - * If we are setting all the virtual consoles, also set the - * defaults used to create new consoles. - */ - fb_set_cmap(&cfb->fb.cmap, &cfb->fb); - dprintk("jzfb_set_var: after fb_set_cmap...\n"); - - return 0; -} - -static struct lcd_cfb_info * jzfb_alloc_fb_info(void) -{ - struct lcd_cfb_info *cfb; - - cfb = kmalloc(sizeof(struct lcd_cfb_info) + sizeof(u32) * 16, GFP_KERNEL); - - if (!cfb) - return NULL; - - jzlcd_info = cfb; - - memset(cfb, 0, sizeof(struct lcd_cfb_info) ); - - cfb->currcon = -1; - - - strcpy(cfb->fb.fix.id, "jz-lcd"); - cfb->fb.fix.type = FB_TYPE_PACKED_PIXELS; - cfb->fb.fix.type_aux = 0; - cfb->fb.fix.xpanstep = 1; - cfb->fb.fix.ypanstep = 1; - cfb->fb.fix.ywrapstep = 0; - cfb->fb.fix.accel = FB_ACCEL_NONE; - - cfb->fb.var.nonstd = 0; - cfb->fb.var.activate = FB_ACTIVATE_NOW; - cfb->fb.var.height = -1; - cfb->fb.var.width = -1; - cfb->fb.var.accel_flags = FB_ACCELF_TEXT; - - cfb->fb.fbops = &jzfb_ops; - cfb->fb.flags = FBINFO_FLAG_DEFAULT; - - cfb->fb.pseudo_palette = (void *)(cfb + 1); - - switch (jzfb.bpp) { - case 1: - fb_alloc_cmap(&cfb->fb.cmap, 4, 0); - break; - case 2: - fb_alloc_cmap(&cfb->fb.cmap, 8, 0); - break; - case 4: - fb_alloc_cmap(&cfb->fb.cmap, 32, 0); - break; - case 8: - - default: - fb_alloc_cmap(&cfb->fb.cmap, 256, 0); - break; - } - dprintk("fb_alloc_cmap,fb.cmap.len:%d....\n", cfb->fb.cmap.len); - - return cfb; -} - -/* - * Map screen memory - */ -static int jzfb_map_smem(struct lcd_cfb_info *cfb) -{ - struct page * map = NULL; - unsigned char *tmp; - unsigned int page_shift, needroom, t; -#if defined(CONFIG_SOC_JZ4740) - if (jzfb.bpp == 18 || jzfb.bpp == 24) - t = 32; - else - t = jzfb.bpp; -#else - if (jzfb.bpp == 15) - t = 16; - else - t = jzfb.bpp; -#endif - - needroom = ((jzfb.w * t + 7) >> 3) * jzfb.h; - for (page_shift = 0; page_shift < 12; page_shift++) - if ((PAGE_SIZE << page_shift) >= needroom) - break; - - /* lcd_palette room total 4KB: - * 0 -- 512: lcd palette - * 1024 -- [1024+16*3]: lcd descripters - * [1024+16*3] -- 4096: reserved - */ - lcd_palette = (unsigned char *)__get_free_pages(GFP_KERNEL, 0); - if ((!lcd_palette)) - return -ENOMEM; - - memset((void *)lcd_palette, 0, PAGE_SIZE); - map = virt_to_page(lcd_palette); - set_bit(PG_reserved, &map->flags); - lcd_desc_base = (struct lcd_desc *)(lcd_palette + 1024); - - jz_lcd_buffer_addrs.fb_num = CONFIG_JZLCD_FRAMEBUFFER_MAX; - printk("jzlcd use %d framebuffer:\n", CONFIG_JZLCD_FRAMEBUFFER_MAX); - /* alloc frame buffer space */ - for ( t = 0; t < CONFIG_JZLCD_FRAMEBUFFER_MAX; t++ ) { - lcd_frame[t] = (unsigned char *)__get_free_pages(GFP_KERNEL, page_shift); - if ((!lcd_frame[t])) { - printk("no mem for fb[%d]\n", t); - return -ENOMEM; - } -// memset((void *)lcd_frame[t], 0, PAGE_SIZE << page_shift); - for (tmp=(unsigned char *)lcd_frame[t]; - tmp < lcd_frame[t] + (PAGE_SIZE << page_shift); - tmp += PAGE_SIZE) { - map = virt_to_page(tmp); - set_bit(PG_reserved, &map->flags); - } - jz_lcd_buffer_addrs.fb_phys_addr[t] = virt_to_phys((void *)lcd_frame[t]); - printk("jzlcd fb[%d] phys addr =0x%08x\n", - t, jz_lcd_buffer_addrs.fb_phys_addr[t]); - } -#if !defined(CONFIG_JZLCD_FRAMEBUFFER_ROTATE_SUPPORT) - cfb->fb.fix.smem_start = virt_to_phys((void *)lcd_frame[0]); - cfb->fb.fix.smem_len = (PAGE_SIZE << page_shift); - cfb->fb.screen_base = - (unsigned char *)(((unsigned int)lcd_frame[0] & 0x1fffffff) | 0xa0000000); -#else /* Framebuffer rotate */ - lcd_frame_user_fb = (unsigned char *)__get_free_pages(GFP_KERNEL, page_shift); - if ((!lcd_frame_user_fb)) { - printk("no mem for fb[%d]\n", t); - return -ENOMEM; - } - memset((void *)lcd_frame_user_fb, 0, PAGE_SIZE << page_shift); - for (tmp=(unsigned char *)lcd_frame_user_fb; - tmp < lcd_frame_user_fb + (PAGE_SIZE << page_shift); - tmp += PAGE_SIZE) { - map = virt_to_page(tmp); - set_bit(PG_reserved, &map->flags); - } - - printk("Rotate userfb phys addr =0x%08x\n", - (unsigned int)virt_to_phys((void *)lcd_frame_user_fb)); - cfb->fb.fix.smem_start = virt_to_phys((void *)lcd_frame_user_fb); - cfb->fb.fix.smem_len = (PAGE_SIZE << page_shift); - cfb->fb.screen_base = (unsigned char *)(((unsigned int)lcd_frame_user_fb & 0x1fffffff) | 0xa0000000); - -#endif /* #if defined(CONFIG_JZLCD_FRAMEBUFFER_ROTATE_SUPPORT) */ - if (!cfb->fb.screen_base) { - printk("%s: unable to map screen memory\n", cfb->fb.fix.id); - return -ENOMEM; - } - - return 0; -} - -static void jzfb_free_fb_info(struct lcd_cfb_info *cfb) -{ - if (cfb) { - fb_alloc_cmap(&cfb->fb.cmap, 0, 0); - kfree(cfb); - } -} - -static void jzfb_unmap_smem(struct lcd_cfb_info *cfb) -{ - struct page * map = NULL; - unsigned char *tmp; - unsigned int page_shift, needroom, t; -#if defined(CONFIG_SOC_JZ4740) - if (jzfb.bpp == 18 || jzfb.bpp == 24) - t = 32; - else - t = jzfb.bpp; -#else - if (jzfb.bpp == 15) - t = 16; - else - t = jzfb.bpp; -#endif - needroom = ((jzfb.w * t + 7) >> 3) * jzfb.h; - for (page_shift = 0; page_shift < 12; page_shift++) - if ((PAGE_SIZE << page_shift) >= needroom) - break; - - if (cfb && cfb->fb.screen_base) { - iounmap(cfb->fb.screen_base); - cfb->fb.screen_base = NULL; - release_mem_region(cfb->fb.fix.smem_start, - cfb->fb.fix.smem_len); - } - - if (lcd_palette) { - map = virt_to_page(lcd_palette); - clear_bit(PG_reserved, &map->flags); - free_pages((int)lcd_palette, 0); - } - - for ( t=0; t < CONFIG_JZLCD_FRAMEBUFFER_MAX; t++ ) { - if (lcd_frame[t]) { - for (tmp=(unsigned char *)lcd_frame[t]; - tmp < lcd_frame[t] + (PAGE_SIZE << page_shift); - tmp += PAGE_SIZE) { - map = virt_to_page(tmp); - clear_bit(PG_reserved, &map->flags); - } - free_pages((int)lcd_frame[t], page_shift); - } - } -#if defined(CONFIG_JZLCD_FRAMEBUFFER_ROTATE_SUPPORT) - if (lcd_frame_user_fb) { - for (tmp=(unsigned char *)lcd_frame_user_fb; - tmp < lcd_frame_user_fb + (PAGE_SIZE << page_shift); - tmp += PAGE_SIZE) { - map = virt_to_page(tmp); - clear_bit(PG_reserved, &map->flags); - } - free_pages((int)lcd_frame_user_fb, page_shift); - } - -#endif -} - -static void lcd_descriptor_init(void) -{ - int i; - unsigned int pal_size; - unsigned int frm_size, ln_size; - unsigned char dual_panel = 0; - - i = jzfb.bpp; -#if defined(CONFIG_SOC_JZ4740) - if (i == 18 || i == 24) - i = 32; -#else - if (i == 15) - i = 16; -#endif - frm_size = (jzfb.w*jzfb.h*i)>>3; - ln_size = (jzfb.w*i)>>3; - - if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) || - ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL)) { - dual_panel = 1; - frm_size >>= 1; - } - - frm_size = frm_size / 4; - ln_size = ln_size / 4; - - switch (jzfb.bpp) { - case 1: - pal_size = 4; - break; - case 2: - pal_size = 8; - break; - case 4: - pal_size = 32; - break; - case 8: - default: - pal_size = 512; - } - - pal_size /= 4; - - lcd_frame_desc0 = lcd_desc_base + 0; - lcd_frame_desc1 = lcd_desc_base + 1; - lcd_palette_desc = lcd_desc_base + 2; - - jz_lcd_buffer_addrs.lcd_desc_phys_addr = (unsigned int)virt_to_phys(lcd_frame_desc0); - - /* Palette Descriptor */ - lcd_palette_desc->next_desc = (int)virt_to_phys(lcd_frame_desc0); - lcd_palette_desc->databuf = (int)virt_to_phys((void *)lcd_palette); - lcd_palette_desc->frame_id = (unsigned int)0xdeadbeaf; - lcd_palette_desc->cmd = pal_size|LCD_CMD_PAL; /* Palette Descriptor */ - - /* Frame Descriptor 0 */ - if (jzfb.bpp <= 8) - lcd_frame_desc0->next_desc = (int)virt_to_phys(lcd_palette_desc); - else - lcd_frame_desc0->next_desc = (int)virt_to_phys(lcd_frame_desc0); - lcd_frame_desc0->databuf = virt_to_phys((void *)lcd_frame[0]); - lcd_frame_desc0->frame_id = (unsigned int)0xbeafbeaf; - lcd_frame_desc0->cmd = LCD_CMD_SOFINT | LCD_CMD_EOFINT | frm_size; - dma_cache_wback_inv((unsigned int)(lcd_palette_desc),0x10); - dma_cache_wback_inv((unsigned int)(lcd_frame_desc0),0x10); - - if (!(dual_panel)) - return; - - /* Frame Descriptor 1 */ - lcd_frame_desc1->next_desc = (int)virt_to_phys(lcd_frame_desc1); - lcd_frame_desc1->databuf = virt_to_phys((void *)(lcd_frame[0] + frm_size * 4)); - lcd_frame_desc1->frame_id = (unsigned int)0xdeaddead; - lcd_frame_desc1->cmd = LCD_CMD_SOFINT | LCD_CMD_EOFINT | frm_size; - dma_cache_wback_inv((unsigned int)(lcd_frame_desc1),0x10); -} - -static int lcd_hw_init(void) -{ - unsigned int val = 0; - unsigned int pclk; - unsigned int stnH; - int ret = 0; - - /* Setting Control register */ - switch (jzfb.bpp) { - case 1: - val |= LCD_CTRL_BPP_1; - break; - case 2: - val |= LCD_CTRL_BPP_2; - break; - case 4: - val |= LCD_CTRL_BPP_4; - break; - case 8: - val |= LCD_CTRL_BPP_8; - break; - case 15: - val |= LCD_CTRL_RGB555; - case 16: - val |= LCD_CTRL_BPP_16; - break; -#if defined(CONFIG_SOC_JZ4740) - case 17 ... 32: - val |= LCD_CTRL_BPP_18_24; /* target is 4bytes/pixel */ - break; -#endif - default: - printk("The BPP %d is not supported\n", jzfb.bpp); - val |= LCD_CTRL_BPP_16; - break; - } - - switch (jzfb.cfg & MODE_MASK) { - case MODE_STN_MONO_DUAL: - case MODE_STN_COLOR_DUAL: - case MODE_STN_MONO_SINGLE: - case MODE_STN_COLOR_SINGLE: - switch (jzfb.bpp) { - case 1: - case 2: - val |= LCD_CTRL_FRC_2; - break; - case 4: - val |= LCD_CTRL_FRC_4; - break; - case 8: - default: - val |= LCD_CTRL_FRC_16; - break; - } - break; - } - - val |= LCD_CTRL_BST_16; /* Burst Length is 16WORD=64Byte */ - - switch (jzfb.cfg & MODE_MASK) { - case MODE_STN_MONO_DUAL: - case MODE_STN_COLOR_DUAL: - case MODE_STN_MONO_SINGLE: - case MODE_STN_COLOR_SINGLE: - switch (jzfb.cfg & STN_DAT_PINMASK) { -#define align2(n) (n)=((((n)+1)>>1)<<1) -#define align4(n) (n)=((((n)+3)>>2)<<2) -#define align8(n) (n)=((((n)+7)>>3)<<3) - case STN_DAT_PIN1: - /* Do not adjust the hori-param value. */ - break; - case STN_DAT_PIN2: - align2(jzfb.hsw); - align2(jzfb.elw); - align2(jzfb.blw); - break; - case STN_DAT_PIN4: - align4(jzfb.hsw); - align4(jzfb.elw); - align4(jzfb.blw); - break; - case STN_DAT_PIN8: - align8(jzfb.hsw); - align8(jzfb.elw); - align8(jzfb.blw); - break; - } - break; - } - - val |= 1 << 26; /* Output FIFO underrun protection */ - REG_LCD_CTRL = val; - - switch (jzfb.cfg & MODE_MASK) { - case MODE_STN_MONO_DUAL: - case MODE_STN_COLOR_DUAL: - case MODE_STN_MONO_SINGLE: - case MODE_STN_COLOR_SINGLE: - if (((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL) || - ((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL)) - stnH = jzfb.h >> 1; - else - stnH = jzfb.h; - - REG_LCD_VSYNC = (0 << 16) | jzfb.vsw; - REG_LCD_HSYNC = ((jzfb.blw+jzfb.w) << 16) | (jzfb.blw+jzfb.w+jzfb.hsw); - - /* Screen setting */ - REG_LCD_VAT = ((jzfb.blw + jzfb.w + jzfb.hsw + jzfb.elw) << 16) | (stnH + jzfb.vsw + jzfb.bfw + jzfb.efw); - REG_LCD_DAH = (jzfb.blw << 16) | (jzfb.blw + jzfb.w); - REG_LCD_DAV = (0 << 16) | (stnH); - - /* AC BIAs signal */ - REG_LCD_PS = (0 << 16) | (stnH+jzfb.vsw+jzfb.efw+jzfb.bfw); - - break; - - case MODE_TFT_GEN: - case MODE_TFT_SHARP: - case MODE_TFT_CASIO: - case MODE_TFT_SAMSUNG: - case MODE_8BIT_SERIAL_TFT: - case MODE_TFT_18BIT: - REG_LCD_VSYNC = (0 << 16) | jzfb.vsw; -#if defined(CONFIG_JZLCD_INNOLUX_AT080TN42) - REG_LCD_DAV = (0 << 16) | ( jzfb.h ); -#else - REG_LCD_DAV = ((jzfb.vsw + jzfb.bfw) << 16) | (jzfb.vsw + jzfb.bfw + jzfb.h); -#endif /*#if defined(CONFIG_JZLCD_INNOLUX_AT080TN42)*/ - REG_LCD_VAT = (((jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw)) << 16) | (jzfb.vsw + jzfb.bfw + jzfb.h + jzfb.efw); - REG_LCD_HSYNC = (0 << 16) | jzfb.hsw; - REG_LCD_DAH = ((jzfb.hsw + jzfb.blw) << 16) | (jzfb.hsw + jzfb.blw + jzfb.w); - break; - } - - switch (jzfb.cfg & MODE_MASK) { - case MODE_TFT_SAMSUNG: - { - unsigned int total, tp_s, tp_e, ckv_s, ckv_e; - unsigned int rev_s, rev_e, inv_s, inv_e; - total = jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw; - tp_s = jzfb.blw + jzfb.w + 1; - tp_e = tp_s + 1; - ckv_s = tp_s - jz_clocks.pixclk/(1000000000/4100); - ckv_e = tp_s + total; - rev_s = tp_s - 11; /* -11.5 clk */ - rev_e = rev_s + total; - inv_s = tp_s; - inv_e = inv_s + total; - REG_LCD_CLS = (tp_s << 16) | tp_e; - REG_LCD_PS = (ckv_s << 16) | ckv_e; - REG_LCD_SPL = (rev_s << 16) | rev_e; - REG_LCD_REV = (inv_s << 16) | inv_e; - jzfb.cfg |= STFT_REVHI | STFT_SPLHI; - break; - } - case MODE_TFT_SHARP: - { - unsigned int total, cls_s, cls_e, ps_s, ps_e; - unsigned int spl_s, spl_e, rev_s, rev_e; - total = jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw; -#if !defined(CONFIG_JZLCD_INNOLUX_AT080TN42) - spl_s = 1; - spl_e = spl_s + 1; - cls_s = 0; - cls_e = total - 60; /* > 4us (pclk = 80ns) */ - ps_s = cls_s; - ps_e = cls_e; - rev_s = total - 40; /* > 3us (pclk = 80ns) */ - rev_e = rev_s + total; - jzfb.cfg |= STFT_PSHI; -#else /*#if defined(CONFIG_JZLCD_INNOLUX_AT080TN42)*/ - spl_s = total - 5; /* LD */ - spl_e = total - 3; - cls_s = 32; /* CKV */ - cls_e = 145; - ps_s = 0; /* OEV */ - ps_e = 45; - rev_s = 0; /* POL */ - rev_e = 0; -#endif /*#if defined(CONFIG_JZLCD_INNOLUX_AT080TN42)*/ - REG_LCD_SPL = (spl_s << 16) | spl_e; - REG_LCD_CLS = (cls_s << 16) | cls_e; - REG_LCD_PS = (ps_s << 16) | ps_e; - REG_LCD_REV = (rev_s << 16) | rev_e; - break; - } - case MODE_TFT_CASIO: - break; - } - - /* Configure the LCD panel */ - REG_LCD_CFG = jzfb.cfg; - - /* Timing setting */ - __cpm_stop_lcd(); - - val = jzfb.fclk; /* frame clk */ - - if ( (jzfb.cfg & MODE_MASK) != MODE_8BIT_SERIAL_TFT) { - pclk = val * (jzfb.w + jzfb.hsw + jzfb.elw + jzfb.blw) * - (jzfb.h + jzfb.vsw + jzfb.efw + jzfb.bfw); /* Pixclk */ - } - else { - /* serial mode: Hsync period = 3*Width_Pixel */ - pclk = val * (jzfb.w*3 + jzfb.hsw + jzfb.elw + jzfb.blw) * - (jzfb.h + jzfb.vsw + jzfb.efw + jzfb.bfw); /* Pixclk */ - } - - if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_SINGLE) || - ((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL)) - pclk = (pclk * 3); - - if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_SINGLE) || - ((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) || - ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_SINGLE) || - ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL)) - pclk = pclk >> ((jzfb.cfg & STN_DAT_PINMASK) >> 4); - - if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) || - ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL)) - pclk >>= 1; -#if defined(CONFIG_SOC_JZ4730) - val = __cpm_get_pllout() / pclk; - REG_CPM_CFCR2 = val - 1; - val = __cpm_get_pllout() / (pclk * 4); - val = __cpm_divisor_encode(val); - __cpm_set_lcdclk_div(val); - REG_CPM_CFCR |= CPM_CFCR_UPE; -#elif defined(CONFIG_SOC_JZ4740) - val = ( __cpm_get_pllout2()) / pclk; - val--; - if ( val > 0x3ff ) { - printk("pixel clock divid is too large, set it to 0x3ff\n"); - val = 0x3ff; - } - __cpm_set_pixdiv(val); - - val = pclk * 3 ; /* LCDClock > 2.5*Pixclock */ - val =__cpm_get_pllout() / val; - if ( val > 0x1f ) { - printk("lcd clock divide is too large, set it to 0x1f\n"); - val = 0x1f; - } - __cpm_set_ldiv( val ); - REG_CPM_CPCCR |= CPM_CPCCR_CE ; /* update divide */ - -#else - printk("drivers/video/Jzlcd.c, CONFIG_MIPS, please set chip type.\n"); -#endif /*#ifdef CONFIG_MIPS_JZ4730 */ - - jz_clocks.pixclk = __cpm_get_pixclk(); - jz_clocks.lcdclk = __cpm_get_lcdclk(); - printk("LCDC: PixClock:%d LcdClock:%d\n", - jz_clocks.pixclk, jz_clocks.lcdclk); - - __cpm_start_lcd(); - udelay(1000); - return ret; -} - -static irqreturn_t lcd_interrupt_handler(int irq, void *dev_id) -{ - unsigned int state; - - state = REG_LCD_STATE; - - if (state & LCD_STATE_EOF) /* End of frame */ - REG_LCD_STATE = state & ~LCD_STATE_EOF; - - if (state & LCD_STATE_IFU0) { - dprintk("InFiFo0 underrun\n"); - REG_LCD_STATE = state & ~LCD_STATE_IFU0; - } - - if (state & LCD_STATE_OFU) { /* Out fifo underrun */ - REG_LCD_STATE = state & ~LCD_STATE_OFU; - dprintk("Out FiFo underrun.\n"); - } - return IRQ_HANDLED; -} - -#ifdef CONFIG_PM - -/* - * Suspend the LCDC. - */ -static int jzfb_suspend(struct platform_device *pdev, pm_message_t state) -{ - __lcd_clr_ena(); /* Quick Disable */ - __lcd_display_off(); - __cpm_stop_lcd(); - - return 0; -} - -/* - * Resume the LCDC. - */ -#ifdef CONFIG_SOC_JZ4730 -static int jzfb_resume(struct platform_device *pdev, pm_message_t state) -{ - __cpm_start_lcd(); - - __lcd_display_pin_init(); - - __lcd_display_on(); - - lcd_hw_init(); - - if (jzfb.bpp <= 8) - REG_LCD_DA0 = virt_to_phys(lcd_palette_desc); - else - REG_LCD_DA0 = virt_to_phys(lcd_frame_desc0); - - if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) || - ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL)) - REG_LCD_DA1 = virt_to_phys(lcd_frame_desc1); - - __lcd_set_ena(); - return 0; -} - -#else -/* - * Resume the LCDC. - */ -static int jzfb_resume(struct platform_device *pdev, pm_message_t state) -{ - __cpm_start_lcd(); - __gpio_set_pin(GPIO_DISP_OFF_N); - __lcd_special_on(); - __lcd_set_ena(); - mdelay(200); - __lcd_set_backlight_level(80); - - return 0; -} -#endif /* CONFIG_MIPS_JZ4730 */ -#else /* CONFIG_PM */ -#define jzfb_suspend NULL -#define jzfb_resume NULL -#endif /* CONFIG_PM */ - -static int __init jzfb_probe(struct platform_device *pdev) -{ - struct lcd_cfb_info *cfb; - int err = 0; - - /* In special mode, we only need init special pin, - * as general lcd pin has init in uboot */ -#if defined(CONFIG_SOC_JZ4740) || defined(CONFIG_SOC_JZ4750) - switch (jzfb.cfg & MODE_MASK) { - case LCD_CFG_MODE_SPECIAL_TFT_1: - case LCD_CFG_MODE_SPECIAL_TFT_2: - case LCD_CFG_MODE_SPECIAL_TFT_3: - __gpio_as_lcd_special(); - break; - default: - ; - } -#endif - __lcd_display_pin_init(); - - cfb = jzfb_alloc_fb_info(); - if (!cfb) - goto failed; - - err = jzfb_map_smem(cfb); - if (err) - goto failed; - - jzfb_set_var(&cfb->fb.var, -1, &cfb->fb); - - lcd_descriptor_init(); - - err = lcd_hw_init(); - if (err) - goto failed; - - if (jzfb.bpp <= 8) - REG_LCD_DA0 = virt_to_phys(lcd_palette_desc); - else - REG_LCD_DA0 = virt_to_phys(lcd_frame_desc0); - - if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) || - ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL)) - REG_LCD_DA1 = virt_to_phys(lcd_frame_desc1); - - __lcd_set_ena(); - - if (request_irq(IRQ_LCD, lcd_interrupt_handler, IRQF_DISABLED, - "lcd", 0)) { - err = -EBUSY; - goto failed; - } - - __lcd_enable_ofu_intr(); /* enable OutFifo underrun */ -// __lcd_enable_ifu0_intr(); /* needn't enable InFifo underrun */ - -#if defined(CONFIG_JZLCD_FRAMEBUFFER_ROTATE_SUPPORT) - jzfb_rotate_change(rotate_angle); - /* sleep n??? */ -#endif - err = register_framebuffer(&cfb->fb); - if (err < 0) { - dprintk("jzfb_init(): register framebuffer err.\n"); - goto failed; - } - - printk("fb%d: %s frame buffer device, using %dK of video memory\n", - cfb->fb.node, cfb->fb.fix.id, cfb->fb.fix.smem_len>>10); - - __lcd_display_on(); - - return 0; - -failed: - jzfb_unmap_smem(cfb); - jzfb_free_fb_info(cfb); - - return err; -} - -static int jzfb_remove(struct device *dev) -{ - struct lcd_cfb_info *cfb = dev_get_drvdata(dev); - jzfb_unmap_smem(cfb); - jzfb_free_fb_info(cfb); - return 0; -} - -static struct platform_driver jz_lcd_driver = { - .probe = jzfb_probe, - .remove = jzfb_remove, -#ifdef CONFIG_PM - .suspend = jzfb_suspend, - .resume = jzfb_resume, -#endif - .driver = { - .name = DRIVER_NAME, - }, -}; - -static int __init jzfb_init(void) -{ - return platform_driver_register(&jz_lcd_driver); -} - -static void __exit jzfb_cleanup(void) -{ -#if defined(CONFIG_JZLCD_FRAMEBUFFER_ROTATE_SUPPORT) - kthread_stop(jzlcd_info->rotate_daemon_thread); -#endif - platform_driver_unregister(&jz_lcd_driver); -} - -module_init(jzfb_init); -module_exit(jzfb_cleanup); - -MODULE_DESCRIPTION("JzSOC LCD Controller driver"); -MODULE_LICENSE("GPL"); diff --git a/target/linux/xburst/files-2.6.31/drivers/video/jzlcd.h b/target/linux/xburst/files-2.6.31/drivers/video/jzlcd.h deleted file mode 100755 index 8a3d855e0..000000000 --- a/target/linux/xburst/files-2.6.31/drivers/video/jzlcd.h +++ /dev/null @@ -1,790 +0,0 @@ -/* - * linux/drivers/video/jzlcd.h -- Ingenic On-Chip LCD frame buffer device - * - * Copyright (C) 2005-2007, Ingenic Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ -#ifndef __JZLCD_H__ -#define __JZLCD_H__ - -#include - -#define NR_PALETTE 256 - -struct lcd_desc{ - unsigned int next_desc; /* LCDDAx */ - unsigned int databuf; /* LCDSAx */ - unsigned int frame_id; /* LCDFIDx */ - unsigned int cmd; /* LCDCMDx */ -}; - -#define MODE_MASK 0x0f -#define MODE_TFT_GEN 0x00 -#define MODE_TFT_SHARP 0x01 -#define MODE_TFT_CASIO 0x02 -#define MODE_TFT_SAMSUNG 0x03 -#define MODE_CCIR656_NONINT 0x04 -#define MODE_CCIR656_INT 0x05 -#define MODE_STN_COLOR_SINGLE 0x08 -#define MODE_STN_MONO_SINGLE 0x09 -#define MODE_STN_COLOR_DUAL 0x0a -#define MODE_STN_MONO_DUAL 0x0b -#define MODE_8BIT_SERIAL_TFT 0x0c - -#define MODE_TFT_18BIT (1<<7) - -#define STN_DAT_PIN1 (0x00 << 4) -#define STN_DAT_PIN2 (0x01 << 4) -#define STN_DAT_PIN4 (0x02 << 4) -#define STN_DAT_PIN8 (0x03 << 4) -#define STN_DAT_PINMASK STN_DAT_PIN8 - -#define STFT_PSHI (1 << 15) -#define STFT_CLSHI (1 << 14) -#define STFT_SPLHI (1 << 13) -#define STFT_REVHI (1 << 12) - -#define SYNC_MASTER (0 << 16) -#define SYNC_SLAVE (1 << 16) - -#define DE_P (0 << 9) -#define DE_N (1 << 9) - -#define PCLK_P (0 << 10) -#define PCLK_N (1 << 10) - -#define HSYNC_P (0 << 11) -#define HSYNC_N (1 << 11) - -#define VSYNC_P (0 << 8) -#define VSYNC_N (1 << 8) - -#define DATA_NORMAL (0 << 17) -#define DATA_INVERSE (1 << 17) - - -/* Jz LCDFB supported I/O controls. */ -#define FBIOSETBACKLIGHT 0x4688 -#define FBIODISPON 0x4689 -#define FBIODISPOFF 0x468a -#define FBIORESET 0x468b -#define FBIOPRINT_REGS 0x468c -#define FBIOGETBUFADDRS 0x468d -#define FBIOROTATE 0x46a0 /* rotated fb */ - -struct jz_lcd_buffer_addrs_t { - int fb_num; - unsigned int lcd_desc_phys_addr; - unsigned int fb_phys_addr[CONFIG_JZLCD_FRAMEBUFFER_MAX]; -}; - - -/* - * LCD panel specific definition - */ -#if defined(CONFIG_JZLCD_TRULY_TFTG320240DTSW) - -#if defined(CONFIG_JZ4730_PMP) -#define LCD_RESET_PIN 63 -#endif - -#define __lcd_special_on() \ -do { \ - __gpio_set_pin(LCD_RESET_PIN); \ - __gpio_as_output(LCD_RESET_PIN); \ - __gpio_clear_pin(LCD_RESET_PIN); \ - udelay(100); \ - __gpio_set_pin(LCD_RESET_PIN); \ -} while (0) - -#endif /* CONFIG_JZLCD_TRULY_TFTG320240DTSW */ - -#if defined(CONFIG_JZLCD_SAMSUNG_LTV350QVF04) - -#if defined(CONFIG_JZ4730_FPRINT) -#define PortSDI 60 -#define PortSCL 61 -#define PortCS 62 -#define PortRST 63 -#define PortSht 64 -#endif - -#if defined(CONFIG_JZ4730_GPS) -#define PortSDI 74 -#define PortSCL 72 -#define PortCS 73 -#define PortRST 60 -#define PortSht 59 -#endif - -#ifndef PortSDI -#define PortSDI 0 -#endif -#ifndef PortSCL -#define PortSCL 0 -#endif -#ifndef PortCS -#define PortCS 0 -#endif -#ifndef PortRST -#define PortRST 0 -#endif -#ifndef PortSht -#define PortSht 0 -#endif - -#define __lcd_special_pin_init() \ -do { \ - __gpio_as_output(PortSDI); /* SDI */\ - __gpio_as_output(PortSCL); /* SCL */ \ - __gpio_as_output(PortCS); /* CS */ \ - __gpio_as_output(PortRST); /* Reset */ \ - __gpio_as_output(PortSht); /* Shut Down # */ \ - __gpio_set_pin(PortCS); \ - __gpio_set_pin(PortSCL); \ - __gpio_set_pin(PortSDI); \ -} while (0) - -#define __spi_out(val) \ -do { \ - int __i__; \ - unsigned int _t_ = (val); \ - __gpio_clear_pin(PortCS); \ - udelay(25); \ - for (__i__ = 0; __i__ < 24; __i__++ ) { \ - __gpio_clear_pin(PortSCL); \ - if (_t_ & 0x800000) \ - __gpio_set_pin(PortSDI); \ - else \ - __gpio_clear_pin(PortSDI); \ - _t_ <<= 1; \ - udelay(25); \ - __gpio_set_pin(PortSCL); \ - udelay(25); \ - } \ - __gpio_set_pin(PortCS); \ - udelay(25); \ - __gpio_set_pin(PortSDI); \ - udelay(25); \ - __gpio_set_pin(PortSCL); \ -} while (0) - -#define __spi_id_op_data(rs, rw, val) \ - __spi_out((0x1d<<18)|((rs)<<17)|((rw)<<16)|(val)) - -#define __spi_write_reg(reg, val) \ -do { \ - __spi_id_op_data(0, 0, (reg)); \ - __spi_id_op_data(1, 0, (val)); \ -} while (0) - -#define __lcd_special_on() \ -do { \ - __gpio_set_pin(PortSht); \ - __gpio_clear_pin(PortRST); \ - mdelay(10); \ - __gpio_set_pin(PortRST); \ - mdelay(1); \ - __spi_write_reg(0x09, 0); \ - mdelay(10); \ - __spi_write_reg(0x09, 0x4000); \ - __spi_write_reg(0x0a, 0x2000); \ - mdelay(40); \ - __spi_write_reg(0x09, 0x4055); \ - mdelay(50); \ - __spi_write_reg(0x01, 0x409d); \ - __spi_write_reg(0x02, 0x0204); \ - __spi_write_reg(0x03, 0x0100); \ - __spi_write_reg(0x04, 0x3000); \ - __spi_write_reg(0x05, 0x4003); \ - __spi_write_reg(0x06, 0x000a); \ - __spi_write_reg(0x07, 0x0021); \ - __spi_write_reg(0x08, 0x0c00); \ - __spi_write_reg(0x10, 0x0103); \ - __spi_write_reg(0x11, 0x0301); \ - __spi_write_reg(0x12, 0x1f0f); \ - __spi_write_reg(0x13, 0x1f0f); \ - __spi_write_reg(0x14, 0x0707); \ - __spi_write_reg(0x15, 0x0307); \ - __spi_write_reg(0x16, 0x0707); \ - __spi_write_reg(0x17, 0x0000); \ - __spi_write_reg(0x18, 0x0004); \ - __spi_write_reg(0x19, 0x0000); \ - mdelay(60); \ - __spi_write_reg(0x09, 0x4a55); \ - __spi_write_reg(0x05, 0x5003); \ -} while (0) - -#define __lcd_special_off() \ -do { \ - __spi_write_reg(0x09, 0x4055); \ - __spi_write_reg(0x05, 0x4003); \ - __spi_write_reg(0x0a, 0x0000); \ - mdelay(10); \ - __spi_write_reg(0x09, 0x4000); \ - __gpio_clear_pin(PortSht); \ -} while (0) - -#endif /* CONFIG_JZLCD_SAMSUNG_LTV350QVF04 */ - -#if defined(CONFIG_JZLCD_AUO_A030FL01_V1) -#if defined(CONFIG_JZ4740_PAVO) /* board pavo */ - #define SPEN (32*1+18) /*LCD_CS*/ - #define SPCK (32*1+17) /*LCD_SCL*/ - #define SPDA (32*2+12) /*LCD_SDA*/ - #define LCD_RET (32*2+23) /*use for lcd reset*/ -#elif defined(CONFIG_JZ4740_LYRA) /* board lyra */ - #define SPEN (32*3+19) //LCD_CS - #define SPCK (32*3+18) //LCD_SCL - #define SPDA (32*3+20) //LCD_SDA - #define LCD_RET (32*3+31) //use for lcd reset -#else -#error "driver/video/Jzlcd.h, please define SPI pins on your board." -#endif - -#define __spi_write_reg(reg, val) \ - do { \ - unsigned char no; \ - unsigned short value; \ - unsigned char a=0; \ - unsigned char b=0; \ - __gpio_as_output(SPEN); /* use SPDA */ \ - __gpio_as_output(SPCK); /* use SPCK */ \ - __gpio_as_output(SPDA); /* use SPDA */ \ - a=reg; \ - b=val; \ - __gpio_set_pin(SPEN); \ - __gpio_clear_pin(SPCK); \ - udelay(50); \ - __gpio_clear_pin(SPDA); \ - __gpio_clear_pin(SPEN); \ - udelay(50); \ - value=((a<<8)|(b&0xFF)); \ - for(no=0;no<16;no++) \ - { \ - if((value&0x8000)==0x8000){ \ - __gpio_set_pin(SPDA);} \ - else{ \ - __gpio_clear_pin(SPDA); } \ - udelay(400); \ - __gpio_set_pin(SPCK); \ - value=(value<<1); \ - udelay(50); \ - __gpio_clear_pin(SPCK); \ - } \ - __gpio_set_pin(SPEN); \ - udelay(400); \ - } while (0) -#define __spi_read_reg(reg,val) \ - do{ \ - unsigned char no; \ - unsigned short value; \ - __gpio_as_output(SPEN); /* use SPDA */ \ - __gpio_as_output(SPCK); /* use SPCK */ \ - __gpio_as_output(SPDA); /* use SPDA */ \ - value = ((reg << 0) | (1 << 7)); \ - val = 0; \ - __gpio_as_output(SPDA); \ - __gpio_set_pin(SPEN); \ - __gpio_set_pin(SPCK); \ - udelay(1); \ - __gpio_clear_pin(SPDA); \ - __gpio_clear_pin(SPEN); \ - udelay(1); \ - for (no = 0; no < 16; no++ ) { \ - __gpio_clear_pin(SPCK); \ - udelay(1); \ - if(no < 8) \ - { \ - if (value & 0x80) /* send data */ \ - __gpio_set_pin(SPDA); \ - else \ - __gpio_clear_pin(SPDA); \ - value = (value << 1); \ - udelay(1); \ - __gpio_set_pin(SPCK); \ - udelay(1); \ - } \ - else \ - { \ - __gpio_as_input(SPDA); \ - udelay(1); \ - __gpio_set_pin(SPCK); \ - udelay(1); \ - val = (val << 1); \ - val |= __gpio_get_pin(SPDA); \ - udelay(1); \ - } \ - udelay(400); \ - } \ - __gpio_as_output(SPDA); \ - __gpio_set_pin(SPEN); \ - udelay(400); \ - } while(0) - -#define __lcd_special_pin_init() \ - do { \ - __gpio_as_output(SPEN); /* use SPDA */ \ - __gpio_as_output(SPCK); /* use SPCK */ \ - __gpio_as_output(SPDA); /* use SPDA */ \ - __gpio_as_output(LCD_RET); \ - udelay(50); \ - __gpio_clear_pin(LCD_RET); \ - udelay(100); \ - __gpio_set_pin(LCD_RET); \ - } while (0) -#define __lcd_special_on() \ - do { \ - udelay(50); \ - __gpio_clear_pin(LCD_RET); \ - udelay(100); \ - __gpio_set_pin(LCD_RET); \ - __spi_write_reg(0x0D, 0x44); \ - __spi_write_reg(0x0D, 0x4D); \ - __spi_write_reg(0x0B, 0x06); \ - __spi_write_reg(0x40, 0xC0); \ - __spi_write_reg(0x42, 0x43); \ - __spi_write_reg(0x44, 0x28); \ - __spi_write_reg(0x0D, 0x4F); \ -} while (0) - - #define __lcd_special_off() \ - do { \ - __spi_write_reg(0x04, 0x4C); \ - } while (0) - -#endif /* CONFIG_JZLCD_AUO_A030FL01_V1 */ - -//#if defined(CONFIG_JZLCD_FOXCONN_PT035TN01) -#if defined(CONFIG_JZLCD_FOXCONN_PT035TN01) || defined(CONFIG_JZLCD_INNOLUX_PT035TN01_SERIAL) - -#if defined(CONFIG_JZLCD_FOXCONN_PT035TN01) /* board pmp */ -#define MODE 0xcd /* 24bit parellel RGB */ -#endif -#if defined(CONFIG_JZLCD_INNOLUX_PT035TN01_SERIAL) -#define MODE 0xc9 /* 8bit serial RGB */ -#endif - -#if defined(CONFIG_JZ4730_PMP) - #define SPEN 60 //LCD_SPL - #define SPCK 61 //LCD_CLS - #define SPDA 62 //LCD_PS - #define LCD_RET 63 //LCD_REV //use for lcd reset -#elif defined(CONFIG_JZ4740_LEO) /* board leo */ - #define SPEN (32*1+18) //LCD_SPL - #define SPCK (32*1+17) //LCD_CLS - #define SPDA (32*2+22) //LCD_PS - #define LCD_RET (32*2+23) //LCD_REV //use for lcd reset -#elif defined(CONFIG_JZ4740_PAVO) /* board pavo */ - #define SPEN (32*1+18) //LCD_SPL - #define SPCK (32*1+17) //LCD_CLS - #define SPDA (32*2+12) //LCD_D12 - #define LCD_RET (32*2+23) //LCD_REV, GPC23 -#if 0 /*old driver*/ - #define SPEN (32*1+18) //LCD_SPL - #define SPCK (32*1+17) //LCD_CLS - #define SPDA (32*2+12) //LCD_D12 - #define LCD_RET (32*3+27) //PWM4 //use for lcd reset -#endif -#else -#error "driver/video/Jzlcd.h, please define SPI pins on your board." -#endif - - #define __spi_write_reg1(reg, val) \ - do { \ - unsigned char no;\ - unsigned short value;\ - unsigned char a=0;\ - unsigned char b=0;\ - a=reg;\ - b=val;\ - __gpio_set_pin(SPEN);\ - __gpio_set_pin(SPCK);\ - __gpio_clear_pin(SPDA);\ - __gpio_clear_pin(SPEN);\ - udelay(25);\ - value=((a<<8)|(b&0xFF));\ - for(no=0;no<16;no++)\ - {\ - __gpio_clear_pin(SPCK);\ - if((value&0x8000)==0x8000)\ - __gpio_set_pin(SPDA);\ - else\ - __gpio_clear_pin(SPDA);\ - udelay(25);\ - __gpio_set_pin(SPCK);\ - value=(value<<1); \ - udelay(25);\ - }\ - __gpio_set_pin(SPEN);\ - udelay(100);\ - } while (0) - - #define __spi_write_reg(reg, val) \ - do {\ - __spi_write_reg1((reg<<2|2), val); \ - udelay(100); \ - }while(0) - - #define __lcd_special_pin_init() \ - do { \ - __gpio_as_output(SPEN); /* use SPDA */\ - __gpio_as_output(SPCK); /* use SPCK */\ - __gpio_as_output(SPDA); /* use SPDA */\ - __gpio_as_output(LCD_RET);\ - udelay(50);\ - __gpio_clear_pin(LCD_RET);\ - mdelay(150);\ - __gpio_set_pin(LCD_RET);\ - } while (0) - - #define __lcd_special_on() \ - do { \ - udelay(50);\ - __gpio_clear_pin(LCD_RET);\ - mdelay(150);\ - __gpio_set_pin(LCD_RET);\ - mdelay(10);\ - __spi_write_reg(0x00, 0x03); \ - __spi_write_reg(0x01, 0x40); \ - __spi_write_reg(0x02, 0x11); \ - __spi_write_reg(0x03, MODE); /* mode */ \ - __spi_write_reg(0x04, 0x32); \ - __spi_write_reg(0x05, 0x0e); \ - __spi_write_reg(0x07, 0x03); \ - __spi_write_reg(0x08, 0x08); \ - __spi_write_reg(0x09, 0x32); \ - __spi_write_reg(0x0A, 0x88); \ - __spi_write_reg(0x0B, 0xc6); \ - __spi_write_reg(0x0C, 0x20); \ - __spi_write_reg(0x0D, 0x20); \ - } while (0) //reg 0x0a is control the display direction:DB0->horizontal level DB1->vertical level - -/* __spi_write_reg(0x02, 0x03); \ - __spi_write_reg(0x06, 0x40); \ - __spi_write_reg(0x0a, 0x11); \ - __spi_write_reg(0x0e, 0xcd); \ - __spi_write_reg(0x12, 0x32); \ - __spi_write_reg(0x16, 0x0e); \ - __spi_write_reg(0x1e, 0x03); \ - __spi_write_reg(0x22, 0x08); \ - __spi_write_reg(0x26, 0x40); \ - __spi_write_reg(0x2a, 0x88); \ - __spi_write_reg(0x2e, 0x88); \ - __spi_write_reg(0x32, 0x20); \ - __spi_write_reg(0x36, 0x20); \ -*/ -// } while (0) //reg 0x0a is control the display direction:DB0->horizontal level DB1->vertical level - - #define __lcd_special_off() \ - do { \ - __spi_write_reg(0x00, 0x03); \ - } while (0) - -#endif /* CONFIG_JZLCD_FOXCONN_PT035TN01 or CONFIG_JZLCD_INNOLUX_PT035TN01_SERIAL */ - - -#ifndef __lcd_special_pin_init -#define __lcd_special_pin_init() -#endif -#ifndef __lcd_special_on -#define __lcd_special_on() -#endif -#ifndef __lcd_special_off -#define __lcd_special_off() -#endif - - -/* - * Platform specific definition - */ - -#if defined(CONFIG_JZ4730_GPS) - -#define __lcd_set_backlight_level(n) \ -do { \ - ; \ -} while (0) - -#define __lcd_display_pin_init() \ -do { \ - __lcd_special_pin_init(); \ - __gpio_as_output(94); /* PWM0 pin */ \ - __gpio_as_output(95); /* PWM1 pin */ \ -} while (0) - -#define __lcd_display_on() \ -do { \ - __lcd_special_on(); \ - __gpio_set_pin(94); /* PWM0 pin */ \ - __gpio_set_pin(95); /* PWM1 pin */ \ - __lcd_set_backlight_level(8); \ -} while (0) - -#define __lcd_display_off() \ -do { \ - __lcd_special_off(); \ -} while (0) - -#endif /* CONFIG_JZ4730_GPS */ - -#if defined(CONFIG_JZ4730_FPRINT) - -#define __lcd_set_backlight_level(n) \ -do { \ - REG_PWM_DUT(0) = n; \ - REG_PWM_PER(0) = 7; \ - REG_PWM_CTR(0) = 0x81; \ -} while (0) - -#if defined(CONFIG_JZLCD_FOXCONN_PT035TN01) - -#define __lcd_display_pin_init() \ -do { \ - __lcd_special_pin_init();\ - __gpio_as_pwm();\ - __lcd_set_backlight_level(8);\ -} while (0) - -#define __lcd_display_on() \ -do { \ - __lcd_set_backlight_level(8); \ - __lcd_special_on();\ -} while (0) - -#define __lcd_display_off() \ -do { \ - __lcd_set_backlight_level(0); \ - __lcd_special_off();\ -} while (0) - -#else - -#define __lcd_display_pin_init() \ -do { \ - __gpio_as_output(GPIO_DISP_OFF_N); \ - __gpio_as_pwm(); \ - __lcd_set_backlight_level(8); \ -} while (0) - -#define __lcd_display_on() \ -do { \ - __lcd_set_backlight_level(8); \ - __gpio_set_pin(GPIO_DISP_OFF_N); \ -} while (0) - -#define __lcd_display_off() \ -do { \ - __lcd_set_backlight_level(0); \ - __gpio_clear_pin(GPIO_DISP_OFF_N); \ -} while (0) -#endif - -#endif /* CONFIG_JZ4730_FPRINT */ - -#if defined(CONFIG_JZ4730_LIBRA) - -#define __lcd_set_backlight_level(n) \ -do { \ -} while (0) - -#define __lcd_display_pin_init() \ -do { \ - __lcd_special_pin_init(); \ - __gpio_clear_pin(100); \ - __gpio_as_output(100); \ - __gpio_as_output(94); \ - __gpio_as_output(95); \ - __lcd_set_backlight_level(8); \ -} while (0) - -#define __lcd_display_on() \ -do { \ - __lcd_special_on(); \ - __gpio_set_pin(100); \ - __gpio_set_pin(94); \ - __gpio_set_pin(95); \ -} while (0) - -#define __lcd_display_off() \ -do { \ - __lcd_special_off(); \ - __gpio_clear_pin(100); \ - __gpio_clear_pin(94); \ - __gpio_clear_pin(95); \ -} while (0) - -#endif /* CONFIG_JZ4730_LIBRA */ - -#if defined(CONFIG_JZ4730_PMP) - -#define __lcd_set_backlight_level(n) \ -do { \ - REG_PWM_DUT(0) = n; \ - REG_PWM_PER(0) = 7; \ - REG_PWM_CTR(0) = 0x81; \ -} while (0) - -#define __lcd_display_pin_init() \ -do { \ - __gpio_as_output(GPIO_DISP_OFF_N); \ - __gpio_as_pwm(); \ - __lcd_set_backlight_level(10); \ - __lcd_special_pin_init(); \ -} while (0) - -#define __lcd_display_on() \ -do { \ - __lcd_special_on(); \ - __lcd_set_backlight_level(8); \ - __gpio_set_pin(GPIO_DISP_OFF_N); \ -} while (0) - -#define __lcd_display_off() \ -do { \ - __lcd_special_off(); \ - __lcd_set_backlight_level(0); \ - __gpio_clear_pin(GPIO_DISP_OFF_N); \ -} while (0) - -#endif /* CONFIG_JZ4730_PMP */ - -/*#if defined(CONFIG_JZ4740_LEO) || defined(CONFIG_JZ4740_PAVO)*/ -#if defined(CONFIG_SOC_JZ4740) -#if defined(CONFIG_JZ4740_PAVO) || defined(CONFIG_JZ4740_LYRA) -#define PWM_CHN 4 /* pwm channel */ -#define PWM_FULL 101 -/* 100 level: 0,1,...,100 */ -#define __lcd_set_backlight_level(n)\ -do { \ -__gpio_as_output(GPIO_PWM); \ -__gpio_set_pin(GPIO_PWM); \ -} while (0) - -#define __lcd_close_backlight() \ -do { \ -__gpio_as_output(GPIO_PWM); \ -__gpio_clear_pin(GPIO_PWM); \ -} while (0) - -#elif defined(CONFIG_JZ4720_VIRGO) -#define GPIO_PWM 119 /* GP_D23 */ -#define PWM_CHN 0 /* pwm channel */ -#define PWM_FULL 101 -/* 100 level: 0,1,...,100 */ -/*#define __lcd_set_backlight_level(n) \ -do { \ - __gpio_as_pwm(0); \ - __tcu_disable_pwm_output(PWM_CHN); \ - __tcu_stop_counter(PWM_CHN); \ - __tcu_init_pwm_output_high(PWM_CHN); \ - __tcu_set_pwm_output_shutdown_abrupt(PWM_CHN); \ - __tcu_select_clk_div1(PWM_CHN); \ - __tcu_mask_full_match_irq(PWM_CHN); \ - __tcu_mask_half_match_irq(PWM_CHN); \ - __tcu_set_count(PWM_CHN,0); \ - __tcu_set_full_data(PWM_CHN,__cpm_get_extalclk()/1000); \ - __tcu_set_half_data(PWM_CHN,__cpm_get_extalclk()/1000*n/100); \ - __tcu_enable_pwm_output(PWM_CHN); \ - __tcu_select_extalclk(PWM_CHN); \ - __tcu_start_counter(PWM_CHN); \ -} while (0) -*/ - -#define __lcd_set_backlight_level(n) \ -do { \ - __gpio_as_output(GPIO_PWM); \ - __gpio_set_pin(GPIO_PWM); \ -} while (0) - -#define __lcd_close_backlight() \ -do { \ -__gpio_as_output(GPIO_PWM); \ -__gpio_clear_pin(GPIO_PWM); \ -} while (0) - -#else -#define __lcd_set_backlight_level(n) -#define __lcd_close_backlight() - -#endif /* #if defined(CONFIG_MIPS_JZ4740_PAVO) */ - -#define __lcd_display_pin_init() \ -do { \ - __gpio_as_output(GPIO_DISP_OFF_N); \ - __cpm_start_tcu(); \ - __lcd_special_pin_init(); \ -} while (0) -/* __lcd_set_backlight_level(100); \*/ -#define __lcd_display_on() \ -do { \ - __gpio_set_pin(GPIO_DISP_OFF_N); \ - __lcd_special_on(); \ - __lcd_set_backlight_level(80); \ -} while (0) - -#define __lcd_display_off() \ -do { \ - __lcd_special_off(); \ - __lcd_close_backlight(); \ - __gpio_clear_pin(GPIO_DISP_OFF_N); \ -} while (0) - -#endif /* CONFIG_MIPS_JZ4740_LEO */ - -#if defined(CONFIG_JZLCD_MSTN_240x128) - -#if 0 /* The final version does not use software emulation of VCOM. */ - -#define GPIO_VSYNC 59 -#define GPIO_VCOM 90 - -#define REG_VCOM REG_GPIO_GPDR((GPIO_VCOM>>5)) -#define VCOM_BIT (1 << (GPIO_VCOM & 0x1f)) -static unsigned int vcom_static; -static void vsync_irq(int irq, void *dev_id, struct pt_regs *reg) -{ - vcom_static = REG_VCOM; - vcom_static ^= VCOM_BIT; - REG_VCOM = vcom_static; -} - -#define __lcd_display_pin_init() \ - __gpio_as_irq_rise_edge(GPIO_VSYNC); \ - __gpio_as_output(GPIO_VCOM); \ - { \ - static int inited = 0; \ - if (!inited) { \ - inited = 1; \ - if (request_irq(IRQ_GPIO_0 + GPIO_VSYNC, vsync_irq, SA_INTERRUPT, \ - "vsync", 0)) { \ - err = -EBUSY; \ - goto failed; \ - }}} - -#endif - -/* We uses AC BIAs pin to generate VCOM signal, so above code should be removed. - */ -#endif -/***************************************************************************** - * LCD display pin dummy macros - *****************************************************************************/ -#ifndef __lcd_display_pin_init -#define __lcd_display_pin_init() -#endif -#ifndef __lcd_display_on -#define __lcd_display_on() -#endif -#ifndef __lcd_display_off -#define __lcd_display_off() -#endif -#ifndef __lcd_set_backlight_level -#define __lcd_set_backlight_level(n) -#endif - -#endif /* __JZLCD_H__ */