mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2025-04-21 12:27:27 +03:00
[adm5120] cleanup USB driver, it's still experimental
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@9480 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
juhosg
@@ -56,7 +56,8 @@ struct ed {
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dma_addr_t dma; /* addr of ED */
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struct td *dummy; /* next TD to activate */
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struct list_head urb_list; /* list of our URBs */
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struct urb_priv *urb_active; /* active URB */
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struct list_head urb_pending; /* pending URBs */
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struct list_head ed_list; /* list of all EDs*/
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struct list_head rm_list; /* for remove list */
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@@ -65,16 +66,15 @@ struct ed {
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struct ed *ed_next; /* on schedule list */
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struct ed *ed_prev; /* for non-interrupt EDs */
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struct ed *ed_rm_next; /* on rm list */
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struct ed *ed_soft_list; /* on software int list */
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struct list_head td_list; /* "shadow list" of our TDs */
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/* create --> IDLE --> OPER --> ... --> IDLE --> destroy
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* usually: OPER --> UNLINK --> (IDLE | OPER) --> ...
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*/
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u8 state; /* ED_{IDLE,UNLINK,OPER} */
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#define ED_IDLE 0x00 /* NOT linked to HC */
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#define ED_UNLINK 0x01 /* being unlinked from hc */
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#define ED_OPER 0x02 /* IS linked to hc */
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u8 state;
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#define ED_NEW 0x00 /* just allocated */
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#define ED_IDLE 0x01 /* linked into HC, but not running */
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#define ED_OPER 0x02 /* linked into HC and running */
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#define ED_UNLINK 0x03 /* being unlinked from HC */
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u8 type; /* PIPE_{BULK,...} */
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@@ -115,16 +115,17 @@ struct td {
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#define TD_T_SHIFT 23 /* data toggle state */
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#define TD_T_MASK 0x3
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#define TD_T (TD_T_MASK << TD_T_SHIFT)
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#define TD_T_DATA0 (0x2 << TD_T_SHIFT) /* DATA0 */
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#define TD_T_DATA1 (0x3 << TD_T_SHIFT) /* DATA1 */
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#define TD_T_CARRY (0x0 << TD_T_SHIFT) /* uses ED_C */
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#define TD_T_DATA0 (0x2 << TD_T_SHIFT) /* DATA0 */
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#define TD_T_DATA1 (0x3 << TD_T_SHIFT) /* DATA1 */
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#define TD_T_CARRY (0x0 << TD_T_SHIFT) /* uses ED_C */
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#define TD_T_GET(x) (((x) >> TD_T_SHIFT) & TD_T_MASK)
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#define TD_DP_SHIFT 21 /* direction/pid */
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#define TD_DP_MASK 0x3
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#define TD_DP (TD_DP_MASK << TD_DP_SHIFT)
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#define TD_DP_SETUP (0x0 << TD_DP_SHIFT) /* SETUP pid */
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#define TD_DP_OUT (0x1 << TD_DP_SHIFT) /* OUT pid */
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#define TD_DP_IN (0x2 << TD_DP_SHIFT) /* IN pid */
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#define TD_DP_SETUP (0x0 << TD_DP_SHIFT) /* SETUP pid */
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#define TD_DP_OUT (0x1 << TD_DP_SHIFT) /* OUT pid */
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#define TD_DP_IN (0x2 << TD_DP_SHIFT) /* IN pid */
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#define TD_DP_GET(x) (((x) >> TD_DP_SHIFT) & TD_DP_MASK)
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#define TD_ISI_SHIFT 8 /* Interrupt Service Interval */
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#define TD_ISI_MASK 0x3f
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#define TD_ISI_GET(x) (((x) >> TD_ISI_SHIFT) & TD_ISI_MASK)
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@@ -142,19 +143,12 @@ struct td {
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/* rest are purely for the driver's use */
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__u8 index;
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struct ed *ed;
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struct td *td_hash; /* dma-->td hashtable */
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struct td *next_dl_td;
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/* struct ed *ed;*/
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struct urb *urb;
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dma_addr_t td_dma; /* addr of this TD */
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dma_addr_t data_dma; /* addr of data it points to */
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struct list_head td_list; /* "shadow list", TDs on same ED */
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u32 flags;
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#define TD_FLAG_DONE (1 << 17) /* retired to done list */
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#define TD_FLAG_ISO (1 << 16) /* copy of ED_ISO */
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} __attribute__ ((aligned(TD_ALIGN))); /* c/b/i need 16; only iso needs 32 */
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/*
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@@ -354,6 +348,7 @@ struct admhcd_regs {
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/* hcd-private per-urb state */
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struct urb_priv {
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struct ed *ed;
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struct urb *urb;
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struct list_head pending; /* URBs on the same ED */
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u32 td_cnt; /* # tds in this request */
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@@ -374,6 +369,8 @@ struct urb_priv {
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struct admhcd {
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spinlock_t lock;
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spinlock_t dma_lock;
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u32 dma_state;
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/*
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* I/O memory used to communicate with the HC (dma-consistent)
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@@ -384,14 +381,10 @@ struct admhcd {
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* hcd adds to schedule for a live hc any time, but removals finish
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* only at the start of the next frame.
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*/
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struct ed *ed_head;
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struct ed *ed_tails[4];
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struct ed *ed_rm_list; /* to be removed */
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struct ed *ed_halt_list; /* halted due to an error */
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struct ed *ed_soft_list; /* for software interrupt processing */
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struct ed *periodic[NUM_INTS]; /* shadow int_table */
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#if 0 /* TODO: remove? */
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@@ -408,7 +401,6 @@ struct admhcd {
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struct dma_pool *td_cache;
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struct dma_pool *ed_cache;
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struct td *td_hash[TD_HASH_SIZE];
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struct list_head pending;
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/*
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* driver state
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@@ -446,6 +438,7 @@ static inline struct usb_hcd *admhcd_to_hcd(const struct admhcd *ahcd)
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#define STUB_DEBUG_FILES
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#endif /* DEBUG */
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#if 0
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#define admhc_dbg(ahcd, fmt, args...) \
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dev_dbg(admhcd_to_hcd(ahcd)->self.controller , fmt , ## args )
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#define admhc_err(ahcd, fmt, args...) \
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@@ -460,6 +453,22 @@ static inline struct usb_hcd *admhcd_to_hcd(const struct admhcd *ahcd)
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#else
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# define admhc_vdbg(ahcd, fmt, args...) do { } while (0)
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#endif
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#else
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#define admhc_dbg(ahcd, fmt, args...) \
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printk(KERN_DEBUG "adm5120-hcd: " fmt , ## args )
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#define admhc_err(ahcd, fmt, args...) \
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printk(KERN_ERR "adm5120-hcd: " fmt , ## args )
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#define ahcd_info(ahcd, fmt, args...) \
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printk(KERN_INFO "adm5120-hcd: " fmt , ## args )
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#define admhc_warn(ahcd, fmt, args...) \
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printk(KERN_WARNING "adm5120-hcd: " fmt , ## args )
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#ifdef ADMHC_VERBOSE_DEBUG
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# define admhc_vdbg admhc_dbg
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#else
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# define admhc_vdbg(ahcd, fmt, args...) do { } while (0)
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#endif
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#endif
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/*-------------------------------------------------------------------------*/
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@@ -633,6 +642,15 @@ static inline u16 admhc_frame_no(const struct admhcd *ahcd)
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return (u16)t;
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}
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static inline u16 admhc_frame_remain(const struct admhcd *ahcd)
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{
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u32 t;
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t = admhc_readl(ahcd, &ahcd->regs->fmnumber) >> ADMHC_SFN_FR_SHIFT;
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t &= ADMHC_SFN_FR_MASK;
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return (u16)t;
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}
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/*-------------------------------------------------------------------------*/
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static inline void admhc_disable(struct admhcd *ahcd)
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@@ -652,7 +670,7 @@ static inline void periodic_reinit(struct admhcd *ahcd)
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/* TODO: adjust FSLargestDataPacket value too? */
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admhc_writel(ahcd, (fit ^ FIT) | ahcd->fminterval,
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&ahcd->regs->fminterval);
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&ahcd->regs->fminterval);
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}
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static inline u32 admhc_get_rhdesc(struct admhcd *ahcd)
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@@ -698,17 +716,45 @@ static inline void admhc_intr_ack(struct admhcd *ahcd, u32 ints)
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static inline void admhc_dma_enable(struct admhcd *ahcd)
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{
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ahcd->host_control = admhc_readl(ahcd, &ahcd->regs->host_control);
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if (ahcd->host_control & ADMHC_HC_DMAE)
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u32 t;
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t = admhc_readl(ahcd, &ahcd->regs->host_control);
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if (t & ADMHC_HC_DMAE)
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return;
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ahcd->host_control |= ADMHC_HC_DMAE;
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admhc_writel(ahcd, ahcd->host_control, &ahcd->regs->host_control);
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t |= ADMHC_HC_DMAE;
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admhc_writel(ahcd, t, &ahcd->regs->host_control);
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admhc_dbg(ahcd,"DMA enabled\n");
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}
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static inline void admhc_dma_disable(struct admhcd *ahcd)
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{
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ahcd->host_control = admhc_readl(ahcd, &ahcd->regs->host_control);
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ahcd->host_control &= ~ADMHC_HC_DMAE;
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admhc_writel(ahcd, ahcd->host_control, &ahcd->regs->host_control);
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u32 t;
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t = admhc_readl(ahcd, &ahcd->regs->host_control);
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if (!(t & ADMHC_HC_DMAE))
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return;
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t &= ~ADMHC_HC_DMAE;
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admhc_writel(ahcd, t, &ahcd->regs->host_control);
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admhc_dbg(ahcd,"DMA disabled\n");
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}
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static inline void admhc_dma_lock(struct admhcd *ahcd)
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{
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spin_lock(ahcd->dma_lock);
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ahcd->dma_state = admhc_readl(ahcd, &ahcd->regs->host_control);
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admhc_writel(ahcd, 0, &ahcd->regs->hosthead);
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admhc_writel(ahcd, ahcd->dma_state & ~ADMHC_HC_DMAE,
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&ahcd->regs->host_control);
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admhc_dbg(ahcd,"DMA locked\n");
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}
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static inline void admhc_dma_unlock(struct admhcd *ahcd)
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{
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admhc_writel(ahcd, (u32)ahcd->ed_head->dma, &ahcd->regs->hosthead);
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admhc_writel(ahcd, ahcd->dma_state, &ahcd->regs->host_control);
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admhc_dbg(ahcd,"DMA unlocked\n");
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spin_unlock(ahcd->dma_lock);
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}
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