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fix remaining pci problems with brcm-2.6 (fixes #132)

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git-svn-id: svn://svn.openwrt.org/openwrt/trunk/openwrt@2690 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
nbd 2005-12-15 22:57:27 +00:00
parent d6aaedceea
commit a18b033cc9
1 changed files with 7 additions and 5 deletions
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12
target/linux/linux-2.6/patches/brcm/001-bcm947xx.patch
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@ -2204,8 +2204,8 @@ diff -urN linux.old/arch/mips/bcm947xx/broadcom/sbmips.c linux.dev/arch/mips/bcm
+
diff -urN linux.old/arch/mips/bcm947xx/broadcom/sbpci.c linux.dev/arch/mips/bcm947xx/broadcom/sbpci.c
--- linux.old/arch/mips/bcm947xx/broadcom/sbpci.c 1970-01-01 01:00:00.000000000 +0100
+++ linux.dev/arch/mips/bcm947xx/broadcom/sbpci.c 2005-12-15 20:09:46.562233250 +0100
@@ -0,0 +1,529 @@
+++ linux.dev/arch/mips/bcm947xx/broadcom/sbpci.c 2005-12-15 23:50:31.846688500 +0100
@@ -0,0 +1,531 @@
+/*
+ * Low-Level PCI and SB support for BCM47xx
+ *
@ -2406,12 +2406,14 @@ diff -urN linux.old/arch/mips/bcm947xx/broadcom/sbpci.c linux.dev/arch/mips/bcm9
+ n = (R_REG(&sb->sbidlow) & SBIDL_AR_MASK) >> SBIDL_AR_SHIFT;
+ if (off == OFFSETOF(pci_config_regs, base[0]))
+ cfg->base[0] = ~(sb_size(R_REG(&sb->sbadmatch0)) - 1);
+#if 0
+ else if (off == OFFSETOF(pci_config_regs, base[1]) && n >= 1)
+ cfg->base[1] = ~(sb_size(R_REG(&sb->sbadmatch1)) - 1);
+ else if (off == OFFSETOF(pci_config_regs, base[2]) && n >= 2)
+ cfg->base[2] = ~(sb_size(R_REG(&sb->sbadmatch2)) - 1);
+ else if (off == OFFSETOF(pci_config_regs, base[3]) && n >= 3)
+ cfg->base[3] = ~(sb_size(R_REG(&sb->sbadmatch3)) - 1);
+#endif
+ }
+ sb_setcoreidx(sbh, coreidx);
+ return 0;
@ -2694,9 +2696,9 @@ diff -urN linux.old/arch/mips/bcm947xx/broadcom/sbpci.c linux.dev/arch/mips/bcm9
+ cfg->sub_class = subclass;
+ cfg->base_class = class;
+ cfg->base[0] = htol32(sb_base(R_REG(&sb->sbadmatch0)));
+ cfg->base[1] = htol32(sb_base(R_REG(&sb->sbadmatch1)));
+ cfg->base[2] = htol32(sb_base(R_REG(&sb->sbadmatch2)));
+ cfg->base[3] = htol32(sb_base(R_REG(&sb->sbadmatch3)));
+ cfg->base[1] = 0;//htol32(sb_base(R_REG(&sb->sbadmatch1)));
+ cfg->base[2] = 0;//htol32(sb_base(R_REG(&sb->sbadmatch2)));
+ cfg->base[3] = 0;//htol32(sb_base(R_REG(&sb->sbadmatch3)));
+ cfg->base[4] = 0;
+ cfg->base[5] = 0;
+ if (class == PCI_CLASS_BRIDGE && subclass == PCI_BRIDGE_PCI)