qi-hardware/openwrt-xburst
1
0
Fork 0
mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2024-11-24 01:43:08 +02:00
Code

ep93xx: add support for 3.3

Browse Source 
Compile tested only.

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@31895 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
juhosg 2012-05-27 15:01:21 +00:00
parent e468dc1413
commit a195c06c00
4 changed files with 1529 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

229
target/linux/ep93xx/config-3.3 Normal file
View File

@ -0,0 +1,229 @@
CONFIG_ALIGNMENT_TRAP=y
CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
CONFIG_ARCH_EP93XX=y
CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y
CONFIG_ARCH_NR_GPIO=0
CONFIG_ARCH_REQUIRE_GPIOLIB=y
# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_USES_GETTIMEOFFSET=y
CONFIG_ARM=y
CONFIG_ARM_AMBA=y
# CONFIG_ARM_CPU_SUSPEND is not set
CONFIG_ARM_L1_CACHE_SHIFT=5
CONFIG_ARM_NR_BANKS=16
CONFIG_ARM_PATCH_PHYS_VIRT=y
# CONFIG_ARM_SP805_WATCHDOG is not set
CONFIG_ARM_THUMB=y
CONFIG_ARM_VIC=y
CONFIG_ARM_VIC_NR=2
# CONFIG_ARPD is not set
CONFIG_BCMA_POSSIBLE=y
# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_CACHE_L2X0 is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_CLKDEV_LOOKUP=y
CONFIG_CMDLINE="console=ttyAM0,57600 init=/etc/preinit"
CONFIG_CMDLINE_FROM_BOOTLOADER=y
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_CPU_32v4T=y
CONFIG_CPU_ABRT_EV4T=y
CONFIG_CPU_ARM920T=y
CONFIG_CPU_CACHE_V4WT=y
CONFIG_CPU_CACHE_VIVT=y
CONFIG_CPU_COPY_V4WB=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y
# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
# CONFIG_CPU_ICACHE_DISABLE is not set
CONFIG_CPU_PABRT_LEGACY=y
CONFIG_CPU_TLB_V4WBI=y
CONFIG_CPU_USE_DOMAINS=y
CONFIG_CRC7=y
CONFIG_CRC_ITU_T=y
CONFIG_CRUNCH=y
CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_AES=y
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_ALGAPI2=y
CONFIG_CRYPTO_ARC4=y
CONFIG_CRYPTO_BLKCIPHER=y
CONFIG_CRYPTO_BLKCIPHER2=y
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_ECB=m
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_MANAGER2=y
CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_MICHAEL_MIC=y
CONFIG_CRYPTO_PCBC=y
CONFIG_CRYPTO_PCOMP2=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_SHA1=y
CONFIG_CRYPTO_WORKQUEUE=y
CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_USER=y
CONFIG_DEFAULT_TCP_CONG="cubic"
CONFIG_DNOTIFY=y
CONFIG_DUMMY_CONSOLE=y
CONFIG_ELF_CORE=y
# CONFIG_ENABLE_WARN_DEPRECATED is not set
CONFIG_EP93XX_EARLY_UART1=y
# CONFIG_EP93XX_EARLY_UART2 is not set
# CONFIG_EP93XX_EARLY_UART3 is not set
CONFIG_EP93XX_ETH=y
# CONFIG_EP93XX_PWM is not set
CONFIG_EP93XX_SDCE0_PHYS_OFFSET=y
# CONFIG_EP93XX_SDCE1_PHYS_OFFSET is not set
# CONFIG_EP93XX_SDCE2_PHYS_OFFSET is not set
# CONFIG_EP93XX_SDCE3_ASYNC_PHYS_OFFSET is not set
# CONFIG_EP93XX_SDCE3_SYNC_PHYS_OFFSET is not set
CONFIG_EP93XX_WATCHDOG=y
CONFIG_FB=y
# CONFIG_FB_ARMCLCD is not set
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_IMAGEBLIT=y
CONFIG_FB_EP93XX=y
# CONFIG_FB_SM7XX is not set
# CONFIG_FB_WMT_GE_ROPS is not set
# CONFIG_FIRMWARE_EDID is not set
CONFIG_FONTS=y
# CONFIG_FONT_10x18 is not set
# CONFIG_FONT_6x11 is not set
# CONFIG_FONT_7x14 is not set
CONFIG_FONT_8x16=y
CONFIG_FONT_8x8=y
# CONFIG_FONT_ACORN_8x8 is not set
# CONFIG_FONT_MINI_4x6 is not set
# CONFIG_FONT_PEARL_8x8 is not set
# CONFIG_FONT_SUN12x22 is not set
# CONFIG_FONT_SUN8x16 is not set
CONFIG_FRAMEBUFFER_CONSOLE=y
# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
CONFIG_FRAME_POINTER=y
# CONFIG_FW_LOADER is not set
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_EP93XX=y
CONFIG_GPIO_GENERIC=y
# CONFIG_GPIO_PL061 is not set
# CONFIG_HAMRADIO is not set
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAVE_AOUT=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_ARCH_PFN_VALID=y
CONFIG_HAVE_CLK=y
CONFIG_HAVE_C_RECORDMCOUNT=y
CONFIG_HAVE_DMA_API_DEBUG=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_HAVE_GENERIC_HARDIRQS=y
CONFIG_HAVE_IRQ_WORK=y
CONFIG_HAVE_KERNEL_GZIP=y
CONFIG_HAVE_KERNEL_LZMA=y
CONFIG_HAVE_KERNEL_LZO=y
CONFIG_HAVE_KERNEL_XZ=y
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_HAVE_PROC_CPU=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
CONFIG_HAVE_SPARSE_IRQ=y
CONFIG_HW_CONSOLE=y
CONFIG_I2C=y
CONFIG_I2C_ALGOBIT=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_INPUT=y
# CONFIG_INPUT_MISC is not set
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_IRQ_DOMAIN=y
CONFIG_KTIME_SCALAR=y
CONFIG_LOGO=y
CONFIG_LOGO_LINUX_CLUT224=y
CONFIG_LOGO_LINUX_MONO=y
CONFIG_LOGO_LINUX_VGA16=y
CONFIG_LOG_BUF_SHIFT=16
# CONFIG_MACH_EDB9302A is not set
# CONFIG_MACH_EDB9307A is not set
# CONFIG_MACH_EDB9315A is not set
CONFIG_MACH_SIM_ONE=y
# CONFIG_MACH_SNAPPER_CL15 is not set
# CONFIG_MACH_VISION_EP9307 is not set
# CONFIG_MFD_T7L66XB is not set
CONFIG_MMC=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_SPI=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
# CONFIG_MTD_CFI_GEOMETRY is not set
CONFIG_MTD_CFI_STAA=y
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_RAM=y
CONFIG_MULTI_IRQ_HANDLER=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_MACH_MEMORY_H=y
CONFIG_NEED_PER_CPU_KM=y
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PAGE_OFFSET=0xC0000000
# CONFIG_PCI_SYSCALL is not set
CONFIG_PERF_USE_VMALLOC=y
# CONFIG_PREEMPT_RCU is not set
# CONFIG_SCSI_DMA is not set
# CONFIG_SERIAL_8250 is not set
CONFIG_SERIAL_AMBA_PL010=y
CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
# CONFIG_SERIAL_AMBA_PL011 is not set
CONFIG_SPI=y
CONFIG_SPI_BITBANG=y
CONFIG_SPI_EP93XX=y
CONFIG_SPI_MASTER=y
CONFIG_SPLIT_PTLOCK_CPUS=999999
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set
# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set
# CONFIG_TOUCHSCREEN_BU21013 is not set
# CONFIG_TOUCHSCREEN_DYNAPRO is not set
# CONFIG_TOUCHSCREEN_EGALAX is not set
CONFIG_TOUCHSCREEN_EP93XX=y
# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
# CONFIG_TOUCHSCREEN_MAX11801 is not set
# CONFIG_TOUCHSCREEN_PIXCIR is not set
# CONFIG_TOUCHSCREEN_ST1232 is not set
# CONFIG_TOUCHSCREEN_TSC2005 is not set
# CONFIG_TOUCHSCREEN_TSC_SERIO is not set
CONFIG_UID16=y
# CONFIG_USB_ARCH_HAS_EHCI is not set
# CONFIG_USB_ARCH_HAS_XHCI is not set
CONFIG_USB_SUPPORT=y
CONFIG_VECTORS_BASE=0xffff0000
CONFIG_VIDEO_OUTPUT_CONTROL=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
CONFIG_XZ_DEC=y
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZONE_DMA_FLAG=0

59
target/linux/ep93xx/patches-3.3/001-ep93xx_cpuinfo.patch Normal file
View File

@ -0,0 +1,59 @@
This patch puts the EP93xx chip revision and unique ID into /proc/cpuinfo.
This is necessary to be able to set a unique MAC address for DHCP purposes
by adding a line to /etc/network/interfaces:
# Generate a unique locally-assigned MAC address from the CPU serial number
pre-up ifconfig eth0 hw ether `sed -n 's/^Serial.* 000000/02/p' /proc/cpuinfo`
It uses the chip revision reading code in the ep93xx-chip-revision patch.
Really, this is wrong, since /proc/cpuinfo should report the revision and
serial number of the ARM920T processor, while these are the rev and serial
of the EP93xx SoC. In a future kernel (>2.6.34) there may be a new file
/proc/socinfo for this information.
-martinwguy 14 May 2010
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -54,6 +54,12 @@
#include <asm/unwind.h>
#include <asm/memblock.h>
+#if defined(CONFIG_ARCH_EP93XX)
+#include <mach/io.h>
+#include <mach/ep93xx-regs.h>
+#include <mach/platform.h>
+#endif
+
#if defined(CONFIG_DEPRECATED_PARAM_STRUCT)
#include "compat.h"
#endif
@@ -1087,9 +1093,16 @@ static int c_show(struct seq_file *m, vo
seq_puts(m, "\n");
seq_printf(m, "Hardware\t: %s\n", machine_name);
+#if defined(CONFIG_ARCH_EP93XX)
+ seq_printf(m, "Revision\t: %04x\n",
+ ep93xx_chip_revision());
+ seq_printf(m, "Serial\t\t: %016x\n",
+ *((unsigned int *)EP93XX_SECURITY_UNIQID));
+#else
seq_printf(m, "Revision\t: %04x\n", system_rev);
seq_printf(m, "Serial\t\t: %08x%08x\n",
system_serial_high, system_serial_low);
+#endif
return 0;
}
--- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
+++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
@@ -97,6 +97,8 @@
#define EP93XX_I2S_BASE EP93XX_APB_IOMEM(0x00020000)
#define EP93XX_SECURITY_BASE EP93XX_APB_IOMEM(0x00030000)
+#define EP93XX_SECURITY_REG(x) (EP93XX_SECURITY_BASE + (x))
+#define EP93XX_SECURITY_UNIQID EP93XX_SECURITY_REG(0x2440)
#define EP93XX_GPIO_PHYS_BASE EP93XX_APB_PHYS(0x00040000)
#define EP93XX_GPIO_BASE EP93XX_APB_IOMEM(0x00040000)

1061
target/linux/ep93xx/patches-3.3/003-ep93xx_touchscreen.patch Normal file
View File

File diff suppressed because it is too large Load Diff

180
target/linux/ep93xx/patches-3.3/004-simone_add_mmc_spi.patch Normal file
View File

@ -0,0 +1,180 @@
This enables the mmc-over-spi driver for the Sim.One board, based on Mika's
patch, which used a GPIO for chip select in stead of the default SFRMOUT pin.
I've modified it to use the usual SFRMOUT; if you've modified your Sim.One
board to use a GPIO instead, uncomment and modify
// #define MMC_CHIP_SELECT_GPIO EP93XX_GPIO_LINE_EGPIO15
in the source file.
-martinwguy, 14 May 2010
From: Mika Westerberg <mika.westerberg@iki.fi>
Date: Wed, 28 Apr 2010 08:42:46 +0300
Subject: [PATCH] ep93xx: simone: added board specific SPI support for MMC/SD cards
This includes setting up EGPIOs 0 and 9 for card detection and chip select
respectively.
--- a/arch/arm/mach-ep93xx/simone.c
+++ b/arch/arm/mach-ep93xx/simone.c
@@ -18,12 +18,17 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
+#include <linux/gpio.h>
#include <linux/i2c.h>
#include <linux/i2c-gpio.h>
+#include <linux/mmc/host.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/mmc_spi.h>
#include <mach/hardware.h>
#include <mach/fb.h>
#include <mach/gpio-ep93xx.h>
+#include <mach/ep93xx_spi.h>
#include <asm/hardware/vic.h>
#include <asm/mach-types.h>
@@ -39,6 +44,135 @@ static struct ep93xxfb_mach_info __initd
.flags = EP93XXFB_USE_SDCSN0 | EP93XXFB_PCLK_FALLING,
};
+/*
+ * GPIO lines used for MMC card detection.
+ */
+#define MMC_CARD_DETECT_GPIO EP93XX_GPIO_LINE_EGPIO0
+
+/*
+ * If you have hacked your Sim.One to use a GPIO as SD card chip select
+ * (SD pin 1), uncomment the following line.
+ * The example, EGPIO15, is on TP17 near the CPU.
+ */
+// #define MMC_CHIP_SELECT_GPIO EP93XX_GPIO_LINE_EGPIO15
+
+/*
+ * MMC SPI chip select GPIO handling. If you are using SFRMOUT (SFRM1) signal,
+ * you can leave these empty and pass NULL as .controller_data.
+ */
+
+#ifdef MMC_CHIP_SELECT_GPIO
+static int simone_mmc_spi_setup(struct spi_device *spi)
+{
+ unsigned int gpio = MMC_CHIP_SELECT_GPIO;
+ int err;
+
+ err = gpio_request(gpio, spi->modalias);
+ if (err)
+ return err;
+
+ err = gpio_direction_output(gpio, 1);
+ if (err) {
+ gpio_free(gpio);
+ return err;
+ }
+
+ return 0;
+}
+
+static void simone_mmc_spi_cleanup(struct spi_device *spi)
+{
+ unsigned int gpio = MMC_CHIP_SELECT_GPIO;
+
+ gpio_set_value(gpio, 1);
+ gpio_direction_input(gpio);
+ gpio_free(gpio);
+}
+
+static void simone_mmc_spi_cs_control(struct spi_device *spi, int value)
+{
+ gpio_set_value(MMC_CHIP_SELECT_GPIO, value);
+}
+
+static struct ep93xx_spi_chip_ops simone_mmc_spi_ops = {
+ .setup = simone_mmc_spi_setup,
+ .cleanup = simone_mmc_spi_cleanup,
+ .cs_control = simone_mmc_spi_cs_control,
+};
+#endif
+
+/*
+ * MMC card detection GPIO setup.
+ */
+static int simone_mmc_spi_init(struct device *dev,
+ irqreturn_t (*irq_handler)(int, void *), void *mmc)
+{
+ unsigned int gpio = MMC_CARD_DETECT_GPIO;
+ int irq, err;
+
+ err = gpio_request(gpio, dev_name(dev));
+ if (err)
+ return err;
+
+ err = gpio_direction_input(gpio);
+ if (err)
+ goto fail;
+
+ irq = gpio_to_irq(gpio);
+ if (irq < 0)
+ goto fail;
+
+ err = request_irq(irq, irq_handler, IRQF_TRIGGER_FALLING,
+ "MMC card detect", mmc);
+ if (err)
+ goto fail;
+
+ printk(KERN_INFO "%s: using irq %d for MMC card detection\n",
+ dev_name(dev), irq);
+
+ return 0;
+fail:
+ gpio_free(gpio);
+ return err;
+}
+
+static void simone_mmc_spi_exit(struct device *dev, void *mmc)
+{
+ unsigned int gpio = MMC_CARD_DETECT_GPIO;
+
+ free_irq(gpio_to_irq(gpio), mmc);
+ gpio_free(gpio);
+}
+
+static struct mmc_spi_platform_data simone_mmc_spi_data = {
+ .init = simone_mmc_spi_init,
+ .exit = simone_mmc_spi_exit,
+ .detect_delay = 500,
+ .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
+};
+
+static struct spi_board_info simone_spi_devices[] __initdata = {
+ {
+ .modalias = "mmc_spi",
+#ifdef MMC_CHIP_SELECT_GPIO
+ .controller_data = &simone_mmc_spi_ops,
+#endif
+ .platform_data = &simone_mmc_spi_data,
+ /*
+ * We use 10 MHz even though the maximum is 3.7 MHz. The driver
+ * will limit it automatically to max. frequency.
+ */
+ .max_speed_hz = 10 * 1000 * 1000,
+ .bus_num = 0,
+ .chip_select = 0,
+ .mode = SPI_MODE_3,
+ },
+};
+
+static struct ep93xx_spi_info simone_spi_info __initdata = {
+ .num_chipselect = ARRAY_SIZE(simone_spi_devices),
+};
+
static struct i2c_gpio_platform_data __initdata simone_i2c_gpio_data = {
.sda_pin = EP93XX_GPIO_LINE_EEDAT,
.sda_is_open_drain = 0,
@@ -73,6 +207,8 @@ static void __init simone_init_machine(v
ep93xx_register_fb(&simone_fb_info);
ep93xx_register_i2c(&simone_i2c_gpio_data, simone_i2c_board_info,
ARRAY_SIZE(simone_i2c_board_info));
+ ep93xx_register_spi(&simone_spi_info, simone_spi_devices,
+ ARRAY_SIZE(simone_spi_devices));
simone_register_audio();
}