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Code

jz4740: Some restrucuring to prepare for regs.h and ops.h removal

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This commit is contained in:
Lars-Peter Clausen 2009-11-20 19:36:33 +01:00
parent 1ac22689b8
commit a5b5e808a5
22 changed files with 105 additions and 166 deletions
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2
target/linux/xburst/files-2.6.31/arch/mips/include/asm/mach-jz4740/clock.h
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@ -15,6 +15,8 @@
#ifndef __ASM_JZ4740_CLOCK_H__
#define __ASM_JZ4740_CLOCK_H__
#include <asm/mach-jz4740/ops.h>
#ifndef JZ_EXTAL
//#define JZ_EXTAL 3686400 /* 3.6864 MHz */
#define JZ_EXTAL 12000000 /* 3.6864 MHz */

4
target/linux/xburst/files-2.6.31/arch/mips/include/asm/mach-jz4740/dma.h
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@ -19,7 +19,8 @@
#include <asm/io.h> /* need byte IO */
#include <linux/spinlock.h> /* And spinlocks */
#include <linux/delay.h>
#include <asm/system.h>
#include <asm/mach-jz4740/regs.h>
#include <asm/mach-jz4740/ops.h>
/*
* Descriptor structure for JZ4740 DMA engine
@ -167,7 +168,6 @@ extern void disable_dma(unsigned int dmanr);
extern void set_dma_addr(unsigned int dmanr, unsigned int phyaddr);
extern void set_dma_count(unsigned int dmanr, unsigned int bytecnt);
extern void set_dma_mode(unsigned int dmanr, unsigned int mode);
extern void jz_set_oss_dma(unsigned int dmanr, unsigned int mode, unsigned int audio_fmt);
extern void jz_set_alsa_dma(unsigned int dmanr, unsigned int mode, unsigned int audio_fmt);
extern unsigned int get_dma_residue(unsigned int dmanr);

49
target/linux/xburst/files-2.6.31/arch/mips/include/asm/mach-jz4740/irq.h Normal file
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@ -0,0 +1,49 @@
#ifndef __JZ4740_IRQ_H__
#define __JZ4740_IRQ_H__
/*
* JZ4740 irqs.
*
* Copyright (C) 2009, Lars-Peter Clausen <lars@metafoo.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#define JZ_IRQ_BASE 8
// 1st-level interrupts
#define JZ_IRQ(x) (JZ_IRQ_BASE + (x))
#define JZ_IRQ_I2C JZ_IRQ(1)
#define JZ_IRQ_UHC JZ_IRQ(3)
#define JZ_IRQ_UART1 JZ_IRQ(8)
#define JZ_IRQ_UART0 JZ_IRQ(9)
#define JZ_IRQ_SADC JZ_IRQ(12)
#define JZ_IRQ_MSC JZ_IRQ(14)
#define JZ_IRQ_RTC JZ_IRQ(15)
#define JZ_IRQ_SSI JZ_IRQ(16)
#define JZ_IRQ_CIM JZ_IRQ(17)
#define JZ_IRQ_AIC JZ_IRQ(18)
#define JZ_IRQ_ETH JZ_IRQ(19)
#define JZ_IRQ_DMAC JZ_IRQ(20)
#define JZ_IRQ_TCU2 JZ_IRQ(21)
#define JZ_IRQ_TCU1 JZ_IRQ(22)
#define JZ_IRQ_TCU0 JZ_IRQ(23)
#define JZ_IRQ_UDC JZ_IRQ(24)
#define JZ_IRQ_GPIO3 JZ_IRQ(25)
#define JZ_IRQ_GPIO2 JZ_IRQ(26)
#define JZ_IRQ_GPIO1 JZ_IRQ(27)
#define JZ_IRQ_GPIO0 JZ_IRQ(28)
#define JZ_IRQ_IPU JZ_IRQ(29)
#define JZ_IRQ_LCD JZ_IRQ(30)
/* 2nd-level interrupts */
#define JZ_IRQ_DMA(x) ((x) + JZ_IRQ(32)) /* 32 to 37 for DMAC channel 0 to 5 */
#define JZ_IRQ_GPIO_0 JZ_IRQ(48) /* 48 to 175 for GPIO pin 0 to 127 */
#define JZ_IRQ_INTC_GPIO(x) (JZ_IRQ_GPIO0 - (x))
#define JZ_IRQ_GPIO(x) ((x) + JZ_IRQ(48)
#define NR_IRQS (JZ_IRQ_GPIO(127) + 1)
#endif

1
target/linux/xburst/files-2.6.31/arch/mips/include/asm/mach-jz4740/jz4740.h
View File

@ -22,6 +22,7 @@
/*------------------------------------------------------------------
* Platform definitions
*/
#ifdef CONFIG_JZ4740_QI_LB60
#include <asm/mach-jz4740/board-qi_lb60.h>
#endif

2
target/linux/xburst/files-2.6.31/arch/mips/include/asm/mach-jz4740/ops.h
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@ -16,6 +16,8 @@
#ifndef __JZ4740_OPS_H__
#define __JZ4740_OPS_H__
#include <asm/mach-jz4740/regs.h>
/*
* Definition of Module Operations
*/

33
target/linux/xburst/files-2.6.31/arch/mips/include/asm/mach-jz4740/regs.h
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@ -68,39 +68,6 @@
#define REG_INTC_IMCR REG32(INTC_IMCR)
#define REG_INTC_IPR REG32(INTC_IPR)
// 1st-level interrupts
#define JZ_IRQ_BASE 8
#define JZ_IRQ(x) (JZ_IRQ_BASE + (x))
#define JZ_IRQ_I2C JZ_IRQ(1)
#define JZ_IRQ_UHC JZ_IRQ(3)
#define JZ_IRQ_UART1 JZ_IRQ(8)
#define JZ_IRQ_UART0 JZ_IRQ(9)
#define JZ_IRQ_SADC JZ_IRQ(12)
#define JZ_IRQ_MSC JZ_IRQ(14)
#define JZ_IRQ_RTC JZ_IRQ(15)
#define JZ_IRQ_SSI JZ_IRQ(16)
#define JZ_IRQ_CIM JZ_IRQ(17)
#define JZ_IRQ_AIC JZ_IRQ(18)
#define JZ_IRQ_ETH JZ_IRQ(19)
#define JZ_IRQ_DMAC JZ_IRQ(20)
#define JZ_IRQ_TCU2 JZ_IRQ(21)
#define JZ_IRQ_TCU1 JZ_IRQ(22)
#define JZ_IRQ_TCU0 JZ_IRQ(23)
#define JZ_IRQ_UDC JZ_IRQ(24)
#define JZ_IRQ_GPIO3 JZ_IRQ(25)
#define JZ_IRQ_GPIO2 JZ_IRQ(26)
#define JZ_IRQ_GPIO1 JZ_IRQ(27)
#define JZ_IRQ_GPIO0 JZ_IRQ(28)
#define JZ_IRQ_IPU JZ_IRQ(29)
#define JZ_IRQ_LCD JZ_IRQ(30)
/* 2nd-level interrupts */
#define JZ_IRQ_DMA(x) ((x) + JZ_IRQ(32)) /* 32 to 37 for DMAC channel 0 to 5 */
#define IRQ_GPIO_0 JZ_IRQ(48) /* 48 to 175 for GPIO pin 0 to 127 */
#define JZ_IRQ_INTC_GPIO(x) (JZ_IRQ_GPIO0 - (x))
#define JZ_IRQ_GPIO(x) (IRQ_GPIO_0 + (x))
#define NUM_DMA 6
#define NUM_GPIO 128
/*************************************************************************

16
target/linux/xburst/files-2.6.31/arch/mips/jz4740/board-qi_lb60.c
View File

@ -28,6 +28,7 @@
#include <linux/spi/spi_gpio.h>
#include <linux/power_supply.h>
#include <linux/power/jz4740-battery.h>
#include <linux/mmc/jz4740_mmc.h>
/* NAND */
@ -325,12 +326,12 @@ static struct platform_device qi_lb60_gpio_keys = {
.platform_data = &qi_lb60_gpio_keys_data,
}
};
/*
static struct jz_mmc_platform_data jz_mmc_pdata = {
.card_detect_gpio = JZ_GPIO_PORTD(0),
.read_only_gpio = JZ_GPIO_PORTD(16),
.power_gpio = JZ_GPIO_PORTD(2),
};*/
static struct jz4740_mmc_platform_data qi_lb60_mmc_pdata = {
.gpio_card_detect = JZ_GPIO_PORTD(0),
.gpio_read_only = JZ_GPIO_PORTD(16),
.gpio_power = JZ_GPIO_PORTD(2),
};
static struct platform_device *jz_platform_devices[] __initdata = {
&jz4740_usb_ohci_device,
@ -362,6 +363,7 @@ static int __init qi_lb60_init_platform_devices(void)
jz4740_framebuffer_device.dev.platform_data = &qi_lb60_fb_pdata;
jz4740_nand_device.dev.platform_data = &qi_lb60_nand_pdata;
jz4740_battery_device.dev.platform_data = &qi_lb60_battery_pdata;
jz4740_mmc_device.dev.platform_data = &qi_lb60_mmc_pdata;
spi_register_board_info(qi_lb60_spi_board_info,
ARRAY_SIZE(qi_lb60_spi_board_info));
@ -371,12 +373,14 @@ static int __init qi_lb60_init_platform_devices(void)
}
extern int jz_gpiolib_init(void);
extern int jz_init_clocks(unsigned long extal);
static int __init qi_lb60_board_setup(void)
{
printk("Qi Hardware JZ4740 QI_LB60 setup\n");
if (jz_gpiolib_init())
panic("Failed to initalize jz gpio\n");
jz_init_clocks(12000000);
board_gpio_setup();

6
target/linux/xburst/files-2.6.31/arch/mips/jz4740/clock.c
View File

@ -473,6 +473,8 @@ static int jz_clk_ldclk_set_rate(struct clk *clk, unsigned long rate)
jz_clk_reg_write_mask(JZ_REG_CLOCK_CTRL, div << JZ_CLOCK_CTRL_LDIV_OFFSET,
JZ_CLOCK_CTRL_LDIV_MASK);
return 0;
}
static unsigned long jz_clk_ldclk_get_rate(struct clk *clk)
@ -704,8 +706,8 @@ struct clk *clk_get(struct device *dev, const char *name)
struct clk *clk;
list_for_each_entry(clk, &jz_clocks, list) {
if (strcmp(clk->name, name))
return clk;
if (strcmp(clk->name, name) == 0)
return clk;
}
return ERR_PTR(-ENOENT);
}

24
target/linux/xburst/files-2.6.31/arch/mips/jz4740/cpufreq.c
View File

@ -17,7 +17,8 @@
#include <linux/cpufreq.h>
#include <asm/jzsoc.h>
#include <asm/mach-jz4740/regs.h>
#include <asm/mach-jz4740/clock.h>
#include <asm/processor.h>
#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
@ -70,24 +71,6 @@ struct dpm_regs {
u32 pll_up_flag; /* New PLL freq is higher than current or not */
};
extern jz_clocks_t jz_clocks;
static void jz_update_clocks(void)
{
/* Next clocks must be updated if we have changed
* the PLL or divisors.
*/
jz_clocks.cclk = __cpm_get_cclk();
jz_clocks.hclk = __cpm_get_hclk();
jz_clocks.mclk = __cpm_get_mclk();
jz_clocks.pclk = __cpm_get_pclk();
jz_clocks.lcdclk = __cpm_get_lcdclk();
jz_clocks.pixclk = __cpm_get_pixclk();
jz_clocks.i2sclk = __cpm_get_i2sclk();
jz_clocks.usbclk = __cpm_get_usbclk();
jz_clocks.mscclk = __cpm_get_mscclk();
}
static void
jz_init_boot_config(void)
{
@ -434,9 +417,6 @@ static void jz4740_transition(struct dpm_regs *regs)
REG_LCD_CTRL &= ~LCD_CTRL_DIS;
REG_LCD_CTRL |= LCD_CTRL_ENA;
#endif
/* Update system clocks */
jz_update_clocks();
}
extern unsigned int idle_times;

40
target/linux/xburst/files-2.6.31/arch/mips/jz4740/dma.c
View File

@ -21,14 +21,14 @@
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/spinlock.h>
#include <linux/string.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/soundcard.h>
#include <asm/system.h>
#include <asm/addrspace.h>
#include <asm/jzsoc.h>
#include <asm/mach-jz4740/regs.h>
#include <asm/mach-jz4740/ops.h>
#include <asm/mach-jz4740/dma.h>
#define JZ_REG_DMA_SRC_ADDR(x) ((x) * 0x20 + 0x00)
#define JZ_REG_DMA_DEST_ADDR(x) ((x) * 0x20 + 0x04)
@ -501,39 +501,6 @@ unsigned int get_dma_residue(unsigned int dmanr)
return count;
}
void jz_set_oss_dma(unsigned int dmanr, unsigned int mode, unsigned int audio_fmt)
{
struct jz_dma_chan *chan = get_dma_chan(dmanr);
if (!chan)
return;
switch (audio_fmt) {
case AFMT_U8:
/* burst mode : 32BIT */
break;
case AFMT_S16_LE:
/* burst mode : 16BYTE */
if (mode == DMA_MODE_READ) {
chan->mode = DMA_AIC_32_16BYTE_RX_CMD | DMA_MODE_READ;
chan->mode |= mode & ~(DMAC_DCMD_SAI | DMAC_DCMD_DAI);
mode &= DMA_MODE_MASK;
chan->mode |= DMAC_DCMD_DAI;
chan->mode &= ~DMAC_DCMD_SAI;
} else if (mode == DMA_MODE_WRITE) {
chan->mode = DMA_AIC_32_16BYTE_TX_CMD | DMA_MODE_WRITE;
chan->mode |= mode & ~(DMAC_DCMD_SAI | DMAC_DCMD_DAI);
mode &= DMA_MODE_MASK;
chan->mode |= DMAC_DCMD_SAI;
chan->mode &= ~DMAC_DCMD_DAI;
} else
printk("oss_dma_burst_mode() just supports DMA_MODE_READ or DMA_MODE_WRITE!\n");
jz_dma_write(JZ_REG_DMA_CMD(chan->io), chan->mode & ~DMA_MODE_MASK);
jz_dma_write(JZ_REG_DMA_TYPE(chan->io), chan->source);
break;
}
}
void jz_set_alsa_dma(unsigned int dmanr, unsigned int mode, unsigned int audio_fmt)
{
@ -912,7 +879,6 @@ EXPORT_SYMBOL(jz_set_dma_dest_width);
EXPORT_SYMBOL(jz_set_dma_block_size);
EXPORT_SYMBOL(jz_set_dma_mode);
EXPORT_SYMBOL(set_dma_mode);
EXPORT_SYMBOL(jz_set_oss_dma);
EXPORT_SYMBOL(jz_set_alsa_dma);
EXPORT_SYMBOL(set_dma_addr);
EXPORT_SYMBOL(set_dma_count);

14
target/linux/xburst/files-2.6.31/arch/mips/jz4740/irq.c
View File

@ -11,28 +11,20 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <asm/mach-jz4740/irq.h>
#include <linux/irq.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/kernel_stat.h>
#include <linux/module.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/timex.h>
#include <linux/slab.h>
#include <linux/random.h>
#include <linux/delay.h>
#include <linux/bitops.h>
#include <asm/bootinfo.h>
#include <asm/io.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
#include <asm/jzsoc.h>
#include <asm/mach-generic/irq.h>
#include <asm/irq_cpu.h>
static void __iomem *jz_intc_base;

5
target/linux/xburst/files-2.6.31/arch/mips/jz4740/platform.c
View File

@ -15,7 +15,8 @@
#include <linux/resource.h>
#include <asm/mach-jz4740/platform.h>
#include <asm/jzsoc.h>
#include <asm/mach-jz4740/regs.h>
#include <asm/mach-jz4740/irq.h>
/* OHCI (USB full speed host controller) */
static struct resource jz4740_usb_ohci_resources[] = {
@ -89,7 +90,7 @@ static struct resource jz4740_mmc_resources[] = {
static u64 jz4740_mmc_dmamask = ~(u32)0;
struct platform_device jz4740_mmc_device = {
.name = "jz-mmc",
.name = "jz4740-mmc",
.id = 0,
.dev = {
.dma_mask = &jz4740_mmc_dmamask,

5
target/linux/xburst/files-2.6.31/arch/mips/jz4740/pm.c
View File

@ -23,9 +23,9 @@
#include <linux/init.h>
#include <linux/pm.h>
#include <linux/sysctl.h>
#include <linux/delay.h>
#include <linux/suspend.h>
#include <asm/jzsoc.h>
#include <asm/mach-jz4740/regs.h>
extern void jz4740_intc_suspend(void);
extern void jz4740_intc_resume(void);
@ -37,7 +37,6 @@ static int jz_pm_enter(suspend_state_t state)
unsigned long delta;
unsigned long nfcsr = REG_EMC_NFCSR;
uint32_t scr = REG_CPM_SCR;
uint32_t sleep_gpio_save[7*3];
/* Preserve current time */
delta = xtime.tv_sec - REG_RTC_RSR;

4
target/linux/xburst/files-2.6.31/arch/mips/jz4740/proc.c
View File

@ -29,7 +29,9 @@
#include <linux/page-flags.h>
#include <asm/uaccess.h>
#include <asm/pgtable.h>
#include <asm/jzsoc.h>
#include <asm/mach-jz4740/regs.h>
#include <asm/mach-jz4740/clock.h>
#include <asm/mach-jz4740/ops.h>
//#define DEBUG 1
#undef DEBUG

2
target/linux/xburst/files-2.6.31/arch/mips/jz4740/prom.c
View File

@ -40,7 +40,7 @@
#include <linux/string.h>
#include <asm/bootinfo.h>
#include <asm/jzsoc.h>
#include <asm/mach-jz4740/regs.h>
/* #define DEBUG_CMDLINE */

3
target/linux/xburst/files-2.6.31/arch/mips/jz4740/reset.c
View File

@ -17,7 +17,8 @@
#include <asm/processor.h>
#include <asm/reboot.h>
#include <asm/system.h>
#include <asm/jzsoc.h>
#include <asm/mach-jz4740/regs.h>
#include <asm/mach-jz4740/jz4740.h>
void jz_restart(char *command)
{

48
target/linux/xburst/files-2.6.31/arch/mips/jz4740/setup.c
View File

@ -37,17 +37,10 @@
#include <asm/reboot.h>
#include <asm/pgtable.h>
#include <asm/time.h>
#include <asm/jzsoc.h>
#ifdef CONFIG_PM
#include <asm/suspend.h>
#endif
#ifdef CONFIG_PC_KEYB
#include <asm/keyboard.h>
#endif
jz_clocks_t jz_clocks;
#include <asm/mach-jz4740/regs.h>
#include <asm/mach-jz4740/ops.h>
#include <asm/mach-jz4740/clock.h>
#include <asm/mach-jz4740/serial.h>
extern char * __init prom_getcmdline(void);
extern void __init jz_board_setup(void);
@ -58,40 +51,13 @@ extern void jz_time_init(void);
static void __init sysclocks_setup(void)
{
#ifndef CONFIG_MIPS_JZ_EMURUS /* FPGA */
jz_clocks.cclk = __cpm_get_cclk();
jz_clocks.hclk = __cpm_get_hclk();
jz_clocks.pclk = __cpm_get_pclk();
jz_clocks.mclk = __cpm_get_mclk();
jz_clocks.lcdclk = __cpm_get_lcdclk();
jz_clocks.pixclk = __cpm_get_pixclk();
jz_clocks.i2sclk = __cpm_get_i2sclk();
jz_clocks.usbclk = __cpm_get_usbclk();
jz_clocks.mscclk = __cpm_get_mscclk();
jz_clocks.extalclk = __cpm_get_extalclk();
jz_clocks.rtcclk = __cpm_get_rtcclk();
#else
#define FPGACLK 8000000
jz_clocks.cclk = FPGACLK;
jz_clocks.hclk = FPGACLK;
jz_clocks.pclk = FPGACLK;
jz_clocks.mclk = FPGACLK;
jz_clocks.lcdclk = FPGACLK;
jz_clocks.pixclk = FPGACLK;
jz_clocks.i2sclk = FPGACLK;
jz_clocks.usbclk = FPGACLK;
jz_clocks.mscclk = FPGACLK;
jz_clocks.extalclk = FPGACLK;
jz_clocks.rtcclk = FPGACLK;
#endif
#if 0
printk("CPU clock: %dMHz, System clock: %dMHz, Peripheral clock: %dMHz, Memory clock: %dMHz\n",
(jz_clocks.cclk + 500000) / 1000000,
(jz_clocks.hclk + 500000) / 1000000,
(jz_clocks.pclk + 500000) / 1000000,
(jz_clocks.mclk + 500000) / 1000000);
#endif
}
static void __init soc_cpm_setup(void)
@ -139,7 +105,7 @@ static void __init jz_serial_setup(void)
s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
s.iotype = SERIAL_IO_MEM;
s.regshift = 2;
s.uartclk = jz_clocks.extalclk ;
s.uartclk = JZ_EXTAL;
s.line = 0;
s.membase = (u8 *)UART0_BASE;

3
target/linux/xburst/files-2.6.31/arch/mips/jz4740/time.c
View File

@ -26,7 +26,8 @@
#include <linux/clockchips.h>
#include <asm/time.h>
#include <asm/jzsoc.h>
#include <asm/mach-jz4740/regs.h>
#include <asm/mach-jz4740/jz4740.h>
/* This is for machines which generate the exact clock. */

2
target/linux/xburst/files-2.6.31/drivers/mmc/host/jz_mmc.c
View File

@ -27,7 +27,7 @@
#include <asm/io.h>
#include <asm/scatterlist.h>
#include <asm/jzsoc.h>
#include <asm/mach-jz4740/jz4740.h>
#include "jz_mmc.h"

3
target/linux/xburst/files-2.6.31/drivers/usb/gadget/jz4740_udc.c
View File

@ -37,7 +37,8 @@
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/system.h>
#include <asm/jzsoc.h>
#include <asm/mach-jz4740/regs.h>
#include <asm/mach-jz4740/clock.h>
#include "jz4740_udc.h"

3
target/linux/xburst/files-2.6.31/sound/soc/jz4740/jz4740-i2s.c
View File

@ -18,6 +18,9 @@
#include <sound/initval.h>
#include <sound/soc.h>
#include <asm/mach-jz4740/regs.h>
#include <asm/mach-jz4740/ops.h>
#include "jz4740-pcm.h"
#include "jz4740-i2s.h"

2
target/linux/xburst/files-2.6.31/sound/soc/jz4740/jz4740-pcm.h
View File

@ -8,7 +8,7 @@
#ifndef _JZ4740_PCM_H
#define _JZ4740_PCM_H
#include <asm/jzsoc.h>
#include <asm/mach-jz4740/dma.h>
#define ST_RUNNING (1<<0)
#define ST_OPENED (1<<1)