qi-hardware/openwrt-xburst
1
0
Fork 0
mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2024-11-27 17:15:00 +02:00
Code

generic: ar8216: add sgmii_delay_en field to ar8327_platform_data

Browse Source 
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34881 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
juhosg 2012-12-25 18:45:31 +00:00
parent ffbe131263
commit a735287d68
3 changed files with 5 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
target/linux/generic/files/drivers/net/phy/ar8216.c
View File

@ -917,6 +917,9 @@ ar8327_get_pad_cfg(struct ar8327_pad_cfg *cfg)
if (cfg->txclk_delay_en) if (cfg->txclk_delay_en)
t |= AR8327_PAD_RGMII_TXCLK_DELAY_EN; t |= AR8327_PAD_RGMII_TXCLK_DELAY_EN;
if (cfg->sgmii_delay_en)
t |= AR8327_PAD_SGMII_DELAY_EN;
break; break;
case AR8327_PAD_MAC2PHY_MII: case AR8327_PAD_MAC2PHY_MII:

1
target/linux/generic/files/drivers/net/phy/ar8216.h
View File

@ -281,6 +281,7 @@
#define AR8327_PAD_PHYX_GMII_EN BIT(16) #define AR8327_PAD_PHYX_GMII_EN BIT(16)
#define AR8327_PAD_PHYX_RGMII_EN BIT(17) #define AR8327_PAD_PHYX_RGMII_EN BIT(17)
#define AR8327_PAD_PHYX_MII_EN BIT(18) #define AR8327_PAD_PHYX_MII_EN BIT(18)
#define AR8327_PAD_SGMII_DELAY_EN BIT(19)
#define AR8327_PAD_RGMII_RXCLK_DELAY_SEL BITS(20, 2) #define AR8327_PAD_RGMII_RXCLK_DELAY_SEL BITS(20, 2)
#define AR8327_PAD_RGMII_RXCLK_DELAY_SEL_S 20 #define AR8327_PAD_RGMII_RXCLK_DELAY_SEL_S 20
#define AR8327_PAD_RGMII_TXCLK_DELAY_SEL BITS(22, 2) #define AR8327_PAD_RGMII_TXCLK_DELAY_SEL BITS(22, 2)

1
target/linux/generic/files/include/linux/ar8216_platform.h
View File

@ -44,6 +44,7 @@ struct ar8327_pad_cfg {
bool pipe_rxclk_sel; bool pipe_rxclk_sel;
bool txclk_delay_en; bool txclk_delay_en;
bool rxclk_delay_en; bool rxclk_delay_en;
bool sgmii_delay_en;
enum ar8327_clk_delay_sel txclk_delay_sel; enum ar8327_clk_delay_sel txclk_delay_sel;
enum ar8327_clk_delay_sel rxclk_delay_sel; enum ar8327_clk_delay_sel rxclk_delay_sel;
}; };