mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2025-04-21 12:27:27 +03:00
change prefix for kernelpatchbase 2.6.26
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@13619 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
@@ -0,0 +1,167 @@
|
||||
From 0535fda1958587000a4abe711a50d221e0f82379 Mon Sep 17 00:00:00 2001
|
||||
From: Andy Green <andy@openmoko.com>
|
||||
Date: Fri, 25 Jul 2008 23:16:57 +0100
|
||||
Subject: [PATCH] fix-s3c2410-serial-fwd-ref.patch.patch
|
||||
|
||||
Signed-off-by: Andy Green <andy@openmoko.com>
|
||||
---
|
||||
drivers/serial/s3c2410.c | 129 +++++++++++++++++++++++----------------------
|
||||
1 files changed, 66 insertions(+), 63 deletions(-)
|
||||
|
||||
diff --git a/drivers/serial/s3c2410.c b/drivers/serial/s3c2410.c
|
||||
index f20f63b..b4833bd 100644
|
||||
--- a/drivers/serial/s3c2410.c
|
||||
+++ b/drivers/serial/s3c2410.c
|
||||
@@ -1167,6 +1167,10 @@ static int s3c24xx_serial_resume(struct platform_device *dev)
|
||||
#define s3c24xx_serial_resume NULL
|
||||
#endif
|
||||
|
||||
+static void s3c24xx_serial_force_debug_port_up(void);
|
||||
+static void s3c2410_printascii(const char *sz);
|
||||
+
|
||||
+
|
||||
static int s3c24xx_serial_init(struct platform_driver *drv,
|
||||
struct s3c24xx_uart_info *info)
|
||||
{
|
||||
@@ -1521,6 +1525,68 @@ static struct platform_driver s3c2440_serial_drv = {
|
||||
};
|
||||
|
||||
|
||||
+static void s3c24xx_serial_force_debug_port_up(void)
|
||||
+{
|
||||
+ struct s3c24xx_uart_port *ourport = &s3c24xx_serial_ports[
|
||||
+ CONFIG_DEBUG_S3C_UART];
|
||||
+ struct s3c24xx_uart_clksrc *clksrc = NULL;
|
||||
+ struct clk *clk = NULL;
|
||||
+ unsigned long tmp;
|
||||
+
|
||||
+ s3c24xx_serial_getclk(&ourport->port, &clksrc, &clk, 115200);
|
||||
+
|
||||
+ tmp = __raw_readl(S3C2410_CLKCON);
|
||||
+
|
||||
+ /* re-start uart clocks */
|
||||
+ tmp |= S3C2410_CLKCON_UART0;
|
||||
+ tmp |= S3C2410_CLKCON_UART1;
|
||||
+ tmp |= S3C2410_CLKCON_UART2;
|
||||
+
|
||||
+ __raw_writel(tmp, S3C2410_CLKCON);
|
||||
+ udelay(10);
|
||||
+
|
||||
+ s3c24xx_serial_setsource(&ourport->port, clksrc);
|
||||
+
|
||||
+ if (ourport->baudclk != NULL && !IS_ERR(ourport->baudclk)) {
|
||||
+ clk_disable(ourport->baudclk);
|
||||
+ ourport->baudclk = NULL;
|
||||
+ }
|
||||
+
|
||||
+ clk_enable(clk);
|
||||
+
|
||||
+ ourport->clksrc = clksrc;
|
||||
+ ourport->baudclk = clk;
|
||||
+}
|
||||
+
|
||||
+static void s3c2410_printascii(const char *sz)
|
||||
+{
|
||||
+ struct s3c24xx_uart_port *ourport = &s3c24xx_serial_ports[
|
||||
+ CONFIG_DEBUG_S3C_UART];
|
||||
+ struct uart_port *port = &ourport->port;
|
||||
+
|
||||
+ /* 8 N 1 */
|
||||
+ wr_regl(port, S3C2410_ULCON, (rd_regl(port, S3C2410_ULCON)) | 3);
|
||||
+ /* polling mode */
|
||||
+ wr_regl(port, S3C2410_UCON, (rd_regl(port, S3C2410_UCON) & ~0xc0f) | 5);
|
||||
+ /* disable FIFO */
|
||||
+ wr_regl(port, S3C2410_UFCON, (rd_regl(port, S3C2410_UFCON) & ~0x01));
|
||||
+ /* fix baud rate */
|
||||
+ wr_regl(port, S3C2410_UBRDIV, 26);
|
||||
+
|
||||
+ while (*sz) {
|
||||
+ int timeout = 10000000;
|
||||
+
|
||||
+ /* spin on it being busy */
|
||||
+ while ((!(rd_regl(port, S3C2410_UTRSTAT) & 2)) && timeout--)
|
||||
+ ;
|
||||
+
|
||||
+ /* transmit register */
|
||||
+ wr_regl(port, S3C2410_UTXH, *sz);
|
||||
+
|
||||
+ sz++;
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
static inline int s3c2440_serial_init(void)
|
||||
{
|
||||
return s3c24xx_serial_init(&s3c2440_serial_drv, &s3c2440_uart_inf);
|
||||
@@ -1654,69 +1720,6 @@ static struct platform_driver s3c2412_serial_drv = {
|
||||
},
|
||||
};
|
||||
|
||||
-static void s3c24xx_serial_force_debug_port_up(void)
|
||||
-{
|
||||
- struct s3c24xx_uart_port *ourport = &s3c24xx_serial_ports[
|
||||
- CONFIG_DEBUG_S3C_UART];
|
||||
- struct s3c24xx_uart_clksrc *clksrc = NULL;
|
||||
- struct clk *clk = NULL;
|
||||
- unsigned long tmp;
|
||||
-
|
||||
- s3c24xx_serial_getclk(&ourport->port, &clksrc, &clk, 115200);
|
||||
-
|
||||
- tmp = __raw_readl(S3C2410_CLKCON);
|
||||
-
|
||||
- /* re-start uart clocks */
|
||||
- tmp |= S3C2410_CLKCON_UART0;
|
||||
- tmp |= S3C2410_CLKCON_UART1;
|
||||
- tmp |= S3C2410_CLKCON_UART2;
|
||||
-
|
||||
- __raw_writel(tmp, S3C2410_CLKCON);
|
||||
- udelay(10);
|
||||
-
|
||||
- s3c24xx_serial_setsource(&ourport->port, clksrc);
|
||||
-
|
||||
- if (ourport->baudclk != NULL && !IS_ERR(ourport->baudclk)) {
|
||||
- clk_disable(ourport->baudclk);
|
||||
- ourport->baudclk = NULL;
|
||||
- }
|
||||
-
|
||||
- clk_enable(clk);
|
||||
-
|
||||
- ourport->clksrc = clksrc;
|
||||
- ourport->baudclk = clk;
|
||||
-}
|
||||
-
|
||||
-static void s3c2410_printascii(const char *sz)
|
||||
-{
|
||||
- struct s3c24xx_uart_port *ourport = &s3c24xx_serial_ports[
|
||||
- CONFIG_DEBUG_S3C_UART];
|
||||
- struct uart_port *port = &ourport->port;
|
||||
-
|
||||
- /* 8 N 1 */
|
||||
- wr_regl(port, S3C2410_ULCON, (rd_regl(port, S3C2410_ULCON)) | 3);
|
||||
- /* polling mode */
|
||||
- wr_regl(port, S3C2410_UCON, (rd_regl(port, S3C2410_UCON) & ~0xc0f) | 5);
|
||||
- /* disable FIFO */
|
||||
- wr_regl(port, S3C2410_UFCON, (rd_regl(port, S3C2410_UFCON) & ~0x01));
|
||||
- /* fix baud rate */
|
||||
- wr_regl(port, S3C2410_UBRDIV, 26);
|
||||
-
|
||||
- while (*sz) {
|
||||
- int timeout = 10000000;
|
||||
-
|
||||
- /* spin on it being busy */
|
||||
- while ((!(rd_regl(port, S3C2410_UTRSTAT) & 2)) && timeout--)
|
||||
- ;
|
||||
-
|
||||
- /* transmit register */
|
||||
- wr_regl(port, S3C2410_UTXH, *sz);
|
||||
-
|
||||
- sz++;
|
||||
- }
|
||||
-}
|
||||
-
|
||||
-
|
||||
/* s3c24xx_serial_resetport
|
||||
*
|
||||
* wrapper to call the specific reset for this port (reset the fifos
|
||||
--
|
||||
1.5.6.3
|
||||
|
||||
Reference in New Issue
Block a user