mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2025-04-21 12:27:27 +03:00
[brcm63xx] move files to files-2.6.30, to ease newer kernel integration
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@19471 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
florian
@@ -1,35 +0,0 @@
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menu "CPU support"
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depends on BCM63XX
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config BCM63XX_CPU_6338
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bool "support 6338 CPU"
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select HW_HAS_PCI
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select USB_ARCH_HAS_OHCI
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select USB_ARCH_HAS_UDC
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select USB_OHCI_BIG_ENDIAN_DESC
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select USB_OHCI_BIG_ENDIAN_MMIO
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config BCM63XX_CPU_6345
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bool "support 6345 CPU"
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select USB_OHCI_BIG_ENDIAN_DESC
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select USB_OHCI_BIG_ENDIAN_MMIO
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config BCM63XX_CPU_6348
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bool "support 6348 CPU"
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select HW_HAS_PCI
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select USB_ARCH_HAS_OHCI
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select USB_ARCH_HAS_UDC
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select USB_OHCI_BIG_ENDIAN_DESC
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select USB_OHCI_BIG_ENDIAN_MMIO
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config BCM63XX_CPU_6358
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bool "support 6358 CPU"
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select HW_HAS_PCI
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select USB_ARCH_HAS_OHCI
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select USB_OHCI_BIG_ENDIAN_DESC
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select USB_OHCI_BIG_ENDIAN_MMIO
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select USB_ARCH_HAS_EHCI
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select USB_EHCI_BIG_ENDIAN_MMIO
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endmenu
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source "arch/mips/bcm63xx/boards/Kconfig"
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@@ -1,13 +0,0 @@
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obj-y += clk.o cpu.o cs.o gpio.o irq.o prom.o setup.o timer.o
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obj-y += dev-uart.o
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obj-y += dev-pcmcia.o
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obj-y += dev-usb-ohci.o
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obj-y += dev-usb-ehci.o
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obj-y += dev-usb-udc.o
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obj-y += dev-enet.o
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obj-y += dev-wdt.o
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obj-y += dev-spi.o
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obj-y += dev-dsp.o
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obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
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obj-y += boards/
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@@ -1,15 +0,0 @@
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choice
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prompt "Board support"
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depends on BCM63XX
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default BOARD_BCM963XX
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config BOARD_BCM963XX
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bool "Generic Broadcom 963xx boards"
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help
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config BOARD_LIVEBOX
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bool "Inventel Livebox(es) boards"
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help
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Boards using RedBoot.
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endchoice
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@@ -1,2 +0,0 @@
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obj-$(CONFIG_BOARD_BCM963XX) += board_bcm963xx.o
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obj-$(CONFIG_BOARD_LIVEBOX) += board_livebox.o
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File diff suppressed because it is too large
Load Diff
@@ -1,227 +0,0 @@
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/physmap.h>
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#include <asm/addrspace.h>
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#include <bcm63xx_board.h>
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#include <bcm63xx_cpu.h>
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#include <bcm63xx_regs.h>
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#include <bcm63xx_io.h>
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#include <bcm63xx_board.h>
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#include <bcm63xx_dev_pci.h>
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#include <bcm63xx_dev_uart.h>
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#include <bcm63xx_dev_wdt.h>
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#include <bcm63xx_dev_enet.h>
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#include <bcm63xx_dev_pcmcia.h>
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#include <bcm63xx_dev_usb_ohci.h>
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#include <bcm63xx_dev_usb_ehci.h>
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#include <board_bcm963xx.h>
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#define PFX "board_livebox: "
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static unsigned int mac_addr_used = 0;
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static struct board_info board;
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/*
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* known 6348 boards
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*/
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#ifdef CONFIG_BCM63XX_CPU_6348
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static struct board_info __initdata board_livebox = {
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.name = "Livebox",
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.expected_cpu_id = 0x6348,
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.has_enet0 = 1,
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.has_enet1 = 1,
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.has_pci = 1,
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.enet0 = {
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.has_phy = 1,
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.use_internal_phy = 1,
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},
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.enet1 = {
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.force_speed_100 = 1,
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.force_duplex_full = 1,
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},
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.has_ohci0 = 1,
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.has_pccard = 1,
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.has_ehci0 = 1,
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};
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#endif
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/*
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* all boards
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*/
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static const struct board_info __initdata *bcm963xx_boards[] = {
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#ifdef CONFIG_BCM63XX_CPU_6348
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&board_livebox
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#endif
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};
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/*
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* early init callback
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*/
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void __init board_prom_init(void)
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{
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u32 val;
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/* read base address of boot chip select (0) */
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val = bcm_mpi_readl(MPI_CSBASE_REG(0));
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val &= MPI_CSBASE_BASE_MASK;
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/* assume board is a Livebox */
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memcpy(&board, bcm963xx_boards[0], sizeof(board));
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/* setup pin multiplexing depending on board enabled device,
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* this has to be done this early since PCI init is done
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* inside arch_initcall */
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val = 0;
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if (board.has_pci) {
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bcm63xx_pci_enabled = 1;
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if (BCMCPU_IS_6348())
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val |= GPIO_MODE_6348_G2_PCI;
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}
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if (board.has_pccard) {
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if (BCMCPU_IS_6348())
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val |= GPIO_MODE_6348_G1_MII_PCCARD;
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}
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if (board.has_enet0 && !board.enet0.use_internal_phy) {
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if (BCMCPU_IS_6348())
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val |= GPIO_MODE_6348_G3_EXT_MII |
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GPIO_MODE_6348_G0_EXT_MII;
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}
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if (board.has_enet1 && !board.enet1.use_internal_phy) {
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if (BCMCPU_IS_6348())
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val |= GPIO_MODE_6348_G3_EXT_MII |
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GPIO_MODE_6348_G0_EXT_MII;
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}
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bcm_gpio_writel(val, GPIO_MODE_REG);
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}
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/*
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* second stage init callback, good time to panic if we couldn't
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* identify on which board we're running since early printk is working
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*/
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void __init board_setup(void)
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{
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if (!board.name[0])
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panic("unable to detect bcm963xx board");
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printk(KERN_INFO PFX "board name: %s\n", board.name);
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/* make sure we're running on expected cpu */
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if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
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panic("unexpected CPU for bcm963xx board");
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}
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/*
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* return board name for /proc/cpuinfo
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*/
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const char *board_get_name(void)
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{
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return board.name;
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}
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/*
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* register & return a new board mac address
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*/
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static int board_get_mac_address(u8 *mac)
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{
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u8 default_mac[ETH_ALEN] = {0x00, 0x07, 0x3A, 0x00, 0x00, 0x00};
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u8 *p;
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int count;
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memcpy(mac, default_mac, ETH_ALEN);
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p = mac + ETH_ALEN - 1;
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count = mac_addr_used;
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while (count--) {
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do {
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(*p)++;
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if (*p != 0)
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break;
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p--;
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} while (p != mac);
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}
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if (p == mac) {
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printk(KERN_ERR PFX "unable to fetch mac address\n");
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return -ENODEV;
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}
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mac_addr_used++;
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return 0;
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}
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static struct resource mtd_resources[] = {
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{
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.start = 0, /* filled at runtime */
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.end = 0, /* filled at runtime */
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.flags = IORESOURCE_MEM,
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}
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};
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static struct platform_device mtd_dev = {
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.name = "bcm963xx-flash",
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.resource = mtd_resources,
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.num_resources = ARRAY_SIZE(mtd_resources),
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};
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/*
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* third stage init callback, register all board devices.
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*/
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int __init board_register_devices(void)
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{
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u32 val;
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bcm63xx_uart_register();
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bcm63xx_wdt_register();
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if (board.has_pccard)
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bcm63xx_pcmcia_register();
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if (board.has_enet0 &&
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!board_get_mac_address(board.enet0.mac_addr))
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bcm63xx_enet_register(0, &board.enet0);
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if (board.has_enet1 &&
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!board_get_mac_address(board.enet1.mac_addr))
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bcm63xx_enet_register(1, &board.enet1);
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if (board.has_ohci0)
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bcm63xx_ohci_register();
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if (board.has_ehci0)
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bcm63xx_ehci_register();
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/* read base address of boot chip select (0) */
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val = bcm_mpi_readl(MPI_CSBASE_REG(0));
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val &= MPI_CSBASE_BASE_MASK;
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mtd_resources[0].start = val;
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mtd_resources[0].end = 0x1FFFFFFF;
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platform_device_register(&mtd_dev);
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return 0;
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}
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@@ -1,249 +0,0 @@
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
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*/
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <bcm63xx_cpu.h>
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#include <bcm63xx_io.h>
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#include <bcm63xx_regs.h>
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#include <bcm63xx_clk.h>
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DEFINE_MUTEX(clocks_mutex);
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static void clk_enable_unlocked(struct clk *clk)
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{
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if (clk->set && (clk->usage++) == 0)
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clk->set(clk, 1);
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}
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static void clk_disable_unlocked(struct clk *clk)
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{
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if (clk->set && (--clk->usage) == 0)
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clk->set(clk, 0);
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}
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static void bcm_hwclock_set(u32 mask, int enable)
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{
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u32 reg;
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reg = bcm_perf_readl(PERF_CKCTL_REG);
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if (enable)
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reg |= mask;
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else
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reg &= ~mask;
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bcm_perf_writel(reg, PERF_CKCTL_REG);
|
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}
|
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|
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/*
|
||||
* Ethernet MAC "misc" clock: dma clocks and main clock on 6348
|
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*/
|
||||
static void enet_misc_set(struct clk *clk, int enable)
|
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{
|
||||
u32 mask;
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|
||||
if (BCMCPU_IS_6338())
|
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mask = CKCTL_6338_ENET_EN;
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else if (BCMCPU_IS_6345())
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mask = CKCTL_6345_ENET_EN;
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else if (BCMCPU_IS_6348())
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mask = CKCTL_6348_ENET_EN;
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||||
else
|
||||
/* BCMCPU_IS_6358 */
|
||||
mask = CKCTL_6358_EMUSB_EN;
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||||
bcm_hwclock_set(mask, enable);
|
||||
}
|
||||
|
||||
static struct clk clk_enet_misc = {
|
||||
.set = enet_misc_set,
|
||||
};
|
||||
|
||||
/*
|
||||
* Ethernet MAC clocks: only revelant on 6358, silently enable misc
|
||||
* clocks
|
||||
*/
|
||||
static void enetx_set(struct clk *clk, int enable)
|
||||
{
|
||||
if (enable)
|
||||
clk_enable_unlocked(&clk_enet_misc);
|
||||
else
|
||||
clk_disable_unlocked(&clk_enet_misc);
|
||||
|
||||
if (BCMCPU_IS_6358()) {
|
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u32 mask;
|
||||
|
||||
if (clk->id == 0)
|
||||
mask = CKCTL_6358_ENET0_EN;
|
||||
else
|
||||
mask = CKCTL_6358_ENET1_EN;
|
||||
bcm_hwclock_set(mask, enable);
|
||||
}
|
||||
}
|
||||
|
||||
static struct clk clk_enet0 = {
|
||||
.id = 0,
|
||||
.set = enetx_set,
|
||||
};
|
||||
|
||||
static struct clk clk_enet1 = {
|
||||
.id = 1,
|
||||
.set = enetx_set,
|
||||
};
|
||||
|
||||
/*
|
||||
* Ethernet PHY clock
|
||||
*/
|
||||
static void ephy_set(struct clk *clk, int enable)
|
||||
{
|
||||
if (!BCMCPU_IS_6358())
|
||||
return;
|
||||
bcm_hwclock_set(CKCTL_6358_EPHY_EN, enable);
|
||||
}
|
||||
|
||||
|
||||
static struct clk clk_ephy = {
|
||||
.set = ephy_set,
|
||||
};
|
||||
|
||||
/*
|
||||
* PCM clock
|
||||
*/
|
||||
static void pcm_set(struct clk *clk, int enable)
|
||||
{
|
||||
if (!BCMCPU_IS_6358())
|
||||
return;
|
||||
bcm_hwclock_set(CKCTL_6358_PCM_EN, enable);
|
||||
}
|
||||
|
||||
static struct clk clk_pcm = {
|
||||
.set = pcm_set,
|
||||
};
|
||||
|
||||
/*
|
||||
* USB host clock
|
||||
*/
|
||||
static void usbh_set(struct clk *clk, int enable)
|
||||
{
|
||||
if (!BCMCPU_IS_6348())
|
||||
return;
|
||||
bcm_hwclock_set(CKCTL_6348_USBH_EN, enable);
|
||||
}
|
||||
|
||||
static struct clk clk_usbh = {
|
||||
.set = usbh_set,
|
||||
};
|
||||
|
||||
/*
|
||||
* USB slave clock
|
||||
*/
|
||||
static void usbs_set(struct clk *clk, int enable)
|
||||
{
|
||||
u32 mask;
|
||||
|
||||
switch(bcm63xx_get_cpu_id()) {
|
||||
case BCM6338_CPU_ID: mask = CKCTL_6338_USBS_EN; break;
|
||||
case BCM6345_CPU_ID: mask = CKCTL_6345_USBS_EN; break;
|
||||
case BCM6348_CPU_ID: mask = CKCTL_6348_USBS_EN; break;
|
||||
default:
|
||||
return;
|
||||
}
|
||||
bcm_hwclock_set(mask, enable);
|
||||
}
|
||||
|
||||
static struct clk clk_usbs = {
|
||||
.set = usbs_set,
|
||||
};
|
||||
|
||||
/*
|
||||
* SPI clock
|
||||
*/
|
||||
static void spi_set(struct clk *clk, int enable)
|
||||
{
|
||||
u32 mask;
|
||||
|
||||
if (BCMCPU_IS_6338())
|
||||
mask = CKCTL_6338_SPI_EN;
|
||||
else if (BCMCPU_IS_6348())
|
||||
mask = CKCTL_6348_SPI_EN;
|
||||
else
|
||||
/* BCMCPU_IS_6358 */
|
||||
mask = CKCTL_6358_SPI_EN;
|
||||
bcm_hwclock_set(mask, enable);
|
||||
}
|
||||
|
||||
static struct clk clk_spi = {
|
||||
.set = spi_set,
|
||||
};
|
||||
|
||||
/*
|
||||
* Internal peripheral clock
|
||||
*/
|
||||
static struct clk clk_periph = {
|
||||
.rate = (50 * 1000 * 1000),
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* Linux clock API implementation
|
||||
*/
|
||||
int clk_enable(struct clk *clk)
|
||||
{
|
||||
mutex_lock(&clocks_mutex);
|
||||
clk_enable_unlocked(clk);
|
||||
mutex_unlock(&clocks_mutex);
|
||||
return 0;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(clk_enable);
|
||||
|
||||
void clk_disable(struct clk *clk)
|
||||
{
|
||||
mutex_lock(&clocks_mutex);
|
||||
clk_disable_unlocked(clk);
|
||||
mutex_unlock(&clocks_mutex);
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(clk_disable);
|
||||
|
||||
unsigned long clk_get_rate(struct clk *clk)
|
||||
{
|
||||
return clk->rate;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(clk_get_rate);
|
||||
|
||||
struct clk *clk_get(struct device *dev, const char *id)
|
||||
{
|
||||
if (!strcmp(id, "enet0"))
|
||||
return &clk_enet0;
|
||||
if (!strcmp(id, "enet1"))
|
||||
return &clk_enet1;
|
||||
if (!strcmp(id, "ephy"))
|
||||
return &clk_ephy;
|
||||
if (!strcmp(id, "usbh"))
|
||||
return &clk_usbh;
|
||||
if (!strcmp(id, "usbs"))
|
||||
return &clk_usbs;
|
||||
if (!strcmp(id, "spi"))
|
||||
return &clk_spi;
|
||||
if (!strcmp(id, "periph"))
|
||||
return &clk_periph;
|
||||
if (BCMCPU_IS_6358() && !strcmp(id, "pcm"))
|
||||
return &clk_pcm;
|
||||
return ERR_PTR(-ENOENT);
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(clk_get);
|
||||
|
||||
void clk_put(struct clk *clk)
|
||||
{
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(clk_put);
|
||||
@@ -1,398 +0,0 @@
|
||||
/*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
|
||||
* 2009 Florian Fainelli <florian@openwrt.org>
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/cpu.h>
|
||||
#include <bcm63xx_cpu.h>
|
||||
#include <bcm63xx_regs.h>
|
||||
#include <bcm63xx_io.h>
|
||||
#include <bcm63xx_irq.h>
|
||||
|
||||
const unsigned long *bcm63xx_regs_base;
|
||||
EXPORT_SYMBOL(bcm63xx_regs_base);
|
||||
|
||||
const int *bcm63xx_irqs;
|
||||
EXPORT_SYMBOL(bcm63xx_irqs);
|
||||
|
||||
const unsigned long *bcm63xx_regs_spi;
|
||||
EXPORT_SYMBOL(bcm63xx_regs_spi);
|
||||
|
||||
static u16 bcm63xx_cpu_id;
|
||||
static u16 bcm63xx_cpu_rev;
|
||||
static unsigned int bcm63xx_cpu_freq;
|
||||
static unsigned int bcm63xx_memory_size;
|
||||
|
||||
/*
|
||||
* 6338 register sets and irqs
|
||||
*/
|
||||
|
||||
static const unsigned long bcm96338_regs_base[] = {
|
||||
[RSET_DSL_LMEM] = BCM_6338_DSL_LMEM_BASE,
|
||||
[RSET_PERF] = BCM_6338_PERF_BASE,
|
||||
[RSET_TIMER] = BCM_6338_TIMER_BASE,
|
||||
[RSET_WDT] = BCM_6338_WDT_BASE,
|
||||
[RSET_UART0] = BCM_6338_UART0_BASE,
|
||||
[RSET_GPIO] = BCM_6338_GPIO_BASE,
|
||||
[RSET_SPI] = BCM_6338_SPI_BASE,
|
||||
[RSET_OHCI0] = BCM_6338_OHCI0_BASE,
|
||||
[RSET_OHCI_PRIV] = BCM_6338_OHCI_PRIV_BASE,
|
||||
[RSET_USBH_PRIV] = BCM_6338_USBH_PRIV_BASE,
|
||||
[RSET_UDC0] = BCM_6338_UDC0_BASE,
|
||||
[RSET_MPI] = BCM_6338_MPI_BASE,
|
||||
[RSET_PCMCIA] = BCM_6338_PCMCIA_BASE,
|
||||
[RSET_SDRAM] = BCM_6338_SDRAM_BASE,
|
||||
[RSET_DSL] = BCM_6338_DSL_BASE,
|
||||
[RSET_ENET0] = BCM_6338_ENET0_BASE,
|
||||
[RSET_ENET1] = BCM_6338_ENET1_BASE,
|
||||
[RSET_ENETDMA] = BCM_6338_ENETDMA_BASE,
|
||||
[RSET_MEMC] = BCM_6338_MEMC_BASE,
|
||||
[RSET_DDR] = BCM_6338_DDR_BASE,
|
||||
};
|
||||
|
||||
static const int bcm96338_irqs[] = {
|
||||
[IRQ_TIMER] = BCM_6338_TIMER_IRQ,
|
||||
[IRQ_SPI] = BCM_6338_SPI_IRQ,
|
||||
[IRQ_UART0] = BCM_6338_UART0_IRQ,
|
||||
[IRQ_DSL] = BCM_6338_DSL_IRQ,
|
||||
[IRQ_UDC0] = BCM_6338_UDC0_IRQ,
|
||||
[IRQ_ENET0] = BCM_6338_ENET0_IRQ,
|
||||
[IRQ_ENET_PHY] = BCM_6338_ENET_PHY_IRQ,
|
||||
[IRQ_ENET0_RXDMA] = BCM_6338_ENET0_RXDMA_IRQ,
|
||||
[IRQ_ENET0_TXDMA] = BCM_6338_ENET0_TXDMA_IRQ,
|
||||
};
|
||||
|
||||
static const unsigned long bcm96338_regs_spi[] = {
|
||||
[SPI_CMD] = SPI_BCM_6338_SPI_CMD,
|
||||
[SPI_INT_STATUS] = SPI_BCM_6338_SPI_INT_STATUS,
|
||||
[SPI_INT_MASK_ST] = SPI_BCM_6338_SPI_MASK_INT_ST,
|
||||
[SPI_INT_MASK] = SPI_BCM_6338_SPI_INT_MASK,
|
||||
[SPI_ST] = SPI_BCM_6338_SPI_ST,
|
||||
[SPI_CLK_CFG] = SPI_BCM_6338_SPI_CLK_CFG,
|
||||
[SPI_FILL_BYTE] = SPI_BCM_6338_SPI_FILL_BYTE,
|
||||
[SPI_MSG_TAIL] = SPI_BCM_6338_SPI_MSG_TAIL,
|
||||
[SPI_RX_TAIL] = SPI_BCM_6338_SPI_RX_TAIL,
|
||||
[SPI_MSG_CTL] = SPI_BCM_6338_SPI_MSG_CTL,
|
||||
[SPI_MSG_DATA] = SPI_BCM_6338_SPI_MSG_DATA,
|
||||
[SPI_RX_DATA] = SPI_BCM_6338_SPI_RX_DATA,
|
||||
};
|
||||
|
||||
/*
|
||||
* 6345 register sets and irqs
|
||||
*/
|
||||
|
||||
static const unsigned long bcm96345_regs_base[] = {
|
||||
[RSET_DSL_LMEM] = BCM_6345_DSL_LMEM_BASE,
|
||||
[RSET_PERF] = BCM_6345_PERF_BASE,
|
||||
[RSET_TIMER] = BCM_6345_TIMER_BASE,
|
||||
[RSET_WDT] = BCM_6345_WDT_BASE,
|
||||
[RSET_UART0] = BCM_6345_UART0_BASE,
|
||||
[RSET_GPIO] = BCM_6345_GPIO_BASE,
|
||||
[RSET_SPI] = BCM_6345_SPI_BASE,
|
||||
[RSET_UDC0] = BCM_6345_UDC0_BASE,
|
||||
[RSET_OHCI0] = BCM_6345_OHCI0_BASE,
|
||||
[RSET_OHCI_PRIV] = BCM_6345_OHCI_PRIV_BASE,
|
||||
[RSET_USBH_PRIV] = BCM_6345_USBH_PRIV_BASE,
|
||||
[RSET_MPI] = BCM_6345_MPI_BASE,
|
||||
[RSET_PCMCIA] = BCM_6345_PCMCIA_BASE,
|
||||
[RSET_DSL] = BCM_6345_DSL_BASE,
|
||||
[RSET_ENET0] = BCM_6345_ENET0_BASE,
|
||||
[RSET_ENET1] = BCM_6345_ENET1_BASE,
|
||||
[RSET_ENETDMA] = BCM_6345_ENETDMA_BASE,
|
||||
[RSET_EHCI0] = BCM_6345_EHCI0_BASE,
|
||||
[RSET_SDRAM] = BCM_6345_SDRAM_BASE,
|
||||
[RSET_MEMC] = BCM_6345_MEMC_BASE,
|
||||
[RSET_DDR] = BCM_6345_DDR_BASE,
|
||||
};
|
||||
|
||||
static const int bcm96345_irqs[] = {
|
||||
[IRQ_TIMER] = BCM_6345_TIMER_IRQ,
|
||||
[IRQ_UART0] = BCM_6345_UART0_IRQ,
|
||||
[IRQ_DSL] = BCM_6345_DSL_IRQ,
|
||||
[IRQ_UDC0] = BCM_6345_UDC0_IRQ,
|
||||
[IRQ_ENET0] = BCM_6345_ENET0_IRQ,
|
||||
[IRQ_ENET_PHY] = BCM_6345_ENET_PHY_IRQ,
|
||||
[IRQ_ENET0_RXDMA] = BCM_6345_ENET0_RXDMA_IRQ,
|
||||
[IRQ_ENET0_TXDMA] = BCM_6345_ENET0_TXDMA_IRQ,
|
||||
};
|
||||
|
||||
/*
|
||||
* 6348 register sets and irqs
|
||||
*/
|
||||
static const unsigned long bcm96348_regs_base[] = {
|
||||
[RSET_DSL_LMEM] = BCM_6348_DSL_LMEM_BASE,
|
||||
[RSET_PERF] = BCM_6348_PERF_BASE,
|
||||
[RSET_TIMER] = BCM_6348_TIMER_BASE,
|
||||
[RSET_WDT] = BCM_6348_WDT_BASE,
|
||||
[RSET_UART0] = BCM_6348_UART0_BASE,
|
||||
[RSET_GPIO] = BCM_6348_GPIO_BASE,
|
||||
[RSET_SPI] = BCM_6348_SPI_BASE,
|
||||
[RSET_OHCI0] = BCM_6348_OHCI0_BASE,
|
||||
[RSET_OHCI_PRIV] = BCM_6348_OHCI_PRIV_BASE,
|
||||
[RSET_USBH_PRIV] = BCM_6348_USBH_PRIV_BASE,
|
||||
[RSET_UDC0] = BCM_6348_UDC0_BASE,
|
||||
[RSET_MPI] = BCM_6348_MPI_BASE,
|
||||
[RSET_PCMCIA] = BCM_6348_PCMCIA_BASE,
|
||||
[RSET_SDRAM] = BCM_6348_SDRAM_BASE,
|
||||
[RSET_DSL] = BCM_6348_DSL_BASE,
|
||||
[RSET_ENET0] = BCM_6348_ENET0_BASE,
|
||||
[RSET_ENET1] = BCM_6348_ENET1_BASE,
|
||||
[RSET_ENETDMA] = BCM_6348_ENETDMA_BASE,
|
||||
[RSET_MEMC] = BCM_6348_MEMC_BASE,
|
||||
[RSET_DDR] = BCM_6348_DDR_BASE,
|
||||
};
|
||||
|
||||
static const int bcm96348_irqs[] = {
|
||||
[IRQ_TIMER] = BCM_6348_TIMER_IRQ,
|
||||
[IRQ_SPI] = BCM_6348_SPI_IRQ,
|
||||
[IRQ_UART0] = BCM_6348_UART0_IRQ,
|
||||
[IRQ_DSL] = BCM_6348_DSL_IRQ,
|
||||
[IRQ_UDC0] = BCM_6348_UDC0_IRQ,
|
||||
[IRQ_ENET0] = BCM_6348_ENET0_IRQ,
|
||||
[IRQ_ENET1] = BCM_6348_ENET1_IRQ,
|
||||
[IRQ_ENET_PHY] = BCM_6348_ENET_PHY_IRQ,
|
||||
[IRQ_OHCI0] = BCM_6348_OHCI0_IRQ,
|
||||
[IRQ_PCMCIA] = BCM_6348_PCMCIA_IRQ,
|
||||
[IRQ_ENET0_RXDMA] = BCM_6348_ENET0_RXDMA_IRQ,
|
||||
[IRQ_ENET0_TXDMA] = BCM_6348_ENET0_TXDMA_IRQ,
|
||||
[IRQ_ENET1_RXDMA] = BCM_6348_ENET1_RXDMA_IRQ,
|
||||
[IRQ_ENET1_TXDMA] = BCM_6348_ENET1_TXDMA_IRQ,
|
||||
[IRQ_PCI] = BCM_6348_PCI_IRQ,
|
||||
};
|
||||
|
||||
static const unsigned long bcm96348_regs_spi[] = {
|
||||
[SPI_CMD] = SPI_BCM_6348_SPI_CMD,
|
||||
[SPI_INT_STATUS] = SPI_BCM_6348_SPI_INT_STATUS,
|
||||
[SPI_INT_MASK_ST] = SPI_BCM_6348_SPI_MASK_INT_ST,
|
||||
[SPI_INT_MASK] = SPI_BCM_6348_SPI_INT_MASK,
|
||||
[SPI_ST] = SPI_BCM_6348_SPI_ST,
|
||||
[SPI_CLK_CFG] = SPI_BCM_6348_SPI_CLK_CFG,
|
||||
[SPI_FILL_BYTE] = SPI_BCM_6348_SPI_FILL_BYTE,
|
||||
[SPI_MSG_TAIL] = SPI_BCM_6348_SPI_MSG_TAIL,
|
||||
[SPI_RX_TAIL] = SPI_BCM_6348_SPI_RX_TAIL,
|
||||
[SPI_MSG_CTL] = SPI_BCM_6348_SPI_MSG_CTL,
|
||||
[SPI_MSG_DATA] = SPI_BCM_6348_SPI_MSG_DATA,
|
||||
[SPI_RX_DATA] = SPI_BCM_6348_SPI_RX_DATA,
|
||||
};
|
||||
|
||||
/*
|
||||
* 6358 register sets and irqs
|
||||
*/
|
||||
static const unsigned long bcm96358_regs_base[] = {
|
||||
[RSET_DSL_LMEM] = BCM_6358_DSL_LMEM_BASE,
|
||||
[RSET_PERF] = BCM_6358_PERF_BASE,
|
||||
[RSET_TIMER] = BCM_6358_TIMER_BASE,
|
||||
[RSET_WDT] = BCM_6358_WDT_BASE,
|
||||
[RSET_UART0] = BCM_6358_UART0_BASE,
|
||||
[RSET_GPIO] = BCM_6358_GPIO_BASE,
|
||||
[RSET_SPI] = BCM_6358_SPI_BASE,
|
||||
[RSET_OHCI0] = BCM_6358_OHCI0_BASE,
|
||||
[RSET_EHCI0] = BCM_6358_EHCI0_BASE,
|
||||
[RSET_OHCI_PRIV] = BCM_6358_OHCI_PRIV_BASE,
|
||||
[RSET_USBH_PRIV] = BCM_6358_USBH_PRIV_BASE,
|
||||
[RSET_MPI] = BCM_6358_MPI_BASE,
|
||||
[RSET_PCMCIA] = BCM_6358_PCMCIA_BASE,
|
||||
[RSET_SDRAM] = BCM_6358_SDRAM_BASE,
|
||||
[RSET_DSL] = BCM_6358_DSL_BASE,
|
||||
[RSET_ENET0] = BCM_6358_ENET0_BASE,
|
||||
[RSET_ENET1] = BCM_6358_ENET1_BASE,
|
||||
[RSET_ENETDMA] = BCM_6358_ENETDMA_BASE,
|
||||
[RSET_MEMC] = BCM_6358_MEMC_BASE,
|
||||
[RSET_DDR] = BCM_6358_DDR_BASE,
|
||||
};
|
||||
|
||||
static const int bcm96358_irqs[] = {
|
||||
[IRQ_TIMER] = BCM_6358_TIMER_IRQ,
|
||||
[IRQ_SPI] = BCM_6358_SPI_IRQ,
|
||||
[IRQ_UART0] = BCM_6358_UART0_IRQ,
|
||||
[IRQ_DSL] = BCM_6358_DSL_IRQ,
|
||||
[IRQ_ENET0] = BCM_6358_ENET0_IRQ,
|
||||
[IRQ_ENET1] = BCM_6358_ENET1_IRQ,
|
||||
[IRQ_ENET_PHY] = BCM_6358_ENET_PHY_IRQ,
|
||||
[IRQ_OHCI0] = BCM_6358_OHCI0_IRQ,
|
||||
[IRQ_EHCI0] = BCM_6358_EHCI0_IRQ,
|
||||
[IRQ_PCMCIA] = BCM_6358_PCMCIA_IRQ,
|
||||
[IRQ_ENET0_RXDMA] = BCM_6358_ENET0_RXDMA_IRQ,
|
||||
[IRQ_ENET0_TXDMA] = BCM_6358_ENET0_TXDMA_IRQ,
|
||||
[IRQ_ENET1_RXDMA] = BCM_6358_ENET1_RXDMA_IRQ,
|
||||
[IRQ_ENET1_TXDMA] = BCM_6358_ENET1_TXDMA_IRQ,
|
||||
[IRQ_PCI] = BCM_6358_PCI_IRQ,
|
||||
};
|
||||
|
||||
static const unsigned long bcm96358_regs_spi[] = {
|
||||
[SPI_CMD] = SPI_BCM_6358_SPI_CMD,
|
||||
[SPI_INT_STATUS] = SPI_BCM_6358_SPI_INT_STATUS,
|
||||
[SPI_INT_MASK_ST] = SPI_BCM_6358_SPI_MASK_INT_ST,
|
||||
[SPI_INT_MASK] = SPI_BCM_6358_SPI_INT_MASK,
|
||||
[SPI_ST] = SPI_BCM_6358_SPI_STATUS,
|
||||
[SPI_CLK_CFG] = SPI_BCM_6358_SPI_CLK_CFG,
|
||||
[SPI_FILL_BYTE] = SPI_BCM_6358_SPI_FILL_BYTE,
|
||||
[SPI_MSG_TAIL] = SPI_BCM_6358_SPI_MSG_TAIL,
|
||||
[SPI_RX_TAIL] = SPI_BCM_6358_SPI_RX_TAIL,
|
||||
[SPI_MSG_CTL] = SPI_BCM_6358_MSG_CTL,
|
||||
[SPI_MSG_DATA] = SPI_BCM_6358_SPI_MSG_DATA,
|
||||
[SPI_RX_DATA] = SPI_BCM_6358_SPI_RX_DATA,
|
||||
};
|
||||
|
||||
u16 __bcm63xx_get_cpu_id(void)
|
||||
{
|
||||
return bcm63xx_cpu_id;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(__bcm63xx_get_cpu_id);
|
||||
|
||||
u16 bcm63xx_get_cpu_rev(void)
|
||||
{
|
||||
return bcm63xx_cpu_rev;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(bcm63xx_get_cpu_rev);
|
||||
|
||||
unsigned int bcm63xx_get_cpu_freq(void)
|
||||
{
|
||||
return bcm63xx_cpu_freq;
|
||||
}
|
||||
|
||||
unsigned int bcm63xx_get_memory_size(void)
|
||||
{
|
||||
return bcm63xx_memory_size;
|
||||
}
|
||||
|
||||
static unsigned int detect_cpu_clock(void)
|
||||
{
|
||||
unsigned int tmp, n1 = 0, n2 = 0, m1 = 0;
|
||||
|
||||
if (BCMCPU_IS_6338())
|
||||
return 240000000;
|
||||
|
||||
if (BCMCPU_IS_6345())
|
||||
return 140000000;
|
||||
|
||||
/*
|
||||
* frequency depends on PLL configuration:
|
||||
*/
|
||||
if (BCMCPU_IS_6348()) {
|
||||
/* 16MHz * (N1 + 1) * (N2 + 2) / (M1_CPU + 1) */
|
||||
tmp = bcm_perf_readl(PERF_MIPSPLLCTL_REG);
|
||||
n1 = (tmp & MIPSPLLCTL_N1_MASK) >> MIPSPLLCTL_N1_SHIFT;
|
||||
n2 = (tmp & MIPSPLLCTL_N2_MASK) >> MIPSPLLCTL_N2_SHIFT;
|
||||
m1 = (tmp & MIPSPLLCTL_M1CPU_MASK) >> MIPSPLLCTL_M1CPU_SHIFT;
|
||||
n1 += 1;
|
||||
n2 += 2;
|
||||
m1 += 1;
|
||||
}
|
||||
|
||||
if (BCMCPU_IS_6358()) {
|
||||
/* 16MHz * N1 * N2 / M1_CPU */
|
||||
tmp = bcm_ddr_readl(DDR_DMIPSPLLCFG_REG);
|
||||
n1 = (tmp & DMIPSPLLCFG_N1_MASK) >> DMIPSPLLCFG_N1_SHIFT;
|
||||
n2 = (tmp & DMIPSPLLCFG_N2_MASK) >> DMIPSPLLCFG_N2_SHIFT;
|
||||
m1 = (tmp & DMIPSPLLCFG_M1_MASK) >> DMIPSPLLCFG_M1_SHIFT;
|
||||
}
|
||||
|
||||
return (16 * 1000000 * n1 * n2) / m1;
|
||||
}
|
||||
|
||||
/*
|
||||
* attempt to detect the amount of memory installed
|
||||
*/
|
||||
static unsigned int detect_memory_size(void)
|
||||
{
|
||||
unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0;
|
||||
u32 val;
|
||||
|
||||
if (BCMCPU_IS_6345())
|
||||
return (8 * 1024 * 1024);
|
||||
|
||||
if (BCMCPU_IS_6338() || BCMCPU_IS_6348()) {
|
||||
val = bcm_sdram_readl(SDRAM_CFG_REG);
|
||||
rows = (val & SDRAM_CFG_ROW_MASK) >> SDRAM_CFG_ROW_SHIFT;
|
||||
cols = (val & SDRAM_CFG_COL_MASK) >> SDRAM_CFG_COL_SHIFT;
|
||||
is_32bits = (val & SDRAM_CFG_32B_MASK) ? 1 : 0;
|
||||
banks = (val & SDRAM_CFG_BANK_MASK) ? 2 : 1;
|
||||
}
|
||||
|
||||
if (BCMCPU_IS_6358()) {
|
||||
val = bcm_memc_readl(MEMC_CFG_REG);
|
||||
rows = (val & MEMC_CFG_ROW_MASK) >> MEMC_CFG_ROW_SHIFT;
|
||||
cols = (val & MEMC_CFG_COL_MASK) >> MEMC_CFG_COL_SHIFT;
|
||||
is_32bits = (val & MEMC_CFG_32B_MASK) ? 0 : 1;
|
||||
banks = 2;
|
||||
}
|
||||
|
||||
/* 0 => 11 address bits ... 2 => 13 address bits */
|
||||
rows += 11;
|
||||
|
||||
/* 0 => 8 address bits ... 2 => 10 address bits */
|
||||
cols += 8;
|
||||
|
||||
return 1 << (cols + rows + (is_32bits + 1) + banks);
|
||||
}
|
||||
|
||||
void __init bcm63xx_cpu_init(void)
|
||||
{
|
||||
unsigned int tmp, expected_cpu_id;
|
||||
struct cpuinfo_mips *c = ¤t_cpu_data;
|
||||
|
||||
/* soc registers location depends on cpu type */
|
||||
expected_cpu_id = 0;
|
||||
|
||||
switch (c->cputype) {
|
||||
case CPU_BCM3302:
|
||||
expected_cpu_id = BCM6338_CPU_ID;
|
||||
bcm63xx_regs_base = bcm96338_regs_base;
|
||||
bcm63xx_irqs = bcm96338_irqs;
|
||||
bcm63xx_regs_spi = bcm96338_regs_spi;
|
||||
break;
|
||||
case CPU_BCM6345:
|
||||
expected_cpu_id = BCM6345_CPU_ID;
|
||||
bcm63xx_regs_base = bcm96345_regs_base;
|
||||
bcm63xx_irqs = bcm96345_irqs;
|
||||
break;
|
||||
case CPU_BCM6348:
|
||||
expected_cpu_id = BCM6348_CPU_ID;
|
||||
bcm63xx_regs_base = bcm96348_regs_base;
|
||||
bcm63xx_irqs = bcm96348_irqs;
|
||||
bcm63xx_regs_spi = bcm96348_regs_spi;
|
||||
break;
|
||||
case CPU_BCM6358:
|
||||
expected_cpu_id = BCM6358_CPU_ID;
|
||||
bcm63xx_regs_base = bcm96358_regs_base;
|
||||
bcm63xx_irqs = bcm96358_irqs;
|
||||
bcm63xx_regs_spi = bcm96358_regs_spi;
|
||||
break;
|
||||
}
|
||||
|
||||
/* really early to panic, but delaying panic would not help
|
||||
* since we will never get any working console */
|
||||
if (!expected_cpu_id)
|
||||
panic("unsupported Broadcom CPU");
|
||||
|
||||
/*
|
||||
* bcm63xx_regs_base is set, we can access soc registers
|
||||
*/
|
||||
|
||||
/* double check CPU type */
|
||||
tmp = bcm_perf_readl(PERF_REV_REG);
|
||||
bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
|
||||
bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
|
||||
|
||||
if (bcm63xx_cpu_id != expected_cpu_id)
|
||||
panic("bcm63xx CPU id mismatch");
|
||||
|
||||
bcm63xx_cpu_freq = detect_cpu_clock();
|
||||
bcm63xx_memory_size = detect_memory_size();
|
||||
|
||||
printk(KERN_INFO "Detected Broadcom 0x%04x CPU revision %02x\n",
|
||||
bcm63xx_cpu_id, bcm63xx_cpu_rev);
|
||||
printk(KERN_INFO "CPU frequency is %u Hz\n",
|
||||
bcm63xx_cpu_freq);
|
||||
printk(KERN_INFO "%uMB of RAM installed\n",
|
||||
bcm63xx_memory_size >> 20);
|
||||
}
|
||||
@@ -1,144 +0,0 @@
|
||||
/*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/log2.h>
|
||||
#include <bcm63xx_cpu.h>
|
||||
#include <bcm63xx_io.h>
|
||||
#include <bcm63xx_regs.h>
|
||||
#include <bcm63xx_cs.h>
|
||||
|
||||
static DEFINE_SPINLOCK(bcm63xx_cs_lock);
|
||||
|
||||
/*
|
||||
* check if given chip select exists
|
||||
*/
|
||||
static int is_valid_cs(unsigned int cs)
|
||||
{
|
||||
if (cs > 6)
|
||||
return 0;
|
||||
return 1;
|
||||
}
|
||||
|
||||
/*
|
||||
* Configure chipselect base address and size (bytes).
|
||||
* Size must be a power of two between 8k and 256M.
|
||||
*/
|
||||
int bcm63xx_set_cs_base(unsigned int cs, u32 base, unsigned int size)
|
||||
{
|
||||
unsigned long flags;
|
||||
u32 val;
|
||||
|
||||
if (!is_valid_cs(cs))
|
||||
return -EINVAL;
|
||||
|
||||
/* sanity check on size */
|
||||
if (size != roundup_pow_of_two(size))
|
||||
return -EINVAL;
|
||||
|
||||
if (size < 8 * 1024 || size > 256 * 1024 * 1024)
|
||||
return -EINVAL;
|
||||
|
||||
val = (base & MPI_CSBASE_BASE_MASK);
|
||||
/* 8k => 0 - 256M => 15 */
|
||||
val |= (ilog2(size) - ilog2(8 * 1024)) << MPI_CSBASE_SIZE_SHIFT;
|
||||
|
||||
spin_lock_irqsave(&bcm63xx_cs_lock, flags);
|
||||
bcm_mpi_writel(val, MPI_CSBASE_REG(cs));
|
||||
spin_unlock_irqrestore(&bcm63xx_cs_lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(bcm63xx_set_cs_base);
|
||||
|
||||
/*
|
||||
* configure chipselect timing (ns)
|
||||
*/
|
||||
int bcm63xx_set_cs_timing(unsigned int cs, unsigned int wait,
|
||||
unsigned int setup, unsigned int hold)
|
||||
{
|
||||
unsigned long flags;
|
||||
u32 val;
|
||||
|
||||
if (!is_valid_cs(cs))
|
||||
return -EINVAL;
|
||||
|
||||
spin_lock_irqsave(&bcm63xx_cs_lock, flags);
|
||||
val = bcm_mpi_readl(MPI_CSCTL_REG(cs));
|
||||
val &= ~(MPI_CSCTL_WAIT_MASK);
|
||||
val &= ~(MPI_CSCTL_SETUP_MASK);
|
||||
val &= ~(MPI_CSCTL_HOLD_MASK);
|
||||
val |= wait << MPI_CSCTL_WAIT_SHIFT;
|
||||
val |= setup << MPI_CSCTL_SETUP_SHIFT;
|
||||
val |= hold << MPI_CSCTL_HOLD_SHIFT;
|
||||
bcm_mpi_writel(val, MPI_CSCTL_REG(cs));
|
||||
spin_unlock_irqrestore(&bcm63xx_cs_lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(bcm63xx_set_cs_timing);
|
||||
|
||||
/*
|
||||
* configure other chipselect parameter (data bus size, ...)
|
||||
*/
|
||||
int bcm63xx_set_cs_param(unsigned int cs, u32 params)
|
||||
{
|
||||
unsigned long flags;
|
||||
u32 val;
|
||||
|
||||
if (!is_valid_cs(cs))
|
||||
return -EINVAL;
|
||||
|
||||
/* none of this fields apply to pcmcia */
|
||||
if (cs == MPI_CS_PCMCIA_COMMON ||
|
||||
cs == MPI_CS_PCMCIA_ATTR ||
|
||||
cs == MPI_CS_PCMCIA_IO)
|
||||
return -EINVAL;
|
||||
|
||||
spin_lock_irqsave(&bcm63xx_cs_lock, flags);
|
||||
val = bcm_mpi_readl(MPI_CSCTL_REG(cs));
|
||||
val &= ~(MPI_CSCTL_DATA16_MASK);
|
||||
val &= ~(MPI_CSCTL_SYNCMODE_MASK);
|
||||
val &= ~(MPI_CSCTL_TSIZE_MASK);
|
||||
val &= ~(MPI_CSCTL_ENDIANSWAP_MASK);
|
||||
val |= params;
|
||||
bcm_mpi_writel(val, MPI_CSCTL_REG(cs));
|
||||
spin_unlock_irqrestore(&bcm63xx_cs_lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(bcm63xx_set_cs_param);
|
||||
|
||||
/*
|
||||
* set cs status (enable/disable)
|
||||
*/
|
||||
int bcm63xx_set_cs_status(unsigned int cs, int enable)
|
||||
{
|
||||
unsigned long flags;
|
||||
u32 val;
|
||||
|
||||
if (!is_valid_cs(cs))
|
||||
return -EINVAL;
|
||||
|
||||
spin_lock_irqsave(&bcm63xx_cs_lock, flags);
|
||||
val = bcm_mpi_readl(MPI_CSCTL_REG(cs));
|
||||
if (enable)
|
||||
val |= MPI_CSCTL_ENABLE_MASK;
|
||||
else
|
||||
val &= ~MPI_CSCTL_ENABLE_MASK;
|
||||
bcm_mpi_writel(val, MPI_CSCTL_REG(cs));
|
||||
spin_unlock_irqrestore(&bcm63xx_cs_lock, flags);
|
||||
return 0;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(bcm63xx_set_cs_status);
|
||||
@@ -1,56 +0,0 @@
|
||||
/*
|
||||
* Broadcom BCM63xx VoIP DSP registration
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* Copyright (C) 2009 Florian Fainelli <florian@openwrt.org>
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
#include <bcm63xx_cpu.h>
|
||||
#include <bcm63xx_dev_dsp.h>
|
||||
#include <bcm63xx_regs.h>
|
||||
#include <bcm63xx_io.h>
|
||||
|
||||
static struct resource voip_dsp_resources[] = {
|
||||
{
|
||||
.start = -1, /* filled at runtime */
|
||||
.end = -1, /* filled at runtime */
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = -1, /* filled at runtime */
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device bcm63xx_voip_dsp_device = {
|
||||
.name = "bcm63xx-voip-dsp",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(voip_dsp_resources),
|
||||
.resource = voip_dsp_resources,
|
||||
};
|
||||
|
||||
int __init bcm63xx_dsp_register(const struct bcm63xx_dsp_platform_data *pd)
|
||||
{
|
||||
struct bcm63xx_dsp_platform_data *dpd;
|
||||
u32 val;
|
||||
|
||||
/* Get the memory window */
|
||||
val = bcm_mpi_readl(MPI_CSBASE_REG(pd->cs - 1));
|
||||
val &= MPI_CSBASE_BASE_MASK;
|
||||
voip_dsp_resources[0].start = val;
|
||||
voip_dsp_resources[0].end = val + 0xFFFFFFF;
|
||||
voip_dsp_resources[1].start = pd->ext_irq;
|
||||
|
||||
/* copy given platform data */
|
||||
dpd = bcm63xx_voip_dsp_device.dev.platform_data;
|
||||
memcpy(dpd, pd, sizeof (*pd));
|
||||
|
||||
return platform_device_register(&bcm63xx_voip_dsp_device);
|
||||
}
|
||||
@@ -1,161 +0,0 @@
|
||||
/*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <bcm63xx_dev_enet.h>
|
||||
#include <bcm63xx_io.h>
|
||||
#include <bcm63xx_regs.h>
|
||||
|
||||
static struct resource shared_res[] = {
|
||||
{
|
||||
.start = -1, /* filled at runtime */
|
||||
.end = -1, /* filled at runtime */
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device bcm63xx_enet_shared_device = {
|
||||
.name = "bcm63xx_enet_shared",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(shared_res),
|
||||
.resource = shared_res,
|
||||
};
|
||||
|
||||
static int shared_device_registered = 0;
|
||||
|
||||
static struct resource enet0_res[] = {
|
||||
{
|
||||
.start = -1, /* filled at runtime */
|
||||
.end = -1, /* filled at runtime */
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = -1, /* filled at runtime */
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = -1, /* filled at runtime */
|
||||
.start = IRQ_ENET0_RXDMA,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = -1, /* filled at runtime */
|
||||
.start = IRQ_ENET0_TXDMA,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct bcm63xx_enet_platform_data enet0_pd;
|
||||
|
||||
static struct platform_device bcm63xx_enet0_device = {
|
||||
.name = "bcm63xx_enet",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(enet0_res),
|
||||
.resource = enet0_res,
|
||||
.dev = {
|
||||
.platform_data = &enet0_pd,
|
||||
},
|
||||
};
|
||||
|
||||
static struct resource enet1_res[] = {
|
||||
{
|
||||
.start = -1, /* filled at runtime */
|
||||
.end = -1, /* filled at runtime */
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = -1, /* filled at runtime */
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = -1, /* filled at runtime */
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = -1, /* filled at runtime */
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct bcm63xx_enet_platform_data enet1_pd;
|
||||
|
||||
static struct platform_device bcm63xx_enet1_device = {
|
||||
.name = "bcm63xx_enet",
|
||||
.id = 1,
|
||||
.num_resources = ARRAY_SIZE(enet1_res),
|
||||
.resource = enet1_res,
|
||||
.dev = {
|
||||
.platform_data = &enet1_pd,
|
||||
},
|
||||
};
|
||||
|
||||
int __init bcm63xx_enet_register(int unit,
|
||||
const struct bcm63xx_enet_platform_data *pd)
|
||||
{
|
||||
struct platform_device *pdev;
|
||||
struct bcm63xx_enet_platform_data *dpd;
|
||||
int ret;
|
||||
|
||||
if (unit > 1)
|
||||
return -ENODEV;
|
||||
|
||||
if (!shared_device_registered) {
|
||||
shared_res[0].start = bcm63xx_regset_address(RSET_ENETDMA);
|
||||
shared_res[0].end = shared_res[0].start;
|
||||
if (BCMCPU_IS_6338())
|
||||
shared_res[0].end += (RSET_ENETDMA_SIZE / 2) - 1;
|
||||
else
|
||||
shared_res[0].end += (RSET_ENETDMA_SIZE) - 1;
|
||||
|
||||
ret = platform_device_register(&bcm63xx_enet_shared_device);
|
||||
if (ret)
|
||||
return ret;
|
||||
shared_device_registered = 1;
|
||||
}
|
||||
|
||||
if (unit == 0) {
|
||||
enet0_res[0].start = bcm63xx_regset_address(RSET_ENET0);
|
||||
enet0_res[0].end = enet0_res[0].start;
|
||||
enet0_res[0].end += RSET_ENET_SIZE - 1;
|
||||
enet0_res[1].start = bcm63xx_get_irq_number(IRQ_ENET0);
|
||||
enet0_res[2].start = bcm63xx_get_irq_number(IRQ_ENET0_RXDMA);
|
||||
enet0_res[3].start = bcm63xx_get_irq_number(IRQ_ENET0_TXDMA);
|
||||
pdev = &bcm63xx_enet0_device;
|
||||
} else {
|
||||
enet1_res[0].start = bcm63xx_regset_address(RSET_ENET1);
|
||||
enet1_res[0].end = enet1_res[0].start;
|
||||
enet1_res[0].end += RSET_ENET_SIZE - 1;
|
||||
enet1_res[1].start = bcm63xx_get_irq_number(IRQ_ENET1);
|
||||
enet1_res[2].start = bcm63xx_get_irq_number(IRQ_ENET1_RXDMA);
|
||||
enet1_res[3].start = bcm63xx_get_irq_number(IRQ_ENET1_TXDMA);
|
||||
pdev = &bcm63xx_enet1_device;
|
||||
}
|
||||
|
||||
/* copy given platform data */
|
||||
dpd = pdev->dev.platform_data;
|
||||
memcpy(dpd, pd, sizeof (*pd));
|
||||
|
||||
/* adjust them in case internal phy is used */
|
||||
if (dpd->use_internal_phy) {
|
||||
|
||||
/* internal phy only exists for enet0 */
|
||||
if (unit == 1)
|
||||
return -ENODEV;
|
||||
|
||||
dpd->phy_id = 1;
|
||||
dpd->has_phy_interrupt = 1;
|
||||
dpd->phy_interrupt = bcm63xx_get_irq_number(IRQ_ENET_PHY);
|
||||
}
|
||||
|
||||
ret = platform_device_register(pdev);
|
||||
if (ret)
|
||||
return ret;
|
||||
return 0;
|
||||
}
|
||||
@@ -1,135 +0,0 @@
|
||||
/*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <asm/bootinfo.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <bcm63xx_cs.h>
|
||||
#include <bcm63xx_cpu.h>
|
||||
#include <bcm63xx_dev_pcmcia.h>
|
||||
#include <bcm63xx_io.h>
|
||||
#include <bcm63xx_regs.h>
|
||||
|
||||
static struct resource pcmcia_resources[] = {
|
||||
/* pcmcia registers */
|
||||
{
|
||||
.start = -1, /* filled at runtime */
|
||||
.end = -1, /* filled at runtime */
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
|
||||
/* pcmcia memory zone resources */
|
||||
{
|
||||
.start = BCM_PCMCIA_COMMON_BASE_PA,
|
||||
.end = BCM_PCMCIA_COMMON_END_PA,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = BCM_PCMCIA_ATTR_BASE_PA,
|
||||
.end = BCM_PCMCIA_ATTR_END_PA,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = BCM_PCMCIA_IO_BASE_PA,
|
||||
.end = BCM_PCMCIA_IO_END_PA,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
|
||||
/* PCMCIA irq */
|
||||
{
|
||||
.start = -1, /* filled at runtime */
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
|
||||
/* declare PCMCIA IO resource also */
|
||||
{
|
||||
.start = BCM_PCMCIA_IO_BASE_PA,
|
||||
.end = BCM_PCMCIA_IO_END_PA,
|
||||
.flags = IORESOURCE_IO,
|
||||
},
|
||||
};
|
||||
|
||||
static struct bcm63xx_pcmcia_platform_data pd;
|
||||
|
||||
static struct platform_device bcm63xx_pcmcia_device = {
|
||||
.name = "bcm63xx_pcmcia",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(pcmcia_resources),
|
||||
.resource = pcmcia_resources,
|
||||
.dev = {
|
||||
.platform_data = &pd,
|
||||
},
|
||||
};
|
||||
|
||||
static int __init config_pcmcia_cs(unsigned int cs,
|
||||
u32 base, unsigned int size)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = bcm63xx_set_cs_status(cs, 0);
|
||||
if (!ret)
|
||||
ret = bcm63xx_set_cs_base(cs, base, size);
|
||||
if (!ret)
|
||||
ret = bcm63xx_set_cs_status(cs, 1);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static const __initdata unsigned int pcmcia_cs[3][3] = {
|
||||
/* cs, base address, size */
|
||||
{ MPI_CS_PCMCIA_COMMON, BCM_PCMCIA_COMMON_BASE_PA,
|
||||
BCM_PCMCIA_COMMON_SIZE },
|
||||
|
||||
{ MPI_CS_PCMCIA_ATTR, BCM_PCMCIA_ATTR_BASE_PA,
|
||||
BCM_PCMCIA_ATTR_SIZE },
|
||||
|
||||
{ MPI_CS_PCMCIA_IO, BCM_PCMCIA_IO_BASE_PA,
|
||||
BCM_PCMCIA_IO_SIZE },
|
||||
};
|
||||
|
||||
int __init bcm63xx_pcmcia_register(void)
|
||||
{
|
||||
int ret, i;
|
||||
|
||||
if (!BCMCPU_IS_6348() && !BCMCPU_IS_6358())
|
||||
return 0;
|
||||
|
||||
/* use correct pcmcia ready gpio depending on processor */
|
||||
switch (bcm63xx_get_cpu_id()) {
|
||||
case BCM6348_CPU_ID:
|
||||
pd.ready_gpio = 22;
|
||||
break;
|
||||
|
||||
case BCM6358_CPU_ID:
|
||||
pd.ready_gpio = 18;
|
||||
break;
|
||||
|
||||
default:
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
pcmcia_resources[0].start = bcm63xx_regset_address(RSET_PCMCIA);
|
||||
pcmcia_resources[0].end = pcmcia_resources[0].start;
|
||||
pcmcia_resources[0].end += RSET_PCMCIA_SIZE - 1;
|
||||
pcmcia_resources[4].start = bcm63xx_get_irq_number(IRQ_PCMCIA);
|
||||
|
||||
/* configure pcmcia chip selects */
|
||||
for (i = 0; i < 3; i++) {
|
||||
ret = config_pcmcia_cs(pcmcia_cs[i][0],
|
||||
pcmcia_cs[i][1],
|
||||
pcmcia_cs[i][2]);
|
||||
if (ret)
|
||||
goto out_err;
|
||||
}
|
||||
|
||||
return platform_device_register(&bcm63xx_pcmcia_device);
|
||||
|
||||
out_err:
|
||||
printk(KERN_ERR "unable to set pcmcia chip select");
|
||||
return ret;
|
||||
}
|
||||
@@ -1,60 +0,0 @@
|
||||
/*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* Copyright (C) 2009 Florian Fainelli <florian@openwrt.org>
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
#include <bcm63xx_cpu.h>
|
||||
#include <bcm63xx_dev_spi.h>
|
||||
#include <bcm63xx_regs.h>
|
||||
|
||||
static struct resource spi_resources[] = {
|
||||
{
|
||||
.start = -1, /* filled at runtime */
|
||||
.end = -1, /* filled at runtime */
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = -1, /* filled at runtime */
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct bcm63xx_spi_pdata spi_pdata = {
|
||||
.bus_num = 0,
|
||||
.num_chipselect = 4,
|
||||
.speed_hz = 50000000, /* Fclk */
|
||||
};
|
||||
|
||||
static struct platform_device bcm63xx_spi_device = {
|
||||
.name = "bcm63xx-spi",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(spi_resources),
|
||||
.resource = spi_resources,
|
||||
.dev = {
|
||||
.platform_data = &spi_pdata,
|
||||
},
|
||||
};
|
||||
|
||||
int __init bcm63xx_spi_register(void)
|
||||
{
|
||||
spi_resources[0].start = bcm63xx_regset_address(RSET_SPI);
|
||||
spi_resources[0].end = spi_resources[0].start;
|
||||
spi_resources[0].end += RSET_SPI_SIZE - 1;
|
||||
spi_resources[1].start = bcm63xx_get_irq_number(IRQ_SPI);
|
||||
|
||||
/* Fill in platform data */
|
||||
if (BCMCPU_IS_6338() || BCMCPU_IS_6348())
|
||||
spi_pdata.fifo_size = SPI_BCM_6338_SPI_MSG_DATA_SIZE;
|
||||
|
||||
if (BCMCPU_IS_6358())
|
||||
spi_pdata.fifo_size = SPI_BCM_6358_SPI_MSG_DATA_SIZE;
|
||||
|
||||
return platform_device_register(&bcm63xx_spi_device);
|
||||
}
|
||||
@@ -1,41 +0,0 @@
|
||||
/*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <bcm63xx_cpu.h>
|
||||
#include <bcm63xx_dev_uart.h>
|
||||
|
||||
static struct resource uart_resources[] = {
|
||||
{
|
||||
.start = -1, /* filled at runtime */
|
||||
.end = -1, /* filled at runtime */
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = -1, /* filled at runtime */
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device bcm63xx_uart_device = {
|
||||
.name = "bcm63xx_uart",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(uart_resources),
|
||||
.resource = uart_resources,
|
||||
};
|
||||
|
||||
int __init bcm63xx_uart_register(void)
|
||||
{
|
||||
uart_resources[0].start = bcm63xx_regset_address(RSET_UART0);
|
||||
uart_resources[0].end = uart_resources[0].start;
|
||||
uart_resources[0].end += RSET_UART_SIZE - 1;
|
||||
uart_resources[1].start = bcm63xx_get_irq_number(IRQ_UART0);
|
||||
return platform_device_register(&bcm63xx_uart_device);
|
||||
}
|
||||
@@ -1,50 +0,0 @@
|
||||
/*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <bcm63xx_cpu.h>
|
||||
#include <bcm63xx_dev_usb_ehci.h>
|
||||
|
||||
static struct resource ehci_resources[] = {
|
||||
{
|
||||
.start = -1, /* filled at runtime */
|
||||
.end = -1, /* filled at runtime */
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = -1, /* filled at runtime */
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static u64 ehci_dmamask = ~(u32)0;
|
||||
|
||||
static struct platform_device bcm63xx_ehci_device = {
|
||||
.name = "bcm63xx_ehci",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(ehci_resources),
|
||||
.resource = ehci_resources,
|
||||
.dev = {
|
||||
.dma_mask = &ehci_dmamask,
|
||||
.coherent_dma_mask = 0xffffffff,
|
||||
},
|
||||
};
|
||||
|
||||
int __init bcm63xx_ehci_register(void)
|
||||
{
|
||||
if (!BCMCPU_IS_6358())
|
||||
return 0;
|
||||
|
||||
ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
|
||||
ehci_resources[0].end = ehci_resources[0].start;
|
||||
ehci_resources[0].end += RSET_EHCI_SIZE - 1;
|
||||
ehci_resources[1].start = bcm63xx_get_irq_number(IRQ_EHCI0);
|
||||
return platform_device_register(&bcm63xx_ehci_device);
|
||||
}
|
||||
@@ -1,50 +0,0 @@
|
||||
/*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <bcm63xx_cpu.h>
|
||||
#include <bcm63xx_dev_usb_ohci.h>
|
||||
|
||||
static struct resource ohci_resources[] = {
|
||||
{
|
||||
.start = -1, /* filled at runtime */
|
||||
.end = -1, /* filled at runtime */
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = -1, /* filled at runtime */
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static u64 ohci_dmamask = ~(u32)0;
|
||||
|
||||
static struct platform_device bcm63xx_ohci_device = {
|
||||
.name = "bcm63xx_ohci",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(ohci_resources),
|
||||
.resource = ohci_resources,
|
||||
.dev = {
|
||||
.dma_mask = &ohci_dmamask,
|
||||
.coherent_dma_mask = 0xffffffff,
|
||||
},
|
||||
};
|
||||
|
||||
int __init bcm63xx_ohci_register(void)
|
||||
{
|
||||
if (!BCMCPU_IS_6348() && !BCMCPU_IS_6358())
|
||||
return 0;
|
||||
|
||||
ohci_resources[0].start = bcm63xx_regset_address(RSET_OHCI0);
|
||||
ohci_resources[0].end = ohci_resources[0].start;
|
||||
ohci_resources[0].end += RSET_OHCI_SIZE - 1;
|
||||
ohci_resources[1].start = bcm63xx_get_irq_number(IRQ_OHCI0);
|
||||
return platform_device_register(&bcm63xx_ohci_device);
|
||||
}
|
||||
@@ -1,58 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2009 Henk Vergonet <Henk.Vergonet@gmail.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <bcm63xx_cpu.h>
|
||||
|
||||
static struct resource udc_resources[] = {
|
||||
{
|
||||
.start = -1, /* filled at runtime */
|
||||
.end = -1, /* filled at runtime */
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = -1, /* filled at runtime */
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static u64 udc_dmamask = ~(u32)0;
|
||||
|
||||
static struct platform_device bcm63xx_udc_device = {
|
||||
.name = "bcm63xx-udc",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(udc_resources),
|
||||
.resource = udc_resources,
|
||||
.dev = {
|
||||
.dma_mask = &udc_dmamask,
|
||||
.coherent_dma_mask = 0xffffffff,
|
||||
},
|
||||
};
|
||||
|
||||
int __init bcm63xx_udc_register(void)
|
||||
{
|
||||
if (!BCMCPU_IS_6338() && !BCMCPU_IS_6345() && !BCMCPU_IS_6348())
|
||||
return 0;
|
||||
|
||||
udc_resources[0].start = bcm63xx_regset_address(RSET_UDC0);
|
||||
udc_resources[0].end = udc_resources[0].start;
|
||||
udc_resources[0].end += RSET_UDC_SIZE - 1;
|
||||
udc_resources[1].start = bcm63xx_get_irq_number(IRQ_UDC0);
|
||||
return platform_device_register(&bcm63xx_udc_device);
|
||||
}
|
||||
@@ -1,36 +0,0 @@
|
||||
/*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <bcm63xx_cpu.h>
|
||||
|
||||
static struct resource wdt_resources[] = {
|
||||
{
|
||||
.start = -1, /* filled at runtime */
|
||||
.end = -1, /* filled at runtime */
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device bcm63xx_wdt_device = {
|
||||
.name = "bcm63xx-wdt",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(wdt_resources),
|
||||
.resource = wdt_resources,
|
||||
};
|
||||
|
||||
int __init bcm63xx_wdt_register(void)
|
||||
{
|
||||
wdt_resources[0].start = bcm63xx_regset_address(RSET_WDT);
|
||||
wdt_resources[0].end = wdt_resources[0].start;
|
||||
wdt_resources[0].end += RSET_WDT_SIZE - 1;
|
||||
|
||||
return platform_device_register(&bcm63xx_wdt_device);
|
||||
}
|
||||
@@ -1,30 +0,0 @@
|
||||
/*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <bcm63xx_io.h>
|
||||
#include <bcm63xx_regs.h>
|
||||
|
||||
static void __init wait_xfered(void)
|
||||
{
|
||||
unsigned int val;
|
||||
|
||||
/* wait for any previous char to be transmitted */
|
||||
do {
|
||||
val = bcm_uart0_readl(UART_IR_REG);
|
||||
if (val & UART_IR_STAT(UART_IR_TXEMPTY))
|
||||
break;
|
||||
} while (1);
|
||||
}
|
||||
|
||||
void __init prom_putchar(char c)
|
||||
{
|
||||
wait_xfered();
|
||||
bcm_uart0_writel(c, UART_FIFO_REG);
|
||||
wait_xfered();
|
||||
}
|
||||
@@ -1,131 +0,0 @@
|
||||
/*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
|
||||
* Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/gpio.h>
|
||||
|
||||
#include <bcm63xx_cpu.h>
|
||||
#include <bcm63xx_gpio.h>
|
||||
#include <bcm63xx_io.h>
|
||||
#include <bcm63xx_regs.h>
|
||||
|
||||
static DEFINE_SPINLOCK(bcm63xx_gpio_lock);
|
||||
static u32 gpio_out_low, gpio_out_high;
|
||||
|
||||
static void bcm63xx_gpio_set(struct gpio_chip *chip,
|
||||
unsigned gpio, int val)
|
||||
{
|
||||
u32 reg;
|
||||
u32 mask;
|
||||
u32 *v;
|
||||
unsigned long flags;
|
||||
|
||||
if (gpio >= chip->ngpio)
|
||||
BUG();
|
||||
|
||||
if (gpio < 32) {
|
||||
reg = GPIO_DATA_LO_REG;
|
||||
mask = 1 << gpio;
|
||||
v = &gpio_out_low;
|
||||
} else {
|
||||
reg = GPIO_DATA_HI_REG;
|
||||
mask = 1 << (gpio - 32);
|
||||
v = &gpio_out_high;
|
||||
}
|
||||
|
||||
spin_lock_irqsave(&bcm63xx_gpio_lock, flags);
|
||||
if (val)
|
||||
*v |= mask;
|
||||
else
|
||||
*v &= ~mask;
|
||||
bcm_gpio_writel(*v, reg);
|
||||
spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags);
|
||||
}
|
||||
|
||||
static int bcm63xx_gpio_get(struct gpio_chip *chip, unsigned gpio)
|
||||
{
|
||||
u32 reg;
|
||||
u32 mask;
|
||||
|
||||
if (gpio >= chip->ngpio)
|
||||
BUG();
|
||||
|
||||
if (gpio < 32) {
|
||||
reg = GPIO_DATA_LO_REG;
|
||||
mask = 1 << gpio;
|
||||
} else {
|
||||
reg = GPIO_DATA_HI_REG;
|
||||
mask = 1 << (gpio - 32);
|
||||
}
|
||||
|
||||
return !!(bcm_gpio_readl(reg) & mask);
|
||||
}
|
||||
|
||||
static int bcm63xx_gpio_set_direction(struct gpio_chip *chip,
|
||||
unsigned gpio, int dir)
|
||||
{
|
||||
u32 reg;
|
||||
u32 mask;
|
||||
u32 tmp;
|
||||
unsigned long flags;
|
||||
|
||||
if (gpio >= chip->ngpio)
|
||||
BUG();
|
||||
|
||||
if (gpio < 32) {
|
||||
reg = GPIO_CTL_LO_REG;
|
||||
mask = 1 << gpio;
|
||||
} else {
|
||||
reg = GPIO_CTL_HI_REG;
|
||||
mask = 1 << (gpio - 32);
|
||||
}
|
||||
|
||||
spin_lock_irqsave(&bcm63xx_gpio_lock, flags);
|
||||
tmp = bcm_gpio_readl(reg);
|
||||
if (dir == GPIO_DIR_IN)
|
||||
tmp &= ~mask;
|
||||
else
|
||||
tmp |= mask;
|
||||
bcm_gpio_writel(tmp, reg);
|
||||
spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int bcm63xx_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
|
||||
{
|
||||
return bcm63xx_gpio_set_direction(chip, gpio, GPIO_DIR_IN);
|
||||
}
|
||||
|
||||
static int bcm63xx_gpio_direction_output(struct gpio_chip *chip,
|
||||
unsigned gpio, int value)
|
||||
{
|
||||
bcm63xx_gpio_set(chip, gpio, value);
|
||||
return bcm63xx_gpio_set_direction(chip, gpio, GPIO_DIR_OUT);
|
||||
}
|
||||
|
||||
|
||||
static struct gpio_chip bcm63xx_gpio_chip = {
|
||||
.label = "bcm63xx-gpio",
|
||||
.direction_input = bcm63xx_gpio_direction_input,
|
||||
.direction_output = bcm63xx_gpio_direction_output,
|
||||
.get = bcm63xx_gpio_get,
|
||||
.set = bcm63xx_gpio_set,
|
||||
.base = 0,
|
||||
};
|
||||
|
||||
int __init bcm63xx_gpio_init(void)
|
||||
{
|
||||
bcm63xx_gpio_chip.ngpio = bcm63xx_gpio_count();
|
||||
printk(KERN_INFO "registering %d GPIOs\n", bcm63xx_gpio_chip.ngpio);
|
||||
return gpiochip_add(&bcm63xx_gpio_chip);
|
||||
}
|
||||
@@ -1,253 +0,0 @@
|
||||
/*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
|
||||
* Copyright (C) 2008 Nicolas Schichan <nschichan@freebox.fr>
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/module.h>
|
||||
#include <asm/irq_cpu.h>
|
||||
#include <asm/mipsregs.h>
|
||||
#include <bcm63xx_cpu.h>
|
||||
#include <bcm63xx_regs.h>
|
||||
#include <bcm63xx_io.h>
|
||||
#include <bcm63xx_irq.h>
|
||||
|
||||
/*
|
||||
* dispatch internal devices IRQ (uart, enet, watchdog, ...). do not
|
||||
* prioritize any interrupt relatively to another. the static counter
|
||||
* will resume the loop where it ended the last time we left this
|
||||
* function.
|
||||
*/
|
||||
static void bcm63xx_irq_dispatch_internal(void)
|
||||
{
|
||||
u32 pending;
|
||||
static int i;
|
||||
|
||||
pending = bcm_perf_readl(PERF_IRQMASK_REG) &
|
||||
bcm_perf_readl(PERF_IRQSTAT_REG);
|
||||
|
||||
if (!pending)
|
||||
return ;
|
||||
|
||||
while (1) {
|
||||
int to_call = i;
|
||||
|
||||
i = (i + 1) & 0x1f;
|
||||
if (pending & (1 << to_call)) {
|
||||
do_IRQ(to_call + IRQ_INTERNAL_BASE);
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
asmlinkage void plat_irq_dispatch(void)
|
||||
{
|
||||
u32 cause;
|
||||
|
||||
do {
|
||||
cause = read_c0_cause() & read_c0_status() & ST0_IM;
|
||||
|
||||
if (!cause)
|
||||
break;
|
||||
|
||||
if (cause & CAUSEF_IP7)
|
||||
do_IRQ(7);
|
||||
if (cause & CAUSEF_IP2)
|
||||
bcm63xx_irq_dispatch_internal();
|
||||
if (cause & CAUSEF_IP3)
|
||||
do_IRQ(IRQ_EXT_0);
|
||||
if (cause & CAUSEF_IP4)
|
||||
do_IRQ(IRQ_EXT_1);
|
||||
if (cause & CAUSEF_IP5)
|
||||
do_IRQ(IRQ_EXT_2);
|
||||
if (cause & CAUSEF_IP6)
|
||||
do_IRQ(IRQ_EXT_3);
|
||||
} while (1);
|
||||
}
|
||||
|
||||
/*
|
||||
* internal IRQs operations: only mask/unmask on PERF irq mask
|
||||
* register.
|
||||
*/
|
||||
static inline void bcm63xx_internal_irq_mask(unsigned int irq)
|
||||
{
|
||||
u32 mask;
|
||||
|
||||
irq -= IRQ_INTERNAL_BASE;
|
||||
mask = bcm_perf_readl(PERF_IRQMASK_REG);
|
||||
mask &= ~(1 << irq);
|
||||
bcm_perf_writel(mask, PERF_IRQMASK_REG);
|
||||
}
|
||||
|
||||
static void bcm63xx_internal_irq_unmask(unsigned int irq)
|
||||
{
|
||||
u32 mask;
|
||||
|
||||
irq -= IRQ_INTERNAL_BASE;
|
||||
mask = bcm_perf_readl(PERF_IRQMASK_REG);
|
||||
mask |= (1 << irq);
|
||||
bcm_perf_writel(mask, PERF_IRQMASK_REG);
|
||||
}
|
||||
|
||||
static unsigned int bcm63xx_internal_irq_startup(unsigned int irq)
|
||||
{
|
||||
bcm63xx_internal_irq_unmask(irq);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* external IRQs operations: mask/unmask and clear on PERF external
|
||||
* irq control register.
|
||||
*/
|
||||
static void bcm63xx_external_irq_mask(unsigned int irq)
|
||||
{
|
||||
u32 reg;
|
||||
|
||||
irq -= IRQ_EXT_BASE;
|
||||
reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG);
|
||||
reg &= ~EXTIRQ_CFG_MASK(irq);
|
||||
bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG);
|
||||
}
|
||||
|
||||
static void bcm63xx_external_irq_unmask(unsigned int irq)
|
||||
{
|
||||
u32 reg;
|
||||
|
||||
irq -= IRQ_EXT_BASE;
|
||||
reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG);
|
||||
reg |= EXTIRQ_CFG_MASK(irq);
|
||||
bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG);
|
||||
}
|
||||
|
||||
static void bcm63xx_external_irq_clear(unsigned int irq)
|
||||
{
|
||||
u32 reg;
|
||||
|
||||
irq -= IRQ_EXT_BASE;
|
||||
reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG);
|
||||
reg |= EXTIRQ_CFG_CLEAR(irq);
|
||||
bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG);
|
||||
}
|
||||
|
||||
static unsigned int bcm63xx_external_irq_startup(unsigned int irq)
|
||||
{
|
||||
set_c0_status(0x100 << (irq - IRQ_MIPS_BASE));
|
||||
irq_enable_hazard();
|
||||
bcm63xx_external_irq_unmask(irq);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void bcm63xx_external_irq_shutdown(unsigned int irq)
|
||||
{
|
||||
bcm63xx_external_irq_mask(irq);
|
||||
clear_c0_status(0x100 << (irq - IRQ_MIPS_BASE));
|
||||
irq_disable_hazard();
|
||||
}
|
||||
|
||||
static int bcm63xx_external_irq_set_type(unsigned int irq,
|
||||
unsigned int flow_type)
|
||||
{
|
||||
u32 reg;
|
||||
struct irq_desc *desc = irq_desc + irq;
|
||||
|
||||
irq -= IRQ_EXT_BASE;
|
||||
|
||||
flow_type &= IRQ_TYPE_SENSE_MASK;
|
||||
|
||||
if (flow_type == IRQ_TYPE_NONE)
|
||||
flow_type = IRQ_TYPE_LEVEL_LOW;
|
||||
|
||||
reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG);
|
||||
switch (flow_type) {
|
||||
case IRQ_TYPE_EDGE_BOTH:
|
||||
reg &= ~EXTIRQ_CFG_LEVELSENSE(irq);
|
||||
reg |= EXTIRQ_CFG_BOTHEDGE(irq);
|
||||
break;
|
||||
|
||||
case IRQ_TYPE_EDGE_RISING:
|
||||
reg &= ~EXTIRQ_CFG_LEVELSENSE(irq);
|
||||
reg |= EXTIRQ_CFG_SENSE(irq);
|
||||
reg &= ~EXTIRQ_CFG_BOTHEDGE(irq);
|
||||
break;
|
||||
|
||||
case IRQ_TYPE_EDGE_FALLING:
|
||||
reg &= ~EXTIRQ_CFG_LEVELSENSE(irq);
|
||||
reg &= ~EXTIRQ_CFG_SENSE(irq);
|
||||
reg &= ~EXTIRQ_CFG_BOTHEDGE(irq);
|
||||
break;
|
||||
|
||||
case IRQ_TYPE_LEVEL_HIGH:
|
||||
reg |= EXTIRQ_CFG_LEVELSENSE(irq);
|
||||
reg |= EXTIRQ_CFG_SENSE(irq);
|
||||
break;
|
||||
|
||||
case IRQ_TYPE_LEVEL_LOW:
|
||||
reg |= EXTIRQ_CFG_LEVELSENSE(irq);
|
||||
reg &= ~EXTIRQ_CFG_SENSE(irq);
|
||||
break;
|
||||
|
||||
default:
|
||||
printk(KERN_ERR "bogus flow type combination given !\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG);
|
||||
|
||||
if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) {
|
||||
desc->status |= IRQ_LEVEL;
|
||||
desc->handle_irq = handle_level_irq;
|
||||
} else {
|
||||
desc->handle_irq = handle_edge_irq;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct irq_chip bcm63xx_internal_irq_chip = {
|
||||
.name = "bcm63xx_ipic",
|
||||
.startup = bcm63xx_internal_irq_startup,
|
||||
.shutdown = bcm63xx_internal_irq_mask,
|
||||
|
||||
.mask = bcm63xx_internal_irq_mask,
|
||||
.mask_ack = bcm63xx_internal_irq_mask,
|
||||
.unmask = bcm63xx_internal_irq_unmask,
|
||||
};
|
||||
|
||||
static struct irq_chip bcm63xx_external_irq_chip = {
|
||||
.name = "bcm63xx_epic",
|
||||
.startup = bcm63xx_external_irq_startup,
|
||||
.shutdown = bcm63xx_external_irq_shutdown,
|
||||
|
||||
.ack = bcm63xx_external_irq_clear,
|
||||
|
||||
.mask = bcm63xx_external_irq_mask,
|
||||
.unmask = bcm63xx_external_irq_unmask,
|
||||
|
||||
.set_type = bcm63xx_external_irq_set_type,
|
||||
};
|
||||
|
||||
static struct irqaction cpu_ip2_cascade_action = {
|
||||
.handler = no_action,
|
||||
.name = "cascade_ip2",
|
||||
};
|
||||
|
||||
void __init arch_init_irq(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
mips_cpu_irq_init();
|
||||
for (i = IRQ_INTERNAL_BASE; i < NR_IRQS; ++i)
|
||||
set_irq_chip_and_handler(i, &bcm63xx_internal_irq_chip,
|
||||
handle_level_irq);
|
||||
|
||||
for (i = IRQ_EXT_BASE; i < IRQ_EXT_BASE + 4; ++i)
|
||||
set_irq_chip_and_handler(i, &bcm63xx_external_irq_chip,
|
||||
handle_edge_irq);
|
||||
|
||||
setup_irq(IRQ_MIPS_BASE + 2, &cpu_ip2_cascade_action);
|
||||
}
|
||||
@@ -1,55 +0,0 @@
|
||||
/*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/bootmem.h>
|
||||
#include <asm/bootinfo.h>
|
||||
#include <bcm63xx_board.h>
|
||||
#include <bcm63xx_cpu.h>
|
||||
#include <bcm63xx_io.h>
|
||||
#include <bcm63xx_regs.h>
|
||||
#include <bcm63xx_gpio.h>
|
||||
|
||||
void __init prom_init(void)
|
||||
{
|
||||
u32 reg, mask;
|
||||
|
||||
bcm63xx_cpu_init();
|
||||
|
||||
/* stop any running watchdog */
|
||||
bcm_wdt_writel(WDT_STOP_1, WDT_CTL_REG);
|
||||
bcm_wdt_writel(WDT_STOP_2, WDT_CTL_REG);
|
||||
|
||||
/* disable all hardware blocks clock for now */
|
||||
if (BCMCPU_IS_6338())
|
||||
mask = CKCTL_6338_ALL_SAFE_EN;
|
||||
else if (BCMCPU_IS_6345())
|
||||
mask = CKCTL_6345_ALL_SAFE_EN;
|
||||
else if (BCMCPU_IS_6348())
|
||||
mask = CKCTL_6348_ALL_SAFE_EN;
|
||||
else
|
||||
/* BCMCPU_IS_6358() */
|
||||
mask = CKCTL_6358_ALL_SAFE_EN;
|
||||
|
||||
reg = bcm_perf_readl(PERF_CKCTL_REG);
|
||||
reg &= ~mask;
|
||||
bcm_perf_writel(reg, PERF_CKCTL_REG);
|
||||
|
||||
/* assign command line from kernel config */
|
||||
strcpy(arcs_cmdline, CONFIG_CMDLINE);
|
||||
|
||||
/* register gpiochip */
|
||||
bcm63xx_gpio_init();
|
||||
|
||||
/* do low level board init */
|
||||
board_prom_init();
|
||||
}
|
||||
|
||||
void __init prom_free_prom_memory(void)
|
||||
{
|
||||
}
|
||||
@@ -1,124 +0,0 @@
|
||||
/*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/bootmem.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/pm.h>
|
||||
#include <asm/bootinfo.h>
|
||||
#include <asm/time.h>
|
||||
#include <asm/reboot.h>
|
||||
#include <asm/cacheflush.h>
|
||||
#include <bcm63xx_board.h>
|
||||
#include <bcm63xx_cpu.h>
|
||||
#include <bcm63xx_regs.h>
|
||||
#include <bcm63xx_io.h>
|
||||
|
||||
void bcm63xx_machine_halt(void)
|
||||
{
|
||||
printk(KERN_INFO "System halted\n");
|
||||
while (1);
|
||||
}
|
||||
|
||||
static void bcm6348_a1_reboot(void)
|
||||
{
|
||||
u32 reg;
|
||||
|
||||
/* soft reset all blocks */
|
||||
printk(KERN_INFO "soft-reseting all blocks ...\n");
|
||||
reg = bcm_perf_readl(PERF_SOFTRESET_REG);
|
||||
reg &= ~SOFTRESET_6348_ALL;
|
||||
bcm_perf_writel(reg, PERF_SOFTRESET_REG);
|
||||
mdelay(10);
|
||||
|
||||
reg = bcm_perf_readl(PERF_SOFTRESET_REG);
|
||||
reg |= SOFTRESET_6348_ALL;
|
||||
bcm_perf_writel(reg, PERF_SOFTRESET_REG);
|
||||
mdelay(10);
|
||||
|
||||
/* Jump to the power on address. */
|
||||
printk(KERN_INFO "jumping to reset vector.\n");
|
||||
/* set high vectors (base at 0xbfc00000 */
|
||||
set_c0_status(ST0_BEV | ST0_ERL);
|
||||
/* run uncached in kseg0 */
|
||||
change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
|
||||
__flush_cache_all();
|
||||
/* remove all wired TLB entries */
|
||||
write_c0_wired(0);
|
||||
__asm__ __volatile__(
|
||||
"jr\t%0"
|
||||
:
|
||||
: "r" (0xbfc00000));
|
||||
while (1);
|
||||
}
|
||||
|
||||
void bcm63xx_machine_reboot(void)
|
||||
{
|
||||
u32 reg;
|
||||
|
||||
/* mask and clear all external irq */
|
||||
reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG);
|
||||
reg &= ~EXTIRQ_CFG_MASK_ALL;
|
||||
reg |= EXTIRQ_CFG_CLEAR_ALL;
|
||||
bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG);
|
||||
|
||||
if (BCMCPU_IS_6348() && (bcm63xx_get_cpu_rev() == 0xa1))
|
||||
bcm6348_a1_reboot();
|
||||
|
||||
printk(KERN_INFO "triggering watchdog soft-reset...\n");
|
||||
reg = bcm_perf_readl(PERF_SYS_PLL_CTL_REG);
|
||||
reg |= SYS_PLL_SOFT_RESET;
|
||||
bcm_perf_writel(reg, PERF_SYS_PLL_CTL_REG);
|
||||
while (1);
|
||||
}
|
||||
|
||||
static void __bcm63xx_machine_reboot(char *p)
|
||||
{
|
||||
bcm63xx_machine_reboot();
|
||||
}
|
||||
|
||||
/*
|
||||
* return system type in /proc/cpuinfo
|
||||
*/
|
||||
const char *get_system_type(void)
|
||||
{
|
||||
static char buf[128];
|
||||
snprintf(buf, sizeof (buf), "bcm63xx/%s (0x%04x/0x%04X)",
|
||||
board_get_name(),
|
||||
bcm63xx_get_cpu_id(), bcm63xx_get_cpu_rev());
|
||||
return buf;
|
||||
}
|
||||
|
||||
void __init plat_time_init(void)
|
||||
{
|
||||
mips_hpt_frequency = bcm63xx_get_cpu_freq() / 2;
|
||||
}
|
||||
|
||||
void __init plat_mem_setup(void)
|
||||
{
|
||||
add_memory_region(0, bcm63xx_get_memory_size(), BOOT_MEM_RAM);
|
||||
|
||||
_machine_halt = bcm63xx_machine_halt;
|
||||
_machine_restart = __bcm63xx_machine_reboot;
|
||||
pm_power_off = bcm63xx_machine_halt;
|
||||
|
||||
set_io_port_base(0);
|
||||
ioport_resource.start = 0;
|
||||
ioport_resource.end = ~0;
|
||||
|
||||
board_setup();
|
||||
}
|
||||
|
||||
int __init bcm63xx_register_devices(void)
|
||||
{
|
||||
return board_register_devices();
|
||||
}
|
||||
|
||||
arch_initcall(bcm63xx_register_devices);
|
||||
@@ -1,205 +0,0 @@
|
||||
/*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/clk.h>
|
||||
#include <bcm63xx_cpu.h>
|
||||
#include <bcm63xx_io.h>
|
||||
#include <bcm63xx_timer.h>
|
||||
#include <bcm63xx_regs.h>
|
||||
|
||||
static DEFINE_SPINLOCK(timer_reg_lock);
|
||||
static DEFINE_SPINLOCK(timer_data_lock);
|
||||
static struct clk *periph_clk;
|
||||
|
||||
static struct timer_data {
|
||||
void (*cb)(void *);
|
||||
void *data;
|
||||
} timer_data[BCM63XX_TIMER_COUNT];
|
||||
|
||||
static irqreturn_t timer_interrupt(int irq, void *dev_id)
|
||||
{
|
||||
u32 stat;
|
||||
int i;
|
||||
|
||||
spin_lock(&timer_reg_lock);
|
||||
stat = bcm_timer_readl(TIMER_IRQSTAT_REG);
|
||||
bcm_timer_writel(stat, TIMER_IRQSTAT_REG);
|
||||
spin_unlock(&timer_reg_lock);
|
||||
|
||||
for (i = 0; i < BCM63XX_TIMER_COUNT; i++) {
|
||||
if (!(stat & TIMER_IRQSTAT_TIMER_CAUSE(i)))
|
||||
continue;
|
||||
|
||||
spin_lock(&timer_data_lock);
|
||||
if (!timer_data[i].cb) {
|
||||
spin_unlock(&timer_data_lock);
|
||||
continue;
|
||||
}
|
||||
|
||||
timer_data[i].cb(timer_data[i].data);
|
||||
spin_unlock(&timer_data_lock);
|
||||
}
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
int bcm63xx_timer_enable(int id)
|
||||
{
|
||||
u32 reg;
|
||||
unsigned long flags;
|
||||
|
||||
if (id >= BCM63XX_TIMER_COUNT)
|
||||
return -EINVAL;
|
||||
|
||||
spin_lock_irqsave(&timer_reg_lock, flags);
|
||||
|
||||
reg = bcm_timer_readl(TIMER_CTLx_REG(id));
|
||||
reg |= TIMER_CTL_ENABLE_MASK;
|
||||
bcm_timer_writel(reg, TIMER_CTLx_REG(id));
|
||||
|
||||
reg = bcm_timer_readl(TIMER_IRQSTAT_REG);
|
||||
reg |= TIMER_IRQSTAT_TIMER_IR_EN(id);
|
||||
bcm_timer_writel(reg, TIMER_IRQSTAT_REG);
|
||||
|
||||
spin_unlock_irqrestore(&timer_reg_lock, flags);
|
||||
return 0;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(bcm63xx_timer_enable);
|
||||
|
||||
int bcm63xx_timer_disable(int id)
|
||||
{
|
||||
u32 reg;
|
||||
unsigned long flags;
|
||||
|
||||
if (id >= BCM63XX_TIMER_COUNT)
|
||||
return -EINVAL;
|
||||
|
||||
spin_lock_irqsave(&timer_reg_lock, flags);
|
||||
|
||||
reg = bcm_timer_readl(TIMER_CTLx_REG(id));
|
||||
reg &= ~TIMER_CTL_ENABLE_MASK;
|
||||
bcm_timer_writel(reg, TIMER_CTLx_REG(id));
|
||||
|
||||
reg = bcm_timer_readl(TIMER_IRQSTAT_REG);
|
||||
reg &= ~TIMER_IRQSTAT_TIMER_IR_EN(id);
|
||||
bcm_timer_writel(reg, TIMER_IRQSTAT_REG);
|
||||
|
||||
spin_unlock_irqrestore(&timer_reg_lock, flags);
|
||||
return 0;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(bcm63xx_timer_disable);
|
||||
|
||||
int bcm63xx_timer_register(int id, void (*callback)(void *data), void *data)
|
||||
{
|
||||
unsigned long flags;
|
||||
int ret;
|
||||
|
||||
if (id >= BCM63XX_TIMER_COUNT || !callback)
|
||||
return -EINVAL;
|
||||
|
||||
ret = 0;
|
||||
spin_lock_irqsave(&timer_data_lock, flags);
|
||||
if (timer_data[id].cb) {
|
||||
ret = -EBUSY;
|
||||
goto out;
|
||||
}
|
||||
|
||||
timer_data[id].cb = callback;
|
||||
timer_data[id].data = data;
|
||||
|
||||
out:
|
||||
spin_unlock_irqrestore(&timer_data_lock, flags);
|
||||
return ret;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(bcm63xx_timer_register);
|
||||
|
||||
void bcm63xx_timer_unregister(int id)
|
||||
{
|
||||
unsigned long flags;
|
||||
|
||||
if (id >= BCM63XX_TIMER_COUNT)
|
||||
return;
|
||||
|
||||
spin_lock_irqsave(&timer_data_lock, flags);
|
||||
timer_data[id].cb = NULL;
|
||||
spin_unlock_irqrestore(&timer_data_lock, flags);
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(bcm63xx_timer_unregister);
|
||||
|
||||
unsigned int bcm63xx_timer_countdown(unsigned int countdown_us)
|
||||
{
|
||||
return (clk_get_rate(periph_clk) / (1000 * 1000)) * countdown_us;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(bcm63xx_timer_countdown);
|
||||
|
||||
int bcm63xx_timer_set(int id, int monotonic, unsigned int countdown_us)
|
||||
{
|
||||
u32 reg, countdown;
|
||||
unsigned long flags;
|
||||
|
||||
if (id >= BCM63XX_TIMER_COUNT)
|
||||
return -EINVAL;
|
||||
|
||||
countdown = bcm63xx_timer_countdown(countdown_us);
|
||||
if (countdown & ~TIMER_CTL_COUNTDOWN_MASK)
|
||||
return -EINVAL;
|
||||
|
||||
spin_lock_irqsave(&timer_reg_lock, flags);
|
||||
reg = bcm_timer_readl(TIMER_CTLx_REG(id));
|
||||
|
||||
if (monotonic)
|
||||
reg &= ~TIMER_CTL_MONOTONIC_MASK;
|
||||
else
|
||||
reg |= TIMER_CTL_MONOTONIC_MASK;
|
||||
|
||||
reg &= ~TIMER_CTL_COUNTDOWN_MASK;
|
||||
reg |= countdown;
|
||||
bcm_timer_writel(reg, TIMER_CTLx_REG(id));
|
||||
|
||||
spin_unlock_irqrestore(&timer_reg_lock, flags);
|
||||
return 0;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(bcm63xx_timer_set);
|
||||
|
||||
int bcm63xx_timer_init(void)
|
||||
{
|
||||
int ret, irq;
|
||||
u32 reg;
|
||||
|
||||
reg = bcm_timer_readl(TIMER_IRQSTAT_REG);
|
||||
reg &= ~TIMER_IRQSTAT_TIMER0_IR_EN;
|
||||
reg &= ~TIMER_IRQSTAT_TIMER1_IR_EN;
|
||||
reg &= ~TIMER_IRQSTAT_TIMER2_IR_EN;
|
||||
bcm_timer_writel(reg, TIMER_IRQSTAT_REG);
|
||||
|
||||
periph_clk = clk_get(NULL, "periph");
|
||||
if (IS_ERR(periph_clk))
|
||||
return -ENODEV;
|
||||
|
||||
irq = bcm63xx_get_irq_number(IRQ_TIMER);
|
||||
ret = request_irq(irq, timer_interrupt, 0, "bcm63xx_timer", NULL);
|
||||
if (ret) {
|
||||
printk(KERN_ERR "bcm63xx_timer: failed to register irq\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
arch_initcall(bcm63xx_timer_init);
|
||||
@@ -1,868 +0,0 @@
|
||||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.27
|
||||
# Fri Oct 17 06:51:37 2008
|
||||
#
|
||||
CONFIG_MIPS=y
|
||||
|
||||
#
|
||||
# Machine selection
|
||||
#
|
||||
# CONFIG_MACH_ALCHEMY is not set
|
||||
# CONFIG_BASLER_EXCITE is not set
|
||||
# CONFIG_BCM47XX is not set
|
||||
CONFIG_BCM63XX=y
|
||||
# CONFIG_MIPS_COBALT is not set
|
||||
# CONFIG_MACH_DECSTATION is not set
|
||||
# CONFIG_MACH_JAZZ is not set
|
||||
# CONFIG_LASAT is not set
|
||||
# CONFIG_LEMOTE_FULONG is not set
|
||||
# CONFIG_MIPS_MALTA is not set
|
||||
# CONFIG_MIPS_SIM is not set
|
||||
# CONFIG_MARKEINS is not set
|
||||
# CONFIG_MACH_VR41XX is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_PMC_MSP is not set
|
||||
# CONFIG_PMC_YOSEMITE is not set
|
||||
# CONFIG_SGI_IP22 is not set
|
||||
# CONFIG_SGI_IP27 is not set
|
||||
# CONFIG_SGI_IP28 is not set
|
||||
# CONFIG_SGI_IP32 is not set
|
||||
# CONFIG_SIBYTE_CRHINE is not set
|
||||
# CONFIG_SIBYTE_CARMEL is not set
|
||||
# CONFIG_SIBYTE_CRHONE is not set
|
||||
# CONFIG_SIBYTE_RHONE is not set
|
||||
# CONFIG_SIBYTE_SWARM is not set
|
||||
# CONFIG_SIBYTE_LITTLESUR is not set
|
||||
# CONFIG_SIBYTE_SENTOSA is not set
|
||||
# CONFIG_SIBYTE_BIGSUR is not set
|
||||
# CONFIG_SNI_RM is not set
|
||||
# CONFIG_MACH_TX39XX is not set
|
||||
# CONFIG_MACH_TX49XX is not set
|
||||
# CONFIG_MIKROTIK_RB532 is not set
|
||||
# CONFIG_WR_PPMC is not set
|
||||
|
||||
#
|
||||
# CPU support
|
||||
#
|
||||
CONFIG_BCM63XX_CPU_6348=y
|
||||
CONFIG_BCM63XX_CPU_6358=y
|
||||
CONFIG_BOARD_BCM963XX=y
|
||||
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
||||
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
||||
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
|
||||
CONFIG_ARCH_SUPPORTS_OPROFILE=y
|
||||
CONFIG_GENERIC_FIND_NEXT_BIT=y
|
||||
CONFIG_GENERIC_HWEIGHT=y
|
||||
CONFIG_GENERIC_CALIBRATE_DELAY=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_TIME=y
|
||||
CONFIG_GENERIC_CMOS_UPDATE=y
|
||||
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
|
||||
# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
|
||||
CONFIG_CEVT_R4K=y
|
||||
CONFIG_CSRC_R4K=y
|
||||
CONFIG_DMA_NONCOHERENT=y
|
||||
CONFIG_DMA_NEED_PCI_MAP_STATE=y
|
||||
CONFIG_EARLY_PRINTK=y
|
||||
CONFIG_SYS_HAS_EARLY_PRINTK=y
|
||||
# CONFIG_HOTPLUG_CPU is not set
|
||||
# CONFIG_NO_IOPORT is not set
|
||||
CONFIG_GENERIC_GPIO=y
|
||||
CONFIG_CPU_BIG_ENDIAN=y
|
||||
# CONFIG_CPU_LITTLE_ENDIAN is not set
|
||||
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
|
||||
CONFIG_IRQ_CPU=y
|
||||
CONFIG_SWAP_IO_SPACE=y
|
||||
CONFIG_MIPS_L1_CACHE_SHIFT=5
|
||||
|
||||
#
|
||||
# CPU selection
|
||||
#
|
||||
# CONFIG_CPU_LOONGSON2 is not set
|
||||
CONFIG_CPU_MIPS32_R1=y
|
||||
# CONFIG_CPU_MIPS32_R2 is not set
|
||||
# CONFIG_CPU_MIPS64_R1 is not set
|
||||
# CONFIG_CPU_MIPS64_R2 is not set
|
||||
# CONFIG_CPU_R3000 is not set
|
||||
# CONFIG_CPU_TX39XX is not set
|
||||
# CONFIG_CPU_VR41XX is not set
|
||||
# CONFIG_CPU_R4300 is not set
|
||||
# CONFIG_CPU_R4X00 is not set
|
||||
# CONFIG_CPU_TX49XX is not set
|
||||
# CONFIG_CPU_R5000 is not set
|
||||
# CONFIG_CPU_R5432 is not set
|
||||
# CONFIG_CPU_R6000 is not set
|
||||
# CONFIG_CPU_NEVADA is not set
|
||||
# CONFIG_CPU_R8000 is not set
|
||||
# CONFIG_CPU_R10000 is not set
|
||||
# CONFIG_CPU_RM7000 is not set
|
||||
# CONFIG_CPU_RM9000 is not set
|
||||
# CONFIG_CPU_SB1 is not set
|
||||
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
|
||||
CONFIG_CPU_MIPS32=y
|
||||
CONFIG_CPU_MIPSR1=y
|
||||
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
|
||||
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
|
||||
|
||||
#
|
||||
# Kernel type
|
||||
#
|
||||
CONFIG_32BIT=y
|
||||
# CONFIG_64BIT is not set
|
||||
CONFIG_PAGE_SIZE_4KB=y
|
||||
# CONFIG_PAGE_SIZE_8KB is not set
|
||||
# CONFIG_PAGE_SIZE_16KB is not set
|
||||
# CONFIG_PAGE_SIZE_64KB is not set
|
||||
CONFIG_CPU_HAS_PREFETCH=y
|
||||
CONFIG_MIPS_MT_DISABLED=y
|
||||
# CONFIG_MIPS_MT_SMP is not set
|
||||
# CONFIG_MIPS_MT_SMTC is not set
|
||||
CONFIG_CPU_HAS_LLSC=y
|
||||
CONFIG_CPU_HAS_SYNC=y
|
||||
CONFIG_GENERIC_HARDIRQS=y
|
||||
CONFIG_GENERIC_IRQ_PROBE=y
|
||||
CONFIG_CPU_SUPPORTS_HIGHMEM=y
|
||||
CONFIG_ARCH_FLATMEM_ENABLE=y
|
||||
CONFIG_ARCH_POPULATES_NODE_MAP=y
|
||||
CONFIG_SELECT_MEMORY_MODEL=y
|
||||
CONFIG_FLATMEM_MANUAL=y
|
||||
# CONFIG_DISCONTIGMEM_MANUAL is not set
|
||||
# CONFIG_SPARSEMEM_MANUAL is not set
|
||||
CONFIG_FLATMEM=y
|
||||
CONFIG_FLAT_NODE_MEM_MAP=y
|
||||
# CONFIG_SPARSEMEM_STATIC is not set
|
||||
# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
|
||||
CONFIG_PAGEFLAGS_EXTENDED=y
|
||||
CONFIG_SPLIT_PTLOCK_CPUS=4
|
||||
# CONFIG_RESOURCES_64BIT is not set
|
||||
CONFIG_ZONE_DMA_FLAG=0
|
||||
CONFIG_VIRT_TO_BUS=y
|
||||
CONFIG_TICK_ONESHOT=y
|
||||
CONFIG_NO_HZ=y
|
||||
# CONFIG_HIGH_RES_TIMERS is not set
|
||||
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
|
||||
# CONFIG_HZ_48 is not set
|
||||
# CONFIG_HZ_100 is not set
|
||||
# CONFIG_HZ_128 is not set
|
||||
CONFIG_HZ_250=y
|
||||
# CONFIG_HZ_256 is not set
|
||||
# CONFIG_HZ_1000 is not set
|
||||
# CONFIG_HZ_1024 is not set
|
||||
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
|
||||
CONFIG_HZ=250
|
||||
CONFIG_PREEMPT_NONE=y
|
||||
# CONFIG_PREEMPT_VOLUNTARY is not set
|
||||
# CONFIG_PREEMPT is not set
|
||||
# CONFIG_KEXEC is not set
|
||||
# CONFIG_SECCOMP is not set
|
||||
CONFIG_LOCKDEP_SUPPORT=y
|
||||
CONFIG_STACKTRACE_SUPPORT=y
|
||||
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
|
||||
|
||||
#
|
||||
# General setup
|
||||
#
|
||||
CONFIG_EXPERIMENTAL=y
|
||||
CONFIG_BROKEN_ON_SMP=y
|
||||
CONFIG_INIT_ENV_ARG_LIMIT=32
|
||||
CONFIG_LOCALVERSION=""
|
||||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
# CONFIG_SWAP is not set
|
||||
# CONFIG_SYSVIPC is not set
|
||||
# CONFIG_POSIX_MQUEUE is not set
|
||||
# CONFIG_BSD_PROCESS_ACCT is not set
|
||||
# CONFIG_TASKSTATS is not set
|
||||
# CONFIG_AUDIT is not set
|
||||
# CONFIG_IKCONFIG is not set
|
||||
CONFIG_LOG_BUF_SHIFT=17
|
||||
# CONFIG_CGROUPS is not set
|
||||
# CONFIG_GROUP_SCHED is not set
|
||||
CONFIG_SYSFS_DEPRECATED=y
|
||||
CONFIG_SYSFS_DEPRECATED_V2=y
|
||||
# CONFIG_RELAY is not set
|
||||
# CONFIG_NAMESPACES is not set
|
||||
# CONFIG_BLK_DEV_INITRD is not set
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
CONFIG_SYSCTL=y
|
||||
CONFIG_EMBEDDED=y
|
||||
CONFIG_SYSCTL_SYSCALL=y
|
||||
CONFIG_KALLSYMS=y
|
||||
# CONFIG_KALLSYMS_EXTRA_PASS is not set
|
||||
CONFIG_HOTPLUG=y
|
||||
CONFIG_PRINTK=y
|
||||
CONFIG_BUG=y
|
||||
CONFIG_ELF_CORE=y
|
||||
# CONFIG_PCSPKR_PLATFORM is not set
|
||||
CONFIG_COMPAT_BRK=y
|
||||
CONFIG_BASE_FULL=y
|
||||
# CONFIG_FUTEX is not set
|
||||
# CONFIG_EPOLL is not set
|
||||
# CONFIG_SIGNALFD is not set
|
||||
# CONFIG_TIMERFD is not set
|
||||
# CONFIG_EVENTFD is not set
|
||||
# CONFIG_SHMEM is not set
|
||||
# CONFIG_VM_EVENT_COUNTERS is not set
|
||||
# CONFIG_SLUB_DEBUG is not set
|
||||
# CONFIG_SLAB is not set
|
||||
CONFIG_SLUB=y
|
||||
# CONFIG_SLOB is not set
|
||||
# CONFIG_PROFILING is not set
|
||||
# CONFIG_MARKERS is not set
|
||||
CONFIG_HAVE_OPROFILE=y
|
||||
# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
|
||||
# CONFIG_HAVE_IOREMAP_PROT is not set
|
||||
# CONFIG_HAVE_KPROBES is not set
|
||||
# CONFIG_HAVE_KRETPROBES is not set
|
||||
# CONFIG_HAVE_ARCH_TRACEHOOK is not set
|
||||
# CONFIG_HAVE_DMA_ATTRS is not set
|
||||
# CONFIG_USE_GENERIC_SMP_HELPERS is not set
|
||||
# CONFIG_HAVE_CLK is not set
|
||||
CONFIG_PROC_PAGE_MONITOR=y
|
||||
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
|
||||
CONFIG_TINY_SHMEM=y
|
||||
CONFIG_BASE_SMALL=0
|
||||
# CONFIG_MODULES is not set
|
||||
CONFIG_BLOCK=y
|
||||
# CONFIG_LBD is not set
|
||||
# CONFIG_BLK_DEV_IO_TRACE is not set
|
||||
# CONFIG_LSF is not set
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_BLK_DEV_INTEGRITY is not set
|
||||
|
||||
#
|
||||
# IO Schedulers
|
||||
#
|
||||
CONFIG_IOSCHED_NOOP=y
|
||||
# CONFIG_IOSCHED_AS is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
# CONFIG_IOSCHED_CFQ is not set
|
||||
# CONFIG_DEFAULT_AS is not set
|
||||
# CONFIG_DEFAULT_DEADLINE is not set
|
||||
# CONFIG_DEFAULT_CFQ is not set
|
||||
CONFIG_DEFAULT_NOOP=y
|
||||
CONFIG_DEFAULT_IOSCHED="noop"
|
||||
CONFIG_CLASSIC_RCU=y
|
||||
|
||||
#
|
||||
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
|
||||
#
|
||||
CONFIG_HW_HAS_PCI=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCI_DOMAINS=y
|
||||
# CONFIG_ARCH_SUPPORTS_MSI is not set
|
||||
# CONFIG_PCI_LEGACY is not set
|
||||
CONFIG_MMU=y
|
||||
CONFIG_PCCARD=y
|
||||
# CONFIG_PCMCIA_DEBUG is not set
|
||||
CONFIG_PCMCIA=y
|
||||
CONFIG_PCMCIA_LOAD_CIS=y
|
||||
CONFIG_PCMCIA_IOCTL=y
|
||||
CONFIG_CARDBUS=y
|
||||
|
||||
#
|
||||
# PC-card bridges
|
||||
#
|
||||
# CONFIG_YENTA is not set
|
||||
# CONFIG_PD6729 is not set
|
||||
# CONFIG_I82092 is not set
|
||||
CONFIG_PCMCIA_BCM63XX=y
|
||||
# CONFIG_HOTPLUG_PCI is not set
|
||||
|
||||
#
|
||||
# Executable file formats
|
||||
#
|
||||
CONFIG_BINFMT_ELF=y
|
||||
# CONFIG_BINFMT_MISC is not set
|
||||
CONFIG_TRAD_SIGNALS=y
|
||||
|
||||
#
|
||||
# Power management options
|
||||
#
|
||||
CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
||||
# CONFIG_PM is not set
|
||||
CONFIG_NET=y
|
||||
|
||||
#
|
||||
# Networking options
|
||||
#
|
||||
# CONFIG_PACKET is not set
|
||||
CONFIG_UNIX=y
|
||||
# CONFIG_NET_KEY is not set
|
||||
CONFIG_INET=y
|
||||
# CONFIG_IP_MULTICAST is not set
|
||||
# CONFIG_IP_ADVANCED_ROUTER is not set
|
||||
CONFIG_IP_FIB_HASH=y
|
||||
# CONFIG_IP_PNP is not set
|
||||
# CONFIG_NET_IPIP is not set
|
||||
# CONFIG_NET_IPGRE is not set
|
||||
# CONFIG_ARPD is not set
|
||||
# CONFIG_SYN_COOKIES is not set
|
||||
# CONFIG_INET_AH is not set
|
||||
# CONFIG_INET_ESP is not set
|
||||
# CONFIG_INET_IPCOMP is not set
|
||||
# CONFIG_INET_XFRM_TUNNEL is not set
|
||||
# CONFIG_INET_TUNNEL is not set
|
||||
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
|
||||
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
|
||||
# CONFIG_INET_XFRM_MODE_BEET is not set
|
||||
# CONFIG_INET_LRO is not set
|
||||
# CONFIG_INET_DIAG is not set
|
||||
# CONFIG_TCP_CONG_ADVANCED is not set
|
||||
CONFIG_TCP_CONG_CUBIC=y
|
||||
CONFIG_DEFAULT_TCP_CONG="cubic"
|
||||
# CONFIG_TCP_MD5SIG is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
# CONFIG_NETWORK_SECMARK is not set
|
||||
# CONFIG_NETFILTER is not set
|
||||
# CONFIG_IP_DCCP is not set
|
||||
# CONFIG_IP_SCTP is not set
|
||||
# CONFIG_TIPC is not set
|
||||
# CONFIG_ATM is not set
|
||||
# CONFIG_BRIDGE is not set
|
||||
# CONFIG_VLAN_8021Q is not set
|
||||
# CONFIG_DECNET is not set
|
||||
# CONFIG_LLC2 is not set
|
||||
# CONFIG_IPX is not set
|
||||
# CONFIG_ATALK is not set
|
||||
# CONFIG_X25 is not set
|
||||
# CONFIG_LAPB is not set
|
||||
# CONFIG_ECONET is not set
|
||||
# CONFIG_WAN_ROUTER is not set
|
||||
# CONFIG_NET_SCHED is not set
|
||||
|
||||
#
|
||||
# Network testing
|
||||
#
|
||||
# CONFIG_NET_PKTGEN is not set
|
||||
# CONFIG_HAMRADIO is not set
|
||||
# CONFIG_CAN is not set
|
||||
# CONFIG_IRDA is not set
|
||||
# CONFIG_BT is not set
|
||||
# CONFIG_AF_RXRPC is not set
|
||||
|
||||
#
|
||||
# Wireless
|
||||
#
|
||||
# CONFIG_CFG80211 is not set
|
||||
# CONFIG_WIRELESS_EXT is not set
|
||||
# CONFIG_MAC80211 is not set
|
||||
# CONFIG_IEEE80211 is not set
|
||||
# CONFIG_RFKILL is not set
|
||||
# CONFIG_NET_9P is not set
|
||||
|
||||
#
|
||||
# Device Drivers
|
||||
#
|
||||
|
||||
#
|
||||
# Generic Driver Options
|
||||
#
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
# CONFIG_STANDALONE is not set
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
CONFIG_FW_LOADER=y
|
||||
CONFIG_FIRMWARE_IN_KERNEL=y
|
||||
CONFIG_EXTRA_FIRMWARE=""
|
||||
# CONFIG_SYS_HYPERVISOR is not set
|
||||
# CONFIG_CONNECTOR is not set
|
||||
CONFIG_MTD=y
|
||||
# CONFIG_MTD_DEBUG is not set
|
||||
# CONFIG_MTD_CONCAT is not set
|
||||
CONFIG_MTD_PARTITIONS=y
|
||||
# CONFIG_MTD_REDBOOT_PARTS is not set
|
||||
# CONFIG_MTD_CMDLINE_PARTS is not set
|
||||
# CONFIG_MTD_AR7_PARTS is not set
|
||||
|
||||
#
|
||||
# User Modules And Translation Layers
|
||||
#
|
||||
# CONFIG_MTD_CHAR is not set
|
||||
# CONFIG_MTD_BLKDEVS is not set
|
||||
# CONFIG_MTD_BLOCK is not set
|
||||
# CONFIG_MTD_BLOCK_RO is not set
|
||||
# CONFIG_FTL is not set
|
||||
# CONFIG_NFTL is not set
|
||||
# CONFIG_INFTL is not set
|
||||
# CONFIG_RFD_FTL is not set
|
||||
# CONFIG_SSFDC is not set
|
||||
# CONFIG_MTD_OOPS is not set
|
||||
|
||||
#
|
||||
# RAM/ROM/Flash chip drivers
|
||||
#
|
||||
CONFIG_MTD_CFI=y
|
||||
# CONFIG_MTD_JEDECPROBE is not set
|
||||
CONFIG_MTD_GEN_PROBE=y
|
||||
# CONFIG_MTD_CFI_ADV_OPTIONS is not set
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_1=y
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_2=y
|
||||
CONFIG_MTD_MAP_BANK_WIDTH_4=y
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
|
||||
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
|
||||
CONFIG_MTD_CFI_I1=y
|
||||
CONFIG_MTD_CFI_I2=y
|
||||
# CONFIG_MTD_CFI_I4 is not set
|
||||
# CONFIG_MTD_CFI_I8 is not set
|
||||
CONFIG_MTD_CFI_INTELEXT=y
|
||||
CONFIG_MTD_CFI_AMDSTD=y
|
||||
# CONFIG_MTD_CFI_STAA is not set
|
||||
CONFIG_MTD_CFI_UTIL=y
|
||||
# CONFIG_MTD_RAM is not set
|
||||
# CONFIG_MTD_ROM is not set
|
||||
# CONFIG_MTD_ABSENT is not set
|
||||
|
||||
#
|
||||
# Mapping drivers for chip access
|
||||
#
|
||||
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
CONFIG_MTD_PHYSMAP_START=0x8000000
|
||||
CONFIG_MTD_PHYSMAP_LEN=0
|
||||
CONFIG_MTD_PHYSMAP_BANKWIDTH=2
|
||||
# CONFIG_MTD_INTEL_VR_NOR is not set
|
||||
# CONFIG_MTD_PLATRAM is not set
|
||||
|
||||
#
|
||||
# Self-contained MTD device drivers
|
||||
#
|
||||
# CONFIG_MTD_PMC551 is not set
|
||||
# CONFIG_MTD_SLRAM is not set
|
||||
# CONFIG_MTD_PHRAM is not set
|
||||
# CONFIG_MTD_MTDRAM is not set
|
||||
# CONFIG_MTD_BLOCK2MTD is not set
|
||||
|
||||
#
|
||||
# Disk-On-Chip Device Drivers
|
||||
#
|
||||
# CONFIG_MTD_DOC2000 is not set
|
||||
# CONFIG_MTD_DOC2001 is not set
|
||||
# CONFIG_MTD_DOC2001PLUS is not set
|
||||
# CONFIG_MTD_NAND is not set
|
||||
# CONFIG_MTD_ONENAND is not set
|
||||
|
||||
#
|
||||
# UBI - Unsorted block images
|
||||
#
|
||||
# CONFIG_MTD_UBI is not set
|
||||
# CONFIG_PARPORT is not set
|
||||
# CONFIG_BLK_DEV is not set
|
||||
# CONFIG_MISC_DEVICES is not set
|
||||
CONFIG_HAVE_IDE=y
|
||||
# CONFIG_IDE is not set
|
||||
|
||||
#
|
||||
# SCSI device support
|
||||
#
|
||||
# CONFIG_RAID_ATTRS is not set
|
||||
# CONFIG_SCSI is not set
|
||||
# CONFIG_SCSI_DMA is not set
|
||||
# CONFIG_SCSI_NETLINK is not set
|
||||
# CONFIG_ATA is not set
|
||||
# CONFIG_MD is not set
|
||||
# CONFIG_FUSION is not set
|
||||
|
||||
#
|
||||
# IEEE 1394 (FireWire) support
|
||||
#
|
||||
|
||||
#
|
||||
# Enable only one of the two stacks, unless you know what you are doing
|
||||
#
|
||||
# CONFIG_FIREWIRE is not set
|
||||
# CONFIG_IEEE1394 is not set
|
||||
# CONFIG_I2O is not set
|
||||
CONFIG_NETDEVICES=y
|
||||
# CONFIG_DUMMY is not set
|
||||
# CONFIG_BONDING is not set
|
||||
# CONFIG_MACVLAN is not set
|
||||
# CONFIG_EQUALIZER is not set
|
||||
# CONFIG_TUN is not set
|
||||
# CONFIG_VETH is not set
|
||||
# CONFIG_ARCNET is not set
|
||||
CONFIG_PHYLIB=y
|
||||
|
||||
#
|
||||
# MII PHY device drivers
|
||||
#
|
||||
# CONFIG_MARVELL_PHY is not set
|
||||
# CONFIG_DAVICOM_PHY is not set
|
||||
# CONFIG_QSEMI_PHY is not set
|
||||
# CONFIG_LXT_PHY is not set
|
||||
# CONFIG_CICADA_PHY is not set
|
||||
# CONFIG_VITESSE_PHY is not set
|
||||
# CONFIG_SMSC_PHY is not set
|
||||
# CONFIG_BROADCOM_PHY is not set
|
||||
CONFIG_BCM63XX_PHY=y
|
||||
# CONFIG_ICPLUS_PHY is not set
|
||||
# CONFIG_REALTEK_PHY is not set
|
||||
# CONFIG_FIXED_PHY is not set
|
||||
# CONFIG_MDIO_BITBANG is not set
|
||||
CONFIG_NET_ETHERNET=y
|
||||
CONFIG_MII=y
|
||||
# CONFIG_AX88796 is not set
|
||||
# CONFIG_HAPPYMEAL is not set
|
||||
# CONFIG_SUNGEM is not set
|
||||
# CONFIG_CASSINI is not set
|
||||
# CONFIG_NET_VENDOR_3COM is not set
|
||||
# CONFIG_DM9000 is not set
|
||||
# CONFIG_NET_TULIP is not set
|
||||
# CONFIG_HP100 is not set
|
||||
# CONFIG_IBM_NEW_EMAC_ZMII is not set
|
||||
# CONFIG_IBM_NEW_EMAC_RGMII is not set
|
||||
# CONFIG_IBM_NEW_EMAC_TAH is not set
|
||||
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
|
||||
# CONFIG_NET_PCI is not set
|
||||
# CONFIG_B44 is not set
|
||||
CONFIG_BCM63XX_ENET=y
|
||||
# CONFIG_NETDEV_1000 is not set
|
||||
# CONFIG_NETDEV_10000 is not set
|
||||
# CONFIG_TR is not set
|
||||
|
||||
#
|
||||
# Wireless LAN
|
||||
#
|
||||
# CONFIG_WLAN_PRE80211 is not set
|
||||
# CONFIG_WLAN_80211 is not set
|
||||
# CONFIG_IWLWIFI_LEDS is not set
|
||||
|
||||
#
|
||||
# USB Network Adapters
|
||||
#
|
||||
# CONFIG_USB_CATC is not set
|
||||
# CONFIG_USB_KAWETH is not set
|
||||
# CONFIG_USB_PEGASUS is not set
|
||||
# CONFIG_USB_RTL8150 is not set
|
||||
# CONFIG_USB_USBNET is not set
|
||||
# CONFIG_NET_PCMCIA is not set
|
||||
# CONFIG_WAN is not set
|
||||
# CONFIG_FDDI is not set
|
||||
# CONFIG_HIPPI is not set
|
||||
# CONFIG_PPP is not set
|
||||
# CONFIG_SLIP is not set
|
||||
# CONFIG_NETCONSOLE is not set
|
||||
# CONFIG_NETPOLL is not set
|
||||
# CONFIG_NET_POLL_CONTROLLER is not set
|
||||
# CONFIG_ISDN is not set
|
||||
# CONFIG_PHONE is not set
|
||||
|
||||
#
|
||||
# Input device support
|
||||
#
|
||||
# CONFIG_INPUT is not set
|
||||
|
||||
#
|
||||
# Hardware I/O ports
|
||||
#
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_GAMEPORT is not set
|
||||
|
||||
#
|
||||
# Character devices
|
||||
#
|
||||
# CONFIG_VT is not set
|
||||
# CONFIG_DEVKMEM is not set
|
||||
# CONFIG_SERIAL_NONSTANDARD is not set
|
||||
# CONFIG_NOZOMI is not set
|
||||
|
||||
#
|
||||
# Serial drivers
|
||||
#
|
||||
# CONFIG_SERIAL_8250 is not set
|
||||
|
||||
#
|
||||
# Non-8250 serial port support
|
||||
#
|
||||
CONFIG_SERIAL_CORE=y
|
||||
CONFIG_SERIAL_CORE_CONSOLE=y
|
||||
# CONFIG_SERIAL_JSM is not set
|
||||
CONFIG_SERIAL_BCM63XX=y
|
||||
CONFIG_SERIAL_BCM63XX_CONSOLE=y
|
||||
# CONFIG_UNIX98_PTYS is not set
|
||||
CONFIG_LEGACY_PTYS=y
|
||||
CONFIG_LEGACY_PTY_COUNT=256
|
||||
# CONFIG_IPMI_HANDLER is not set
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
# CONFIG_R3964 is not set
|
||||
# CONFIG_APPLICOM is not set
|
||||
|
||||
#
|
||||
# PCMCIA character devices
|
||||
#
|
||||
# CONFIG_SYNCLINK_CS is not set
|
||||
# CONFIG_CARDMAN_4000 is not set
|
||||
# CONFIG_CARDMAN_4040 is not set
|
||||
# CONFIG_IPWIRELESS is not set
|
||||
# CONFIG_RAW_DRIVER is not set
|
||||
# CONFIG_TCG_TPM is not set
|
||||
CONFIG_DEVPORT=y
|
||||
# CONFIG_I2C is not set
|
||||
# CONFIG_SPI is not set
|
||||
# CONFIG_W1 is not set
|
||||
# CONFIG_POWER_SUPPLY is not set
|
||||
# CONFIG_HWMON is not set
|
||||
# CONFIG_THERMAL is not set
|
||||
# CONFIG_THERMAL_HWMON is not set
|
||||
# CONFIG_WATCHDOG is not set
|
||||
|
||||
#
|
||||
# Sonics Silicon Backplane
|
||||
#
|
||||
CONFIG_SSB_POSSIBLE=y
|
||||
# CONFIG_SSB is not set
|
||||
|
||||
#
|
||||
# Multifunction device drivers
|
||||
#
|
||||
# CONFIG_MFD_CORE is not set
|
||||
# CONFIG_MFD_SM501 is not set
|
||||
# CONFIG_HTC_PASIC3 is not set
|
||||
# CONFIG_MFD_TMIO is not set
|
||||
|
||||
#
|
||||
# Multimedia devices
|
||||
#
|
||||
|
||||
#
|
||||
# Multimedia core support
|
||||
#
|
||||
# CONFIG_VIDEO_DEV is not set
|
||||
# CONFIG_DVB_CORE is not set
|
||||
# CONFIG_VIDEO_MEDIA is not set
|
||||
|
||||
#
|
||||
# Multimedia drivers
|
||||
#
|
||||
# CONFIG_DAB is not set
|
||||
|
||||
#
|
||||
# Graphics support
|
||||
#
|
||||
# CONFIG_DRM is not set
|
||||
# CONFIG_VGASTATE is not set
|
||||
# CONFIG_VIDEO_OUTPUT_CONTROL is not set
|
||||
# CONFIG_FB is not set
|
||||
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
|
||||
|
||||
#
|
||||
# Display device support
|
||||
#
|
||||
CONFIG_DISPLAY_SUPPORT=y
|
||||
|
||||
#
|
||||
# Display hardware drivers
|
||||
#
|
||||
# CONFIG_SOUND is not set
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_USB_ARCH_HAS_HCD=y
|
||||
CONFIG_USB_ARCH_HAS_OHCI=y
|
||||
CONFIG_USB_ARCH_HAS_EHCI=y
|
||||
CONFIG_USB=y
|
||||
# CONFIG_USB_DEBUG is not set
|
||||
# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
|
||||
|
||||
#
|
||||
# Miscellaneous USB options
|
||||
#
|
||||
# CONFIG_USB_DEVICEFS is not set
|
||||
# CONFIG_USB_DEVICE_CLASS is not set
|
||||
# CONFIG_USB_DYNAMIC_MINORS is not set
|
||||
# CONFIG_USB_OTG is not set
|
||||
# CONFIG_USB_OTG_WHITELIST is not set
|
||||
# CONFIG_USB_OTG_BLACKLIST_HUB is not set
|
||||
# CONFIG_USB_MON is not set
|
||||
|
||||
#
|
||||
# USB Host Controller Drivers
|
||||
#
|
||||
# CONFIG_USB_C67X00_HCD is not set
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
|
||||
# CONFIG_USB_EHCI_TT_NEWSCHED is not set
|
||||
CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y
|
||||
# CONFIG_USB_ISP116X_HCD is not set
|
||||
# CONFIG_USB_ISP1760_HCD is not set
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y
|
||||
CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y
|
||||
CONFIG_USB_OHCI_LITTLE_ENDIAN=y
|
||||
# CONFIG_USB_UHCI_HCD is not set
|
||||
# CONFIG_USB_SL811_HCD is not set
|
||||
# CONFIG_USB_R8A66597_HCD is not set
|
||||
|
||||
#
|
||||
# USB Device Class drivers
|
||||
#
|
||||
# CONFIG_USB_ACM is not set
|
||||
# CONFIG_USB_PRINTER is not set
|
||||
# CONFIG_USB_WDM is not set
|
||||
|
||||
#
|
||||
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
|
||||
#
|
||||
|
||||
#
|
||||
# may also be needed; see USB_STORAGE Help for more information
|
||||
#
|
||||
# CONFIG_USB_LIBUSUAL is not set
|
||||
|
||||
#
|
||||
# USB Imaging devices
|
||||
#
|
||||
# CONFIG_USB_MDC800 is not set
|
||||
|
||||
#
|
||||
# USB port drivers
|
||||
#
|
||||
# CONFIG_USB_SERIAL is not set
|
||||
|
||||
#
|
||||
# USB Miscellaneous drivers
|
||||
#
|
||||
# CONFIG_USB_EMI62 is not set
|
||||
# CONFIG_USB_EMI26 is not set
|
||||
# CONFIG_USB_ADUTUX is not set
|
||||
# CONFIG_USB_RIO500 is not set
|
||||
# CONFIG_USB_LEGOTOWER is not set
|
||||
# CONFIG_USB_LCD is not set
|
||||
# CONFIG_USB_BERRY_CHARGE is not set
|
||||
# CONFIG_USB_LED is not set
|
||||
# CONFIG_USB_CYPRESS_CY7C63 is not set
|
||||
# CONFIG_USB_CYTHERM is not set
|
||||
# CONFIG_USB_PHIDGET is not set
|
||||
# CONFIG_USB_IDMOUSE is not set
|
||||
# CONFIG_USB_FTDI_ELAN is not set
|
||||
# CONFIG_USB_APPLEDISPLAY is not set
|
||||
# CONFIG_USB_SISUSBVGA is not set
|
||||
# CONFIG_USB_LD is not set
|
||||
# CONFIG_USB_TRANCEVIBRATOR is not set
|
||||
# CONFIG_USB_IOWARRIOR is not set
|
||||
# CONFIG_USB_ISIGHTFW is not set
|
||||
# CONFIG_USB_GADGET is not set
|
||||
# CONFIG_MMC is not set
|
||||
# CONFIG_MEMSTICK is not set
|
||||
# CONFIG_NEW_LEDS is not set
|
||||
# CONFIG_ACCESSIBILITY is not set
|
||||
# CONFIG_INFINIBAND is not set
|
||||
CONFIG_RTC_LIB=y
|
||||
# CONFIG_RTC_CLASS is not set
|
||||
# CONFIG_DMADEVICES is not set
|
||||
# CONFIG_UIO is not set
|
||||
|
||||
#
|
||||
# File systems
|
||||
#
|
||||
# CONFIG_EXT2_FS is not set
|
||||
# CONFIG_EXT3_FS is not set
|
||||
# CONFIG_EXT4DEV_FS is not set
|
||||
# CONFIG_REISERFS_FS is not set
|
||||
# CONFIG_JFS_FS is not set
|
||||
# CONFIG_FS_POSIX_ACL is not set
|
||||
# CONFIG_XFS_FS is not set
|
||||
# CONFIG_OCFS2_FS is not set
|
||||
# CONFIG_DNOTIFY is not set
|
||||
# CONFIG_INOTIFY is not set
|
||||
# CONFIG_QUOTA is not set
|
||||
# CONFIG_AUTOFS_FS is not set
|
||||
# CONFIG_AUTOFS4_FS is not set
|
||||
# CONFIG_FUSE_FS is not set
|
||||
|
||||
#
|
||||
# CD-ROM/DVD Filesystems
|
||||
#
|
||||
# CONFIG_ISO9660_FS is not set
|
||||
# CONFIG_UDF_FS is not set
|
||||
|
||||
#
|
||||
# DOS/FAT/NT Filesystems
|
||||
#
|
||||
# CONFIG_MSDOS_FS is not set
|
||||
# CONFIG_VFAT_FS is not set
|
||||
# CONFIG_NTFS_FS is not set
|
||||
|
||||
#
|
||||
# Pseudo filesystems
|
||||
#
|
||||
CONFIG_PROC_FS=y
|
||||
CONFIG_PROC_KCORE=y
|
||||
CONFIG_PROC_SYSCTL=y
|
||||
CONFIG_SYSFS=y
|
||||
CONFIG_TMPFS=y
|
||||
# CONFIG_TMPFS_POSIX_ACL is not set
|
||||
# CONFIG_HUGETLB_PAGE is not set
|
||||
# CONFIG_CONFIGFS_FS is not set
|
||||
|
||||
#
|
||||
# Miscellaneous filesystems
|
||||
#
|
||||
# CONFIG_ADFS_FS is not set
|
||||
# CONFIG_AFFS_FS is not set
|
||||
# CONFIG_HFS_FS is not set
|
||||
# CONFIG_HFSPLUS_FS is not set
|
||||
# CONFIG_BEFS_FS is not set
|
||||
# CONFIG_BFS_FS is not set
|
||||
# CONFIG_EFS_FS is not set
|
||||
# CONFIG_JFFS2_FS is not set
|
||||
# CONFIG_CRAMFS is not set
|
||||
# CONFIG_VXFS_FS is not set
|
||||
# CONFIG_MINIX_FS is not set
|
||||
# CONFIG_OMFS_FS is not set
|
||||
# CONFIG_HPFS_FS is not set
|
||||
# CONFIG_QNX4FS_FS is not set
|
||||
# CONFIG_ROMFS_FS is not set
|
||||
# CONFIG_SYSV_FS is not set
|
||||
# CONFIG_UFS_FS is not set
|
||||
# CONFIG_NETWORK_FILESYSTEMS is not set
|
||||
|
||||
#
|
||||
# Partition Types
|
||||
#
|
||||
# CONFIG_PARTITION_ADVANCED is not set
|
||||
CONFIG_MSDOS_PARTITION=y
|
||||
# CONFIG_NLS is not set
|
||||
# CONFIG_DLM is not set
|
||||
|
||||
#
|
||||
# Kernel hacking
|
||||
#
|
||||
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
|
||||
# CONFIG_PRINTK_TIME is not set
|
||||
CONFIG_ENABLE_WARN_DEPRECATED=y
|
||||
CONFIG_ENABLE_MUST_CHECK=y
|
||||
CONFIG_FRAME_WARN=1024
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
# CONFIG_UNUSED_SYMBOLS is not set
|
||||
# CONFIG_DEBUG_FS is not set
|
||||
# CONFIG_HEADERS_CHECK is not set
|
||||
# CONFIG_DEBUG_KERNEL is not set
|
||||
# CONFIG_DEBUG_MEMORY_INIT is not set
|
||||
CONFIG_SYSCTL_SYSCALL_CHECK=y
|
||||
# CONFIG_SAMPLES is not set
|
||||
CONFIG_HAVE_ARCH_KGDB=y
|
||||
CONFIG_CMDLINE="console=ttyS0,115200"
|
||||
|
||||
#
|
||||
# Security options
|
||||
#
|
||||
# CONFIG_KEYS is not set
|
||||
# CONFIG_SECURITY is not set
|
||||
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
|
||||
# CONFIG_CRYPTO is not set
|
||||
|
||||
#
|
||||
# Library routines
|
||||
#
|
||||
CONFIG_BITREVERSE=y
|
||||
# CONFIG_GENERIC_FIND_FIRST_BIT is not set
|
||||
# CONFIG_CRC_CCITT is not set
|
||||
# CONFIG_CRC16 is not set
|
||||
# CONFIG_CRC_T10DIF is not set
|
||||
# CONFIG_CRC_ITU_T is not set
|
||||
CONFIG_CRC32=y
|
||||
# CONFIG_CRC7 is not set
|
||||
# CONFIG_LIBCRC32C is not set
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT=y
|
||||
CONFIG_HAS_DMA=y
|
||||
@@ -1 +0,0 @@
|
||||
../../../../include/asm-mips/mach-bcm63xx
|
||||
@@ -1,21 +0,0 @@
|
||||
/*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/pci.h>
|
||||
#include <bcm63xx_cpu.h>
|
||||
|
||||
int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
||||
{
|
||||
return bcm63xx_get_irq_number(IRQ_PCI);
|
||||
}
|
||||
|
||||
int pcibios_plat_dev_init(struct pci_dev *dev)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
@@ -1,467 +0,0 @@
|
||||
/*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
#include "pci-bcm63xx.h"
|
||||
|
||||
/*
|
||||
* swizzle 32bits data to return only the needed part
|
||||
*/
|
||||
static int postprocess_read(u32 data, int where, unsigned int size)
|
||||
{
|
||||
u32 ret;
|
||||
|
||||
ret = 0;
|
||||
switch (size) {
|
||||
case 1:
|
||||
ret = (data >> ((where & 3) << 3)) & 0xff;
|
||||
break;
|
||||
case 2:
|
||||
ret = (data >> ((where & 3) << 3)) & 0xffff;
|
||||
break;
|
||||
case 4:
|
||||
ret = data;
|
||||
break;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int preprocess_write(u32 orig_data, u32 val, int where,
|
||||
unsigned int size)
|
||||
{
|
||||
u32 ret;
|
||||
|
||||
ret = 0;
|
||||
switch (size) {
|
||||
case 1:
|
||||
ret = (orig_data & ~(0xff << ((where & 3) << 3))) |
|
||||
(val << ((where & 3) << 3));
|
||||
break;
|
||||
case 2:
|
||||
ret = (orig_data & ~(0xffff << ((where & 3) << 3))) |
|
||||
(val << ((where & 3) << 3));
|
||||
break;
|
||||
case 4:
|
||||
ret = val;
|
||||
break;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* setup hardware for a configuration cycle with given parameters
|
||||
*/
|
||||
static int bcm63xx_setup_cfg_access(int type, unsigned int busn,
|
||||
unsigned int devfn, int where)
|
||||
{
|
||||
unsigned int slot, func, reg;
|
||||
u32 val;
|
||||
|
||||
slot = PCI_SLOT(devfn);
|
||||
func = PCI_FUNC(devfn);
|
||||
reg = where >> 2;
|
||||
|
||||
/* sanity check */
|
||||
if (slot > (MPI_L2PCFG_DEVNUM_MASK >> MPI_L2PCFG_DEVNUM_SHIFT))
|
||||
return 1;
|
||||
|
||||
if (func > (MPI_L2PCFG_FUNC_MASK >> MPI_L2PCFG_FUNC_SHIFT))
|
||||
return 1;
|
||||
|
||||
if (reg > (MPI_L2PCFG_REG_MASK >> MPI_L2PCFG_REG_SHIFT))
|
||||
return 1;
|
||||
|
||||
/* ok, setup config access */
|
||||
val = (reg << MPI_L2PCFG_REG_SHIFT);
|
||||
val |= (func << MPI_L2PCFG_FUNC_SHIFT);
|
||||
val |= (slot << MPI_L2PCFG_DEVNUM_SHIFT);
|
||||
val |= MPI_L2PCFG_CFG_USEREG_MASK;
|
||||
val |= MPI_L2PCFG_CFG_SEL_MASK;
|
||||
/* type 0 cycle for local bus, type 1 cycle for anything else */
|
||||
if (type != 0) {
|
||||
/* FIXME: how to specify bus ??? */
|
||||
val |= (1 << MPI_L2PCFG_CFG_TYPE_SHIFT);
|
||||
}
|
||||
bcm_mpi_writel(val, MPI_L2PCFG_REG);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int bcm63xx_do_cfg_read(int type, unsigned int busn,
|
||||
unsigned int devfn, int where, int size,
|
||||
u32 *val)
|
||||
{
|
||||
u32 data;
|
||||
|
||||
/* two phase cycle, first we write address, then read data at
|
||||
* another location, caller already has a spinlock so no need
|
||||
* to add one here */
|
||||
if (bcm63xx_setup_cfg_access(type, busn, devfn, where))
|
||||
return PCIBIOS_DEVICE_NOT_FOUND;
|
||||
iob();
|
||||
data = le32_to_cpu(__raw_readl(pci_iospace_start));
|
||||
/* restore IO space normal behaviour */
|
||||
bcm_mpi_writel(0, MPI_L2PCFG_REG);
|
||||
|
||||
*val = postprocess_read(data, where, size);
|
||||
|
||||
return PCIBIOS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
static int bcm63xx_do_cfg_write(int type, unsigned int busn,
|
||||
unsigned int devfn, int where, int size,
|
||||
u32 val)
|
||||
{
|
||||
u32 data;
|
||||
|
||||
/* two phase cycle, first we write address, then write data to
|
||||
* another location, caller already has a spinlock so no need
|
||||
* to add one here */
|
||||
if (bcm63xx_setup_cfg_access(type, busn, devfn, where))
|
||||
return PCIBIOS_DEVICE_NOT_FOUND;
|
||||
iob();
|
||||
|
||||
data = le32_to_cpu(__raw_readl(pci_iospace_start));
|
||||
data = preprocess_write(data, val, where, size);
|
||||
|
||||
__raw_writel(cpu_to_le32(data), pci_iospace_start);
|
||||
wmb();
|
||||
/* no way to know the access is done, we have to wait */
|
||||
udelay(500);
|
||||
/* restore IO space normal behaviour */
|
||||
bcm_mpi_writel(0, MPI_L2PCFG_REG);
|
||||
|
||||
return PCIBIOS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
static int bcm63xx_pci_read(struct pci_bus *bus, unsigned int devfn,
|
||||
int where, int size, u32 *val)
|
||||
{
|
||||
int type;
|
||||
|
||||
type = bus->parent ? 1 : 0;
|
||||
|
||||
if (type == 0 && PCI_SLOT(devfn) == CARDBUS_PCI_IDSEL)
|
||||
return PCIBIOS_DEVICE_NOT_FOUND;
|
||||
|
||||
return bcm63xx_do_cfg_read(type, bus->number, devfn,
|
||||
where, size, val);
|
||||
}
|
||||
|
||||
static int bcm63xx_pci_write(struct pci_bus *bus, unsigned int devfn,
|
||||
int where, int size, u32 val)
|
||||
{
|
||||
int type;
|
||||
|
||||
type = bus->parent ? 1 : 0;
|
||||
|
||||
if (type == 0 && PCI_SLOT(devfn) == CARDBUS_PCI_IDSEL)
|
||||
return PCIBIOS_DEVICE_NOT_FOUND;
|
||||
|
||||
return bcm63xx_do_cfg_write(type, bus->number, devfn,
|
||||
where, size, val);
|
||||
}
|
||||
|
||||
struct pci_ops bcm63xx_pci_ops = {
|
||||
.read = bcm63xx_pci_read,
|
||||
.write = bcm63xx_pci_write
|
||||
};
|
||||
|
||||
#ifdef CONFIG_CARDBUS
|
||||
/*
|
||||
* emulate configuration read access on a cardbus bridge
|
||||
*/
|
||||
#define FAKE_CB_BRIDGE_SLOT 0x1e
|
||||
|
||||
static int fake_cb_bridge_bus_number = -1;
|
||||
|
||||
static struct {
|
||||
u16 pci_command;
|
||||
u8 cb_latency;
|
||||
u8 subordinate_busn;
|
||||
u8 cardbus_busn;
|
||||
u8 pci_busn;
|
||||
int bus_assigned;
|
||||
u16 bridge_control;
|
||||
|
||||
u32 mem_base0;
|
||||
u32 mem_limit0;
|
||||
u32 mem_base1;
|
||||
u32 mem_limit1;
|
||||
|
||||
u32 io_base0;
|
||||
u32 io_limit0;
|
||||
u32 io_base1;
|
||||
u32 io_limit1;
|
||||
} fake_cb_bridge_regs;
|
||||
|
||||
static int fake_cb_bridge_read(int where, int size, u32 *val)
|
||||
{
|
||||
unsigned int reg;
|
||||
u32 data;
|
||||
|
||||
data = 0;
|
||||
reg = where >> 2;
|
||||
switch (reg) {
|
||||
case (PCI_VENDOR_ID >> 2):
|
||||
case (PCI_CB_SUBSYSTEM_VENDOR_ID >> 2):
|
||||
/* create dummy vendor/device id from our cpu id */
|
||||
data = (bcm63xx_get_cpu_id() << 16) | PCI_VENDOR_ID_BROADCOM;
|
||||
break;
|
||||
|
||||
case (PCI_COMMAND >> 2):
|
||||
data = (PCI_STATUS_DEVSEL_SLOW << 16);
|
||||
data |= fake_cb_bridge_regs.pci_command;
|
||||
break;
|
||||
|
||||
case (PCI_CLASS_REVISION >> 2):
|
||||
data = (PCI_CLASS_BRIDGE_CARDBUS << 16);
|
||||
break;
|
||||
|
||||
case (PCI_CACHE_LINE_SIZE >> 2):
|
||||
data = (PCI_HEADER_TYPE_CARDBUS << 16);
|
||||
break;
|
||||
|
||||
case (PCI_INTERRUPT_LINE >> 2):
|
||||
/* bridge control */
|
||||
data = (fake_cb_bridge_regs.bridge_control << 16);
|
||||
/* pin:intA line:0xff */
|
||||
data |= (0x1 << 8) | 0xff;
|
||||
break;
|
||||
|
||||
case (PCI_CB_PRIMARY_BUS >> 2):
|
||||
data = (fake_cb_bridge_regs.cb_latency << 24);
|
||||
data |= (fake_cb_bridge_regs.subordinate_busn << 16);
|
||||
data |= (fake_cb_bridge_regs.cardbus_busn << 8);
|
||||
data |= fake_cb_bridge_regs.pci_busn;
|
||||
break;
|
||||
|
||||
case (PCI_CB_MEMORY_BASE_0 >> 2):
|
||||
data = fake_cb_bridge_regs.mem_base0;
|
||||
break;
|
||||
|
||||
case (PCI_CB_MEMORY_LIMIT_0 >> 2):
|
||||
data = fake_cb_bridge_regs.mem_limit0;
|
||||
break;
|
||||
|
||||
case (PCI_CB_MEMORY_BASE_1 >> 2):
|
||||
data = fake_cb_bridge_regs.mem_base1;
|
||||
break;
|
||||
|
||||
case (PCI_CB_MEMORY_LIMIT_1 >> 2):
|
||||
data = fake_cb_bridge_regs.mem_limit1;
|
||||
break;
|
||||
|
||||
case (PCI_CB_IO_BASE_0 >> 2):
|
||||
/* | 1 for 32bits io support */
|
||||
data = fake_cb_bridge_regs.io_base0 | 0x1;
|
||||
break;
|
||||
|
||||
case (PCI_CB_IO_LIMIT_0 >> 2):
|
||||
data = fake_cb_bridge_regs.io_limit0;
|
||||
break;
|
||||
|
||||
case (PCI_CB_IO_BASE_1 >> 2):
|
||||
/* | 1 for 32bits io support */
|
||||
data = fake_cb_bridge_regs.io_base1 | 0x1;
|
||||
break;
|
||||
|
||||
case (PCI_CB_IO_LIMIT_1 >> 2):
|
||||
data = fake_cb_bridge_regs.io_limit1;
|
||||
break;
|
||||
}
|
||||
|
||||
*val = postprocess_read(data, where, size);
|
||||
return PCIBIOS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
/*
|
||||
* emulate configuration write access on a cardbus bridge
|
||||
*/
|
||||
static int fake_cb_bridge_write(int where, int size, u32 val)
|
||||
{
|
||||
unsigned int reg;
|
||||
u32 data, tmp;
|
||||
int ret;
|
||||
|
||||
ret = fake_cb_bridge_read((where & ~0x3), 4, &data);
|
||||
if (ret != PCIBIOS_SUCCESSFUL)
|
||||
return ret;
|
||||
|
||||
data = preprocess_write(data, val, where, size);
|
||||
|
||||
reg = where >> 2;
|
||||
switch (reg) {
|
||||
case (PCI_COMMAND >> 2):
|
||||
fake_cb_bridge_regs.pci_command = (data & 0xffff);
|
||||
break;
|
||||
|
||||
case (PCI_CB_PRIMARY_BUS >> 2):
|
||||
fake_cb_bridge_regs.cb_latency = (data >> 24) & 0xff;
|
||||
fake_cb_bridge_regs.subordinate_busn = (data >> 16) & 0xff;
|
||||
fake_cb_bridge_regs.cardbus_busn = (data >> 8) & 0xff;
|
||||
fake_cb_bridge_regs.pci_busn = data & 0xff;
|
||||
if (fake_cb_bridge_regs.cardbus_busn)
|
||||
fake_cb_bridge_regs.bus_assigned = 1;
|
||||
break;
|
||||
|
||||
case (PCI_INTERRUPT_LINE >> 2):
|
||||
tmp = (data >> 16) & 0xffff;
|
||||
/* disable memory prefetch support */
|
||||
tmp &= ~PCI_CB_BRIDGE_CTL_PREFETCH_MEM0;
|
||||
tmp &= ~PCI_CB_BRIDGE_CTL_PREFETCH_MEM1;
|
||||
fake_cb_bridge_regs.bridge_control = tmp;
|
||||
break;
|
||||
|
||||
case (PCI_CB_MEMORY_BASE_0 >> 2):
|
||||
fake_cb_bridge_regs.mem_base0 = data;
|
||||
break;
|
||||
|
||||
case (PCI_CB_MEMORY_LIMIT_0 >> 2):
|
||||
fake_cb_bridge_regs.mem_limit0 = data;
|
||||
break;
|
||||
|
||||
case (PCI_CB_MEMORY_BASE_1 >> 2):
|
||||
fake_cb_bridge_regs.mem_base1 = data;
|
||||
break;
|
||||
|
||||
case (PCI_CB_MEMORY_LIMIT_1 >> 2):
|
||||
fake_cb_bridge_regs.mem_limit1 = data;
|
||||
break;
|
||||
|
||||
case (PCI_CB_IO_BASE_0 >> 2):
|
||||
fake_cb_bridge_regs.io_base0 = data;
|
||||
break;
|
||||
|
||||
case (PCI_CB_IO_LIMIT_0 >> 2):
|
||||
fake_cb_bridge_regs.io_limit0 = data;
|
||||
break;
|
||||
|
||||
case (PCI_CB_IO_BASE_1 >> 2):
|
||||
fake_cb_bridge_regs.io_base1 = data;
|
||||
break;
|
||||
|
||||
case (PCI_CB_IO_LIMIT_1 >> 2):
|
||||
fake_cb_bridge_regs.io_limit1 = data;
|
||||
break;
|
||||
}
|
||||
|
||||
return PCIBIOS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
static int bcm63xx_cb_read(struct pci_bus *bus, unsigned int devfn,
|
||||
int where, int size, u32 *val)
|
||||
{
|
||||
/* snoop access to slot 0x1e on root bus, we fake a cardbus
|
||||
* bridge at this location */
|
||||
if (!bus->parent && PCI_SLOT(devfn) == FAKE_CB_BRIDGE_SLOT) {
|
||||
fake_cb_bridge_bus_number = bus->number;
|
||||
return fake_cb_bridge_read(where, size, val);
|
||||
}
|
||||
|
||||
/* a configuration cycle for the device behind the cardbus
|
||||
* bridge is actually done as a type 0 cycle on the primary
|
||||
* bus. This means that only one device can be on the cardbus
|
||||
* bus */
|
||||
if (fake_cb_bridge_regs.bus_assigned &&
|
||||
bus->number == fake_cb_bridge_regs.cardbus_busn &&
|
||||
PCI_SLOT(devfn) == 0)
|
||||
return bcm63xx_do_cfg_read(0, 0,
|
||||
PCI_DEVFN(CARDBUS_PCI_IDSEL, 0),
|
||||
where, size, val);
|
||||
|
||||
return PCIBIOS_DEVICE_NOT_FOUND;
|
||||
}
|
||||
|
||||
static int bcm63xx_cb_write(struct pci_bus *bus, unsigned int devfn,
|
||||
int where, int size, u32 val)
|
||||
{
|
||||
if (!bus->parent && PCI_SLOT(devfn) == FAKE_CB_BRIDGE_SLOT) {
|
||||
fake_cb_bridge_bus_number = bus->number;
|
||||
return fake_cb_bridge_write(where, size, val);
|
||||
}
|
||||
|
||||
if (fake_cb_bridge_regs.bus_assigned &&
|
||||
bus->number == fake_cb_bridge_regs.cardbus_busn &&
|
||||
PCI_SLOT(devfn) == 0)
|
||||
return bcm63xx_do_cfg_write(0, 0,
|
||||
PCI_DEVFN(CARDBUS_PCI_IDSEL, 0),
|
||||
where, size, val);
|
||||
|
||||
return PCIBIOS_DEVICE_NOT_FOUND;
|
||||
}
|
||||
|
||||
struct pci_ops bcm63xx_cb_ops = {
|
||||
.read = bcm63xx_cb_read,
|
||||
.write = bcm63xx_cb_write,
|
||||
};
|
||||
|
||||
/*
|
||||
* only one IO window, so it cannot be shared by PCI and cardbus, use
|
||||
* fixup to choose and detect unhandled configuration
|
||||
*/
|
||||
static void bcm63xx_fixup(struct pci_dev *dev)
|
||||
{
|
||||
static int io_window = -1;
|
||||
int i, found, new_io_window;
|
||||
u32 val;
|
||||
|
||||
/* look for any io resource */
|
||||
found = 0;
|
||||
for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
|
||||
if (pci_resource_flags(dev, i) & IORESOURCE_IO) {
|
||||
found = 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (!found)
|
||||
return;
|
||||
|
||||
/* skip our fake bus with only cardbus bridge on it */
|
||||
if (dev->bus->number == fake_cb_bridge_bus_number)
|
||||
return;
|
||||
|
||||
/* find on which bus the device is */
|
||||
if (fake_cb_bridge_regs.bus_assigned &&
|
||||
dev->bus->number == fake_cb_bridge_regs.cardbus_busn &&
|
||||
PCI_SLOT(dev->devfn) == 0)
|
||||
new_io_window = 1;
|
||||
else
|
||||
new_io_window = 0;
|
||||
|
||||
if (new_io_window == io_window)
|
||||
return;
|
||||
|
||||
if (io_window != -1) {
|
||||
printk(KERN_ERR "bcm63xx: both PCI and cardbus devices "
|
||||
"need IO, which hardware cannot do\n");
|
||||
return;
|
||||
}
|
||||
|
||||
printk(KERN_INFO "bcm63xx: PCI IO window assigned to %s\n",
|
||||
(new_io_window == 0) ? "PCI" : "cardbus");
|
||||
|
||||
val = bcm_mpi_readl(MPI_L2PIOREMAP_REG);
|
||||
if (io_window)
|
||||
val |= MPI_L2PREMAP_IS_CARDBUS_MASK;
|
||||
else
|
||||
val &= ~MPI_L2PREMAP_IS_CARDBUS_MASK;
|
||||
bcm_mpi_writel(val, MPI_L2PIOREMAP_REG);
|
||||
|
||||
io_window = new_io_window;
|
||||
}
|
||||
|
||||
DECLARE_PCI_FIXUP_ENABLE(PCI_ANY_ID, PCI_ANY_ID, bcm63xx_fixup);
|
||||
#endif
|
||||
@@ -1,222 +0,0 @@
|
||||
/*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
|
||||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <asm/bootinfo.h>
|
||||
|
||||
#include "pci-bcm63xx.h"
|
||||
|
||||
/* allow PCI to be disabled at runtime depending on board nvram
|
||||
* configuration */
|
||||
int bcm63xx_pci_enabled = 0;
|
||||
|
||||
static struct resource bcm_pci_mem_resource = {
|
||||
.name = "bcm63xx PCI memory space",
|
||||
.start = BCM_PCI_MEM_BASE_PA,
|
||||
.end = BCM_PCI_MEM_END_PA,
|
||||
.flags = IORESOURCE_MEM
|
||||
};
|
||||
|
||||
static struct resource bcm_pci_io_resource = {
|
||||
.name = "bcm63xx PCI IO space",
|
||||
.start = BCM_PCI_IO_BASE_PA,
|
||||
#ifdef CONFIG_CARDBUS
|
||||
.end = BCM_PCI_IO_HALF_PA,
|
||||
#else
|
||||
.end = BCM_PCI_IO_END_PA,
|
||||
#endif
|
||||
.flags = IORESOURCE_IO
|
||||
};
|
||||
|
||||
struct pci_controller bcm63xx_controller = {
|
||||
.pci_ops = &bcm63xx_pci_ops,
|
||||
.io_resource = &bcm_pci_io_resource,
|
||||
.mem_resource = &bcm_pci_mem_resource,
|
||||
};
|
||||
|
||||
/*
|
||||
* We handle cardbus via a fake Cardbus bridge, memory and io spaces
|
||||
* have to be clearly separated from PCI one since we have different
|
||||
* memory decoder.
|
||||
*/
|
||||
#ifdef CONFIG_CARDBUS
|
||||
static struct resource bcm_cb_mem_resource = {
|
||||
.name = "bcm63xx Cardbus memory space",
|
||||
.start = BCM_CB_MEM_BASE_PA,
|
||||
.end = BCM_CB_MEM_END_PA,
|
||||
.flags = IORESOURCE_MEM
|
||||
};
|
||||
|
||||
static struct resource bcm_cb_io_resource = {
|
||||
.name = "bcm63xx Cardbus IO space",
|
||||
.start = BCM_PCI_IO_HALF_PA + 1,
|
||||
.end = BCM_PCI_IO_END_PA,
|
||||
.flags = IORESOURCE_IO
|
||||
};
|
||||
|
||||
struct pci_controller bcm63xx_cb_controller = {
|
||||
.pci_ops = &bcm63xx_cb_ops,
|
||||
.io_resource = &bcm_cb_io_resource,
|
||||
.mem_resource = &bcm_cb_mem_resource,
|
||||
};
|
||||
#endif
|
||||
|
||||
static u32 bcm63xx_int_cfg_readl(u32 reg)
|
||||
{
|
||||
u32 tmp;
|
||||
|
||||
tmp = reg & MPI_PCICFGCTL_CFGADDR_MASK;
|
||||
tmp |= MPI_PCICFGCTL_WRITEEN_MASK;
|
||||
bcm_mpi_writel(tmp, MPI_PCICFGCTL_REG);
|
||||
iob();
|
||||
return bcm_mpi_readl(MPI_PCICFGDATA_REG);
|
||||
}
|
||||
|
||||
static void bcm63xx_int_cfg_writel(u32 val, u32 reg)
|
||||
{
|
||||
u32 tmp;
|
||||
|
||||
tmp = reg & MPI_PCICFGCTL_CFGADDR_MASK;
|
||||
tmp |= MPI_PCICFGCTL_WRITEEN_MASK;
|
||||
bcm_mpi_writel(tmp, MPI_PCICFGCTL_REG);
|
||||
bcm_mpi_writel(val, MPI_PCICFGDATA_REG);
|
||||
}
|
||||
|
||||
void __iomem *pci_iospace_start;
|
||||
|
||||
static int __init bcm63xx_pci_init(void)
|
||||
{
|
||||
unsigned int mem_size;
|
||||
u32 val;
|
||||
|
||||
if (!BCMCPU_IS_6348() && !BCMCPU_IS_6358())
|
||||
return -ENODEV;
|
||||
|
||||
if (!bcm63xx_pci_enabled)
|
||||
return -ENODEV;
|
||||
|
||||
/*
|
||||
* configuration access are done through IO space, remap 4
|
||||
* first bytes to access it from CPU.
|
||||
*
|
||||
* this means that no io access from CPU should happen while
|
||||
* we do a configuration cycle, but there's no way we can add
|
||||
* a spinlock for each io access, so this is currently kind of
|
||||
* broken on SMP.
|
||||
*/
|
||||
pci_iospace_start = ioremap_nocache(BCM_PCI_IO_BASE_PA, 4);
|
||||
if (!pci_iospace_start)
|
||||
return -ENOMEM;
|
||||
|
||||
/* setup local bus to PCI access (PCI memory) */
|
||||
val = BCM_PCI_MEM_BASE_PA & MPI_L2P_BASE_MASK;
|
||||
bcm_mpi_writel(val, MPI_L2PMEMBASE1_REG);
|
||||
bcm_mpi_writel(~(BCM_PCI_MEM_SIZE - 1), MPI_L2PMEMRANGE1_REG);
|
||||
bcm_mpi_writel(val | MPI_L2PREMAP_ENABLED_MASK, MPI_L2PMEMREMAP1_REG);
|
||||
|
||||
/* set Cardbus IDSEL (type 0 cfg access on primary bus for
|
||||
* this IDSEL will be done on Cardbus instead) */
|
||||
val = bcm_pcmcia_readl(PCMCIA_C1_REG);
|
||||
val &= ~PCMCIA_C1_CBIDSEL_MASK;
|
||||
val |= (CARDBUS_PCI_IDSEL << PCMCIA_C1_CBIDSEL_SHIFT);
|
||||
bcm_pcmcia_writel(val, PCMCIA_C1_REG);
|
||||
|
||||
#ifdef CONFIG_CARDBUS
|
||||
/* setup local bus to PCI access (Cardbus memory) */
|
||||
val = BCM_CB_MEM_BASE_PA & MPI_L2P_BASE_MASK;
|
||||
bcm_mpi_writel(val, MPI_L2PMEMBASE2_REG);
|
||||
bcm_mpi_writel(~(BCM_CB_MEM_SIZE - 1), MPI_L2PMEMRANGE2_REG);
|
||||
val |= MPI_L2PREMAP_ENABLED_MASK | MPI_L2PREMAP_IS_CARDBUS_MASK;
|
||||
bcm_mpi_writel(val, MPI_L2PMEMREMAP2_REG);
|
||||
#else
|
||||
/* disable second access windows */
|
||||
bcm_mpi_writel(0, MPI_L2PMEMREMAP2_REG);
|
||||
#endif
|
||||
|
||||
/* setup local bus to PCI access (IO memory), we have only 1
|
||||
* IO window for both PCI and cardbus, but it cannot handle
|
||||
* both at the same time, assume standard PCI for now, if
|
||||
* cardbus card has IO zone, PCI fixup will change window to
|
||||
* cardbus */
|
||||
val = BCM_PCI_IO_BASE_PA & MPI_L2P_BASE_MASK;
|
||||
bcm_mpi_writel(val, MPI_L2PIOBASE_REG);
|
||||
bcm_mpi_writel(~(BCM_PCI_IO_SIZE - 1), MPI_L2PIORANGE_REG);
|
||||
bcm_mpi_writel(val | MPI_L2PREMAP_ENABLED_MASK, MPI_L2PIOREMAP_REG);
|
||||
|
||||
/* enable PCI related GPIO pins */
|
||||
bcm_mpi_writel(MPI_LOCBUSCTL_EN_PCI_GPIO_MASK, MPI_LOCBUSCTL_REG);
|
||||
|
||||
/* setup PCI to local bus access, used by PCI device to target
|
||||
* local RAM while bus mastering */
|
||||
bcm63xx_int_cfg_writel(0, PCI_BASE_ADDRESS_3);
|
||||
if (BCMCPU_IS_6358())
|
||||
val = MPI_SP0_REMAP_ENABLE_MASK;
|
||||
else
|
||||
val = 0;
|
||||
bcm_mpi_writel(val, MPI_SP0_REMAP_REG);
|
||||
|
||||
bcm63xx_int_cfg_writel(0x0, PCI_BASE_ADDRESS_4);
|
||||
bcm_mpi_writel(0, MPI_SP1_REMAP_REG);
|
||||
|
||||
mem_size = bcm63xx_get_memory_size();
|
||||
|
||||
/* 6348 before rev b0 exposes only 16 MB of RAM memory through
|
||||
* PCI, throw a warning if we have more memory */
|
||||
if (BCMCPU_IS_6348() && (bcm63xx_get_cpu_rev() & 0xf0) == 0xa0) {
|
||||
if (mem_size > (16 * 1024 * 1024))
|
||||
printk(KERN_WARNING "bcm63xx: this CPU "
|
||||
"revision cannot handle more than 16MB "
|
||||
"of RAM for PCI bus mastering\n");
|
||||
} else {
|
||||
/* setup sp0 range to local RAM size */
|
||||
bcm_mpi_writel(~(mem_size - 1), MPI_SP0_RANGE_REG);
|
||||
bcm_mpi_writel(0, MPI_SP1_RANGE_REG);
|
||||
}
|
||||
|
||||
/* change host bridge retry counter to infinite number of
|
||||
* retry, needed for some broadcom wifi cards with Silicon
|
||||
* Backplane bus where access to srom seems very slow */
|
||||
val = bcm63xx_int_cfg_readl(BCMPCI_REG_TIMERS);
|
||||
val &= ~REG_TIMER_RETRY_MASK;
|
||||
bcm63xx_int_cfg_writel(val, BCMPCI_REG_TIMERS);
|
||||
|
||||
/* enable memory decoder and bus mastering */
|
||||
val = bcm63xx_int_cfg_readl(PCI_COMMAND);
|
||||
val |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
|
||||
bcm63xx_int_cfg_writel(val, PCI_COMMAND);
|
||||
|
||||
/* enable read prefetching & disable byte swapping for bus
|
||||
* mastering transfers */
|
||||
val = bcm_mpi_readl(MPI_PCIMODESEL_REG);
|
||||
val &= ~MPI_PCIMODESEL_BAR1_NOSWAP_MASK;
|
||||
val &= ~MPI_PCIMODESEL_BAR2_NOSWAP_MASK;
|
||||
val &= ~MPI_PCIMODESEL_PREFETCH_MASK;
|
||||
val |= (8 << MPI_PCIMODESEL_PREFETCH_SHIFT);
|
||||
bcm_mpi_writel(val, MPI_PCIMODESEL_REG);
|
||||
|
||||
/* enable pci interrupt */
|
||||
val = bcm_mpi_readl(MPI_LOCINT_REG);
|
||||
val |= MPI_LOCINT_MASK(MPI_LOCINT_EXT_PCI_INT);
|
||||
bcm_mpi_writel(val, MPI_LOCINT_REG);
|
||||
|
||||
register_pci_controller(&bcm63xx_controller);
|
||||
|
||||
#ifdef CONFIG_CARDBUS
|
||||
register_pci_controller(&bcm63xx_cb_controller);
|
||||
#endif
|
||||
|
||||
/* mark memory space used for IO mapping as reserved */
|
||||
request_mem_region(BCM_PCI_IO_BASE_PA, BCM_PCI_IO_SIZE,
|
||||
"bcm63xx PCI IO space");
|
||||
return 0;
|
||||
}
|
||||
|
||||
arch_initcall(bcm63xx_pci_init);
|
||||
@@ -1,27 +0,0 @@
|
||||
#ifndef PCI_BCM63XX_H_
|
||||
#define PCI_BCM63XX_H_
|
||||
|
||||
#include <bcm63xx_cpu.h>
|
||||
#include <bcm63xx_io.h>
|
||||
#include <bcm63xx_regs.h>
|
||||
#include <bcm63xx_dev_pci.h>
|
||||
|
||||
/*
|
||||
* Cardbus shares the PCI bus, but has no IDSEL, so a special id is
|
||||
* reserved for it. If you have a standard PCI device at this id, you
|
||||
* need to change the following definition.
|
||||
*/
|
||||
#define CARDBUS_PCI_IDSEL 0x8
|
||||
|
||||
/*
|
||||
* defined in ops-bcm63xx.c
|
||||
*/
|
||||
extern struct pci_ops bcm63xx_pci_ops;
|
||||
extern struct pci_ops bcm63xx_cb_ops;
|
||||
|
||||
/*
|
||||
* defined in pci-bcm63xx.c
|
||||
*/
|
||||
extern void __iomem *pci_iospace_start;
|
||||
|
||||
#endif /* ! PCI_BCM63XX_H_ */
|
||||
Reference in New Issue
Block a user