Flatten brcm63xx patches, should make our life easier to patch files now ;)

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@13368 3c298f89-4303-0410-b956-a3cf2f4a3e73

target/linux/brcm63xx/patches-2.6.27/003-add_serial_driver_for_bcm63xx_integr.patch

@@ -17,56 +17,6 @@ Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
  create mode 100644 drivers/serial/bcm63xx_uart.c
  create mode 100644 include/asm-mips/mach-bcm63xx/bcm63xx_dev_uart.h
 
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -1,2 +1,3 @@
- obj-y		+= clk.o cpu.o cs.o gpio.o irq.o prom.o setup.o timer.o
-+obj-y		+= dev-uart.o
- obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
---- /dev/null
-+++ b/arch/mips/bcm63xx/dev-uart.c
-@@ -0,0 +1,41 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/platform_device.h>
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_dev_uart.h>
-+
-+static struct resource uart_resources[] = {
-+	{
-+		.start		= -1, /* filled at runtime */
-+		.end		= -1, /* filled at runtime */
-+		.flags		= IORESOURCE_MEM,
-+	},
-+	{
-+		.start		= -1, /* filled at runtime */
-+		.flags		= IORESOURCE_IRQ,
-+	},
-+};
-+
-+static struct platform_device bcm63xx_uart_device = {
-+	.name		= "bcm63xx_uart",
-+	.id		= 0,
-+	.num_resources	= ARRAY_SIZE(uart_resources),
-+	.resource	= uart_resources,
-+};
-+
-+int __init bcm63xx_uart_register(void)
-+{
-+	uart_resources[0].start = bcm63xx_regset_address(RSET_UART0);
-+	uart_resources[0].end = uart_resources[0].start;
-+	uart_resources[0].end += RSET_UART_SIZE - 1;
-+	uart_resources[1].start = bcm63xx_get_irq_number(IRQ_UART0);
-+	return platform_device_register(&bcm63xx_uart_device);
-+}
 --- a/drivers/serial/Kconfig
 +++ b/drivers/serial/Kconfig
 @@ -1421,4 +1421,23 @@ config SPORT_BAUD_RATE
@@ -103,908 +53,6 @@ Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
  obj-$(CONFIG_SERIAL_BFIN) += bfin_5xx.o
  obj-$(CONFIG_SERIAL_BFIN_SPORT) += bfin_sport_uart.o
  obj-$(CONFIG_SERIAL_SAMSUNG) += samsung.o
---- /dev/null
-+++ b/drivers/serial/bcm63xx_uart.c
-@@ -0,0 +1,890 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Derived from many drivers using generic_serial interface.
-+ *
-+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
-+ *
-+ *  Serial driver for BCM63xx integrated UART.
-+ *
-+ * Hardware flow control was _not_ tested since I only have RX/TX on
-+ * my board.
-+ */
-+
-+#if defined(CONFIG_SERIAL_BCM63XX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
-+#define SUPPORT_SYSRQ
-+#endif
-+
-+#include <linux/kernel.h>
-+#include <linux/platform_device.h>
-+#include <linux/init.h>
-+#include <linux/delay.h>
-+#include <linux/module.h>
-+#include <linux/console.h>
-+#include <linux/clk.h>
-+#include <linux/tty.h>
-+#include <linux/tty_flip.h>
-+#include <linux/sysrq.h>
-+#include <linux/serial.h>
-+#include <linux/serial_core.h>
-+
-+#include <bcm63xx_clk.h>
-+#include <bcm63xx_irq.h>
-+#include <bcm63xx_regs.h>
-+#include <bcm63xx_io.h>
-+
-+#define BCM63XX_NR_UARTS	1
-+
-+static struct uart_port ports[BCM63XX_NR_UARTS];
-+
-+/*
-+ * rx interrupt mask / stat
-+ *
-+ * mask:
-+ *  - rx fifo full
-+ *  - rx fifo above threshold
-+ *  - rx fifo not empty for too long
-+ */
-+#define UART_RX_INT_MASK	(UART_IR_MASK(UART_IR_RXOVER) |		\
-+				UART_IR_MASK(UART_IR_RXTHRESH) |	\
-+				UART_IR_MASK(UART_IR_RXTIMEOUT))
-+
-+#define UART_RX_INT_STAT	(UART_IR_STAT(UART_IR_RXOVER) |		\
-+				UART_IR_STAT(UART_IR_RXTHRESH) |	\
-+				UART_IR_STAT(UART_IR_RXTIMEOUT))
-+
-+/*
-+ * tx interrupt mask / stat
-+ *
-+ * mask:
-+ * - tx fifo empty
-+ * - tx fifo below threshold
-+ */
-+#define UART_TX_INT_MASK	(UART_IR_MASK(UART_IR_TXEMPTY) |	\
-+				UART_IR_MASK(UART_IR_TXTRESH))
-+
-+#define UART_TX_INT_STAT	(UART_IR_STAT(UART_IR_TXEMPTY) |	\
-+				UART_IR_STAT(UART_IR_TXTRESH))
-+
-+/*
-+ * external input interrupt
-+ *
-+ * mask: any edge on CTS, DCD
-+ */
-+#define UART_EXTINP_INT_MASK	(UART_EXTINP_IRMASK(UART_EXTINP_IR_CTS) | \
-+				 UART_EXTINP_IRMASK(UART_EXTINP_IR_DCD))
-+
-+/*
-+ * handy uart register accessor
-+ */
-+static inline unsigned int bcm_uart_readl(struct uart_port *port,
-+					 unsigned int offset)
-+{
-+	return bcm_readl(port->membase + offset);
-+}
-+
-+static inline void bcm_uart_writel(struct uart_port *port,
-+				  unsigned int value, unsigned int offset)
-+{
-+	bcm_writel(value, port->membase + offset);
-+}
-+
-+/*
-+ * serial core request to check if uart tx fifo is empty
-+ */
-+static unsigned int bcm_uart_tx_empty(struct uart_port *port)
-+{
-+	unsigned int val;
-+
-+	val = bcm_uart_readl(port, UART_IR_REG);
-+	return (val & UART_IR_STAT(UART_IR_TXEMPTY)) ? 1 : 0;
-+}
-+
-+/*
-+ * serial core request to set RTS and DTR pin state and loopback mode
-+ */
-+static void bcm_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
-+{
-+	unsigned int val;
-+
-+	val = bcm_uart_readl(port, UART_MCTL_REG);
-+	val &= ~(UART_MCTL_DTR_MASK | UART_MCTL_RTS_MASK);
-+	/* invert of written value is reflected on the pin */
-+	if (!(mctrl & TIOCM_DTR))
-+		val |= UART_MCTL_DTR_MASK;
-+	if (!(mctrl & TIOCM_RTS))
-+		val |= UART_MCTL_RTS_MASK;
-+	bcm_uart_writel(port, val, UART_MCTL_REG);
-+
-+	val = bcm_uart_readl(port, UART_CTL_REG);
-+	if (mctrl & TIOCM_LOOP)
-+		val |= UART_CTL_LOOPBACK_MASK;
-+	else
-+		val &= ~UART_CTL_LOOPBACK_MASK;
-+	bcm_uart_writel(port, val, UART_CTL_REG);
-+}
-+
-+/*
-+ * serial core request to return RI, CTS, DCD and DSR pin state
-+ */
-+static unsigned int bcm_uart_get_mctrl(struct uart_port *port)
-+{
-+	unsigned int val, mctrl;
-+
-+	mctrl = 0;
-+	val = bcm_uart_readl(port, UART_EXTINP_REG);
-+	if (val & UART_EXTINP_RI_MASK)
-+		mctrl |= TIOCM_RI;
-+	if (val & UART_EXTINP_CTS_MASK)
-+		mctrl |= TIOCM_CTS;
-+	if (val & UART_EXTINP_DCD_MASK)
-+		mctrl |= TIOCM_CD;
-+	if (val & UART_EXTINP_DSR_MASK)
-+		mctrl |= TIOCM_DSR;
-+	return mctrl;
-+}
-+
-+/*
-+ * serial core request to disable tx ASAP (used for flow control)
-+ */
-+static void bcm_uart_stop_tx(struct uart_port *port)
-+{
-+	unsigned int val;
-+
-+	val = bcm_uart_readl(port, UART_CTL_REG);
-+	val &= ~(UART_CTL_TXEN_MASK);
-+	bcm_uart_writel(port, val, UART_CTL_REG);
-+
-+	val = bcm_uart_readl(port, UART_IR_REG);
-+	val &= ~UART_TX_INT_MASK;
-+	bcm_uart_writel(port, val, UART_IR_REG);
-+}
-+
-+/*
-+ * serial core request to (re)enable tx
-+ */
-+static void bcm_uart_start_tx(struct uart_port *port)
-+{
-+	unsigned int val;
-+
-+	val = bcm_uart_readl(port, UART_IR_REG);
-+	val |= UART_TX_INT_MASK;
-+	bcm_uart_writel(port, val, UART_IR_REG);
-+
-+	val = bcm_uart_readl(port, UART_CTL_REG);
-+	val |= UART_CTL_TXEN_MASK;
-+	bcm_uart_writel(port, val, UART_CTL_REG);
-+}
-+
-+/*
-+ * serial core request to stop rx, called before port shutdown
-+ */
-+static void bcm_uart_stop_rx(struct uart_port *port)
-+{
-+	unsigned int val;
-+
-+	val = bcm_uart_readl(port, UART_IR_REG);
-+	val &= ~UART_RX_INT_MASK;
-+	bcm_uart_writel(port, val, UART_IR_REG);
-+}
-+
-+/*
-+ * serial core request to enable modem status interrupt reporting
-+ */
-+static void bcm_uart_enable_ms(struct uart_port *port)
-+{
-+	unsigned int val;
-+
-+	val = bcm_uart_readl(port, UART_IR_REG);
-+	val |= UART_IR_MASK(UART_IR_EXTIP);
-+	bcm_uart_writel(port, val, UART_IR_REG);
-+}
-+
-+/*
-+ * serial core request to start/stop emitting break char
-+ */
-+static void bcm_uart_break_ctl(struct uart_port *port, int ctl)
-+{
-+	unsigned long flags;
-+	unsigned int val;
-+
-+	spin_lock_irqsave(&port->lock, flags);
-+
-+	val = bcm_uart_readl(port, UART_CTL_REG);
-+	if (ctl)
-+		val |= UART_CTL_XMITBRK_MASK;
-+	else
-+		val &= ~UART_CTL_XMITBRK_MASK;
-+	bcm_uart_writel(port, val, UART_CTL_REG);
-+
-+	spin_unlock_irqrestore(&port->lock, flags);
-+}
-+
-+/*
-+ * return port type in string format
-+ */
-+static const char *bcm_uart_type(struct uart_port *port)
-+{
-+	return (port->type == PORT_BCM63XX) ? "bcm63xx_uart" : NULL;
-+}
-+
-+/*
-+ * read all chars in rx fifo and send them to core
-+ */
-+static void bcm_uart_do_rx(struct uart_port *port)
-+{
-+	struct tty_struct *tty;
-+	unsigned int max_count;
-+
-+	/* limit number of char read in interrupt, should not be
-+	 * higher than fifo size anyway since we're much faster than
-+	 * serial port */
-+	max_count = 32;
-+	tty = port->info->port.tty;
-+	do {
-+		unsigned int iestat, c, cstat;
-+		char flag;
-+
-+		/* get overrun/fifo empty information from ier
-+		 * register */
-+		iestat = bcm_uart_readl(port, UART_IR_REG);
-+		if (!(iestat & UART_IR_STAT(UART_IR_RXNOTEMPTY)))
-+			break;
-+
-+		cstat = c = bcm_uart_readl(port, UART_FIFO_REG);
-+		port->icount.rx++;
-+		flag = TTY_NORMAL;
-+		c &= 0xff;
-+
-+		if (unlikely((cstat & UART_FIFO_ANYERR_MASK))) {
-+			/* do stats first */
-+			if (cstat & UART_FIFO_BRKDET_MASK) {
-+				port->icount.brk++;
-+				if (uart_handle_break(port))
-+					continue;
-+			}
-+
-+			if (cstat & UART_FIFO_PARERR_MASK)
-+				port->icount.parity++;
-+			if (cstat & UART_FIFO_FRAMEERR_MASK)
-+				port->icount.frame++;
-+
-+			/* update flag wrt read_status_mask */
-+			cstat &= port->read_status_mask;
-+			if (cstat & UART_FIFO_BRKDET_MASK)
-+				flag = TTY_BREAK;
-+			if (cstat & UART_FIFO_FRAMEERR_MASK)
-+				flag = TTY_FRAME;
-+			if (cstat & UART_FIFO_PARERR_MASK)
-+				flag = TTY_PARITY;
-+		}
-+
-+		if (uart_handle_sysrq_char(port, c))
-+			continue;
-+
-+		if (unlikely(iestat & UART_IR_STAT(UART_IR_RXOVER))) {
-+			port->icount.overrun++;
-+			tty_insert_flip_char(tty, 0, TTY_OVERRUN);
-+		}
-+
-+		if ((cstat & port->ignore_status_mask) == 0)
-+			tty_insert_flip_char(tty, c, flag);
-+
-+	} while (--max_count);
-+
-+	tty_flip_buffer_push(tty);
-+}
-+
-+/*
-+ * fill tx fifo with chars to send, stop when fifo is about to be full
-+ * or when all chars have been sent.
-+ */
-+static void bcm_uart_do_tx(struct uart_port *port)
-+{
-+	struct circ_buf *xmit;
-+	unsigned int val, max_count;
-+
-+	if (port->x_char) {
-+		bcm_uart_writel(port, port->x_char, UART_FIFO_REG);
-+		port->icount.tx++;
-+		port->x_char = 0;
-+		return;
-+	}
-+
-+	if (uart_tx_stopped(port)) {
-+		bcm_uart_stop_tx(port);
-+		return;
-+	}
-+
-+	xmit = &port->info->xmit;
-+	if (uart_circ_empty(xmit))
-+		goto txq_empty;
-+
-+	val = bcm_uart_readl(port, UART_MCTL_REG);
-+	val = (val & UART_MCTL_TXFIFOFILL_MASK) >> UART_MCTL_TXFIFOFILL_SHIFT;
-+	max_count = port->fifosize - val;
-+
-+	while (max_count--) {
-+		unsigned int c;
-+
-+		c = xmit->buf[xmit->tail];
-+		bcm_uart_writel(port, c, UART_FIFO_REG);
-+		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
-+		port->icount.tx++;
-+		if (uart_circ_empty(xmit))
-+			break;
-+	}
-+
-+	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
-+		uart_write_wakeup(port);
-+
-+	if (uart_circ_empty(xmit))
-+		goto txq_empty;
-+	return;
-+
-+txq_empty:
-+	/* nothing to send, disable transmit interrupt */
-+	val = bcm_uart_readl(port, UART_IR_REG);
-+	val &= ~UART_TX_INT_MASK;
-+	bcm_uart_writel(port, val, UART_IR_REG);
-+	return;
-+}
-+
-+/*
-+ * process uart interrupt
-+ */
-+static irqreturn_t bcm_uart_interrupt(int irq, void *dev_id)
-+{
-+	struct uart_port *port;
-+	unsigned int irqstat;
-+
-+	port = dev_id;
-+	spin_lock(&port->lock);
-+
-+	irqstat = bcm_uart_readl(port, UART_IR_REG);
-+	if (irqstat & UART_RX_INT_STAT)
-+		bcm_uart_do_rx(port);
-+
-+	if (irqstat & UART_TX_INT_STAT)
-+		bcm_uart_do_tx(port);
-+
-+	if (irqstat & UART_IR_MASK(UART_IR_EXTIP)) {
-+		unsigned int estat;
-+
-+		estat = bcm_uart_readl(port, UART_EXTINP_REG);
-+		if (estat & UART_EXTINP_IRSTAT(UART_EXTINP_IR_CTS))
-+			uart_handle_cts_change(port,
-+					       estat & UART_EXTINP_CTS_MASK);
-+		if (estat & UART_EXTINP_IRSTAT(UART_EXTINP_IR_DCD))
-+			uart_handle_dcd_change(port,
-+					       estat & UART_EXTINP_DCD_MASK);
-+	}
-+
-+	spin_unlock(&port->lock);
-+	return IRQ_HANDLED;
-+}
-+
-+/*
-+ * enable rx & tx operation on uart
-+ */
-+static void bcm_uart_enable(struct uart_port *port)
-+{
-+	unsigned int val;
-+
-+	val = bcm_uart_readl(port, UART_CTL_REG);
-+	val |= (UART_CTL_BRGEN_MASK | UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
-+	bcm_uart_writel(port, val, UART_CTL_REG);
-+}
-+
-+/*
-+ * disable rx & tx operation on uart
-+ */
-+static void bcm_uart_disable(struct uart_port *port)
-+{
-+	unsigned int val;
-+
-+	val = bcm_uart_readl(port, UART_CTL_REG);
-+	val &= ~(UART_CTL_BRGEN_MASK | UART_CTL_TXEN_MASK |
-+		 UART_CTL_RXEN_MASK);
-+	bcm_uart_writel(port, val, UART_CTL_REG);
-+}
-+
-+/*
-+ * clear all unread data in rx fifo and unsent data in tx fifo
-+ */
-+static void bcm_uart_flush(struct uart_port *port)
-+{
-+	unsigned int val;
-+
-+	/* empty rx and tx fifo */
-+	val = bcm_uart_readl(port, UART_CTL_REG);
-+	val |= UART_CTL_RSTRXFIFO_MASK | UART_CTL_RSTTXFIFO_MASK;
-+	bcm_uart_writel(port, val, UART_CTL_REG);
-+
-+	/* read any pending char to make sure all irq status are
-+	 * cleared */
-+	(void)bcm_uart_readl(port, UART_FIFO_REG);
-+}
-+
-+/*
-+ * serial core request to initialize uart and start rx operation
-+ */
-+static int bcm_uart_startup(struct uart_port *port)
-+{
-+	unsigned int val;
-+	int ret;
-+
-+	/* mask all irq and flush port */
-+	bcm_uart_disable(port);
-+	bcm_uart_writel(port, 0, UART_IR_REG);
-+	bcm_uart_flush(port);
-+
-+	/* clear any pending external input interrupt */
-+	(void)bcm_uart_readl(port, UART_EXTINP_REG);
-+
-+	/* set rx/tx fifo thresh to fifo half size */
-+	val = bcm_uart_readl(port, UART_MCTL_REG);
-+	val &= ~(UART_MCTL_RXFIFOTHRESH_MASK | UART_MCTL_TXFIFOTHRESH_MASK);
-+	val |= (port->fifosize / 2) << UART_MCTL_RXFIFOTHRESH_SHIFT;
-+	val |= (port->fifosize / 2) << UART_MCTL_TXFIFOTHRESH_SHIFT;
-+	bcm_uart_writel(port, val, UART_MCTL_REG);
-+
-+	/* set rx fifo timeout to 1 char time */
-+	val = bcm_uart_readl(port, UART_CTL_REG);
-+	val &= ~UART_CTL_RXTMOUTCNT_MASK;
-+	val |= 1 << UART_CTL_RXTMOUTCNT_SHIFT;
-+	bcm_uart_writel(port, val, UART_CTL_REG);
-+
-+	/* report any edge on dcd and cts */
-+	val = UART_EXTINP_INT_MASK;
-+	val |= UART_EXTINP_DCD_NOSENSE_MASK;
-+	val |= UART_EXTINP_CTS_NOSENSE_MASK;
-+	bcm_uart_writel(port, val, UART_EXTINP_REG);
-+
-+	/* register irq and enable rx interrupts */
-+	ret = request_irq(port->irq, bcm_uart_interrupt, 0,
-+			  bcm_uart_type(port), port);
-+	if (ret)
-+		return ret;
-+	bcm_uart_writel(port, UART_RX_INT_MASK, UART_IR_REG);
-+	bcm_uart_enable(port);
-+	return 0;
-+}
-+
-+/*
-+ * serial core request to flush & disable uart
-+ */
-+static void bcm_uart_shutdown(struct uart_port *port)
-+{
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&port->lock, flags);
-+	bcm_uart_writel(port, 0, UART_IR_REG);
-+	spin_unlock_irqrestore(&port->lock, flags);
-+
-+	bcm_uart_disable(port);
-+	bcm_uart_flush(port);
-+	free_irq(port->irq, port);
-+}
-+
-+/*
-+ * serial core request to change current uart setting
-+ */
-+static void bcm_uart_set_termios(struct uart_port *port,
-+				 struct ktermios *new,
-+				 struct ktermios *old)
-+{
-+	unsigned int ctl, baud, quot, ier;
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&port->lock, flags);
-+
-+	/* disable uart while changing speed */
-+	bcm_uart_disable(port);
-+	bcm_uart_flush(port);
-+
-+	/* update Control register */
-+	ctl = bcm_uart_readl(port, UART_CTL_REG);
-+	ctl &= ~UART_CTL_BITSPERSYM_MASK;
-+
-+	switch (new->c_cflag & CSIZE) {
-+	case CS5:
-+		ctl |= (0 << UART_CTL_BITSPERSYM_SHIFT);
-+		break;
-+	case CS6:
-+		ctl |= (1 << UART_CTL_BITSPERSYM_SHIFT);
-+		break;
-+	case CS7:
-+		ctl |= (2 << UART_CTL_BITSPERSYM_SHIFT);
-+		break;
-+	default:
-+		ctl |= (3 << UART_CTL_BITSPERSYM_SHIFT);
-+		break;
-+	}
-+
-+	ctl &= ~UART_CTL_STOPBITS_MASK;
-+	if (new->c_cflag & CSTOPB)
-+		ctl |= UART_CTL_STOPBITS_2;
-+	else
-+		ctl |= UART_CTL_STOPBITS_1;
-+
-+	ctl &= ~(UART_CTL_RXPAREN_MASK | UART_CTL_TXPAREN_MASK);
-+	if (new->c_cflag & PARENB)
-+		ctl |= (UART_CTL_RXPAREN_MASK | UART_CTL_TXPAREN_MASK);
-+	ctl &= ~(UART_CTL_RXPAREVEN_MASK | UART_CTL_TXPAREVEN_MASK);
-+	if (new->c_cflag & PARODD)
-+		ctl |= (UART_CTL_RXPAREVEN_MASK | UART_CTL_TXPAREVEN_MASK);
-+	bcm_uart_writel(port, ctl, UART_CTL_REG);
-+
-+	/* update Baudword register */
-+	baud = uart_get_baud_rate(port, new, old, 0, port->uartclk / 16);
-+	quot = uart_get_divisor(port, baud) - 1;
-+	bcm_uart_writel(port, quot, UART_BAUD_REG);
-+
-+	/* update Interrupt register */
-+	ier = bcm_uart_readl(port, UART_IR_REG);
-+
-+	ier &= ~UART_IR_MASK(UART_IR_EXTIP);
-+	if (UART_ENABLE_MS(port, new->c_cflag))
-+		ier |= UART_IR_MASK(UART_IR_EXTIP);
-+
-+	bcm_uart_writel(port, ier, UART_IR_REG);
-+
-+	/* update read/ignore mask */
-+	port->read_status_mask = UART_FIFO_VALID_MASK;
-+	if (new->c_iflag & INPCK) {
-+		port->read_status_mask |= UART_FIFO_FRAMEERR_MASK;
-+		port->read_status_mask |= UART_FIFO_PARERR_MASK;
-+	}
-+	if (new->c_iflag & (BRKINT))
-+		port->read_status_mask |= UART_FIFO_BRKDET_MASK;
-+
-+	port->ignore_status_mask = 0;
-+	if (new->c_iflag & IGNPAR)
-+		port->ignore_status_mask |= UART_FIFO_PARERR_MASK;
-+	if (new->c_iflag & IGNBRK)
-+		port->ignore_status_mask |= UART_FIFO_BRKDET_MASK;
-+	if (!(new->c_cflag & CREAD))
-+		port->ignore_status_mask |= UART_FIFO_VALID_MASK;
-+
-+	uart_update_timeout(port, new->c_cflag, baud);
-+	bcm_uart_enable(port);
-+	spin_unlock_irqrestore(&port->lock, flags);
-+}
-+
-+/*
-+ * serial core request to claim uart iomem
-+ */
-+static int bcm_uart_request_port(struct uart_port *port)
-+{
-+	unsigned int size;
-+
-+	size = RSET_UART_SIZE;
-+	if (!request_mem_region(port->mapbase, size, "bcm63xx")) {
-+		dev_err(port->dev, "Memory region busy\n");
-+		return -EBUSY;
-+	}
-+
-+	port->membase = ioremap(port->mapbase, size);
-+	if (!port->membase) {
-+		dev_err(port->dev, "Unable to map registers\n");
-+		release_mem_region(port->mapbase, size);
-+		return -EBUSY;
-+	}
-+	return 0;
-+}
-+
-+/*
-+ * serial core request to release uart iomem
-+ */
-+static void bcm_uart_release_port(struct uart_port *port)
-+{
-+	release_mem_region(port->mapbase, RSET_UART_SIZE);
-+	iounmap(port->membase);
-+}
-+
-+/*
-+ * serial core request to do any port required autoconfiguration
-+ */
-+static void bcm_uart_config_port(struct uart_port *port, int flags)
-+{
-+	if (flags & UART_CONFIG_TYPE) {
-+		if (bcm_uart_request_port(port))
-+			return;
-+		port->type = PORT_BCM63XX;
-+	}
-+}
-+
-+/*
-+ * serial core request to check that port information in serinfo are
-+ * suitable
-+ */
-+static int bcm_uart_verify_port(struct uart_port *port,
-+				struct serial_struct *serinfo)
-+{
-+	if (port->type != PORT_BCM63XX)
-+		return -EINVAL;
-+	if (port->irq != serinfo->irq)
-+		return -EINVAL;
-+	if (port->iotype != serinfo->io_type)
-+		return -EINVAL;
-+	if (port->mapbase != (unsigned long)serinfo->iomem_base)
-+		return -EINVAL;
-+	return 0;
-+}
-+
-+/* serial core callbacks */
-+static struct uart_ops bcm_uart_ops = {
-+	.tx_empty	= bcm_uart_tx_empty,
-+	.get_mctrl	= bcm_uart_get_mctrl,
-+	.set_mctrl	= bcm_uart_set_mctrl,
-+	.start_tx	= bcm_uart_start_tx,
-+	.stop_tx	= bcm_uart_stop_tx,
-+	.stop_rx	= bcm_uart_stop_rx,
-+	.enable_ms	= bcm_uart_enable_ms,
-+	.break_ctl	= bcm_uart_break_ctl,
-+	.startup	= bcm_uart_startup,
-+	.shutdown	= bcm_uart_shutdown,
-+	.set_termios	= bcm_uart_set_termios,
-+	.type		= bcm_uart_type,
-+	.release_port	= bcm_uart_release_port,
-+	.request_port	= bcm_uart_request_port,
-+	.config_port	= bcm_uart_config_port,
-+	.verify_port	= bcm_uart_verify_port,
-+};
-+
-+
-+
-+#ifdef CONFIG_SERIAL_BCM63XX_CONSOLE
-+static inline void wait_for_xmitr(struct uart_port *port)
-+{
-+	unsigned int tmout;
-+
-+	/* Wait up to 10ms for the character(s) to be sent. */
-+	tmout = 10000;
-+	while (--tmout) {
-+		unsigned int val;
-+
-+		val = bcm_uart_readl(port, UART_IR_REG);
-+		if (val & UART_IR_STAT(UART_IR_TXEMPTY))
-+			break;
-+		udelay(1);
-+	}
-+
-+	/* Wait up to 1s for flow control if necessary */
-+	if (port->flags & UPF_CONS_FLOW) {
-+		tmout = 1000000;
-+		while (--tmout) {
-+			unsigned int val;
-+
-+			val = bcm_uart_readl(port, UART_EXTINP_REG);
-+			if (val & UART_EXTINP_CTS_MASK)
-+				break;
-+			udelay(1);
-+		}
-+	}
-+}
-+
-+/*
-+ * output given char
-+ */
-+static void bcm_console_putchar(struct uart_port *port, int ch)
-+{
-+	wait_for_xmitr(port);
-+	bcm_uart_writel(port, ch, UART_FIFO_REG);
-+}
-+
-+/*
-+ * console core request to output given string
-+ */
-+static void bcm_console_write(struct console *co, const char *s,
-+			      unsigned int count)
-+{
-+	struct uart_port *port;
-+	unsigned long flags;
-+	int locked;
-+
-+	port = &ports[co->index];
-+
-+	local_irq_save(flags);
-+	if (port->sysrq) {
-+		/* bcm_uart_interrupt() already took the lock */
-+		locked = 0;
-+	} else if (oops_in_progress) {
-+		locked = spin_trylock(&port->lock);
-+	} else {
-+		spin_lock(&port->lock);
-+		locked = 1;
-+	}
-+
-+	/* call helper to deal with \r\n */
-+	uart_console_write(port, s, count, bcm_console_putchar);
-+
-+	/* and wait for char to be transmitted */
-+	wait_for_xmitr(port);
-+
-+	if (locked)
-+		spin_unlock(&port->lock);
-+	local_irq_restore(flags);
-+}
-+
-+/*
-+ * console core request to setup given console, find matching uart
-+ * port and setup it.
-+ */
-+static int bcm_console_setup(struct console *co, char *options)
-+{
-+	struct uart_port *port;
-+	int baud = 9600;
-+	int bits = 8;
-+	int parity = 'n';
-+	int flow = 'n';
-+
-+	if (co->index < 0 || co->index >= BCM63XX_NR_UARTS)
-+		return -EINVAL;
-+	port = &ports[co->index];
-+	if (!port->membase)
-+		return -ENODEV;
-+	if (options)
-+		uart_parse_options(options, &baud, &parity, &bits, &flow);
-+
-+	return uart_set_options(port, co, baud, parity, bits, flow);
-+}
-+
-+static struct uart_driver bcm_uart_driver;
-+
-+static struct console bcm63xx_console = {
-+	.name		= "ttyS",
-+	.write		= bcm_console_write,
-+	.device		= uart_console_device,
-+	.setup		= bcm_console_setup,
-+	.flags		= CON_PRINTBUFFER,
-+	.index		= -1,
-+	.data		= &bcm_uart_driver,
-+};
-+
-+static int __init bcm63xx_console_init(void)
-+{
-+	register_console(&bcm63xx_console);
-+	return 0;
-+}
-+
-+console_initcall(bcm63xx_console_init);
-+
-+#define BCM63XX_CONSOLE	&bcm63xx_console
-+#else
-+#define BCM63XX_CONSOLE	NULL
-+#endif /* CONFIG_SERIAL_BCM63XX_CONSOLE */
-+
-+static struct uart_driver bcm_uart_driver = {
-+	.owner		= THIS_MODULE,
-+	.driver_name	= "bcm63xx_uart",
-+	.dev_name	= "ttyS",
-+	.major		= TTY_MAJOR,
-+	.minor		= 64,
-+	.nr		= 1,
-+	.cons		= BCM63XX_CONSOLE,
-+};
-+
-+/*
-+ * platform driver probe/remove callback
-+ */
-+static int __devinit bcm_uart_probe(struct platform_device *pdev)
-+{
-+	struct resource *res_mem, *res_irq;
-+	struct uart_port *port;
-+	struct clk *clk;
-+	int ret;
-+
-+	if (pdev->id < 0 || pdev->id >= BCM63XX_NR_UARTS)
-+		return -EINVAL;
-+
-+	if (ports[pdev->id].membase)
-+		return -EBUSY;
-+
-+	res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	if (!res_mem)
-+		return -ENODEV;
-+
-+	res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
-+	if (!res_irq)
-+		return -ENODEV;
-+
-+	clk = clk_get(&pdev->dev, "periph");
-+	if (IS_ERR(clk))
-+		return -ENODEV;
-+
-+	port = &ports[pdev->id];
-+	memset(port, 0, sizeof(*port));
-+	port->iotype = UPIO_MEM;
-+	port->mapbase = res_mem->start;
-+	port->irq = res_irq->start;
-+	port->ops = &bcm_uart_ops;
-+	port->flags = UPF_BOOT_AUTOCONF;
-+	port->dev = &pdev->dev;
-+	port->fifosize = 16;
-+	port->uartclk = clk_get_rate(clk) / 2;
-+	clk_put(clk);
-+
-+	ret = uart_add_one_port(&bcm_uart_driver, port);
-+	if (ret) {
-+		kfree(port);
-+		return ret;
-+	}
-+	platform_set_drvdata(pdev, port);
-+	return 0;
-+}
-+
-+static int __devexit bcm_uart_remove(struct platform_device *pdev)
-+{
-+	struct uart_port *port;
-+
-+	port = platform_get_drvdata(pdev);
-+	uart_remove_one_port(&bcm_uart_driver, port);
-+	platform_set_drvdata(pdev, NULL);
-+	/* mark port as free */
-+	ports[pdev->id].membase = 0;
-+	return 0;
-+}
-+
-+/*
-+ * platform driver stuff
-+ */
-+static struct platform_driver bcm_uart_platform_driver = {
-+	.probe	= bcm_uart_probe,
-+	.remove	= __devexit_p(bcm_uart_remove),
-+	.driver	= {
-+		.owner = THIS_MODULE,
-+		.name  = "bcm63xx_uart",
-+	},
-+};
-+
-+static int __init bcm_uart_init(void)
-+{
-+	int ret;
-+
-+	ret = uart_register_driver(&bcm_uart_driver);
-+	if (ret)
-+		return ret;
-+
-+	ret = platform_driver_register(&bcm_uart_platform_driver);
-+	if (ret)
-+		uart_unregister_driver(&bcm_uart_driver);
-+
-+	return ret;
-+}
-+
-+static void __exit bcm_uart_exit(void)
-+{
-+	platform_driver_unregister(&bcm_uart_platform_driver);
-+	uart_unregister_driver(&bcm_uart_driver);
-+}
-+
-+module_init(bcm_uart_init);
-+module_exit(bcm_uart_exit);
-+
-+MODULE_AUTHOR("Maxime Bizon <mbizon@freebox.fr>");
-+MODULE_DESCRIPTION("Broadcom 63<xx integrated uart driver");
-+MODULE_LICENSE("GPL");
---- /dev/null
-+++ b/include/asm-mips/mach-bcm63xx/bcm63xx_dev_uart.h
-@@ -0,0 +1,6 @@
-+#ifndef BCM63XX_DEV_UART_H_
-+#define BCM63XX_DEV_UART_H_
-+
-+int bcm63xx_uart_register(void);
-+
-+#endif /* BCM63XX_DEV_UART_H_ */
 --- a/include/linux/serial_core.h
 +++ b/include/linux/serial_core.h
 @@ -155,6 +155,8 @@

target/linux/brcm63xx/patches-2.6.27/004_add_pci_support.patch

@@ -20,27 +20,6 @@ Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
  create mode 100644 arch/mips/pci/pci-bcm63xx.h
  create mode 100644 include/asm-mips/mach-bcm63xx/bcm63xx_dev_pci.h
 
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -3,7 +3,9 @@ menu "CPU support"
- 
- config BCM63XX_CPU_6348
- 	bool "support 6348 CPU"
-+	select HW_HAS_PCI
- 
- config BCM63XX_CPU_6358
- 	bool "support 6358 CPU"
-+	select HW_HAS_PCI
- endmenu
---- a/arch/mips/bcm63xx/setup.c
-+++ b/arch/mips/bcm63xx/setup.c
-@@ -105,4 +105,6 @@ void __init plat_mem_setup(void)
- 	pm_power_off = bcm63xx_machine_halt;
- 
- 	set_io_port_base(0);
-+	ioport_resource.start = 0;
-+	ioport_resource.end = ~0;
- }
 --- a/arch/mips/pci/Makefile
 +++ b/arch/mips/pci/Makefile
 @@ -16,6 +16,8 @@ obj-$(CONFIG_PCI_VR41XX)	+= ops-vr41xx.o
@@ -52,429 +31,3 @@ Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
  
  #
  # These are still pretty much in the old state, watch, go blind.
---- /dev/null
-+++ b/arch/mips/pci/fixup-bcm63xx.c
-@@ -0,0 +1,21 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
-+ */
-+
-+#include <linux/types.h>
-+#include <linux/pci.h>
-+#include <bcm63xx_cpu.h>
-+
-+int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-+{
-+	return bcm63xx_get_irq_number(IRQ_PCI);
-+}
-+
-+int pcibios_plat_dev_init(struct pci_dev *dev)
-+{
-+	return 0;
-+}
---- /dev/null
-+++ b/arch/mips/pci/ops-bcm63xx.c
-@@ -0,0 +1,179 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
-+ */
-+
-+#include <linux/types.h>
-+#include <linux/pci.h>
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/delay.h>
-+#include <linux/io.h>
-+
-+#include "pci-bcm63xx.h"
-+
-+/*
-+ * swizzle 32bits data to return only the needed part
-+ */
-+static int postprocess_read(u32 data, int where, unsigned int size)
-+{
-+	u32 ret;
-+
-+	ret = 0;
-+	switch (size) {
-+	case 1:
-+		ret = (data >> ((where & 3) << 3)) & 0xff;
-+		break;
-+	case 2:
-+		ret = (data >> ((where & 3) << 3)) & 0xffff;
-+		break;
-+	case 4:
-+		ret = data;
-+		break;
-+	}
-+	return ret;
-+}
-+
-+static int preprocess_write(u32 orig_data, u32 val, int where,
-+			    unsigned int size)
-+{
-+	u32 ret;
-+
-+	ret = 0;
-+	switch (size) {
-+	case 1:
-+		ret = (orig_data & ~(0xff << ((where & 3) << 3))) |
-+			(val << ((where & 3) << 3));
-+		break;
-+	case 2:
-+		ret = (orig_data & ~(0xffff << ((where & 3) << 3))) |
-+			(val << ((where & 3) << 3));
-+		break;
-+	case 4:
-+		ret = val;
-+		break;
-+	}
-+	return ret;
-+}
-+
-+/*
-+ * setup hardware for a configuration cycle with given parameters
-+ */
-+static int bcm63xx_setup_cfg_access(int type, unsigned int busn,
-+				    unsigned int devfn, int where)
-+{
-+	unsigned int slot, func, reg;
-+	u32 val;
-+
-+	slot = PCI_SLOT(devfn);
-+	func = PCI_FUNC(devfn);
-+	reg = where >> 2;
-+
-+	/* sanity check */
-+	if (slot > (MPI_L2PCFG_DEVNUM_MASK >> MPI_L2PCFG_DEVNUM_SHIFT))
-+		return 1;
-+
-+	if (func > (MPI_L2PCFG_FUNC_MASK >> MPI_L2PCFG_FUNC_SHIFT))
-+		return 1;
-+
-+	if (reg > (MPI_L2PCFG_REG_MASK >> MPI_L2PCFG_REG_SHIFT))
-+		return 1;
-+
-+	/* ok, setup config access */
-+	val = (reg << MPI_L2PCFG_REG_SHIFT);
-+	val |= (func << MPI_L2PCFG_FUNC_SHIFT);
-+	val |= (slot << MPI_L2PCFG_DEVNUM_SHIFT);
-+	val |= MPI_L2PCFG_CFG_USEREG_MASK;
-+	val |= MPI_L2PCFG_CFG_SEL_MASK;
-+	/* type 0 cycle for local bus, type 1 cycle for anything else */
-+	if (type != 0) {
-+		/* FIXME: how to specify bus ??? */
-+		val |= (1 << MPI_L2PCFG_CFG_TYPE_SHIFT);
-+	}
-+	bcm_mpi_writel(val, MPI_L2PCFG_REG);
-+
-+	return 0;
-+}
-+
-+static int bcm63xx_do_cfg_read(int type, unsigned int busn,
-+				unsigned int devfn, int where, int size,
-+				u32 *val)
-+{
-+	u32 data;
-+
-+	/* two phase cycle, first we write address, then read data at
-+	 * another location, caller already has a spinlock so no need
-+	 * to add one here  */
-+	if (bcm63xx_setup_cfg_access(type, busn, devfn, where))
-+		return PCIBIOS_DEVICE_NOT_FOUND;
-+	iob();
-+	data = le32_to_cpu(__raw_readl(pci_iospace_start));
-+	/* restore IO space normal behaviour */
-+	bcm_mpi_writel(0, MPI_L2PCFG_REG);
-+
-+	*val = postprocess_read(data, where, size);
-+
-+	return PCIBIOS_SUCCESSFUL;
-+}
-+
-+static int bcm63xx_do_cfg_write(int type, unsigned int busn,
-+				 unsigned int devfn, int where, int size,
-+				 u32 val)
-+{
-+	u32 data;
-+
-+	/* two phase cycle, first we write address, then write data to
-+	 * another location, caller already has a spinlock so no need
-+	 * to add one here  */
-+	if (bcm63xx_setup_cfg_access(type, busn, devfn, where))
-+		return PCIBIOS_DEVICE_NOT_FOUND;
-+	iob();
-+
-+	data = le32_to_cpu(__raw_readl(pci_iospace_start));
-+	data = preprocess_write(data, val, where, size);
-+
-+	__raw_writel(cpu_to_le32(data), pci_iospace_start);
-+	wmb();
-+	/* no way to know the access is done, we have to wait */
-+	udelay(500);
-+	/* restore IO space normal behaviour */
-+	bcm_mpi_writel(0, MPI_L2PCFG_REG);
-+
-+	return PCIBIOS_SUCCESSFUL;
-+}
-+
-+static int bcm63xx_pci_read(struct pci_bus *bus, unsigned int devfn,
-+			     int where, int size, u32 *val)
-+{
-+	int type;
-+
-+	type = bus->parent ? 1 : 0;
-+
-+	if (type == 0 && PCI_SLOT(devfn) == CARDBUS_PCI_IDSEL)
-+		return PCIBIOS_DEVICE_NOT_FOUND;
-+
-+	return bcm63xx_do_cfg_read(type, bus->number, devfn,
-+				    where, size, val);
-+}
-+
-+static int bcm63xx_pci_write(struct pci_bus *bus, unsigned int devfn,
-+			      int where, int size, u32 val)
-+{
-+	int type;
-+
-+	type = bus->parent ? 1 : 0;
-+
-+	if (type == 0 && PCI_SLOT(devfn) == CARDBUS_PCI_IDSEL)
-+		return PCIBIOS_DEVICE_NOT_FOUND;
-+
-+	return bcm63xx_do_cfg_write(type, bus->number, devfn,
-+				     where, size, val);
-+}
-+
-+struct pci_ops bcm63xx_pci_ops = {
-+	.read   = bcm63xx_pci_read,
-+	.write  = bcm63xx_pci_write
-+};
---- /dev/null
-+++ b/arch/mips/pci/pci-bcm63xx.c
-@@ -0,0 +1,178 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
-+ */
-+
-+#include <linux/types.h>
-+#include <linux/pci.h>
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <asm/bootinfo.h>
-+
-+#include "pci-bcm63xx.h"
-+
-+/* allow PCI to be disabled at runtime depending on board nvram
-+ * configuration */
-+int bcm63xx_pci_enabled = 0;
-+
-+static struct resource bcm_pci_mem_resource = {
-+	.name   = "bcm63xx PCI memory space",
-+	.start  = BCM_PCI_MEM_BASE_PA,
-+	.end    = BCM_PCI_MEM_END_PA,
-+	.flags  = IORESOURCE_MEM
-+};
-+
-+static struct resource bcm_pci_io_resource = {
-+	.name   = "bcm63xx PCI IO space",
-+	.start  = BCM_PCI_IO_BASE_PA,
-+	.end    = BCM_PCI_IO_END_PA,
-+	.flags  = IORESOURCE_IO
-+};
-+
-+struct pci_controller bcm63xx_controller = {
-+	.pci_ops	= &bcm63xx_pci_ops,
-+	.io_resource	= &bcm_pci_io_resource,
-+	.mem_resource	= &bcm_pci_mem_resource,
-+};
-+
-+static u32 bcm63xx_int_cfg_readl(u32 reg)
-+{
-+	u32 tmp;
-+
-+	tmp = reg & MPI_PCICFGCTL_CFGADDR_MASK;
-+	tmp |= MPI_PCICFGCTL_WRITEEN_MASK;
-+	bcm_mpi_writel(tmp, MPI_PCICFGCTL_REG);
-+	iob();
-+	return bcm_mpi_readl(MPI_PCICFGDATA_REG);
-+}
-+
-+static void bcm63xx_int_cfg_writel(u32 val, u32 reg)
-+{
-+	u32 tmp;
-+
-+	tmp = reg & MPI_PCICFGCTL_CFGADDR_MASK;
-+	tmp |=  MPI_PCICFGCTL_WRITEEN_MASK;
-+	bcm_mpi_writel(tmp, MPI_PCICFGCTL_REG);
-+	bcm_mpi_writel(val, MPI_PCICFGDATA_REG);
-+}
-+
-+void __iomem *pci_iospace_start;
-+
-+static int __init bcm63xx_pci_init(void)
-+{
-+	unsigned int mem_size;
-+	u32 val;
-+
-+	if (!BCMCPU_IS_6348() && !BCMCPU_IS_6358())
-+		return -ENODEV;
-+
-+	if (!bcm63xx_pci_enabled)
-+		return -ENODEV;
-+
-+	/*
-+	 * configuration  access are  done through  IO space,  remap 4
-+	 * first bytes to access it from CPU.
-+	 *
-+	 * this means that  no io access from CPU  should happen while
-+	 * we do a configuration cycle,  but there's no way we can add
-+	 * a spinlock for each io access, so this is currently kind of
-+	 * broken on SMP.
-+	 */
-+	pci_iospace_start = ioremap_nocache(BCM_PCI_IO_BASE_PA, 4);
-+	if (!pci_iospace_start)
-+		return -ENOMEM;
-+
-+	/* setup local bus to PCI access (PCI memory) */
-+	val = BCM_PCI_MEM_BASE_PA & MPI_L2P_BASE_MASK;
-+	bcm_mpi_writel(val, MPI_L2PMEMBASE1_REG);
-+	bcm_mpi_writel(~(BCM_PCI_MEM_SIZE - 1), MPI_L2PMEMRANGE1_REG);
-+	bcm_mpi_writel(val | MPI_L2PREMAP_ENABLED_MASK, MPI_L2PMEMREMAP1_REG);
-+
-+	/* set Cardbus IDSEL (type 0 cfg access on primary bus for
-+	 * this IDSEL will be done on Cardbus instead) */
-+	val = bcm_pcmcia_readl(PCMCIA_C1_REG);
-+	val &= ~PCMCIA_C1_CBIDSEL_MASK;
-+	val |= (CARDBUS_PCI_IDSEL << PCMCIA_C1_CBIDSEL_SHIFT);
-+	bcm_pcmcia_writel(val, PCMCIA_C1_REG);
-+
-+	/* disable second access windows */
-+	bcm_mpi_writel(0, MPI_L2PMEMREMAP2_REG);
-+
-+	/* setup local bus  to PCI access (IO memory),  we have only 1
-+	 * IO window  for both PCI  and cardbus, but it  cannot handle
-+	 * both  at the  same time,  assume standard  PCI for  now, if
-+	 * cardbus card has  IO zone, PCI fixup will  change window to
-+	 * cardbus */
-+	val = BCM_PCI_IO_BASE_PA & MPI_L2P_BASE_MASK;
-+	bcm_mpi_writel(val, MPI_L2PIOBASE_REG);
-+	bcm_mpi_writel(~(BCM_PCI_IO_SIZE - 1), MPI_L2PIORANGE_REG);
-+	bcm_mpi_writel(val | MPI_L2PREMAP_ENABLED_MASK, MPI_L2PIOREMAP_REG);
-+
-+	/* enable PCI related GPIO pins */
-+	bcm_mpi_writel(MPI_LOCBUSCTL_EN_PCI_GPIO_MASK, MPI_LOCBUSCTL_REG);
-+
-+	/* setup PCI to local bus access, used by PCI device to target
-+	 * local RAM while bus mastering */
-+	bcm63xx_int_cfg_writel(0, PCI_BASE_ADDRESS_3);
-+	if (BCMCPU_IS_6358())
-+		val = MPI_SP0_REMAP_ENABLE_MASK;
-+	else
-+		val = 0;
-+	bcm_mpi_writel(val, MPI_SP0_REMAP_REG);
-+
-+	bcm63xx_int_cfg_writel(0x0, PCI_BASE_ADDRESS_4);
-+	bcm_mpi_writel(0, MPI_SP1_REMAP_REG);
-+
-+	mem_size = bcm63xx_get_memory_size();
-+
-+	/* 6348 before rev b0 exposes only 16 MB of RAM memory through
-+	 * PCI, throw a warning if we have more memory */
-+	if (BCMCPU_IS_6348() && (bcm63xx_get_cpu_rev() & 0xf0) == 0xa0) {
-+		if (mem_size > (16 * 1024 * 1024))
-+			printk(KERN_WARNING "bcm63xx: this CPU "
-+			       "revision cannot handle more than 16MB "
-+			       "of RAM for PCI bus mastering\n");
-+	} else {
-+		/* setup sp0 range to local RAM size */
-+		bcm_mpi_writel(~(mem_size - 1), MPI_SP0_RANGE_REG);
-+		bcm_mpi_writel(0, MPI_SP1_RANGE_REG);
-+	}
-+
-+	/* change  host bridge  retry  counter to  infinite number  of
-+	 * retry,  needed for  some broadcom  wifi cards  with Silicon
-+	 * Backplane bus where access to srom seems very slow  */
-+	val = bcm63xx_int_cfg_readl(BCMPCI_REG_TIMERS);
-+	val &= ~REG_TIMER_RETRY_MASK;
-+	bcm63xx_int_cfg_writel(val, BCMPCI_REG_TIMERS);
-+
-+	/* enable memory decoder and bus mastering */
-+	val = bcm63xx_int_cfg_readl(PCI_COMMAND);
-+	val |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
-+	bcm63xx_int_cfg_writel(val, PCI_COMMAND);
-+
-+	/* enable read prefetching & disable byte swapping for bus
-+	 * mastering transfers */
-+	val = bcm_mpi_readl(MPI_PCIMODESEL_REG);
-+	val &= ~MPI_PCIMODESEL_BAR1_NOSWAP_MASK;
-+	val &= ~MPI_PCIMODESEL_BAR2_NOSWAP_MASK;
-+	val &= ~MPI_PCIMODESEL_PREFETCH_MASK;
-+	val |= (8 << MPI_PCIMODESEL_PREFETCH_SHIFT);
-+	bcm_mpi_writel(val, MPI_PCIMODESEL_REG);
-+
-+	/* enable pci interrupt */
-+	val = bcm_mpi_readl(MPI_LOCINT_REG);
-+	val |= MPI_LOCINT_MASK(MPI_LOCINT_EXT_PCI_INT);
-+	bcm_mpi_writel(val, MPI_LOCINT_REG);
-+
-+	register_pci_controller(&bcm63xx_controller);
-+
-+	/* mark memory space used for IO mapping as reserved */
-+	request_mem_region(BCM_PCI_IO_BASE_PA, BCM_PCI_IO_SIZE,
-+			   "bcm63xx PCI IO space");
-+	return 0;
-+}
-+
-+arch_initcall(bcm63xx_pci_init);
---- /dev/null
-+++ b/arch/mips/pci/pci-bcm63xx.h
-@@ -0,0 +1,27 @@
-+#ifndef PCI_BCM63XX_H_
-+#define PCI_BCM63XX_H_
-+
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_io.h>
-+#include <bcm63xx_regs.h>
-+#include <bcm63xx_dev_pci.h>
-+
-+/*
-+ * Cardbus shares  the PCI bus, but has  no IDSEL, so a  special id is
-+ * reserved for it.  If you have a standard PCI device at this id, you
-+ * need to change the following definition.
-+ */
-+#define CARDBUS_PCI_IDSEL	0x8
-+
-+/*
-+ * defined in ops-bcm63xx.c
-+ */
-+extern struct pci_ops bcm63xx_pci_ops;
-+extern struct pci_ops bcm63xx_cb_ops;
-+
-+/*
-+ * defined in pci-bcm63xx.c
-+ */
-+extern void __iomem *pci_iospace_start;
-+
-+#endif /* ! PCI_BCM63XX_H_ */
---- /dev/null
-+++ b/include/asm-mips/mach-bcm63xx/bcm63xx_dev_pci.h
-@@ -0,0 +1,6 @@
-+#ifndef BCM63XX_DEV_PCI_H_
-+#define BCM63XX_DEV_PCI_H_
-+
-+extern int bcm63xx_pci_enabled;
-+
-+#endif /* BCM63XX_DEV_PCI_H_ */

target/linux/brcm63xx/patches-2.6.27/005-change_pci_code_to_emulate_a_fake_cardbus_adapter.patch

@@ -1,382 +0,0 @@
-From 6891d3c1014cf56dc76ec583b69d341ea47984d6 Mon Sep 17 00:00:00 2001
-From: Maxime Bizon <mbizon@freebox.fr>
-Date: Fri, 18 Jul 2008 20:34:35 +0200
-Subject: [PATCH] [MIPS] BCM63XX: Change PCI code to emulate a fake cardbus bridge.
-
-Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
----
- arch/mips/pci/ops-bcm63xx.c |  288 +++++++++++++++++++++++++++++++++++++++++++
- arch/mips/pci/pci-bcm63xx.c |   44 +++++++
- 2 files changed, 332 insertions(+), 0 deletions(-)
-
---- a/arch/mips/pci/ops-bcm63xx.c
-+++ b/arch/mips/pci/ops-bcm63xx.c
-@@ -177,3 +177,291 @@ struct pci_ops bcm63xx_pci_ops = {
- 	.read   = bcm63xx_pci_read,
- 	.write  = bcm63xx_pci_write
- };
-+
-+#ifdef CONFIG_CARDBUS
-+/*
-+ * emulate configuration read access on a cardbus bridge
-+ */
-+#define FAKE_CB_BRIDGE_SLOT	0x1e
-+
-+static int fake_cb_bridge_bus_number = -1;
-+
-+static struct {
-+	u16 pci_command;
-+	u8 cb_latency;
-+	u8 subordinate_busn;
-+	u8 cardbus_busn;
-+	u8 pci_busn;
-+	int bus_assigned;
-+	u16 bridge_control;
-+
-+	u32 mem_base0;
-+	u32 mem_limit0;
-+	u32 mem_base1;
-+	u32 mem_limit1;
-+
-+	u32 io_base0;
-+	u32 io_limit0;
-+	u32 io_base1;
-+	u32 io_limit1;
-+} fake_cb_bridge_regs;
-+
-+static int fake_cb_bridge_read(int where, int size, u32 *val)
-+{
-+	unsigned int reg;
-+	u32 data;
-+
-+	data = 0;
-+	reg = where >> 2;
-+	switch (reg) {
-+	case (PCI_VENDOR_ID >> 2):
-+	case (PCI_CB_SUBSYSTEM_VENDOR_ID >> 2):
-+		/* create dummy vendor/device id from our cpu id */
-+		data = (bcm63xx_get_cpu_id() << 16) | PCI_VENDOR_ID_BROADCOM;
-+		break;
-+
-+	case (PCI_COMMAND >> 2):
-+		data = (PCI_STATUS_DEVSEL_SLOW << 16);
-+		data |= fake_cb_bridge_regs.pci_command;
-+		break;
-+
-+	case (PCI_CLASS_REVISION >> 2):
-+		data = (PCI_CLASS_BRIDGE_CARDBUS << 16);
-+		break;
-+
-+	case (PCI_CACHE_LINE_SIZE >> 2):
-+		data = (PCI_HEADER_TYPE_CARDBUS << 16);
-+		break;
-+
-+	case (PCI_INTERRUPT_LINE >> 2):
-+		/* bridge control */
-+		data = (fake_cb_bridge_regs.bridge_control << 16);
-+		/* pin:intA line:0xff */
-+		data |= (0x1 << 8) | 0xff;
-+		break;
-+
-+	case (PCI_CB_PRIMARY_BUS >> 2):
-+		data = (fake_cb_bridge_regs.cb_latency << 24);
-+		data |= (fake_cb_bridge_regs.subordinate_busn << 16);
-+		data |= (fake_cb_bridge_regs.cardbus_busn << 8);
-+		data |= fake_cb_bridge_regs.pci_busn;
-+		break;
-+
-+	case (PCI_CB_MEMORY_BASE_0 >> 2):
-+		data = fake_cb_bridge_regs.mem_base0;
-+		break;
-+
-+	case (PCI_CB_MEMORY_LIMIT_0 >> 2):
-+		data = fake_cb_bridge_regs.mem_limit0;
-+		break;
-+
-+	case (PCI_CB_MEMORY_BASE_1 >> 2):
-+		data = fake_cb_bridge_regs.mem_base1;
-+		break;
-+
-+	case (PCI_CB_MEMORY_LIMIT_1 >> 2):
-+		data = fake_cb_bridge_regs.mem_limit1;
-+		break;
-+
-+	case (PCI_CB_IO_BASE_0 >> 2):
-+		/* | 1 for 32bits io support */
-+		data = fake_cb_bridge_regs.io_base0 | 0x1;
-+		break;
-+
-+	case (PCI_CB_IO_LIMIT_0 >> 2):
-+		data = fake_cb_bridge_regs.io_limit0;
-+		break;
-+
-+	case (PCI_CB_IO_BASE_1 >> 2):
-+		/* | 1 for 32bits io support */
-+		data = fake_cb_bridge_regs.io_base1 | 0x1;
-+		break;
-+
-+	case (PCI_CB_IO_LIMIT_1 >> 2):
-+		data = fake_cb_bridge_regs.io_limit1;
-+		break;
-+	}
-+
-+	*val = postprocess_read(data, where, size);
-+	return PCIBIOS_SUCCESSFUL;
-+}
-+
-+/*
-+ * emulate configuration write access on a cardbus bridge
-+ */
-+static int fake_cb_bridge_write(int where, int size, u32 val)
-+{
-+	unsigned int reg;
-+	u32 data, tmp;
-+	int ret;
-+
-+	ret = fake_cb_bridge_read((where & ~0x3), 4, &data);
-+	if (ret != PCIBIOS_SUCCESSFUL)
-+		return ret;
-+
-+	data = preprocess_write(data, val, where, size);
-+
-+	reg = where >> 2;
-+	switch (reg) {
-+	case (PCI_COMMAND >> 2):
-+		fake_cb_bridge_regs.pci_command = (data & 0xffff);
-+		break;
-+
-+	case (PCI_CB_PRIMARY_BUS >> 2):
-+		fake_cb_bridge_regs.cb_latency = (data >> 24) & 0xff;
-+		fake_cb_bridge_regs.subordinate_busn = (data >> 16) & 0xff;
-+		fake_cb_bridge_regs.cardbus_busn = (data >> 8) & 0xff;
-+		fake_cb_bridge_regs.pci_busn = data & 0xff;
-+		if (fake_cb_bridge_regs.cardbus_busn)
-+			fake_cb_bridge_regs.bus_assigned = 1;
-+		break;
-+
-+	case (PCI_INTERRUPT_LINE >> 2):
-+		tmp = (data >> 16) & 0xffff;
-+		/* disable memory prefetch support */
-+		tmp &= ~PCI_CB_BRIDGE_CTL_PREFETCH_MEM0;
-+		tmp &= ~PCI_CB_BRIDGE_CTL_PREFETCH_MEM1;
-+		fake_cb_bridge_regs.bridge_control = tmp;
-+		break;
-+
-+	case (PCI_CB_MEMORY_BASE_0 >> 2):
-+		fake_cb_bridge_regs.mem_base0 = data;
-+		break;
-+
-+	case (PCI_CB_MEMORY_LIMIT_0 >> 2):
-+		fake_cb_bridge_regs.mem_limit0 = data;
-+		break;
-+
-+	case (PCI_CB_MEMORY_BASE_1 >> 2):
-+		fake_cb_bridge_regs.mem_base1 = data;
-+		break;
-+
-+	case (PCI_CB_MEMORY_LIMIT_1 >> 2):
-+		fake_cb_bridge_regs.mem_limit1 = data;
-+		break;
-+
-+	case (PCI_CB_IO_BASE_0 >> 2):
-+		fake_cb_bridge_regs.io_base0 = data;
-+		break;
-+
-+	case (PCI_CB_IO_LIMIT_0 >> 2):
-+		fake_cb_bridge_regs.io_limit0 = data;
-+		break;
-+
-+	case (PCI_CB_IO_BASE_1 >> 2):
-+		fake_cb_bridge_regs.io_base1 = data;
-+		break;
-+
-+	case (PCI_CB_IO_LIMIT_1 >> 2):
-+		fake_cb_bridge_regs.io_limit1 = data;
-+		break;
-+	}
-+
-+	return PCIBIOS_SUCCESSFUL;
-+}
-+
-+static int bcm63xx_cb_read(struct pci_bus *bus, unsigned int devfn,
-+			   int where, int size, u32 *val)
-+{
-+	/* snoop access to slot 0x1e on root bus, we fake a cardbus
-+	 * bridge at this location */
-+	if (!bus->parent && PCI_SLOT(devfn) == FAKE_CB_BRIDGE_SLOT) {
-+		fake_cb_bridge_bus_number = bus->number;
-+		return fake_cb_bridge_read(where, size, val);
-+	}
-+
-+	/* a  configuration  cycle for  the  device  behind the  cardbus
-+	 * bridge is  actually done as a  type 0 cycle  on the primary
-+	 * bus. This means that only  one device can be on the cardbus
-+	 * bus */
-+	if (fake_cb_bridge_regs.bus_assigned &&
-+	    bus->number == fake_cb_bridge_regs.cardbus_busn &&
-+	    PCI_SLOT(devfn) == 0)
-+		return bcm63xx_do_cfg_read(0, 0,
-+					   PCI_DEVFN(CARDBUS_PCI_IDSEL, 0),
-+					   where, size, val);
-+
-+	return PCIBIOS_DEVICE_NOT_FOUND;
-+}
-+
-+static int bcm63xx_cb_write(struct pci_bus *bus, unsigned int devfn,
-+			    int where, int size, u32 val)
-+{
-+	if (!bus->parent && PCI_SLOT(devfn) == FAKE_CB_BRIDGE_SLOT) {
-+		fake_cb_bridge_bus_number = bus->number;
-+		return fake_cb_bridge_write(where, size, val);
-+	}
-+
-+	if (fake_cb_bridge_regs.bus_assigned &&
-+	    bus->number == fake_cb_bridge_regs.cardbus_busn &&
-+	    PCI_SLOT(devfn) == 0)
-+		return bcm63xx_do_cfg_write(0, 0,
-+					    PCI_DEVFN(CARDBUS_PCI_IDSEL, 0),
-+					    where, size, val);
-+
-+	return PCIBIOS_DEVICE_NOT_FOUND;
-+}
-+
-+struct pci_ops bcm63xx_cb_ops = {
-+	.read   = bcm63xx_cb_read,
-+	.write   = bcm63xx_cb_write,
-+};
-+
-+/*
-+ * only one IO window, so it  cannot be shared by PCI and cardbus, use
-+ * fixup to choose and detect unhandled configuration
-+ */
-+static void bcm63xx_fixup(struct pci_dev *dev)
-+{
-+	static int io_window = -1;
-+	int i, found, new_io_window;
-+	u32 val;
-+
-+	/* look for any io resource */
-+	found = 0;
-+	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
-+		if (pci_resource_flags(dev, i) & IORESOURCE_IO) {
-+			found = 1;
-+			break;
-+		}
-+	}
-+
-+	if (!found)
-+		return;
-+
-+	/* skip our fake bus with only cardbus bridge on it */
-+	if (dev->bus->number == fake_cb_bridge_bus_number)
-+		return;
-+
-+	/* find on which bus the device is */
-+	if (fake_cb_bridge_regs.bus_assigned &&
-+	    dev->bus->number == fake_cb_bridge_regs.cardbus_busn &&
-+	    PCI_SLOT(dev->devfn) == 0)
-+		new_io_window = 1;
-+	else
-+		new_io_window = 0;
-+
-+	if (new_io_window == io_window)
-+		return;
-+
-+	if (io_window != -1) {
-+		printk(KERN_ERR "bcm63xx: both PCI and cardbus devices "
-+		       "need IO, which hardware cannot do\n");
-+		return;
-+	}
-+
-+	printk(KERN_INFO "bcm63xx: PCI IO window assigned to %s\n",
-+	       (new_io_window == 0) ? "PCI" : "cardbus");
-+
-+	val = bcm_mpi_readl(MPI_L2PIOREMAP_REG);
-+	if (io_window)
-+		val |= MPI_L2PREMAP_IS_CARDBUS_MASK;
-+	else
-+		val &= ~MPI_L2PREMAP_IS_CARDBUS_MASK;
-+	bcm_mpi_writel(val, MPI_L2PIOREMAP_REG);
-+
-+	io_window = new_io_window;
-+}
-+
-+DECLARE_PCI_FIXUP_ENABLE(PCI_ANY_ID, PCI_ANY_ID, bcm63xx_fixup);
-+#endif
---- a/arch/mips/pci/pci-bcm63xx.c
-+++ b/arch/mips/pci/pci-bcm63xx.c
-@@ -28,7 +28,11 @@ static struct resource bcm_pci_mem_resou
- static struct resource bcm_pci_io_resource = {
- 	.name   = "bcm63xx PCI IO space",
- 	.start  = BCM_PCI_IO_BASE_PA,
-+#ifdef CONFIG_CARDBUS
-+	.end    = BCM_PCI_IO_HALF_PA,
-+#else
- 	.end    = BCM_PCI_IO_END_PA,
-+#endif
- 	.flags  = IORESOURCE_IO
- };
- 
-@@ -38,6 +42,33 @@ struct pci_controller bcm63xx_controller
- 	.mem_resource	= &bcm_pci_mem_resource,
- };
- 
-+/*
-+ * We handle cardbus  via a fake Cardbus bridge,  memory and io spaces
-+ * have to be  clearly separated from PCI one  since we have different
-+ * memory decoder.
-+ */
-+#ifdef CONFIG_CARDBUS
-+static struct resource bcm_cb_mem_resource = {
-+	.name   = "bcm63xx Cardbus memory space",
-+	.start  = BCM_CB_MEM_BASE_PA,
-+	.end    = BCM_CB_MEM_END_PA,
-+	.flags  = IORESOURCE_MEM
-+};
-+
-+static struct resource bcm_cb_io_resource = {
-+	.name   = "bcm63xx Cardbus IO space",
-+	.start  = BCM_PCI_IO_HALF_PA + 1,
-+	.end    = BCM_PCI_IO_END_PA,
-+	.flags  = IORESOURCE_IO
-+};
-+
-+struct pci_controller bcm63xx_cb_controller = {
-+	.pci_ops	= &bcm63xx_cb_ops,
-+	.io_resource	= &bcm_cb_io_resource,
-+	.mem_resource	= &bcm_cb_mem_resource,
-+};
-+#endif
-+
- static u32 bcm63xx_int_cfg_readl(u32 reg)
- {
- 	u32 tmp;
-@@ -98,8 +129,17 @@ static int __init bcm63xx_pci_init(void)
- 	val |= (CARDBUS_PCI_IDSEL << PCMCIA_C1_CBIDSEL_SHIFT);
- 	bcm_pcmcia_writel(val, PCMCIA_C1_REG);
- 
-+#ifdef CONFIG_CARDBUS
-+	/* setup local bus to PCI access (Cardbus memory) */
-+	val = BCM_CB_MEM_BASE_PA & MPI_L2P_BASE_MASK;
-+	bcm_mpi_writel(val, MPI_L2PMEMBASE2_REG);
-+	bcm_mpi_writel(~(BCM_CB_MEM_SIZE - 1), MPI_L2PMEMRANGE2_REG);
-+	val |= MPI_L2PREMAP_ENABLED_MASK | MPI_L2PREMAP_IS_CARDBUS_MASK;
-+	bcm_mpi_writel(val, MPI_L2PMEMREMAP2_REG);
-+#else
- 	/* disable second access windows */
- 	bcm_mpi_writel(0, MPI_L2PMEMREMAP2_REG);
-+#endif
- 
- 	/* setup local bus  to PCI access (IO memory),  we have only 1
- 	 * IO window  for both PCI  and cardbus, but it  cannot handle
-@@ -169,6 +209,10 @@ static int __init bcm63xx_pci_init(void)
- 
- 	register_pci_controller(&bcm63xx_controller);
- 
-+#ifdef CONFIG_CARDBUS
-+	register_pci_controller(&bcm63xx_cb_controller);
-+#endif
-+
- 	/* mark memory space used for IO mapping as reserved */
- 	request_mem_region(BCM_PCI_IO_BASE_PA, BCM_PCI_IO_SIZE,
- 			   "bcm63xx PCI IO space");

target/linux/brcm63xx/patches-2.6.27/006-pcmcia_cardbus_support.patch

@@ -18,151 +18,6 @@ Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
  create mode 100644 drivers/pcmcia/bcm63xx_pcmcia.h
  create mode 100644 include/asm-mips/mach-bcm63xx/bcm63xx_dev_pcmcia.h
 
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -1,3 +1,4 @@
- obj-y		+= clk.o cpu.o cs.o gpio.o irq.o prom.o setup.o timer.o
- obj-y		+= dev-uart.o
-+obj-y		+= dev-pcmcia.o
- obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
---- /dev/null
-+++ b/arch/mips/bcm63xx/dev-pcmcia.c
-@@ -0,0 +1,135 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <asm/bootinfo.h>
-+#include <linux/platform_device.h>
-+#include <bcm63xx_cs.h>
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_dev_pcmcia.h>
-+#include <bcm63xx_io.h>
-+#include <bcm63xx_regs.h>
-+
-+static struct resource pcmcia_resources[] = {
-+	/* pcmcia registers */
-+	{
-+		.start		= -1, /* filled at runtime */
-+		.end		= -1, /* filled at runtime */
-+		.flags		= IORESOURCE_MEM,
-+	},
-+
-+	/* pcmcia memory zone resources */
-+	{
-+		.start		= BCM_PCMCIA_COMMON_BASE_PA,
-+		.end		= BCM_PCMCIA_COMMON_END_PA,
-+		.flags		= IORESOURCE_MEM,
-+	},
-+	{
-+		.start		= BCM_PCMCIA_ATTR_BASE_PA,
-+		.end		= BCM_PCMCIA_ATTR_END_PA,
-+		.flags		= IORESOURCE_MEM,
-+	},
-+	{
-+		.start		= BCM_PCMCIA_IO_BASE_PA,
-+		.end		= BCM_PCMCIA_IO_END_PA,
-+		.flags		= IORESOURCE_MEM,
-+	},
-+
-+	/* PCMCIA irq */
-+	{
-+		.start		= -1, /* filled at runtime */
-+		.flags		= IORESOURCE_IRQ,
-+	},
-+
-+	/* declare PCMCIA IO resource also */
-+	{
-+		.start		= BCM_PCMCIA_IO_BASE_PA,
-+		.end		= BCM_PCMCIA_IO_END_PA,
-+		.flags		= IORESOURCE_IO,
-+	},
-+};
-+
-+static struct bcm63xx_pcmcia_platform_data pd;
-+
-+static struct platform_device bcm63xx_pcmcia_device = {
-+	.name		= "bcm63xx_pcmcia",
-+	.id		= 0,
-+	.num_resources	= ARRAY_SIZE(pcmcia_resources),
-+	.resource	= pcmcia_resources,
-+	.dev		= {
-+		.platform_data = &pd,
-+	},
-+};
-+
-+static int __init config_pcmcia_cs(unsigned int cs,
-+				   u32 base, unsigned int size)
-+{
-+	int ret;
-+
-+	ret = bcm63xx_set_cs_status(cs, 0);
-+	if (!ret)
-+		ret = bcm63xx_set_cs_base(cs, base, size);
-+	if (!ret)
-+		ret = bcm63xx_set_cs_status(cs, 1);
-+	return ret;
-+}
-+
-+static const __initdata unsigned int pcmcia_cs[3][3] = {
-+	/* cs, base address, size */
-+	{ MPI_CS_PCMCIA_COMMON, BCM_PCMCIA_COMMON_BASE_PA,
-+	  BCM_PCMCIA_COMMON_SIZE },
-+
-+	{ MPI_CS_PCMCIA_ATTR, BCM_PCMCIA_ATTR_BASE_PA,
-+	  BCM_PCMCIA_ATTR_SIZE },
-+
-+	{ MPI_CS_PCMCIA_IO, BCM_PCMCIA_IO_BASE_PA,
-+	  BCM_PCMCIA_IO_SIZE },
-+};
-+
-+int __init bcm63xx_pcmcia_register(void)
-+{
-+	int ret, i;
-+
-+	if (!BCMCPU_IS_6348() && !BCMCPU_IS_6358())
-+		return 0;
-+
-+	/* use correct pcmcia ready gpio depending on processor */
-+	switch (bcm63xx_get_cpu_id()) {
-+	case BCM6348_CPU_ID:
-+		pd.ready_gpio = 22;
-+		break;
-+
-+	case BCM6358_CPU_ID:
-+		pd.ready_gpio = 22;
-+		break;
-+
-+	default:
-+		return -ENODEV;
-+	}
-+
-+	pcmcia_resources[0].start = bcm63xx_regset_address(RSET_PCMCIA);
-+	pcmcia_resources[0].end = pcmcia_resources[0].start;
-+	pcmcia_resources[0].end += RSET_PCMCIA_SIZE - 1;
-+	pcmcia_resources[4].start = bcm63xx_get_irq_number(IRQ_PCMCIA);
-+
-+	/* configure pcmcia chip selects */
-+	for (i = 0; i < 3; i++) {
-+		ret = config_pcmcia_cs(pcmcia_cs[i][0],
-+				       pcmcia_cs[i][1],
-+				       pcmcia_cs[i][2]);
-+		if (ret)
-+			goto out_err;
-+	}
-+
-+	return platform_device_register(&bcm63xx_pcmcia_device);
-+
-+out_err:
-+	printk(KERN_ERR "unable to set pcmcia chip select");
-+	return ret;
-+}
 --- a/drivers/pcmcia/Kconfig
 +++ b/drivers/pcmcia/Kconfig
 @@ -196,6 +196,10 @@ config PCMCIA_AU1X00
@@ -186,612 +41,3 @@ Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
  obj-$(CONFIG_PCMCIA_VRC4171)			+= vrc4171_card.o
  obj-$(CONFIG_PCMCIA_VRC4173)			+= vrc4173_cardu.o
  obj-$(CONFIG_OMAP_CF)				+= omap_cf.o
---- /dev/null
-+++ b/drivers/pcmcia/bcm63xx_pcmcia.c
-@@ -0,0 +1,522 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/ioport.h>
-+#include <linux/timer.h>
-+#include <linux/platform_device.h>
-+#include <linux/delay.h>
-+#include <linux/pci.h>
-+#include <linux/gpio.h>
-+
-+#include <bcm63xx_regs.h>
-+#include <bcm63xx_io.h>
-+#include "bcm63xx_pcmcia.h"
-+
-+#define PFX	"bcm63xx_pcmcia: "
-+
-+#ifdef CONFIG_CARDBUS
-+/* if cardbus is used, platform device needs reference to actual pci
-+ * device */
-+static struct pci_dev *bcm63xx_cb_dev;
-+#endif
-+
-+/*
-+ * read/write helper for pcmcia regs
-+ */
-+static inline u32 pcmcia_readl(struct bcm63xx_pcmcia_socket *skt, u32 off)
-+{
-+	return bcm_readl(skt->base + off);
-+}
-+
-+static inline void pcmcia_writel(struct bcm63xx_pcmcia_socket *skt,
-+				 u32 val, u32 off)
-+{
-+	bcm_writel(val, skt->base + off);
-+}
-+
-+/*
-+ * (Re-)Initialise the socket, turning on status interrupts and PCMCIA
-+ * bus.  This must wait for power to stabilise so that the card status
-+ * signals report correctly.
-+ */
-+static int bcm63xx_pcmcia_sock_init(struct pcmcia_socket *sock)
-+{
-+	struct bcm63xx_pcmcia_socket *skt;
-+	skt = sock->driver_data;
-+	return 0;
-+}
-+
-+/*
-+ * Remove power on the socket, disable IRQs from the card.
-+ * Turn off status interrupts, and disable the PCMCIA bus.
-+ */
-+static int bcm63xx_pcmcia_suspend(struct pcmcia_socket *sock)
-+{
-+	struct bcm63xx_pcmcia_socket *skt;
-+	skt = sock->driver_data;
-+	return 0;
-+}
-+
-+/*
-+ * Implements the set_socket() operation for the in-kernel PCMCIA
-+ * service (formerly SS_SetSocket in Card Services). We more or
-+ * less punt all of this work and let the kernel handle the details
-+ * of power configuration, reset, &c. We also record the value of
-+ * `state' in order to regurgitate it to the PCMCIA core later.
-+ */
-+static int bcm63xx_pcmcia_set_socket(struct pcmcia_socket *sock,
-+				     socket_state_t *state)
-+{
-+	struct bcm63xx_pcmcia_socket *skt;
-+	unsigned long flags;
-+	u32 val;
-+
-+	skt = sock->driver_data;
-+
-+	spin_lock_irqsave(&skt->lock, flags);
-+
-+	/* apply requested socket power */
-+	/* FIXME: hardware can't do this */
-+
-+	/* apply socket reset */
-+	val = pcmcia_readl(skt, PCMCIA_C1_REG);
-+	if (state->flags & SS_RESET)
-+		val |= PCMCIA_C1_RESET_MASK;
-+	else
-+		val &= ~PCMCIA_C1_RESET_MASK;
-+
-+	/* reverse reset logic for cardbus card */
-+	if (skt->card_detected && (skt->card_type & CARD_CARDBUS))
-+		val ^= PCMCIA_C1_RESET_MASK;
-+
-+	pcmcia_writel(skt, val, PCMCIA_C1_REG);
-+
-+	/* keep requested state for event reporting */
-+	skt->requested_state = *state;
-+
-+	spin_unlock_irqrestore(&skt->lock, flags);
-+
-+	return 0;
-+}
-+
-+/*
-+ * identity cardtype from VS[12] input, CD[12] input while only VS2 is
-+ * floating, and CD[12] input while only VS1 is floating
-+ */
-+enum {
-+	IN_VS1 = (1 << 0),
-+	IN_VS2 = (1 << 1),
-+	IN_CD1_VS2H = (1 << 2),
-+	IN_CD2_VS2H = (1 << 3),
-+	IN_CD1_VS1H = (1 << 4),
-+	IN_CD2_VS1H = (1 << 5),
-+};
-+
-+static const u8 vscd_to_cardtype[] = {
-+
-+	/* VS1 float, VS2 float */
-+	[IN_VS1 | IN_VS2] = (CARD_PCCARD | CARD_5V),
-+
-+	/* VS1 grounded, VS2 float */
-+	[IN_VS2] = (CARD_PCCARD | CARD_5V | CARD_3V),
-+
-+	/* VS1 grounded, VS2 grounded */
-+	[0] = (CARD_PCCARD | CARD_5V | CARD_3V | CARD_XV),
-+
-+	/* VS1 tied to CD1, VS2 float */
-+	[IN_VS1 | IN_VS2 | IN_CD1_VS1H] = (CARD_CARDBUS | CARD_3V),
-+
-+	/* VS1 grounded, VS2 tied to CD2 */
-+	[IN_VS2 | IN_CD2_VS2H] = (CARD_CARDBUS | CARD_3V | CARD_XV),
-+
-+	/* VS1 tied to CD2, VS2 grounded */
-+	[IN_VS1 | IN_CD2_VS1H] = (CARD_CARDBUS | CARD_3V | CARD_XV | CARD_YV),
-+
-+	/* VS1 float, VS2 grounded */
-+	[IN_VS1] = (CARD_PCCARD | CARD_XV),
-+
-+	/* VS1 float, VS2 tied to CD2 */
-+	[IN_VS1 | IN_VS2 | IN_CD2_VS2H] = (CARD_CARDBUS | CARD_3V),
-+
-+	/* VS1 float, VS2 tied to CD1 */
-+	[IN_VS1 | IN_VS2 | IN_CD1_VS2H] = (CARD_CARDBUS | CARD_XV | CARD_YV),
-+
-+	/* VS1 tied to CD2, VS2 float */
-+	[IN_VS1 | IN_VS2 | IN_CD2_VS1H] = (CARD_CARDBUS | CARD_YV),
-+
-+	/* VS2 grounded, VS1 is tied to CD1, CD2 is grounded */
-+	[IN_VS1 | IN_CD1_VS1H] = 0, /* ignore cardbay */
-+};
-+
-+/*
-+ * poll hardware to check card insertion status
-+ */
-+static unsigned int __get_socket_status(struct bcm63xx_pcmcia_socket *skt)
-+{
-+	unsigned int stat;
-+	u32 val;
-+
-+	stat = 0;
-+
-+	/* check CD for card presence */
-+	val = pcmcia_readl(skt, PCMCIA_C1_REG);
-+
-+	if (!(val & PCMCIA_C1_CD1_MASK) && !(val & PCMCIA_C1_CD2_MASK))
-+		stat |= SS_DETECT;
-+
-+	/* if new insertion, detect cardtype */
-+	if ((stat & SS_DETECT) && !skt->card_detected) {
-+		unsigned int stat = 0;
-+
-+		/* float VS1, float VS2 */
-+		val |= PCMCIA_C1_VS1OE_MASK;
-+		val |= PCMCIA_C1_VS2OE_MASK;
-+		pcmcia_writel(skt, val, PCMCIA_C1_REG);
-+
-+		/* wait for output to stabilize and read VS[12] */
-+		udelay(10);
-+		val = pcmcia_readl(skt, PCMCIA_C1_REG);
-+		stat |= (val & PCMCIA_C1_VS1_MASK) ? IN_VS1 : 0;
-+		stat |= (val & PCMCIA_C1_VS2_MASK) ? IN_VS2 : 0;
-+
-+		/* drive VS1 low, float VS2 */
-+		val &= ~PCMCIA_C1_VS1OE_MASK;
-+		val |= PCMCIA_C1_VS2OE_MASK;
-+		pcmcia_writel(skt, val, PCMCIA_C1_REG);
-+
-+		/* wait for output to stabilize and read CD[12] */
-+		udelay(10);
-+		val = pcmcia_readl(skt, PCMCIA_C1_REG);
-+		stat |= (val & PCMCIA_C1_CD1_MASK) ? IN_CD1_VS2H : 0;
-+		stat |= (val & PCMCIA_C1_CD2_MASK) ? IN_CD2_VS2H : 0;
-+
-+		/* float VS1, drive VS2 low */
-+		val |= PCMCIA_C1_VS1OE_MASK;
-+		val &= ~PCMCIA_C1_VS2OE_MASK;
-+		pcmcia_writel(skt, val, PCMCIA_C1_REG);
-+
-+		/* wait for output to stabilize and read CD[12] */
-+		udelay(10);
-+		val = pcmcia_readl(skt, PCMCIA_C1_REG);
-+		stat |= (val & PCMCIA_C1_CD1_MASK) ? IN_CD1_VS1H : 0;
-+		stat |= (val & PCMCIA_C1_CD2_MASK) ? IN_CD2_VS1H : 0;
-+
-+		/* guess cardtype from all this */
-+		skt->card_type = vscd_to_cardtype[stat];
-+		if (!skt->card_type)
-+			printk(KERN_ERR PFX "unsupported card type\n");
-+
-+		/* drive both VS pin to 0 again */
-+		val &= ~(PCMCIA_C1_VS1OE_MASK | PCMCIA_C1_VS2OE_MASK);
-+
-+		/* enable correct logic */
-+		val &= ~(PCMCIA_C1_EN_PCMCIA_MASK | PCMCIA_C1_EN_CARDBUS_MASK);
-+		if (skt->card_type & CARD_PCCARD)
-+			val |= PCMCIA_C1_EN_PCMCIA_MASK;
-+		else
-+			val |= PCMCIA_C1_EN_CARDBUS_MASK;
-+
-+		pcmcia_writel(skt, val, PCMCIA_C1_REG);
-+	}
-+	skt->card_detected = (stat & SS_DETECT) ? 1 : 0;
-+
-+	/* report card type/voltage */
-+	if (skt->card_type & CARD_CARDBUS)
-+		stat |= SS_CARDBUS;
-+	if (skt->card_type & CARD_3V)
-+		stat |= SS_3VCARD;
-+	if (skt->card_type & CARD_XV)
-+		stat |= SS_XVCARD;
-+	stat |= SS_POWERON;
-+
-+	if (gpio_get_value(skt->pd->ready_gpio))
-+		stat |= SS_READY;
-+
-+	return stat;
-+}
-+
-+/*
-+ * core request to get current socket status
-+ */
-+static int bcm63xx_pcmcia_get_status(struct pcmcia_socket *sock,
-+				     unsigned int *status)
-+{
-+	struct bcm63xx_pcmcia_socket *skt;
-+
-+	skt = sock->driver_data;
-+
-+	spin_lock_bh(&skt->lock);
-+	*status = __get_socket_status(skt);
-+	spin_unlock_bh(&skt->lock);
-+
-+	return 0;
-+}
-+
-+/*
-+ * socket polling timer callback
-+ */
-+static void bcm63xx_pcmcia_poll(unsigned long data)
-+{
-+	struct bcm63xx_pcmcia_socket *skt;
-+	unsigned int stat, events;
-+
-+	skt = (struct bcm63xx_pcmcia_socket *)data;
-+
-+	spin_lock_bh(&skt->lock);
-+
-+	stat = __get_socket_status(skt);
-+
-+	/* keep only changed bits, and mask with required one from the
-+	 * core */
-+	events = (stat ^ skt->old_status) & skt->requested_state.csc_mask;
-+	skt->old_status = stat;
-+	spin_unlock_bh(&skt->lock);
-+
-+	if (events)
-+		pcmcia_parse_events(&skt->socket, events);
-+
-+	mod_timer(&skt->timer,
-+		  jiffies + msecs_to_jiffies(BCM63XX_PCMCIA_POLL_RATE));
-+}
-+
-+static int bcm63xx_pcmcia_set_io_map(struct pcmcia_socket *sock,
-+				     struct pccard_io_map *map)
-+{
-+	/* this doesn't seem to be called by pcmcia layer if static
-+	 * mapping is used */
-+	return 0;
-+}
-+
-+static int bcm63xx_pcmcia_set_mem_map(struct pcmcia_socket *sock,
-+				      struct pccard_mem_map *map)
-+{
-+	struct bcm63xx_pcmcia_socket *skt;
-+	struct resource *res;
-+
-+	skt = sock->driver_data;
-+	if (map->flags & MAP_ATTRIB)
-+		res = skt->attr_res;
-+	else
-+		res = skt->common_res;
-+
-+	map->static_start = res->start + map->card_start;
-+	return 0;
-+}
-+
-+static struct pccard_operations bcm63xx_pcmcia_operations = {
-+	.init			= bcm63xx_pcmcia_sock_init,
-+	.suspend		= bcm63xx_pcmcia_suspend,
-+	.get_status		= bcm63xx_pcmcia_get_status,
-+	.set_socket		= bcm63xx_pcmcia_set_socket,
-+	.set_io_map		= bcm63xx_pcmcia_set_io_map,
-+	.set_mem_map		= bcm63xx_pcmcia_set_mem_map,
-+};
-+
-+/*
-+ * register pcmcia socket to core
-+ */
-+static int bcm63xx_drv_pcmcia_probe(struct platform_device *pdev)
-+{
-+	struct bcm63xx_pcmcia_socket *skt;
-+	struct pcmcia_socket *sock;
-+	struct resource *res, *irq_res;
-+	unsigned int regmem_size = 0, iomem_size = 0;
-+	u32 val;
-+	int ret;
-+
-+	skt = kzalloc(sizeof(*skt), GFP_KERNEL);
-+	if (!skt)
-+		return -ENOMEM;
-+	spin_lock_init(&skt->lock);
-+	sock = &skt->socket;
-+	sock->driver_data = skt;
-+
-+	/* make sure we have all resources we need */
-+	skt->common_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
-+	skt->attr_res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
-+	irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
-+	skt->pd = pdev->dev.platform_data;
-+	if (!skt->common_res || !skt->attr_res || !irq_res || !skt->pd) {
-+		ret = -EINVAL;
-+		goto err;
-+	}
-+
-+	/* remap pcmcia registers */
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	regmem_size = res->end - res->start + 1;
-+	if (!request_mem_region(res->start, regmem_size, "bcm63xx_pcmcia")) {
-+		ret = -EINVAL;
-+		goto err;
-+	}
-+	skt->reg_res = res;
-+
-+	skt->base = ioremap(res->start, regmem_size);
-+	if (!skt->base) {
-+		ret = -ENOMEM;
-+		goto err;
-+	}
-+
-+	/* remap io registers */
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 3);
-+	iomem_size = res->end - res->start + 1;
-+	skt->io_base = ioremap(res->start, iomem_size);
-+	if (!skt->io_base) {
-+		ret = -ENOMEM;
-+		goto err;
-+	}
-+
-+	/* resources are static */
-+	sock->resource_ops = &pccard_static_ops;
-+	sock->ops = &bcm63xx_pcmcia_operations;
-+	sock->owner = THIS_MODULE;
-+	sock->dev.parent = &pdev->dev;
-+	sock->features = SS_CAP_STATIC_MAP | SS_CAP_PCCARD;
-+	sock->io_offset = (unsigned long)skt->io_base;
-+	sock->pci_irq = irq_res->start;
-+
-+#ifdef CONFIG_CARDBUS
-+	sock->cb_dev = bcm63xx_cb_dev;
-+	if (bcm63xx_cb_dev)
-+		sock->features |= SS_CAP_CARDBUS;
-+#endif
-+
-+	/* assume common & attribute memory have the same size */
-+	sock->map_size = skt->common_res->end - skt->common_res->start + 1;
-+
-+	/* initialize polling timer */
-+	setup_timer(&skt->timer, bcm63xx_pcmcia_poll, (unsigned long)skt);
-+
-+	/* initialize  pcmcia  control register,  drive  VS[12] to  0,
-+	 * leave CB IDSEL to the old  value since it is set by the PCI
-+	 * layer */
-+	val = pcmcia_readl(skt, PCMCIA_C1_REG);
-+	val &= PCMCIA_C1_CBIDSEL_MASK;
-+	val |= PCMCIA_C1_EN_PCMCIA_GPIO_MASK;
-+	pcmcia_writel(skt, val, PCMCIA_C1_REG);
-+
-+	/* FIXME set correct pcmcia timings */
-+	val = PCMCIA_C2_DATA16_MASK;
-+	val |= 10 << PCMCIA_C2_RWCOUNT_SHIFT;
-+	val |= 6 << PCMCIA_C2_INACTIVE_SHIFT;
-+	val |= 3 << PCMCIA_C2_SETUP_SHIFT;
-+	val |= 3 << PCMCIA_C2_HOLD_SHIFT;
-+	pcmcia_writel(skt, val, PCMCIA_C2_REG);
-+
-+	ret = pcmcia_register_socket(sock);
-+	if (ret)
-+		goto err;
-+
-+	/* start polling socket */
-+	mod_timer(&skt->timer,
-+		  jiffies + msecs_to_jiffies(BCM63XX_PCMCIA_POLL_RATE));
-+
-+	platform_set_drvdata(pdev, skt);
-+	return 0;
-+
-+err:
-+	if (skt->io_base)
-+		iounmap(skt->io_base);
-+	if (skt->base)
-+		iounmap(skt->base);
-+	if (skt->reg_res)
-+		release_mem_region(skt->reg_res->start, regmem_size);
-+	kfree(skt);
-+	return ret;
-+}
-+
-+static int bcm63xx_drv_pcmcia_remove(struct platform_device *pdev)
-+{
-+	struct bcm63xx_pcmcia_socket *skt;
-+	struct resource *res;
-+
-+	skt = platform_get_drvdata(pdev);
-+	del_timer_sync(&skt->timer);
-+	iounmap(skt->base);
-+	iounmap(skt->io_base);
-+	res = skt->reg_res;
-+	release_mem_region(res->start, res->end - res->start + 1);
-+	kfree(skt);
-+	return 0;
-+}
-+
-+struct platform_driver bcm63xx_pcmcia_driver = {
-+	.probe	= bcm63xx_drv_pcmcia_probe,
-+	.remove	= __devexit_p(bcm63xx_drv_pcmcia_remove),
-+	.driver	= {
-+		.name	= "bcm63xx_pcmcia",
-+		.owner  = THIS_MODULE,
-+	},
-+};
-+
-+#ifdef CONFIG_CARDBUS
-+static int __devinit bcm63xx_cb_probe(struct pci_dev *dev,
-+				      const struct pci_device_id *id)
-+{
-+	/* keep pci device */
-+	bcm63xx_cb_dev = dev;
-+	return platform_driver_register(&bcm63xx_pcmcia_driver);
-+}
-+
-+static void __devexit bcm63xx_cb_exit(struct pci_dev *dev)
-+{
-+	platform_driver_unregister(&bcm63xx_pcmcia_driver);
-+	bcm63xx_cb_dev = NULL;
-+}
-+
-+static struct pci_device_id bcm63xx_cb_table[] = {
-+	{
-+		.vendor		= PCI_VENDOR_ID_BROADCOM,
-+		.device		= PCI_ANY_ID,
-+		.subvendor	= PCI_VENDOR_ID_BROADCOM,
-+		.subdevice	= PCI_ANY_ID,
-+		.class		= PCI_CLASS_BRIDGE_CARDBUS << 8,
-+		.class_mask	= ~0,
-+	},
-+	{}
-+};
-+
-+MODULE_DEVICE_TABLE(pci, bcm63xx_cb_table);
-+
-+static struct pci_driver bcm63xx_cardbus_driver = {
-+	.name		= "yenta_cardbus",
-+	.id_table	= bcm63xx_cb_table,
-+	.probe		= bcm63xx_cb_probe,
-+	.remove		= __devexit_p(bcm63xx_cb_exit),
-+};
-+#endif
-+
-+/*
-+ * if cardbus support is enabled, register our platform device after
-+ * our fake cardbus bridge has been registered
-+ */
-+static int __init bcm63xx_pcmcia_init(void)
-+{
-+#ifdef CONFIG_CARDBUS
-+	return pci_register_driver(&bcm63xx_cardbus_driver);
-+#else
-+	return platform_driver_register(&bcm63xx_pcmcia_driver);
-+#endif
-+}
-+
-+static void __exit bcm63xx_pcmcia_exit(void)
-+{
-+#ifdef CONFIG_CARDBUS
-+	return pci_unregister_driver(&bcm63xx_cardbus_driver);
-+#else
-+	platform_driver_unregister(&bcm63xx_pcmcia_driver);
-+#endif
-+}
-+
-+module_init(bcm63xx_pcmcia_init);
-+module_exit(bcm63xx_pcmcia_exit);
-+
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("Maxime Bizon <mbizon@freebox.fr>");
-+MODULE_DESCRIPTION("Linux PCMCIA Card Services: bcm63xx Socket Controller");
---- /dev/null
-+++ b/drivers/pcmcia/bcm63xx_pcmcia.h
-@@ -0,0 +1,65 @@
-+#ifndef BCM63XX_PCMCIA_H_
-+#define BCM63XX_PCMCIA_H_
-+
-+#include <linux/types.h>
-+#include <linux/timer.h>
-+#include <pcmcia/ss.h>
-+#include <bcm63xx_dev_pcmcia.h>
-+
-+/* socket polling rate in ms */
-+#define BCM63XX_PCMCIA_POLL_RATE	500
-+
-+enum {
-+	CARD_CARDBUS = (1 << 0),
-+
-+	CARD_PCCARD = (1 << 1),
-+
-+	CARD_5V = (1 << 2),
-+
-+	CARD_3V = (1 << 3),
-+
-+	CARD_XV = (1 << 4),
-+
-+	CARD_YV = (1 << 5),
-+};
-+
-+struct bcm63xx_pcmcia_socket {
-+	struct pcmcia_socket socket;
-+
-+	/* platform specific data */
-+	struct bcm63xx_pcmcia_platform_data *pd;
-+
-+	/* all regs access are protected by this spinlock */
-+	spinlock_t lock;
-+
-+	/* pcmcia registers resource */
-+	struct resource *reg_res;
-+
-+	/* base remapped address of registers */
-+	void __iomem *base;
-+
-+	/* whether a card is detected at the moment */
-+	int card_detected;
-+
-+	/* type of detected card (mask of above enum) */
-+	u8 card_type;
-+
-+	/* keep last socket status to implement event reporting */
-+	unsigned int old_status;
-+
-+	/* backup of requested socket state */
-+	socket_state_t requested_state;
-+
-+	/* timer used for socket status polling */
-+	struct timer_list timer;
-+
-+	/* attribute/common memory resources */
-+	struct resource *attr_res;
-+	struct resource *common_res;
-+	struct resource *io_res;
-+
-+	/* base address of io memory */
-+	void __iomem *io_base;
-+};
-+
-+#endif /* BCM63XX_PCMCIA_H_ */
---- /dev/null
-+++ b/include/asm-mips/mach-bcm63xx/bcm63xx_dev_pcmcia.h
-@@ -0,0 +1,13 @@
-+#ifndef BCM63XX_DEV_PCMCIA_H_
-+#define BCM63XX_DEV_PCMCIA_H_
-+
-+/*
-+ * PCMCIA driver platform data
-+ */
-+struct bcm63xx_pcmcia_platform_data {
-+	unsigned int ready_gpio;
-+};
-+
-+int bcm63xx_pcmcia_register(void);
-+
-+#endif /* BCM63XX_DEV_PCMCIA_H_ */

target/linux/brcm63xx/patches-2.6.27/007-usb_ohci_support.patch

@@ -17,246 +17,6 @@ Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
  create mode 100644 drivers/usb/host/ohci-bcm63xx.c
  create mode 100644 include/asm-mips/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
 
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -4,8 +4,14 @@ menu "CPU support"
- config BCM63XX_CPU_6348
- 	bool "support 6348 CPU"
- 	select HW_HAS_PCI
-+	select USB_ARCH_HAS_OHCI
-+	select USB_OHCI_BIG_ENDIAN_DESC
-+	select USB_OHCI_BIG_ENDIAN_MMIO
- 
- config BCM63XX_CPU_6358
- 	bool "support 6358 CPU"
- 	select HW_HAS_PCI
-+	select USB_ARCH_HAS_OHCI
-+	select USB_OHCI_BIG_ENDIAN_DESC
-+	select USB_OHCI_BIG_ENDIAN_MMIO
- endmenu
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -1,4 +1,5 @@
- obj-y		+= clk.o cpu.o cs.o gpio.o irq.o prom.o setup.o timer.o
- obj-y		+= dev-uart.o
- obj-y		+= dev-pcmcia.o
-+obj-y		+= dev-usb-ohci.o
- obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
---- /dev/null
-+++ b/arch/mips/bcm63xx/dev-usb-ohci.c
-@@ -0,0 +1,50 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/platform_device.h>
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_dev_usb_ohci.h>
-+
-+static struct resource ohci_resources[] = {
-+	{
-+		.start		= -1, /* filled at runtime */
-+		.end		= -1, /* filled at runtime */
-+		.flags		= IORESOURCE_MEM,
-+	},
-+	{
-+		.start		= -1, /* filled at runtime */
-+		.flags		= IORESOURCE_IRQ,
-+	},
-+};
-+
-+static u64 ohci_dmamask = ~(u32)0;
-+
-+static struct platform_device bcm63xx_ohci_device = {
-+	.name		= "bcm63xx_ohci",
-+	.id		= 0,
-+	.num_resources	= ARRAY_SIZE(ohci_resources),
-+	.resource	= ohci_resources,
-+	.dev		= {
-+		.dma_mask		= &ohci_dmamask,
-+		.coherent_dma_mask	= 0xffffffff,
-+	},
-+};
-+
-+int __init bcm63xx_ohci_register(void)
-+{
-+	if (!BCMCPU_IS_6348() && !BCMCPU_IS_6358())
-+		return 0;
-+
-+	ohci_resources[0].start = bcm63xx_regset_address(RSET_OHCI0);
-+	ohci_resources[0].end = ohci_resources[0].start;
-+	ohci_resources[0].end += RSET_OHCI_SIZE - 1;
-+	ohci_resources[1].start = bcm63xx_get_irq_number(IRQ_OHCI0);
-+	return platform_device_register(&bcm63xx_ohci_device);
-+}
---- /dev/null
-+++ b/drivers/usb/host/ohci-bcm63xx.c
-@@ -0,0 +1,159 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/clk.h>
-+#include <linux/platform_device.h>
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_regs.h>
-+#include <bcm63xx_io.h>
-+
-+static struct clk *usb_host_clock;
-+
-+static int __devinit ohci_bcm63xx_start(struct usb_hcd *hcd)
-+{
-+	struct ohci_hcd *ohci = hcd_to_ohci(hcd);
-+	int ret;
-+
-+	ret = ohci_init(ohci);
-+	if (ret < 0)
-+		return ret;
-+
-+	/* FIXME: autodetected port 2 is shared with USB slave */
-+
-+	ret = ohci_run(ohci);
-+	if (ret < 0) {
-+		err("can't start %s", hcd->self.bus_name);
-+		ohci_stop(hcd);
-+		return ret;
-+	}
-+	return 0;
-+}
-+
-+static const struct hc_driver ohci_bcm63xx_hc_driver = {
-+	.description =		hcd_name,
-+	.product_desc =		"BCM63XX integrated OHCI controller",
-+	.hcd_priv_size =	sizeof(struct ohci_hcd),
-+
-+	.irq =			ohci_irq,
-+	.flags =		HCD_USB11 | HCD_MEMORY,
-+	.start =		ohci_bcm63xx_start,
-+	.stop =			ohci_stop,
-+	.shutdown =		ohci_shutdown,
-+	.urb_enqueue =		ohci_urb_enqueue,
-+	.urb_dequeue =		ohci_urb_dequeue,
-+	.endpoint_disable =	ohci_endpoint_disable,
-+	.get_frame_number =	ohci_get_frame,
-+	.hub_status_data =	ohci_hub_status_data,
-+	.hub_control =		ohci_hub_control,
-+	.start_port_reset =	ohci_start_port_reset,
-+};
-+
-+static int __devinit ohci_hcd_bcm63xx_drv_probe(struct platform_device *pdev)
-+{
-+	struct resource *res_mem, *res_irq;
-+	struct usb_hcd *hcd;
-+	struct ohci_hcd *ohci;
-+	u32 reg;
-+	int ret;
-+
-+	res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
-+	if (!res_mem || !res_irq)
-+		return -ENODEV;
-+
-+	if (BCMCPU_IS_6348()) {
-+		struct clk *clk;
-+		/* enable USB host clock */
-+		clk = clk_get(&pdev->dev, "usbh");
-+		if (IS_ERR(clk))
-+			return -ENODEV;
-+
-+		clk_enable(clk);
-+		usb_host_clock = clk;
-+		bcm_rset_writel(RSET_OHCI_PRIV, 0, OHCI_PRIV_REG);
-+
-+	} else if (BCMCPU_IS_6358()) {
-+		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_REG);
-+		reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
-+		reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
-+		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_REG);
-+		/* don't ask... */
-+		bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020, USBH_PRIV_TEST_REG);
-+	} else
-+		return 0;
-+
-+	hcd = usb_create_hcd(&ohci_bcm63xx_hc_driver, &pdev->dev, "bcm63xx");
-+	if (!hcd)
-+		return -ENOMEM;
-+	hcd->rsrc_start = res_mem->start;
-+	hcd->rsrc_len = res_mem->end - res_mem->start + 1;
-+
-+	if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
-+		pr_debug("request_mem_region failed\n");
-+		ret = -EBUSY;
-+		goto out;
-+	}
-+
-+	hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
-+	if (!hcd->regs) {
-+		pr_debug("ioremap failed\n");
-+		ret = -EIO;
-+		goto out1;
-+	}
-+
-+	ohci = hcd_to_ohci(hcd);
-+	ohci->flags |= OHCI_QUIRK_BE_MMIO | OHCI_QUIRK_BE_DESC |
-+		OHCI_QUIRK_FRAME_NO;
-+	ohci_hcd_init(ohci);
-+
-+	ret = usb_add_hcd(hcd, res_irq->start, IRQF_DISABLED);
-+	if (ret)
-+		goto out2;
-+
-+	platform_set_drvdata(pdev, hcd);
-+	return 0;
-+
-+out2:
-+	iounmap(hcd->regs);
-+out1:
-+	release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
-+out:
-+	usb_put_hcd(hcd);
-+	return ret;
-+}
-+
-+static int __devexit ohci_hcd_bcm63xx_drv_remove(struct platform_device *pdev)
-+{
-+	struct usb_hcd *hcd;
-+
-+	hcd = platform_get_drvdata(pdev);
-+	usb_remove_hcd(hcd);
-+	iounmap(hcd->regs);
-+	usb_put_hcd(hcd);
-+	release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
-+	if (usb_host_clock) {
-+		clk_disable(usb_host_clock);
-+		clk_put(usb_host_clock);
-+	}
-+	platform_set_drvdata(pdev, NULL);
-+	return 0;
-+}
-+
-+static struct platform_driver ohci_hcd_bcm63xx_driver = {
-+	.probe		= ohci_hcd_bcm63xx_drv_probe,
-+	.remove		= __devexit_p(ohci_hcd_bcm63xx_drv_remove),
-+	.shutdown	= usb_hcd_platform_shutdown,
-+	.driver		= {
-+		.name	= "bcm63xx_ohci",
-+		.owner	= THIS_MODULE,
-+		.bus	= &platform_bus_type
-+	},
-+};
-+
-+MODULE_ALIAS("platform:bcm63xx_ohci");
 --- a/drivers/usb/host/ohci-hcd.c
 +++ b/drivers/usb/host/ohci-hcd.c
 @@ -1050,6 +1050,11 @@ MODULE_LICENSE ("GPL");
@@ -294,12 +54,3 @@ Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
  #define big_endian_frame_no_quirk(ohci)	(ohci->flags & OHCI_QUIRK_FRAME_NO)
  #else
  #define big_endian_frame_no_quirk(ohci)	0
---- /dev/null
-+++ b/include/asm-mips/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
-@@ -0,0 +1,6 @@
-+#ifndef BCM63XX_DEV_USB_OHCI_H_
-+#define BCM63XX_DEV_USB_OHCI_H_
-+
-+int bcm63xx_ohci_register(void);
-+
-+#endif /* BCM63XX_DEV_USB_OHCI_H_ */

target/linux/brcm63xx/patches-2.6.27/008-usb_ehci_support.patch

@@ -17,231 +17,6 @@ Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
  create mode 100644 drivers/usb/host/ehci-bcm63xx.c
  create mode 100644 include/asm-mips/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
 
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -14,4 +14,6 @@ config BCM63XX_CPU_6358
- 	select USB_ARCH_HAS_OHCI
- 	select USB_OHCI_BIG_ENDIAN_DESC
- 	select USB_OHCI_BIG_ENDIAN_MMIO
-+	select USB_ARCH_HAS_EHCI
-+	select USB_EHCI_BIG_ENDIAN_MMIO
- endmenu
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -2,4 +2,5 @@ obj-y		+= clk.o cpu.o cs.o gpio.o irq.o 
- obj-y		+= dev-uart.o
- obj-y		+= dev-pcmcia.o
- obj-y		+= dev-usb-ohci.o
-+obj-y		+= dev-usb-ehci.o
- obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
---- /dev/null
-+++ b/arch/mips/bcm63xx/dev-usb-ehci.c
-@@ -0,0 +1,50 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/platform_device.h>
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_dev_usb_ehci.h>
-+
-+static struct resource ehci_resources[] = {
-+	{
-+		.start		= -1, /* filled at runtime */
-+		.end		= -1, /* filled at runtime */
-+		.flags		= IORESOURCE_MEM,
-+	},
-+	{
-+		.start		= -1, /* filled at runtime */
-+		.flags		= IORESOURCE_IRQ,
-+	},
-+};
-+
-+static u64 ehci_dmamask = ~(u32)0;
-+
-+static struct platform_device bcm63xx_ehci_device = {
-+	.name		= "bcm63xx_ehci",
-+	.id		= 0,
-+	.num_resources	= ARRAY_SIZE(ehci_resources),
-+	.resource	= ehci_resources,
-+	.dev		= {
-+		.dma_mask		= &ehci_dmamask,
-+		.coherent_dma_mask	= 0xffffffff,
-+	},
-+};
-+
-+int __init bcm63xx_ehci_register(void)
-+{
-+	if (!BCMCPU_IS_6358())
-+		return 0;
-+
-+	ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
-+	ehci_resources[0].end = ehci_resources[0].start;
-+	ehci_resources[0].end += RSET_EHCI_SIZE - 1;
-+	ehci_resources[1].start = bcm63xx_get_irq_number(IRQ_EHCI0);
-+	return platform_device_register(&bcm63xx_ehci_device);
-+}
---- /dev/null
-+++ b/drivers/usb/host/ehci-bcm63xx.c
-@@ -0,0 +1,152 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/platform_device.h>
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_regs.h>
-+#include <bcm63xx_io.h>
-+
-+static int ehci_bcm63xx_setup(struct usb_hcd *hcd)
-+{
-+	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
-+	int retval;
-+
-+	retval = ehci_halt(ehci);
-+	if (retval)
-+		return retval;
-+
-+	retval = ehci_init(hcd);
-+	if (retval)
-+		return retval;
-+
-+	hcd->has_tt = 1;
-+	ehci_reset(ehci);
-+	ehci_port_power(ehci, 0);
-+
-+	return retval;
-+}
-+
-+
-+static const struct hc_driver ehci_bcm63xx_hc_driver = {
-+	.description =		hcd_name,
-+	.product_desc =		"BCM63XX integrated EHCI controller",
-+	.hcd_priv_size =	sizeof(struct ehci_hcd),
-+
-+	.irq =			ehci_irq,
-+	.flags =		HCD_MEMORY | HCD_USB2,
-+
-+	.reset =		ehci_bcm63xx_setup,
-+	.start =		ehci_run,
-+	.stop =			ehci_stop,
-+	.shutdown =		ehci_shutdown,
-+
-+	.urb_enqueue =		ehci_urb_enqueue,
-+	.urb_dequeue =		ehci_urb_dequeue,
-+	.endpoint_disable =	ehci_endpoint_disable,
-+
-+	.get_frame_number =	ehci_get_frame,
-+
-+	.hub_status_data =	ehci_hub_status_data,
-+	.hub_control =		ehci_hub_control,
-+	.bus_suspend =		ehci_bus_suspend,
-+	.bus_resume =		ehci_bus_resume,
-+	.relinquish_port =	ehci_relinquish_port,
-+	.port_handed_over =	ehci_port_handed_over,
-+};
-+
-+static int __devinit ehci_hcd_bcm63xx_drv_probe(struct platform_device *pdev)
-+{
-+	struct resource *res_mem, *res_irq;
-+	struct usb_hcd *hcd;
-+	struct ehci_hcd *ehci;
-+	u32 reg;
-+	int ret;
-+
-+	res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
-+	if (!res_mem || !res_irq)
-+		return -ENODEV;
-+
-+	reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_REG);
-+	reg &= ~USBH_PRIV_SWAP_EHCI_DATA_MASK;
-+	reg |= USBH_PRIV_SWAP_EHCI_ENDN_MASK;
-+	bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_REG);
-+
-+	/* don't ask... */
-+	bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020, USBH_PRIV_TEST_REG);
-+
-+	hcd = usb_create_hcd(&ehci_bcm63xx_hc_driver, &pdev->dev, "bcm63xx");
-+	if (!hcd)
-+		return -ENOMEM;
-+	hcd->rsrc_start = res_mem->start;
-+	hcd->rsrc_len = res_mem->end - res_mem->start + 1;
-+
-+	if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
-+		pr_debug("request_mem_region failed\n");
-+		ret = -EBUSY;
-+		goto out;
-+	}
-+
-+	hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
-+	if (!hcd->regs) {
-+		pr_debug("ioremap failed\n");
-+		ret = -EIO;
-+		goto out1;
-+	}
-+
-+	ehci = hcd_to_ehci(hcd);
-+	ehci->big_endian_mmio = 1;
-+	ehci->big_endian_desc = 0;
-+	ehci->caps = hcd->regs;
-+	ehci->regs = hcd->regs +
-+		HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase));
-+	ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
-+	ehci->sbrn = 0x20;
-+
-+	ret = usb_add_hcd(hcd, res_irq->start, IRQF_DISABLED);
-+	if (ret)
-+		goto out2;
-+
-+	platform_set_drvdata(pdev, hcd);
-+	return 0;
-+
-+out2:
-+	iounmap(hcd->regs);
-+out1:
-+	release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
-+out:
-+	usb_put_hcd(hcd);
-+	return ret;
-+}
-+
-+static int __devexit ehci_hcd_bcm63xx_drv_remove(struct platform_device *pdev)
-+{
-+	struct usb_hcd *hcd;
-+
-+	hcd = platform_get_drvdata(pdev);
-+	usb_remove_hcd(hcd);
-+	iounmap(hcd->regs);
-+	usb_put_hcd(hcd);
-+	release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
-+	platform_set_drvdata(pdev, NULL);
-+	return 0;
-+}
-+
-+static struct platform_driver ehci_hcd_bcm63xx_driver = {
-+	.probe		= ehci_hcd_bcm63xx_drv_probe,
-+	.remove		= __devexit_p(ehci_hcd_bcm63xx_drv_remove),
-+	.shutdown	= usb_hcd_platform_shutdown,
-+	.driver		= {
-+		.name	= "bcm63xx_ehci",
-+		.owner	= THIS_MODULE,
-+		.bus	= &platform_bus_type
-+	},
-+};
-+
-+MODULE_ALIAS("platform:bcm63xx_ehci");
 --- a/drivers/usb/host/ehci-hcd.c
 +++ b/drivers/usb/host/ehci-hcd.c
 @@ -1040,6 +1040,11 @@ MODULE_LICENSE ("GPL");
@@ -270,12 +45,3 @@ Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
  static inline unsigned int ehci_readl(const struct ehci_hcd *ehci,
  		__u32 __iomem * regs)
  {
---- /dev/null
-+++ b/include/asm-mips/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
-@@ -0,0 +1,6 @@
-+#ifndef BCM63XX_DEV_USB_EHCI_H_
-+#define BCM63XX_DEV_USB_EHCI_H_
-+
-+int bcm63xx_ehci_register(void);
-+
-+#endif /* BCM63XX_DEV_USB_EHCI_H_ */

target/linux/brcm63xx/patches-2.6.27/010-add_integrated_ethernet_phy_support.patch

@@ -36,138 +36,3 @@ Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
  obj-$(CONFIG_ICPLUS_PHY)	+= icplus.o
  obj-$(CONFIG_ADM6996_PHY)	+= adm6996.o
  obj-$(CONFIG_MVSWITCH_PHY)	+= mvswitch.o
---- /dev/null
-+++ b/drivers/net/phy/bcm63xx.c
-@@ -0,0 +1,132 @@
-+/*
-+ *	Driver for Broadcom 63xx SOCs integrated PHYs
-+ *
-+ *	This program is free software; you can redistribute it and/or
-+ *	modify it under the terms of the GNU General Public License
-+ *	as published by the Free Software Foundation; either version
-+ *	2 of the License, or (at your option) any later version.
-+ */
-+#include <linux/module.h>
-+#include <linux/phy.h>
-+
-+#define MII_BCM63XX_IR		0x1a	/* interrupt register */
-+#define MII_BCM63XX_IR_EN	0x4000	/* global interrupt enable */
-+#define MII_BCM63XX_IR_DUPLEX	0x0800	/* duplex changed */
-+#define MII_BCM63XX_IR_SPEED	0x0400	/* speed changed */
-+#define MII_BCM63XX_IR_LINK	0x0200	/* link changed */
-+#define MII_BCM63XX_IR_GMASK	0x0100	/* global interrupt mask */
-+
-+MODULE_DESCRIPTION("Broadcom 63xx internal PHY driver");
-+MODULE_AUTHOR("Maxime Bizon <mbizon@freebox.fr>");
-+MODULE_LICENSE("GPL");
-+
-+static int bcm63xx_config_init(struct phy_device *phydev)
-+{
-+	int reg, err;
-+
-+	reg = phy_read(phydev, MII_BCM63XX_IR);
-+	if (reg < 0)
-+		return reg;
-+
-+	/* Mask interrupts globally.  */
-+	reg |= MII_BCM63XX_IR_GMASK;
-+	err = phy_write(phydev, MII_BCM63XX_IR, reg);
-+	if (err < 0)
-+		return err;
-+
-+	/* Unmask events we are interested in  */
-+	reg = ~(MII_BCM63XX_IR_DUPLEX |
-+		MII_BCM63XX_IR_SPEED |
-+		MII_BCM63XX_IR_LINK) |
-+		MII_BCM63XX_IR_EN;
-+	err = phy_write(phydev, MII_BCM63XX_IR, reg);
-+	if (err < 0)
-+		return err;
-+	return 0;
-+}
-+
-+static int bcm63xx_ack_interrupt(struct phy_device *phydev)
-+{
-+	int reg;
-+
-+	/* Clear pending interrupts.  */
-+	reg = phy_read(phydev, MII_BCM63XX_IR);
-+	if (reg < 0)
-+		return reg;
-+
-+	return 0;
-+}
-+
-+static int bcm63xx_config_intr(struct phy_device *phydev)
-+{
-+	int reg, err;
-+
-+	reg = phy_read(phydev, MII_BCM63XX_IR);
-+	if (reg < 0)
-+		return reg;
-+
-+	if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
-+		reg &= ~MII_BCM63XX_IR_GMASK;
-+	else
-+		reg |= MII_BCM63XX_IR_GMASK;
-+
-+	err = phy_write(phydev, MII_BCM63XX_IR, reg);
-+	return err;
-+}
-+
-+static struct phy_driver bcm63xx_1_driver = {
-+	.phy_id		= 0x00406000,
-+	.phy_id_mask	= 0xfffffc00,
-+	.name		= "Broadcom BCM63XX (1)",
-+	/* ASYM_PAUSE bit is marked RO in datasheet, so don't cheat */
-+	.features	= (PHY_BASIC_FEATURES | SUPPORTED_Pause),
-+	.flags		= PHY_HAS_INTERRUPT,
-+	.config_init	= bcm63xx_config_init,
-+	.config_aneg	= genphy_config_aneg,
-+	.read_status	= genphy_read_status,
-+	.ack_interrupt	= bcm63xx_ack_interrupt,
-+	.config_intr	= bcm63xx_config_intr,
-+	.driver		= { .owner = THIS_MODULE },
-+};
-+
-+/* same phy as above, with just a different OUI */
-+static struct phy_driver bcm63xx_2_driver = {
-+	.phy_id		= 0x002bdc00,
-+	.phy_id_mask	= 0xfffffc00,
-+	.name		= "Broadcom BCM63XX (2)",
-+	.features	= (PHY_BASIC_FEATURES | SUPPORTED_Pause),
-+	.flags		= PHY_HAS_INTERRUPT,
-+	.config_init	= bcm63xx_config_init,
-+	.config_aneg	= genphy_config_aneg,
-+	.read_status	= genphy_read_status,
-+	.ack_interrupt	= bcm63xx_ack_interrupt,
-+	.config_intr	= bcm63xx_config_intr,
-+	.driver		= { .owner = THIS_MODULE },
-+};
-+
-+static int __init bcm63xx_phy_init(void)
-+{
-+	int ret;
-+
-+	ret = phy_driver_register(&bcm63xx_1_driver);
-+	if (ret)
-+		goto out_63xx_1;
-+	ret = phy_driver_register(&bcm63xx_2_driver);
-+	if (ret)
-+		goto out_63xx_2;
-+	return ret;
-+
-+out_63xx_2:
-+	phy_driver_unregister(&bcm63xx_1_driver);
-+out_63xx_1:
-+	return ret;
-+}
-+
-+static void __exit bcm63xx_phy_exit(void)
-+{
-+	phy_driver_unregister(&bcm63xx_1_driver);
-+	phy_driver_unregister(&bcm63xx_2_driver);
-+}
-+
-+module_init(bcm63xx_phy_init);
-+module_exit(bcm63xx_phy_exit);

target/linux/brcm63xx/patches-2.6.27/011-add_preliminary_board_support.patch

@@ -1,549 +0,0 @@
-From 16dc080062a37c21642bc77fde5391a3416729a4 Mon Sep 17 00:00:00 2001
-From: Maxime Bizon <mbizon@freebox.fr>
-Date: Wed, 17 Sep 2008 15:55:36 +0200
-Subject: [PATCH] [MIPS] BCM63XX: Add preliminary board support.
-
-Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
----
- arch/mips/bcm63xx/Kconfig                      |    2 +
- arch/mips/bcm63xx/Makefile                     |    2 +
- arch/mips/bcm63xx/boards/Kconfig               |   10 +
- arch/mips/bcm63xx/boards/Makefile              |    1 +
- arch/mips/bcm63xx/boards/board_bcm963xx.c      |  328 ++++++++++++++++++++++++
- arch/mips/bcm63xx/prom.c                       |    4 +
- arch/mips/bcm63xx/setup.c                      |   16 +-
- include/asm-mips/mach-bcm63xx/bcm63xx_board.h  |   12 +
- include/asm-mips/mach-bcm63xx/board_bcm963xx.h |   50 ++++
- 9 files changed, 423 insertions(+), 2 deletions(-)
- create mode 100644 arch/mips/bcm63xx/boards/Kconfig
- create mode 100644 arch/mips/bcm63xx/boards/Makefile
- create mode 100644 arch/mips/bcm63xx/boards/board_bcm963xx.c
- create mode 100644 include/asm-mips/mach-bcm63xx/bcm63xx_board.h
- create mode 100644 include/asm-mips/mach-bcm63xx/board_bcm963xx.h
-
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -17,3 +17,5 @@ config BCM63XX_CPU_6358
- 	select USB_ARCH_HAS_EHCI
- 	select USB_EHCI_BIG_ENDIAN_MMIO
- endmenu
-+
-+source "arch/mips/bcm63xx/boards/Kconfig"
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -5,3 +5,5 @@ obj-y		+= dev-usb-ohci.o
- obj-y		+= dev-usb-ehci.o
- obj-y		+= dev-enet.o
- obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
-+
-+obj-y		+= boards/
---- /dev/null
-+++ b/arch/mips/bcm63xx/boards/Kconfig
-@@ -0,0 +1,10 @@
-+choice
-+	prompt "Board support"
-+	depends on BCM63XX
-+	default BOARD_BCM963XX
-+
-+config BOARD_BCM963XX
-+       bool "Generic Broadcom 963xx boards"
-+       help
-+
-+endchoice
---- /dev/null
-+++ b/arch/mips/bcm63xx/boards/Makefile
-@@ -0,0 +1 @@
-+obj-$(CONFIG_BOARD_BCM963XX)		+= board_bcm963xx.o
---- /dev/null
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -0,0 +1,358 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/string.h>
-+#include <linux/platform_device.h>
-+#include <linux/mtd/mtd.h>
-+#include <linux/mtd/partitions.h>
-+#include <linux/mtd/physmap.h>
-+#include <asm/addrspace.h>
-+#include <bcm63xx_board.h>
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_regs.h>
-+#include <bcm63xx_io.h>
-+#include <bcm63xx_board.h>
-+#include <bcm63xx_dev_pci.h>
-+#include <bcm63xx_dev_uart.h>
-+#include <bcm63xx_dev_enet.h>
-+#include <bcm63xx_dev_pcmcia.h>
-+#include <bcm63xx_dev_usb_ohci.h>
-+#include <bcm63xx_dev_usb_ehci.h>
-+#include <board_bcm963xx.h>
-+
-+#define PFX	"board_bcm963xx: "
-+
-+static struct bcm963xx_nvram nvram;
-+static unsigned int mac_addr_used = 0;
-+static struct board_info board;
-+
-+/*
-+ * known 6348 boards
-+ */
-+#ifdef CONFIG_BCM63XX_CPU_6348
-+static struct board_info __initdata board_96348r = {
-+	.name				= "96348R",
-+	.expected_cpu_id		= 0x6348,
-+
-+	.has_enet0			= 1,
-+	.has_pci			= 1,
-+
-+	.enet0 = {
-+		.has_phy		= 1,
-+		.use_internal_phy	= 1,
-+	},
-+};
-+
-+static struct board_info __initdata board_96348gw_11 = {
-+	.name				= "96348GW-11",
-+	.expected_cpu_id		= 0x6348,
-+
-+	.has_enet0			= 1,
-+	.has_enet1			= 1,
-+	.has_pci			= 1,
-+
-+	.enet0 = {
-+		.has_phy		= 1,
-+		.use_internal_phy	= 1,
-+	},
-+
-+	.enet1 = {
-+		.force_speed_100	= 1,
-+		.force_duplex_full	= 1,
-+	},
-+
-+
-+	.has_ohci0 = 1,
-+	.has_pccard = 1,
-+	.has_ehci0 = 1,
-+};
-+
-+static struct board_info __initdata board_96348gw = {
-+	.name				= "96348GW",
-+	.expected_cpu_id		= 0x6348,
-+
-+	.has_enet0			= 1,
-+	.has_enet1			= 1,
-+	.has_pci			= 1,
-+
-+	.enet0 = {
-+		.has_phy		= 1,
-+		.use_internal_phy	= 1,
-+	},
-+	.enet1 = {
-+		.force_speed_100	= 1,
-+		.force_duplex_full	= 1,
-+	},
-+};
-+#endif
-+
-+/*
-+ * known 6358 boards
-+ */
-+#ifdef CONFIG_BCM63XX_CPU_6358
-+static struct board_info __initdata board_96358vw2 = {
-+	.name				= "96358VW2",
-+	.expected_cpu_id		= 0x6358,
-+
-+	.has_enet0			= 1,
-+	.has_enet1			= 1,
-+	.has_pci			= 1,
-+
-+	.enet0 = {
-+		.has_phy		= 1,
-+		.use_internal_phy	= 1,
-+	},
-+
-+	.enet1 = {
-+		.force_speed_100	= 1,
-+		.force_duplex_full	= 1,
-+	},
-+
-+
-+	.has_ohci0 = 1,
-+	.has_pccard = 1,
-+	.has_ehci0 = 1,
-+};
-+#endif
-+
-+/*
-+ * all boards
-+ */
-+static const struct board_info __initdata *bcm963xx_boards[] = {
-+#ifdef CONFIG_BCM63XX_CPU_6348
-+	&board_96348r,
-+	&board_96348gw,
-+	&board_96348gw_11,
-+#endif
-+
-+#ifdef CONFIG_BCM63XX_CPU_6358
-+	&board_96358vw2,
-+#endif
-+};
-+
-+/*
-+ * early init callback, read nvram data from flash and checksum it
-+ */
-+void __init board_prom_init(void)
-+{
-+	unsigned int check_len, i;
-+	u8 *boot_addr, *cfe, *p;
-+	char cfe_version[32];
-+	u32 val;
-+
-+	/* read base address of boot chip select (0) */
-+	val = bcm_mpi_readl(MPI_CSBASE_REG(0));
-+	val &= MPI_CSBASE_BASE_MASK;
-+	boot_addr = (u8 *)KSEG1ADDR(val);
-+
-+	/* dump cfe version */
-+	cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET;
-+	if (!memcmp(cfe, "cfe-v", 5))
-+		snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u",
-+			 cfe[5], cfe[6], cfe[7], cfe[8], cfe[9]);
-+	else
-+		strcpy(cfe_version, "unknown");
-+	printk(KERN_INFO PFX "CFE version: %s\n", cfe_version);
-+
-+	/* extract nvram data */
-+	memcpy(&nvram, boot_addr + BCM963XX_NVRAM_OFFSET, sizeof(nvram));
-+
-+	/* check checksum before using data */
-+	if (nvram.version <= 4)
-+		check_len = offsetof(struct bcm963xx_nvram, checksum_old);
-+	else
-+		check_len = sizeof(nvram);
-+	val = 0;
-+	p = (u8 *)&nvram;
-+	while (check_len--)
-+		val += *p;
-+	if (val) {
-+		printk(KERN_ERR PFX "invalid nvram checksum\n");
-+		return;
-+	}
-+
-+	/* find board by name */
-+	for (i = 0; i < ARRAY_SIZE(bcm963xx_boards); i++) {
-+		if (strncmp(nvram.name, bcm963xx_boards[i]->name,
-+			    sizeof(nvram.name)))
-+			continue;
-+		/* copy, board desc array is marked initdata */
-+		memcpy(&board, bcm963xx_boards[i], sizeof(board));
-+		break;
-+	}
-+
-+	/* bail out if board is not found, will complain later */
-+	if (!board.name[0]) {
-+		char name[17];
-+		memcpy(name, nvram.name, 16);
-+		name[16] = 0;
-+		printk(KERN_ERR PFX "unknown bcm963xx board: %s\n",
-+		       name);
-+		return;
-+	}
-+
-+	/* setup pin multiplexing depending on board enabled device,
-+	 * this has to be done this early since PCI init is done
-+	 * inside arch_initcall */
-+	val = 0;
-+
-+	if (board.has_pci) {
-+		bcm63xx_pci_enabled = 1;
-+		if (BCMCPU_IS_6348())
-+			val |= GPIO_MODE_6348_G2_PCI;
-+	}
-+
-+	if (board.has_pccard) {
-+		if (BCMCPU_IS_6348())
-+			val |= GPIO_MODE_6348_G1_MII_PCCARD;
-+	}
-+
-+	if (board.has_enet0 && !board.enet0.use_internal_phy) {
-+		if (BCMCPU_IS_6348())
-+			val |= GPIO_MODE_6348_G3_EXT_MII |
-+				GPIO_MODE_6348_G0_EXT_MII;
-+	}
-+
-+	if (board.has_enet1 && !board.enet1.use_internal_phy) {
-+		if (BCMCPU_IS_6348())
-+			val |= GPIO_MODE_6348_G3_EXT_MII |
-+				GPIO_MODE_6348_G0_EXT_MII;
-+	}
-+
-+	bcm_gpio_writel(val, GPIO_MODE_REG);
-+}
-+
-+/*
-+ * second stage init callback, good time to panic if we couldn't
-+ * identify on which board we're running since early printk is working
-+ */
-+void __init board_setup(void)
-+{
-+	if (!board.name[0])
-+		panic("unable to detect bcm963xx board");
-+	printk(KERN_INFO PFX "board name: %s\n", board.name);
-+
-+	/* make sure we're running on expected cpu */
-+	if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
-+		panic("unexpected CPU for bcm963xx board");
-+}
-+
-+/*
-+ * return board name for /proc/cpuinfo
-+ */
-+const char *board_get_name(void)
-+{
-+	return board.name;
-+}
-+
-+/*
-+ * register & return a new board mac address
-+ */
-+static int board_get_mac_address(u8 *mac)
-+{
-+	u8 *p;
-+	int count;
-+
-+	if (mac_addr_used >= nvram.mac_addr_count) {
-+		printk(KERN_ERR PFX "not enough mac address\n");
-+		return -ENODEV;
-+	}
-+
-+	memcpy(mac, nvram.mac_addr_base, ETH_ALEN);
-+	p = mac + ETH_ALEN - 1;
-+	count = mac_addr_used;
-+
-+	while (count--) {
-+		do {
-+			(*p)++;
-+			if (*p != 0)
-+				break;
-+			p--;
-+		} while (p != mac);
-+	}
-+
-+	if (p == mac) {
-+		printk(KERN_ERR PFX "unable to fetch mac address\n");
-+		return -ENODEV;
-+	}
-+
-+	mac_addr_used++;
-+	return 0;
-+}
-+
-+static struct mtd_partition mtd_partitions[] = {
-+	{
-+		.name		= "cfe",
-+		.offset		= 0x0,
-+		.size		= 0x40000,
-+	}
-+};
-+
-+static struct physmap_flash_data flash_data = {
-+	.width			= 2,
-+	.nr_parts		= ARRAY_SIZE(mtd_partitions),
-+	.parts			= mtd_partitions,
-+};
-+
-+static struct resource mtd_resources[] = {
-+	{
-+		.start		= 0,	/* filled at runtime */
-+		.end		= 0,	/* filled at runtime */
-+		.flags		= IORESOURCE_MEM,
-+	}
-+};
-+
-+static struct platform_device mtd_dev = {
-+	.name			= "physmap-flash",
-+	.resource		= mtd_resources,
-+	.num_resources		= ARRAY_SIZE(mtd_resources),
-+	.dev			= {
-+		.platform_data	= &flash_data,
-+	},
-+};
-+
-+/*
-+ * third stage init callback, register all board devices.
-+ */
-+int __init board_register_devices(void)
-+{
-+	u32 val;
-+
-+	bcm63xx_uart_register();
-+
-+	if (board.has_pccard)
-+		bcm63xx_pcmcia_register();
-+
-+	if (board.has_enet0 &&
-+	    !board_get_mac_address(board.enet0.mac_addr))
-+		bcm63xx_enet_register(0, &board.enet0);
-+
-+	if (board.has_enet1 &&
-+	    !board_get_mac_address(board.enet1.mac_addr))
-+		bcm63xx_enet_register(1, &board.enet1);
-+
-+	if (board.has_ohci0)
-+		bcm63xx_ohci_register();
-+
-+	if (board.has_ehci0)
-+		bcm63xx_ehci_register();
-+
-+
-+	/* read base address of boot chip select (0) */
-+	val = bcm_mpi_readl(MPI_CSBASE_REG(0));
-+	val &= MPI_CSBASE_BASE_MASK;
-+	mtd_resources[0].start = val;
-+	mtd_resources[0].end = 0x1FFFFFFF;
-+
-+	platform_device_register(&mtd_dev);
-+
-+	return 0;
-+}
-+
---- a/arch/mips/bcm63xx/prom.c
-+++ b/arch/mips/bcm63xx/prom.c
-@@ -9,6 +9,7 @@
- #include <linux/init.h>
- #include <linux/bootmem.h>
- #include <asm/bootinfo.h>
-+#include <bcm63xx_board.h>
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_io.h>
- #include <bcm63xx_regs.h>
-@@ -36,6 +37,9 @@ void __init prom_init(void)
- 
- 	/* assign command line from kernel config */
- 	strcpy(arcs_cmdline, CONFIG_CMDLINE);
-+
-+	/* do low level board init */
-+	board_prom_init();
- }
- 
- void __init prom_free_prom_memory(void)
---- a/arch/mips/bcm63xx/setup.c
-+++ b/arch/mips/bcm63xx/setup.c
-@@ -16,6 +16,7 @@
- #include <asm/time.h>
- #include <asm/reboot.h>
- #include <asm/cacheflush.h>
-+#include <bcm63xx_board.h>
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_regs.h>
- #include <bcm63xx_io.h>
-@@ -87,8 +88,9 @@ static void __bcm63xx_machine_reboot(cha
- const char *get_system_type(void)
- {
- 	static char buf[128];
--	sprintf(buf, "bcm963xx (0x%04x/0x%04X)",
--		bcm63xx_get_cpu_id(), bcm63xx_get_cpu_rev());
-+	snprintf(buf, sizeof (buf), "bcm63xx/%s (0x%04x/0x%04X)",
-+		 board_get_name(),
-+		 bcm63xx_get_cpu_id(), bcm63xx_get_cpu_rev());
- 	return buf;
- }
- 
-@@ -96,6 +98,7 @@ void __init plat_time_init(void)
- {
- 	mips_hpt_frequency = bcm63xx_get_cpu_freq() / 2;
- }
-+
- void __init plat_mem_setup(void)
- {
- 	add_memory_region(0, bcm63xx_get_memory_size(), BOOT_MEM_RAM);
-@@ -107,4 +110,13 @@ void __init plat_mem_setup(void)
- 	set_io_port_base(0);
- 	ioport_resource.start = 0;
- 	ioport_resource.end = ~0;
-+
-+	board_setup();
-+}
-+
-+int __init bcm63xx_register_devices(void)
-+{
-+	return board_register_devices();
- }
-+
-+device_initcall(bcm63xx_register_devices);
---- /dev/null
-+++ b/include/asm-mips/mach-bcm63xx/bcm63xx_board.h
-@@ -0,0 +1,12 @@
-+#ifndef BCM63XX_BOARD_H_
-+#define BCM63XX_BOARD_H_
-+
-+const char *board_get_name(void);
-+
-+void board_prom_init(void);
-+
-+void board_setup(void);
-+
-+int board_register_devices(void);
-+
-+#endif /* ! BCM63XX_BOARD_H_ */
---- /dev/null
-+++ b/include/asm-mips/mach-bcm63xx/board_bcm963xx.h
-@@ -0,0 +1,50 @@
-+#ifndef BOARD_BCM963XX_H_
-+#define BOARD_BCM963XX_H_
-+
-+#include <linux/types.h>
-+#include <bcm63xx_dev_enet.h>
-+
-+/*
-+ * flash mapping
-+ */
-+#define BCM963XX_CFE_VERSION_OFFSET	0x570
-+#define BCM963XX_NVRAM_OFFSET		0x580
-+
-+/*
-+ * nvram structure
-+ */
-+struct bcm963xx_nvram {
-+	u32	version;
-+	u8	reserved1[256];
-+	u8	name[16];
-+	u32	main_tp_number;
-+	u32	psi_size;
-+	u32	mac_addr_count;
-+	u8	mac_addr_base[6];
-+	u8	reserved2[2];
-+	u32	checksum_old;
-+	u8	reserved3[720];
-+	u32	checksum_high;
-+};
-+
-+/*
-+ * board definition
-+ */
-+struct board_info {
-+	u8		name[16];
-+	unsigned int	expected_cpu_id;
-+
-+	/* enabled feature/device */
-+	unsigned int	has_enet0:1;
-+	unsigned int	has_enet1:1;
-+	unsigned int	has_pci:1;
-+	unsigned int	has_pccard:1;
-+	unsigned int	has_ohci0:1;
-+	unsigned int	has_ehci0:1;
-+
-+	/* ethernet config */
-+	struct bcm63xx_enet_platform_data enet0;
-+	struct bcm63xx_enet_platform_data enet1;
-+};
-+
-+#endif /* ! BOARD_BCM963XX_H_ */

target/linux/brcm63xx/patches-2.6.27/012-add_defconfig.patch

@@ -1,882 +0,0 @@
-From d78e52f95969ff3ae7b7bfdfabcdd4de3b41e08f Mon Sep 17 00:00:00 2001
-From: Maxime Bizon <mbizon@freebox.fr>
-Date: Mon, 22 Sep 2008 10:41:15 +0200
-Subject: [PATCH] [MIPS] BCM63XX: Add defconfig.
-
-Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
----
- arch/mips/configs/bcm63xx_defconfig |  868 +++++++++++++++++++++++++++++++++++
- 1 files changed, 868 insertions(+), 0 deletions(-)
- create mode 100644 arch/mips/configs/bcm63xx_defconfig
-
---- /dev/null
-+++ b/arch/mips/configs/bcm63xx_defconfig
-@@ -0,0 +1,868 @@
-+#
-+# Automatically generated make config: don't edit
-+# Linux kernel version: 2.6.27
-+# Fri Oct 17 06:51:37 2008
-+#
-+CONFIG_MIPS=y
-+
-+#
-+# Machine selection
-+#
-+# CONFIG_MACH_ALCHEMY is not set
-+# CONFIG_BASLER_EXCITE is not set
-+# CONFIG_BCM47XX is not set
-+CONFIG_BCM63XX=y
-+# CONFIG_MIPS_COBALT is not set
-+# CONFIG_MACH_DECSTATION is not set
-+# CONFIG_MACH_JAZZ is not set
-+# CONFIG_LASAT is not set
-+# CONFIG_LEMOTE_FULONG is not set
-+# CONFIG_MIPS_MALTA is not set
-+# CONFIG_MIPS_SIM is not set
-+# CONFIG_MARKEINS is not set
-+# CONFIG_MACH_VR41XX is not set
-+# CONFIG_PNX8550_JBS is not set
-+# CONFIG_PNX8550_STB810 is not set
-+# CONFIG_PMC_MSP is not set
-+# CONFIG_PMC_YOSEMITE is not set
-+# CONFIG_SGI_IP22 is not set
-+# CONFIG_SGI_IP27 is not set
-+# CONFIG_SGI_IP28 is not set
-+# CONFIG_SGI_IP32 is not set
-+# CONFIG_SIBYTE_CRHINE is not set
-+# CONFIG_SIBYTE_CARMEL is not set
-+# CONFIG_SIBYTE_CRHONE is not set
-+# CONFIG_SIBYTE_RHONE is not set
-+# CONFIG_SIBYTE_SWARM is not set
-+# CONFIG_SIBYTE_LITTLESUR is not set
-+# CONFIG_SIBYTE_SENTOSA is not set
-+# CONFIG_SIBYTE_BIGSUR is not set
-+# CONFIG_SNI_RM is not set
-+# CONFIG_MACH_TX39XX is not set
-+# CONFIG_MACH_TX49XX is not set
-+# CONFIG_MIKROTIK_RB532 is not set
-+# CONFIG_WR_PPMC is not set
-+
-+#
-+# CPU support
-+#
-+CONFIG_BCM63XX_CPU_6348=y
-+CONFIG_BCM63XX_CPU_6358=y
-+CONFIG_BOARD_BCM963XX=y
-+CONFIG_RWSEM_GENERIC_SPINLOCK=y
-+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
-+CONFIG_ARCH_SUPPORTS_OPROFILE=y
-+CONFIG_GENERIC_FIND_NEXT_BIT=y
-+CONFIG_GENERIC_HWEIGHT=y
-+CONFIG_GENERIC_CALIBRATE_DELAY=y
-+CONFIG_GENERIC_CLOCKEVENTS=y
-+CONFIG_GENERIC_TIME=y
-+CONFIG_GENERIC_CMOS_UPDATE=y
-+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
-+# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
-+CONFIG_CEVT_R4K=y
-+CONFIG_CSRC_R4K=y
-+CONFIG_DMA_NONCOHERENT=y
-+CONFIG_DMA_NEED_PCI_MAP_STATE=y
-+CONFIG_EARLY_PRINTK=y
-+CONFIG_SYS_HAS_EARLY_PRINTK=y
-+# CONFIG_HOTPLUG_CPU is not set
-+# CONFIG_NO_IOPORT is not set
-+CONFIG_GENERIC_GPIO=y
-+CONFIG_CPU_BIG_ENDIAN=y
-+# CONFIG_CPU_LITTLE_ENDIAN is not set
-+CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
-+CONFIG_IRQ_CPU=y
-+CONFIG_SWAP_IO_SPACE=y
-+CONFIG_MIPS_L1_CACHE_SHIFT=5
-+
-+#
-+# CPU selection
-+#
-+# CONFIG_CPU_LOONGSON2 is not set
-+CONFIG_CPU_MIPS32_R1=y
-+# CONFIG_CPU_MIPS32_R2 is not set
-+# CONFIG_CPU_MIPS64_R1 is not set
-+# CONFIG_CPU_MIPS64_R2 is not set
-+# CONFIG_CPU_R3000 is not set
-+# CONFIG_CPU_TX39XX is not set
-+# CONFIG_CPU_VR41XX is not set
-+# CONFIG_CPU_R4300 is not set
-+# CONFIG_CPU_R4X00 is not set
-+# CONFIG_CPU_TX49XX is not set
-+# CONFIG_CPU_R5000 is not set
-+# CONFIG_CPU_R5432 is not set
-+# CONFIG_CPU_R6000 is not set
-+# CONFIG_CPU_NEVADA is not set
-+# CONFIG_CPU_R8000 is not set
-+# CONFIG_CPU_R10000 is not set
-+# CONFIG_CPU_RM7000 is not set
-+# CONFIG_CPU_RM9000 is not set
-+# CONFIG_CPU_SB1 is not set
-+CONFIG_SYS_HAS_CPU_MIPS32_R1=y
-+CONFIG_CPU_MIPS32=y
-+CONFIG_CPU_MIPSR1=y
-+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
-+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
-+
-+#
-+# Kernel type
-+#
-+CONFIG_32BIT=y
-+# CONFIG_64BIT is not set
-+CONFIG_PAGE_SIZE_4KB=y
-+# CONFIG_PAGE_SIZE_8KB is not set
-+# CONFIG_PAGE_SIZE_16KB is not set
-+# CONFIG_PAGE_SIZE_64KB is not set
-+CONFIG_CPU_HAS_PREFETCH=y
-+CONFIG_MIPS_MT_DISABLED=y
-+# CONFIG_MIPS_MT_SMP is not set
-+# CONFIG_MIPS_MT_SMTC is not set
-+CONFIG_CPU_HAS_LLSC=y
-+CONFIG_CPU_HAS_SYNC=y
-+CONFIG_GENERIC_HARDIRQS=y
-+CONFIG_GENERIC_IRQ_PROBE=y
-+CONFIG_CPU_SUPPORTS_HIGHMEM=y
-+CONFIG_ARCH_FLATMEM_ENABLE=y
-+CONFIG_ARCH_POPULATES_NODE_MAP=y
-+CONFIG_SELECT_MEMORY_MODEL=y
-+CONFIG_FLATMEM_MANUAL=y
-+# CONFIG_DISCONTIGMEM_MANUAL is not set
-+# CONFIG_SPARSEMEM_MANUAL is not set
-+CONFIG_FLATMEM=y
-+CONFIG_FLAT_NODE_MEM_MAP=y
-+# CONFIG_SPARSEMEM_STATIC is not set
-+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
-+CONFIG_PAGEFLAGS_EXTENDED=y
-+CONFIG_SPLIT_PTLOCK_CPUS=4
-+# CONFIG_RESOURCES_64BIT is not set
-+CONFIG_ZONE_DMA_FLAG=0
-+CONFIG_VIRT_TO_BUS=y
-+CONFIG_TICK_ONESHOT=y
-+CONFIG_NO_HZ=y
-+# CONFIG_HIGH_RES_TIMERS is not set
-+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
-+# CONFIG_HZ_48 is not set
-+# CONFIG_HZ_100 is not set
-+# CONFIG_HZ_128 is not set
-+CONFIG_HZ_250=y
-+# CONFIG_HZ_256 is not set
-+# CONFIG_HZ_1000 is not set
-+# CONFIG_HZ_1024 is not set
-+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
-+CONFIG_HZ=250
-+CONFIG_PREEMPT_NONE=y
-+# CONFIG_PREEMPT_VOLUNTARY is not set
-+# CONFIG_PREEMPT is not set
-+# CONFIG_KEXEC is not set
-+# CONFIG_SECCOMP is not set
-+CONFIG_LOCKDEP_SUPPORT=y
-+CONFIG_STACKTRACE_SUPPORT=y
-+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
-+
-+#
-+# General setup
-+#
-+CONFIG_EXPERIMENTAL=y
-+CONFIG_BROKEN_ON_SMP=y
-+CONFIG_INIT_ENV_ARG_LIMIT=32
-+CONFIG_LOCALVERSION=""
-+# CONFIG_LOCALVERSION_AUTO is not set
-+# CONFIG_SWAP is not set
-+# CONFIG_SYSVIPC is not set
-+# CONFIG_POSIX_MQUEUE is not set
-+# CONFIG_BSD_PROCESS_ACCT is not set
-+# CONFIG_TASKSTATS is not set
-+# CONFIG_AUDIT is not set
-+# CONFIG_IKCONFIG is not set
-+CONFIG_LOG_BUF_SHIFT=17
-+# CONFIG_CGROUPS is not set
-+# CONFIG_GROUP_SCHED is not set
-+CONFIG_SYSFS_DEPRECATED=y
-+CONFIG_SYSFS_DEPRECATED_V2=y
-+# CONFIG_RELAY is not set
-+# CONFIG_NAMESPACES is not set
-+# CONFIG_BLK_DEV_INITRD is not set
-+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-+CONFIG_SYSCTL=y
-+CONFIG_EMBEDDED=y
-+CONFIG_SYSCTL_SYSCALL=y
-+CONFIG_KALLSYMS=y
-+# CONFIG_KALLSYMS_EXTRA_PASS is not set
-+CONFIG_HOTPLUG=y
-+CONFIG_PRINTK=y
-+CONFIG_BUG=y
-+CONFIG_ELF_CORE=y
-+# CONFIG_PCSPKR_PLATFORM is not set
-+CONFIG_COMPAT_BRK=y
-+CONFIG_BASE_FULL=y
-+# CONFIG_FUTEX is not set
-+# CONFIG_EPOLL is not set
-+# CONFIG_SIGNALFD is not set
-+# CONFIG_TIMERFD is not set
-+# CONFIG_EVENTFD is not set
-+# CONFIG_SHMEM is not set
-+# CONFIG_VM_EVENT_COUNTERS is not set
-+# CONFIG_SLUB_DEBUG is not set
-+# CONFIG_SLAB is not set
-+CONFIG_SLUB=y
-+# CONFIG_SLOB is not set
-+# CONFIG_PROFILING is not set
-+# CONFIG_MARKERS is not set
-+CONFIG_HAVE_OPROFILE=y
-+# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
-+# CONFIG_HAVE_IOREMAP_PROT is not set
-+# CONFIG_HAVE_KPROBES is not set
-+# CONFIG_HAVE_KRETPROBES is not set
-+# CONFIG_HAVE_ARCH_TRACEHOOK is not set
-+# CONFIG_HAVE_DMA_ATTRS is not set
-+# CONFIG_USE_GENERIC_SMP_HELPERS is not set
-+# CONFIG_HAVE_CLK is not set
-+CONFIG_PROC_PAGE_MONITOR=y
-+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
-+CONFIG_TINY_SHMEM=y
-+CONFIG_BASE_SMALL=0
-+# CONFIG_MODULES is not set
-+CONFIG_BLOCK=y
-+# CONFIG_LBD is not set
-+# CONFIG_BLK_DEV_IO_TRACE is not set
-+# CONFIG_LSF is not set
-+# CONFIG_BLK_DEV_BSG is not set
-+# CONFIG_BLK_DEV_INTEGRITY is not set
-+
-+#
-+# IO Schedulers
-+#
-+CONFIG_IOSCHED_NOOP=y
-+# CONFIG_IOSCHED_AS is not set
-+# CONFIG_IOSCHED_DEADLINE is not set
-+# CONFIG_IOSCHED_CFQ is not set
-+# CONFIG_DEFAULT_AS is not set
-+# CONFIG_DEFAULT_DEADLINE is not set
-+# CONFIG_DEFAULT_CFQ is not set
-+CONFIG_DEFAULT_NOOP=y
-+CONFIG_DEFAULT_IOSCHED="noop"
-+CONFIG_CLASSIC_RCU=y
-+
-+#
-+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-+#
-+CONFIG_HW_HAS_PCI=y
-+CONFIG_PCI=y
-+CONFIG_PCI_DOMAINS=y
-+# CONFIG_ARCH_SUPPORTS_MSI is not set
-+# CONFIG_PCI_LEGACY is not set
-+CONFIG_MMU=y
-+CONFIG_PCCARD=y
-+# CONFIG_PCMCIA_DEBUG is not set
-+CONFIG_PCMCIA=y
-+CONFIG_PCMCIA_LOAD_CIS=y
-+CONFIG_PCMCIA_IOCTL=y
-+CONFIG_CARDBUS=y
-+
-+#
-+# PC-card bridges
-+#
-+# CONFIG_YENTA is not set
-+# CONFIG_PD6729 is not set
-+# CONFIG_I82092 is not set
-+CONFIG_PCMCIA_BCM63XX=y
-+# CONFIG_HOTPLUG_PCI is not set
-+
-+#
-+# Executable file formats
-+#
-+CONFIG_BINFMT_ELF=y
-+# CONFIG_BINFMT_MISC is not set
-+CONFIG_TRAD_SIGNALS=y
-+
-+#
-+# Power management options
-+#
-+CONFIG_ARCH_SUSPEND_POSSIBLE=y
-+# CONFIG_PM is not set
-+CONFIG_NET=y
-+
-+#
-+# Networking options
-+#
-+# CONFIG_PACKET is not set
-+CONFIG_UNIX=y
-+# CONFIG_NET_KEY is not set
-+CONFIG_INET=y
-+# CONFIG_IP_MULTICAST is not set
-+# CONFIG_IP_ADVANCED_ROUTER is not set
-+CONFIG_IP_FIB_HASH=y
-+# CONFIG_IP_PNP is not set
-+# CONFIG_NET_IPIP is not set
-+# CONFIG_NET_IPGRE is not set
-+# CONFIG_ARPD is not set
-+# CONFIG_SYN_COOKIES is not set
-+# CONFIG_INET_AH is not set
-+# CONFIG_INET_ESP is not set
-+# CONFIG_INET_IPCOMP is not set
-+# CONFIG_INET_XFRM_TUNNEL is not set
-+# CONFIG_INET_TUNNEL is not set
-+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-+# CONFIG_INET_XFRM_MODE_BEET is not set
-+# CONFIG_INET_LRO is not set
-+# CONFIG_INET_DIAG is not set
-+# CONFIG_TCP_CONG_ADVANCED is not set
-+CONFIG_TCP_CONG_CUBIC=y
-+CONFIG_DEFAULT_TCP_CONG="cubic"
-+# CONFIG_TCP_MD5SIG is not set
-+# CONFIG_IPV6 is not set
-+# CONFIG_NETWORK_SECMARK is not set
-+# CONFIG_NETFILTER is not set
-+# CONFIG_IP_DCCP is not set
-+# CONFIG_IP_SCTP is not set
-+# CONFIG_TIPC is not set
-+# CONFIG_ATM is not set
-+# CONFIG_BRIDGE is not set
-+# CONFIG_VLAN_8021Q is not set
-+# CONFIG_DECNET is not set
-+# CONFIG_LLC2 is not set
-+# CONFIG_IPX is not set
-+# CONFIG_ATALK is not set
-+# CONFIG_X25 is not set
-+# CONFIG_LAPB is not set
-+# CONFIG_ECONET is not set
-+# CONFIG_WAN_ROUTER is not set
-+# CONFIG_NET_SCHED is not set
-+
-+#
-+# Network testing
-+#
-+# CONFIG_NET_PKTGEN is not set
-+# CONFIG_HAMRADIO is not set
-+# CONFIG_CAN is not set
-+# CONFIG_IRDA is not set
-+# CONFIG_BT is not set
-+# CONFIG_AF_RXRPC is not set
-+
-+#
-+# Wireless
-+#
-+# CONFIG_CFG80211 is not set
-+# CONFIG_WIRELESS_EXT is not set
-+# CONFIG_MAC80211 is not set
-+# CONFIG_IEEE80211 is not set
-+# CONFIG_RFKILL is not set
-+# CONFIG_NET_9P is not set
-+
-+#
-+# Device Drivers
-+#
-+
-+#
-+# Generic Driver Options
-+#
-+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-+# CONFIG_STANDALONE is not set
-+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
-+CONFIG_FW_LOADER=y
-+CONFIG_FIRMWARE_IN_KERNEL=y
-+CONFIG_EXTRA_FIRMWARE=""
-+# CONFIG_SYS_HYPERVISOR is not set
-+# CONFIG_CONNECTOR is not set
-+CONFIG_MTD=y
-+# CONFIG_MTD_DEBUG is not set
-+# CONFIG_MTD_CONCAT is not set
-+CONFIG_MTD_PARTITIONS=y
-+# CONFIG_MTD_REDBOOT_PARTS is not set
-+# CONFIG_MTD_CMDLINE_PARTS is not set
-+# CONFIG_MTD_AR7_PARTS is not set
-+
-+#
-+# User Modules And Translation Layers
-+#
-+# CONFIG_MTD_CHAR is not set
-+# CONFIG_MTD_BLKDEVS is not set
-+# CONFIG_MTD_BLOCK is not set
-+# CONFIG_MTD_BLOCK_RO is not set
-+# CONFIG_FTL is not set
-+# CONFIG_NFTL is not set
-+# CONFIG_INFTL is not set
-+# CONFIG_RFD_FTL is not set
-+# CONFIG_SSFDC is not set
-+# CONFIG_MTD_OOPS is not set
-+
-+#
-+# RAM/ROM/Flash chip drivers
-+#
-+CONFIG_MTD_CFI=y
-+# CONFIG_MTD_JEDECPROBE is not set
-+CONFIG_MTD_GEN_PROBE=y
-+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
-+CONFIG_MTD_MAP_BANK_WIDTH_1=y
-+CONFIG_MTD_MAP_BANK_WIDTH_2=y
-+CONFIG_MTD_MAP_BANK_WIDTH_4=y
-+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
-+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
-+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
-+CONFIG_MTD_CFI_I1=y
-+CONFIG_MTD_CFI_I2=y
-+# CONFIG_MTD_CFI_I4 is not set
-+# CONFIG_MTD_CFI_I8 is not set
-+CONFIG_MTD_CFI_INTELEXT=y
-+CONFIG_MTD_CFI_AMDSTD=y
-+# CONFIG_MTD_CFI_STAA is not set
-+CONFIG_MTD_CFI_UTIL=y
-+# CONFIG_MTD_RAM is not set
-+# CONFIG_MTD_ROM is not set
-+# CONFIG_MTD_ABSENT is not set
-+
-+#
-+# Mapping drivers for chip access
-+#
-+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
-+CONFIG_MTD_PHYSMAP=y
-+CONFIG_MTD_PHYSMAP_START=0x8000000
-+CONFIG_MTD_PHYSMAP_LEN=0
-+CONFIG_MTD_PHYSMAP_BANKWIDTH=2
-+# CONFIG_MTD_INTEL_VR_NOR is not set
-+# CONFIG_MTD_PLATRAM is not set
-+
-+#
-+# Self-contained MTD device drivers
-+#
-+# CONFIG_MTD_PMC551 is not set
-+# CONFIG_MTD_SLRAM is not set
-+# CONFIG_MTD_PHRAM is not set
-+# CONFIG_MTD_MTDRAM is not set
-+# CONFIG_MTD_BLOCK2MTD is not set
-+
-+#
-+# Disk-On-Chip Device Drivers
-+#
-+# CONFIG_MTD_DOC2000 is not set
-+# CONFIG_MTD_DOC2001 is not set
-+# CONFIG_MTD_DOC2001PLUS is not set
-+# CONFIG_MTD_NAND is not set
-+# CONFIG_MTD_ONENAND is not set
-+
-+#
-+# UBI - Unsorted block images
-+#
-+# CONFIG_MTD_UBI is not set
-+# CONFIG_PARPORT is not set
-+# CONFIG_BLK_DEV is not set
-+# CONFIG_MISC_DEVICES is not set
-+CONFIG_HAVE_IDE=y
-+# CONFIG_IDE is not set
-+
-+#
-+# SCSI device support
-+#
-+# CONFIG_RAID_ATTRS is not set
-+# CONFIG_SCSI is not set
-+# CONFIG_SCSI_DMA is not set
-+# CONFIG_SCSI_NETLINK is not set
-+# CONFIG_ATA is not set
-+# CONFIG_MD is not set
-+# CONFIG_FUSION is not set
-+
-+#
-+# IEEE 1394 (FireWire) support
-+#
-+
-+#
-+# Enable only one of the two stacks, unless you know what you are doing
-+#
-+# CONFIG_FIREWIRE is not set
-+# CONFIG_IEEE1394 is not set
-+# CONFIG_I2O is not set
-+CONFIG_NETDEVICES=y
-+# CONFIG_DUMMY is not set
-+# CONFIG_BONDING is not set
-+# CONFIG_MACVLAN is not set
-+# CONFIG_EQUALIZER is not set
-+# CONFIG_TUN is not set
-+# CONFIG_VETH is not set
-+# CONFIG_ARCNET is not set
-+CONFIG_PHYLIB=y
-+
-+#
-+# MII PHY device drivers
-+#
-+# CONFIG_MARVELL_PHY is not set
-+# CONFIG_DAVICOM_PHY is not set
-+# CONFIG_QSEMI_PHY is not set
-+# CONFIG_LXT_PHY is not set
-+# CONFIG_CICADA_PHY is not set
-+# CONFIG_VITESSE_PHY is not set
-+# CONFIG_SMSC_PHY is not set
-+# CONFIG_BROADCOM_PHY is not set
-+CONFIG_BCM63XX_PHY=y
-+# CONFIG_ICPLUS_PHY is not set
-+# CONFIG_REALTEK_PHY is not set
-+# CONFIG_FIXED_PHY is not set
-+# CONFIG_MDIO_BITBANG is not set
-+CONFIG_NET_ETHERNET=y
-+CONFIG_MII=y
-+# CONFIG_AX88796 is not set
-+# CONFIG_HAPPYMEAL is not set
-+# CONFIG_SUNGEM is not set
-+# CONFIG_CASSINI is not set
-+# CONFIG_NET_VENDOR_3COM is not set
-+# CONFIG_DM9000 is not set
-+# CONFIG_NET_TULIP is not set
-+# CONFIG_HP100 is not set
-+# CONFIG_IBM_NEW_EMAC_ZMII is not set
-+# CONFIG_IBM_NEW_EMAC_RGMII is not set
-+# CONFIG_IBM_NEW_EMAC_TAH is not set
-+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
-+# CONFIG_NET_PCI is not set
-+# CONFIG_B44 is not set
-+CONFIG_BCM63XX_ENET=y
-+# CONFIG_NETDEV_1000 is not set
-+# CONFIG_NETDEV_10000 is not set
-+# CONFIG_TR is not set
-+
-+#
-+# Wireless LAN
-+#
-+# CONFIG_WLAN_PRE80211 is not set
-+# CONFIG_WLAN_80211 is not set
-+# CONFIG_IWLWIFI_LEDS is not set
-+
-+#
-+# USB Network Adapters
-+#
-+# CONFIG_USB_CATC is not set
-+# CONFIG_USB_KAWETH is not set
-+# CONFIG_USB_PEGASUS is not set
-+# CONFIG_USB_RTL8150 is not set
-+# CONFIG_USB_USBNET is not set
-+# CONFIG_NET_PCMCIA is not set
-+# CONFIG_WAN is not set
-+# CONFIG_FDDI is not set
-+# CONFIG_HIPPI is not set
-+# CONFIG_PPP is not set
-+# CONFIG_SLIP is not set
-+# CONFIG_NETCONSOLE is not set
-+# CONFIG_NETPOLL is not set
-+# CONFIG_NET_POLL_CONTROLLER is not set
-+# CONFIG_ISDN is not set
-+# CONFIG_PHONE is not set
-+
-+#
-+# Input device support
-+#
-+# CONFIG_INPUT is not set
-+
-+#
-+# Hardware I/O ports
-+#
-+# CONFIG_SERIO is not set
-+# CONFIG_GAMEPORT is not set
-+
-+#
-+# Character devices
-+#
-+# CONFIG_VT is not set
-+# CONFIG_DEVKMEM is not set
-+# CONFIG_SERIAL_NONSTANDARD is not set
-+# CONFIG_NOZOMI is not set
-+
-+#
-+# Serial drivers
-+#
-+# CONFIG_SERIAL_8250 is not set
-+
-+#
-+# Non-8250 serial port support
-+#
-+CONFIG_SERIAL_CORE=y
-+CONFIG_SERIAL_CORE_CONSOLE=y
-+# CONFIG_SERIAL_JSM is not set
-+CONFIG_SERIAL_BCM63XX=y
-+CONFIG_SERIAL_BCM63XX_CONSOLE=y
-+# CONFIG_UNIX98_PTYS is not set
-+CONFIG_LEGACY_PTYS=y
-+CONFIG_LEGACY_PTY_COUNT=256
-+# CONFIG_IPMI_HANDLER is not set
-+# CONFIG_HW_RANDOM is not set
-+# CONFIG_R3964 is not set
-+# CONFIG_APPLICOM is not set
-+
-+#
-+# PCMCIA character devices
-+#
-+# CONFIG_SYNCLINK_CS is not set
-+# CONFIG_CARDMAN_4000 is not set
-+# CONFIG_CARDMAN_4040 is not set
-+# CONFIG_IPWIRELESS is not set
-+# CONFIG_RAW_DRIVER is not set
-+# CONFIG_TCG_TPM is not set
-+CONFIG_DEVPORT=y
-+# CONFIG_I2C is not set
-+# CONFIG_SPI is not set
-+# CONFIG_W1 is not set
-+# CONFIG_POWER_SUPPLY is not set
-+# CONFIG_HWMON is not set
-+# CONFIG_THERMAL is not set
-+# CONFIG_THERMAL_HWMON is not set
-+# CONFIG_WATCHDOG is not set
-+
-+#
-+# Sonics Silicon Backplane
-+#
-+CONFIG_SSB_POSSIBLE=y
-+# CONFIG_SSB is not set
-+
-+#
-+# Multifunction device drivers
-+#
-+# CONFIG_MFD_CORE is not set
-+# CONFIG_MFD_SM501 is not set
-+# CONFIG_HTC_PASIC3 is not set
-+# CONFIG_MFD_TMIO is not set
-+
-+#
-+# Multimedia devices
-+#
-+
-+#
-+# Multimedia core support
-+#
-+# CONFIG_VIDEO_DEV is not set
-+# CONFIG_DVB_CORE is not set
-+# CONFIG_VIDEO_MEDIA is not set
-+
-+#
-+# Multimedia drivers
-+#
-+# CONFIG_DAB is not set
-+
-+#
-+# Graphics support
-+#
-+# CONFIG_DRM is not set
-+# CONFIG_VGASTATE is not set
-+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
-+# CONFIG_FB is not set
-+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
-+
-+#
-+# Display device support
-+#
-+CONFIG_DISPLAY_SUPPORT=y
-+
-+#
-+# Display hardware drivers
-+#
-+# CONFIG_SOUND is not set
-+CONFIG_USB_SUPPORT=y
-+CONFIG_USB_ARCH_HAS_HCD=y
-+CONFIG_USB_ARCH_HAS_OHCI=y
-+CONFIG_USB_ARCH_HAS_EHCI=y
-+CONFIG_USB=y
-+# CONFIG_USB_DEBUG is not set
-+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
-+
-+#
-+# Miscellaneous USB options
-+#
-+# CONFIG_USB_DEVICEFS is not set
-+# CONFIG_USB_DEVICE_CLASS is not set
-+# CONFIG_USB_DYNAMIC_MINORS is not set
-+# CONFIG_USB_OTG is not set
-+# CONFIG_USB_OTG_WHITELIST is not set
-+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
-+# CONFIG_USB_MON is not set
-+
-+#
-+# USB Host Controller Drivers
-+#
-+# CONFIG_USB_C67X00_HCD is not set
-+CONFIG_USB_EHCI_HCD=y
-+# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
-+# CONFIG_USB_EHCI_TT_NEWSCHED is not set
-+CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y
-+# CONFIG_USB_ISP116X_HCD is not set
-+# CONFIG_USB_ISP1760_HCD is not set
-+CONFIG_USB_OHCI_HCD=y
-+CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y
-+CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y
-+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
-+# CONFIG_USB_UHCI_HCD is not set
-+# CONFIG_USB_SL811_HCD is not set
-+# CONFIG_USB_R8A66597_HCD is not set
-+
-+#
-+# USB Device Class drivers
-+#
-+# CONFIG_USB_ACM is not set
-+# CONFIG_USB_PRINTER is not set
-+# CONFIG_USB_WDM is not set
-+
-+#
-+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
-+#
-+
-+#
-+# may also be needed; see USB_STORAGE Help for more information
-+#
-+# CONFIG_USB_LIBUSUAL is not set
-+
-+#
-+# USB Imaging devices
-+#
-+# CONFIG_USB_MDC800 is not set
-+
-+#
-+# USB port drivers
-+#
-+# CONFIG_USB_SERIAL is not set
-+
-+#
-+# USB Miscellaneous drivers
-+#
-+# CONFIG_USB_EMI62 is not set
-+# CONFIG_USB_EMI26 is not set
-+# CONFIG_USB_ADUTUX is not set
-+# CONFIG_USB_RIO500 is not set
-+# CONFIG_USB_LEGOTOWER is not set
-+# CONFIG_USB_LCD is not set
-+# CONFIG_USB_BERRY_CHARGE is not set
-+# CONFIG_USB_LED is not set
-+# CONFIG_USB_CYPRESS_CY7C63 is not set
-+# CONFIG_USB_CYTHERM is not set
-+# CONFIG_USB_PHIDGET is not set
-+# CONFIG_USB_IDMOUSE is not set
-+# CONFIG_USB_FTDI_ELAN is not set
-+# CONFIG_USB_APPLEDISPLAY is not set
-+# CONFIG_USB_SISUSBVGA is not set
-+# CONFIG_USB_LD is not set
-+# CONFIG_USB_TRANCEVIBRATOR is not set
-+# CONFIG_USB_IOWARRIOR is not set
-+# CONFIG_USB_ISIGHTFW is not set
-+# CONFIG_USB_GADGET is not set
-+# CONFIG_MMC is not set
-+# CONFIG_MEMSTICK is not set
-+# CONFIG_NEW_LEDS is not set
-+# CONFIG_ACCESSIBILITY is not set
-+# CONFIG_INFINIBAND is not set
-+CONFIG_RTC_LIB=y
-+# CONFIG_RTC_CLASS is not set
-+# CONFIG_DMADEVICES is not set
-+# CONFIG_UIO is not set
-+
-+#
-+# File systems
-+#
-+# CONFIG_EXT2_FS is not set
-+# CONFIG_EXT3_FS is not set
-+# CONFIG_EXT4DEV_FS is not set
-+# CONFIG_REISERFS_FS is not set
-+# CONFIG_JFS_FS is not set
-+# CONFIG_FS_POSIX_ACL is not set
-+# CONFIG_XFS_FS is not set
-+# CONFIG_OCFS2_FS is not set
-+# CONFIG_DNOTIFY is not set
-+# CONFIG_INOTIFY is not set
-+# CONFIG_QUOTA is not set
-+# CONFIG_AUTOFS_FS is not set
-+# CONFIG_AUTOFS4_FS is not set
-+# CONFIG_FUSE_FS is not set
-+
-+#
-+# CD-ROM/DVD Filesystems
-+#
-+# CONFIG_ISO9660_FS is not set
-+# CONFIG_UDF_FS is not set
-+
-+#
-+# DOS/FAT/NT Filesystems
-+#
-+# CONFIG_MSDOS_FS is not set
-+# CONFIG_VFAT_FS is not set
-+# CONFIG_NTFS_FS is not set
-+
-+#
-+# Pseudo filesystems
-+#
-+CONFIG_PROC_FS=y
-+CONFIG_PROC_KCORE=y
-+CONFIG_PROC_SYSCTL=y
-+CONFIG_SYSFS=y
-+CONFIG_TMPFS=y
-+# CONFIG_TMPFS_POSIX_ACL is not set
-+# CONFIG_HUGETLB_PAGE is not set
-+# CONFIG_CONFIGFS_FS is not set
-+
-+#
-+# Miscellaneous filesystems
-+#
-+# CONFIG_ADFS_FS is not set
-+# CONFIG_AFFS_FS is not set
-+# CONFIG_HFS_FS is not set
-+# CONFIG_HFSPLUS_FS is not set
-+# CONFIG_BEFS_FS is not set
-+# CONFIG_BFS_FS is not set
-+# CONFIG_EFS_FS is not set
-+# CONFIG_JFFS2_FS is not set
-+# CONFIG_CRAMFS is not set
-+# CONFIG_VXFS_FS is not set
-+# CONFIG_MINIX_FS is not set
-+# CONFIG_OMFS_FS is not set
-+# CONFIG_HPFS_FS is not set
-+# CONFIG_QNX4FS_FS is not set
-+# CONFIG_ROMFS_FS is not set
-+# CONFIG_SYSV_FS is not set
-+# CONFIG_UFS_FS is not set
-+# CONFIG_NETWORK_FILESYSTEMS is not set
-+
-+#
-+# Partition Types
-+#
-+# CONFIG_PARTITION_ADVANCED is not set
-+CONFIG_MSDOS_PARTITION=y
-+# CONFIG_NLS is not set
-+# CONFIG_DLM is not set
-+
-+#
-+# Kernel hacking
-+#
-+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
-+# CONFIG_PRINTK_TIME is not set
-+CONFIG_ENABLE_WARN_DEPRECATED=y
-+CONFIG_ENABLE_MUST_CHECK=y
-+CONFIG_FRAME_WARN=1024
-+CONFIG_MAGIC_SYSRQ=y
-+# CONFIG_UNUSED_SYMBOLS is not set
-+# CONFIG_DEBUG_FS is not set
-+# CONFIG_HEADERS_CHECK is not set
-+# CONFIG_DEBUG_KERNEL is not set
-+# CONFIG_DEBUG_MEMORY_INIT is not set
-+CONFIG_SYSCTL_SYSCALL_CHECK=y
-+# CONFIG_SAMPLES is not set
-+CONFIG_HAVE_ARCH_KGDB=y
-+CONFIG_CMDLINE="console=ttyS0,115200"
-+
-+#
-+# Security options
-+#
-+# CONFIG_KEYS is not set
-+# CONFIG_SECURITY is not set
-+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
-+# CONFIG_CRYPTO is not set
-+
-+#
-+# Library routines
-+#
-+CONFIG_BITREVERSE=y
-+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
-+# CONFIG_CRC_CCITT is not set
-+# CONFIG_CRC16 is not set
-+# CONFIG_CRC_T10DIF is not set
-+# CONFIG_CRC_ITU_T is not set
-+CONFIG_CRC32=y
-+# CONFIG_CRC7 is not set
-+# CONFIG_LIBCRC32C is not set
-+CONFIG_HAS_IOMEM=y
-+CONFIG_HAS_IOPORT=y
-+CONFIG_HAS_DMA=y

target/linux/brcm63xx/patches-2.6.27/013-bcm96358vw.patch

@@ -1,41 +0,0 @@
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -68,6 +68,30 @@ static struct board_info __initdata boar
-  * known 6358 boards
-  */
- #ifdef CONFIG_BCM63XX_CPU_6358
-+static struct board_info __initdata board_96358vw = {
-+	.name				= "96358VW",
-+	.expected_cpu_id		= 0x6358,
-+
-+	.has_enet0			= 1,
-+	.has_enet1			= 1,
-+	.has_pci			= 1,
-+
-+	.enet0 = {
-+		.has_phy		= 1,
-+		.use_internal_phy	= 1,
-+	},
-+
-+	.enet1 = {
-+		.force_speed_100	= 1,
-+		.force_duplex_full	= 1,
-+	},
-+
-+
-+	.has_ohci0 = 1,
-+	.has_pccard = 1,
-+	.has_ehci0 = 1,
-+};
-+
- static struct board_info __initdata board_96358vw2 = {
- 	.name				= "96358VW2",
- 	.expected_cpu_id		= 0x6358,
-@@ -103,6 +127,7 @@ static const struct board_info __initdat
- #endif
- 
- #ifdef CONFIG_BCM63XX_CPU_6358
-+	&board_96358vw,
- 	&board_96358vw2,
- #endif
- };

target/linux/brcm63xx/patches-2.6.27/014-inventel_livebox.patch

@@ -1,192 +0,0 @@
---- a/arch/mips/bcm63xx/boards/Kconfig
-+++ b/arch/mips/bcm63xx/boards/Kconfig
-@@ -7,4 +7,9 @@ config BOARD_BCM963XX
-        bool "Generic Broadcom 963xx boards"
-        help
- 
-+config BOARD_LIVEBOX
-+	bool "Inventel Livebox(es) boards"
-+	help
-+	  Boards using RedBoot.
-+
- endchoice
---- a/arch/mips/bcm63xx/boards/Makefile
-+++ b/arch/mips/bcm63xx/boards/Makefile
-@@ -1 +1,2 @@
- obj-$(CONFIG_BOARD_BCM963XX)		+= board_bcm963xx.o
-+obj-$(CONFIG_BOARD_LIVEBOX)		+= board_livebox.o
---- /dev/null
-+++ b/arch/mips/bcm63xx/boards/board_livebox.c
-@@ -0,0 +1,172 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/string.h>
-+#include <linux/platform_device.h>
-+#include <linux/mtd/mtd.h>
-+#include <linux/mtd/partitions.h>
-+#include <linux/mtd/physmap.h>
-+#include <asm/addrspace.h>
-+#include <bcm63xx_board.h>
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_regs.h>
-+#include <bcm63xx_io.h>
-+#include <bcm63xx_board.h>
-+#include <bcm63xx_dev_pci.h>
-+#include <bcm63xx_dev_uart.h>
-+#include <bcm63xx_dev_enet.h>
-+#include <bcm63xx_dev_pcmcia.h>
-+#include <bcm63xx_dev_usb_ohci.h>
-+#include <bcm63xx_dev_usb_ehci.h>
-+#include <board_bcm963xx.h>
-+
-+#define PFX	"board_livebox: "
-+
-+static unsigned int mac_addr_used = 0;
-+static struct board_info board;
-+
-+/*
-+ * known 6348 boards
-+ */
-+#ifdef CONFIG_BCM63XX_CPU_6348
-+static struct board_info __initdata board_livebox = {
-+	.name				= "Livebox",
-+	.expected_cpu_id		= 0x6348,
-+
-+	.has_enet0			= 1,
-+	.has_pci			= 1,
-+
-+	.enet0 = {
-+		.has_phy		= 1,
-+		.use_internal_phy	= 1,
-+	},
-+};
-+#endif
-+
-+/*
-+ * all boards
-+ */
-+static const struct board_info __initdata *bcm963xx_boards[] = {
-+#ifdef CONFIG_BCM63XX_CPU_6348
-+	&board_livebox
-+#endif
-+};
-+
-+/*
-+ * early init callback
-+ */
-+void __init board_prom_init(void)
-+{
-+	u32 val;
-+
-+	/* read base address of boot chip select (0) */
-+	val = bcm_mpi_readl(MPI_CSBASE_REG(0));
-+	val &= MPI_CSBASE_BASE_MASK;
-+
-+	/* assume board is a Livebox */
-+	memcpy(&board, bcm963xx_boards[0], sizeof(board));
-+
-+	/* setup pin multiplexing depending on board enabled device,
-+	 * this has to be done this early since PCI init is done
-+	 * inside arch_initcall */
-+	val = 0;
-+
-+	if (board.has_pci) {
-+		bcm63xx_pci_enabled = 1;
-+		if (BCMCPU_IS_6348())
-+			val |= GPIO_MODE_6348_G2_PCI;
-+	}
-+
-+	if (board.has_pccard) {
-+		if (BCMCPU_IS_6348())
-+			val |= GPIO_MODE_6348_G1_MII_PCCARD;
-+	}
-+
-+	if (board.has_enet0 && !board.enet0.use_internal_phy) {
-+		if (BCMCPU_IS_6348())
-+			val |= GPIO_MODE_6348_G3_EXT_MII |
-+				GPIO_MODE_6348_G0_EXT_MII;
-+	}
-+
-+	if (board.has_enet1 && !board.enet1.use_internal_phy) {
-+		if (BCMCPU_IS_6348())
-+			val |= GPIO_MODE_6348_G3_EXT_MII |
-+				GPIO_MODE_6348_G0_EXT_MII;
-+	}
-+
-+	bcm_gpio_writel(val, GPIO_MODE_REG);
-+}
-+
-+/*
-+ * second stage init callback, good time to panic if we couldn't
-+ * identify on which board we're running since early printk is working
-+ */
-+void __init board_setup(void)
-+{
-+	if (!board.name[0])
-+		panic("unable to detect bcm963xx board");
-+	printk(KERN_INFO PFX "board name: %s\n", board.name);
-+
-+	/* make sure we're running on expected cpu */
-+	if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
-+		panic("unexpected CPU for bcm963xx board");
-+}
-+
-+/*
-+ * return board name for /proc/cpuinfo
-+ */
-+const char *board_get_name(void)
-+{
-+	return board.name;
-+}
-+
-+/*
-+ * register & return a new board mac address
-+ */
-+static int board_get_mac_address(u8 *mac)
-+{
-+	/* Not yet implemented */
-+	return 0;
-+}
-+
-+/*
-+ * third stage init callback, register all board devices.
-+ */
-+int __init board_register_devices(void)
-+{
-+	u32 val;
-+
-+	bcm63xx_uart_register();
-+
-+	if (board.has_pccard)
-+		bcm63xx_pcmcia_register();
-+
-+	if (board.has_enet0 &&
-+	    !board_get_mac_address(board.enet0.mac_addr))
-+		bcm63xx_enet_register(0, &board.enet0);
-+
-+	if (board.has_enet1 &&
-+	    !board_get_mac_address(board.enet1.mac_addr))
-+		bcm63xx_enet_register(1, &board.enet1);
-+
-+	if (board.has_ohci0)
-+		bcm63xx_ohci_register();
-+
-+	if (board.has_ehci0)
-+		bcm63xx_ehci_register();
-+
-+
-+	/* read base address of boot chip select (0) */
-+	val = bcm_mpi_readl(MPI_CSBASE_REG(0));
-+	val &= MPI_CSBASE_BASE_MASK;
-+
-+	return 0;
-+}
-+