[adm5120] experimental support for 2.6.27

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@12863 3c298f89-4303-0410-b956-a3cf2f4a3e73
2025-04-21 12:27:27 +03:00 · 2008-10-05 11:07:49 +00:00
parent 7bab42f05f
commit b06573b702
115 changed files with 1602 additions and 0 deletions
--- a/target/linux/adm5120/patches-2.6.27/001-adm5120.patch
+++ b/target/linux/adm5120/patches-2.6.27/001-adm5120.patch
@@ -0,0 +1,113 @@
+--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
+@@ -19,6 +19,20 @@
+ 	prompt "System type"
+ 	default SGI_IP22
+ 
+config ADM5120
+	bool "Infineon/ADMtek ADM5120 SoC based machines"
+	select CEVT_R4K
+	select CSRC_R4K
+	select SYS_HAS_CPU_MIPS32_R1
+	select SYS_HAS_EARLY_PRINTK
+	select DMA_NONCOHERENT
+	select IRQ_CPU
+	select SYS_SUPPORTS_LITTLE_ENDIAN
+	select SYS_SUPPORTS_BIG_ENDIAN
+	select SYS_SUPPORTS_32BIT_KERNEL
+	select ARCH_REQUIRE_GPIOLIB
+	select SWAP_IO_SPACE if CPU_BIG_ENDIAN
+
+ config MACH_ALCHEMY
+ 	bool "Alchemy processor based machines"
+ 
+@@ -597,6 +611,7 @@
+ 
+ endchoice
+ 
+source "arch/mips/adm5120/Kconfig"
+ source "arch/mips/au1000/Kconfig"
+ source "arch/mips/basler/excite/Kconfig"
+ source "arch/mips/jazz/Kconfig"
+--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
+@@ -174,6 +174,21 @@
+ load-$(CONFIG_MACH_JAZZ)	+= 0xffffffff80080000
+ 
+ #
+# Infineon/ADMtek ADM5120
+#
+libs-$(CONFIG_ADM5120)			+= arch/mips/adm5120/prom/
+core-$(CONFIG_ADM5120)			+= arch/mips/adm5120/common/
+core-$(CONFIG_ADM5120_OEM_CELLVISION)	+= arch/mips/adm5120/cellvision/
+core-$(CONFIG_ADM5120_OEM_COMPEX)	+= arch/mips/adm5120/compex/
+core-$(CONFIG_ADM5120_OEM_EDIMAX)	+= arch/mips/adm5120/edimax/
+core-$(CONFIG_ADM5120_OEM_INFINEON)	+= arch/mips/adm5120/infineon/
+core-$(CONFIG_ADM5120_OEM_MIKROTIK)	+= arch/mips/adm5120/mikrotik/
+core-$(CONFIG_ADM5120_OEM_MOTOROLA)	+= arch/mips/adm5120/motorola/
+core-$(CONFIG_ADM5120_OEM_ZYXEL)	+= arch/mips/adm5120/zyxel/
+cflags-$(CONFIG_ADM5120)		+= -Iinclude/asm-mips/mach-adm5120
+load-$(CONFIG_ADM5120)			+= 0xffffffff80001000
+
+#
+ # Common Alchemy Au1x00 stuff
+ #
+ core-$(CONFIG_SOC_AU1X00)	+= arch/mips/au1000/common/
+--- a/include/asm-mips/bootinfo.h
+++ b/include/asm-mips/bootinfo.h
+@@ -57,6 +57,55 @@
+ #define	MACH_MIKROTIK_RB532	0	/* Mikrotik RouterBoard 532 	*/
+ #define MACH_MIKROTIK_RB532A	1	/* Mikrotik RouterBoard 532A 	*/
+ 
+/*
+ * Valid machtype for group ADM5120
+ */
+#define MACH_ADM5120_GENERIC	0	/* Generic board */
+#define MACH_ADM5120_WP54G_WRT	1	/* Compex WP54G-WRT */
+#define MACH_ADM5120_WP54	2	/* Compex WP54G/WP54AG/WPP54G/WPP54AG */
+#define MACH_ADM5120_NP28G	3	/* Compex NP28G */
+#define MACH_ADM5120_NP28GHS	4	/* Compex NP28G HotSpot */
+#define MACH_ADM5120_NP27G	5	/* Compex NP27G */
+#define MACH_ADM5120_WP54Gv1C	6	/* Compex WP54G version 1C */
+#define MACH_ADM5120_RB_11X	7	/* Mikrotik RouterBOARD 111/112 */
+#define MACH_ADM5120_RB_133	8	/* Mikrotik RouterBOARD 133 */
+#define MACH_ADM5120_RB_133C	9	/* Mikrotik RouterBOARD 133c */
+#define MACH_ADM5120_RB_150	10	/* Mikrotik RouterBOARD 150 */
+#define MACH_ADM5120_RB_153	11	/* Mikrotik RouterBOARD 153 */
+#define MACH_ADM5120_RB_192	12	/* Mikrotik RouterBOARD 192 */
+#define MACH_ADM5120_HS100	13	/* ZyXEL HomeSafe 100/100W */
+#define MACH_ADM5120_P334U	14	/* ZyXEL Prestige 334U */
+#define MACH_ADM5120_P334W	15	/* ZyXEL Prestige 334W */
+#define MACH_ADM5120_P334WH	16	/* ZyXEL Prestige 334WH */
+#define MACH_ADM5120_P334WHD	17	/* ZyXEL Prestige 334WHD */
+#define MACH_ADM5120_P334WT	18	/* ZyXEL Prestige 334WT */
+#define MACH_ADM5120_P335	19	/* ZyXEL Prestige 335/335WT */
+#define MACH_ADM5120_P335PLUS	20	/* ZyXEL Prestige 335Plus */
+#define MACH_ADM5120_P335U	21	/* ZyXEL Prestige 335U */
+#define MACH_ADM5120_ES2108	22	/* ZyXEL Ethernet Switch 2108 */
+#define MACH_ADM5120_ES2108F	23	/* ZyXEL Ethernet Switch 2108-F */
+#define MACH_ADM5120_ES2108G	24	/* ZyXEL Ethernet Switch 2108-G */
+#define MACH_ADM5120_ES2108LC	25	/* ZyXEL Ethernet Switch 2108-LC */
+#define MACH_ADM5120_ES2108PWR	26	/* ZyXEL Ethernet Switch 2108-PWR */
+#define MACH_ADM5120_ES2024A	27	/* ZyXEL Ethernet Switch 2024A */
+#define MACH_ADM5120_ES2024PWR	28	/* ZyXEL Ethernet Switch 2024PWR */
+#define MACH_ADM5120_CAS630	29	/* Cellvision CAS-630/630W */
+#define MACH_ADM5120_CAS670	30	/* Cellvision CAS-670/670W */
+#define MACH_ADM5120_CAS700	31	/* Cellvision CAS-700/700W */
+#define MACH_ADM5120_CAS771	32	/* Cellvision CAS-771/771W */
+#define MACH_ADM5120_CAS790	33	/* Cellvision CAS-790 */
+#define MACH_ADM5120_CAS861	34	/* Cellvision CAS-861/861W */
+#define MACH_ADM5120_NFS101U	35	/* Cellvision NFS-101U/101WU */
+#define MACH_ADM5120_NFS202U	36	/* Cellvision NFS-202U/202WU */
+#define MACH_ADM5120_EASY5120PATA 37	/* Infineon EASY 5120P-ATA */
+#define MACH_ADM5120_EASY5120RT 38	/* Infineon EASY 5120-RT */
+#define MACH_ADM5120_EASY5120WVOIP 39	/* Infineon EASY 5120-WVoIP */
+#define MACH_ADM5120_EASY83000	40	/* Infineon EASY-83000 */
+#define MACH_ADM5120_BR6104K	41	/* Edimax BR-6104K */
+#define MACH_ADM5120_BR6104KP	42	/* Edimax BR-6104KP */
+#define MACH_ADM5120_BR61X4WG	43	/* Edimax BR-6104Wg/BR-6114WG */
+#define MACH_ADM5120_PMUGW	44	/* Motorola Powerline MU Gateway */
+
+ #define CL_SIZE			COMMAND_LINE_SIZE
+ 
+ extern char *system_type;
--- a/target/linux/adm5120/patches-2.6.27/002-adm5120_flash.patch
+++ b/target/linux/adm5120/patches-2.6.27/002-adm5120_flash.patch
@@ -0,0 +1,22 @@
+--- a/drivers/mtd/maps/Kconfig
+++ b/drivers/mtd/maps/Kconfig
+@@ -571,5 +571,9 @@
+ 
+ 	  This selection automatically selects the map_ram driver.
+ 
+config MTD_ADM5120
+	tristate "Map driver for ADM5120 based boards"
+	depends on ADM5120
+
+ endmenu
+ 
+--- a/drivers/mtd/maps/Makefile
+++ b/drivers/mtd/maps/Makefile
+@@ -42,6 +42,7 @@
+ obj-$(CONFIG_MTD_SOLUTIONENGINE)+= solutionengine.o
+ obj-$(CONFIG_MTD_PCI)		+= pci.o
+ obj-$(CONFIG_MTD_ALCHEMY)       += alchemy-flash.o
+obj-$(CONFIG_MTD_ADM5120)      	+= adm5120-flash.o
+ obj-$(CONFIG_MTD_AUTCPU12)	+= autcpu12-nvram.o
+ obj-$(CONFIG_MTD_EDB7312)	+= edb7312.o
+ obj-$(CONFIG_MTD_IMPA7)		+= impa7.o
--- a/target/linux/adm5120/patches-2.6.27/003-adm5120_switch.patch
+++ b/target/linux/adm5120/patches-2.6.27/003-adm5120_switch.patch
@@ -0,0 +1,23 @@
+--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
+@@ -596,6 +596,10 @@
+ 	  If you have an Alchemy Semi AU1X00 based system
+ 	  say Y.  Otherwise, say N.
+ 
+config ADM5120_ENET
+	tristate "ADM5120 Ethernet switch support"
+	depends on ADM5120
+
+ config SGI_IOC3_ETH
+ 	bool "SGI IOC3 Ethernet"
+ 	depends on PCI && SGI_IP27
+--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
+@@ -187,6 +187,7 @@
+ # This is also a 82596 and should probably be merged
+ obj-$(CONFIG_LP486E) += lp486e.o
+ 
+obj-$(CONFIG_ADM5120_ENET) += adm5120sw.o
+ obj-$(CONFIG_ETH16I) += eth16i.o
+ obj-$(CONFIG_ZORRO8390) += zorro8390.o
+ obj-$(CONFIG_HPLANCE) += hplance.o 7990.o
--- a/target/linux/adm5120/patches-2.6.27/005-adm5120_usb.patch
+++ b/target/linux/adm5120/patches-2.6.27/005-adm5120_usb.patch
@@ -0,0 +1,33 @@
+--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
+@@ -4,6 +4,10 @@
+ comment "USB Host Controller Drivers"
+ 	depends on USB
+ 
+config USB_ADM5120_HCD
+	tristate "ADM5120 HCD support (EXPERIMENTAL)"
+	depends on USB && ADM5120 && EXPERIMENTAL
+
+ config USB_C67X00_HCD
+ 	tristate "Cypress C67x00 HCD support"
+ 	depends on USB
+--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
+@@ -10,6 +10,7 @@
+ 
+ obj-$(CONFIG_PCI)		+= pci-quirks.o
+ 
+obj-$(CONFIG_USB_ADM5120_HCD)	+= adm5120-hcd.o
+ obj-$(CONFIG_USB_EHCI_HCD)	+= ehci-hcd.o
+ obj-$(CONFIG_USB_ISP116X_HCD)	+= isp116x-hcd.o
+ obj-$(CONFIG_USB_OHCI_HCD)	+= ohci-hcd.o
+--- a/drivers/usb/Makefile
+++ b/drivers/usb/Makefile
+@@ -16,6 +16,7 @@
+ obj-$(CONFIG_USB_SL811_HCD)	+= host/
+ obj-$(CONFIG_USB_U132_HCD)	+= host/
+ obj-$(CONFIG_USB_R8A66597_HCD)	+= host/
+obj-$(CONFIG_USB_ADM5120_HCD)  	+= host/
+ 
+ obj-$(CONFIG_USB_C67X00_HCD)	+= c67x00/
+ 
--- a/target/linux/adm5120/patches-2.6.27/007-adm5120_pci.patch
+++ b/target/linux/adm5120/patches-2.6.27/007-adm5120_pci.patch
@@ -0,0 +1,19 @@
+--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
+@@ -51,3 +51,4 @@
+ obj-$(CONFIG_ZAO_CAPCELLA)	+= fixup-capcella.o
+ obj-$(CONFIG_WR_PPMC)		+= fixup-wrppmc.o
+ obj-$(CONFIG_MIKROTIK_RB532)	+= pci-rc32434.o ops-rc32434.o fixup-rc32434.o
+obj-$(CONFIG_ADM5120)		+= pci-adm5120.o
+--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
+@@ -1708,6 +1708,9 @@
+ #define PCI_VENDOR_ID_ESDGMBH		0x12fe
+ #define PCI_DEVICE_ID_ESDGMBH_CPCIASIO4 0x0111
+ 
+#define PCI_VENDOR_ID_ADMTEK		0x1317
+#define PCI_DEVICE_ID_ADMTEK_ADM5120	0x5120
+
+ #define PCI_VENDOR_ID_SIIG		0x131f
+ #define PCI_SUBVENDOR_ID_SIIG		0x131f
+ #define PCI_DEVICE_ID_SIIG_1S_10x_550	0x1000
--- a/target/linux/adm5120/patches-2.6.27/009-adm5120_leds_switch_trigger.patch
+++ b/target/linux/adm5120/patches-2.6.27/009-adm5120_leds_switch_trigger.patch
@@ -0,0 +1,22 @@
+--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
+@@ -223,4 +223,12 @@
+ 	  This allows LEDs to be controlled by network device activity.
+ 	  If unsure, say Y.
+ 
+config LEDS_TRIGGER_ADM5120_SWITCH
+	tristate "LED ADM5120 Switch Port Status Trigger"
+	depends on LEDS_TRIGGERS && ADM5120
+	help
+	  This allows LEDs to be controlled by the port states of
+	  the ADM5120 built-in Ethernet Switch
+	  If unsure, say N.
+
+ endif # NEW_LEDS
+--- a/drivers/leds/Makefile
+++ b/drivers/leds/Makefile
+@@ -32,3 +32,4 @@
+ obj-$(CONFIG_LEDS_TRIGGER_DEFAULT_ON)	+= ledtrig-default-on.o
+ obj-$(CONFIG_LEDS_TRIGGER_MORSE)	+= ledtrig-morse.o
+ obj-$(CONFIG_LEDS_TRIGGER_NETDEV)      += ledtrig-netdev.o
+obj-$(CONFIG_LEDS_TRIGGER_ADM5120_SWITCH) += ledtrig-adm5120-switch.o
--- a/target/linux/adm5120/patches-2.6.27/100-mtd_myloder_partition_parser.patch
+++ b/target/linux/adm5120/patches-2.6.27/100-mtd_myloder_partition_parser.patch
@@ -0,0 +1,35 @@
+--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
+@@ -172,6 +172,22 @@
+ 	---help---
+ 	  TI AR7 partitioning support
+ 
+config MTD_MYLOADER_PARTS
+	tristate "MyLoader partition parsing"
+	depends on ADM5120 && MTD_PARTITIONS
+	---help---
+	  MyLoader is a bootloader which allows the user to define partitions
+	  in flash devices, by putting a table in the second erase block
+	  on the device, similar to a partition table. This table gives the 
+	  offsets and lengths of the user defined partitions.
+
+	  If you need code which can detect and parse these tables, and
+	  register MTD 'partitions' corresponding to each image detected,
+	  enable this option.
+
+	  You will still need the parsing functions to be called by the driver
+	  for your particular device. It won't happen automatically.
+
+ comment "User Modules And Translation Layers"
+ 
+ config MTD_CHAR
+--- a/drivers/mtd/Makefile
+++ b/drivers/mtd/Makefile
+@@ -13,6 +13,7 @@
+ obj-$(CONFIG_MTD_AFS_PARTS)	+= afs.o
+ obj-$(CONFIG_MTD_AR7_PARTS)	+= ar7part.o
+ obj-$(CONFIG_MTD_OF_PARTS)      += ofpart.o
+obj-$(CONFIG_MTD_MYLOADER_PARTS) += myloader.o
+ 
+ # 'Users' - code which presents functionality to userspace.
+ obj-$(CONFIG_MTD_CHAR)		+= mtdchar.o
--- a/target/linux/adm5120/patches-2.6.27/101-cfi_fixup_macronix_bootloc.patch
+++ b/target/linux/adm5120/patches-2.6.27/101-cfi_fixup_macronix_bootloc.patch
@@ -0,0 +1,91 @@
+--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
+@@ -44,12 +44,19 @@
+ #define MANUFACTURER_AMD	0x0001
+ #define MANUFACTURER_ATMEL	0x001F
+ #define MANUFACTURER_SST	0x00BF
+#define MANUFACTURER_MACRONIX	0x00C2
+ #define SST49LF004B	        0x0060
+ #define SST49LF040B	        0x0050
+ #define SST49LF008A		0x005a
+ #define AT49BV6416		0x00d6
+ #define MANUFACTURER_SAMSUNG	0x00ec
+ 
+/* Macronix */
+#define MX29LV160B	0x2249	/* MX29LV160 Bottom-boot chip */
+#define MX29LV160T	0x22C4	/* MX29LV160 Top-boot chip */
+#define MX29LV320B	0x22A8	/* MX29LV320 Bottom-boot chip */
+#define MX29LV320T	0x22A7	/* MX29LV320 Top-boot chip */
+
+ static int cfi_amdstd_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
+ static int cfi_amdstd_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
+ static int cfi_amdstd_write_buffers(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
+@@ -240,6 +247,41 @@
+ 	}
+ }
+ 
+#ifdef CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC
+/*
+ * Some Macronix chips has no/bad bootblock information in the CFI table
+ */
+static void fixup_macronix_bootloc(struct mtd_info *mtd, void* param)
+{
+	struct map_info *map = mtd->priv;
+	struct cfi_private *cfi = map->fldrv_priv;
+	struct cfi_pri_amdstd *extp = cfi->cmdset_priv;
+	__u8 t;
+
+	switch (cfi->id) {
+	/* TODO: put affected chip ids here */
+	case MX29LV160B:
+	case MX29LV320B:
+		t = 2;	/* Bottom boot */
+		break;
+	case MX29LV160T:
+	case MX29LV320T:
+		t = 3;	/* Top boot */
+		break;
+	default:
+		return;
+	}
+
+	if (extp->TopBottom == t)
+		/* boot location detected by the CFI layer is correct */
+		return;
+
+	extp->TopBottom = t;
+	printk("%s: Macronix chip detected, id:0x%04X, boot location forced "
+		"to %s\n", map->name, cfi->id, (t == 2) ? "bottom" : "top");
+}
+#endif /* CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC */
+
+ static struct cfi_fixup cfi_fixup_table[] = {
+ 	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
+ #ifdef AMD_BOOTLOC_BUG
+@@ -275,6 +317,9 @@
+ 	 */
+ 	{ CFI_MFR_ANY, CFI_ID_ANY, fixup_use_erase_chip, NULL },
+ 	{ CFI_MFR_ATMEL, AT49BV6416, fixup_use_atmel_lock, NULL },
+#ifdef CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC
+	{ MANUFACTURER_MACRONIX, CFI_ID_ANY, fixup_macronix_bootloc, NULL, },
+#endif
+ 	{ 0, 0, NULL, NULL }
+ };
+ 
+--- a/drivers/mtd/chips/Kconfig
+++ b/drivers/mtd/chips/Kconfig
+@@ -196,6 +196,14 @@
+ 	  provides support for one of those command sets, used on chips
+ 	  including the AMD Am29LV320.
+ 
+config MTD_CFI_FIXUP_MACRONIX_BOOTLOC
+	bool "Fix boot-block location for Macronix flash chips"
+	depends on MTD_CFI_AMDSTD
+	help
+	  Some Macronix flash chips have no/wrong boot-block location in the
+	  CFI table, and the driver may detect the type incorrectly. Select
+	  this if your board has such chip.
+
+ config MTD_CFI_STAA
+ 	tristate "Support for ST (Advanced Architecture) flash chips"
+ 	depends on MTD_GEN_PROBE
--- a/target/linux/adm5120/patches-2.6.27/102-jedec_pmc_39lvxxx_chips.patch
+++ b/target/linux/adm5120/patches-2.6.27/102-jedec_pmc_39lvxxx_chips.patch
@@ -0,0 +1,68 @@
+--- a/drivers/mtd/chips/jedec_probe.c
+++ b/drivers/mtd/chips/jedec_probe.c
+@@ -128,6 +128,10 @@
+ #define UPD29F064115	0x221C
+ 
+ /* PMC */
+#define PM39LV512	0x001B
+#define PM39LV010	0x001C
+#define PM39LV020	0x003D
+#define PM39LV040	0x003E
+ #define PM49FL002	0x006D
+ #define PM49FL004	0x006E
+ #define PM49FL008	0x006A
+@@ -1248,6 +1252,54 @@
+ 			ERASEINFO(0x02000,2),
+ 			ERASEINFO(0x04000,1),
+ 		}
+        }, {
+		.mfr_id		= MANUFACTURER_PMC,
+		.dev_id		= PM39LV512,
+		.name		= "PMC Pm39LV512",
+		.devtypes	= CFI_DEVICETYPE_X8,
+		.uaddr		= MTD_UADDR_0x0555_0x02AA,
+		.dev_size	= SIZE_64KiB,
+		.cmd_set	= P_ID_AMD_STD,
+		.nr_regions	= 1,
+		.regions	= {
+			ERASEINFO(0x01000,16),
+		}
+        }, {
+		.mfr_id		= MANUFACTURER_PMC,
+		.dev_id		= PM39LV010,
+		.name		= "PMC Pm39LV010",
+		.devtypes	= CFI_DEVICETYPE_X8,
+		.uaddr		= MTD_UADDR_0x0555_0x02AA,
+		.dev_size	= SIZE_128KiB,
+		.cmd_set	= P_ID_AMD_STD,
+		.nr_regions	= 1,
+		.regions	= {
+			ERASEINFO(0x01000,32),
+		}
+        }, {
+		.mfr_id		= MANUFACTURER_PMC,
+		.dev_id		= PM39LV020,
+		.name		= "PMC Pm39LV020",
+		.devtypes	= CFI_DEVICETYPE_X8,
+		.uaddr		= MTD_UADDR_0x0555_0x02AA,
+		.dev_size	= SIZE_256KiB,
+		.cmd_set	= P_ID_AMD_STD,
+		.nr_regions	= 1,
+		.regions	= {
+			ERASEINFO(0x01000,64),
+		}
+        }, {
+		.mfr_id		= MANUFACTURER_PMC,
+		.dev_id		= PM39LV040,
+		.name		= "PMC Pm39LV040",
+		.devtypes	= CFI_DEVICETYPE_X8,
+		.uaddr		= MTD_UADDR_0x0555_0x02AA,
+		.dev_size	= SIZE_512KiB,
+		.cmd_set	= P_ID_AMD_STD,
+		.nr_regions	= 1,
+		.regions	= {
+			ERASEINFO(0x01000,128),
+		}
+ 	}, {
+ 		.mfr_id		= MANUFACTURER_PMC,
+ 		.dev_id		= PM49FL002,
--- a/target/linux/adm5120/patches-2.6.27/103-mtd_trxsplit.patch
+++ b/target/linux/adm5120/patches-2.6.27/103-mtd_trxsplit.patch
@@ -0,0 +1,24 @@
+--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
+@@ -55,6 +55,11 @@
+ 	depends on MTD_PARTITIONS
+ 	default y
+ 
+config MTD_TRXSPLIT
+	bool "Automatically find and split TRX partitions"
+	depends on MTD_PARTITIONS
+	default n
+
+ config MTD_REDBOOT_PARTS
+ 	tristate "RedBoot partition table parsing"
+ 	depends on MTD_PARTITIONS
+--- a/drivers/mtd/Makefile
+++ b/drivers/mtd/Makefile
+@@ -8,6 +8,7 @@
+ mtd-$(CONFIG_MTD_PARTITIONS)	+= mtdpart.o
+ 
+ obj-$(CONFIG_MTD_CONCAT)	+= mtdconcat.o
+obj-$(CONFIG_MTD_TRXSPLIT)	+= trxsplit.o
+ obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o
+ obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o
+ obj-$(CONFIG_MTD_AFS_PARTS)	+= afs.o
--- a/target/linux/adm5120/patches-2.6.27/120-rb153_cf_driver.patch
+++ b/target/linux/adm5120/patches-2.6.27/120-rb153_cf_driver.patch
@@ -0,0 +1,28 @@
+--- a/drivers/ata/Makefile
+++ b/drivers/ata/Makefile
+@@ -72,6 +72,7 @@
+ obj-$(CONFIG_PATA_PLATFORM)	+= pata_platform.o
+ obj-$(CONFIG_PATA_OF_PLATFORM)	+= pata_of_platform.o
+ obj-$(CONFIG_PATA_ICSIDE)	+= pata_icside.o
+obj-$(CONFIG_PATA_RB153_CF)	+= pata_rb153_cf.o
+ # Should be last but two libata driver
+ obj-$(CONFIG_PATA_ACPI)		+= pata_acpi.o
+ # Should be last but one libata driver
+--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
+@@ -568,6 +568,15 @@
+ 
+ 	  If unsure, say N.
+ 
+config PATA_RB153_CF
+	tristate "RouterBOARD 153 Compact Flash support"
+	depends on ADM5120_MACH_RB_153
+	help
+	  This option enables support for a Compact Flash connected on
+	  the RouterBOARD 153.
+
+	  If unsure, say N.
+
+ config PATA_RB532
+ 	tristate "RouterBoard 532 PATA CompactFlash support"
+ 	depends on MIKROTIK_RB532
--- a/target/linux/adm5120/patches-2.6.27/140-cmdline_hack.patch
+++ b/target/linux/adm5120/patches-2.6.27/140-cmdline_hack.patch
@@ -0,0 +1,15 @@
+--- a/arch/mips/kernel/head.S
+++ b/arch/mips/kernel/head.S
+@@ -126,7 +126,12 @@
+ 	/*
+ 	 * Reserved space for exception handlers.
+ 	 * Necessary for machines which link their kernels at KSEG0.
+	 * Use as temporary storage for the kernel command line, so that it
+	 * can be updated easily without having to relink the kernel.
+ 	 */
+
+EXPORT(_image_cmdline)
+	.ascii "CMDLINE:"
+ 	.fill	0x400
+ #endif
+ 
--- a/target/linux/adm5120/patches-2.6.27/200-amba_pl010_hacks.patch
+++ b/target/linux/adm5120/patches-2.6.27/200-amba_pl010_hacks.patch
@@ -0,0 +1,378 @@
+--- a/drivers/serial/amba-pl010.c
+++ b/drivers/serial/amba-pl010.c
+@@ -50,11 +50,10 @@
+ 
+ #include <asm/io.h>
+ 
+-#define UART_NR		8
+-
+ #define SERIAL_AMBA_MAJOR	204
+ #define SERIAL_AMBA_MINOR	16
+-#define SERIAL_AMBA_NR		UART_NR
+#define SERIAL_AMBA_NR		CONFIG_SERIAL_AMBA_PL010_NUMPORTS
+#define SERIAL_AMBA_NAME	CONFIG_SERIAL_AMBA_PL010_PORTNAME
+ 
+ #define AMBA_ISR_PASS_LIMIT	256
+ 
+@@ -80,9 +79,9 @@
+ 	struct uart_amba_port *uap = (struct uart_amba_port *)port;
+ 	unsigned int cr;
+ 
+-	cr = readb(uap->port.membase + UART010_CR);
+	cr = __raw_readl(uap->port.membase + UART010_CR);
+ 	cr &= ~UART010_CR_TIE;
+-	writel(cr, uap->port.membase + UART010_CR);
+	__raw_writel(cr, uap->port.membase + UART010_CR);
+ }
+ 
+ static void pl010_start_tx(struct uart_port *port)
+@@ -90,9 +89,9 @@
+ 	struct uart_amba_port *uap = (struct uart_amba_port *)port;
+ 	unsigned int cr;
+ 
+-	cr = readb(uap->port.membase + UART010_CR);
+	cr = __raw_readl(uap->port.membase + UART010_CR);
+ 	cr |= UART010_CR_TIE;
+-	writel(cr, uap->port.membase + UART010_CR);
+	__raw_writel(cr, uap->port.membase + UART010_CR);
+ }
+ 
+ static void pl010_stop_rx(struct uart_port *port)
+@@ -100,9 +99,9 @@
+ 	struct uart_amba_port *uap = (struct uart_amba_port *)port;
+ 	unsigned int cr;
+ 
+-	cr = readb(uap->port.membase + UART010_CR);
+	cr = __raw_readl(uap->port.membase + UART010_CR);
+ 	cr &= ~(UART010_CR_RIE | UART010_CR_RTIE);
+-	writel(cr, uap->port.membase + UART010_CR);
+	__raw_writel(cr, uap->port.membase + UART010_CR);
+ }
+ 
+ static void pl010_enable_ms(struct uart_port *port)
+@@ -110,9 +109,9 @@
+ 	struct uart_amba_port *uap = (struct uart_amba_port *)port;
+ 	unsigned int cr;
+ 
+-	cr = readb(uap->port.membase + UART010_CR);
+	cr = __raw_readl(uap->port.membase + UART010_CR);
+ 	cr |= UART010_CR_MSIE;
+-	writel(cr, uap->port.membase + UART010_CR);
+	__raw_writel(cr, uap->port.membase + UART010_CR);
+ }
+ 
+ static void pl010_rx_chars(struct uart_amba_port *uap)
+@@ -120,9 +119,9 @@
+ 	struct tty_struct *tty = uap->port.info->port.tty;
+ 	unsigned int status, ch, flag, rsr, max_count = 256;
+ 
+-	status = readb(uap->port.membase + UART01x_FR);
+	status = __raw_readl(uap->port.membase + UART01x_FR);
+ 	while (UART_RX_DATA(status) && max_count--) {
+-		ch = readb(uap->port.membase + UART01x_DR);
+		ch = __raw_readl(uap->port.membase + UART01x_DR);
+ 		flag = TTY_NORMAL;
+ 
+ 		uap->port.icount.rx++;
+@@ -131,9 +130,9 @@
+ 		 * Note that the error handling code is
+ 		 * out of the main execution path
+ 		 */
+-		rsr = readb(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
+		rsr = __raw_readl(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
+ 		if (unlikely(rsr & UART01x_RSR_ANY)) {
+-			writel(0, uap->port.membase + UART01x_ECR);
+			__raw_writel(0, uap->port.membase + UART01x_ECR);
+ 
+ 			if (rsr & UART01x_RSR_BE) {
+ 				rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE);
+@@ -163,7 +162,7 @@
+ 		uart_insert_char(&uap->port, rsr, UART01x_RSR_OE, ch, flag);
+ 
+ 	ignore_char:
+-		status = readb(uap->port.membase + UART01x_FR);
+		status = __raw_readl(uap->port.membase + UART01x_FR);
+ 	}
+ 	spin_unlock(&uap->port.lock);
+ 	tty_flip_buffer_push(tty);
+@@ -176,7 +175,7 @@
+ 	int count;
+ 
+ 	if (uap->port.x_char) {
+-		writel(uap->port.x_char, uap->port.membase + UART01x_DR);
+		__raw_writel(uap->port.x_char, uap->port.membase + UART01x_DR);
+ 		uap->port.icount.tx++;
+ 		uap->port.x_char = 0;
+ 		return;
+@@ -188,7 +187,7 @@
+ 
+ 	count = uap->port.fifosize >> 1;
+ 	do {
+-		writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
+		__raw_writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
+ 		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
+ 		uap->port.icount.tx++;
+ 		if (uart_circ_empty(xmit))
+@@ -206,9 +205,9 @@
+ {
+ 	unsigned int status, delta;
+ 
+-	writel(0, uap->port.membase + UART010_ICR);
+	__raw_writel(0, uap->port.membase + UART010_ICR);
+ 
+-	status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
+	status = __raw_readl(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
+ 
+ 	delta = status ^ uap->old_status;
+ 	uap->old_status = status;
+@@ -236,7 +235,7 @@
+ 
+ 	spin_lock(&uap->port.lock);
+ 
+-	status = readb(uap->port.membase + UART010_IIR);
+	status = __raw_readl(uap->port.membase + UART010_IIR);
+ 	if (status) {
+ 		do {
+ 			if (status & (UART010_IIR_RTIS | UART010_IIR_RIS))
+@@ -249,7 +248,7 @@
+ 			if (pass_counter-- == 0)
+ 				break;
+ 
+-			status = readb(uap->port.membase + UART010_IIR);
+			status = __raw_readl(uap->port.membase + UART010_IIR);
+ 		} while (status & (UART010_IIR_RTIS | UART010_IIR_RIS |
+ 				   UART010_IIR_TIS));
+ 		handled = 1;
+@@ -263,7 +262,7 @@
+ static unsigned int pl010_tx_empty(struct uart_port *port)
+ {
+ 	struct uart_amba_port *uap = (struct uart_amba_port *)port;
+-	unsigned int status = readb(uap->port.membase + UART01x_FR);
+	unsigned int status = __raw_readl(uap->port.membase + UART01x_FR);
+ 	return status & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
+ }
+ 
+@@ -273,7 +272,7 @@
+ 	unsigned int result = 0;
+ 	unsigned int status;
+ 
+-	status = readb(uap->port.membase + UART01x_FR);
+	status = __raw_readl(uap->port.membase + UART01x_FR);
+ 	if (status & UART01x_FR_DCD)
+ 		result |= TIOCM_CAR;
+ 	if (status & UART01x_FR_DSR)
+@@ -299,12 +298,12 @@
+ 	unsigned int lcr_h;
+ 
+ 	spin_lock_irqsave(&uap->port.lock, flags);
+-	lcr_h = readb(uap->port.membase + UART010_LCRH);
+	lcr_h = __raw_readl(uap->port.membase + UART010_LCRH);
+ 	if (break_state == -1)
+ 		lcr_h |= UART01x_LCRH_BRK;
+ 	else
+ 		lcr_h &= ~UART01x_LCRH_BRK;
+-	writel(lcr_h, uap->port.membase + UART010_LCRH);
+	__raw_writel(lcr_h, uap->port.membase + UART010_LCRH);
+ 	spin_unlock_irqrestore(&uap->port.lock, flags);
+ }
+ 
+@@ -332,12 +331,12 @@
+ 	/*
+ 	 * initialise the old status of the modem signals
+ 	 */
+-	uap->old_status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
+	uap->old_status = __raw_readl(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
+ 
+ 	/*
+ 	 * Finally, enable interrupts
+ 	 */
+-	writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
+	__raw_writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
+ 	       uap->port.membase + UART010_CR);
+ 
+ 	return 0;
+@@ -360,10 +359,10 @@
+ 	/*
+ 	 * disable all interrupts, disable the port
+ 	 */
+-	writel(0, uap->port.membase + UART010_CR);
+	__raw_writel(0, uap->port.membase + UART010_CR);
+ 
+ 	/* disable break condition and fifos */
+-	writel(readb(uap->port.membase + UART010_LCRH) &
+	__raw_writel(__raw_readl(uap->port.membase + UART010_LCRH) &
+ 		~(UART01x_LCRH_BRK | UART01x_LCRH_FEN),
+ 	       uap->port.membase + UART010_LCRH);
+ 
+@@ -385,7 +384,7 @@
+ 	/*
+ 	 * Ask the core to calculate the divisor for us.
+ 	 */
+-	baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16); 
+	baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
+ 	quot = uart_get_divisor(port, baud);
+ 
+ 	switch (termios->c_cflag & CSIZE) {
+@@ -448,25 +447,25 @@
+ 		uap->port.ignore_status_mask |= UART_DUMMY_RSR_RX;
+ 
+ 	/* first, disable everything */
+-	old_cr = readb(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
+	old_cr = __raw_readl(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
+ 
+ 	if (UART_ENABLE_MS(port, termios->c_cflag))
+ 		old_cr |= UART010_CR_MSIE;
+ 
+-	writel(0, uap->port.membase + UART010_CR);
+	__raw_writel(0, uap->port.membase + UART010_CR);
+ 
+ 	/* Set baud rate */
+ 	quot -= 1;
+-	writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
+-	writel(quot & 0xff, uap->port.membase + UART010_LCRL);
+	__raw_writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
+	__raw_writel(quot & 0xff, uap->port.membase + UART010_LCRL);
+ 
+ 	/*
+ 	 * ----------v----------v----------v----------v-----
+ 	 * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
+ 	 * ----------^----------^----------^----------^-----
+ 	 */
+-	writel(lcr_h, uap->port.membase + UART010_LCRH);
+-	writel(old_cr, uap->port.membase + UART010_CR);
+	__raw_writel(lcr_h, uap->port.membase + UART010_LCRH);
+	__raw_writel(old_cr, uap->port.membase + UART010_CR);
+ 
+ 	spin_unlock_irqrestore(&uap->port.lock, flags);
+ }
+@@ -538,7 +537,7 @@
+ 	.verify_port	= pl010_verify_port,
+ };
+ 
+-static struct uart_amba_port *amba_ports[UART_NR];
+static struct uart_amba_port *amba_ports[SERIAL_AMBA_NR];
+ 
+ #ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE
+ 
+@@ -548,10 +547,10 @@
+ 	unsigned int status;
+ 
+ 	do {
+-		status = readb(uap->port.membase + UART01x_FR);
+		status = __raw_readl(uap->port.membase + UART01x_FR);
+ 		barrier();
+ 	} while (!UART_TX_READY(status));
+-	writel(ch, uap->port.membase + UART01x_DR);
+	__raw_writel(ch, uap->port.membase + UART01x_DR);
+ }
+ 
+ static void
+@@ -565,8 +564,8 @@
+ 	/*
+ 	 *	First save the CR then disable the interrupts
+ 	 */
+-	old_cr = readb(uap->port.membase + UART010_CR);
+-	writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
+	old_cr = __raw_readl(uap->port.membase + UART010_CR);
+	__raw_writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
+ 
+ 	uart_console_write(&uap->port, s, count, pl010_console_putchar);
+ 
+@@ -575,10 +574,10 @@
+ 	 *	and restore the TCR
+ 	 */
+ 	do {
+-		status = readb(uap->port.membase + UART01x_FR);
+		status = __raw_readl(uap->port.membase + UART01x_FR);
+ 		barrier();
+ 	} while (status & UART01x_FR_BUSY);
+-	writel(old_cr, uap->port.membase + UART010_CR);
+	__raw_writel(old_cr, uap->port.membase + UART010_CR);
+ 
+ 	clk_disable(uap->clk);
+ }
+@@ -587,9 +586,9 @@
+ pl010_console_get_options(struct uart_amba_port *uap, int *baud,
+ 			     int *parity, int *bits)
+ {
+-	if (readb(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
+	if (__raw_readl(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
+ 		unsigned int lcr_h, quot;
+-		lcr_h = readb(uap->port.membase + UART010_LCRH);
+		lcr_h = __raw_readl(uap->port.membase + UART010_LCRH);
+ 
+ 		*parity = 'n';
+ 		if (lcr_h & UART01x_LCRH_PEN) {
+@@ -604,8 +603,8 @@
+ 		else
+ 			*bits = 8;
+ 
+-		quot = readb(uap->port.membase + UART010_LCRL) |
+-		       readb(uap->port.membase + UART010_LCRM) << 8;
+		quot = __raw_readl(uap->port.membase + UART010_LCRL) |
+		       __raw_readl(uap->port.membase + UART010_LCRM) << 8;
+ 		*baud = uap->port.uartclk / (16 * (quot + 1));
+ 	}
+ }
+@@ -623,7 +622,7 @@
+ 	 * if so, search for the first available port that does have
+ 	 * console support.
+ 	 */
+-	if (co->index >= UART_NR)
+	if (co->index >= SERIAL_AMBA_NR)
+ 		co->index = 0;
+ 	uap = amba_ports[co->index];
+ 	if (!uap)
+@@ -641,7 +640,7 @@
+ 
+ static struct uart_driver amba_reg;
+ static struct console amba_console = {
+-	.name		= "ttyAM",
+	.name		= SERIAL_AMBA_NAME,
+ 	.write		= pl010_console_write,
+ 	.device		= uart_console_device,
+ 	.setup		= pl010_console_setup,
+@@ -657,11 +656,11 @@
+ 
+ static struct uart_driver amba_reg = {
+ 	.owner			= THIS_MODULE,
+-	.driver_name		= "ttyAM",
+-	.dev_name		= "ttyAM",
+	.driver_name		= SERIAL_AMBA_NAME,
+	.dev_name		= SERIAL_AMBA_NAME,
+ 	.major			= SERIAL_AMBA_MAJOR,
+ 	.minor			= SERIAL_AMBA_MINOR,
+-	.nr			= UART_NR,
+	.nr			= SERIAL_AMBA_NR,
+ 	.cons			= AMBA_CONSOLE,
+ };
+ 
+--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
+@@ -285,10 +285,25 @@
+ 	help
+ 	  This selects the ARM(R) AMBA(R) PrimeCell PL010 UART.  If you have
+ 	  an Integrator/AP or Integrator/PP2 platform, or if you have a
+-	  Cirrus Logic EP93xx CPU, say Y or M here.
+	  Cirrus Logic EP93xx CPU or an Infineon ADM5120 SOC, say Y or M here.
+ 
+ 	  If unsure, say N.
+ 
+config SERIAL_AMBA_PL010_NUMPORTS
+	int "Maximum number of AMBA PL010 serial ports"
+	depends on SERIAL_AMBA_PL010
+	default "8"
+	---help---
+	  Set this to the number of serial ports you want the AMBA PL010 driver
+	  to support.
+
+config SERIAL_AMBA_PL010_PORTNAME
+	string "Name of the AMBA PL010 serial ports"
+	depends on SERIAL_AMBA_PL010
+	default "ttyAM"
+	---help---
+	  ::: To be written :::
+
+ config SERIAL_AMBA_PL010_CONSOLE
+ 	bool "Support for console on AMBA serial port"
+ 	depends on SERIAL_AMBA_PL010=y
--- a/target/linux/adm5120/patches-2.6.27/201-amba_bus_hacks.patch
+++ b/target/linux/adm5120/patches-2.6.27/201-amba_bus_hacks.patch
@@ -0,0 +1,13 @@
+--- a/drivers/amba/bus.c
+++ b/drivers/amba/bus.c
+@@ -17,6 +17,10 @@
+ #include <asm/io.h>
+ #include <asm/sizes.h>
+ 
+#ifndef NO_IRQ
+#define NO_IRQ		(-1)
+#endif
+
+ #define to_amba_device(d)	container_of(d, struct amba_device, dev)
+ #define to_amba_driver(d)	container_of(d, struct amba_driver, drv)
+ 
--- a/target/linux/adm5120/patches-2.6.27/202-pci_disable_common_quirks.patch
+++ b/target/linux/adm5120/patches-2.6.27/202-pci_disable_common_quirks.patch
@@ -0,0 +1,46 @@
+--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
+@@ -42,6 +42,12 @@
+ 
+ 	  When in doubt, say N.
+ 
+config PCI_DISABLE_COMMON_QUIRKS
+	bool "PCI disable common quirks"
+	depends on PCI
+	help
+	  If you don't know what to do here, say N.
+
+ config HT_IRQ
+ 	bool "Interrupts on hypertransport devices"
+ 	default y
+--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
+@@ -24,6 +24,7 @@
+ #include <linux/kallsyms.h>
+ #include "pci.h"
+ 
+#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
+ /* The Mellanox Tavor device gives false positive parity errors
+  * Mark this device with a broken_parity_status, to allow
+  * PCI scanning code to "skip" this now blacklisted device.
+@@ -1554,6 +1555,7 @@
+ 	}
+ }
+ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C810, fixup_rev1_53c810);
+#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
+ 
+ static void pci_do_fixups(struct pci_dev *dev, struct pci_fixup *f, struct pci_fixup *end)
+ {
+@@ -1634,6 +1636,7 @@
+ }
+ EXPORT_SYMBOL(pci_fixup_device);
+ 
+#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
+ /* Enable 1k I/O space granularity on the Intel P64H2 */
+ static void __devinit quirk_p64h2_1k_io(struct pci_dev *dev)
+ {
+@@ -2007,3 +2010,4 @@
+ 			quirk_msi_intx_disable_bug);
+ 
+ #endif /* CONFIG_PCI_MSI */
+#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
--- a/target/linux/adm5120/patches-2.6.27/203-gpio_leds_brightness.patch
+++ b/target/linux/adm5120/patches-2.6.27/203-gpio_leds_brightness.patch
@@ -0,0 +1,27 @@
+--- a/drivers/leds/leds-gpio.c
+++ b/drivers/leds/leds-gpio.c
+@@ -43,13 +43,17 @@
+ 		container_of(led_cdev, struct gpio_led_data, cdev);
+ 	int level;
+ 
+-	if (value == LED_OFF)
+-		level = 0;
+-	else
+-		level = 1;
+-
+-	if (led_dat->active_low)
+-		level = !level;
+	switch (value) {
+	case LED_OFF:
+		level = led_dat->active_low ? 1 : 0;
+		break;
+	case LED_FULL:
+		level = led_dat->active_low ? 0 : 1;
+		break;
+	default:
+		level = value;
+		break;
+	}
+ 
+ 	/* Setting GPIOs with I2C/etc requires a task context, and we don't
+ 	 * seem to have a reliable way to know if we're already in one; so
--- a/target/linux/adm5120/patches-2.6.27/310-adm5120_wdt.patch
+++ b/target/linux/adm5120/patches-2.6.27/310-adm5120_wdt.patch
@@ -0,0 +1,31 @@
+--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
+@@ -653,6 +653,18 @@
+ 	  To compile this driver as a module, choose M here: the
+ 	  module will be called rc32434_wdt.
+ 
+config ADM5120_WDT
+	tristate "Infineon ADM5120 SoC hardware watchdog"
+	depends on WATCHDOG && ADM5120
+	help
+	  This is a driver for hardware watchdog integrated in Infineon
+	  ADM5120 SoC. This watchdog simply watches your kernel to make sure
+	  it doesn't freeze, and if it does, it reboots your computer after a
+	  certain amount of time.
+
+	  To compile this driver as a module, choose M here: the module will be
+	  called adm5120_wdt.
+
+ config INDYDOG
+ 	tristate "Indy/I2 Hardware Watchdog"
+ 	depends on SGI_HAS_INDYDOG
+--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
+@@ -102,6 +102,7 @@
+ obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o
+ obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
+ obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
+obj-$(CONFIG_ADM5120_WDT) += adm5120_wdt.o
+ 
+ # PARISC Architecture
+