qi-hardware/openwrt-xburst
1
0
Fork 0
mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2025-04-04 22:57:30 +03:00
Code

[brcm63xx] define bcm6338 SDRAM base register and make sure that the right CPU id will be used to detect a bcm6338

Browse Source 
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@16567 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
florian 2009-06-26 11:08:12 +00:00
parent 86f48601fe
commit b0b6441b42
2 changed files with 7 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c
View File

@ -40,6 +40,7 @@ static const unsigned long bcm96338_regs_base[] = {
[RSET_UDC0] = BCM_6338_UDC0_BASE, [RSET_UDC0] = BCM_6338_UDC0_BASE,
[RSET_UART0] = BCM_6338_UART0_BASE, [RSET_UART0] = BCM_6338_UART0_BASE,
[RSET_GPIO] = BCM_6338_GPIO_BASE, [RSET_GPIO] = BCM_6338_GPIO_BASE,
[RSET_SDRAM] = BCM_6338_SDRAM_BASE,
[RSET_SPI] = BCM_6338_SPI_BASE, [RSET_SPI] = BCM_6338_SPI_BASE,
[RSET_MEMC] = BCM_6338_MEMC_BASE, [RSET_MEMC] = BCM_6338_MEMC_BASE,
}; };
@ -310,7 +311,7 @@ void __init bcm63xx_cpu_init(void)
expected_cpu_id = 0; expected_cpu_id = 0;
switch (c->cputype) { switch (c->cputype) {
case CPU_BCM6338: case CPU_BCM3302:
expected_cpu_id = BCM6338_CPU_ID; expected_cpu_id = BCM6338_CPU_ID;
bcm63xx_regs_base = bcm96338_regs_base; bcm63xx_regs_base = bcm96338_regs_base;
bcm63xx_irqs = bcm96338_irqs; bcm63xx_irqs = bcm96338_irqs;

6
target/linux/brcm63xx/files/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h
View File

@ -134,7 +134,9 @@ enum bcm63xx_regs_set {
#define BCM_6338_USBDMA_BASE (0xfffe2400) #define BCM_6338_USBDMA_BASE (0xfffe2400)
#define BCM_6338_ENET0_BASE (0xfffe2800) #define BCM_6338_ENET0_BASE (0xfffe2800)
#define BCM_6338_UDC0_BASE (0xfffe3000) /* USB_CTL_BASE */ #define BCM_6338_UDC0_BASE (0xfffe3000) /* USB_CTL_BASE */
#define BCM_6338_MEMC_BASE (0xfffe3100) #define BCM_6338_SDRAM_REGS_BASE (0xfffe3100)
#define BCM_6338_SDRAM_BASE (0xfffe3100)
#define BCM_6338_MEMC_BASE (0xdeadbeef)
/* /*
* 6345 register sets base address * 6345 register sets base address
@ -225,6 +227,8 @@ static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set)
return BCM_6338_SPI_BASE; return BCM_6338_SPI_BASE;
case RSET_MEMC: case RSET_MEMC:
return BCM_6338_MEMC_BASE; return BCM_6338_MEMC_BASE;
case RSET_SDRAM:
return BCM_6338_SDRAM_BASE;
} }
#endif #endif
#ifdef CONFIG_BCM63XX_CPU_6345 #ifdef CONFIG_BCM63XX_CPU_6345