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git://projects.qi-hardware.com/openwrt-xburst.git
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[xburst] ASoC: Fix and cleaup dma config
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@21618 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
parent
884d14dfb6
commit
b28851ab49
@ -1,6 +1,6 @@
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From 6548719b6a1ce4e202d58625fbfb94e6c894ced9 Mon Sep 17 00:00:00 2001
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From d12d1c5f8615192b545faa69a553f64d4d9cc9ab Mon Sep 17 00:00:00 2001
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From: Lars-Peter Clausen <lars@metafoo.de>
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From: Lars-Peter Clausen <lars@metafoo.de>
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Date: Sat, 24 Apr 2010 12:35:07 +0200
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Date: Fri, 28 May 2010 19:54:02 +0200
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Subject: [PATCH] Add jz4740 SoC sound drivers
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Subject: [PATCH] Add jz4740 SoC sound drivers
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---
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---
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@ -8,11 +8,11 @@ Subject: [PATCH] Add jz4740 SoC sound drivers
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sound/soc/Makefile | 1 +
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sound/soc/Makefile | 1 +
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sound/soc/jz4740/Kconfig | 13 +
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sound/soc/jz4740/Kconfig | 13 +
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sound/soc/jz4740/Makefile | 9 +
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sound/soc/jz4740/Makefile | 9 +
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sound/soc/jz4740/jz4740-i2s.c | 572 +++++++++++++++++++++++++++++++++++++++++
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sound/soc/jz4740/jz4740-i2s.c | 568 +++++++++++++++++++++++++++++++++++++++++
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sound/soc/jz4740/jz4740-i2s.h | 18 ++
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sound/soc/jz4740/jz4740-i2s.h | 18 ++
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sound/soc/jz4740/jz4740-pcm.c | 350 +++++++++++++++++++++++++
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sound/soc/jz4740/jz4740-pcm.c | 350 +++++++++++++++++++++++++
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sound/soc/jz4740/jz4740-pcm.h | 22 ++
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sound/soc/jz4740/jz4740-pcm.h | 22 ++
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8 files changed, 986 insertions(+), 0 deletions(-)
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8 files changed, 982 insertions(+), 0 deletions(-)
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create mode 100644 sound/soc/jz4740/Kconfig
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create mode 100644 sound/soc/jz4740/Kconfig
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create mode 100644 sound/soc/jz4740/Makefile
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create mode 100644 sound/soc/jz4740/Makefile
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create mode 100644 sound/soc/jz4740/jz4740-i2s.c
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create mode 100644 sound/soc/jz4740/jz4740-i2s.c
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@ -77,10 +77,10 @@ index 0000000..1be8d19
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+
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+
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diff --git a/sound/soc/jz4740/jz4740-i2s.c b/sound/soc/jz4740/jz4740-i2s.c
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diff --git a/sound/soc/jz4740/jz4740-i2s.c b/sound/soc/jz4740/jz4740-i2s.c
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new file mode 100644
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new file mode 100644
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index 0000000..d3daa27
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index 0000000..2b139fd
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--- /dev/null
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--- /dev/null
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+++ b/sound/soc/jz4740/jz4740-i2s.c
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+++ b/sound/soc/jz4740/jz4740-i2s.c
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@@ -0,0 +1,572 @@
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@@ -0,0 +1,568 @@
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+/*
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+/*
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+ * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
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+ * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
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+ *
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+ *
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@ -173,37 +173,18 @@ index 0000000..d3daa27
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+ struct clk *clk_aic;
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+ struct clk *clk_aic;
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+ struct clk *clk_i2s;
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+ struct clk *clk_i2s;
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+
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+
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+ struct jz4740_pcm_config capture_pcm_config;
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+ struct jz4740_pcm_config pcm_config_playback;
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+ struct jz4740_pcm_config playback_pcm_config;
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+ struct jz4740_pcm_config pcm_config_capture;
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+};
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+};
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+
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+
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+static struct jz4740_dma_config jz4740_i2s_dma_playback_config = {
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+ .src_width = JZ4740_DMA_WIDTH_16BIT,
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+ .dst_width = JZ4740_DMA_WIDTH_32BIT,
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+ .transfer_size = JZ4740_DMA_TRANSFER_SIZE_16BYTE,
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+ .request_type = JZ4740_DMA_TYPE_AIC_TRANSMIT,
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+ .flags = JZ4740_DMA_SRC_AUTOINC,
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+ .mode = JZ4740_DMA_MODE_SINGLE,
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+};
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+
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+static struct jz4740_dma_config jz4740_i2s_dma_capture_config = {
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+ .src_width = JZ4740_DMA_WIDTH_32BIT,
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+ .dst_width = JZ4740_DMA_WIDTH_16BIT,
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+ .transfer_size = JZ4740_DMA_TRANSFER_SIZE_16BYTE,
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+ .request_type = JZ4740_DMA_TYPE_AIC_RECEIVE,
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+ .flags = JZ4740_DMA_DST_AUTOINC,
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+ .mode = JZ4740_DMA_MODE_SINGLE,
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+};
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+
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+
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+static inline uint32_t jz4740_i2s_read(const struct jz4740_i2s *i2s,
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+static inline uint32_t jz4740_i2s_read(const struct jz4740_i2s *i2s,
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+ unsigned int reg)
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+ unsigned int reg)
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+{
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+{
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+ return readl(i2s->base + reg);
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+ return readl(i2s->base + reg);
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+}
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+}
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+
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+
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+static inline void jz4740_i2s_write(const struct jz4740_i2s *i2s,
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+static inline void jz4740_i2s_write(const struct jz4740_i2s *i2s,
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+ unsigned int reg, uint32_t value)
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+ unsigned int reg, uint32_t value)
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+{
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+{
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+ writel(value, i2s->base + reg);
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+ writel(value, i2s->base + reg);
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+}
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+}
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@ -214,7 +195,7 @@ index 0000000..d3daa27
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+}
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+}
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+
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+
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+static int jz4740_i2s_startup(struct snd_pcm_substream *substream,
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+static int jz4740_i2s_startup(struct snd_pcm_substream *substream,
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+ struct snd_soc_dai *dai)
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+ struct snd_soc_dai *dai)
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+{
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+{
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+ struct jz4740_i2s *i2s = jz4740_dai_to_i2s(dai);
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+ struct jz4740_i2s *i2s = jz4740_dai_to_i2s(dai);
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+ uint32_t conf, ctrl;
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+ uint32_t conf, ctrl;
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@ -222,22 +203,22 @@ index 0000000..d3daa27
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+ if (dai->active)
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+ if (dai->active)
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+ return 0;
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+ return 0;
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+
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+
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+ conf = jz4740_i2s_read(i2s, JZ_REG_AIC_CONF);
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+
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+ ctrl = jz4740_i2s_read(i2s, JZ_REG_AIC_CTRL);
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+ ctrl = jz4740_i2s_read(i2s, JZ_REG_AIC_CTRL);
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+
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+ conf |= JZ_AIC_CONF_ENABLE;
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+ ctrl |= JZ_AIC_CTRL_FLUSH;
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+ ctrl |= JZ_AIC_CTRL_FLUSH;
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+
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+
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+ jz4740_i2s_write(i2s, JZ_REG_AIC_CTRL, ctrl);
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+ jz4740_i2s_write(i2s, JZ_REG_AIC_CTRL, ctrl);
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+
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+ clk_enable(i2s->clk_i2s);
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+ clk_enable(i2s->clk_i2s);
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+
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+ conf = jz4740_i2s_read(i2s, JZ_REG_AIC_CONF);
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+ conf |= JZ_AIC_CONF_ENABLE;
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+ jz4740_i2s_write(i2s, JZ_REG_AIC_CONF, conf);
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+ jz4740_i2s_write(i2s, JZ_REG_AIC_CONF, conf);
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+
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+
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+ return 0;
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+ return 0;
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+}
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+}
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+
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+
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+static void jz4740_i2s_shutdown(struct snd_pcm_substream *substream, struct
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+static void jz4740_i2s_shutdown(struct snd_pcm_substream *substream,
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+ snd_soc_dai *dai)
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+ struct snd_soc_dai *dai)
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+{
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+{
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+ struct jz4740_i2s *i2s = jz4740_dai_to_i2s(dai);
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+ struct jz4740_i2s *i2s = jz4740_dai_to_i2s(dai);
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+ uint32_t conf;
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+ uint32_t conf;
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@ -254,7 +235,7 @@ index 0000000..d3daa27
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+
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+
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+
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+
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+static int jz4740_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
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+static int jz4740_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
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+ struct snd_soc_dai *dai)
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+ struct snd_soc_dai *dai)
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+{
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+{
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+ struct jz4740_i2s *i2s = jz4740_dai_to_i2s(dai);
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+ struct jz4740_i2s *i2s = jz4740_dai_to_i2s(dai);
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+ bool playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
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+ bool playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
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@ -262,11 +243,10 @@ index 0000000..d3daa27
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+ uint32_t ctrl;
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+ uint32_t ctrl;
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+ uint32_t mask;
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+ uint32_t mask;
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+
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+
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+ if (playback) {
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+ if (playback)
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+ mask = JZ_AIC_CTRL_ENABLE_PLAYBACK | JZ_AIC_CTRL_ENABLE_TX_DMA;
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+ mask = JZ_AIC_CTRL_ENABLE_PLAYBACK | JZ_AIC_CTRL_ENABLE_TX_DMA;
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+ } else {
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+ else
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+ mask = JZ_AIC_CTRL_ENABLE_CAPTURE | JZ_AIC_CTRL_ENABLE_RX_DMA;
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+ mask = JZ_AIC_CTRL_ENABLE_CAPTURE | JZ_AIC_CTRL_ENABLE_RX_DMA;
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+ }
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+
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+
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+ ctrl = jz4740_i2s_read(i2s, JZ_REG_AIC_CTRL);
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+ ctrl = jz4740_i2s_read(i2s, JZ_REG_AIC_CTRL);
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+
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+
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@ -274,15 +254,15 @@ index 0000000..d3daa27
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+ case SNDRV_PCM_TRIGGER_START:
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+ case SNDRV_PCM_TRIGGER_START:
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+ case SNDRV_PCM_TRIGGER_RESUME:
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+ case SNDRV_PCM_TRIGGER_RESUME:
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+ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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+ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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+ ctrl |= mask;
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+ ctrl |= mask;
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+ break;
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+ break;
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+ case SNDRV_PCM_TRIGGER_STOP:
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+ case SNDRV_PCM_TRIGGER_STOP:
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+ case SNDRV_PCM_TRIGGER_SUSPEND:
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+ case SNDRV_PCM_TRIGGER_SUSPEND:
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+ case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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+ case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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+ ctrl &= ~mask;
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+ ctrl &= ~mask;
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+ break;
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+ break;
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+ default:
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+ default:
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+ return -EINVAL;
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+ return -EINVAL;
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+ }
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+ }
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+
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+
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+ jz4740_i2s_write(i2s, JZ_REG_AIC_CTRL, ctrl);
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+ jz4740_i2s_write(i2s, JZ_REG_AIC_CTRL, ctrl);
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@ -291,8 +271,7 @@ index 0000000..d3daa27
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+}
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+}
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+
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+
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+
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+
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+static int jz4740_i2s_set_fmt(struct snd_soc_dai *dai,
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+static int jz4740_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
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+ unsigned int fmt)
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+{
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+{
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+ struct jz4740_i2s *i2s = jz4740_dai_to_i2s(dai);
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+ struct jz4740_i2s *i2s = jz4740_dai_to_i2s(dai);
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+
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+
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@ -305,36 +284,36 @@ index 0000000..d3daa27
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+
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+
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+ switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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+ switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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+ case SND_SOC_DAIFMT_CBS_CFS:
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+ case SND_SOC_DAIFMT_CBS_CFS:
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+ conf |= JZ_AIC_CONF_BIT_CLK_MASTER | JZ_AIC_CONF_SYNC_CLK_MASTER;
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+ conf |= JZ_AIC_CONF_BIT_CLK_MASTER | JZ_AIC_CONF_SYNC_CLK_MASTER;
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+ format |= JZ_AIC_I2S_FMT_ENABLE_SYS_CLK;
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+ format |= JZ_AIC_I2S_FMT_ENABLE_SYS_CLK;
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+ break;
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+ break;
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+ case SND_SOC_DAIFMT_CBM_CFS:
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+ case SND_SOC_DAIFMT_CBM_CFS:
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+ conf |= JZ_AIC_CONF_SYNC_CLK_MASTER;
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+ conf |= JZ_AIC_CONF_SYNC_CLK_MASTER;
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+ break;
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+ break;
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+ case SND_SOC_DAIFMT_CBS_CFM:
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+ case SND_SOC_DAIFMT_CBS_CFM:
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+ conf |= JZ_AIC_CONF_BIT_CLK_MASTER;
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+ conf |= JZ_AIC_CONF_BIT_CLK_MASTER;
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+ break;
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+ break;
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+ case SND_SOC_DAIFMT_CBM_CFM:
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+ case SND_SOC_DAIFMT_CBM_CFM:
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+ break;
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+ break;
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+ default:
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+ default:
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+ return -EINVAL;
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+ return -EINVAL;
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+ }
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+ }
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+
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+
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+ switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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+ switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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+ case SND_SOC_DAIFMT_MSB:
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+ case SND_SOC_DAIFMT_MSB:
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+ format |= JZ_AIC_I2S_FMT_MSB;
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+ format |= JZ_AIC_I2S_FMT_MSB;
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+ break;
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+ break;
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+ case SND_SOC_DAIFMT_I2S:
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+ case SND_SOC_DAIFMT_I2S:
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+ break;
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+ break;
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+ default:
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+ default:
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+ return -EINVAL;
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+ return -EINVAL;
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+ }
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+ }
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+
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+
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+ switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
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+ switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
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+ case SND_SOC_DAIFMT_NB_NF:
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+ case SND_SOC_DAIFMT_NB_NF:
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+ break;
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+ break;
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+ default:
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+ default:
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+ return -EINVAL;
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+ return -EINVAL;
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+ }
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+ }
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+
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+
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+ jz4740_i2s_write(i2s, JZ_REG_AIC_CONF, conf);
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+ jz4740_i2s_write(i2s, JZ_REG_AIC_CONF, conf);
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@ -344,8 +323,7 @@ index 0000000..d3daa27
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+}
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+}
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+
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+
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+static int jz4740_i2s_hw_params(struct snd_pcm_substream *substream,
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+static int jz4740_i2s_hw_params(struct snd_pcm_substream *substream,
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+ struct snd_pcm_hw_params *params,
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+ struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
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+ struct snd_soc_dai *dai)
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+{
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+{
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+ struct jz4740_i2s *i2s = jz4740_dai_to_i2s(dai);
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+ struct jz4740_i2s *i2s = jz4740_dai_to_i2s(dai);
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+ bool playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
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+ bool playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
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@ -358,11 +336,11 @@ index 0000000..d3daa27
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+
|
+
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+ switch (params_format(params)) {
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+ switch (params_format(params)) {
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+ case SNDRV_PCM_FORMAT_S8:
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+ case SNDRV_PCM_FORMAT_S8:
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+ sample_size = 0;
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+ sample_size = 0;
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+ dma_width = JZ4740_DMA_WIDTH_8BIT;
|
+ dma_width = JZ4740_DMA_WIDTH_8BIT;
|
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+ break;
|
+ break;
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+ case SNDRV_PCM_FORMAT_S16:
|
+ case SNDRV_PCM_FORMAT_S16:
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+ sample_size = 1;
|
+ sample_size = 1;
|
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+ dma_width = JZ4740_DMA_WIDTH_16BIT;
|
+ dma_width = JZ4740_DMA_WIDTH_16BIT;
|
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+ break;
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+ break;
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+ default:
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+ default:
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@ -379,7 +357,7 @@ index 0000000..d3daa27
|
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+
|
+
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+ switch (params_channels(params)) {
|
+ switch (params_channels(params)) {
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+ case 2:
|
+ case 2:
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+ break;
|
+ break;
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+ case 1:
|
+ case 1:
|
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+ if (playback) {
|
+ if (playback) {
|
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+ ctrl |= JZ_AIC_CTRL_MONO_TO_STEREO;
|
+ ctrl |= JZ_AIC_CTRL_MONO_TO_STEREO;
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@ -392,23 +370,20 @@ index 0000000..d3daa27
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+ jz4740_i2s_write(i2s, JZ_REG_AIC_CTRL, ctrl);
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+ jz4740_i2s_write(i2s, JZ_REG_AIC_CTRL, ctrl);
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+
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+
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+ if (playback) {
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+ if (playback) {
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+ jz4740_i2s_dma_playback_config.src_width = dma_width;
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+ pcm_config = &i2s->pcm_config_playback;
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+ pcm_config = &i2s->playback_pcm_config;
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+ pcm_config->dma_config.dst_width = dma_width;
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+ pcm_config->dma_config = &jz4740_i2s_dma_playback_config;
|
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+ } else {
|
+ } else {
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+ jz4740_i2s_dma_capture_config.dst_width = dma_width;
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+ pcm_config = &i2s->pcm_config_capture;
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+ pcm_config = &i2s->capture_pcm_config;
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+ pcm_config->dma_config.src_width = dma_width;
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+ pcm_config->dma_config = &jz4740_i2s_dma_capture_config;
|
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+ }
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+ }
|
||||||
+ pcm_config->fifo_addr = i2s->phys_base + JZ_REG_AIC_FIFO;
|
+
|
||||||
+
|
+
|
||||||
+ snd_soc_dai_set_dma_data(dai, substream, pcm_config);
|
+ snd_soc_dai_set_dma_data(dai, substream, pcm_config);
|
||||||
+
|
+
|
||||||
+ return 0;
|
+ return 0;
|
||||||
+}
|
+}
|
||||||
+
|
+
|
||||||
+static int jz4740_i2s_set_clkdiv(struct snd_soc_dai *dai,
|
+static int jz4740_i2s_set_clkdiv(struct snd_soc_dai *dai, int div_id, int div)
|
||||||
+ int div_id, int div)
|
|
||||||
+{
|
+{
|
||||||
+ struct jz4740_i2s *i2s = jz4740_dai_to_i2s(dai);
|
+ struct jz4740_i2s *i2s = jz4740_dai_to_i2s(dai);
|
||||||
+
|
+
|
||||||
@ -426,7 +401,7 @@ index 0000000..d3daa27
|
|||||||
+}
|
+}
|
||||||
+
|
+
|
||||||
+static int jz4740_i2s_set_sysclk(struct snd_soc_dai *dai, int clk_id,
|
+static int jz4740_i2s_set_sysclk(struct snd_soc_dai *dai, int clk_id,
|
||||||
+ unsigned int freq, int dir)
|
+ unsigned int freq, int dir)
|
||||||
+{
|
+{
|
||||||
+ struct jz4740_i2s *i2s = jz4740_dai_to_i2s(dai);
|
+ struct jz4740_i2s *i2s = jz4740_dai_to_i2s(dai);
|
||||||
+ int ret = 0;
|
+ int ret = 0;
|
||||||
@ -524,13 +499,13 @@ index 0000000..d3daa27
|
|||||||
+ .playback = {
|
+ .playback = {
|
||||||
+ .channels_min = 1,
|
+ .channels_min = 1,
|
||||||
+ .channels_max = 2,
|
+ .channels_max = 2,
|
||||||
+ .rates = SNDRV_PCM_RATE_8000_44100,
|
+ .rates = SNDRV_PCM_RATE_8000_48000,
|
||||||
+ .formats = JZ4740_I2S_FMTS,
|
+ .formats = JZ4740_I2S_FMTS,
|
||||||
+ },
|
+ },
|
||||||
+ .capture = {
|
+ .capture = {
|
||||||
+ .channels_min = 2,
|
+ .channels_min = 2,
|
||||||
+ .channels_max = 2,
|
+ .channels_max = 2,
|
||||||
+ .rates = SNDRV_PCM_RATE_8000_44100,
|
+ .rates = SNDRV_PCM_RATE_8000_48000,
|
||||||
+ .formats = JZ4740_I2S_FMTS,
|
+ .formats = JZ4740_I2S_FMTS,
|
||||||
+ },
|
+ },
|
||||||
+ .symmetric_rates = 1,
|
+ .symmetric_rates = 1,
|
||||||
@ -540,6 +515,29 @@ index 0000000..d3daa27
|
|||||||
+};
|
+};
|
||||||
+EXPORT_SYMBOL_GPL(jz4740_i2s_dai);
|
+EXPORT_SYMBOL_GPL(jz4740_i2s_dai);
|
||||||
+
|
+
|
||||||
|
+static void __devinit jz4740_i2c_init_pcm_config(struct jz4740_i2s *i2s)
|
||||||
|
+{
|
||||||
|
+ struct jz4740_dma_config *dma_config;
|
||||||
|
+
|
||||||
|
+ /* Playback */
|
||||||
|
+ dma_config = &i2s->pcm_config_playback.dma_config;
|
||||||
|
+ dma_config->src_width = JZ4740_DMA_WIDTH_32BIT,
|
||||||
|
+ dma_config->transfer_size = JZ4740_DMA_TRANSFER_SIZE_16BYTE;
|
||||||
|
+ dma_config->request_type = JZ4740_DMA_TYPE_AIC_TRANSMIT;
|
||||||
|
+ dma_config->flags = JZ4740_DMA_SRC_AUTOINC;
|
||||||
|
+ dma_config->mode = JZ4740_DMA_MODE_SINGLE;
|
||||||
|
+ i2s->pcm_config_playback.fifo_addr = i2s->phys_base + JZ_REG_AIC_FIFO;
|
||||||
|
+
|
||||||
|
+ /* Capture */
|
||||||
|
+ dma_config = &i2s->pcm_config_capture.dma_config;
|
||||||
|
+ dma_config->dst_width = JZ4740_DMA_WIDTH_32BIT,
|
||||||
|
+ dma_config->transfer_size = JZ4740_DMA_TRANSFER_SIZE_16BYTE;
|
||||||
|
+ dma_config->request_type = JZ4740_DMA_TYPE_AIC_RECEIVE;
|
||||||
|
+ dma_config->flags = JZ4740_DMA_DST_AUTOINC;
|
||||||
|
+ dma_config->mode = JZ4740_DMA_MODE_SINGLE;
|
||||||
|
+ i2s->pcm_config_capture.fifo_addr = i2s->phys_base + JZ_REG_AIC_FIFO;
|
||||||
|
+}
|
||||||
|
+
|
||||||
+static int __devinit jz4740_i2s_dev_probe(struct platform_device *pdev)
|
+static int __devinit jz4740_i2s_dev_probe(struct platform_device *pdev)
|
||||||
+{
|
+{
|
||||||
+ struct jz4740_i2s *i2s;
|
+ struct jz4740_i2s *i2s;
|
||||||
@ -574,20 +572,13 @@ index 0000000..d3daa27
|
|||||||
+
|
+
|
||||||
+ i2s->phys_base = i2s->mem->start;
|
+ i2s->phys_base = i2s->mem->start;
|
||||||
+
|
+
|
||||||
+ jz4740_i2s_dai.private_data = i2s;
|
|
||||||
+
|
|
||||||
+ ret = snd_soc_register_dai(&jz4740_i2s_dai);
|
|
||||||
+
|
|
||||||
+ i2s->clk_aic = clk_get(&pdev->dev, "aic");
|
+ i2s->clk_aic = clk_get(&pdev->dev, "aic");
|
||||||
+
|
|
||||||
+ if (IS_ERR(i2s->clk_aic)) {
|
+ if (IS_ERR(i2s->clk_aic)) {
|
||||||
+ ret = PTR_ERR(i2s->clk_aic);
|
+ ret = PTR_ERR(i2s->clk_aic);
|
||||||
+ goto err_iounmap;
|
+ goto err_iounmap;
|
||||||
+ }
|
+ }
|
||||||
+
|
+
|
||||||
+
|
|
||||||
+ i2s->clk_i2s = clk_get(&pdev->dev, "i2s");
|
+ i2s->clk_i2s = clk_get(&pdev->dev, "i2s");
|
||||||
+
|
|
||||||
+ if (IS_ERR(i2s->clk_i2s)) {
|
+ if (IS_ERR(i2s->clk_i2s)) {
|
||||||
+ ret = PTR_ERR(i2s->clk_i2s);
|
+ ret = PTR_ERR(i2s->clk_i2s);
|
||||||
+ goto err_iounmap;
|
+ goto err_iounmap;
|
||||||
@ -595,6 +586,11 @@ index 0000000..d3daa27
|
|||||||
+
|
+
|
||||||
+ clk_enable(i2s->clk_aic);
|
+ clk_enable(i2s->clk_aic);
|
||||||
+
|
+
|
||||||
|
+ jz4740_i2c_init_pcm_config(i2s);
|
||||||
|
+
|
||||||
|
+ jz4740_i2s_dai.private_data = i2s;
|
||||||
|
+ ret = snd_soc_register_dai(&jz4740_i2s_dai);
|
||||||
|
+
|
||||||
+ platform_set_drvdata(pdev, i2s);
|
+ platform_set_drvdata(pdev, i2s);
|
||||||
+
|
+
|
||||||
+ return 0;
|
+ return 0;
|
||||||
@ -679,7 +675,7 @@ index 0000000..da22ed8
|
|||||||
+#endif
|
+#endif
|
||||||
diff --git a/sound/soc/jz4740/jz4740-pcm.c b/sound/soc/jz4740/jz4740-pcm.c
|
diff --git a/sound/soc/jz4740/jz4740-pcm.c b/sound/soc/jz4740/jz4740-pcm.c
|
||||||
new file mode 100644
|
new file mode 100644
|
||||||
index 0000000..e55ffbf
|
index 0000000..fd1c203
|
||||||
--- /dev/null
|
--- /dev/null
|
||||||
+++ b/sound/soc/jz4740/jz4740-pcm.c
|
+++ b/sound/soc/jz4740/jz4740-pcm.c
|
||||||
@@ -0,0 +1,350 @@
|
@@ -0,0 +1,350 @@
|
||||||
@ -735,7 +731,7 @@ index 0000000..e55ffbf
|
|||||||
+ .rates = SNDRV_PCM_RATE_8000_48000,
|
+ .rates = SNDRV_PCM_RATE_8000_48000,
|
||||||
+ .channels_min = 1,
|
+ .channels_min = 1,
|
||||||
+ .channels_max = 2,
|
+ .channels_max = 2,
|
||||||
+ .period_bytes_min = 32,
|
+ .period_bytes_min = 16,
|
||||||
+ .period_bytes_max = 2 * PAGE_SIZE,
|
+ .period_bytes_max = 2 * PAGE_SIZE,
|
||||||
+ .periods_min = 2,
|
+ .periods_min = 2,
|
||||||
+ .periods_max = 128,
|
+ .periods_max = 128,
|
||||||
@ -805,7 +801,7 @@ index 0000000..e55ffbf
|
|||||||
+ if (!prtd->dma)
|
+ if (!prtd->dma)
|
||||||
+ return -EBUSY;
|
+ return -EBUSY;
|
||||||
+
|
+
|
||||||
+ jz4740_dma_configure(prtd->dma, config->dma_config);
|
+ jz4740_dma_configure(prtd->dma, &config->dma_config);
|
||||||
+ prtd->fifo_addr = config->fifo_addr;
|
+ prtd->fifo_addr = config->fifo_addr;
|
||||||
+
|
+
|
||||||
+ jz4740_dma_set_complete_cb(prtd->dma, jz4740_pcm_dma_transfer_done);
|
+ jz4740_dma_set_complete_cb(prtd->dma, jz4740_pcm_dma_transfer_done);
|
||||||
@ -1035,7 +1031,7 @@ index 0000000..e55ffbf
|
|||||||
+MODULE_LICENSE("GPL");
|
+MODULE_LICENSE("GPL");
|
||||||
diff --git a/sound/soc/jz4740/jz4740-pcm.h b/sound/soc/jz4740/jz4740-pcm.h
|
diff --git a/sound/soc/jz4740/jz4740-pcm.h b/sound/soc/jz4740/jz4740-pcm.h
|
||||||
new file mode 100644
|
new file mode 100644
|
||||||
index 0000000..2a11800
|
index 0000000..e3f221e
|
||||||
--- /dev/null
|
--- /dev/null
|
||||||
+++ b/sound/soc/jz4740/jz4740-pcm.h
|
+++ b/sound/soc/jz4740/jz4740-pcm.h
|
||||||
@@ -0,0 +1,22 @@
|
@@ -0,0 +1,22 @@
|
||||||
@ -1056,7 +1052,7 @@ index 0000000..2a11800
|
|||||||
+extern struct snd_soc_platform jz4740_soc_platform;
|
+extern struct snd_soc_platform jz4740_soc_platform;
|
||||||
+
|
+
|
||||||
+struct jz4740_pcm_config {
|
+struct jz4740_pcm_config {
|
||||||
+ struct jz4740_dma_config *dma_config;
|
+ struct jz4740_dma_config dma_config;
|
||||||
+ phys_addr_t fifo_addr;
|
+ phys_addr_t fifo_addr;
|
||||||
+};
|
+};
|
||||||
+
|
+
|
||||||
|
Loading…
Reference in New Issue
Block a user