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fix remaining pci problems with brcm-2.6 (fixes #132)
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@2690 3c298f89-4303-0410-b956-a3cf2f4a3e73
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@ -2204,8 +2204,8 @@ diff -urN linux.old/arch/mips/bcm947xx/broadcom/sbmips.c linux.dev/arch/mips/bcm
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+
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+
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diff -urN linux.old/arch/mips/bcm947xx/broadcom/sbpci.c linux.dev/arch/mips/bcm947xx/broadcom/sbpci.c
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diff -urN linux.old/arch/mips/bcm947xx/broadcom/sbpci.c linux.dev/arch/mips/bcm947xx/broadcom/sbpci.c
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--- linux.old/arch/mips/bcm947xx/broadcom/sbpci.c 1970-01-01 01:00:00.000000000 +0100
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--- linux.old/arch/mips/bcm947xx/broadcom/sbpci.c 1970-01-01 01:00:00.000000000 +0100
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+++ linux.dev/arch/mips/bcm947xx/broadcom/sbpci.c 2005-12-15 20:09:46.562233250 +0100
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+++ linux.dev/arch/mips/bcm947xx/broadcom/sbpci.c 2005-12-15 23:50:31.846688500 +0100
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@@ -0,0 +1,529 @@
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@@ -0,0 +1,531 @@
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+/*
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+/*
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+ * Low-Level PCI and SB support for BCM47xx
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+ * Low-Level PCI and SB support for BCM47xx
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+ *
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+ *
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@ -2406,12 +2406,14 @@ diff -urN linux.old/arch/mips/bcm947xx/broadcom/sbpci.c linux.dev/arch/mips/bcm9
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+ n = (R_REG(&sb->sbidlow) & SBIDL_AR_MASK) >> SBIDL_AR_SHIFT;
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+ n = (R_REG(&sb->sbidlow) & SBIDL_AR_MASK) >> SBIDL_AR_SHIFT;
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+ if (off == OFFSETOF(pci_config_regs, base[0]))
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+ if (off == OFFSETOF(pci_config_regs, base[0]))
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+ cfg->base[0] = ~(sb_size(R_REG(&sb->sbadmatch0)) - 1);
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+ cfg->base[0] = ~(sb_size(R_REG(&sb->sbadmatch0)) - 1);
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+#if 0
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+ else if (off == OFFSETOF(pci_config_regs, base[1]) && n >= 1)
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+ else if (off == OFFSETOF(pci_config_regs, base[1]) && n >= 1)
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+ cfg->base[1] = ~(sb_size(R_REG(&sb->sbadmatch1)) - 1);
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+ cfg->base[1] = ~(sb_size(R_REG(&sb->sbadmatch1)) - 1);
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+ else if (off == OFFSETOF(pci_config_regs, base[2]) && n >= 2)
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+ else if (off == OFFSETOF(pci_config_regs, base[2]) && n >= 2)
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+ cfg->base[2] = ~(sb_size(R_REG(&sb->sbadmatch2)) - 1);
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+ cfg->base[2] = ~(sb_size(R_REG(&sb->sbadmatch2)) - 1);
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+ else if (off == OFFSETOF(pci_config_regs, base[3]) && n >= 3)
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+ else if (off == OFFSETOF(pci_config_regs, base[3]) && n >= 3)
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+ cfg->base[3] = ~(sb_size(R_REG(&sb->sbadmatch3)) - 1);
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+ cfg->base[3] = ~(sb_size(R_REG(&sb->sbadmatch3)) - 1);
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+#endif
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+ }
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+ }
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+ sb_setcoreidx(sbh, coreidx);
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+ sb_setcoreidx(sbh, coreidx);
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+ return 0;
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+ return 0;
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@ -2694,9 +2696,9 @@ diff -urN linux.old/arch/mips/bcm947xx/broadcom/sbpci.c linux.dev/arch/mips/bcm9
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+ cfg->sub_class = subclass;
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+ cfg->sub_class = subclass;
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+ cfg->base_class = class;
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+ cfg->base_class = class;
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+ cfg->base[0] = htol32(sb_base(R_REG(&sb->sbadmatch0)));
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+ cfg->base[0] = htol32(sb_base(R_REG(&sb->sbadmatch0)));
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+ cfg->base[1] = htol32(sb_base(R_REG(&sb->sbadmatch1)));
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+ cfg->base[1] = 0;//htol32(sb_base(R_REG(&sb->sbadmatch1)));
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+ cfg->base[2] = htol32(sb_base(R_REG(&sb->sbadmatch2)));
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+ cfg->base[2] = 0;//htol32(sb_base(R_REG(&sb->sbadmatch2)));
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+ cfg->base[3] = htol32(sb_base(R_REG(&sb->sbadmatch3)));
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+ cfg->base[3] = 0;//htol32(sb_base(R_REG(&sb->sbadmatch3)));
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+ cfg->base[4] = 0;
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+ cfg->base[4] = 0;
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+ cfg->base[5] = 0;
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+ cfg->base[5] = 0;
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+ if (class == PCI_CLASS_BRIDGE && subclass == PCI_BRIDGE_PCI)
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+ if (class == PCI_CLASS_BRIDGE && subclass == PCI_BRIDGE_PCI)
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